WO2020114436A1 - 时钟同步的方法、系统、设备及存储介质 - Google Patents

时钟同步的方法、系统、设备及存储介质 Download PDF

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Publication number
WO2020114436A1
WO2020114436A1 PCT/CN2019/123082 CN2019123082W WO2020114436A1 WO 2020114436 A1 WO2020114436 A1 WO 2020114436A1 CN 2019123082 W CN2019123082 W CN 2019123082W WO 2020114436 A1 WO2020114436 A1 WO 2020114436A1
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Prior art keywords
ptp
port
message
precision
packet
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PCT/CN2019/123082
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English (en)
French (fr)
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王鹏超
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深圳市中兴微电子技术有限公司
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Priority to EP19894003.3A priority Critical patent/EP3893412A4/en
Priority to US17/297,284 priority patent/US11664914B2/en
Publication of WO2020114436A1 publication Critical patent/WO2020114436A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
    • H04J3/0658—Clock or time synchronisation among packet nodes
    • H04J3/0661—Clock or time synchronisation among packet nodes using timestamps
    • H04J3/0667—Bidirectional timestamps, e.g. NTP or PTP for compensation of clock drift and for compensation of propagation delays
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
    • H04J3/0658—Clock or time synchronisation among packet nodes
    • H04J3/0661—Clock or time synchronisation among packet nodes using timestamps
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/12—Arrangements providing for calling or supervisory signals
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/14—Monitoring arrangements

Definitions

  • the embodiments of the present application relate to a precision clock protocol (Prexision Time Protocol), for example, to a clock synchronization method, system, device and storage medium.
  • Prexision Time Protocol a precision clock protocol
  • the normal operation of many services requires network clock synchronization, that is, the time or frequency difference between multiple devices in the entire network is kept within a reasonable error level.
  • PTP is a clock synchronization protocol.
  • PTP itself is only used for high-precision synchronization between devices, but it can also be used for frequency synchronization between devices.
  • PTP has the following advantages: (1) Compared with Network Time Protocol (NTP), PTP can meet the requirements of more precise time synchronization, and NTP can generally only reach sub-seconds Time synchronization accuracy of the same level, and PTP can achieve sub-microsecond time synchronization accuracy; (2) Compared with the Global Positioning System (Global Positioning System, GPS), PTP has lower construction and maintenance costs, and because of the Getting rid of the dependence on GPS also has special significance in national security.
  • NTP Network Time Protocol
  • GPS Global Positioning System
  • the network to which the PTP protocol is applied is called a PTP domain.
  • the nodes in the PTP domain are called clock nodes.
  • the PTP protocol defines three types of basic clock nodes: ordinary clock (Oridinary Clock, OC), boundary clock (Boundary Clock, BC), and transparent clock (Transparent clock, TC). Different types of clock nodes adopt different clock synchronization technologies and achieve different clock synchronization accuracy.
  • PTP clock synchronization technology mainly includes two methods: high-precision clock synchronization and non-high-precision clock synchronization.
  • An embodiment of the present application provides a method for clock synchronization, including: when a PTP message is received, determining attribute information of the PTP port according to the obtained PTP port of the PTP message, where the attribute information includes At least one of the following: clock node configuration type, high-precision mode or non-high-precision mode, non-high-precision entry correction field (cf) modification flag or non-high-precision exit cf modification flag, and asymmetry compensation value;
  • An embodiment of the present application also provides a clock synchronization system, including:
  • the determining unit is configured to determine the attribute information of the PTP port according to the obtained PTP port of the PTP packet when the PTP packet is received, the attribute information includes at least one of the following: a clock node configuration type, High-precision mode or non-high-precision mode, non-precision entrance cf modification mark or non-precision exit cf modification mark, asymmetry compensation value;
  • the clock synchronization unit is configured to perform clock synchronization on the PTP message according to the attribute information of the PTP port.
  • An embodiment of the present application also provides a clock synchronization device, including a memory, a processor, and a computer program stored on the memory and executable on the processor, when the computer program is executed by the processor A method to achieve the above clock synchronization.
  • An embodiment of the present application further provides a computer-readable storage medium, and an information processing program is stored on the computer-readable storage medium, and the above-mentioned clock synchronization method is implemented when the information processing program is executed by a processor.
  • FIG. 1 is a schematic flowchart of a clock synchronization method according to Embodiment 1 of the present application;
  • Example 2 is a schematic flowchart of a clock synchronization method provided by Example 1 of the present application;
  • FIG. 3 is a schematic flowchart of a clock synchronization method provided by Example 2 of the present application.
  • FIG. 4 is a schematic structural diagram of a clock synchronization system according to Embodiment 2 of the present application.
  • FIG. 5 is a schematic flow diagram of a clock synchronization method provided in Example 3 of the present application.
  • the nodes in the PTP domain are called clock nodes.
  • the PTP protocol defines the following three types of basic clock nodes:
  • the clock node has multiple PTP ports in the same PTP domain to participate in time synchronization. It synchronizes the time from the upstream clock node through one of the multiple PTP ports, and releases the clock to the downstream clock node through the remaining ports.
  • TC Compared with OC/BC, OC/BC needs to keep time synchronization with other clock nodes, but TC does not keep time synchronization with other clock nodes. TC has multiple PTP ports, but it only forwards PTP protocol packets between these ports and corrects the forward delay of PTP protocol packets, instead of synchronizing time through any one port.
  • TC+OC/BC In addition to the above three basic clock nodes, there are some mixed clock nodes, such as TC+OC/BC that combines the characteristics of TC and OC/BC: TC+OC/BC has multiple PTP ports in the same PTP domain , One of the multiple PTP ports is of the OC/BC type, and the other ports are of the TC type. On the one hand, TC+OC/BC forwards PTP protocol packets through TC type ports and corrects the forward delay of PTP protocol packets; on the other hand, TC+OC/BC performs clock synchronization through OC/BC type ports.
  • the clock synchronization technology mainly uses the following two methods:
  • non-high-precision clock synchronization and high-precision clock synchronization are interleaved, that is, one switching chip can be used as an OC/BC/TC clock at the same time.
  • Precision clock synchronization and non-precision clock synchronization can be flexibly switched on the same switching chip to adapt to complex application scenarios.
  • the embodiments of the present application provide a clock synchronization technical solution, which can overcome the problem of incompatibility between high-precision mode and non-high-precision mode in the related art, and ensure that the chip can support OC/BC/TC mode for mixed clock nodes at the same time. .
  • several embodiments will be described.
  • FIG. 1 is a schematic flowchart of a clock synchronization method according to Embodiment 1 of the present application. As shown in Figure 1, the method includes:
  • Step 1010 When receiving a PTP message, determine the attribute information of the PTP port according to the obtained PTP port of the PTP message, where the attribute information includes at least one of the following: a clock node configuration type, a high-precision mode, or Non-precision mode, non-precision entrance cf modification mark or non-precision exit cf modification mark, asymmetry compensation value.
  • Step 1020 Perform clock synchronization on the PTP packet according to the attribute information of the PTP port.
  • the method before receiving the PTP message, the method further includes: pre-configuring a PTP port attribute table, the PTP port attribute table includes: at least one PTP port and each PTP port in the at least one PTP port corresponds to Attribute information.
  • the method further includes: parsing the received message to obtain message information of the message, where the message information includes at least one of the following: message type, port attribute, and virtual local area network (Virtual Local Area (Network, vlan) layers; the packet type indicates that the packet type is a PTP packet type or a packet type other than the PTP packet type; the port attribute indicates that the packet corresponds to The port is a layer 2 port or a layer 3 port; the vlan layer number represents one of the three modes of vlan.
  • message information includes at least one of the following: message type, port attribute, and virtual local area network (Virtual Local Area (Network, vlan) layers;
  • the packet type indicates that the packet type is a PTP packet type or a packet type other than the PTP packet type;
  • the port attribute indicates that the packet corresponds to The port is a layer 2 port or a layer 3 port;
  • the vlan layer number represents one of the three modes of vlan.
  • the message type is a PTP message type
  • determining the attribute information of the PTP port according to the obtained PTP port includes: obtaining an inbound PTP port of the PTP packet according to the vlan layer number, and determining the ingress according to the PTP port attribute table Attribute information to the PTP port.
  • determining the attribute information of the PTP port according to the obtained PTP port includes: obtaining the outgoing PTP port of the PTP packet according to the port attribute, and determining the outgoing PTP port according to the PTP port attribute table Attribute information.
  • the method further includes: in a case where the PTP packet is received through a standard Ethernet port and the ingress PTP port cannot be obtained, the PTP packet is assumed to be in a non-high-precision mode by default.
  • the clock synchronization of the PTP message according to the attribute information of the PTP port includes: modifying the transmission of the PTP message when the incoming PTP port is in a high-precision mode Time field.
  • the clock synchronization of the PTP packet according to the attribute information of the PTP port includes: when the outgoing PTP port is in a non-precision mode and the out-of-precision exit cf of the outgoing PTP port When the modification flag is turned on, modify the cf field of the PTP message; when the outgoing PTP port is in a non-precision mode and the non-precision exit cf modification flag of the outgoing PTP port is not turned on, do not Modify the PTP message.
  • the modifying the cf field of the PTP message includes: calculating a residence time of the PTP message, and modifying the cf field of the PTP message according to the residence time.
  • the method further includes: modifying a user datagram protocol (User Datagram Protocol, UDP) checksum checksum field of the PTP message.
  • UDP User Datagram Protocol
  • Embodiment 1 of the present application can support high-precision mode mode and non-high-precision mode for different interfaces at the same time, which is suitable for complex scenarios in which non-high-precision clock synchronization and high-precision clock synchronization are interleaved in practice.
  • FIG. 2 is a schematic flowchart of a clock synchronization method provided by Example 1 of the present application. As shown in Figure 2, the method includes:
  • Step 2010 Parse the received message to obtain message information of the message.
  • the message may come from a PTP engine or a standard Ethernet port, and the message is parsed through the interface after processing, and mainly analyzes the message type, port attribute, vlan layer and other information of the message.
  • the packet type indicates that the packet type is a PTP packet type or a packet type other than the PTP packet type;
  • the port attribute indicates that the port corresponding to the packet is Layer 2 Port or Layer 3 port;
  • the vlan layer number represents one of three modes of vlan.
  • the message type is a PTP message type
  • step 2020 For the PTP message coming in from the standard Ethernet port, perform step 2020.
  • step 2050 For the PTP message coming from the side-mounted PTP engine, because the PTP message itself carries outgoing to the PTP port, step 2050 is directly executed.
  • step 2020 the incoming PTP port is obtained according to the message information of the message.
  • the inbound PTP port of the PTP packet is obtained based on port/port+vlan/sip, and the PTP port and the physical port can implement many-to-one or one-to-many.
  • Step 2030 Determine the attribute information of the incoming PTP port according to the obtained incoming PTP port and the pre-configured PTP port attribute table.
  • a PTP port attribute table before receiving a PTP message, a PTP port attribute table is pre-configured, and the PTP port attribute table includes: at least one PTP port and attribute information corresponding to each PTP port in the at least one PTP port.
  • the attribute information includes at least one of the following: a clock node configuration type, a high-precision mode or a non-precision mode, a non-precision entry cf modification flag or a non-precision exit cf modification flag, and an asymmetry compensation value.
  • the PTP message is in a non-precision mode by default.
  • the inbound PTP port is obtained through port/port+vlan/sip, and the attribute information of the inbound PTP port is determined by searching the PTP port attribute table.
  • the attribute information includes the clock Node configuration type, high-precision mode or non-high-precision mode, and non-high-precision entrance cf modification flag and other information; for PTP packets coming in from a standard Ethernet port, when no incoming PTP port is obtained, based on the incoming direction of the PTP packet The logic port obtains a non-precision mode.
  • the non-high-precision entry cf modification flag is compatible with the time stamping function of the board entry, thereby improving the time accuracy and effectively reducing the accuracy loss caused by the delay of the board card and the chip entry direction; while supporting Port TC mode; flexibly implement TC mode configuration based on the PTP port attribute table.
  • step 2070 is directly executed; when the clock node of the incoming PTP port supports TC mode, execute Step 2040.
  • Step 2040 Obtain the outgoing PTP port according to the packet information of the packet.
  • the outgoing PTP port of the PTP packet is obtained according to the port attribute.
  • the port attribute is a Layer 2 port or a Layer 3 port
  • the outgoing PTP port of the PTP packet is obtained through L2/L3 forwarding.
  • Step 2050 Determine the attribute information of the outgoing PTP port according to the obtained outgoing PTP port and the pre-configured PTP port attribute table.
  • the attribute information obtained for the PTP port based on the PTP port attribute table is high-precision mode or non-high-precision mode, non-high-precision exit cf modification flag, and asymmetry compensation value.
  • the non-high-precision export cf modification mark is compatible with the time stamping function to the board, which effectively reduces the accuracy loss caused by the delay between the chip exit and the board; the asymmetry compensation can effectively solve the chip cross-clock, asynchronous first-in First-in (first-in, first-in, first-out, fifo) and serial-to-parallel conversion link delays are not the same because of the loss of accuracy.
  • Step 2060 Calculate the residence time of the PTP message.
  • the non-high-precision entry cf modification mark is compatible with the time stamping function of the board entrance
  • the non-high-precision exit cf modification mark is compatible with the time stamping function of the outbound board, so it is not high
  • the PTP dwell time calculation method is the outlet PTP time minus the inlet PTP time, plus the configured compensation value, and finally obtain the residence time of the PTP message inside the chip.
  • the non-high-precision export cf modification tag is compatible with the time stamping function to the board. Therefore, in the non-high-precision mode, the calculation method of the PTP dwell time is the exported PTP time minus the message The entry time information that comes with it, plus the configured compensation value, finally obtains the residence time of the PTP message inside the chip.
  • Step 2070 Perform clock synchronization on the PTP packet according to the attribute information of the ingress/egress PTP port.
  • the transmission time of the PTP packet is modified according to the external clock source Field.
  • the clock node configuration of the outgoing PTP port is OC or BC or TC and is in non-precision mode
  • the non-precision exit cf modification flag of the outgoing PTP port has been turned on, according to the PTP report
  • the dwell time of the document modifies the cf field of the PTP message; if the non-high-precision exit cf modification flag to the PTP port is not enabled, the PTP message is not modified.
  • the PTP message is not modified.
  • the udp_checksum modification includes multiple calculation methods, which can support recalculation, clearing, and no modification modes.
  • FIG. 3 is a schematic flowchart of a clock synchronization method provided by Example 2 of the present application. As shown in FIG. 3, the method includes:
  • Step 3010 Receive a 1588 message from a standard Ethernet port or a side-mounted PTP engine port, and parse the message to obtain information such as the message type, vlan layer number, and port attributes.
  • Step 3020 For the PTP packets coming in from the standard Ethernet port, obtain the incoming PTP port based on port/port+vlan/sip, and for the packets coming from the side-mounted PTP engine, directly obtain the outgoing PTP port.
  • PTP ports and physical ports can be implemented as many-to-one or one-to-many.
  • Step 3030 Obtain the attribute information of the incoming PTP port according to the obtained incoming PTP port.
  • the attribute information of the PTP port may be obtained through a pre-configured PTP port attribute table, including: clock node mode, high-precision mode, and non-high-precision entry cf modification flag.
  • the clock node mode is the configuration type of the clock node, including OC/BC/TC mode.
  • the non-high-precision entrance cf modification mark is compatible with the time stamping function of the entrance of the board, thereby improving the time accuracy, effectively reducing the accuracy loss caused by the delay of the board and the chip entry direction; while supporting the port TC mode; it can be flexibly based on
  • the PTP attribute table or port attribute table implements tc mode configuration.
  • the TC mode does not support the high-precision mode, in the high-precision mode in the OC/BC mode, it will terminate at a node without determining the outgoing PTP port. That is, when the incoming PTP port supports TC mode or the PTP message is delivered by the side-mounted PTP engine (the sending side is in OC/BC mode), the following step 3040 is performed.
  • the incoming PTP port does not support TC mode and is not When the side-mounted PTP engine delivers the PTP message, step 3060 is directly executed.
  • Step 3040 Obtain the attribute information of the outgoing PTP port based on the pre-configured PTP port attribute table.
  • the attribute information of the outgoing PTP port includes high-precision mode, non-high-precision exit cf modification flag, and asymmetry compensation value.
  • the non-high-precision exit cf modification mark is compatible with the time stamping function to the board, which effectively reduces the accuracy loss caused by the delay between the chip exit and the board; the asymmetry compensation value can effectively solve the chip cross-clock, The accuracy loss caused by asynchronous fifo and serial-to-parallel conversion link delays are not the same.
  • Step 3050 in the non-precision mode, calculate the residence time of the PTP message.
  • the calculation method is the PTP time at the outlet minus the PTP time at the inlet, plus the configured compensation value, and finally the residence time of the PTP message inside the chip is obtained.
  • the calculation method is the PTP time of the exit minus the entry time information according to the message itself, plus the configured compensation value, and finally the residence of the PTP message inside the chip is obtained time.
  • Step 3060 Modify the sending time of the PTP message or correct the domain.
  • modifying the sending time refers to modifying the sending time of the message in the high-precision mode
  • modifying the correction field refers to correcting the forwarding delay of the PTP message in the non-high-precision mode.
  • Modifying the udp_checksum field includes multiple calculation methods, and can support recalculation, clearing, and unmodified modes.
  • Examples 1 and 2 of this application select high-precision mode or non-high-precision mode based on the attribute information of the PTP port, that is, the clock synchronization of the PTP message is achieved by modifying the transmission time of the PTP message or the correction field .
  • non-high-precision mode compatible board time stamping function for non-high-precision mode compatible board time stamping function.
  • FIG. 4 is a schematic structural diagram of a clock synchronization system according to Embodiment 2 of the present application.
  • the system includes: a determining unit configured to determine the attribute information of the PTP port according to the obtained PTP port of the PTP packet when the PTP packet is received, the attribute information includes at least the following One: clock node configuration type, high-precision mode or non-high-precision mode, non-precision entrance cf modification flag or non-precision exit cf modification flag, asymmetry compensation value; clock synchronization unit, set according to the PTP port
  • the attribute information performs clock synchronization on the PTP message.
  • the non-high-precision entrance cf modification mark is compatible with the time stamping function of the board card entrance; and/or, the non-high-precision exit cf modification mark is compatible with the time stamping function of the outboard board.
  • the system further includes: a configuration unit; the configuration unit is configured to pre-configure a PTP port attribute table before receiving a PTP message, and the PTP port attribute table includes: at least one PTP port and the Attribute information corresponding to each PTP port in at least one PTP port.
  • the determining unit includes: a message parsing module configured to parse the received message to obtain message information of the message, and the message information includes at least one of the following: a message type, Port attributes and vlan layers; the packet type indicates that the packet type is a PTP packet type or a packet type other than the PTP packet type; the port attribute indicates a port corresponding to the packet It is a layer 2 port or a layer 3 port; the vlan layer number represents one of the three modes of vlan.
  • a message parsing module configured to parse the received message to obtain message information of the message, and the message information includes at least one of the following: a message type, Port attributes and vlan layers; the packet type indicates that the packet type is a PTP packet type or a packet type other than the PTP packet type; the port attribute indicates a port corresponding to the packet It is a layer 2 port or a layer 3 port; the vlan layer number represents one of the three modes of vlan.
  • the determination unit further includes: a determination module configured to determine that the PTP message is received when the message type is a PTP message type.
  • the determining unit further includes: an incoming PTP processing module; the incoming PTP processing module is configured to obtain an incoming PTP port of the PTP packet according to the number of vlan layers, according to the PTP
  • the port attribute table determines attribute information of the incoming PTP port.
  • the determining unit further includes: an L2/L3 forwarding module and an outgoing PTP processing module; the L2/L3 forwarding module is configured to obtain the outgoing PTP port of the PTP packet according to the port attribute; The outgoing PTP processing module is configured to determine attribute information of the outgoing PTP port according to the PTP port attribute table.
  • the incoming PTP processing module is further configured to, when the PTP message is received through a standard Ethernet port and the PTP port cannot be obtained, the PTP message is in a non-precision mode by default.
  • the clock synchronization unit is set to one of the following: when the clock node configuration type of the incoming PTP port is OC or BC and is in the high-precision mode, the sending time of the PTP packet is modified Field; when the clock node configuration type of the outgoing PTP port is OC or BC or TC and is in non-precision mode and the non-precision exit cf modification flag of the outgoing PTP port has been turned on, modify the PTP report The cf field of the document; when the outgoing PTP port is in a non-precision mode and the non-precision exit cf modification flag of the outgoing PTP port is not turned on, the PTP message is not modified.
  • the clock synchronization unit includes: a dwell time calculation module and a PTP message modification module, and the dwell time calculation module is set to calculate the dwell time of the PTP message; PTP message modification The module is configured to modify the cf field of the PTP message according to the residence time.
  • the PTP message modification module is further configured to modify the UDP checksum checksum field of the PTP message.
  • FIG. 5 is a schematic flow diagram of a clock synchronization method provided in Example 3 of the present application. As shown in Figure 5, the method includes:
  • Step 5010 Receive a PTP message from the side-mounted PTP engine or a standard Ethernet port, process it through the interface, and send it to the message parsing module.
  • the message parsing module mainly analyzes the message type, port attributes, and vlan layer number.
  • Step 5020 In the incoming PTP processing module, for the incoming PTP packet of the standard Ethernet port, obtain the incoming PTP port through the layer 3 of port/port+vlan/sip, and search the PTP port attribute table to obtain the clock node of the incoming PTP port Attribute information such as configuration type, high-precision mode, and non-high-precision entry cf modification flag; when no incoming PTP port is obtained, the non-high-precision entry mode is obtained based on the incoming logical port of the PTP message.
  • Attribute information such as configuration type, high-precision mode, and non-high-precision entry cf modification flag
  • the PTP packet from the side-mounted PTP engine can be directly determined to the PTP port, so step 5040 can be directly executed.
  • Step 5030 the outgoing PTP port of the PTP message is obtained through the L2/L3 forwarding module.
  • Step 5040 In the outgoing PTP processing module, based on the PTP port attribute table, obtain high-precision mode of the outgoing PTP port, non-high-precision exit cf modification flag, and asymmetry compensation value and other attribute information.
  • Step 5050 In the dwell time calculation module, calculate the dwell time of the PTP message. When the incoming board opens the cf modification, the dwell time calculation module does not consider the entry timestamp; when the outbound board opens the cf Modified, the residence time calculation module does not consider the exit timestamp.
  • Step 5060 in the PTP message modification module, when the incoming PTP port is in the high-precision mode, modify the transmission time field of the PTP message; when the outgoing PTP port is in the non-high-precision mode, if the outgoing PTP port is not
  • the high-precision export cf modification flag is turned on, and the modification field field of the PTP message is modified; when the modification mode is not configured (non-high-precision cf modification flag is not configured at both the entrance and the exit), the PTP message is not modified.
  • the udp_checksum field needs to be modified at the same time.
  • the PTP message modification module selects the high-precision mode or the non-high-precision mode based on the PTP port attribute information obtained by the inbound/outbound PTP processing module, that is, by modifying the packet sending time or modifying the field To achieve clock synchronization.
  • high-accuracy mode and non-high-accuracy mode can be supported for different interfaces at the same time, which is suitable for complex scenarios where non-high-precision clock synchronization and high-precision clock synchronization are interwoven, and is compatible with non-high-precision mode time stamping.
  • An embodiment of the present application also provides a clock synchronization device, including a memory, a processor, and a computer program stored on the memory and executable on the processor, when the computer program is executed by the processor A method to achieve the above clock synchronization.
  • An embodiment of the present application further provides a computer-readable storage medium that stores an information processing program, and when the information processing program is executed by a processor, implements any one of the clock synchronization methods described above.
  • All or some of the steps, systems, and functional modules/units in the method disclosed above may be implemented as software, firmware, hardware, and appropriate combinations.
  • the division between the functional modules/units mentioned in the above description does not necessarily correspond to the division of physical components.
  • one physical component may have multiple functions, or one function or step may be performed by multiple physical components in cooperation.
  • Some or all components may be implemented as software executed by a processor, such as a digital signal processor or microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit.
  • Such software may be distributed on computer-readable media, which may include computer storage media (or non-transitory media) and communication media (or transitory media).
  • Computer storage medium includes volatile and nonvolatile, removable and non-removable implemented in any method or technology for storing information such as computer readable instructions, data structures, program modules or other data medium.
  • Computer storage media include but are not limited to Random Access Memory (RAM), Read-Only Memory (ROM), Erasable Programmable Read-Only Memory (Electrically Programmable Read-Only Memory, EEPROM) , Flash memory or other memory technology, compact disc read-only memory (Compact Disc Read-Only Memory, CD-ROM), digital versatile disc (Digital Video Disc, DVD) or other optical disc storage, magnetic box, magnetic tape, magnetic disk storage or other magnetic A storage device, or any other medium that can be configured to store desired information and be accessible by a computer.
  • communication media typically contains computer readable instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave or other transmission mechanism, and may include any information delivery media.

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  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

本文公开了一种时钟同步的方法、系统、设备及存储介质，该方法包括：在接收到PTP报文的情况下，根据获得的所述PTP报文的PTP端口确定所述PTP端口的属性信息，所述属性信息包括以下至少之一：时钟节点配置类型、高精度模式或非高精度模式、非高精度入口cf修改标记或非高精度出口cf修改标记、非对称补偿值；根据所述PTP端口的属性信息对所述PTP报文进行时钟同步。

Description

时钟同步的方法、系统、设备及存储介质
本申请要求在2018年12月04日提交中国专利局、申请号为201811473376.9的中国专利申请的优先权，该申请的全部内容通过引用结合在本申请中。
技术领域
本申请实施例涉及精确时钟协议(Prexision Time Protocol，PTP)，例如涉及一种时钟同步的方法、系统、设备及存储介质。
背景技术
在通信网络中，许多业务的正常运行都要求网络时钟同步，即整个网络的多个设备之间的时间或频率差保持在合理的误差水平内。
PTP是一种时钟同步的协议，PTP本身只用于设备之间的高精度同步，但也可被借用于设备之间的频率同步。相比于多种时间同步机制，PTP具有以下优势：(1)、相比于网络时间协议(Network Time Protocol，NTP)，PTP能够满足更高精度的时间同步需求，NTP一般只能达到亚秒级的时间同步精度，而PTP则可达到亚微秒级的时间同步精度；(2)、相对于全球定位系统(Global Positioning System，GPS)，PTP具有更低的建设和维护成本，并且由于可以摆脱对GPS的依赖，在国家安全方面也具有特殊的意义。
将应用了PTP协议的网络称为PTP域。PTP域中的节点被称为时钟节点，PTP协议定义了三种类型的基本时钟节点：普通时钟(Oridinary Clock，OC)、边界时钟(Boundary Clock，BC)和透明时钟(Transparent clock，TC)。不同类型的时钟节点采取的时钟同步技术以及达到的时钟同步精度不同。PTP时钟同步技术主要包括高精度时钟同步和非高精度时钟同步两种方法。
由于在实际复杂的应用场景中，存在一些混合时钟节点，例如融合了TC的特点和OC/BC的特点的TC+OC/BC；并且也存在非高精度时钟同步和高精度时钟同步混合交织的场景。但是，相关技术中，不存在一种时钟同步的技术方案，能够同时支持OC/BC/TC模式，兼容高精度时钟同步和非高精度时钟同步处理。
发明内容
本申请实施例提供了一种时钟同步的方法，包括：在接收到PTP报文的情况下，根据获得的所述PTP报文的PTP端口确定所述PTP端口的属性信息，所述属性信息包括以下至少之一：时钟节点配置类型、高精度模式或非高精度模 式、非高精度入口修正域(correction field，cf)修改标记或非高精度出口cf修改标记、非对称补偿值；
根据所述PTP端口的属性信息对所述PTP报文进行时钟同步。
本申请实施例还提供了一种时钟同步的系统，包括：
确定单元，设置为在接收到PTP报文的情况下，根据获得的所述PTP报文的PTP端口确定所述PTP端口的属性信息，所述属性信息包括以下至少之一：时钟节点配置类型、高精度模式或非高精度模式、非高精度入口cf修改标记或非高精度出口cf修改标记、非对称补偿值；
时钟同步单元，设置为根据所述PTP端口的属性信息对所述PTP报文进行时钟同步。
本申请实施例还提供了一种时钟同步的设备，包括存储器、处理器及存储在所述存储器上并可在所述处理器上运行的计算机程序，所述计算机程序被所述处理器执行时实现上述的时钟同步的方法。
本申请实施例还提供了一种计算机可读存储介质，所述计算机可读存储介质上存储有信息处理程序，所述信息处理程序被处理器执行时实现上述时钟同步方法。
附图说明
图1为本申请实施例一提供的一种时钟同步的方法的流程示意图；
图2为本申请示例一提供的一种时钟同步的方法的流程示意图；
图3为本申请示例二提供的一种时钟同步的方法的流程示意图；
图4为本申请实施例二提供的一种时钟同步的系统的结构示意图；
图5为本申请示例三提供的一种时钟同步的方法的流向示意图。
具体实施方式
下文中将结合附图对本申请的实施例进行说明。在附图的流程图示出的步骤可以在诸如一组计算机可执行指令的计算机系统中执行。并且，虽然在流程图中示出了逻辑顺序，但是在一些情况下，可以以不同于此处的顺序执行所示出或描述的步骤。
PTP域中的节点被称为时钟节点，PTP协议定义了以下三种类型的基本时钟节点：
(1)、OC：该时钟节点在同一个PTP域内只能有一个PTP端口参与时钟 同步，并通过该端口从上游时钟节点同步时间。此外，当时钟节点作为时钟源时，可以只通过一个PTP端口向下游时钟节点发布时间。
(2)、BC：该时钟节点在同一个PTP域内拥有多个PTP端口参与时间同步。它通过多个PTP端口中的一个端口从上游时钟节点同步时间，并通过其余端口向下游时钟节点发布时钟。
(3)、TC：与OC/BC相比，OC/BC需要与其它时钟节点保持时间同步，而TC则不与其它时钟节点保持时间同步。TC有多个PTP端口，但它只在这些端口间转发PTP协议报文并对PTP协议报文进行转发延时校正，而不会通过任何一个端口同步时间。
除上述三种基本时钟节点以外，还有一些混合时钟节点，例如融合了TC的特点和OC/BC的特点的TC+OC/BC：TC+OC/BC在同一个PTP域内拥有多个PTP端口，多个PTP端口中的一个端口为OC/BC类型，其它端口为TC类型。一方面，TC+OC/BC通过TC类型的端口转发PTP协议报文并对PTP协议报文进行转发延时校正；另一方面，TC+OC/BC通过OC/BC类型的端口进行时钟同步。
时钟同步技术实现主要采用以下两种方法：
(1)、通过时戳单元实现1588报文发送及接收时间的处理，在交换芯片只实现驻留时间的计算，修改报文中的correction field字段，由于时戳单元到PTP报文从交换芯片发送出去存在一定延时，从而这种方法实现导致时钟同步精度不高，以下称为非高精度模式。
(2)、通过时戳单元发送1588相关报文，在交换芯片的物理编码子层(Physical Coding Sublayer，PCS)对1588报文进行发送及接收时间的处理，仅修改报文的发送时间字段，这种方法时钟同步精度较高，但是仅可支持OC/BC模式，对于TC模式无法支持，以下称为高精度模式。
由于在实际复杂的应用场景中，存在非高精度时钟同步和高精度时钟同步混合交织的场景，即一台交换芯片可同时作为OC/BC/TC时钟，由于两种处理模式不同，需要保证高精度时钟同步和非高精度时钟同步在同一交换芯片可灵活切换，以适应复杂的应用场景。
为此，本申请实施例提供了一种时钟同步的技术方案，能够克服相关技术中高精度模式和非高精度模式不能兼容的问题，保证对于混合时钟节点，芯片可同时支持OC/BC/TC模式。下面通过几个实施例进行说明。
实施例一
图1为本申请实施例一提供的一种时钟同步的方法的流程示意图。如图1 所示，该方法包括：
步骤1010，在接收到PTP报文的情况下，根据获得的PTP报文的PTP端口确定所述PTP端口的属性信息，所述属性信息包括以下至少之一：时钟节点配置类型、高精度模式或非高精度模式、非高精度入口cf修改标记或非高精度出口cf修改标记、非对称补偿值。
步骤1020，根据所述PTP端口的属性信息对所述PTP报文进行时钟同步。
一实施例中，在接收到PTP报文之前，该方法还包括：预先配置PTP端口属性表，所述PTP端口属性表包括：至少一个PTP端口及所述至少一个PTP端口中每个PTP端口对应的属性信息。
一实施例中，该方法还包括：解析接收到的报文，得到所述报文的报文信息，所述报文信息包括以下至少之一：报文类型、端口属性、虚拟局域网(Virtual Local Area Network，vlan)层数；所述报文类型表示所述报文的类型为PTP报文类型或除所述PTP报文类型外的报文类型；所述端口属性表示所述报文对应的端口为二层端口或三层端口；所述vlan层数表示vlan的三种模式之一。
一实施例中，在所述报文类型为PTP报文类型的情况下，判断为接收到PTP报文。
一实施例中，根据获得的PTP端口确定所述PTP端口的属性信息，包括：根据所述vlan层数获得所述PTP报文的入向PTP端口，根据所述PTP端口属性表确定所述入向PTP端口的属性信息。
一实施例中，根据获得的PTP端口确定所述PTP端口的属性信息，包括：根据所述端口属性获得所述PTP报文的出向PTP端口，根据所述PTP端口属性表确定所述出向PTP端口的属性信息。
一实施例中，该方法还包括：在通过标准以太口接收所述PTP报文且无法获得所述入口PTP端口的情况下，默认所述PTP报文为非高精度模式。
一实施例中，所述根据所述PTP端口的属性信息对所述PTP报文进行时钟同步，包括：在所述入向PTP端口为高精度模式的情况下，修改所述PTP报文的发送时间字段。
一实施例中，所述根据所述PTP端口的属性信息对所述PTP报文进行时钟同步，包括：在所述出向PTP端口为非高精度模式且所述出向PTP端口的非高精度出口cf修改标记已经开启的情况下，修改所述PTP报文的cf字段；在所述出向PTP端口为非高精度模式且所述出向PTP端口的非高精度出口cf修改标记没有开启的情况下，不修改所述PTP报文。
一实施例中，所述修改所述PTP报文的cf字段，包括：计算所述PTP报文的驻留时间，根据所述驻留时间修改所述PTP报文的cf字段。
一实施例中，该方法还包括：修改所述PTP报文的用户数据报协议(User Datagram Protocol，UDP)校验和总和检验码(checksum)字段。
本申请实施例一提供的技术方案，与相关技术相比，对于不同接口可以同时支持高精度模式模式和非高精度模式，适合实际中非高精度时钟同步和高精度时钟同步交织的复杂场景。
下面通过示例一、二阐述上述实施例一提供的技术方案。
示例一
图2为本申请示例一提供的一种时钟同步的方法的流程示意图。如图2所示，该方法包括：
步骤2010，解析接收到的报文，得到所述报文的报文信息。
本示例中，所述报文可以来自PTP引擎或标准以太网口，通过接口对报文处理后进行解析，主要解析报文的报文类型、端口属性和vlan层数等信息。
本示例中，所述报文类型表示所述报文的类型为PTP报文类型或除所述PTP报文类型外的报文类型；所述端口属性表示所述报文对应的端口为二层端口或三层端口；所述vlan层数表示vlan的三种模式之一。
本示例中，在所述报文类型为PTP报文类型的情况下，判断为接收到PTP报文。只有接收到PTP报文时才执行下面的步骤，如果是非PTP报文，则按照相关技术处理。
对于标准以太网口进来的PTP报文，执行步骤2020，对于侧挂PTP引擎进来的PTP报文，因为该PTP报文自身携带出向PTP端口，因此直接执行步骤2050。
步骤2020，根据所述报文的报文信息获得入向PTP端口。
本示例中，对于标准以太网口进来的PTP报文，基于port/port+vlan/sip获得所述PTP报文的入向PTP端口，PTP端口和物理端口可实现多对一或一对多。
步骤2030，根据获得的入向PTP端口和预先配置的PTP端口属性表确定所述入向PTP端口的属性信息。
本示例中，在接收到PTP报文之前，预先配置PTP端口属性表，所述PTP端口属性表包括：至少一个PTP端口及所述至少一个PTP端口中每个PTP端口对应的属性信息。所述属性信息包括如下至少之一：时钟节点配置类型、高精度模式或非高精度模式、非高精度入口cf修改标记或非高精度出口cf修改标记、 非对称补偿值。
另外，在通过标准以太口接收所述PTP报文且无法获得所述入口PTP端口的情况下，默认所述PTP报文为非高精度模式。
本示例中，对于标准以太口进来的PTP报文，通过port/port+vlan/sip获得入向PTP端口，并查找PTP端口属性表确定所述入向PTP端口的属性信息，该属性信息包括时钟节点配置类型、高精度模式或非高精度模式和非高精度入口cf修改标记等信息；对于标准以太口进来的PTP报文，当没有获得入向PTP端口时，基于该PTP报文的入向逻辑口获得非高精度模式。
本示例中，PTP端口的属性信息中，非高精度入口cf修改标记可兼容板卡入口打时戳功能，从而提高时间精度，有效降低板卡和入芯片方向延时引起的精度损失；同时支持端口TC模式；可灵活基于PTP端口属性表实现TC模式配置。
当所述报文的报文信息中还包括了终结信息且所述入向PTP端口不支持TC模式时，则直接执行步骤2070；当所述入向PTP端口的时钟节点支持TC模式时，执行步骤2040。
步骤2040，根据所述报文的报文信息获得出向PTP端口。
本示例中，根据所述端口属性获得所述PTP报文的出向PTP端口，当端口属性为二层端口或三层端口，经过L2/L3转发获得所述PTP报文的出向PTP端口。
步骤2050，根据获得的出向PTP端口和预先配置的PTP端口属性表确定所述出向PTP端口的属性信息。
本示例中，基于PTP端口属性表获得出向PTP端口的属性信息为高精度模式或非高精度模式、非高精度出口cf修改标记和非对称补偿值等信息。
本示例中，非高精度出口cf修改标记兼容出向板卡打时戳功能，有效降低芯片出口到板卡之间的延时引起的精度损失；通过非对称补偿可以有效解决芯片跨时钟、异步先入先出(first input first output，fifo)以及串并转换链路延时不相等等问题引起的精度损失。
步骤2060，计算所述PTP报文的驻留时间。
本示例中，对于标准以太口进来的PTP报文，由于非高精度入口cf修改标记兼容板卡入口打时戳功能，非高精度出口cf修改标记兼容出向板卡打时戳功能，因此非高精度模式下，PTP驻留时间计算方法为出口的PTP时间减去入口的PTP时间，再加上配置的补偿值，最终获得PTP报文在芯片内部的驻留时间。 对于侧挂PTP引擎进来的PTP报文，非高精度出口cf修改标记兼容出向板卡打时戳功能，因此非高精度模式下，PTP驻留时间计算方法为出口的PTP时间减去根据报文中自带的入口时间信息，再加上配置的补偿值，最终获得PTP报文在芯片内部的驻留时间。
步骤2070，根据所述入口/出向PTP端口的属性信息对所述PTP报文进行时钟同步。
本示例中，由于TC模式不支持高精度模式，因此当所述入向PTP端口的时钟节点配置类型为OC或BC且为高精度模式时，根据外部时钟源修改所述PTP报文的发送时间字段。
本示例中，当所述出向PTP端口的时钟节点配置配型为OC或BC或TC且为非高精度模式时，如果出向PTP端口的非高精度出口cf修改标记已经开启，根据所述PTP报文的驻留时间修改所述PTP报文的cf字段；如果出向PTP端口的非高精度出口cf修改标记没有开启，则不修改所述PTP报文。
本示例中，当没有配置修改模式时(入口和出口均未配置非高精度cf修改标记)对PTP报文不进行修改。
另外，对于L3 PTP报文，需要同时对udp校验和checksum字段进行修改，udp_checksum修改包括多种计算方式，可支持重算、清零及不修改模式。
示例二
图3为本申请示例二提供的一种时钟同步的方法的流程示意图。如图3所示，该方法包括：
步骤3010，接收来自标准以太网口或侧挂PTP引擎口的1588报文，并对报文进行解析，获得报文类型、vlan层数和端口属性等信息。
步骤3020，对于标准以太网口进来的PTP报文，基于port/port+vlan/sip获得入向PTP端口，对于侧挂PTP引擎进来的报文，直接获取出向PTP端口。
本示例中，PTP端口和物理端口可实现多对一或一对多。
步骤3030，根据获得的入向PTP端口获得入向PTP端口的属性信息。
本示例中，可以通过预先配置的PTP端口属性表，获得所述PTP端口的属性信息，包括：时钟节点模式、高精度模式和非高精度入口cf修改标记等。
本示例中，时钟节点模式即为时钟节点的配置类型，包括OC/BC/TC模式。
本示例中，非高精度入口cf修改标记可兼容板卡入口打时戳功能，从而提高时间精度，有效降低板卡和入芯片方向延时引起的精度损失；同时支持端口TC模式；可灵活基于PTP属性表或端口属性表实现tc模式配置。
由于TC模式并不支持高精度模式，因此，在OC/BC模式下的高精度模式时，会在一节点终结，而不需要确定出向PTP端口。即在入向PTP端口支持TC模式或由侧挂PTP引擎下发PTP报文(发送侧为OC/BC模式)的情况下，才执行下面步骤3040，在入向PTP端口不支持TC模式且不是由侧挂PTP引擎下发PTP报文的情况下，直接执行步骤3060。
步骤3040，基于预先配置的PTP端口属性表，获得出向PTP端口的属性信息。
本示例中，出向PTP端口的属性信息包括高精度模式、非高精度出口cf修改标记和非对称补偿值等信息。
本示例中，非高精度出口cf修改标记可兼容出向板卡打时戳功能，有效降低芯片出口到板卡之间的延时引起的精度损失；通过非对称补偿值可以有效解决芯片跨时钟、异步fifo以及串并转换链路延时不相等等问题引起的精度损失。
步骤3050，非高精度模式下，计算PTP报文的驻留时间。
本示例中，对于标准以太口进来的PTP报文，计算方法为出口的PTP时间减去入口的PTP时间，再加上配置的补偿值，最终获得PTP报文在芯片内部的驻留时间。对于侧挂PTP引擎进来的PTP报文，计算方法为出口的PTP时间减去根据报文中自带的入口时间信息，再加上配置的补偿值，最终获得PTP报文在芯片内部的驻留时间。
步骤3060，修改PTP报文的发送时间或修正域。
本示例中，修改发送时间是指在高精度模式下对报文的发送时间进行修改，修改修正域是指在非高精度模式下对PTP报文转发延时进行校正。
另外，还需要修改PTP报文对应udp_checksum字段，修改udp_checksum字段包括多种计算方式，可支持重算、清零及不修改模式。
本申请示例一、二提供的技术方案，基于PTP端口的属性信息，选择采用高精度模式或非高精度模式，即通过修改PTP报文的发送时间或修正域来实现对PTP报文的时钟同步。另外，对于非高精度模式兼容板卡打时戳功能。
实施例二
图4为本申请实施例二提供的一种时钟同步的系统的结构示意图。如图4所示，该系统包括：确定单元，设置为在接收到PTP报文的情况下，根据获得的PTP报文的PTP端口确定所述PTP端口的属性信息，所述属性信息包括以下至少之一：时钟节点配置类型、高精度模式或非高精度模式、非高精度入口cf修改标记或非高精度出口cf修改标记、非对称补偿值；时钟同步单元，设置为 根据所述PTP端口的属性信息对所述PTP报文进行时钟同步。
一实施例中，所述非高精度入口cf修改标记兼容板卡入口打时戳功能；和/或，非高精度出口cf修改标记兼容出向板卡打时戳功能。
一实施例中，该系统还包括：配置单元；所述配置单元，设置为在接收到PTP报文之前，预先配置PTP端口属性表，所述PTP端口属性表包括：至少一个PTP端口及所述至少一个PTP端口中每个PTP端口对应的属性信息。
一实施例中，所述确定单元包括：报文解析模块，设置为解析接收到的报文，得到所述报文的报文信息，所述报文信息包括以下至少之一：报文类型、端口属性、vlan层数；所述报文类型表示所述报文的类型为PTP报文类型或除所述PTP报文类型外的报文类型；所述端口属性表示所述报文对应的端口为二层端口或三层端口；所述vlan层数表示vlan的三种模式之一。
一实施例中，所述确定单元还包括：判断模块，设置为在所述报文类型为PTP报文类型的情况下，判断为接收到所述PTP报文。
一实施例中，所述确定单元还包括：入向PTP处理模块；所述入向PTP处理模块，设置为根据所述vlan层数获得所述PTP报文的入向PTP端口，根据所述PTP端口属性表确定所述入向PTP端口的属性信息。
一实施例中，所述确定单元还包括：L2/L3转发模块和出向PTP处理模块；所述L2/L3转发模块，设置为根据所述端口属性获得所述PTP报文的出向PTP端口；所述出向PTP处理模块，设置为根据所述PTP端口属性表确定所述出向PTP端口的属性信息。
一实施例中，所述入向PTP处理模块，还设置为在所述PTP报文通过标准以太口接收且无法获得所述PTP端口的情况下，默认所述PTP报文为非高精度模式。
一实施例中，时钟同步单元，是设置为以下之一：在所述入向PTP端口的时钟节点配置类型为OC或BC且为高精度模式的情况下，修改所述PTP报文的发送时间字段；在所述出向PTP端口的时钟节点配置类型为OC或BC或TC且为非高精度模式且所述出向PTP端口的非高精度出口cf修改标记已经开启的情况下，修改所述PTP报文的cf字段；在所述出向PTP端口为非高精度模式且所述出向PTP端口的非高精度出口cf修改标记没有开启的情况下，不修改所述PTP报文。
一实施例中，所述时钟同步单元，包括：驻留时间计算模块和PTP报文修改模块，所述驻留时间计算模块，设置为计算所述PTP报文的驻留时间；PTP报文修改模块，设置为根据所述驻留时间修改所述PTP报文的cf字段。
一实施例中，所述PTP报文修改模块，还设置为修改所述PTP报文的UDP校验和checksum字段。
下面通过示例三阐述上述实施例一、二提供的技术方案。
示例三
图5为本申请示例三提供的一种时钟同步的方法的流向示意图。如图5所示，该方法包括：
步骤5010，接收来自侧挂PTP引擎或标准以太网口的PTP报文，通过接口处理后送给报文解析模块，报文解析模块主要解析报文类型、端口属性和vlan层数等信息。
步骤5020，在入向PTP处理模块，对于标准以太口进来的PTP报文，通过port/port+vlan/sip三层获得入向PTP端口，并查找PTP端口属性表获得入向PTP端口的时钟节点配置类型、高精度模式和非高精度入口cf修改标记等属性信息；当没有获得入向PTP端口时，基于PTP报文的入向逻辑口获得非高精度入口模式。
本示例中，对于侧挂PTP引擎进来的PTP报文可以直接确定出向PTP端口，因此可直接执行步骤5040。
步骤5030，经过L2/L3转发模块获得PTP报文的出向PTP端口。
步骤5040，在出向PTP处理模块中，基于PTP端口属性表获得出向PTP端口的高精度模式、非高精度出口cf修改标记和非对称补偿值等属性信息。
步骤5050，在驻留时间计算模块，计算PTP报文的驻留时间，当入向对应的板卡开启cf修改，在驻留时间计算模块不考虑入口时戳；当出向对应的板卡开启cf修改，在驻留时间计算模块不考虑出口时戳。
步骤5060，在PTP报文修改模块，当入向PTP端口为高精度模式时，对PTP报文的发送时间字段进行修改；当出向PTP端口为为非高精度模式时，如果出向PTP端口的非高精度出口cf修改标记开启，对PTP报文的修正域字段进行修改；当没有配置修改模式时(入口和出口均未配置非高精度cf修改标记)对PTP报文不进行修改。
另外，对于L3 PTP报文，需要同时对udp_checksum字段进行修改。
本申请示例三提供的技术方案，PTP报文修改模块基于入向/出向PTP处理模块获得的PTP端口属性信息，选择采用高精度模式或非高精度模式，即通过修改报文发送时间或修正域实现时钟同步。如此，对于不同接口可以同时支持高精度模式和非高精度模式，适合实际中非高精度时钟同步和高精度时钟同步 交织的复杂场景，并对于非高精度模式兼容板卡打时戳功能。
本申请实施例还提供了一种时钟同步的设备，包括存储器、处理器及存储在所述存储器上并可在所述处理器上运行的计算机程序，所述计算机程序被所述处理器执行时实现上述的时钟同步的方法。
本申请实施例还提供了一种计算机可读存储介质，所述计算机可读存储介质上存储有信息处理程序，所述信息处理程序被处理器执行时实现上述任一项所述时钟同步方法。
上文中所公开方法中的全部或一些步骤、系统、装置中的功能模块/单元可以被实施为软件、固件、硬件及适当的组合。在硬件实施方式中，在以上描述中提及的功能模块/单元之间的划分不一定对应于物理组件的划分。例如，一个物理组件可以具有多个功能，或者一个功能或步骤可以由多个物理组件合作执行。一些组件或所有组件可以被实施为由处理器，如数字信号处理器或微处理器执行的软件，或者被实施为硬件，或者被实施为集成电路，如专用集成电路。这样的软件可以分布在计算机可读介质上，计算机可读介质可以包括计算机存储介质(或非暂时性介质)和通信介质(或暂时性介质)。术语计算机存储介质包括在用于存储信息(诸如计算机可读指令、数据结构、程序模块或其他数据)的任何方法或技术中实施的易失性和非易失性、可移除和不可移除介质。计算机存储介质包括但不限于随机存取存储器(Random Access Memory，RAM)、只读存储器(Read-Only Memory，ROM)、带电可擦可编程只读存储器(Electrically Erasable Programmable Read-Only Memory，EEPROM)、闪存或其他存储器技术、光盘只读存储器(Compact Disc Read-Only Memory，CD-ROM)、数字多功能盘(Digital Video Disc，DVD)或其他光盘存储、磁盒、磁带、磁盘存储或其他磁存储装置、或者可以设置为存储期望的信息并且可以被计算机访问的任何其他的介质。此外，通信介质通常包含计算机可读指令、数据结构、程序模块或者诸如载波或其他传输机制之类的调制数据信号中的其他数据，并且可包括任何信息递送介质。

Claims (14)

  1. 一种时钟同步的方法，包括：
    在接收到精确时钟协议PTP报文的情况下，根据获得的所述PTP报文的PTP端口确定所述PTP端口的属性信息，所述属性信息包括以下至少之一：时钟节点配置类型、高精度模式或非高精度模式、非高精度入口修正域cf修改标记或非高精度出口cf修改标记、非对称补偿值；
    根据所述PTP端口的属性信息对所述PTP报文进行时钟同步。
  2. 根据权利要求1所述的方法，还包括：
    配置PTP端口属性表，所述PTP端口属性表包括：至少一个PTP端口及所述至少一个PTP端口中每个PTP端口对应的属性信息。
  3. 根据权利要求1或2所述的方法，还包括：
    解析接收到的报文，得到所述报文的报文信息，所述报文信息包括以下至少之一：报文类型、端口属性、虚拟局域网vlan层数；
    其中，所述报文类型表示所述报文的类型为PTP报文类型或除所述PTP报文类型外的报文类型；所述端口属性表示所述报文对应的端口为二层端口或三层端口；所述vlan层数表示vlan的三种模式之一。
  4. 根据权利要求3所述的方法，在所述解析接收到的报文，得到所述报文的报文信息之后，还包括：
    在所述报文类型为PTP报文类型的情况下，判断为接收到所述PTP报文。
  5. 根据权利要求3所述的方法，其中，所述根据获得的所述PTP报文的PTP端口确定所述PTP端口的属性信息，包括以下至少之一：
    根据所述vlan层数获得所述PTP报文的入向PTP端口，根据所述PTP端口属性表确定所述入向PTP端口的属性信息；
    根据所述端口属性获得所述PTP报文的出向PTP端口，根据所述PTP端口属性表确定所述出向PTP端口的属性信息。
  6. 根据权利要求5所述的方法，还包括：
    在通过标准以太口接收所述PTP报文且无法获得所述入口PTP端口的情况下，默认所述PTP报文为非高精度模式。
  7. 根据权利要求5所述的方法，其中，所述根据所述PTP端口的属性信息对所述PTP报文进行时钟同步，包括：
    在所述入向PTP端口为高精度模式的情况下，修改所述PTP报文的发送时间字段。
  8. 根据权利要求5所述的方法，其中，所述根据所述PTP端口的属性信息对所述PTP报文进行时钟同步，包括：
    在所述出向PTP端口为非高精度模式且所述出向PTP端口的非高精度出口cf修改标记开启的情况下，修改所述PTP报文的cf字段；
    在所述出向PTP端口为非高精度模式且所述出向PTP端口的非高精度出口cf修改标记没有开启的情况下，不修改所述PTP报文。
  9. 根据权利要求8所述的方法，其中，所述修改所述PTP报文的cf字段，包括：
    计算所述PTP报文的驻留时间，根据所述驻留时间修改所述PTP报文的cf字段。
  10. 根据权利要求8所述的方法，还包括：
    修改所述PTP报文的用户数据报协议UDP校验和总和检验码checksum字段。
  11. 一种时钟同步的系统，包括：
    确定单元，设置为在接收到精确时钟协议PTP报文的情况下，根据获得的所述PTP报文的PTP端口确定所述PTP端口的属性信息，所述属性信息包括以下至少之一：时钟节点配置类型、高精度模式或非高精度模式、非高精度入口修正域cf修改标记或非高精度出口cf修改标记、非对称补偿值；
    时钟同步单元，设置为根据所述PTP端口的属性信息对所述PTP报文进行时钟同步。
  12. 根据权利要求11所述的系统，其中，满足以下至少之一：
    所述非高精度入口cf修改标记兼容板卡入口打时戳功能；
    所述非高精度出口cf修改标记兼容出向板卡打时戳功能。
  13. 一种时钟同步的设备，包括存储器、处理器及存储在所述存储器上并可在所述处理器上运行的计算机程序，所述计算机程序被所述处理器执行时实现如权利要求1至10中任一项所述的时钟同步的方法。
  14. 一种计算机可读存储介质，存储有信息处理程序，所述信息处理程序被处理器执行时实现如权利要求1至10中任一项所述时钟同步方法。
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