WO2020113753A1 - Oled 像素驱动电路及显示面板 - Google Patents

Oled 像素驱动电路及显示面板 Download PDF

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Publication number
WO2020113753A1
WO2020113753A1 PCT/CN2019/070241 CN2019070241W WO2020113753A1 WO 2020113753 A1 WO2020113753 A1 WO 2020113753A1 CN 2019070241 W CN2019070241 W CN 2019070241W WO 2020113753 A1 WO2020113753 A1 WO 2020113753A1
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Prior art keywords
transistor
terminal
coupled
control
thin film
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PCT/CN2019/070241
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English (en)
French (fr)
Inventor
陈彩琴
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Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Priority to US16/342,548 priority Critical patent/US11158251B1/en
Publication of WO2020113753A1 publication Critical patent/WO2020113753A1/zh
Anticipated expiration legal-status Critical
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G09G2310/0254—Control of polarity reversal in general, other than for liquid crystal displays
    • G09G2310/0256—Control of polarity reversal in general, other than for liquid crystal displays with the purpose of reversing the voltage across a light emitting or modulating element within a pixel
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0223—Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0238—Improving the black level
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0252—Improving the response speed
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6741—Group IV materials, e.g. germanium or silicon carbide
    • H10D30/6743—Silicon
    • H10D30/6745—Polycrystalline or microcrystalline silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6755—Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/421—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer
    • H10D86/423—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/471—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having different architectures, e.g. having both top-gate and bottom-gate TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices

Definitions

  • the invention relates to a display technology, in particular to an OLED pixel driving circuit and a display panel.
  • Organic light emitting diode (Organic Light Emitting Display, OLED) display panel has the advantages of self-luminous, low driving voltage, high luminous efficiency, short response time and flexible display, etc. It has become the most promising display panel.
  • OLED display panels can be divided into passive matrix OLED (Passive Matrix OLED, PMOLED) and active matrix OLED (Active Matrix OLED, AMOLED) according to the driving method.
  • each pixel has a capacitor for storing data, so that each pixel can maintain a light-emitting state.
  • the pixel driving circuit of the existing AMOLED display panel usually uses a plurality of transistors and a capacitor to drive an organic light emitting diode.
  • the existing 7T1C pixel drive circuit includes transistors T1 ⁇ T7, a capacitor C1, and an organic light-emitting diode D.
  • the existing 7T1C pixel drive circuit uses Scan[n-1], Scan[n], Six control signals (as shown in Figure 2), such as XScan[n], EM, Vi and Vdd, operate.
  • the working phase can usually be divided into preparation phase (t1), compensation phase (t2) and display phase (t3).
  • this period of time is for transistors that are turned on at the t3 stage (such as T1, T5, T6). The words are very long and will affect the display effect of the OLED display panel.
  • the present invention provides an OLED pixel driving circuit to solve the problem in the prior art that the display effect is affected by the gate driving time at the display stage.
  • An aspect of the present invention is to provide an OLED pixel driving circuit, including: a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, and a seventh transistor , A capacitor and an organic light emitting diode, the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor and the seventh transistor Each has a control terminal, a first terminal and a second terminal; wherein, the control terminal of the first transistor is coupled to one end of the capacitor, the first terminal of the third transistor and the fourth transistor The first end, the first end of the first transistor is coupled to the second end of the second transistor and the first end of the fifth transistor, the second end of the first transistor is coupled to the The second terminal and the first terminal of the sixth transistor, the control terminal of the second transistor is coupled to the control terminal of the third transistor and a local scanning terminal, and the first terminal of the second transistor is coupled to a data Terminal, the control terminal of the fourth transistor is coupled to the second terminal of the fourth transistor and
  • the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, and the seventh transistor are low-temperature polysilicon One of a thin film transistor, an oxide semiconductor thin film transistor, or an amorphous silicon thin film transistor.
  • Another aspect of the present invention is to provide an OLED pixel driving circuit, including: a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a first Seven transistors, a capacitor and an organic light emitting diode, the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor and the first The seven transistors respectively have a control terminal, a first terminal and a second terminal; wherein, the control terminal of the first transistor is coupled to one terminal of the capacitor, the first terminal of the third transistor and the fourth terminal The first end of the transistor, the first end of the first transistor is coupled to the second end of the second transistor and the first end of the fifth transistor, the second end of the first transistor is coupled to the third The second terminal of the transistor and the first terminal of the sixth transistor, the control terminal of the second transistor is coupled to the control terminal of the third transistor and a local scanning terminal, and the first terminal of the second transistor is coupled A data terminal, the control terminal of the fourth transistor is coupled to
  • the second terminal of the fourth transistor and the second terminal of the seventh transistor are not connected to each other.
  • the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, and the seventh transistor are P-type Thin film transistor.
  • the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, and the seventh transistor are low-temperature polysilicon One of a thin film transistor, an oxide semiconductor thin film transistor, or an amorphous silicon thin film transistor.
  • Another aspect of the present invention is to provide a display panel, which includes: a plurality of OLED pixel driving circuits as described above.
  • the OLED pixel driving circuit and the display panel of the present invention are short-circuited through the control terminal of the fourth transistor and the second terminal, and the control terminal of the seventh transistor is short-circuited with the second terminal.
  • the second terminal of the fourth transistor and the second terminal of the seventh transistor are not connected to each other. Therefore, the charging time of the capacitor can be greatly shortened, and the gate driving capability of the first transistor is stronger.
  • FIG. 1 is a schematic diagram of a conventional 7T1C pixel driving circuit.
  • FIG. 2 is a schematic diagram of the control signal timing of the circuit in FIG. 1.
  • FIG. 3 is a schematic diagram of an OLED pixel driving circuit according to an embodiment of the invention.
  • an OLED pixel driving circuit can be used in an AMOLED pixel driving configuration.
  • the OLED pixel driving circuit includes: a first transistor T1, a second transistor T2, a The third transistor T3, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, a seventh transistor T7, a capacitor C1 and an organic light emitting diode D, the first transistor T1, the second The transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, and the seventh transistor T7 have a control terminal, a first terminal, and a first The two terminals, for example, the control terminal may be the gate of the thin film transistor, and the first terminal and the second terminal may be one of the source or the drain of the thin film transistor.
  • the control end of the first transistor T1 is coupled to one end of the capacitor C1, the first end of the third transistor T3 and the first end of the fourth transistor T4, and the first end of the first transistor T1 One end is coupled to the second end of the second transistor T2 and the first end of the fifth transistor T5, and the second end of the first transistor T1 is coupled to the second end of the third transistor T3 and the sixth transistor
  • the first terminal of T6, the control terminal of the second transistor T2 is coupled to the control terminal of the third transistor T3 and a scanning terminal of the current stage (nth stage), for example, n can be a positive integer, used to represent the stage One of the connected multi-level signals.
  • the current (nth level) scan terminal is used to input the Scan[n] signal.
  • the first terminal of the second transistor T2 is coupled to a data terminal.
  • the data terminal is With the input of the Vdata signal, the control terminal of the fourth transistor T4 is coupled to the second terminal of the fourth transistor T4 and a scanning terminal of the previous stage (n-1th stage), the previous stage (n-1th stage) )
  • the scan terminal is used to input the Scan[n-1] signal.
  • the control terminal of the fifth transistor T5 is coupled to the control terminal of the sixth transistor T6 and a light-emitting pulse terminal.
  • the light-emitting pulse terminal is used to input an EM signal.
  • the second end of the fifth transistor T5 is coupled to the other end of the capacitor C1 and a positive electrical terminal, the positive electrical terminal is used to input a Vdd signal, and the second end of the sixth transistor T6 is coupled to the The first terminal of the seventh transistor T7 and an anode terminal of the organic light emitting diode D, the control terminal of the seventh transistor T7 is coupled to the second terminal of the seventh transistor T7 and the n-th scanning terminal , A cathode end of the organic light emitting diode D is grounded. Specifically, the second terminal of the fourth transistor T4 and the second terminal of the seventh transistor T7 are not connected to each other.
  • the organic light emitting diode D can be configured to emit red, green, and blue light according to actual needs;
  • the Scan[n-1] signal and Scan[n] signal are from GOA (Gate Driver on Array)
  • the EM signal is a light-emitting pulse signal used to control the organic light-emitting diode D to emit light;
  • the Vdd signal is a DC constant voltage positive electrical signal, which can be used as The working power of the OLED pixel driving circuit is characterized by those skilled in the art, and will not be described here.
  • the seventh transistor T7 is a P-type thin film transistor, for example, one of a low temperature polysilicon thin film transistor, an oxide semiconductor thin film transistor, or an amorphous silicon thin film transistor, but it is not limited thereto.
  • the OLED pixel driving circuit of the present invention belongs to a novel 7T1C pixel driving circuit. Compared with the existing 7T1C pixel driving circuit, the existing 7T1C pixel driving circuit requires Scan[n-1], Scan [n], XScan[n], EM, Vi and Vdd and other 6 control signals (as shown in FIG.
  • the OLED pixel driving circuit of the present invention only needs Scan[n-1], Scan[n], EM and 4 control signals, such as Vdd, can perform the preparation phase (t1), compensation phase (t2) and display phase (t3) and other working phases without the XScan[n] and Vi signals required by the existing technology (as shown in Figure 2) ), the operation of the OLED pixel driving circuit of the present invention is illustrated as follows.
  • the Scan[n-1] signal is at a low potential
  • the fourth transistor T4 is turned on, and the potential at point a is turned to a low potential
  • the capacitor C1 is charged.
  • the Scan[n] signal is low
  • the transistors T2, T3, and T7 are turned on, and the gate-drain of the transistor T1 is shorted.
  • the transistor T1 is like a diode
  • the transistor T1 is turned on until the potential at point A becomes Vdata-
  • the EM signal is at a low potential
  • the fifth transistor T5 and the sixth transistor T6 are turned on
  • Vgs Vdd-(Vdata-
  • ) of the first transistor T1 at this time, after the first
  • Current flows through the organic light emitting diode D to emit light, for example, red, blue, green light, etc.
  • the low potential of the Scan[n] signal from the GOA circuit is about -9 volts (V).
  • Another aspect of the present invention may further include a display panel, which may include several OLED pixel driving circuits as described above.
  • the OLED pixel driving circuit and the display panel of the present invention pass the control terminal (such as the gate of the thin film transistor) and the second terminal (such as the source of the thin film transistor) of the fourth transistor T4 Short-circuited, the control terminal (such as the gate of the thin film transistor) of the seventh transistor T7 is short-circuited with the second terminal (such as the source of the thin film transistor), and the second terminal of the fourth transistor T4 is connected to the The second terminals of the seventh transistor T7 are not connected to each other. Therefore, the charging time of the capacitor C1 can be greatly shortened, and the gate driving capability of the first transistor T1 is stronger.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Geometry (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electroluminescent Light Sources (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of El Displays (AREA)

Abstract

一种OLED像素驱动电路及显示面板，所述OLED像素驱动电路由一第一晶体管、一第二晶体管、一第三晶体管、一第四晶体管、一第五晶体管、一第六晶体管、一第七晶体管、一电容器及一有机发光二极管构成一7T1C型式的像素驱动电路，所述第一晶体管、所述第二晶体管、所述第三晶体管、所述第四晶体管、所述第五晶体管、所述第六晶体管及所述第七晶体管分别具有一控制端、一第一端及一第二端，所述第七晶体管的控制端与第二端耦接，所述第四晶体管的控制端与第二端耦接，所述第四晶体管的第二端与所述第七晶体管的第二端互不连接。

Description

OLED像素驱动电路及显示面板 技术领域
本发明是有关于一种显示技术，特别是有关于一种OLED像素驱动电路及显示面板。
 背景技术
有机发光二极管(Organic Light Emitting Display，OLED)显示面板具有自发光、驱动电压低、发光效率高、响应时间短及可柔性显示等优点，已成为最有发展潜力的显示面板。
OLED显示面板依驱动方式，可分为被动矩阵OLED (Passive Matrix OLED，PMOLED)及主动矩阵OLED(Active Matrix OLED，AMOLED)两种，其中，AMOLED显示面板的耗电量明显小于PMOLED显示面板，在AMOLED显示面板的像素阵列中，每一像素都有一电容，用于存储数据，让每一像素能维持在发光状态。其中，现有的AMOLED显示面板的像素驱动电路通常以多个晶体管搭配一个电容器驱动一有机发光二极管。
如图1及图2所示，现有的7T1C像素驱动电路包括晶体管T1~T7、电容器C1及有机发光二极管D，现有的7T1C像素驱动电路利用Scan[n-1]、Scan[n]、XScan[n]、EM、Vi及Vdd等6个控制信号(如图2所示)进行运作，其工作阶段通常可分为准备阶段(t1)、补偿阶段(t2)及显示阶段(t3)。其中，以WQHD解析度(1440*2960 18.5:9)的面板为例，栅极扫描频率为60Hz，也就是栅极驱动时间在t1或t2阶段为1/60/(1440+T blank)约为6μs，但t3=1/60-t1-t2，即t3阶段的栅极驱动时间约为16.7毫秒(ms)，但是，这段时间对在t3阶段打开的晶体管(如T1、T5、T6)而言是非常长的，将会影响OLED显示面板的显示效果。
因此，现有技术存在缺陷，急需改进。
 技术问题
本发明提供一种OLED像素驱动电路，以解决现有技术所存在显示效果受到显示阶段的栅极驱动时间影响的问题。
 技术解决方案
本发明的一个方面在于提供一种OLED像素驱动电路，包括：一第一晶体管、一第二晶体管、一第三晶体管、一第四晶体管、一第五晶体管、一第六晶体管、一第七晶体管、一电容器及一有机发光二极管，所述第一晶体管、所述第二晶体管、所述第三晶体管、所述第四晶体管、所述第五晶体管、所述第六晶体管及所述第七晶体管分别具有一控制端、一第一端及一第二端；其中，所述第一晶体管的控制端耦接所述电容器的一端、所述第三晶体管的第一端及所述第四晶体管的第一端，所述第一晶体管的第一端耦接所述第二晶体管的第二端及所述第五晶体管的第一端，所述第一晶体管的第二端耦接第三晶体管的第二端及第六晶体管的第一端，所述第二晶体管的控制端耦接所述第三晶体管的控制端及一本级扫描端，所述第二晶体管的第一端耦接一数据端，所述第四晶体管的控制端耦接所述第四晶体管的第二端及一前级扫描端，所述第五晶体管的控制端耦接所述第六晶体管的控制端及一发光脉冲端，所述第五晶体管的第二端耦接所述电容器的另一端及一正电端，所述第六晶体管的第二端耦接所述第七晶体管的第一端及所述有机发光二极管的一阳极端，所述第七晶体管的控制端耦接所述第七晶体管的第二端及所述本级扫描端，所述有机发光二极管的一阴极端接地；所述第四晶体管的第二端与所述第七晶体管的第二端互不连接；及所述第一晶体管、所述第二晶体管、所述第三晶体管、所述第四晶体管、所述第五晶体管、所述第六晶体管及所述第七晶体管为P型薄膜晶体管。
在一些实施例中，所述第一晶体管、所述第二晶体管、所述第三晶体管、所述第四晶体管、所述第五晶体管、所述第六晶体管及所述第七晶体管为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管或非晶硅薄膜晶体管中的一种。
本发明的另一个方面在于提供一种OLED像素驱动电路，其包括：一第一晶体管、一第二晶体管、一第三晶体管、一第四晶体管、一第五晶体管、一第六晶体管、一第七晶体管、一电容器及一有机发光二极管，所述第一晶体管、所述第二晶体管、所述第三晶体管、所述第四晶体管、所述第五晶体管、所述第六晶体管及所述第七晶体管分别具有一控制端、一第一端及一第二端；其中，所述第一晶体管的控制端耦接所述电容器的一端、所述第三晶体管的第一端及所述第四晶体管的第一端，所述第一晶体管的第一端耦接所述第二晶体管的第二端及所述第五晶体管的第一端，所述第一晶体管的第二端耦接第三晶体管的第二端及第六晶体管的第一端，所述第二晶体管的控制端耦接所述第三晶体管的控制端及一本级扫描端，所述第二晶体管的第一端耦接一数据端，所述第四晶体管的控制端耦接所述第四晶体管的第二端及一前级扫描端，所述第五晶体管的控制端耦接所述第六晶体管的控制端及一发光脉冲端，所述第五晶体管的第二端耦接所述电容器的另一端及一正电端，所述第六晶体管的第二端耦接所述第七晶体管的第一端及所述有机发光二极管的一阳极端，所述第七晶体管的控制端耦接所述第七晶体管的第二端及所述本级扫描端，所述有机发光二极管的一阴极端接地。
在一些实施例中，所述第四晶体管的第二端与所述第七晶体管的第二端互不连接。
在一些实施例中，所述第一晶体管、所述第二晶体管、所述第三晶体管、所述第四晶体管、所述第五晶体管、所述第六晶体管及所述第七晶体管为P型薄膜晶体管。
在一些实施例中，所述第一晶体管、所述第二晶体管、所述第三晶体管、所述第四晶体管、所述第五晶体管、所述第六晶体管及所述第七晶体管为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管或非晶硅薄膜晶体管中的一种。
本发明的另一个方面在于提供一种显示面板，其包括：数个如上所述的OLED像素驱动电路。
 有益效果
与现有技术相比较，本发明的OLED像素驱动电路及显示面板，通过所述第四晶体管的控制端与第二端短接，所述第七晶体管的控制端与第二端短接，所述第四晶体管的第二端与所述第七晶体管的第二端互不连接。从而，使所述电容器充电时间可大幅缩短，且所述第一晶体管的栅级驱动能力更强。
 附图说明
图1是一现有的7T1C像素驱动电路的示意图。
图2是图1中的电路的控制信号时序示意图。
图3是本发明一实施例的OLED像素驱动电路的示意图。
 本发明的最佳实施方式
以下各实施例的说明是参考附加的图式，用以例示本发明可用以实施的特定实施例。再者，本发明所提到的方向用语，例如上、下、顶、底、前、后、左、右、内、外、侧面、周围、中央、水平、横向、垂直、纵向、轴向、径向、最上层或最下层等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本发明，而非用以限制本发明。
请参照图3所示，本发明一实施例的OLED像素驱动电路可以用于一AMOLED像素驱动配置(configuration)，所述OLED像素驱动电路包括：一第一晶体管T1、一第二晶体管T2、一第三晶体管T3、一第四晶体管T4、一第五晶体管T5、一第六晶体管T6、一第七晶体管T7、一电容器C1及一有机发光二极管D，所述第一晶体管T1、所述第二晶体管T2、所述第三晶体管T3、所述第四晶体管T4、所述第五晶体管T5、所述第六晶体管T6及所述第七晶体管T7分别具有一控制端、一第一端及一第二端，例如：所述控制端可为薄膜晶体管的栅极，所述第一端、第二端可为薄膜晶体管的源极或漏极中的一个。
其中，所述第一晶体管T1的控制端耦接所述电容器C1的一端、所述第三晶体管T3的第一端及所述第四晶体管T4的第一端，所述第一晶体管T1的第一端耦接所述第二晶体管T2的第二端及所述第五晶体管T5的第一端，所述第一晶体管T1的第二端耦接第三晶体管T3的第二端及第六晶体管T6的第一端，所述第二晶体管T2的控制端耦接所述第三晶体管T3的控制端及一本级(第n级)扫描端，例如n可为一正整数，用以代表级联的多级信号中的一个，所述本级(第n级)扫描端用以输入Scan[n]信号，所述第二晶体管T2的第一端耦接一数据端，所述数据端用以输入Vdata信号，所述第四晶体管T4的控制端耦接所述第四晶体管T4的第二端及一前级(第n-1级)扫描端，所述前级(第n-1级)扫描端用以输入Scan[n-1]信号，所述第五晶体管T5的控制端耦接所述第六晶体管T6的控制端及一发光脉冲端，所述发光脉冲端用以输入EM信号，所述第五晶体管T5的第二端耦接所述电容器C1的另一端及一正电端，所述正电端用以输入Vdd信号，所述第六晶体管T6的第二端耦接所述第七晶体管T7的第一端及所述有机发光二极管D的一阳极端，所述第七晶体管T7的控制端耦接所述第七晶体管T7的第二端及所述第n级扫描端，所述有机发光二极管D的一阴极端接地。具体地，所述第四晶体管T4的第二端与所述第七晶体管T7的第二端互不连接。
可被理解的是，所述有机发光二极管D依实际需求可以被配置成发出红、绿、蓝光；所述Scan[n-1]信号、Scan[n]信号为来自GOA(Gate Driver on Array)的第n-1级、第n级的扫描信号；所述EM信号为用于控制所述有机发光二极管D发光的发光脉冲信号；所述Vdd信号为一直流恒压正电信号，可用于作为OLED像素驱动电路的工作电源，其特征是本领域技术人员可以理解的，不再赘述于此。
在一些实施例中，所述第一晶体管T1、所述第二晶体管T2、所述第三晶体管T3、所述第四晶体管T4、所述第五晶体管T5、所述第六晶体管T6及所述第七晶体管T7为P型薄膜晶体管，例如：低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管或非晶硅薄膜晶体管中的一种，但不以此为限。
请再参阅图3，本发明的OLED像素驱动电路属于一种新颖的7T1C像素驱动电路，与现有的7T1C像素驱动电路相较，现有的7T1C像素驱动电路需要Scan[n-1]、Scan[n]、XScan[n]、EM、Vi及Vdd等6个控制信号(如图2所示)，本发明的OLED像素驱动电路只需要Scan[n-1]、Scan[n]、EM及Vdd等4个控制信号，无需现有技术所需的XScan[n]及Vi信号，即可进行准备阶段(t1)、补偿阶段(t2)及显示阶段(t3)等工作阶段(如图2所示)，本发明的OLED像素驱动电路的运作方式举例说明如下。
举例而言，如图3所示，在t1阶段，Scan[n-1]信号为低电位，所述第四晶体管T4打开，将a点电位变成低电位，所述电容器C1进行充电。在t2阶段，Scan[n]信号为低电位，晶体管T2、T3、T7打开，晶体管T1的栅漏短接(short)，在a点电位|Va|>|Vth|时，即晶体管T1如同二极管，晶体管T1打开，直到A点电位变成Vdata-|Vth|而截止；另外，晶体管T7打开，有机发光二极管D复位。在t3阶段，EM信号为低电位，所述第五晶体管T5及第六晶体管T6打开，所述第一晶体管T1的Vgs=Vdd-(Vdata-|Vth|)，此时，经过所述第一晶体管T1的电流为：Ids=(1/2)·K·[Vdd-(Vdata-|Vth|)-|Vth|]^2=(1/2)·K·(Vdd-Vdata)^2，K=Cox·μ·W/L。电流流过所述有机发光二极管D而发光，例如：红、蓝、绿光等。具体地，来自GOA电路的Scan[n]信号的低电位约为-9伏特(V)。
本发明的另一方面还可包括一种显示面板，所述显示面板可包括数个如上所述的OLED像素驱动电路。
与现有技术相较，本发明的OLED像素驱动电路及显示面板，通过所述第四晶体管T4的控制端(如薄膜电晶体的栅极)与第二端(如薄膜电晶体的源极)短接，所述第七晶体管T7的控制端(如薄膜电晶体的栅极)与第二端(如薄膜电晶体的源极)短接，所述第四晶体管T4的第二端与所述第七晶体管T7的第二端互不连接。从而，使所述电容器C1充电时间可大幅缩短，且所述第一晶体管T1的栅级驱动能力更强。
本发明已由上述相关实施例加以描述，然而上述实施例仅为实施本发明的范例。必需指出的是，已公开的实施例并未限制本发明的范围。相反地，包含于权利要求书的精神及范围的修改及均等设置均包括于本发明的范围内。

Claims (10)

  1. 一种OLED像素驱动电路，其包括：
    一第一晶体管、一第二晶体管、一第三晶体管、一第四晶体管、一第五晶体管、一第六晶体管、一第七晶体管、一电容器及一有机发光二极管，所述第一晶体管、所述第二晶体管、所述第三晶体管、所述第四晶体管、所述第五晶体管、所述第六晶体管及所述第七晶体管分别具有一控制端、一第一端及一第二端；
    其中，所述第一晶体管的控制端耦接所述电容器的一端、所述第三晶体管的第一端及所述第四晶体管的第一端，所述第一晶体管的第一端耦接所述第二晶体管的第二端及所述第五晶体管的第一端，所述第一晶体管的第二端耦接第三晶体管的第二端及第六晶体管的第一端，所述第二晶体管的控制端耦接所述第三晶体管的控制端及一本级扫描端，所述第二晶体管的第一端耦接一数据端，所述第四晶体管的控制端耦接所述第四晶体管的第二端及一前级扫描端，所述第五晶体管的控制端耦接所述第六晶体管的控制端及一发光脉冲端，所述第五晶体管的第二端耦接所述电容器的另一端及一正电端，所述第六晶体管的第二端耦接所述第七晶体管的第一端及所述有机发光二极管的一阳极端，所述第七晶体管的控制端耦接所述第七晶体管的第二端及所述本级扫描端，所述有机发光二极管的一阴极端接地；
    所述第四晶体管的第二端与所述第七晶体管的第二端互不连接；及
    所述第一晶体管、所述第二晶体管、所述第三晶体管、所述第四晶体管、所述第五晶体管、所述第六晶体管及所述第七晶体管为P型薄膜晶体管。
  2. 如权利要求1所述的OLED像素驱动电路，其中，所述第一晶体管、所述第二晶体管、所述第三晶体管、所述第四晶体管、所述第五晶体管、所述第六晶体管及所述第七晶体管为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管或非晶硅薄膜晶体管中的一种。
  3. 一种OLED像素驱动电路，其包括：
    一第一晶体管、一第二晶体管、一第三晶体管、一第四晶体管、一第五晶体管、一第六晶体管、一第七晶体管、一电容器及一有机发光二极管，所述第一晶体管、所述第二晶体管、所述第三晶体管、所述第四晶体管、所述第五晶体管、所述第六晶体管及所述第七晶体管分别具有一控制端、一第一端及一第二端；
    其中，所述第一晶体管的控制端耦接所述电容器的一端、所述第三晶体管的第一端及所述第四晶体管的第一端，所述第一晶体管的第一端耦接所述第二晶体管的第二端及所述第五晶体管的第一端，所述第一晶体管的第二端耦接第三晶体管的第二端及第六晶体管的第一端，所述第二晶体管的控制端耦接所述第三晶体管的控制端及一本级扫描端，所述第二晶体管的第一端耦接一数据端，所述第四晶体管的控制端耦接所述第四晶体管的第二端及一前级扫描端，所述第五晶体管的控制端耦接所述第六晶体管的控制端及一发光脉冲端，所述第五晶体管的第二端耦接所述电容器的另一端及一正电端，所述第六晶体管的第二端耦接所述第七晶体管的第一端及所述有机发光二极管的一阳极端，所述第七晶体管的控制端耦接所述第七晶体管的第二端及所述本级扫描端，所述有机发光二极管的一阴极端接地。
  4. 如权利要求3所述的OLED像素驱动电路，其中，所述第四晶体管的第二端与所述第七晶体管的第二端互不连接。
  5. 如权利要求3所述的OLED像素驱动电路，其中，所述第一晶体管、所述第二晶体管、所述第三晶体管、所述第四晶体管、所述第五晶体管、所述第六晶体管及所述第七晶体管为P型薄膜晶体管。
  6. 如权利要求5所述的OLED像素驱动电路，其中，所述第一晶体管、所述第二晶体管、所述第三晶体管、所述第四晶体管、所述第五晶体管、所述第六晶体管及所述第七晶体管为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管或非晶硅薄膜晶体管中的一种。
  7. 一种显示面板，其包括：数个OLED像素驱动电路，每个OLED像素驱动电路包括：
    一第一晶体管、一第二晶体管、一第三晶体管、一第四晶体管、一第五晶体管、一第六晶体管、一第七晶体管、一电容器及一有机发光二极管，所述第一晶体管、所述第二晶体管、所述第三晶体管、所述第四晶体管、所述第五晶体管、所述第六晶体管及所述第七晶体管分别具有一控制端、一第一端及一第二端；
    其中，所述第一晶体管的控制端耦接所述电容器的一端、所述第三晶体管的第一端及所述第四晶体管的第一端，所述第一晶体管的第一端耦接所述第二晶体管的第二端及所述第五晶体管的第一端，所述第一晶体管的第二端耦接第三晶体管的第二端及第六晶体管的第一端，所述第二晶体管的控制端耦接所述第三晶体管的控制端及一本级扫描端，所述第二晶体管的第一端耦接一数据端，所述第四晶体管的控制端耦接所述第四晶体管的第二端及一前级扫描端，所述第五晶体管的控制端耦接所述第六晶体管的控制端及一发光脉冲端，所述第五晶体管的第二端耦接所述电容器的另一端及一正电端，所述第六晶体管的第二端耦接所述第七晶体管的第一端及所述有机发光二极管的一阳极端，所述第七晶体管的控制端耦接所述第七晶体管的第二端及所述本级扫描端，所述有机发光二极管的一阴极端接地。
  8. 如权利要求7所述的显示面板，其中，所述第四晶体管的第二端与所述第七晶体管的第二端互不连接。
  9. 如权利要求7所述的显示面板，其中，所述第一晶体管、所述第二晶体管、所述第三晶体管、所述第四晶体管、所述第五晶体管、所述第六晶体管及所述第七晶体管为P型薄膜晶体管。
  10. 如权利要求9所述的显示面板，其中，所述第一晶体管、所述第二晶体管、所述第三晶体管、所述第四晶体管、所述第五晶体管、所述第六晶体管及所述第七晶体管为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管或非晶硅薄膜晶体管中的一种。
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