WO2020103197A1 - 叠瓦电池片和叠瓦光伏组件的制造方法和系统 - Google Patents

叠瓦电池片和叠瓦光伏组件的制造方法和系统

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Publication number
WO2020103197A1
WO2020103197A1 PCT/CN2018/119526 CN2018119526W WO2020103197A1 WO 2020103197 A1 WO2020103197 A1 WO 2020103197A1 CN 2018119526 W CN2018119526 W CN 2018119526W WO 2020103197 A1 WO2020103197 A1 WO 2020103197A1
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WIPO (PCT)
Prior art keywords
silicon wafer
equipment
shingled
silicon
cutting
Prior art date
Application number
PCT/CN2018/119526
Other languages
English (en)
French (fr)
Inventor
孙俊
尹丙伟
丁士引
周福深
Original Assignee
成都晔凡科技有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from CN201811410350.XA external-priority patent/CN111223958B/zh
Application filed by 成都晔凡科技有限公司 filed Critical 成都晔凡科技有限公司
Priority to AU2018409644A priority Critical patent/AU2018409644C1/en
Priority to EP18899028.7A priority patent/EP3686940A1/en
Priority to JP2019530094A priority patent/JP6985393B2/ja
Priority to KR1020197015897A priority patent/KR20200064028A/ko
Priority to PCT/CN2018/119526 priority patent/WO2020103197A1/zh
Priority to KR1020207007978A priority patent/KR102425420B1/ko
Priority to US16/553,111 priority patent/US10825742B2/en
Publication of WO2020103197A1 publication Critical patent/WO2020103197A1/zh
Priority to US17/039,905 priority patent/US10991633B2/en
Priority to US17/039,917 priority patent/US10991634B2/en

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Definitions

  • the invention relates to the field of manufacturing and application of solar crystalline silicon shingled battery module packaging, in particular, to a method and system for manufacturing shingled battery cells and shingled photovoltaic components.
  • Photovoltaic cells are devices that use the photoelectric effect to convert light energy into electrical energy.
  • the most common is crystalline silicon cells.
  • photovoltaic modules are the inevitable trend to improve their conversion efficiency and develop efficient modules.
  • Shingled photovoltaic modules are high-performance, high-density photovoltaic cell modules based on lamination technology. Compared with traditional photovoltaic cell modules, shingled photovoltaic modules connect photovoltaic cells in a tighter way to The front main grid line overlaps with the back main grid line on the back side of another cell, which minimizes the gap between the cells, effectively reduces the inefficient power generation space caused by the battery interval, so it can be laid in the same unit area. Multi-cell, increase the light absorption area, improve the conversion efficiency of photovoltaic modules.
  • Shingled photovoltaic modules are generally formed by cutting and splitting the entire cell into small pieces and then interconnecting and packaging with conductive adhesive.
  • the production process of shingled photovoltaic modules follows the process flow of conventional photovoltaic cells and modules, that is, the whole cell product is produced in the battery production link of the solar cell factory, and the whole cell is diced and cut in the module production link of the photovoltaic module packaging plant. Split into small pieces of cells and encapsulate them into shingled photovoltaic modules through the shingling process.
  • This production process can not meet the requirements of effective grading, but also brings the drawback of repeated testing. The main reason is that due to the intra-chip differences in the manufacturing process of the whole battery, the small pieces of the battery after cutting are inconsistent.
  • the module production link also needs to add an additional battery chip segmentation process. This repeated testing and sorting will not only cause waste of working hours and increase costs, but also greatly increase the risk of splitting.
  • the present invention provides a method and system for manufacturing shingled cells and shingled photovoltaic modules.
  • the present invention provides a method for manufacturing shingled battery cells, wherein the shingled battery cells are subjected to online cutting and splitting during the battery production process, and a plurality of shingled battery cells formed therefrom are tested and sorted .
  • the method includes the following steps:
  • Pre-processing pre-treating the silicon wafer
  • Post-processing respectively post-processing multiple shingled battery cells.
  • the pretreatment includes the following steps:
  • Diffusion bonding the diffusion bonding of the silicon wafer to form a PN junction in the silicon wafer
  • For coating deposit one or more anti-reflection films on the front of the silicon wafer, and deposit a back passivation film on the back of the silicon wafer.
  • the pretreatment includes the following steps:
  • Coating depositing amorphous silicon on the surface of the silicon wafer, and depositing a transparent conductive oxide film on the surface of the amorphous silicon.
  • the pretreatment includes the following steps:
  • Diffusion junction diffuse P-type layer on the front of the silicon wafer to form a PN junction in the silicon wafer;
  • the tunnel oxide layer and the polysilicon layer are prepared, a silicon dioxide layer is formed on the back of the silicon wafer, and a polysilicon layer is formed on the silicon dioxide layer;
  • Ion implantation in which phosphorus atoms are implanted into the polysilicon layer by ion implantation
  • Coating deposit the first film on the front of the silicon wafer, and then deposit the second film on the front and back of the silicon wafer.
  • the liquid remaining in the texturing step is washed before the diffusion knotting step.
  • the PN junction at the edge of the silicon wafer is removed by plasma etching in the etching step.
  • the phosphorosilicate glass formed on the surface of the silicon wafer in the diffusion bonding step is removed before the coating step.
  • the anti-reflection film includes a silicon nitride anti-reflection film.
  • the liquid remaining in the texturing step is washed before the coating step.
  • the surface of the silicon wafer is cleaned by a chemical solution before the coating step.
  • boron tribromide is diffused on the front surface of the silicon wafer in the diffusion bonding step to form a P-type layer.
  • the thickness of the silicon dioxide layer ranges from 1 nm to 2 nm, and the thickness of the polysilicon layer ranges from 100 nm to 200 nm.
  • the first film is an aluminum oxide film
  • the second film is a silicon nitride film.
  • the post-processing includes performing test sorting and appearance inspection on a plurality of shingled battery cells.
  • the cutting method of the online cutting sliver includes physical cutting and chemical cutting.
  • the cutting method of the online cutting sliver includes laser cutting.
  • the cutting method of the online cutting sliver includes wire cutting.
  • laser cutting is performed on the surface side of the shingled battery sheet away from the PN junction.
  • the test sorting includes electrical performance test and electroluminescence test.
  • the appearance inspection includes appearance visual testing and color sorting.
  • the post-processed shingled battery cells are classified.
  • the present invention also provides a method for manufacturing shingled photovoltaic modules, which includes the following steps:
  • the shingled cell chip is made into shingled photovoltaic module by shingling process.
  • the present invention also provides a system for manufacturing shingled cells, which is characterized by comprising:
  • Pretreatment equipment used for pretreatment of silicon wafers
  • Screen printing equipment which receives the silicon wafer output by the pretreatment equipment, and prints the precious metal paste on the surface of the pretreated silicon wafer by screen printing;
  • Sintering and curing equipment which receives the silicon wafer output by the screen printing equipment, and performs high temperature sintering and curing of the silicon wafer to form a shingled battery wafer;
  • An online cutting and splitting device which receives the shingled battery slices output by the sintering and curing device, and performs on-line cutting and splitting of the shingled battery slices to form a plurality of shingled battery pieces;
  • a post-processing device which receives a plurality of shingled battery cells output from an online cutting and splitting device, and performs post-processing on the plurality of shingled battery cells.
  • the pretreatment equipment includes the following equipment:
  • Diffusion knotting equipment which receives the silicon wafer output from the texturing equipment, and diffuses the silicon wafer to form a PN junction in the silicon wafer;
  • An etching device which receives the silicon wafer output by the diffusion bonding device, and removes the PN junction at the edge of the silicon wafer by etching;
  • a coating device which receives the silicon wafer output by the etching device, deposits one or more anti-reflection films on the front of the silicon wafer, and deposits a back passivation film on the back of the silicon wafer.
  • the pretreatment equipment includes the following equipment:
  • the coating equipment receives the silicon wafer output from the texturing equipment, deposits amorphous silicon on the surface of the silicon wafer, and deposits a transparent conductive oxide film on the surface of the amorphous silicon.
  • the pretreatment equipment includes the following equipment:
  • Diffusion bonding device which receives the silicon wafer output from the texturing device, and diffuses the P-type layer on the front of the silicon wafer to form a PN junction in the silicon wafer;
  • Etching equipment which receives the silicon wafer output from the diffusion bonding device, and removes the P-type layer on the back and edge of the silicon wafer and impurities formed on the surface of the silicon chip in the diffusion bonding device by etching;
  • Tunnel oxide layer and polysilicon layer preparation equipment which receives the silicon wafer output from the etching device, forms a silicon dioxide layer on the back of the silicon wafer and forms a polysilicon layer on the silicon dioxide layer;
  • An ion implantation device which receives the silicon wafer output from the tunnel oxide layer and the polysilicon layer preparation device, and implants phosphorus atoms into the polysilicon layer by ion implantation;
  • Annealing equipment which receives the silicon wafer output by the ion implantation equipment, and activates the implanted phosphorus atoms through annealing;
  • Coating equipment which receives the silicon wafer output from the annealing equipment, and deposits a first layer of film on the front of the silicon wafer, and then deposits a second layer of film on the front and back of the silicon wafer.
  • the post-processing equipment includes equipment for testing and sorting multiple shingled battery cells and equipment for visual inspection.
  • the online cutting device includes a physical cutting device and a chemical cutting device.
  • the online cutting device includes a laser cutting device.
  • the wire cutting and splitting device includes a wire cutting device.
  • the on-line cutting and splitting device performs laser cutting on the surface side of the shingled battery sheet away from the PN junction.
  • the etching device includes a plasma etching device.
  • the anti-reflection film includes a silicon nitride anti-reflection film.
  • the tunnel oxide layer and polysilicon layer preparation equipment includes a low-pressure chemical vapor deposition device, which forms a silicon dioxide layer with a thickness of 1 nm-2 nm on the back of the silicon wafer and forms on the silicon dioxide layer
  • the polysilicon layer is 100nm-200nm thick.
  • the coating equipment deposits an aluminum oxide film on the front surface of the silicon wafer, and then deposits a silicon nitride film on the front and back surfaces of the silicon wafer.
  • the equipment for testing and sorting multiple shingled battery cells includes electrical performance testing equipment and electroluminescence testing equipment.
  • the equipment for visually inspecting a plurality of shingled battery cells includes appearance visual testing equipment and color sorting equipment.
  • the method for manufacturing shingled cells and shingled photovoltaic modules completes the packaging of small cells by cutting the slivers online at the cell production stage and sorting the small pieces.
  • Lamination assembly can realize seamless connection of shingled cell and shingled photovoltaic module production and processing process, reducing repetitive processing actions, reducing the risk and cost of splitting, and can optimize the cell current of shingled photovoltaic module Matching and appearance color consistency.
  • FIG. 1 shows a method for manufacturing shingled battery cells according to a preferred embodiment of the present invention.
  • FIG. 2A shows a pretreatment step for manufacturing shingled battery cells according to a preferred embodiment of the present invention.
  • FIG. 2B shows a pretreatment step for manufacturing shingled cells according to another preferred embodiment of the present invention.
  • FIG. 2C shows a pretreatment step for manufacturing shingled cells according to yet another preferred embodiment of the present invention.
  • FIG. 3 shows a method for manufacturing shingled photovoltaic modules according to a preferred embodiment of the present invention.
  • FIG. 4 shows a system for manufacturing shingled cells according to a preferred embodiment of the present invention.
  • FIG. 1 shows a method for manufacturing a shingled battery sheet according to a preferred embodiment of the present invention. As shown in the figure, it mainly includes a pretreatment step, a screen printing step, a sintering and curing step, and an online cutting and splitting step And post-processing steps. Among them, different types of cells can have different pre-processing steps. For conventional cells, the pre-processing steps are shown in Figure 2A, which mainly include:
  • the single / polycrystalline silicon wafer is surface-textured to obtain a good suede structure, thereby increasing the surface area of the silicon wafer to receive more photons (energy) while reducing the reflection of incident light.
  • the liquid remaining during texturing can be washed to reduce the influence of acidic and alkaline substances on the battery knotting.
  • Diffusion binding step Phosphorus oxychloride is reacted with a silicon wafer to obtain phosphorus atoms. After a period of time, phosphorus atoms enter the surface layer of the silicon wafer, and penetrate into the silicon wafer through the gaps between the silicon atoms or ion implantation to form the interface between the N-type semiconductor and the P-type semiconductor, and the diffusion bonding process is completed , To achieve the conversion of light energy to electrical energy. It can be understood that other types of cell bonding techniques can replace this step.
  • the diffusion bonding process will form a layer of phosphorous silicate glass on the surface of the silicon wafer, optionally, the effect on the efficiency of the shingled battery can be reduced through the process of dephosphorizing silicon glass.
  • Etching steps Since the diffusion junction forms a short-circuit channel at the edge of the silicon wafer, the photogenerated electrons collected on the front side of the PN junction will flow along the edge of the phosphorus diffused area to the back of the PN junction and cause a short circuit.
  • the edge PN junction is removed by etching to avoid short circuit caused by the edge.
  • the pre-processing steps described above are described for the production process of conventional shingled cells. It can be understood that for other P-type, N-type and various types of batteries, such as ordinary single-poly cells, passive emitter back contact cells (PERC), heterojunction cells (HJT), tunnel oxide passivation contacts
  • the battery (TopCon) can be replaced with the corresponding preparation process.
  • the pretreatment steps in the manufacturing process of the heterojunction battery mainly include:
  • the single / polycrystalline silicon wafer is surface-textured to obtain a good suede structure, thereby increasing the surface area of the silicon wafer to receive more photons, while reducing the reflection of incident light.
  • the liquid remaining during texturing can be washed to reduce the influence of acidic and alkaline substances on the battery knotting.
  • Amorphous silicon is deposited on both surfaces of the silicon wafer, and a transparent conductive oxide film (TCO) is deposited on the surface of the amorphous silicon.
  • TCO transparent conductive oxide film
  • FIG. 2C The preparation process of the tunnel oxide passivation contact cell (TopCon) is shown in Figure 2C, which mainly includes:
  • the surface of the silicon wafer is texturized to obtain a good textured structure, thereby increasing the surface area of the silicon wafer to receive more photons (energy), while reducing the reflection of incident light.
  • boron tribromide is diffused to the surface of the silicon wafer to form a P-type layer, and then a PN junction is formed in the silicon wafer.
  • a certain concentration of acid is used to etch away the P-type layer formed on the back of the silicon wafer and the edge of the silicon wafer in the diffusion bonding process, and at the same time remove impurities formed on the surface of the silicon wafer during the diffusion bonding process, such as borosilicate glass .
  • the preparation steps of the tunnel oxide layer and the polysilicon layer are performed in a low-pressure chemical vapor deposition device, for example, an ultra-thin silicon dioxide layer is formed on the back of the silicon wafer by thermal oxidation, with a thickness of about 1nm-2nm (eg 1.5nm) Then, a polysilicon layer mixed with an amorphous silicon phase and a microcrystalline silicon phase is stacked on the silicon dioxide layer, and its thickness is about 100 nm-200 nm (for example, 150 nm).
  • a low-pressure chemical vapor deposition device for example, an ultra-thin silicon dioxide layer is formed on the back of the silicon wafer by thermal oxidation, with a thickness of about 1nm-2nm (eg 1.5nm)
  • a polysilicon layer mixed with an amorphous silicon phase and a microcrystalline silicon phase is stacked on the silicon dioxide layer, and its thickness is about 100 nm-200 nm (for example, 150 nm).
  • phosphorus atoms are implanted in the polysilicon layer by ion implantation.
  • the implanted phosphorus atoms are activated through a high-temperature annealing process, and at the same time, the amorphous phase and the microcrystalline phase in the polycrystalline silicon layer are transformed into the polycrystalline phase.
  • the surface of the silicon wafer can be cleaned optionally with a chemical solution.
  • an atomic layer deposition (ALD) method is used to deposit a passivation film on the surface of the silicon wafer, such as an aluminum oxide film, and then plasma enhanced chemical vapor deposition (PECVD) is used on the front surface of the silicon wafer.
  • PECVD plasma enhanced chemical vapor deposition
  • the other film can be a silicon nitride film.
  • photo-generated positive load carriers can be generated, and then the collection of photo-generated carriers needs to be completed.
  • the precious metal paste (for example, silver paste, aluminum paste, etc.) can be printed on the pretreated silicon wafer according to a specific shingled cell metallization pattern by, for example, screen printing.
  • the screen-printed silicon wafer is sintered and solidified at high temperature to achieve effective ohmic contact and form a shingled battery wafer.
  • Step of cutting the sliver online The entire sintered shingled battery sheet is subjected to online laser cutting and splitting.
  • the cutting method of the present invention may be any suitable physical or chemical cutting method, such as laser cutting.
  • the sintered shingled battery sheet is put into the dicing detection position for visual inspection, and the OK piece with good appearance detection is visually positioned, and the defective appearance detection will be automatically shunted to the NG (bad) position.
  • the multi-track dicing machine or the preset buffer stack area can be freely set according to the online production cycle to achieve online continuous operation.
  • the relevant parameters of the laser can be set according to the optimal effect of cutting the lobes, so as to achieve a faster cutting speed, a narrower cutting heat affected zone and a cutting line width, better uniformity, and a predetermined cutting depth.
  • the on-line laser scribing machine automatic breaking mechanism completes the split at the cutting position, so as to realize the natural separation of the shingled battery small pieces. It should be noted that in order to avoid the leakage current of the PN junction being damaged during the cutting process, it is preferable to select the surface away from the PN junction side as the laser cutting surface. Therefore, in order to adjust the direction of the front and back sides of the battery slice, a separate 180-degree change can be added ⁇ ⁇ To the device.
  • the post-processing step may include:
  • the shingled battery chips after cutting and separation can be entered into the online test unit in order, for example, it can include an electrical performance (IV) test unit, an electroluminescence (EL) test unit, an appearance visual (VI) test unit, etc. Testing and sorting of battery chips.
  • IV electrical performance
  • EL electroluminescence
  • VI appearance visual
  • the shingled battery chips after the test sorting can be color sorted.
  • FIG. 3 shows a method for manufacturing a shingled photovoltaic module according to a preferred embodiment of the present invention, which mainly includes the following steps:
  • a shingled battery chip manufactured by the method of the embodiment described above is received.
  • FIG. 4 shows a system for manufacturing shingled cells according to a preferred embodiment of the present invention. As shown in the figure, it mainly includes pretreatment equipment, screen printing equipment, sintering and curing equipment, online cutting and splitting equipment and post-processing equipment. Among them, different types of cells can have different pretreatment equipment. For conventional cells, the pretreatment equipment mainly includes:
  • Texturing equipment which is used for surface texturing of single / polycrystalline silicon wafers to obtain a good textured structure, thereby increasing the surface area of the silicon wafer to receive more photons (energy), while reducing the reflection of incident light.
  • the diffusion junction forms a short-circuit channel at the edge of the silicon wafer, the photogenerated electrons collected on the front side of the PN junction will flow along the edge of the area where phosphorus diffuses to the back of the PN junction and cause a short circuit. Therefore, etching equipment is required to receive the diffusion
  • the silicon wafer output by the junction device, and the edge PN junction is etched and removed by, for example, plasma etching to avoid short circuit caused by the edge.
  • Coating equipment in order to reduce the surface reflection of the silicon wafer and improve the conversion efficiency of the battery, it is necessary to deposit one or more layers of silicon nitride antireflection film on the surface of the silicon wafer.
  • the coating equipment can be enhanced by plasma enhanced chemical vapor deposition (PECVD) process completes the preparation of anti-reflection film.
  • PECVD plasma enhanced chemical vapor deposition
  • a back passivation film can be deposited on the opposite side surface of the cell sheet by a coating device to reduce carrier recombination.
  • the pre-processing equipment described above is described for the production process of conventional shingled cells. It can be understood that for other P-type, N-type and various types of batteries, such as ordinary single-poly cells, passive emitter back contact cells (PERC), heterojunction cells (HJT), tunnel oxide passivation contacts
  • the battery (TopCon) can be replaced with the corresponding pretreatment equipment.
  • the pretreatments required in the manufacture of heterojunction batteries mainly include:
  • Texturing equipment which performs surface texturing on single / polycrystalline silicon wafers to obtain a good textured structure, thereby increasing the surface area of the silicon wafer to receive more photons while reducing the reflection of incident light.
  • Coating equipment which receives the silicon wafer output from the texturing equipment, and deposits amorphous silicon on both surfaces of the silicon wafer, and deposits a transparent conductive oxide film (TCO) on the surface of the amorphous silicon.
  • TCO transparent conductive oxide film
  • FIG. 2C The pretreatment equipment required in the manufacturing process of the tunnel oxide passivation contact cell is shown in FIG. 2C, which mainly includes:
  • a texturing device which performs surface texturing on a silicon wafer to obtain a good textured structure, thereby increasing the surface area of the silicon wafer to receive more photons (energy) while reducing the reflection of incident light.
  • a diffusion junction manufacturing device which receives the silicon wafer output from the texturing apparatus, diffuses boron tribromide to the surface of the silicon wafer under high temperature conditions to form a P-type layer, and then forms a PN junction in the silicon wafer.
  • Etching equipment which receives the silicon wafer output by the diffusion bonding device, uses a certain concentration of acid to etch away the P-type layer formed on the back of the silicon wafer and the edge of the silicon wafer in the diffusion bonding step, and removes the Impurities formed on the surface of the silicon wafer, such as borosilicate glass.
  • Tunnel oxide layer and polysilicon layer preparation equipment which receives the silicon wafer output from the etching device, and forms an ultra-thin silicon dioxide layer on the back of the silicon wafer by thermal oxidation, with a thickness of about 1nm-2nm (for example, 1.5nm) Then, a polysilicon layer mixed with an amorphous silicon phase and a microcrystalline silicon phase is stacked on the silicon dioxide layer, and its thickness is about 100 nm-200 nm (for example, 150 nm).
  • the tunnel oxide layer and polysilicon layer preparation equipment may be low-pressure chemical vapor deposition equipment.
  • An ion implantation device which receives the silicon wafer output by the tunnel oxide layer and the polysilicon layer preparation device, and implants phosphorus atoms into the polysilicon layer by ion implantation.
  • An annealing device which receives the silicon wafer output by the ion implantation device, activates the implanted phosphorus atoms through high-temperature annealing, and simultaneously transforms the amorphous phase and the microcrystalline phase in the polycrystalline silicon layer into a polycrystalline phase.
  • Coating equipment which receives the silicon wafer output from the annealing equipment, uses an atomic layer deposition (ALD) method to deposit a passivating film, such as aluminum oxide film, on the surface of the silicon wafer, and then enhances the chemical vapor deposition by plasma (PECVD) method, another layer of film is deposited on the front and back of the silicon wafer to play a role of anti-reflection and protect the passivation film on the front of the silicon wafer, and at the same time to passivate the back surface of the silicon wafer.
  • ALD atomic layer deposition
  • PECVD chemical vapor deposition by plasma
  • One layer of film may be a silicon nitride film.
  • Screen printing equipment used to receive the silicon wafer output by the pretreatment equipment. After manufacturing and processing the above-mentioned equipment, the silicon wafer can generate photogenerated positive load carriers, and then the collection of photogenerated carriers needs to be completed.
  • the precious metal paste (for example, silver paste, aluminum paste, etc.) can be printed on the pretreated silicon wafer according to a specific shingled cell metallization pattern by equipment such as screen printing.
  • the sintering and curing device receives the silicon wafer output by the screen printing device, and sinters and solidifies the silicon wafer printed by the screen at a high temperature, so as to realize effective ohmic contact and form a shingled battery sheet.
  • An online cutting and splitting device which receives the silicon wafer output by the sintering and curing device and performs online laser cutting and splitting of the entire sintered shingled battery cell.
  • the cutting method adopted by the cutting and splitting device in the present invention may be any suitable physical or chemical cutting method, such as laser cutting.
  • the sintered shingled battery sheet is put into the dicing detection position for visual inspection, and the OK piece with good appearance detection is visually positioned, and the defective appearance detection will be automatically shunted to the NG (bad) position.
  • the multi-track dicing machine or the preset buffer stack area can be freely set according to the online production cycle to achieve online continuous operation.
  • the relevant parameters of the laser can be set according to the optimal effect of cutting the lobes, so as to achieve a faster cutting speed, a narrower cutting heat affected zone and a cutting line width, better uniformity, and a predetermined cutting depth.
  • the on-line laser scribing machine automatic breaking mechanism completes the split at the cutting position, so as to realize the natural separation of the shingled battery small pieces. It should be noted that in order to avoid the leakage current of the PN junction being damaged during the cutting process, it is preferable to select the surface away from the PN junction side as the laser cutting surface. Therefore, in order to adjust the direction of the front and back sides of the battery slice, a separate 180-degree change can be added ⁇ ⁇ To the device.
  • Post-processing equipment which may include:
  • the shingled battery chips after cutting and separation can be entered into the online test and sorting equipment in order, for example, it can include electrical performance (IV) testing equipment, electroluminescence (EL) testing equipment and appearance inspection equipment, etc. to complete individual battery chips Test sorting.
  • IV electrical performance
  • EL electroluminescence
  • the visual inspection equipment may include visual appearance (VI) testing equipment and color sorting equipment.
  • VI visual appearance testing equipment and color sorting equipment.
  • the method for manufacturing shingled solar cells and shingled photovoltaic modules and the equipment for manufacturing shingled solar cells provided by the present invention advance the cutting and splitting steps to the battery production stage, and the cut small cells After testing and sorting, the photovoltaic module production link can be directly assembled after receiving the small pieces of batteries and unpacking, which can realize the seamless docking of the production and processing process of shingled cells and shingled photovoltaic modules, reducing repeated processing actions .

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Abstract

一种用于制造叠瓦电池片和制造叠瓦光伏组件的方法和系统,其中所述方法在电池生产环节在线切割裂片并进行小片测试分选完成电池小片包装,组件生产环节在收到电池小片拆解包装后可直接进行叠片组装,能够实现叠瓦电池片和叠瓦光伏组件生产加工工艺流程的无缝对接,减少了重复加工动作,降低了裂片风险和成本,并能够使叠瓦光伏组件中电池小片电流匹配和外观颜色的一致性得到优化。

Description

叠瓦电池片和叠瓦光伏组件的制造方法和系统 技术领域
本发明涉及太阳能晶硅叠瓦电池组件封装制造及应用领域,具体地,涉及用于制造叠瓦电池片和叠瓦光伏组件的方法和系统。
背景技术
随着全球技术和经济的迅速发展,全球煤炭、石油、天然气等常规化石能源消耗速度加快,生态环境不断恶化,日益需要更多的清洁能源来满足需求。太阳能凭借其可靠性、安全性、广泛性、环保性、资源充足性的特点已成为最重要的可再生能源之一,许多国家和地区都在大力发展太阳能(光伏)电池产业。
光伏电池是利用光电效应将光能转化为电能的器件,最常见的是晶体硅电池。光伏组件作为光伏发电的核心部件,提高其转换效率发展高效组件是必然趋势。叠瓦光伏组件是基于叠片技术的高性能、高密度光伏电池组件,与传统的光伏电池组件相比,叠瓦光伏组件通过将光伏电池片以更紧密的方式互相连接,使一个电池片的正面主栅线与另一个电池片背面的背面主栅线重叠,令电池间的缝隙降到最低,有效地减少了由于电池间隔造成的非有效发电空间,因此在同样的单位面积中可以铺设更多电池,增加吸光面积,提高光伏组件的转换效率。
叠瓦光伏组件一般是通过将整片电池切割并裂片成小片然后利用导电胶粘剂互联封装成型。当前叠瓦光伏组件的生产沿用常规光伏电池与组件的工艺流程,即,在太阳能电池厂的电池生产环节生产整片电池产品,在光伏组件封装厂的组件生产环节将整片电池划片切割并裂片成所需的小片电池并通过叠瓦工序封装成叠瓦光伏组件。这种生产工艺不能满足有效分档的要求,亦带来了重复测试的 弊端。其主要原因在于,由于整片电池在制作过程中存在片内差异,导致切割后的电池小片不一致。因此除了在电池生产环节对电池整片进行测试分选,组件生产环节还需要增加额外的电池小片分档流程。这种重复的测试和分选不仅会造成工时浪费、成本增加,还会使裂片风险大大提高。
因此,亟需改进的用于制造叠瓦电池片和叠瓦光伏组件的方法和系统。
发明内容
本发明针对以上现有技术中存在的问题,提供一种用于制造叠瓦电池片和叠瓦光伏组件的方法和系统。
一方面,本发明提供一种用于制造叠瓦电池片的方法,其中,在电池生产环节对叠瓦电池片进行在线切割裂片,并对由此形成的多个叠瓦电池小片进行测试分选。
根据本发明的一种优选实施方式,所述方法包括以下步骤:
预处理,对硅片进行预处理;
丝网印刷,通过丝网印刷将贵金属浆料印刷在经预处理的硅片的表面;
烧结固化,对经丝网印刷的硅片进行高温烧结固化以形成叠瓦电池片;
在线切割裂片,对叠瓦电池片进行在线切割裂片以形成多个叠瓦电池小片;以及
后处理,对多个叠瓦电池小片分别进行后处理。
根据本发明的一种优选实施方式,预处理包括以下步骤:
制绒,对硅片进行表面制绒;
扩散制结,对硅片进行扩散制结以在硅片内形成PN结;
刻蚀,刻蚀去除硅片边缘的PN结;
镀膜,在硅片正面沉积一层或多层减反射膜,并在硅片背面沉积背钝化膜。
根据本发明的另一种优选实施方式,预处理包括以下步骤:
制绒,对硅片进行表面制绒;
镀膜,在硅片表面沉积非晶硅,并在非晶硅表面沉积透明导电氧化物薄膜。
根据本发明的又一种优选实施方式,预处理包括以下步骤:
制绒,对硅片进行表面制绒;
扩散制结,在硅片正面扩散P型层以在硅片内形成PN结;
刻蚀,刻蚀去除硅片背面和边缘的P型层以及扩散制结过程中硅片表面形成的杂质;
隧道氧化层及多晶硅层制备,在硅片背面形成二氧化硅层,并在二氧化硅层上形成多晶硅层;
离子注入,通过离子注入在多晶硅层中注入磷原子;
退火,通过退火来激活注入的磷原子;
镀膜,在硅片正面沉积第一层膜,然后在硅片的正面和背面沉积第二层膜。
根据本发明的一种优选实施方式,在扩散制结步骤之前清洗制绒步骤残留的液体。
根据本发明的一种优选实施方式,在刻蚀步骤中通过等离子刻蚀去除硅片边缘的PN结。
根据本发明的一种优选实施方式,在镀膜步骤之前去除扩散制结步骤中在硅片表面形成的磷硅玻璃。
根据本发明的一种优选实施方式,减反射膜包括氮化硅减反射膜。
根据本发明的一种优选实施方式,在镀膜步骤之前清洗制绒步骤残留的液体。
根据本发明的一种优选实施方式,在镀膜步骤之前通过化学溶液清洗硅片表面。
根据本发明的一种优选实施方式,在扩散制结步骤中在硅片正面扩散三溴化硼以形成P型层。
根据本发明的一种优选实施方式,在刻蚀步骤中通过酸来进行刻蚀,并且所述杂质为硼硅玻璃。
根据本发明的一种优选实施方式,二氧化硅层的厚度范围为1nm-2nm,多晶硅层的厚度范围为100nm-200nm。
根据本发明的一种优选实施方式,所述第一层膜为三氧化二铝膜,所述第二层膜为氮化硅膜。
根据本发明的一种优选实施方式,后处理包括对多个叠瓦电池小片进行测试分选和外观检验。
根据本发明的一种优选实施方式,在线切割裂片的切割方式包括物理切割和化学切割。
根据本发明的一种优选实施方式,在线切割裂片的切割方式包括激光切割。
根据本发明的一种优选实施方式,在线切割裂片的切割方式包括线切割。
根据本发明的一种优选实施方式,在叠瓦电池片的远离PN结的表面一侧进行激光切割。
根据本发明的一种优选实施方式,测试分选包括电性能测试和电致发光测试。
根据本发明的一种优选实施方式,外观检验包括外观视觉测试和颜色分选。
根据本发明的一种优选实施方式,对经后处理的叠瓦电池小片进行分档。
另一方面,本发明还提供一种用于制造叠瓦光伏组件的方法,其包括以下步骤:
接收通过根据如上所述实施方式制造的叠瓦电池小片;
通过叠瓦工艺将所述叠瓦电池小片制作成叠瓦光伏组件。
又一方面,本发明还提供一种用于制造叠瓦电池片的系统,其特征在于包括:
预处理设备,用于对硅片进行预处理;
丝网印刷设备,其接收预处理设备输出的硅片,并通过丝网印刷将贵金属浆料印刷在经预处理的硅片的表面;
烧结固化设备,其接收丝网印刷设备输出的硅片,并对硅片进行高温烧结固化以形成叠瓦电池片;
在线切割裂片设备,其接收烧结固化设备输出的叠瓦电池片,并对叠瓦电池片进行在线切割裂片以形成多个叠瓦电池小片;以及
后处理设备,其接收在线切割裂片设备输出的多个叠瓦电池小片,并对多个叠瓦电池小片分别进行后处理。
根据本发明的一种优选实施方式,预处理设备包括以下设备:
制绒设备,用于对硅片进行表面制绒;
扩散制结设备,其接收制绒设备输出的硅片,并对硅片进行扩散制结以在硅片内形成PN结;
刻蚀设备,其接收扩散制结设备输出的硅片,并通过刻蚀去除硅片边缘的PN结;
镀膜设备,其接收刻蚀设备输出的硅片,并在硅片正面沉积一层或多层减反射膜,在硅片背面沉积背钝化膜。
根据本发明的一种优选实施方式,预处理设备包括以下设备:
制绒设备,用于对硅片进行表面制绒;
镀膜设备,其接收制绒设备输出的硅片,并在硅片表面沉积非晶硅,在非晶硅表面沉积透明导电氧化物薄膜。
根据本发明的一种优选实施方式,预处理设备包括以下设备:
制绒设备,对硅片进行表面制绒;
扩散制结设备,其接收制绒设备输出的硅片,并在硅片正面扩散P型层以在硅片内形成PN结;
刻蚀设备,其接收扩散制结设备输出的硅片,通过刻蚀去除硅片背面和边缘的P型层以及扩散制结设备中硅片表面形成的杂质;
隧道氧化层及多晶硅层制备设备,其接收刻蚀设备输出的硅片,在硅片背面形成二氧化硅层并在二氧化硅层上形成多晶硅层;
离子注入设备,其接收隧道氧化层及多晶硅层制备设备输出的 硅片,并以离子注入方式在多晶硅层中注入磷原子;
退火设备,其接收离子注入设备输出的硅片,并通过退火来激活注入的磷原子;
镀膜设备,其接收退火设备输出的硅片,并在硅片正面沉积第一层膜,然后在硅片的正面和背面沉积第二层膜。
根据本发明的一种优选实施方式,后处理设备包括对多个叠瓦电池小片进行测试分选的设备和进行外观检验的设备。
根据本发明的一种优选实施方式,在线切割裂片设备包括物理切割设备和化学切割设备。
根据本发明的一种优选实施方式,在线切割裂片设备包括激光切割设备。
根据本发明的一种优选实施方式,在线切割裂片设备包括线切割设备。
根据本发明的一种优选实施方式,在线切割裂片设备在叠瓦电池片的远离PN结的表面一侧进行激光切割。
根据本发明的一种优选实施方式,刻蚀设备包括等离子刻蚀设备。
根据本发明的一种优选实施方式,减反射膜包括氮化硅减反射膜。
根据本发明的一种优选实施方式,刻蚀设备包括酸刻蚀设备。
根据本发明的一种优选实施方式,隧道氧化层及多晶硅层制备设备包括低压化学气相层积设备,其在硅片背面形成厚度为1nm-2nm的二氧化硅层并在二氧化硅层上形成厚度为100nm-200nm多晶硅层。
根据本发明的一种优选实施方式,镀膜设备在硅片正面沉积三氧化二铝膜,然后在硅片的正面和背面沉积氮化硅膜。
根据本发明的一种优选实施方式,所述对多个叠瓦电池小片进行测试分选的设备包括电性能测试设备和电致发光测试设备。
根据本发明的一种优选实施方式,对多个叠瓦电池小片进行外 观检验的设备包括外观视觉测试设备和颜色分选设备。
本发明所提供的制造叠瓦电池片和叠瓦光伏组件的方法,通过在电池生产环节在线切割裂片并进行小片分选完成电池小片包装,组件生产环节在收到电池小片拆解包装后可直接进行叠片组装,能够实现叠瓦电池片和叠瓦光伏组件生产加工工艺流程的无缝对接,减少了重复加工动作,降低了裂片风险和成本,并能够最优化叠瓦光伏组件中电池小片电流匹配和外观颜色的一致性。
附图说明
图1示出了根据本发明的一种优选实施方式的用于制造叠瓦电池片的方法。
图2A示出了根据本发明的一种优选实施方式的用于制造叠瓦电池片的预处理步骤。
图2B示出了根据本发明的另一种优选实施方式的用于制造叠瓦电池片的预处理步骤。
图2C示出了根据本发明的又一种优选实施方式的用于制造叠瓦电池片的预处理步骤。
图3示出了根据本发明的一种优选实施方式的用于制造叠瓦光伏组件的方法。
图4示出了根据本发明的一种优选实施方式的用于制造叠瓦电池片的系统。
具体实施方式
下面,参照附图详细描述本发明的用于制造叠瓦电池片和叠瓦光伏组件的方法和系统。这里所描述的仅仅是根据本发明的优选实施方式,本领域技术人员可以在所述优选实施方式的基础上想到能够实现本发明的其他方式,所述其他方式同样落入本发明的范围。
图1示出了根据本发明的一种优选实施方式的用于制造叠瓦电池片的方法,如图所示,其主要包括预处理步骤、丝网印刷步骤、 烧结固化步骤、在线切割裂片步骤和后处理步骤。其中,对于不同类型的电池片可以有不同的预处理步骤,对于常规电池片来说,预处理步骤如图2A所示,其主要包括:
制绒步骤。对单/多晶硅片进行表面制绒以获得良好的绒面结构,从而增大硅片的表面积以接收更多的光子(能量),同时减少入射光的反射。
可选地,在制绒步骤之后可以清洗制绒时残留的液体,以减少酸性和碱性物质对电池制结的影响。
扩散制结步骤。通过例如三氯氧磷等和硅片进行反应,得到磷原子。经过一段时间,磷原子进入硅片的表面层,并且通过硅原子之间的空隙向硅片内部渗透扩散或通过离子注入方式,形成N型半导体和P型半导体的交界面,完成扩散制结工序,实现光能到电能的转换。可以理解,其他类型的电池片制结技术可替代本步骤。
由于扩散制结工序会使硅片表面形成一层磷硅玻璃,因此可选地可以通过去磷硅玻璃工序减少对叠瓦电池效率的影响。
刻蚀步骤。由于扩散制结在硅片边缘形成了短路通道,PN结的正面所收集到的光生电子会沿着边缘扩散有磷的区域流到PN结的背面而造成短路,因此需要通过例如等离子刻蚀将边缘PN结刻蚀去除,避免边缘造成短路。
镀膜步骤。为了减少硅片的表面反射,提高电池的转换效率,需要在硅片一侧表面上沉积一层或多层的氮化硅减反射膜,可以通过例如等离子体增强化学气相沉积(PECVD)工序完成减反射膜制备。另外,为了实现良好的钝化效果,可以在电池片的相反的另一侧表面沉积背钝化膜以降低载流子的复合。
以上所述预处理步骤是针对常规叠瓦电池片的生产过程进行描述的。可以理解,对于其它P型、N型以及各类技术的电池,例如普通单多晶电池、钝化发射极背面接触电池(PERC)、异质结电池(HJT)、穿隧氧化层钝化接触电池(TopCon)等可替换为相应的制备过程。例如,如图2B所示,在异质结电池的制造过程中预处理 步骤主要包括:
制绒步骤。对单/多晶硅片进行表面制绒以获得良好的绒面结构,从而增大硅片的表面积以接收更多的光子,同时减少入射光的反射。
可选地,在制绒步骤之后可以清洗制绒时残留的液体,以减少酸性和碱性物质对电池制结的影响。
镀膜步骤。在硅片的两个表面上沉积非晶硅,并在非晶硅表面上沉积透明导电氧化物薄膜(TCO)。
穿隧氧化层钝化接触电池(TopCon)的制备过程如图2C所示,主要包括:
制绒步骤,对硅片进行表面制绒以获得良好的绒面结构,从而增大硅片的表面积以接收更多的光子(能量),同时减少入射光的反射。
扩散制结步骤,在高温条件下,将三溴化硼扩散到硅片表面形成P型层,并进而在硅片中形成PN结。
刻蚀步骤,利用一定浓度的酸来刻蚀掉扩散制结步骤在硅片背面及硅片边缘形成的P型层,同时去除扩散制结过程中在硅片表面形成的杂质,例如硼硅玻璃。
隧道氧化层及多晶硅层制备步骤,在例如低压化学气相层积设备中,通过热氧化在硅片的背面形成一层超薄的二氧化硅层,其厚度约为1nm-2nm(例如1.5nm),然后在二氧化硅层上层积一层混有非晶硅相和微晶硅相的多晶硅层,其厚度约为100nm-200nm(例如150nm)。
离子注入步骤,以离子注入的方式在多晶硅层中注入磷原子。
退火步骤,通过高温退火过程来激活注入的磷原子,同时将多晶硅层中的非晶相和微晶相转变为多晶相。
可选的清洗步骤,可以可选地利用化学溶液将硅片表面清洗干净。
镀膜步骤,采用原子层沉积(ALD)方法在硅片表面层积一层起钝化作用的膜,例如三氧化二铝膜,然后通过等离子体增强化学 气相沉积(PECVD)方式在硅片正面和背面分别层积另一层膜,以在硅片正面起到减反射作用并保护起钝化作用的膜,同时在硅片背面起钝化作用,所述另一层膜可以是氮化硅膜。
如上对本发明的方法的预处理步骤进行了说明,现在对本发明的方法的其他步骤进行解释。
丝网印刷步骤。在上述工艺步骤完成后即可产生光生正负载流子,接下来需要完成光生载流子的收集。可以通过例如丝网印刷等方式将贵金属浆料(例如,银浆料、铝浆料等)按照特定的叠瓦电池片金属化图案印刷在经预处理的硅片上。
烧结固化步骤。将经丝网印刷的硅片在高温下进行烧结固化,以实现有效的欧姆接触,形成叠瓦电池片。
在线切割裂片步骤。将烧结好的叠瓦电池整片进行在线激光切割并裂片。当然,本发明的切割方式可以是任何合适的物理或化学的切割方式,例如激光切割。具体地,使烧结完成的叠瓦电池片进入划片检测位进行外观检查,并对外观检测良好的OK片进行视觉定位,外观检测不良的会自动分流至NG(不良)位。可以根据在线生产节拍自由设置多轨划片机或预设缓存堆栈区,以实现在线连续作业。另外,还可以按照切割裂片的最优效果设定激光器的相关参数,以实现较快的切割速度、较窄的切割热影响区和切割线宽、更优的均匀性以及预定的切割深度等。完成自动切割后通过在线激光划片机自动掰片机构完成切割位置处的裂片从而实现叠瓦电池小片自然分离。需要注意的是,为避免在切割过程中PN结受损出现漏电流,优选选取远离PN结侧的表面作为激光切割面,因此,为了调整电池片的正反面方向,可以增加单独的180度换向装置。
后处理步骤。所述后处理步骤可以包括:
在线测试分选步骤。经切割分离后的叠瓦电池小片可以按照先后顺序进入在线测试单元,例如,可以包括电性能(IV)测试单元、电致发光(EL)测试单元、外观视觉(VI)测试单元等,完成单独电池小片的测试分选。
可选地,可以对测试分选后的叠瓦电池小片进行颜色分选。
在以上步骤完成后,可以将测试分选后的叠瓦小电池片按照不同的档位进行包装入库。在通过本发明的方法制造完成叠瓦电池小片后,可以通过叠瓦工艺将其组装制作成叠瓦光伏组件。图3示出了根据本发明的优选实施方式的用于制造叠瓦光伏组件的方法,其主要包括以下步骤:
接收通过如上所述实施方式的方法制造而成的叠瓦电池小片。
通过叠瓦工艺将叠瓦电池小片制作成叠瓦光伏组件。
具体地,如图3所示,叠瓦光伏组件封装厂在接收到经切割裂片并有效测试分选的叠瓦电池小片后,取片并按照档位投料即可进行叠瓦光伏组件的制作封装。以单玻金属边框组件为例,包括例如叠片焊接(焊接引出线和汇流条等)、胶膜和背板敷设(EVA/TPT铺设)、层压前检查(包括例如EL检查和VI检查等)、层压、安装固化(包括例如装框、装接线盒、固化等)、测试检验(包括例如IV测试、EL测试和外观检验等环节)。应该理解,以上仅仅是以常规的叠瓦光伏组件制作过程为例,本发明提供的方法也可以适用于其他的叠瓦光伏组件制作过程。
图4示出了根据本发明的一种优选实施方式的用于制造叠瓦电池片的系统。如图所示,其主要包括预处理设备、丝网印刷设备、烧结固化设备、在线切割裂片设备和后处理设备。其中,对于不同类型的电池片可以有不同的预处理设备,对于常规电池片来说,预处理设备主要包括:
制绒设备,其用于对单/多晶硅片进行表面制绒以获得良好的绒面结构,从而增大硅片的表面积以接收更多的光子(能量),同时减少入射光的反射。
扩散制结设备,其接收制绒设备输出的硅片,并利用例如三氯氧磷等和硅片进行反应,得到磷原子。经过一段时间,磷原子进入硅片的表面层,并且通过硅原子之间的空隙向硅片内部渗透扩散或通过离子注入方式,形成N型半导体和P型半导体的交界面,完成 扩散制结工序,实现光能到电能的转换。
由于扩散制结在硅片边缘形成了短路通道,PN结的正面所收集到的光生电子会沿着边缘扩散有磷的区域流到PN结的背面而造成短路,因此需要刻蚀设备接收扩散制结设备输出的硅片,并通过例如等离子刻蚀等将边缘PN结刻蚀去除,避免边缘造成短路。
镀膜设备,为了减少硅片的表面反射,提高电池的转换效率,需要在硅片一侧表面上沉积一层或多层的氮化硅减反射膜,镀膜设备可以通过例如等离子体增强化学气相沉积(PECVD)工序完成减反射膜制备。另外,为了实现良好的钝化效果,可以通过镀膜设备在电池片的相反的另一侧表面沉积背钝化膜以降低载流子的复合。
以上所述预处理设备是针对常规叠瓦电池片的生产过程进行描述的。可以理解,对于其它P型、N型以及各类技术的电池,例如普通单多晶电池、钝化发射极背面接触电池(PERC)、异质结电池(HJT)、穿隧氧化层钝化接触电池(TopCon)等可替换为相应的预处理设备。例如,如图2B所示,在异质结电池的制造中需要的预处理主要包括:
制绒设备,其对单/多晶硅片进行表面制绒以获得良好的绒面结构,从而增大硅片的表面积以接收更多的光子,同时减少入射光的反射。
镀膜设备,其接收制绒设备输出的硅片,并在硅片的两个表面上沉积非晶硅,并在非晶硅表面上沉积透明导电氧化物薄膜(TCO)。
在穿隧氧化层钝化接触电池的制造过程中需要的预处理设备如图2C所示,主要包括:
制绒设备,其对硅片进行表面制绒以获得良好的绒面结构,从而增大硅片的表面积以接收更多的光子(能量),同时减少入射光的反射。
扩散制结设备,其接收制绒设备输出的硅片,在高温条件下将三溴化硼扩散到硅片表面形成P型层,并进而在硅片中形成PN结。
刻蚀设备,其接收扩散制结设备输出的硅片,利用一定浓度的 酸来刻蚀掉扩散制结步骤在硅片背面及硅片边缘形成的P型层,同时去除扩散制结过程中在硅片表面形成的杂质,例如硼硅玻璃。
隧道氧化层及多晶硅层制备设备,其接收刻蚀设备输出的硅片,通过热氧化在硅片的背面形成一层超薄的二氧化硅层,其厚度约为1nm-2nm(例如1.5nm),然后在二氧化硅层上层积一层混有非晶硅相和微晶硅相的多晶硅层,其厚度约为100nm-200nm(例如150nm)。所述隧道氧化层及多晶硅层制备设备可以是低压化学气相层积设备。
离子注入设备,其接收隧道氧化层及多晶硅层制备设备输出的硅片,并以离子注入的方式在多晶硅层中注入磷原子。
退火设备,其接收离子注入设备输出的硅片,通过高温退火来激活注入的磷原子,同时将多晶硅层中的非晶相和微晶相转变为多晶相。
镀膜设备,其接收退火设备输出的硅片,采用原子层沉积(ALD)方法在硅片表面层积一层起钝化作用的膜,例如三氧化二铝膜,然后通过等离子体增强化学气相沉积(PECVD)方式在硅片正面和背面分别层积另一层膜,以在硅片正面起到减反射作用并保护起钝化作用的膜,同时在硅片背面起钝化作用,所述另一层膜可以是氮化硅膜。
如上对本发明的方法的预处理设备进行了说明,现在对本发明的其他设备进行解释。
丝网印刷设备,用于接收预处理设备输出的硅片。在经上述设备制造加工后硅片即可产生光生正负载流子,接下来需要完成光生载流子的收集。可以通过例如丝网印刷等设备将贵金属浆料(例如,银浆料、铝浆料等)按照特定的叠瓦电池片金属化图案印刷在经预处理的硅片上。
烧结固化设备,其接收丝网印刷设备输出的硅片,并将经丝网印刷的硅片在高温下进行烧结固化,以实现有效的欧姆接触,形成叠瓦电池片。
在线切割裂片设备,其接收烧结固化设备输出的硅片并将烧结好的叠瓦电池整片进行在线激光切割并裂片。当然,本发明中切割裂片设备采用的切割方式可以是任何合适的物理或化学的切割方式,例如激光切割。具体地,使烧结完成的叠瓦电池片进入划片检测位进行外观检查,并对外观检测良好的OK片进行视觉定位,外观检测不良的会自动分流至NG(不良)位。可以根据在线生产节拍自由设置多轨划片机或预设缓存堆栈区,以实现在线连续作业。另外,还可以按照切割裂片的最优效果设定激光器的相关参数,以实现较快的切割速度、较窄的切割热影响区和切割线宽、更优的均匀性以及预定的切割深度等。完成自动切割后通过在线激光划片机自动掰片机构完成切割位置处的裂片从而实现叠瓦电池小片自然分离。需要注意的是,为避免在切割过程中PN结受损出现漏电流,优选选取远离PN结侧的表面作为激光切割面,因此,为了调整电池片的正反面方向,可以增加单独的180度换向装置。
后处理设备,其可以包括:
在线测试分选设备。经切割分离后的叠瓦电池小片可以按照先后顺序进入在线测试分选设备,例如,可以包括电性能(IV)测试设备、电致发光(EL)测试设备和外观检验设备等,完成单独电池小片的测试分选。
可选地,外观检验设备可以包括外观视觉(VI)测试设备和颜色分选设备。通过以上所述实施方式可知,本发明所提供的制造叠瓦电池片和叠瓦光伏组件的方法以及制造叠瓦电池片的设备将切割裂片步骤提前到电池生产环节,并对切割后的电池小片进行测试分选,光伏组件生产环节在收到电池小片拆解包装后可直接进行叠片组装,能够实现叠瓦电池片和叠瓦光伏组件生产加工工艺流程的无缝对接,减少了重复加工动作。
本发明的保护范围仅由权利要求限定。得益于本发明的教导,本领域技术人员容易认识到可将本发明所公开结构的替代结构作为可行的替代实施方式,并且可将本发明所公开的实施方式进行组合 以产生新的实施方式,它们同样落入所附权利要求书的范围内。

Claims (40)

  1. 一种用于制造叠瓦电池片的方法,其特征在于,在电池生产环节对叠瓦电池片进行在线切割裂片,并对由此形成的多个叠瓦电池小片进行测试分选。
  2. 根据权利要求1所述的方法,其特征在于包括以下步骤:
    预处理,对硅片进行预处理;
    丝网印刷,通过丝网印刷将贵金属浆料印刷在经预处理的硅片的表面;
    烧结固化,对经丝网印刷的硅片进行高温烧结固化以形成叠瓦电池片;
    在线切割裂片,对叠瓦电池片进行在线切割裂片以形成多个叠瓦电池小片;以及
    后处理,对多个叠瓦电池小片分别进行后处理。
  3. 根据权利要求2所述的方法,其特征在于,所述预处理包括以下步骤:
    制绒,对硅片进行表面制绒;
    扩散制结,对硅片进行扩散制结以在硅片内形成PN结;
    刻蚀,刻蚀去除硅片边缘的PN结;
    镀膜,在硅片正面沉积一层或多层减反射膜,并在硅片背面沉积背钝化膜。
  4. 根据权利要求2所述的方法,其特征在于,所述预处理包括以下步骤:
    制绒,对硅片进行表面制绒;
    镀膜,在硅片表面沉积非晶硅,并在非晶硅表面沉积透明导电氧化物薄膜。
  5. 根据权利要求2所述的方法,其特征在于,所述预处理包括以下步骤:
    制绒,对硅片进行表面制绒;
    扩散制结,在硅片正面扩散P型层以在硅片内形成PN结;
    刻蚀,刻蚀去除硅片背面和边缘的P型层以及扩散制结过程中硅片表面形成的杂质;
    隧道氧化层及多晶硅层制备,在硅片背面形成二氧化硅层,并在二氧化硅层上形成多晶硅层;
    离子注入,通过离子注入在多晶硅层中注入磷原子;
    退火,通过退火来激活注入的磷原子;
    镀膜,在硅片正面沉积第一层膜,然后在硅片的正面和背面沉积第二层膜。
  6. 根据权利要求3所述的方法,其特征在于,在扩散制结步骤之前清洗制绒步骤残留的液体。
  7. 根据权利要求3所述的方法,其特征在于,在刻蚀步骤中通过等离子刻蚀去除硅片边缘的PN结。
  8. 根据权利要求3所述的方法,其特征在于,在镀膜步骤之前去除扩散制结步骤中在硅片表面形成的磷硅玻璃。
  9. 根据权利要求3所述的方法,其特征在于,所述减反射膜包括氮化硅减反射膜。
  10. 根据权利要求4所述的方法,其特征在于,在镀膜步骤之前清洗制绒步骤残留的液体。
  11. 根据权利要求5所述的方法,其特征在于,在镀膜步骤之前通过化学溶液清洗硅片表面。
  12. 根据权利要求5所述的方法,其特征在于,在扩散制结步骤中在硅片正面扩散三溴化硼以形成P型层。
  13. 根据权利要求5所述的方法,其特征在于,在刻蚀步骤中通过酸来进行刻蚀,并且所述杂质为硼硅玻璃。
  14. 根据权利要求5所述的方法,其特征在于,所述二氧化硅层的厚度范围为1nm-2nm,所述多晶硅层的厚度范围为100nm-200nm。
  15. 根据权利要求5所述的方法,其特征在于,所述第一层膜为三氧化二铝膜,所述第二层膜为氮化硅膜。
  16. 根据权利要求3-5中任一权利要求所述的方法,其特征在于,所述后处理包括对多个叠瓦电池小片进行测试分选和外观检验。
  17. 根据权利要求3-5中任一权利要求所述的方法,其特征在于,在线切割裂片的切割方式包括物理切割和化学切割。
  18. 根据权利要求3-5中任一权利要求所述的方法,其特征在于,在线切割裂片的切割方式包括激光切割。
  19. 根据权利要求3-5中任一权利要求所述的方法,其特征在于,在线切割裂片的切割方式包括线切割。
  20. 根据权利要求3-5中任一权利要求所述的方法,其特征在于,在叠瓦电池片的远离PN结的表面一侧进行激光切割。
  21. 根据权利要求16所述的方法,其特征在于,测试分选包括电性能测试和电致发光测试。
  22. 根据权利要求16所述的方法,其特征在于,外观检验包括外观视觉测试和颜色分选。
  23. 根据权利要求3-5中任一权利要求所述的方法,其特征在于,对经后处理的叠瓦电池小片进行分档。
  24. 一种用于制造叠瓦光伏组件的方法,其特征在于包括以下步骤:
    接收通过根据权利要求1-23所述的方法制造的叠瓦电池小片;
    通过叠瓦工艺将所述叠瓦电池小片制作成叠瓦光伏组件。
  25. 一种用于制造叠瓦电池片的系统,其特征在于包括:
    预处理设备,用于对硅片进行预处理;
    丝网印刷设备,其接收预处理设备输出的硅片,并通过丝网印刷将贵金属浆料印刷在经预处理的硅片的表面;
    烧结固化设备,其接收丝网印刷设备输出的硅片,并对硅片进行高温烧结固化以形成叠瓦电池片;
    在线切割裂片设备,其接收烧结固化设备输出的叠瓦电池片,并对叠瓦电池片进行在线切割裂片以形成多个叠瓦电池小片;以及
    后处理设备,其接收在线切割裂片设备输出的多个叠瓦电池小片,并对多个叠瓦电池小片分别进行后处理。
  26. 根据权利要求25所述的系统,其特征在于,所述预处理设备包括以下设备:
    制绒设备,用于对硅片进行表面制绒;
    扩散制结设备,其接收制绒设备输出的硅片,并对硅片进行扩散制结以在硅片内形成PN结;
    刻蚀设备,其接收扩散制结设备输出的硅片,并通过刻蚀去除硅片边缘的PN结;
    镀膜设备,其接收刻蚀设备输出的硅片,并在硅片正面沉积一层或多层减反射膜,在硅片背面沉积背钝化膜。
  27. 根据权利要求25所述的系统,其特征在于,所述预处理设备包括以下设备:
    制绒设备,用于对硅片进行表面制绒;
    镀膜设备,其接收制绒设备输出的硅片,并在硅片表面沉积非晶硅,在非晶硅表面沉积透明导电氧化物薄膜。
  28. 根据权利要求25所述的系统,其特征在于,所述预处理设备包括以下设备:
    制绒设备,对硅片进行表面制绒;
    扩散制结设备,其接收制绒设备输出的硅片,并在硅片正面扩散P型层以在硅片内形成PN结;
    刻蚀设备,其接收扩散制结设备输出的硅片,通过刻蚀去除硅片背面和边缘的P型层以及扩散制结设备中硅片表面形成的杂质;
    隧道氧化层及多晶硅层制备设备,其接收刻蚀设备输出的硅片,在硅片背面形成二氧化硅层并在二氧化硅层上形成多晶硅层;
    离子注入设备,其接收隧道氧化层及多晶硅层制备设备输出的硅片,并以离子注入方式在多晶硅层中注入磷原子;
    退火设备,其接收离子注入设备输出的硅片,并通过退火来激活注入的磷原子;
    镀膜设备,其接收退火设备输出的硅片,并在硅片正面沉积第一层膜,然后在硅片的正面和背面沉积第二层膜。
  29. 根据权利要求26-28中任一权利要求所述的系统,其特征在于,所述后处理设备包括对多个叠瓦电池小片进行测试分选的设备和进行外观检验的设备。
  30. 根据权利要求26-28中任一权利要求所述的系统,其特征在于,在线切割裂片设备包括物理切割设备和化学切割设备。
  31. 根据权利要求26-28中任一权利要求所述的系统,其特征在于,在线切割裂片设备包括激光切割设备。
  32. 根据权利要求26-28中任一权利要求所述的系统,其特征在于,在线切割裂片设备包括线切割设备。
  33. 根据权利要求26-28中任一权利要求所述的系统,其特征在于,在线切割裂片设备在叠瓦电池片的远离PN结的表面一侧进行激光切割。
  34. 根据权利要求26所述的系统,其特征在于,刻蚀设备包括等离子刻蚀设备。
  35. 根据权利要求26所述的系统,其特征在于,所述减反射膜包括氮化硅减反射膜。
  36. 根据权利要求28所述的系统,其特征在于,刻蚀设备包括酸刻蚀设备。
  37. 根据权利要求28所述的系统,其特征在于,隧道氧化层及多晶硅层制备设备包括低压化学气相层积设备,其在硅片背面形成厚度为1nm-2nm的二氧化硅层并在二氧化硅层上形成厚度为100nm-200nm多晶硅层。
  38. 根据权利要求28所述的系统,其特征在于,镀膜设备在硅片正面沉积三氧化二铝膜,然后在硅片的正面和背面沉积氮化硅膜。
  39. 根据权利要求29所述的系统,其特征在于,所述对多个叠瓦电池小片进行测试分选的设备包括电性能测试设备和电致发光测试设备。
  40. 根据权利要求29所述的系统,其特征在于,对多个叠瓦电池小片进行外观检验的设备包括外观视觉测试设备和颜色分选设备。
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9935222B1 (en) * 2017-03-09 2018-04-03 Flex Ltd. Shingled array solar cells and method of manufacturing solar modules including the same
US20180175233A1 (en) * 2016-12-21 2018-06-21 Solarcity Corporation Alignment markers for precision automation of manufacturing solar panels and methods of use
CN108574025A (zh) * 2018-05-21 2018-09-25 保定易通光伏科技股份有限公司 叠瓦组件的制作方法
CN108807575A (zh) * 2018-06-04 2018-11-13 浙江宝利特新能源股份有限公司 一种mbb多主栅电池片叠片组件的制备方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU2095083A (en) * 1982-11-09 1984-05-17 Energy Conversion Devices Inc. Laminated strip of large area solar cells
WO2010135321A2 (en) * 2009-05-19 2010-11-25 Applied Materials, Inc. Method and apparatus for solar cell production line control and process analysis
KR20130048975A (ko) * 2011-11-03 2013-05-13 현대중공업 주식회사 태양전지의 제조방법
KR101863068B1 (ko) * 2011-12-01 2018-06-01 주성엔지니어링(주) 태양전지 및 그 제조방법
US20130298973A1 (en) * 2012-05-14 2013-11-14 Silevo, Inc. Tunneling-junction solar cell with shallow counter doping layer in the substrate
JP2014220346A (ja) * 2013-05-07 2014-11-20 株式会社村田製作所 太陽電池セルおよびその製造方法
CN109545863B (zh) * 2014-05-27 2021-09-14 迈可晟太阳能有限公司 叠盖式太阳能电池模块
JP1676513S (zh) * 2014-05-27 2021-01-12
CN104201240B (zh) * 2014-08-29 2016-08-17 四川钟顺太阳能开发有限公司 一种太阳电池的生产工艺及其采用该工艺生产的太阳电池
KR102336219B1 (ko) * 2015-01-21 2021-12-06 엘지전자 주식회사 태양 전지 및 이의 제조 방법
CN105895738A (zh) * 2016-04-26 2016-08-24 泰州中来光电科技有限公司 一种钝化接触n型太阳能电池及制备方法和组件、系统
CN109673172B (zh) * 2016-07-29 2022-10-14 迈可晟太阳能有限公司 沿非直线边缘重叠的叠盖式太阳能电池
NL2018356B1 (en) * 2017-02-10 2018-09-21 Tempress Ip B V A method of manufacturing a passivated solar cell and resulting passivated solar cell

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20180175233A1 (en) * 2016-12-21 2018-06-21 Solarcity Corporation Alignment markers for precision automation of manufacturing solar panels and methods of use
US9935222B1 (en) * 2017-03-09 2018-04-03 Flex Ltd. Shingled array solar cells and method of manufacturing solar modules including the same
CN108574025A (zh) * 2018-05-21 2018-09-25 保定易通光伏科技股份有限公司 叠瓦组件的制作方法
CN108807575A (zh) * 2018-06-04 2018-11-13 浙江宝利特新能源股份有限公司 一种mbb多主栅电池片叠片组件的制备方法

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP3686940A4 *

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