WO2020103197A1 - 叠瓦电池片和叠瓦光伏组件的制造方法和系统 - Google Patents
叠瓦电池片和叠瓦光伏组件的制造方法和系统Info
- Publication number
- WO2020103197A1 WO2020103197A1 PCT/CN2018/119526 CN2018119526W WO2020103197A1 WO 2020103197 A1 WO2020103197 A1 WO 2020103197A1 CN 2018119526 W CN2018119526 W CN 2018119526W WO 2020103197 A1 WO2020103197 A1 WO 2020103197A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- silicon wafer
- equipment
- shingled
- silicon
- cutting
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract description 84
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 55
- 238000005520 cutting process Methods 0.000 claims abstract description 71
- 238000012360 testing method Methods 0.000 claims abstract description 41
- 235000012431 wafers Nutrition 0.000 claims description 182
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 178
- 229910052710 silicon Inorganic materials 0.000 claims description 176
- 239000010703 silicon Substances 0.000 claims description 176
- 238000009792 diffusion process Methods 0.000 claims description 38
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 34
- 238000005530 etching Methods 0.000 claims description 34
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 34
- 239000011248 coating agent Substances 0.000 claims description 28
- 238000000576 coating method Methods 0.000 claims description 28
- 229920005591 polysilicon Polymers 0.000 claims description 28
- 238000005468 ion implantation Methods 0.000 claims description 17
- 238000012805 post-processing Methods 0.000 claims description 17
- 238000007650 screen-printing Methods 0.000 claims description 17
- 235000012239 silicon dioxide Nutrition 0.000 claims description 17
- 239000000377 silicon dioxide Substances 0.000 claims description 17
- 238000001723 curing Methods 0.000 claims description 16
- 125000004437 phosphorous atom Chemical group 0.000 claims description 16
- 238000000137 annealing Methods 0.000 claims description 15
- 238000002161 passivation Methods 0.000 claims description 15
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 14
- 238000003698 laser cutting Methods 0.000 claims description 14
- 238000002360 preparation method Methods 0.000 claims description 14
- 238000005245 sintering Methods 0.000 claims description 14
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 12
- 238000007781 pre-processing Methods 0.000 claims description 12
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 12
- 239000000126 substance Substances 0.000 claims description 11
- 238000005401 electroluminescence Methods 0.000 claims description 10
- 230000000007 visual effect Effects 0.000 claims description 10
- ILAHWRKJUDSMFH-UHFFFAOYSA-N boron tribromide Chemical compound BrB(Br)Br ILAHWRKJUDSMFH-UHFFFAOYSA-N 0.000 claims description 8
- 239000012535 impurity Substances 0.000 claims description 8
- 238000011179 visual inspection Methods 0.000 claims description 7
- 239000002253 acid Substances 0.000 claims description 6
- 239000007788 liquid Substances 0.000 claims description 6
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims description 6
- 239000010970 precious metal Substances 0.000 claims description 6
- 238000001020 plasma etching Methods 0.000 claims description 5
- 239000005388 borosilicate glass Substances 0.000 claims description 4
- 238000000151 deposition Methods 0.000 claims description 4
- 238000004518 low pressure chemical vapour deposition Methods 0.000 claims description 4
- 239000007943 implant Substances 0.000 claims description 3
- 238000011056 performance test Methods 0.000 claims description 2
- 238000007639 printing Methods 0.000 claims description 2
- 239000005368 silicate glass Substances 0.000 claims description 2
- 238000004806 packaging method and process Methods 0.000 abstract description 6
- 238000012545 processing Methods 0.000 abstract description 6
- 238000003032 molecular docking Methods 0.000 abstract description 2
- 230000003252 repetitive effect Effects 0.000 abstract description 2
- 238000003754 machining Methods 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 55
- 238000007689 inspection Methods 0.000 description 8
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 7
- 238000006243 chemical reaction Methods 0.000 description 6
- 238000001514 detection method Methods 0.000 description 6
- 230000000694 effects Effects 0.000 description 6
- 238000003475 lamination Methods 0.000 description 5
- 238000000231 atomic layer deposition Methods 0.000 description 4
- 239000000969 carrier Substances 0.000 description 4
- XHXFXVLFKHQFAL-UHFFFAOYSA-N phosphoryl trichloride Chemical compound ClP(Cl)(Cl)=O XHXFXVLFKHQFAL-UHFFFAOYSA-N 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- 238000000926 separation method Methods 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 2
- 230000002378 acidificating effect Effects 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 239000000306 component Substances 0.000 description 2
- 229910021419 crystalline silicon Inorganic materials 0.000 description 2
- 230000002950 deficient Effects 0.000 description 2
- 238000001465 metallisation Methods 0.000 description 2
- VNWKTOKETHGBQD-UHFFFAOYSA-N methane Chemical compound C VNWKTOKETHGBQD-UHFFFAOYSA-N 0.000 description 2
- 229910021424 microcrystalline silicon Inorganic materials 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 239000011574 phosphorus Substances 0.000 description 2
- 238000010248 power generation Methods 0.000 description 2
- 230000006798 recombination Effects 0.000 description 2
- 238000005215 recombination Methods 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- 239000002344 surface layer Substances 0.000 description 2
- 238000003466 welding Methods 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 239000002313 adhesive film Substances 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 239000003245 coal Substances 0.000 description 1
- 239000008358 core component Substances 0.000 description 1
- 230000002542 deteriorative effect Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 238000009432 framing Methods 0.000 description 1
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 230000031700 light absorption Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 239000003345 natural gas Substances 0.000 description 1
- 239000003921 oil Substances 0.000 description 1
- 238000002203 pretreatment Methods 0.000 description 1
- 230000011218 segmentation Effects 0.000 description 1
- 238000007711 solidification Methods 0.000 description 1
- 230000008023 solidification Effects 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/186—Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02043—Cleaning before device manufacture, i.e. Begin-Of-Line process
- H01L21/02052—Wet cleaning only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/3065—Plasma etching; Reactive-ion etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67017—Apparatus for fluid treatment
- H01L21/67063—Apparatus for fluid treatment for etching
- H01L21/67069—Apparatus for fluid treatment for etching for drying etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67098—Apparatus for thermal treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0216—Coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0216—Coatings
- H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/02167—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0236—Special surface textures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0236—Special surface textures
- H01L31/02366—Special surface textures of the substrate or of a layer on the substrate, e.g. textured ITO/glass substrate or superstrate, textured polymer layer on glass substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
- H01L31/036—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes
- H01L31/0376—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including amorphous semiconductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/186—Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
- H01L31/1868—Passivation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1876—Particular processes or apparatus for batch treatment of the devices
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02S—GENERATION OF ELECTRIC POWER BY CONVERSION OF INFRARED RADIATION, VISIBLE LIGHT OR ULTRAVIOLET LIGHT, e.g. USING PHOTOVOLTAIC [PV] MODULES
- H02S50/00—Monitoring or testing of PV systems, e.g. load balancing or fault identification
- H02S50/10—Testing of PV devices, e.g. of PV modules or single PV cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67092—Apparatus for mechanical treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
- H01L21/67271—Sorting devices
Definitions
- the invention relates to the field of manufacturing and application of solar crystalline silicon shingled battery module packaging, in particular, to a method and system for manufacturing shingled battery cells and shingled photovoltaic components.
- Photovoltaic cells are devices that use the photoelectric effect to convert light energy into electrical energy.
- the most common is crystalline silicon cells.
- photovoltaic modules are the inevitable trend to improve their conversion efficiency and develop efficient modules.
- Shingled photovoltaic modules are high-performance, high-density photovoltaic cell modules based on lamination technology. Compared with traditional photovoltaic cell modules, shingled photovoltaic modules connect photovoltaic cells in a tighter way to The front main grid line overlaps with the back main grid line on the back side of another cell, which minimizes the gap between the cells, effectively reduces the inefficient power generation space caused by the battery interval, so it can be laid in the same unit area. Multi-cell, increase the light absorption area, improve the conversion efficiency of photovoltaic modules.
- Shingled photovoltaic modules are generally formed by cutting and splitting the entire cell into small pieces and then interconnecting and packaging with conductive adhesive.
- the production process of shingled photovoltaic modules follows the process flow of conventional photovoltaic cells and modules, that is, the whole cell product is produced in the battery production link of the solar cell factory, and the whole cell is diced and cut in the module production link of the photovoltaic module packaging plant. Split into small pieces of cells and encapsulate them into shingled photovoltaic modules through the shingling process.
- This production process can not meet the requirements of effective grading, but also brings the drawback of repeated testing. The main reason is that due to the intra-chip differences in the manufacturing process of the whole battery, the small pieces of the battery after cutting are inconsistent.
- the module production link also needs to add an additional battery chip segmentation process. This repeated testing and sorting will not only cause waste of working hours and increase costs, but also greatly increase the risk of splitting.
- the present invention provides a method and system for manufacturing shingled cells and shingled photovoltaic modules.
- the present invention provides a method for manufacturing shingled battery cells, wherein the shingled battery cells are subjected to online cutting and splitting during the battery production process, and a plurality of shingled battery cells formed therefrom are tested and sorted .
- the method includes the following steps:
- Pre-processing pre-treating the silicon wafer
- Post-processing respectively post-processing multiple shingled battery cells.
- the pretreatment includes the following steps:
- Diffusion bonding the diffusion bonding of the silicon wafer to form a PN junction in the silicon wafer
- For coating deposit one or more anti-reflection films on the front of the silicon wafer, and deposit a back passivation film on the back of the silicon wafer.
- the pretreatment includes the following steps:
- Coating depositing amorphous silicon on the surface of the silicon wafer, and depositing a transparent conductive oxide film on the surface of the amorphous silicon.
- the pretreatment includes the following steps:
- Diffusion junction diffuse P-type layer on the front of the silicon wafer to form a PN junction in the silicon wafer;
- the tunnel oxide layer and the polysilicon layer are prepared, a silicon dioxide layer is formed on the back of the silicon wafer, and a polysilicon layer is formed on the silicon dioxide layer;
- Ion implantation in which phosphorus atoms are implanted into the polysilicon layer by ion implantation
- Coating deposit the first film on the front of the silicon wafer, and then deposit the second film on the front and back of the silicon wafer.
- the liquid remaining in the texturing step is washed before the diffusion knotting step.
- the PN junction at the edge of the silicon wafer is removed by plasma etching in the etching step.
- the phosphorosilicate glass formed on the surface of the silicon wafer in the diffusion bonding step is removed before the coating step.
- the anti-reflection film includes a silicon nitride anti-reflection film.
- the liquid remaining in the texturing step is washed before the coating step.
- the surface of the silicon wafer is cleaned by a chemical solution before the coating step.
- boron tribromide is diffused on the front surface of the silicon wafer in the diffusion bonding step to form a P-type layer.
- the thickness of the silicon dioxide layer ranges from 1 nm to 2 nm, and the thickness of the polysilicon layer ranges from 100 nm to 200 nm.
- the first film is an aluminum oxide film
- the second film is a silicon nitride film.
- the post-processing includes performing test sorting and appearance inspection on a plurality of shingled battery cells.
- the cutting method of the online cutting sliver includes physical cutting and chemical cutting.
- the cutting method of the online cutting sliver includes laser cutting.
- the cutting method of the online cutting sliver includes wire cutting.
- laser cutting is performed on the surface side of the shingled battery sheet away from the PN junction.
- the test sorting includes electrical performance test and electroluminescence test.
- the appearance inspection includes appearance visual testing and color sorting.
- the post-processed shingled battery cells are classified.
- the present invention also provides a method for manufacturing shingled photovoltaic modules, which includes the following steps:
- the shingled cell chip is made into shingled photovoltaic module by shingling process.
- the present invention also provides a system for manufacturing shingled cells, which is characterized by comprising:
- Pretreatment equipment used for pretreatment of silicon wafers
- Screen printing equipment which receives the silicon wafer output by the pretreatment equipment, and prints the precious metal paste on the surface of the pretreated silicon wafer by screen printing;
- Sintering and curing equipment which receives the silicon wafer output by the screen printing equipment, and performs high temperature sintering and curing of the silicon wafer to form a shingled battery wafer;
- An online cutting and splitting device which receives the shingled battery slices output by the sintering and curing device, and performs on-line cutting and splitting of the shingled battery slices to form a plurality of shingled battery pieces;
- a post-processing device which receives a plurality of shingled battery cells output from an online cutting and splitting device, and performs post-processing on the plurality of shingled battery cells.
- the pretreatment equipment includes the following equipment:
- Diffusion knotting equipment which receives the silicon wafer output from the texturing equipment, and diffuses the silicon wafer to form a PN junction in the silicon wafer;
- An etching device which receives the silicon wafer output by the diffusion bonding device, and removes the PN junction at the edge of the silicon wafer by etching;
- a coating device which receives the silicon wafer output by the etching device, deposits one or more anti-reflection films on the front of the silicon wafer, and deposits a back passivation film on the back of the silicon wafer.
- the pretreatment equipment includes the following equipment:
- the coating equipment receives the silicon wafer output from the texturing equipment, deposits amorphous silicon on the surface of the silicon wafer, and deposits a transparent conductive oxide film on the surface of the amorphous silicon.
- the pretreatment equipment includes the following equipment:
- Diffusion bonding device which receives the silicon wafer output from the texturing device, and diffuses the P-type layer on the front of the silicon wafer to form a PN junction in the silicon wafer;
- Etching equipment which receives the silicon wafer output from the diffusion bonding device, and removes the P-type layer on the back and edge of the silicon wafer and impurities formed on the surface of the silicon chip in the diffusion bonding device by etching;
- Tunnel oxide layer and polysilicon layer preparation equipment which receives the silicon wafer output from the etching device, forms a silicon dioxide layer on the back of the silicon wafer and forms a polysilicon layer on the silicon dioxide layer;
- An ion implantation device which receives the silicon wafer output from the tunnel oxide layer and the polysilicon layer preparation device, and implants phosphorus atoms into the polysilicon layer by ion implantation;
- Annealing equipment which receives the silicon wafer output by the ion implantation equipment, and activates the implanted phosphorus atoms through annealing;
- Coating equipment which receives the silicon wafer output from the annealing equipment, and deposits a first layer of film on the front of the silicon wafer, and then deposits a second layer of film on the front and back of the silicon wafer.
- the post-processing equipment includes equipment for testing and sorting multiple shingled battery cells and equipment for visual inspection.
- the online cutting device includes a physical cutting device and a chemical cutting device.
- the online cutting device includes a laser cutting device.
- the wire cutting and splitting device includes a wire cutting device.
- the on-line cutting and splitting device performs laser cutting on the surface side of the shingled battery sheet away from the PN junction.
- the etching device includes a plasma etching device.
- the anti-reflection film includes a silicon nitride anti-reflection film.
- the tunnel oxide layer and polysilicon layer preparation equipment includes a low-pressure chemical vapor deposition device, which forms a silicon dioxide layer with a thickness of 1 nm-2 nm on the back of the silicon wafer and forms on the silicon dioxide layer
- the polysilicon layer is 100nm-200nm thick.
- the coating equipment deposits an aluminum oxide film on the front surface of the silicon wafer, and then deposits a silicon nitride film on the front and back surfaces of the silicon wafer.
- the equipment for testing and sorting multiple shingled battery cells includes electrical performance testing equipment and electroluminescence testing equipment.
- the equipment for visually inspecting a plurality of shingled battery cells includes appearance visual testing equipment and color sorting equipment.
- the method for manufacturing shingled cells and shingled photovoltaic modules completes the packaging of small cells by cutting the slivers online at the cell production stage and sorting the small pieces.
- Lamination assembly can realize seamless connection of shingled cell and shingled photovoltaic module production and processing process, reducing repetitive processing actions, reducing the risk and cost of splitting, and can optimize the cell current of shingled photovoltaic module Matching and appearance color consistency.
- FIG. 1 shows a method for manufacturing shingled battery cells according to a preferred embodiment of the present invention.
- FIG. 2A shows a pretreatment step for manufacturing shingled battery cells according to a preferred embodiment of the present invention.
- FIG. 2B shows a pretreatment step for manufacturing shingled cells according to another preferred embodiment of the present invention.
- FIG. 2C shows a pretreatment step for manufacturing shingled cells according to yet another preferred embodiment of the present invention.
- FIG. 3 shows a method for manufacturing shingled photovoltaic modules according to a preferred embodiment of the present invention.
- FIG. 4 shows a system for manufacturing shingled cells according to a preferred embodiment of the present invention.
- FIG. 1 shows a method for manufacturing a shingled battery sheet according to a preferred embodiment of the present invention. As shown in the figure, it mainly includes a pretreatment step, a screen printing step, a sintering and curing step, and an online cutting and splitting step And post-processing steps. Among them, different types of cells can have different pre-processing steps. For conventional cells, the pre-processing steps are shown in Figure 2A, which mainly include:
- the single / polycrystalline silicon wafer is surface-textured to obtain a good suede structure, thereby increasing the surface area of the silicon wafer to receive more photons (energy) while reducing the reflection of incident light.
- the liquid remaining during texturing can be washed to reduce the influence of acidic and alkaline substances on the battery knotting.
- Diffusion binding step Phosphorus oxychloride is reacted with a silicon wafer to obtain phosphorus atoms. After a period of time, phosphorus atoms enter the surface layer of the silicon wafer, and penetrate into the silicon wafer through the gaps between the silicon atoms or ion implantation to form the interface between the N-type semiconductor and the P-type semiconductor, and the diffusion bonding process is completed , To achieve the conversion of light energy to electrical energy. It can be understood that other types of cell bonding techniques can replace this step.
- the diffusion bonding process will form a layer of phosphorous silicate glass on the surface of the silicon wafer, optionally, the effect on the efficiency of the shingled battery can be reduced through the process of dephosphorizing silicon glass.
- Etching steps Since the diffusion junction forms a short-circuit channel at the edge of the silicon wafer, the photogenerated electrons collected on the front side of the PN junction will flow along the edge of the phosphorus diffused area to the back of the PN junction and cause a short circuit.
- the edge PN junction is removed by etching to avoid short circuit caused by the edge.
- the pre-processing steps described above are described for the production process of conventional shingled cells. It can be understood that for other P-type, N-type and various types of batteries, such as ordinary single-poly cells, passive emitter back contact cells (PERC), heterojunction cells (HJT), tunnel oxide passivation contacts
- the battery (TopCon) can be replaced with the corresponding preparation process.
- the pretreatment steps in the manufacturing process of the heterojunction battery mainly include:
- the single / polycrystalline silicon wafer is surface-textured to obtain a good suede structure, thereby increasing the surface area of the silicon wafer to receive more photons, while reducing the reflection of incident light.
- the liquid remaining during texturing can be washed to reduce the influence of acidic and alkaline substances on the battery knotting.
- Amorphous silicon is deposited on both surfaces of the silicon wafer, and a transparent conductive oxide film (TCO) is deposited on the surface of the amorphous silicon.
- TCO transparent conductive oxide film
- FIG. 2C The preparation process of the tunnel oxide passivation contact cell (TopCon) is shown in Figure 2C, which mainly includes:
- the surface of the silicon wafer is texturized to obtain a good textured structure, thereby increasing the surface area of the silicon wafer to receive more photons (energy), while reducing the reflection of incident light.
- boron tribromide is diffused to the surface of the silicon wafer to form a P-type layer, and then a PN junction is formed in the silicon wafer.
- a certain concentration of acid is used to etch away the P-type layer formed on the back of the silicon wafer and the edge of the silicon wafer in the diffusion bonding process, and at the same time remove impurities formed on the surface of the silicon wafer during the diffusion bonding process, such as borosilicate glass .
- the preparation steps of the tunnel oxide layer and the polysilicon layer are performed in a low-pressure chemical vapor deposition device, for example, an ultra-thin silicon dioxide layer is formed on the back of the silicon wafer by thermal oxidation, with a thickness of about 1nm-2nm (eg 1.5nm) Then, a polysilicon layer mixed with an amorphous silicon phase and a microcrystalline silicon phase is stacked on the silicon dioxide layer, and its thickness is about 100 nm-200 nm (for example, 150 nm).
- a low-pressure chemical vapor deposition device for example, an ultra-thin silicon dioxide layer is formed on the back of the silicon wafer by thermal oxidation, with a thickness of about 1nm-2nm (eg 1.5nm)
- a polysilicon layer mixed with an amorphous silicon phase and a microcrystalline silicon phase is stacked on the silicon dioxide layer, and its thickness is about 100 nm-200 nm (for example, 150 nm).
- phosphorus atoms are implanted in the polysilicon layer by ion implantation.
- the implanted phosphorus atoms are activated through a high-temperature annealing process, and at the same time, the amorphous phase and the microcrystalline phase in the polycrystalline silicon layer are transformed into the polycrystalline phase.
- the surface of the silicon wafer can be cleaned optionally with a chemical solution.
- an atomic layer deposition (ALD) method is used to deposit a passivation film on the surface of the silicon wafer, such as an aluminum oxide film, and then plasma enhanced chemical vapor deposition (PECVD) is used on the front surface of the silicon wafer.
- PECVD plasma enhanced chemical vapor deposition
- the other film can be a silicon nitride film.
- photo-generated positive load carriers can be generated, and then the collection of photo-generated carriers needs to be completed.
- the precious metal paste (for example, silver paste, aluminum paste, etc.) can be printed on the pretreated silicon wafer according to a specific shingled cell metallization pattern by, for example, screen printing.
- the screen-printed silicon wafer is sintered and solidified at high temperature to achieve effective ohmic contact and form a shingled battery wafer.
- Step of cutting the sliver online The entire sintered shingled battery sheet is subjected to online laser cutting and splitting.
- the cutting method of the present invention may be any suitable physical or chemical cutting method, such as laser cutting.
- the sintered shingled battery sheet is put into the dicing detection position for visual inspection, and the OK piece with good appearance detection is visually positioned, and the defective appearance detection will be automatically shunted to the NG (bad) position.
- the multi-track dicing machine or the preset buffer stack area can be freely set according to the online production cycle to achieve online continuous operation.
- the relevant parameters of the laser can be set according to the optimal effect of cutting the lobes, so as to achieve a faster cutting speed, a narrower cutting heat affected zone and a cutting line width, better uniformity, and a predetermined cutting depth.
- the on-line laser scribing machine automatic breaking mechanism completes the split at the cutting position, so as to realize the natural separation of the shingled battery small pieces. It should be noted that in order to avoid the leakage current of the PN junction being damaged during the cutting process, it is preferable to select the surface away from the PN junction side as the laser cutting surface. Therefore, in order to adjust the direction of the front and back sides of the battery slice, a separate 180-degree change can be added ⁇ ⁇ To the device.
- the post-processing step may include:
- the shingled battery chips after cutting and separation can be entered into the online test unit in order, for example, it can include an electrical performance (IV) test unit, an electroluminescence (EL) test unit, an appearance visual (VI) test unit, etc. Testing and sorting of battery chips.
- IV electrical performance
- EL electroluminescence
- VI appearance visual
- the shingled battery chips after the test sorting can be color sorted.
- FIG. 3 shows a method for manufacturing a shingled photovoltaic module according to a preferred embodiment of the present invention, which mainly includes the following steps:
- a shingled battery chip manufactured by the method of the embodiment described above is received.
- FIG. 4 shows a system for manufacturing shingled cells according to a preferred embodiment of the present invention. As shown in the figure, it mainly includes pretreatment equipment, screen printing equipment, sintering and curing equipment, online cutting and splitting equipment and post-processing equipment. Among them, different types of cells can have different pretreatment equipment. For conventional cells, the pretreatment equipment mainly includes:
- Texturing equipment which is used for surface texturing of single / polycrystalline silicon wafers to obtain a good textured structure, thereby increasing the surface area of the silicon wafer to receive more photons (energy), while reducing the reflection of incident light.
- the diffusion junction forms a short-circuit channel at the edge of the silicon wafer, the photogenerated electrons collected on the front side of the PN junction will flow along the edge of the area where phosphorus diffuses to the back of the PN junction and cause a short circuit. Therefore, etching equipment is required to receive the diffusion
- the silicon wafer output by the junction device, and the edge PN junction is etched and removed by, for example, plasma etching to avoid short circuit caused by the edge.
- Coating equipment in order to reduce the surface reflection of the silicon wafer and improve the conversion efficiency of the battery, it is necessary to deposit one or more layers of silicon nitride antireflection film on the surface of the silicon wafer.
- the coating equipment can be enhanced by plasma enhanced chemical vapor deposition (PECVD) process completes the preparation of anti-reflection film.
- PECVD plasma enhanced chemical vapor deposition
- a back passivation film can be deposited on the opposite side surface of the cell sheet by a coating device to reduce carrier recombination.
- the pre-processing equipment described above is described for the production process of conventional shingled cells. It can be understood that for other P-type, N-type and various types of batteries, such as ordinary single-poly cells, passive emitter back contact cells (PERC), heterojunction cells (HJT), tunnel oxide passivation contacts
- the battery (TopCon) can be replaced with the corresponding pretreatment equipment.
- the pretreatments required in the manufacture of heterojunction batteries mainly include:
- Texturing equipment which performs surface texturing on single / polycrystalline silicon wafers to obtain a good textured structure, thereby increasing the surface area of the silicon wafer to receive more photons while reducing the reflection of incident light.
- Coating equipment which receives the silicon wafer output from the texturing equipment, and deposits amorphous silicon on both surfaces of the silicon wafer, and deposits a transparent conductive oxide film (TCO) on the surface of the amorphous silicon.
- TCO transparent conductive oxide film
- FIG. 2C The pretreatment equipment required in the manufacturing process of the tunnel oxide passivation contact cell is shown in FIG. 2C, which mainly includes:
- a texturing device which performs surface texturing on a silicon wafer to obtain a good textured structure, thereby increasing the surface area of the silicon wafer to receive more photons (energy) while reducing the reflection of incident light.
- a diffusion junction manufacturing device which receives the silicon wafer output from the texturing apparatus, diffuses boron tribromide to the surface of the silicon wafer under high temperature conditions to form a P-type layer, and then forms a PN junction in the silicon wafer.
- Etching equipment which receives the silicon wafer output by the diffusion bonding device, uses a certain concentration of acid to etch away the P-type layer formed on the back of the silicon wafer and the edge of the silicon wafer in the diffusion bonding step, and removes the Impurities formed on the surface of the silicon wafer, such as borosilicate glass.
- Tunnel oxide layer and polysilicon layer preparation equipment which receives the silicon wafer output from the etching device, and forms an ultra-thin silicon dioxide layer on the back of the silicon wafer by thermal oxidation, with a thickness of about 1nm-2nm (for example, 1.5nm) Then, a polysilicon layer mixed with an amorphous silicon phase and a microcrystalline silicon phase is stacked on the silicon dioxide layer, and its thickness is about 100 nm-200 nm (for example, 150 nm).
- the tunnel oxide layer and polysilicon layer preparation equipment may be low-pressure chemical vapor deposition equipment.
- An ion implantation device which receives the silicon wafer output by the tunnel oxide layer and the polysilicon layer preparation device, and implants phosphorus atoms into the polysilicon layer by ion implantation.
- An annealing device which receives the silicon wafer output by the ion implantation device, activates the implanted phosphorus atoms through high-temperature annealing, and simultaneously transforms the amorphous phase and the microcrystalline phase in the polycrystalline silicon layer into a polycrystalline phase.
- Coating equipment which receives the silicon wafer output from the annealing equipment, uses an atomic layer deposition (ALD) method to deposit a passivating film, such as aluminum oxide film, on the surface of the silicon wafer, and then enhances the chemical vapor deposition by plasma (PECVD) method, another layer of film is deposited on the front and back of the silicon wafer to play a role of anti-reflection and protect the passivation film on the front of the silicon wafer, and at the same time to passivate the back surface of the silicon wafer.
- ALD atomic layer deposition
- PECVD chemical vapor deposition by plasma
- One layer of film may be a silicon nitride film.
- Screen printing equipment used to receive the silicon wafer output by the pretreatment equipment. After manufacturing and processing the above-mentioned equipment, the silicon wafer can generate photogenerated positive load carriers, and then the collection of photogenerated carriers needs to be completed.
- the precious metal paste (for example, silver paste, aluminum paste, etc.) can be printed on the pretreated silicon wafer according to a specific shingled cell metallization pattern by equipment such as screen printing.
- the sintering and curing device receives the silicon wafer output by the screen printing device, and sinters and solidifies the silicon wafer printed by the screen at a high temperature, so as to realize effective ohmic contact and form a shingled battery sheet.
- An online cutting and splitting device which receives the silicon wafer output by the sintering and curing device and performs online laser cutting and splitting of the entire sintered shingled battery cell.
- the cutting method adopted by the cutting and splitting device in the present invention may be any suitable physical or chemical cutting method, such as laser cutting.
- the sintered shingled battery sheet is put into the dicing detection position for visual inspection, and the OK piece with good appearance detection is visually positioned, and the defective appearance detection will be automatically shunted to the NG (bad) position.
- the multi-track dicing machine or the preset buffer stack area can be freely set according to the online production cycle to achieve online continuous operation.
- the relevant parameters of the laser can be set according to the optimal effect of cutting the lobes, so as to achieve a faster cutting speed, a narrower cutting heat affected zone and a cutting line width, better uniformity, and a predetermined cutting depth.
- the on-line laser scribing machine automatic breaking mechanism completes the split at the cutting position, so as to realize the natural separation of the shingled battery small pieces. It should be noted that in order to avoid the leakage current of the PN junction being damaged during the cutting process, it is preferable to select the surface away from the PN junction side as the laser cutting surface. Therefore, in order to adjust the direction of the front and back sides of the battery slice, a separate 180-degree change can be added ⁇ ⁇ To the device.
- Post-processing equipment which may include:
- the shingled battery chips after cutting and separation can be entered into the online test and sorting equipment in order, for example, it can include electrical performance (IV) testing equipment, electroluminescence (EL) testing equipment and appearance inspection equipment, etc. to complete individual battery chips Test sorting.
- IV electrical performance
- EL electroluminescence
- the visual inspection equipment may include visual appearance (VI) testing equipment and color sorting equipment.
- VI visual appearance testing equipment and color sorting equipment.
- the method for manufacturing shingled solar cells and shingled photovoltaic modules and the equipment for manufacturing shingled solar cells provided by the present invention advance the cutting and splitting steps to the battery production stage, and the cut small cells After testing and sorting, the photovoltaic module production link can be directly assembled after receiving the small pieces of batteries and unpacking, which can realize the seamless docking of the production and processing process of shingled cells and shingled photovoltaic modules, reducing repeated processing actions .
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Electromagnetism (AREA)
- Plasma & Fusion (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- High Energy & Nuclear Physics (AREA)
- Sustainable Development (AREA)
- Life Sciences & Earth Sciences (AREA)
- Sustainable Energy (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Photovoltaic Devices (AREA)
- Roof Covering Using Slabs Or Stiff Sheets (AREA)
Abstract
Description
Claims (40)
- 一种用于制造叠瓦电池片的方法,其特征在于,在电池生产环节对叠瓦电池片进行在线切割裂片,并对由此形成的多个叠瓦电池小片进行测试分选。
- 根据权利要求1所述的方法,其特征在于包括以下步骤:预处理,对硅片进行预处理;丝网印刷,通过丝网印刷将贵金属浆料印刷在经预处理的硅片的表面;烧结固化,对经丝网印刷的硅片进行高温烧结固化以形成叠瓦电池片;在线切割裂片,对叠瓦电池片进行在线切割裂片以形成多个叠瓦电池小片;以及后处理,对多个叠瓦电池小片分别进行后处理。
- 根据权利要求2所述的方法,其特征在于,所述预处理包括以下步骤:制绒,对硅片进行表面制绒;扩散制结,对硅片进行扩散制结以在硅片内形成PN结;刻蚀,刻蚀去除硅片边缘的PN结;镀膜,在硅片正面沉积一层或多层减反射膜,并在硅片背面沉积背钝化膜。
- 根据权利要求2所述的方法,其特征在于,所述预处理包括以下步骤:制绒,对硅片进行表面制绒;镀膜,在硅片表面沉积非晶硅,并在非晶硅表面沉积透明导电氧化物薄膜。
- 根据权利要求2所述的方法,其特征在于,所述预处理包括以下步骤:制绒,对硅片进行表面制绒;扩散制结,在硅片正面扩散P型层以在硅片内形成PN结;刻蚀,刻蚀去除硅片背面和边缘的P型层以及扩散制结过程中硅片表面形成的杂质;隧道氧化层及多晶硅层制备,在硅片背面形成二氧化硅层,并在二氧化硅层上形成多晶硅层;离子注入,通过离子注入在多晶硅层中注入磷原子;退火,通过退火来激活注入的磷原子;镀膜,在硅片正面沉积第一层膜,然后在硅片的正面和背面沉积第二层膜。
- 根据权利要求3所述的方法,其特征在于,在扩散制结步骤之前清洗制绒步骤残留的液体。
- 根据权利要求3所述的方法,其特征在于,在刻蚀步骤中通过等离子刻蚀去除硅片边缘的PN结。
- 根据权利要求3所述的方法,其特征在于,在镀膜步骤之前去除扩散制结步骤中在硅片表面形成的磷硅玻璃。
- 根据权利要求3所述的方法,其特征在于,所述减反射膜包括氮化硅减反射膜。
- 根据权利要求4所述的方法,其特征在于,在镀膜步骤之前清洗制绒步骤残留的液体。
- 根据权利要求5所述的方法,其特征在于,在镀膜步骤之前通过化学溶液清洗硅片表面。
- 根据权利要求5所述的方法,其特征在于,在扩散制结步骤中在硅片正面扩散三溴化硼以形成P型层。
- 根据权利要求5所述的方法,其特征在于,在刻蚀步骤中通过酸来进行刻蚀,并且所述杂质为硼硅玻璃。
- 根据权利要求5所述的方法,其特征在于,所述二氧化硅层的厚度范围为1nm-2nm,所述多晶硅层的厚度范围为100nm-200nm。
- 根据权利要求5所述的方法,其特征在于,所述第一层膜为三氧化二铝膜,所述第二层膜为氮化硅膜。
- 根据权利要求3-5中任一权利要求所述的方法,其特征在于,所述后处理包括对多个叠瓦电池小片进行测试分选和外观检验。
- 根据权利要求3-5中任一权利要求所述的方法,其特征在于,在线切割裂片的切割方式包括物理切割和化学切割。
- 根据权利要求3-5中任一权利要求所述的方法,其特征在于,在线切割裂片的切割方式包括激光切割。
- 根据权利要求3-5中任一权利要求所述的方法,其特征在于,在线切割裂片的切割方式包括线切割。
- 根据权利要求3-5中任一权利要求所述的方法,其特征在于,在叠瓦电池片的远离PN结的表面一侧进行激光切割。
- 根据权利要求16所述的方法,其特征在于,测试分选包括电性能测试和电致发光测试。
- 根据权利要求16所述的方法,其特征在于,外观检验包括外观视觉测试和颜色分选。
- 根据权利要求3-5中任一权利要求所述的方法,其特征在于,对经后处理的叠瓦电池小片进行分档。
- 一种用于制造叠瓦光伏组件的方法,其特征在于包括以下步骤:接收通过根据权利要求1-23所述的方法制造的叠瓦电池小片;通过叠瓦工艺将所述叠瓦电池小片制作成叠瓦光伏组件。
- 一种用于制造叠瓦电池片的系统,其特征在于包括:预处理设备,用于对硅片进行预处理;丝网印刷设备,其接收预处理设备输出的硅片,并通过丝网印刷将贵金属浆料印刷在经预处理的硅片的表面;烧结固化设备,其接收丝网印刷设备输出的硅片,并对硅片进行高温烧结固化以形成叠瓦电池片;在线切割裂片设备,其接收烧结固化设备输出的叠瓦电池片,并对叠瓦电池片进行在线切割裂片以形成多个叠瓦电池小片;以及后处理设备,其接收在线切割裂片设备输出的多个叠瓦电池小片,并对多个叠瓦电池小片分别进行后处理。
- 根据权利要求25所述的系统,其特征在于,所述预处理设备包括以下设备:制绒设备,用于对硅片进行表面制绒;扩散制结设备,其接收制绒设备输出的硅片,并对硅片进行扩散制结以在硅片内形成PN结;刻蚀设备,其接收扩散制结设备输出的硅片,并通过刻蚀去除硅片边缘的PN结;镀膜设备,其接收刻蚀设备输出的硅片,并在硅片正面沉积一层或多层减反射膜,在硅片背面沉积背钝化膜。
- 根据权利要求25所述的系统,其特征在于,所述预处理设备包括以下设备:制绒设备,用于对硅片进行表面制绒;镀膜设备,其接收制绒设备输出的硅片,并在硅片表面沉积非晶硅,在非晶硅表面沉积透明导电氧化物薄膜。
- 根据权利要求25所述的系统,其特征在于,所述预处理设备包括以下设备:制绒设备,对硅片进行表面制绒;扩散制结设备,其接收制绒设备输出的硅片,并在硅片正面扩散P型层以在硅片内形成PN结;刻蚀设备,其接收扩散制结设备输出的硅片,通过刻蚀去除硅片背面和边缘的P型层以及扩散制结设备中硅片表面形成的杂质;隧道氧化层及多晶硅层制备设备,其接收刻蚀设备输出的硅片,在硅片背面形成二氧化硅层并在二氧化硅层上形成多晶硅层;离子注入设备,其接收隧道氧化层及多晶硅层制备设备输出的硅片,并以离子注入方式在多晶硅层中注入磷原子;退火设备,其接收离子注入设备输出的硅片,并通过退火来激活注入的磷原子;镀膜设备,其接收退火设备输出的硅片,并在硅片正面沉积第一层膜,然后在硅片的正面和背面沉积第二层膜。
- 根据权利要求26-28中任一权利要求所述的系统,其特征在于,所述后处理设备包括对多个叠瓦电池小片进行测试分选的设备和进行外观检验的设备。
- 根据权利要求26-28中任一权利要求所述的系统,其特征在于,在线切割裂片设备包括物理切割设备和化学切割设备。
- 根据权利要求26-28中任一权利要求所述的系统,其特征在于,在线切割裂片设备包括激光切割设备。
- 根据权利要求26-28中任一权利要求所述的系统,其特征在于,在线切割裂片设备包括线切割设备。
- 根据权利要求26-28中任一权利要求所述的系统,其特征在于,在线切割裂片设备在叠瓦电池片的远离PN结的表面一侧进行激光切割。
- 根据权利要求26所述的系统,其特征在于,刻蚀设备包括等离子刻蚀设备。
- 根据权利要求26所述的系统,其特征在于,所述减反射膜包括氮化硅减反射膜。
- 根据权利要求28所述的系统,其特征在于,刻蚀设备包括酸刻蚀设备。
- 根据权利要求28所述的系统,其特征在于,隧道氧化层及多晶硅层制备设备包括低压化学气相层积设备,其在硅片背面形成厚度为1nm-2nm的二氧化硅层并在二氧化硅层上形成厚度为100nm-200nm多晶硅层。
- 根据权利要求28所述的系统,其特征在于,镀膜设备在硅片正面沉积三氧化二铝膜,然后在硅片的正面和背面沉积氮化硅膜。
- 根据权利要求29所述的系统,其特征在于,所述对多个叠瓦电池小片进行测试分选的设备包括电性能测试设备和电致发光测试设备。
- 根据权利要求29所述的系统,其特征在于,对多个叠瓦电池小片进行外观检验的设备包括外观视觉测试设备和颜色分选设备。
Priority Applications (9)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AU2018409644A AU2018409644C1 (en) | 2018-11-23 | 2018-12-06 | Method and system for manufacturing solar cells and shingled solar cell modules |
EP18899028.7A EP3686940A1 (en) | 2018-11-23 | 2018-12-06 | Method and system for manufacturing shingled solar cell sheet and shingled photovoltaic assembly |
JP2019530094A JP6985393B2 (ja) | 2018-11-23 | 2018-12-06 | 板葺きソーラーセルと板葺きソーラーモジュールを製造するための方法とシステム |
KR1020197015897A KR20200064028A (ko) | 2018-11-23 | 2018-12-06 | 슁글 셀 및 슁글드 광발전 모듈의 제조 방법 및 시스템 |
PCT/CN2018/119526 WO2020103197A1 (zh) | 2018-11-23 | 2018-12-06 | 叠瓦电池片和叠瓦光伏组件的制造方法和系统 |
KR1020207007978A KR102425420B1 (ko) | 2018-11-23 | 2018-12-06 | 슁글 셀 및 슁글드 광발전 모듈의 제조 방법 및 시스템 |
US16/553,111 US10825742B2 (en) | 2018-11-23 | 2019-08-27 | Method and system for manufacturing solar cells and shingled solar cell modules |
US17/039,905 US10991633B2 (en) | 2018-11-23 | 2020-09-30 | Method and system for manufacturing solar cells and shingled solar cell modules |
US17/039,917 US10991634B2 (en) | 2018-11-23 | 2020-09-30 | Method and system for manufacturing solar cells and shingled solar cell modules |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201811410350.X | 2018-11-23 | ||
CN201811410350.XA CN111223958B (zh) | 2018-11-23 | 2018-11-23 | 叠瓦电池片和叠瓦光伏组件的制造方法和系统 |
PCT/CN2018/119526 WO2020103197A1 (zh) | 2018-11-23 | 2018-12-06 | 叠瓦电池片和叠瓦光伏组件的制造方法和系统 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US16/553,111 Continuation US10825742B2 (en) | 2018-11-23 | 2019-08-27 | Method and system for manufacturing solar cells and shingled solar cell modules |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2020103197A1 true WO2020103197A1 (zh) | 2020-05-28 |
Family
ID=70804439
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/CN2018/119526 WO2020103197A1 (zh) | 2018-11-23 | 2018-12-06 | 叠瓦电池片和叠瓦光伏组件的制造方法和系统 |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP3686940A1 (zh) |
JP (1) | JP6985393B2 (zh) |
KR (2) | KR20200064028A (zh) |
WO (1) | WO2020103197A1 (zh) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20240003378A (ko) | 2022-06-30 | 2024-01-09 | 한국전자기술연구원 | 슁글드 태양광 모듈 제조장치 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9935222B1 (en) * | 2017-03-09 | 2018-04-03 | Flex Ltd. | Shingled array solar cells and method of manufacturing solar modules including the same |
US20180175233A1 (en) * | 2016-12-21 | 2018-06-21 | Solarcity Corporation | Alignment markers for precision automation of manufacturing solar panels and methods of use |
CN108574025A (zh) * | 2018-05-21 | 2018-09-25 | 保定易通光伏科技股份有限公司 | 叠瓦组件的制作方法 |
CN108807575A (zh) * | 2018-06-04 | 2018-11-13 | 浙江宝利特新能源股份有限公司 | 一种mbb多主栅电池片叠片组件的制备方法 |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
AU2095083A (en) * | 1982-11-09 | 1984-05-17 | Energy Conversion Devices Inc. | Laminated strip of large area solar cells |
WO2010135321A2 (en) * | 2009-05-19 | 2010-11-25 | Applied Materials, Inc. | Method and apparatus for solar cell production line control and process analysis |
KR20130048975A (ko) * | 2011-11-03 | 2013-05-13 | 현대중공업 주식회사 | 태양전지의 제조방법 |
KR101863068B1 (ko) * | 2011-12-01 | 2018-06-01 | 주성엔지니어링(주) | 태양전지 및 그 제조방법 |
US20130298973A1 (en) * | 2012-05-14 | 2013-11-14 | Silevo, Inc. | Tunneling-junction solar cell with shallow counter doping layer in the substrate |
JP2014220346A (ja) * | 2013-05-07 | 2014-11-20 | 株式会社村田製作所 | 太陽電池セルおよびその製造方法 |
CN109545863B (zh) * | 2014-05-27 | 2021-09-14 | 迈可晟太阳能有限公司 | 叠盖式太阳能电池模块 |
JP1676513S (zh) * | 2014-05-27 | 2021-01-12 | ||
CN104201240B (zh) * | 2014-08-29 | 2016-08-17 | 四川钟顺太阳能开发有限公司 | 一种太阳电池的生产工艺及其采用该工艺生产的太阳电池 |
KR102336219B1 (ko) * | 2015-01-21 | 2021-12-06 | 엘지전자 주식회사 | 태양 전지 및 이의 제조 방법 |
CN105895738A (zh) * | 2016-04-26 | 2016-08-24 | 泰州中来光电科技有限公司 | 一种钝化接触n型太阳能电池及制备方法和组件、系统 |
CN109673172B (zh) * | 2016-07-29 | 2022-10-14 | 迈可晟太阳能有限公司 | 沿非直线边缘重叠的叠盖式太阳能电池 |
NL2018356B1 (en) * | 2017-02-10 | 2018-09-21 | Tempress Ip B V | A method of manufacturing a passivated solar cell and resulting passivated solar cell |
-
2018
- 2018-12-06 EP EP18899028.7A patent/EP3686940A1/en active Pending
- 2018-12-06 JP JP2019530094A patent/JP6985393B2/ja active Active
- 2018-12-06 KR KR1020197015897A patent/KR20200064028A/ko unknown
- 2018-12-06 KR KR1020207007978A patent/KR102425420B1/ko active IP Right Grant
- 2018-12-06 WO PCT/CN2018/119526 patent/WO2020103197A1/zh unknown
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20180175233A1 (en) * | 2016-12-21 | 2018-06-21 | Solarcity Corporation | Alignment markers for precision automation of manufacturing solar panels and methods of use |
US9935222B1 (en) * | 2017-03-09 | 2018-04-03 | Flex Ltd. | Shingled array solar cells and method of manufacturing solar modules including the same |
CN108574025A (zh) * | 2018-05-21 | 2018-09-25 | 保定易通光伏科技股份有限公司 | 叠瓦组件的制作方法 |
CN108807575A (zh) * | 2018-06-04 | 2018-11-13 | 浙江宝利特新能源股份有限公司 | 一种mbb多主栅电池片叠片组件的制备方法 |
Non-Patent Citations (1)
Title |
---|
See also references of EP3686940A4 * |
Also Published As
Publication number | Publication date |
---|---|
EP3686940A4 (en) | 2020-07-29 |
JP6985393B2 (ja) | 2021-12-22 |
KR20210082389A (ko) | 2021-07-05 |
EP3686940A1 (en) | 2020-07-29 |
JP2021501548A (ja) | 2021-01-14 |
KR20200064028A (ko) | 2020-06-05 |
KR102425420B1 (ko) | 2022-07-27 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US10991633B2 (en) | Method and system for manufacturing solar cells and shingled solar cell modules | |
Booth | Laser Processing in Industrial Solar Module Manufacturing. | |
WO2014127067A1 (en) | Monolithically isled back contact back junction solar cells using bulk wafers | |
Untila et al. | Bifacial concentrator Ag‐free crystalline n‐type Si solar cell | |
Brendel et al. | High-efficiency cells from layer transfer: A first step toward thin-film/wafer hybrid silicon technologies | |
US20200381577A1 (en) | Method of manufacturing shingled solar modules | |
WO2019196162A1 (zh) | 制备用于叠瓦组件的太阳能电池片的方法和太阳能电池片 | |
WO2020103197A1 (zh) | 叠瓦电池片和叠瓦光伏组件的制造方法和系统 | |
CN112490312A (zh) | 一种能够降低切割损失的太阳能电池及制备方法 | |
Condorelli et al. | Initial results of enel green power silicon heterojunction factory and strategies for improvements | |
Kopecek et al. | Large area screen printed n-type silicon solar cells with rear aluminium emitter: efficiencies exceeding 16% | |
CN209298145U (zh) | 叠瓦电池片的制造系统 | |
AU2020100336A4 (en) | Method and system for manufacturing solar cells and shingled solar cell modules | |
Hezel | Novel back contact silicon solar cells designed for very high efficiencies and low-cost mass production | |
EP2355165A1 (en) | Photoelectric conversion device | |
Muñoz et al. | a-Si: H/c-Si heterojunction solar cells: a smart choice for high efficiency solar cells | |
Mihailetchi et al. | 17.4% Efficiency solar cells on large area and thin n-type silicon with screen-printed aluminum-alloyed rear emitter | |
Guo et al. | Edge passivation for small-area, high efficiency solar cells | |
Hezel | Progress in manufacturable high-efficiency silicon solar cells | |
Gee et al. | Towards a manufacturable back-contact emitter-wrap-through silicon solar cell | |
Geerligs et al. | Progression of n-type base crystalline silicon solar cells | |
CN117727822B (zh) | 太阳能电池、太阳能电池的制造方法及光伏组件 | |
Madon et al. | NICE module technology using industrial n-type solar cells without front and rear busbars | |
Upadhyaya et al. | Greater than 16% efficient screen printed solar cells on 115-170 μm thick cast multicrystalline Silicon | |
Saynova et al. | Comparison of high efficiency solar cells on n-type and p-type silicon wafers using identical processing |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
ENP | Entry into the national phase |
Ref document number: 2019530094 Country of ref document: JP Kind code of ref document: A |
|
ENP | Entry into the national phase |
Ref document number: 2018899028 Country of ref document: EP Effective date: 20190716 |
|
ENP | Entry into the national phase |
Ref document number: 2018899028 Country of ref document: EP Effective date: 20190718 |
|
ENP | Entry into the national phase |
Ref document number: 2018409644 Country of ref document: AU Date of ref document: 20181206 Kind code of ref document: A |
|
NENP | Non-entry into the national phase |
Ref country code: DE |