WO2020093407A1 - Substrat de réseau, panneau d'affichage et appareil d'affichage - Google Patents

Substrat de réseau, panneau d'affichage et appareil d'affichage Download PDF

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Publication number
WO2020093407A1
WO2020093407A1 PCT/CN2018/114944 CN2018114944W WO2020093407A1 WO 2020093407 A1 WO2020093407 A1 WO 2020093407A1 CN 2018114944 W CN2018114944 W CN 2018114944W WO 2020093407 A1 WO2020093407 A1 WO 2020093407A1
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Prior art keywords
source
projection
base substrate
sub
area
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PCT/CN2018/114944
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English (en)
Chinese (zh)
Inventor
何怀亮
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惠科股份有限公司
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Priority to US17/043,564 priority Critical patent/US11556037B2/en
Publication of WO2020093407A1 publication Critical patent/WO2020093407A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/13606—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit having means for reducing parasitic capacitance
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits

Definitions

  • the application relates to an array substrate, a display panel and a display device.
  • a pixel unit is often divided into a main area and a sub-area, where a pixel unit includes multiple sub-pixels, and then an independent main area pixel electrode is provided in the main area, and an independent sub-area pixel electrode is provided in the sub area
  • the pixel electrodes in the primary area and the pixel electrodes in the secondary area are alternately arranged to achieve multi-domain display.
  • TFT thin film transistor
  • Thin Film Transistor Thin Film Transistor
  • an array substrate, a display panel, and a display device are provided, by reducing the difference in the parasitic capacitances of the primary region and the secondary region, thereby solving the problem of residual effects in the exemplary technology.
  • An array substrate includes a first type active array switch provided in the main area and a second type active array switch provided in the secondary area;
  • the first type of active array switch includes: a first gate disposed on the base substrate and a first source disposed above the first gate, a projection of the first source on the base substrate and a first gate The area of the projected overlapping portion on the base substrate is the first overlapping area;
  • the second type of active array switch includes: a second gate electrode disposed on the base substrate and a second source electrode disposed above the second gate electrode, a projection of the second source electrode on the base substrate and a second gate electrode The area of the projected overlapping portion on the base substrate is the second overlapping area;
  • the first overlapping area is larger than the second overlapping area.
  • the array substrate further includes data lines, a plurality of pixel electrodes in the primary region and a plurality of pixel electrodes in the secondary region.
  • the first type of active array switch further includes a first drain
  • the second type of active array switch further includes a first Two drains, the first drain is connected to the data line, and the first source is connected to the corresponding pixel electrode in the main area;
  • the second drain is connected to the data line, and the second source is connected to the corresponding sub-region pixel electrode.
  • the projection of the first source on the base substrate and the projection of the second source on the base substrate are both strip-shaped, and the length of the projection of the first source on the base substrate is L1
  • the length of the projection of the second source on the base substrate is L2, where L1> L2.
  • the first source electrode includes a first sub-source electrode and a second sub-source electrode
  • the projection of the first sub-source electrode on the base substrate is a strip-shaped trace arranged along the first direction
  • the second The projection of the sub-source electrode on the base substrate is a strip-shaped trace arranged along the second direction
  • the first sub-source electrode and the second sub-source electrode are connected.
  • the second source electrode includes a third sub-source electrode and a fourth sub-source electrode
  • the projection of the third sub-source electrode on the base substrate is a strip trace arranged along the first direction
  • the fourth The projection of the sub-source electrode on the base substrate is a strip-shaped trace arranged along the second direction
  • the third sub-source electrode and the fourth sub-source electrode are connected.
  • the area of the overlapping portion of the projection of the first drain on the base substrate and the projection of the first gate on the base substrate is the third overlapping area
  • the second drain is on the base substrate
  • the area of the overlapping portion of the projection of the second grid and the projection of the second grid on the base substrate is the third overlapping area
  • the third overlapping area is smaller than the fourth overlapping area.
  • the overlapping area of the projection of the first drain on the base substrate and the projection of the first source on the base substrate is zero.
  • the overlapping area of the projection of the second drain on the base substrate and the projection of the second source on the base substrate is zero.
  • a display panel includes a color film substrate and an array substrate.
  • the array substrate includes a first type active array switch provided in the main area and a second type active array switch provided in the secondary area;
  • the first type of active array switch includes: a first gate disposed on the base substrate and a first source disposed above the first gate, a projection of the first source on the base substrate and a first gate The area of the projected overlapping portion on the base substrate is the first overlapping area;
  • the second type of active array switch includes: a second gate electrode disposed on the base substrate and a second source electrode disposed above the second gate electrode, a projection of the second source electrode on the base substrate and a second gate electrode The area of the projected overlapping portion on the base substrate is the second overlapping area;
  • the first overlapping area is larger than the second overlapping area.
  • the display panel further includes a data line, a plurality of pixel electrodes in the main area and a plurality of pixel electrodes in the sub-area.
  • the first type of active array switch further includes a first drain
  • the second type of active array switch further includes a first Two drains, the first drain is connected to the data line, and the first source is connected to the corresponding pixel electrode in the main area;
  • the second drain is connected to the data line, and the second source is connected to the corresponding sub-region pixel electrode.
  • the projection of the first source on the base substrate and the projection of the second source on the base substrate are both strip-shaped, and the length of the projection of the first source on the base substrate is L1
  • the length of the projection of the second source on the base substrate is L2, where L1> L2.
  • the first source electrode includes a first sub-source electrode and a second sub-source electrode
  • the projection of the first sub-source electrode on the base substrate is a strip-shaped trace arranged along the first direction
  • the second The projection of the sub-source electrode on the base substrate is a strip-shaped trace arranged along the second direction
  • the first sub-source electrode and the second sub-source electrode are connected.
  • the second source electrode includes a third sub-source electrode and a fourth sub-source electrode
  • the projection of the third sub-source electrode on the base substrate is a strip trace arranged along the first direction
  • the fourth The projection of the sub-source electrode on the base substrate is a strip-shaped trace arranged along the second direction
  • the third sub-source electrode and the fourth sub-source electrode are connected.
  • the area of the overlapping portion of the projection of the first drain on the base substrate and the projection of the first gate on the base substrate is the third overlapping area
  • the second drain is on the base substrate
  • the area of the overlapping portion of the projection of the second grid and the projection of the second grid on the base substrate is the third overlapping area
  • the third overlapping area is smaller than the fourth overlapping area.
  • the overlapping area of the projection of the first drain on the base substrate and the projection of the first source on the base substrate is zero.
  • the overlapping area of the projection of the second drain on the base substrate and the projection of the second source on the base substrate is zero.
  • a display device includes a backlight module and a display panel.
  • the display panel includes a color filter substrate and an array substrate.
  • the array substrate includes a first type active array switch provided in the main area and a second type active array switch provided in the secondary area.
  • the first type of active array switch includes: a first gate disposed on the base substrate and a first source disposed above the first gate, a projection of the first source on the base substrate and a first gate The area of the projected overlapping portion on the base substrate is the first overlapping area;
  • the second type of active array switch includes: a second gate electrode disposed on the base substrate and a second source electrode disposed above the second gate electrode, a projection of the second source electrode on the base substrate and a second gate electrode The area of the projected overlapping portion on the base substrate is the second overlapping area;
  • the first overlapping area is larger than the second overlapping area.
  • the display device further includes a data line, a plurality of pixel electrodes in the main area and a plurality of pixel electrodes in the sub-area.
  • the first type active array switch further includes a first drain
  • the second type active array switch further includes a first Two drains, the first drain is connected to the data line, and the first source is connected to the corresponding pixel electrode in the main area;
  • the second drain is connected to the data line, and the second source is connected to the corresponding sub-region pixel electrode.
  • the projection of the first source on the base substrate and the projection of the second source on the base substrate are both strip-shaped, and the length of the projection of the first source on the base substrate is L1
  • the length of the projection of the second source on the base substrate is L2, where L1> L2.
  • the first source electrode includes a first sub-source electrode and a second sub-source electrode
  • the projection of the first sub-source electrode on the base substrate is a strip-shaped trace arranged along the first direction
  • the second The projection of the sub-source electrode on the base substrate is a strip-shaped trace arranged along the second direction
  • the first sub-source electrode and the second sub-source electrode are connected.
  • FIG. 1 is a schematic structural diagram of a pixel design of thin film transistors with different domains in an exemplary technology
  • FIG. 2 is a schematic structural diagram of an array substrate in an embodiment
  • FIG. 3 is a schematic structural diagram of an array substrate in another embodiment
  • FIG. 4 is a schematic structural diagram of an array substrate in yet another embodiment
  • FIG. 5 is a schematic structural diagram of a display panel in an embodiment
  • FIG. 6 is a schematic structural diagram of a display device in an embodiment.
  • TFT Thin Film Transistor
  • TFT Thin Film Transistor
  • one sub-pixel is divided into multiple areas and each The liquid crystals in these areas fall down in different directions after being pressed, that is, a multi-domain design.
  • the commonly used multi-domain implementation technology is to design the pixel electrode as a slit-shaped electrode structure, but this pixel electrode structure will have a certain visual deviation in order to overcome this defect.
  • the engineering staff proposed a new framework to divide a pixel unit composed of one or more sub-pixels into a primary area and a secondary area.
  • a primary area thin film transistor 10 is provided in the primary area, and an independent secondary area thin film transistor 20 is provided in the secondary area.
  • the thin film transistor 10 in the main zone charges the pixel electrode 30 in the main zone
  • the thin film transistor 20 in the secondary zone charges the pixel electrode 40 in the secondary zone, so that the primary zone and the secondary zone generate different potentials to increase the viewing angle.
  • the source 11 of the main region thin-film transistor and the source 21 of the secondary region thin-film transistor mostly adopt the same design.
  • the main-region thin film The gate-source parasitic capacitance Cgs generated by the transistor 10 is smaller than the gate-source parasitic capacitance Cgs generated by the sub-region thin film transistor 20, so that the main region thin-film transistor 10 and the sub-region thin film transistor 20 require the most
  • the best common voltage is different.
  • the best common voltage of the thin film transistor 10 in the main area and the thin film transistor 20 in the secondary area are both reached, which is likely to cause image sticking due to the imbalance of the positive and negative polarities.
  • an embodiment of the present application provides an array substrate on the one hand, which includes a first type of active array switch 1 disposed in the main area and a secondary array
  • the first type of active array switch 1 includes: a first gate 101 disposed on the base substrate and a first source 102 disposed above the first gate 101, the first source The area of the overlapping part of the projection of the pole 102 on the base substrate and the projection of the first gate 101 on the base substrate is the first overlapping area
  • the second type of active array switch 2 includes: a first The area of the overlapping part of the second gate 201 and the second source 202 provided on the upper layer of the second gate 201, the projection of the second source 202 on the base substrate and the projection of the second gate 201 on the base substrate Is the second overlapping area; the first overlapping area is larger than the second overlapping area.
  • the base substrate is a substrate grown by an epitaxial layer, and plays a supporting and fixing role in the production and manufacturing process of the array substrate.
  • the first type of active array switch 1 refers to a thin film transistor disposed in the main area and used to drive the pixel electrode 4 in the main area.
  • the second type of active array switch 2 refers to a thin film transistor disposed in the sub-region and used to drive the pixel electrode 5 in the sub-region.
  • the overlapping part of the projection refers to the overlapping part of the two projections projected on the same plane.
  • the upper layer of the gate refers to being disposed on the side of the gate away from the base substrate, and it is not excluded that a gate insulating layer, a semiconductor material layer, etc. are spaced between the gate and the source (drain).
  • the first gate 101 of the first type of active array switch 1 is disposed on the base substrate and is corresponding to the first source 102, so that the projection of the first source 102 and the first gate 101 on the plane of the base substrate There is overlap, and the area of the overlapped portion is the first overlapping area.
  • the second gate 201 of the second type of active array switch 2 is disposed on the base substrate and is corresponding to the second source 202.
  • the projections of the second gate 201 and the second source 202 on the plane of the base substrate are The overlapping area, the area of the overlapping area is the second overlapping area.
  • the first overlapping area affects the gate-source parasitic capacitance of the first type of active array switch 1.
  • the size of the second overlapping area affects the gate-source parasitic capacitance of the second type of active array switch 2. According to the characteristics of the capacitor, it is easy to know that the larger the overlap area, the greater the corresponding parasitic capacitance.
  • the first overlap area and the second overlap area are the same, the first type of active array switch 1 and the second type of active array switch 2 When the charging rates are all optimal, the gate-source parasitic capacitance generated by the first type active array switch 1 is smaller than the gate-source parasitic capacitance generated by the second type active array switch 2.
  • the first overlapping area is larger than the second overlapping area to reduce the gate-source parasitic capacitance of the first type active array switch 1 and the gate-source parasitic capacitance of the second type active array switch 2
  • the difference between the gate-source parasitic capacitances of different regions will cause the image sticking caused by the optimal common voltage difference between the primary and secondary regions, improve the display effect of the display panel, reduce or avoid the occurrence of image sticking, Reduce the flashing level.
  • One sub-pixel may include a certain number of active array switches 1 of the first type and a certain number of active array switches 2 of the second type.
  • the array substrate further includes a data line 3, a plurality of primary area pixel electrodes 4 and a plurality of secondary area pixel electrodes 5, and the first type of active array switch 1 further includes A drain 103, the second type active array switch 2 further includes a second drain 203, the first drain 103 is connected to the data line 3, the first source 102 is connected to the corresponding pixel electrode 4 in the main region; the second drain 203 is connected The data line 3 and the second source electrode 202 are connected to the corresponding sub-region pixel electrode 5.
  • the pixel electrode 4 in the main area refers to a pixel electrode provided in the first type of active array switch 1.
  • the sub-region pixel electrode 5 refers to a pixel electrode provided on the second type active array switch 2.
  • the data line 3 is used to transmit the received image data to each thin film transistor to control the brightness of each thin film transistor to realize the display of the corresponding picture.
  • the first type active array switch 1 and the second type active array switch 2 both use a source-driven liquid crystal connection method, and the first drain 103 and the second drain 203 are both connected to the data line 3, and the first gate 101 and the second When the second gate 201 is turned on, the image data is loaded with a certain voltage on the first drain 103 and the second drain 203 through the data line 3, thereby changing the first source 102 and the second source 202 to be loaded on the corresponding main The voltage on the area pixel electrode 4 and the sub area pixel electrode 5. It should be noted that the arrangement direction of the first source electrode 102 is not limited.
  • the first source electrode 102 may be extended on the side of the pixel electrode 4 in the main region close to the first drain electrode 103, so that the first overlapping area is greater than The second overlap area. As shown in FIG. 4, the first source electrode 102 may also be extended on the side of the main region pixel electrode 4 away from the first drain 103 so that the first overlapping area is larger than the second overlapping area. The first source electrode 102 may also extend on both sides of the liquid crystal connected thereto.
  • the projection of the first source electrode 102 on the base substrate and the projection of the second source electrode 202 on the base substrate are both strip-shaped, and the first source electrode
  • the length of the projection of 102 on the base substrate is L1
  • the length of the projection of the second source 202 on the base substrate is L2, where L1> L2.
  • the projection of the first source electrode 102 on the base substrate does not limit the specific shape of the first source electrode 102 itself, but only the projection of the first source electrode 102 on the base substrate.
  • the projection of the second source electrode 202 on the base substrate The bar shape does not limit the specific shape of the second source 202 itself.
  • the length L1 of the projection of the first source 102 on the base substrate is greater than the length L2 of the projection of the second source 202 on the base substrate, which can improve the gate-source parasitic capacitance of the first type active array switch 1 and The difference between the gate-source parasitic capacitance of the second type of active array switch 2 to avoid image sticking.
  • the first source electrode 102 includes a first sub-source electrode 1021 and a second sub-source electrode 1022, and the projection of the first sub-source electrode 1021 on the base substrate is along the first In the direction of the strip trace, the projection of the second sub-source 1022 on the base substrate is a strip trace in the second direction, and the first sub-source 1021 and the second sub-source 1022 are connected.
  • the first source electrode 102 is composed of a plurality of sub-source electrodes.
  • the first source electrode 102 includes a plurality of first sub-source electrodes 1021 and a second sub-source electrode 1022.
  • the first sub-source electrode 1021 and the second sub-source electrode 1022 are on a substrate
  • the projections on the substrate are along the first direction and the second direction, that is, the array substrate is placed on a plane, when the base substrate is in contact with the plane, the array substrate is viewed from above, and the first sub-source electrode 1021 and the second sub-source electrode 1022 are connected
  • the first source electrode 102 has a fold line that extends and bends in different directions.
  • the first source electrode 102 may be a zigzag fold line when looking down on the array substrate.
  • the first sub-source 1021 and the second sub-source 1022 are two types of traces distinguished according to the direction of the projection, and do not limit the first sub-source 1021 and the second sub-source 1022. The number.
  • the second source 202 includes a third sub-source 2021 and a fourth sub-source 2022.
  • the projection of the third sub-source 2021 on the base substrate is along the first For the strip traces arranged in the direction, the projection of the fourth sub-source electrode 2022 on the base substrate is the strip traces arranged in the second direction, and the third sub-source electrode 2021 and the fourth sub-source electrode 2022 are connected.
  • the second source 202 may also be composed of multiple sub-sources, and the projections of the third sub-source 2021 and the fourth sub-source 2022 on the base substrate are along the first direction and
  • the second source electrode 202 is arranged in the second direction, and when viewed from above, the second source electrode 202 may be a broken line formed by strip line segments along the first direction and the second direction.
  • the projection of the second source electrode 202 on the base substrate may also be a zigzag fold line.
  • the area of the overlapping portion of the projection of the first drain 103 on the base substrate and the projection of the first gate 101 on the base substrate is the third overlapping area.
  • the overlapping area of the projection of the second drain 203 on the base substrate and the projection of the second gate 201 on the base substrate is the third overlapping area; the third overlapping area is smaller than the fourth overlapping area.
  • the overlapping portion of the projection of the first drain 103 and the first gate 101 on the base substrate is the third overlapping area
  • the overlapping portion of the projection of the second drain 203 and the second gate 201 on the base substrate is The area is the fourth overlapping area.
  • the solution provided by the embodiments of the present application reduces the third overlapping area of the first drain 103 corresponding to the first gate 101 on the base substrate to make the third overlapping area smaller than the fourth The overlapping area ensures the aperture ratio, thereby further improving the performance of the array substrate.
  • the first drain 103 is disposed above the first gate 101
  • the second drain 203 is disposed above the second gate 201, and may also be the first drain 103, the first source 102, and the second drain
  • the electrode 203 and the second source electrode 202 are provided on the same wiring layer.
  • the array substrate may be sequentially provided with a base substrate, a first gate 101 and a second gate 201 provided on the base substrate, and gate insulation provided on the first gate 101 and the second gate 201 Layer, an active layer provided on the gate insulating layer, a first drain 103, a first source 102, a second drain 203, and a second source 202 provided on the active layer, and covering the drain , Passivation layer of the source.
  • the overlapping area of the projection of the first drain 103 on the base substrate and the projection of the first source 102 on the base substrate is zero.
  • the projections of the two on the base substrate do not overlap, that is, there is no drain-source between the first drain 103 and the first source 102
  • the generation of parasitic capacitance can better improve the display performance of the array substrate.
  • the array substrate is placed on a plane, and when the base substrate is in contact with the plane, the array substrate is viewed from above, and the first drain electrode 103 and the first source electrode 102 are strip lines arranged at intervals. Intersection.
  • the overlapping area of the projection of the second drain electrode 203 on the base substrate and the projection of the second source electrode 202 on the base substrate is zero.
  • the projection of the second drain 203 on the base substrate and the projection of the second source 202 on the base substrate do not overlap.
  • a display panel as shown in FIG. 5, includes a color filter substrate 100 and the above array substrate 200.
  • the display panel provided by the embodiment of the present application is composed of the above-mentioned array substrate 200 and color filter substrate 100, and the color filter substrate 100 is correspondingly disposed with the array substrate 200.
  • the first type of active in the array substrate 200 The array switch and the second type of active array switch work at the same best common voltage. During the charging and discharging process, the first type of active array switch and the second type of active array switch can be completely discharged, and there is no residual power to avoid image retention. .
  • a display device includes a backlight module 111 and the above-mentioned display panel 112.
  • a display device provided by an embodiment of the present application provides a backlight light source when the backlight module 111 is in operation, and the first type active array switch and the second type active array switch on the display panel 112 are opened or driven by the driving circuit Off, the image data is transferred to the thin film transistors in the main area and the thin film transistors in the sub area through the data lines, changing the potential of the pixel electrodes in the main area and the pixel electrodes in the sub area, changing the deflection angle and sub area of the liquid crystal driven by the pixel electrodes The deflection angle of the liquid crystal driven by the pixel electrode, combined with the color filter substrate 100, displays a picture.
  • the display device provided by the embodiment of the present application has no image sticking during working and has good performance.

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Nonlinear Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Optics & Photonics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Liquid Crystal (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

Dans un substrat de réseau, une première zone de chevauchement entre des parties saillantes d'une première source et une première grille d'un commutateur à matrice active d'un premier type sur un substrat de base est supérieure à une seconde zone de chevauchement entre des parties saillantes d'une seconde source et une seconde grille d'une matrice active d'un second type sur le substrat de base.
PCT/CN2018/114944 2018-11-05 2018-11-12 Substrat de réseau, panneau d'affichage et appareil d'affichage WO2020093407A1 (fr)

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CN201811307911.3A CN109300920B (zh) 2018-11-05 2018-11-05 阵列基板、显示面板和显示装置
CN201811307911.3 2018-11-05

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CN110931504A (zh) * 2019-09-17 2020-03-27 深圳市华星光电半导体显示技术有限公司 阵列基板及显示面板
CN114038917A (zh) * 2021-11-30 2022-02-11 业成科技（成都）有限公司 薄膜晶体管阵列基板和显示装置

Citations (3)

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US20080143900A1 (en) * 2006-12-15 2008-06-19 Au Optronics Corporation Thin film transistor array substrate and pixel structure
US20090009673A1 (en) * 2005-03-15 2009-01-08 Sharp Kabushiki Kaisha Active Matrix Substance and Display Device Including the Same
CN201867560U (zh) * 2010-11-08 2011-06-15 京东方科技集团股份有限公司 阵列基板和液晶显示器

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CN1331241C (zh) * 2003-08-12 2007-08-08 友达光电股份有限公司 薄膜晶体管及具有此种薄膜晶体管的像素结构
TWI445180B (zh) * 2011-09-28 2014-07-11 E Ink Holdings Inc 陣列基板及使用其之顯示裝置
KR101973584B1 (ko) * 2012-02-10 2019-04-30 삼성디스플레이 주식회사 박막 트랜지스터 표시판 및 이를 포함하는 액정 표시 장치
KR102473306B1 (ko) * 2015-11-18 2022-12-05 삼성디스플레이 주식회사 표시 장치
CN105717690A (zh) * 2016-04-27 2016-06-29 武汉华星光电技术有限公司 内嵌触摸屏及其制备方法、液晶显示器

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Publication number Priority date Publication date Assignee Title
US20090009673A1 (en) * 2005-03-15 2009-01-08 Sharp Kabushiki Kaisha Active Matrix Substance and Display Device Including the Same
US20080143900A1 (en) * 2006-12-15 2008-06-19 Au Optronics Corporation Thin film transistor array substrate and pixel structure
CN201867560U (zh) * 2010-11-08 2011-06-15 京东方科技集团股份有限公司 阵列基板和液晶显示器

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CN109300920A (zh) 2019-02-01
US11556037B2 (en) 2023-01-17
US20210026177A1 (en) 2021-01-28

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