WO2020074201A1 - Leiterplatte - Google Patents
Leiterplatte Download PDFInfo
- Publication number
- WO2020074201A1 WO2020074201A1 PCT/EP2019/074269 EP2019074269W WO2020074201A1 WO 2020074201 A1 WO2020074201 A1 WO 2020074201A1 EP 2019074269 W EP2019074269 W EP 2019074269W WO 2020074201 A1 WO2020074201 A1 WO 2020074201A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- circuit board
- printed circuit
- electronic components
- cover material
- free
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
- H05K3/284—Applying non-metallic protective coatings for encapsulating mounted components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
- H05K1/0203—Cooling of mounted components
- H05K1/0204—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate
- H05K1/0206—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate by printed thermal vias
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K5/00—Casings, cabinets or drawers for electric apparatus
- H05K5/0026—Casings, cabinets or drawers for electric apparatus provided with connectors and printed circuit boards [PCB], e.g. automotive electronic control units
- H05K5/0082—Casings, cabinets or drawers for electric apparatus provided with connectors and printed circuit boards [PCB], e.g. automotive electronic control units specially adapted for transmission control units, e.g. gearbox controllers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0254—High voltage adaptations; Electrical insulation details; Overvoltage or electrostatic discharge protection ; Arrangements for regulating voltages or for using plural voltages
- H05K1/0257—Overvoltage protection
- H05K1/0259—Electrostatic discharge [ESD] protection
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0266—Marks, test patterns or identification means
- H05K1/0268—Marks, test patterns or identification means for electrical inspection or testing
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
- H05K1/116—Lands, clearance holes or other lay-out details concerning the surrounding of a via
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09509—Blind vias, i.e. vias having one side closed
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09509—Blind vias, i.e. vias having one side closed
- H05K2201/09518—Deep blind vias, i.e. blind vias connecting the surface circuit to circuit layers deeper than the first buried circuit layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09536—Buried plated through-holes, i.e. plated through-holes formed in a core before lamination
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10727—Leadless chip carrier [LCC], e.g. chip-modules for cards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
- H05K2203/0207—Partly drilling through substrate until a controlled depth, e.g. with end-point detection
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/13—Moulding and encapsulation; Deposition techniques; Protective layers
- H05K2203/1305—Moulding and encapsulation
- H05K2203/1316—Moulded encapsulation of mounted components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/13—Moulding and encapsulation; Deposition techniques; Protective layers
- H05K2203/1305—Moulding and encapsulation
- H05K2203/1327—Moulding over PCB locally or completely
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/16—Inspection; Monitoring; Aligning
- H05K2203/162—Testing a finished product, e.g. heat cycle testing of solder joints
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
Definitions
- the invention relates to a printed circuit board, in particular for an electronic component, such as a control device in a vehicle or for an application in the automotive field.
- a control unit of a motor vehicle for arrangement in an engine compartment such as a transmission control unit
- the housing can be hermetically sealed.
- the housing can be a metal housing, for example, through which contact pins are guided to the outside. This creates a connection between an exterior and an interior of the electronic component.
- the contact pins can, for example, be connected in an electrically conductive manner to a flexible printed circuit board or a lead frame and can thus be guided to further functional elements.
- the invention is based on the object of specifying an improved circuit board for an electronic component in order to avoid, for example, environmental and electrical disturbances.
- the printed circuit board comprises at least one carrier element with a number of printed circuit board layers, a number of electronic components, a number of thermal interfaces and a number of electrical interfaces, the electronic components being arranged directly on at least one of the surface sides on the carrier element, and the opposite Surface side of the carrier element is potential-free, and wherein the circuit board with the electronic components is coated with a cover material such that the electronic components are mechanically stabilized and the thermal and / or electrical interfaces are free of the cover material.
- a housing-free printed circuit board is designed to be robust against electrostatic discharges and against unwanted electrical or electromagnetic interference.
- a housing-free printed circuit board is scratch-resistant.
- the cover material forms a protective and support layer for the electronic components and the circuit board. Not only sub-assemblies, but largely the entire circuit board except for the interfaces are covered or covered with the cover material. Alternatively, only individual electronic components, such as power components, can be surrounded by the cover material, the interfaces being designed free of the cover material.
- the thermal interfaces can, for example, be formed on the surface of the printed circuit board and are free of cover material.
- the thermal interfaces are arranged or formed in particular on the surface side of the printed circuit board facing away from a power component. Additionally or alternatively, these can be arranged or formed on the surface side facing the power component.
- the thermal interfaces can, for example, be formed on the surface of the printed circuit board and are free of cover material.
- the thermal interfaces are arranged or formed in particular on the surface side of the printed circuit board facing away from a power component. Additionally or alternatively, these can be arranged or formed on the surface side facing the power component.
- the thermal interfaces can, for example, be formed on the surface of the printed circuit board and are free of cover material.
- the thermal interfaces are arranged or formed in particular on the surface side of the printed circuit board facing away from a power component. Additionally or alternatively, these can be arranged or formed on the surface side facing the power component.
- the thermal interfaces can, for example, be formed on the surface of the printed
- Interfaces below the power component on the corresponding surface side of the circuit board may be arranged or formed.
- the electrical interfaces are designed in particular on the inside and are accessible from the outside via cutouts in the printed circuit board. Electrical interfaces can be designed on the surface side and / or accessible from the outside.
- the circuit board is housing-free and inexpensive. This eliminates the need for complex housings.
- circuit board is formed on the surface side at least on one of the surface sides, in particular on the surface side facing away from the electronic components, potential-free.
- the electrical interfaces are located on the inside in and / or on at least one of the printed circuit board layers and / or as a partial or complete feed-through line which, for example, extends over one or more printed circuit board layers. This avoids a short circuit or contact in the event of mechanical damage to the cover material, for example a thermoset.
- the internal electrical interfaces are protected against unwanted external access. In particular in the case of a control device, no electrical signals can thus be picked up and / or supplied on the surface. As a result, the control implemented on the printed circuit board is protected against external data access, in particular against reprogramming and / or data theft.
- the thermal interfaces are designed as potential-free surfaces, for example as refined, in particular tinned, silvered or gold-plated, copper surfaces on one of the surface sides of the printed circuit board. This enables the electronic components to be cooled in a simple manner and thus in a cost-effective manner.
- the cover material is, for example, a thermoset material.
- the cover material is matched in particular to the material of the carrier element and / or the coefficient of expansion.
- the electronic components and / or the surface sides of the printed circuit board can be coated with a solder resist as a protective layer.
- the solder resist is applied underneath the cover material and thus in front of this on the printed circuit board.
- the cover material can be applied in any thickness. To provide adequate support allow, the cover material is applied with a minimum thickness of 1 mm.
- the carrier element with through holes for example, so-called back drill holes or
- the inner surface of the respective through hole is designed as a metallized through hole and is provided, for example, with copper in order to form thermal and / or electrical interfaces.
- the metallized through holes allow vias within the circuit board and also better cohesion of the circuit board layers of the circuit board and improved heat dissipation.
- the through holes are provided on the surface side of the circuit board opposite the electronic component with depressions, in particular a depth-controlled hole.
- the through holes have a smaller diameter than the end-side depressions.
- the depressions are made by means of a depth-controlled bore such that it is spaced apart from the last inner conductor layer of the printed circuit board.
- the metallization in the area of the recess is removed through the holes. Electrostatic sinks are thus provided in a simple manner, as a result of which the printed circuit board is protected against short circuits on the rear side.
- the depressions can be filled with a resin material.
- Interfaces on the potential-free surface side are designed as refined, in particular silver-plated, gold-plated or tinned, copper surfaces.
- At least one cooling surface for example on the surface side of the circuit board underneath and / or in be arranged at least one inner circuit board layer.
- bottom or rear surfaces on the surface sides of the circuit board can be provided as thermal sinks.
- These electronic components, in particular power components can also be arranged above a plurality of metallized through holes or vias.
- Through holes or vias in the area of the surface sides of the circuit board are left free and free of covering material. In addition, these can be partially filled with a resin material.
- At least one test point is arranged in an inner circuit board layer as an electrical interface, an adjacent inner and / or an adjacent upper circuit board layer being left out in the area of the test point and / or an adjacent surface side of the circuit board being free of cover material.
- One or more test point openings are / are preferably provided on an underside of the printed circuit board, which enables or enable access to the internal test point.
- the test point is arranged on the line position of the circuit board closest to a surface side of the circuit board. In the area of a test point, the surface side of the circuit board closest to this test point is free of cover and / or protective layer material.
- the test point is not open to the outside and is not freely accessible and thus closed.
- a test point opening is closed with a resin material.
- a circuit board material is arranged between the internal test point and the surface side of the circuit board.
- the resin material or Lei terplattenmaterial is then removed. This eliminates the time-consuming removal of the cover material.
- the neighboring one is then used for testing or adjacent circuit board layer opened or the Harzma material removed.
- the test point is exposed mechanically, for example by drilling or lasering.
- the test point is accessible for data access via such a recess that is open to the outside.
- a test point is arranged on a penultimate circuit board layer, in particular a last line level or layer, and the area above it in the direction of the surface side of the circuit board is free of cover and / or protective layer material. Only the test point is overlaid with a circuit board material and / or a resin material.
- test point is connected to electronic components for the exchange of electrical signals via internal conduction paths.
- Lightning arrester areas and / or ESD protective areas are formed.
- protective surfaces can be arranged on the surface of the circuit board.
- One of the cooling surfaces can also be designed as a protective surface and / or electrical interface.
- At least one active component, a power component, a passive component and / or a microprocessor is or are provided as electronic components.
- a sensor and / or a plug can be arranged on at least one of the surfaces.
- Fig. 2 shows schematically in a sectional view a circuit board with a covering material drawn over the area of a power component
- Figure 1 shows schematically in perspective view a circuit board 1, which is covered with a cover material 2.
- FIG. 2 shows a sectional illustration of an alternative printed circuit board 1 with a partially applied covering material 2 in the area of a power component.
- the printed circuit board 1 comprises at least one carrier element 1.1 with a number of printed circuit board layers LI to Ln. Furthermore, the printed circuit board 1 comprises a number of electronic components 3, for example power components, a microprocessor, a capacitor, a resistor, a memory, a transistor, etc.
- At least one active component and / or one passive component can be provided as electronic components 3.
- a sensor and / or a plug 12 (shown in FIG. 3) can be arranged on at least one of the surface sides S1, S2.
- the plug 12 can also be arranged on the side of the printed circuit board 1.
- thermal interfaces T and / or a number of electrical interfaces E are seen before.
- the electronic components 3 are arranged, for example, at least directly on one of the surface sides S1 on the carrier element 1.1. In the exemplary embodiment shown, the electronic components 3 are arranged on the upper surface surface S1.
- the opposite surface side S2 of Reliefele element 1.1 is carried out potential-free.
- the Lei terplatte 1 can be provided with cover material 2.
- the circuit board 1 on the lower surface side S2 can be free of cover material 2, as shown in FIG. 2.
- the cover material 2 thus forms a protective and support layer for the electronic components 3 and partially for the circuit board 1.
- the cover material 2 can all electronic Cover components 3. Free areas of the circuit board 1 can be covered by the cover material 2.
- the area in which thermal and / or electrical interfaces E, T lie is free of cover material 2.
- a plurality of thermal interfaces T can be arranged below electronic components 3 with a high output and thus heat emission, such as power components.
- These can be designed as metallized through-bores 7 with or without refined, for example tinned, gold-plated or silver-plated, copper surfaces 4.
- These inner heat-dissipating surfaces 10 (shown in FIG. 2) and the plurality of metallized through-bores 7 as heat dissipators enable simple and rapid heat-dissipation of the electronic component 3 in question.
- the metallized through holes 7 extend, for example, over the entire printed circuit board thickness, in particular from a surface side S1, on which the electronic component 3 is arranged, to the opposite surface side S2, which is of potential-free design.
- the metallized through-hole 7 is widened on the surface side S2 opposite the electrical component 3 and is provided, for example, with a depth-controlled hole 14.
- the metallization has been removed in the region of the depth-controlled bore 14.
- the through bores 7 can be filled before the mold application (the application of the cover material 2), for example filled with a resin, in order to control the mold flow and thus the distribution of the cover material 2 when it is applied and to increase the service life.
- the resin is then removed again, so that the circuit board 1 has 14 holes on the surface side S2 in the area of the through bores 7 with depth-controlled bores.
- the electrical interfaces E are in particular formed on the inside and accessible via recesses 5 in the circuit board 1 from the outside.
- the electrical interfaces E which form a test point 9, can also be closed to the outside.
- These recesses 5 can be filled with a material, for example resin, or be covered by a circuit board material (as shown in FIG. 2, in section for a test point 9).
- the areas above the electrical interface E of the test point 9 can then be opened, for example lasered or drilled.
- the electrical interfaces E are formed free of covering material 2.
- only the printed circuit board material and / or a resin material have to be removed in a test in order to arrive at test point 9. The more complex removal of the cover material 2, in particular a lacquer material, is thereby eliminated.
- the cover material 2 is, for example, a thermoset material.
- the circuit board 1 is formed housing-free due to the partial or full permanent coating by means of the cover material 2.
- the circuit board 1 is potential-free on at least one of the surface sides S2.
- the electronic components 3 and / or the surface sides S1, S2 of the printed circuit board 1 can be coated, for example, with a solder resist as a protective layer 6.
- the solder resist is applied below the cover material 2 and thus directly on the circuit board 1 and / or the electronic components 3.
- the cover material 2 can be applied in any thickness.
- the electrical interfaces E can be designed as through holes 7.
- the through bores 7 are provided, for example, with a metal, in particular with copper surfaces, in particular refined, for example tinned, gold-plated or silver-plated and / or copper surfaces covered with solder mask.
- the inner surface of the respective through hole 7 is formed as a metallized through hole and provided with copper, for example.
- Such an electrical interface E also enables heat dissipation and can simultaneously form a thermal interface T.
- the copper surfaces of the electrical interfaces E can also be designed as flat surfaces on the surface side S1 in the area of the electronic components 3, in particular below them.
- refined copper surfaces 4 can be provided on the lower surface side S2, which are designed as lightning conductors or pulse derivations.
- the finished copper surfaces 4 are connected to a mass. This improves the ground connection and thus pulse derivation (ESD / lightning conductor protection).
- the metallized through bores 7 also enable plated-through holes 8 within the printed circuit board 1, as shown in FIG. 2.
- Interface E at least one test point 9 arranged in or on an inner circuit board layer L2.
- the test point 9 is arranged on a printed circuit board layer Ln-1 which is closest or adjacent to the adjacent, in particular lower surface side S1.
- the adjacent lower Lei terplattenlage Ln-1 is recessed in the area of the test point 9.
- test point 9 is accessible for data access via a recess 5 directed outwards.
- such a test point 9 is arranged on a penultimate or last inner circuit board layer Ln-1.
- Figure 2 shows schematically in a sectional view a printed circuit board 1 with a partially coated cover material 2nd
- Figure 2 shows through holes 7 and / or fürie stanchions 8, which end in the area of the surface side S2 of the circuit board 1 each in a depth-controlled hole 14 (back drill hole), which has a larger diameter with a short depth than the relevant through hole 7.
- the depth is chosen such that there is a distance from the last inner circuit board layer Ln-1, in particular an inner conductor track.
- Some of the outer refined copper surfaces 4 can be designed as tinned copper surfaces 45 and others as tinned and potential-free copper surfaces 46.
- the cover material 2 represents an improvement over housed circuit boards due to its thickness and parameters.
- the internal electrical interfaces E are protected against unwanted access from the outside.
- no electrical signals can thus be picked up and / or supplied on the surface.
- the control implemented on the printed circuit board 1 is protected against external data access.
- At least one cooling surface 10 can also be arranged in or on at least one inner circuit board layer LI.
- test point 9 is connected to the electronic components 3 for exchanging electrical signals via inner conductor tracks 11.
- the arrangement of the test point 9 as an internal point, the opening of which is closed to the outside, for example by means of a resin material or printed circuit board material of a last printed circuit board layer Ln-1, can be done in a simple manner, for example by lasering the
- Resin material and / or optionally the last printed circuit board layer Ln-1 instead of removing the cover material 2 enables access to the electrical signals of the control of the printed circuit board 1.
- the surface side S2 of the circuit board 1 is there free of covering material 2 in the area of test point 9. The time-consuming removal of covering material 2 can thus be omitted.
- Interfaces T on the potential-free surface side S2 are designed as refined, in particular silver-plated, gold-plated or tinned, copper surfaces 4.
- Figure 3 shows schematically in a sectional view a further embodiment for a circuit board 1 'with a coated cover material 20.
- the circuit board 1' has a plurality of electronic components 30.
- the circuit board 1 ' has a connector 12 which is at least partially surrounded and supported by the cover material 20.
- the plug 12 is arranged directly on the carrier element 10.1.
- the electronic components 30 are arranged on one surface S1 of the carrier element 10.1.
- the plug 12 is arranged in particular on the opposite surface of the surface S2 S2 of the carrier element 10.1.
- Contacts 12.1, 12.2 of the connector 12 are directly coupled to the carrier element 10.1 of the printed circuit board 1 '.
- the ends of the contacts 12.1, 12.2 facing the carrier element 10.1 are inserted and fastened into an electrical interface E of the carrier element 10.1.
- the cover material 20 can be provided with a continuous opening 13.
- the circuit board 1 ' can be arranged on a housing or a wall of a device, for example a motor or gear unit, which is not shown in greater detail.
- the electronic components 30 of the printed circuit board 1 ' form a control unit, for example, for an electromechanical transmission or an electric motor when connected.
- the coated circuit board 1 ' is easy to attach to the wall or the housing of the device, for example using a screw.
- the printed circuit board 1 or 1 ' can be mounted without a housing directly by means of the covering made of the covering material 2 or 20, for example on a gearbox or a motor, in particular on its housing.
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Structure Of Printed Boards (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Abstract
Description
Claims
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2021519779A JP7417598B2 (ja) | 2018-10-10 | 2019-09-11 | 回路基板 |
CN201980066797.6A CN112789954A (zh) | 2018-10-10 | 2019-09-11 | 电路板 |
KR1020217013758A KR102497915B1 (ko) | 2018-10-10 | 2019-09-11 | 회로 기판 |
DE112019005085.0T DE112019005085A5 (de) | 2018-10-10 | 2019-09-11 | Leiterplatte |
US17/226,389 US11224123B2 (en) | 2018-10-10 | 2021-04-09 | Circuit board |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102018217349.4A DE102018217349A1 (de) | 2018-10-10 | 2018-10-10 | Leiterplatte |
DE102018217349.4 | 2018-10-10 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US17/226,389 Continuation US11224123B2 (en) | 2018-10-10 | 2021-04-09 | Circuit board |
Publications (1)
Publication Number | Publication Date |
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WO2020074201A1 true WO2020074201A1 (de) | 2020-04-16 |
Family
ID=67988970
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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PCT/EP2019/074269 WO2020074201A1 (de) | 2018-10-10 | 2019-09-11 | Leiterplatte |
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US (1) | US11224123B2 (de) |
JP (1) | JP7417598B2 (de) |
KR (1) | KR102497915B1 (de) |
CN (1) | CN112789954A (de) |
DE (2) | DE102018217349A1 (de) |
WO (1) | WO2020074201A1 (de) |
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DE102021115851A1 (de) | 2021-06-18 | 2022-12-22 | Rolls-Royce Deutschland Ltd & Co Kg | Leiterplatte |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0207012A2 (de) * | 1985-06-17 | 1986-12-30 | MAS INDUSTRIALE S.p.A. | Verfahren zur sicheren Kühlung von auf einer Mehrschichtplatte für gedruckte Schaltungen befestigten elektronischen Bauelementen und nach diesem Verfahren hergestellte Mehrschichtplatte |
US20060127652A1 (en) * | 2004-12-10 | 2006-06-15 | Yasuhiko Kanaya | Multi-layered circuit board and manufacturing method of multi-layered circuit board |
DE102012112738A1 (de) * | 2012-12-20 | 2014-06-26 | Conti Temic Microelectronic Gmbh | Elektronikmodul mit einer mit Kunststoff umhüllten elektronische Schaltung und Verfahren zu dessen Herstellung |
EP2991459A1 (de) * | 2014-08-25 | 2016-03-02 | Home Control Singapore Pte. Ltd. | Vorrichtung mit einseitiger Leiterplatte |
WO2018103950A1 (de) * | 2016-12-09 | 2018-06-14 | Endress+Hauser SE+Co. KG | Elektronik-baugruppe |
DE102016225727A1 (de) * | 2016-12-21 | 2018-06-21 | Conti Temic Microelectronic Gmbh | ESD-optimiertes Steuergeräte-Aufbaukonzept |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4299601B2 (ja) * | 2003-01-23 | 2009-07-22 | 京セラ株式会社 | 多層配線基板 |
JP5066830B2 (ja) * | 2006-04-10 | 2012-11-07 | 株式会社村田製作所 | セラミック多層基板 |
DE102015221149A1 (de) * | 2015-10-29 | 2017-05-04 | Robert Bosch Gmbh | Steuervorrichtung für eine Getriebesteuerung eines Kraftfahrzeugs |
-
2018
- 2018-10-10 DE DE102018217349.4A patent/DE102018217349A1/de not_active Withdrawn
-
2019
- 2019-09-11 DE DE112019005085.0T patent/DE112019005085A5/de active Pending
- 2019-09-11 KR KR1020217013758A patent/KR102497915B1/ko active IP Right Grant
- 2019-09-11 CN CN201980066797.6A patent/CN112789954A/zh active Pending
- 2019-09-11 WO PCT/EP2019/074269 patent/WO2020074201A1/de active Application Filing
- 2019-09-11 JP JP2021519779A patent/JP7417598B2/ja active Active
-
2021
- 2021-04-09 US US17/226,389 patent/US11224123B2/en active Active
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0207012A2 (de) * | 1985-06-17 | 1986-12-30 | MAS INDUSTRIALE S.p.A. | Verfahren zur sicheren Kühlung von auf einer Mehrschichtplatte für gedruckte Schaltungen befestigten elektronischen Bauelementen und nach diesem Verfahren hergestellte Mehrschichtplatte |
US20060127652A1 (en) * | 2004-12-10 | 2006-06-15 | Yasuhiko Kanaya | Multi-layered circuit board and manufacturing method of multi-layered circuit board |
DE102012112738A1 (de) * | 2012-12-20 | 2014-06-26 | Conti Temic Microelectronic Gmbh | Elektronikmodul mit einer mit Kunststoff umhüllten elektronische Schaltung und Verfahren zu dessen Herstellung |
EP2991459A1 (de) * | 2014-08-25 | 2016-03-02 | Home Control Singapore Pte. Ltd. | Vorrichtung mit einseitiger Leiterplatte |
WO2018103950A1 (de) * | 2016-12-09 | 2018-06-14 | Endress+Hauser SE+Co. KG | Elektronik-baugruppe |
DE102016225727A1 (de) * | 2016-12-21 | 2018-06-21 | Conti Temic Microelectronic Gmbh | ESD-optimiertes Steuergeräte-Aufbaukonzept |
Also Published As
Publication number | Publication date |
---|---|
US11224123B2 (en) | 2022-01-11 |
KR20210068560A (ko) | 2021-06-09 |
US20210227686A1 (en) | 2021-07-22 |
DE112019005085A5 (de) | 2021-07-08 |
DE102018217349A1 (de) | 2020-04-16 |
JP2022504660A (ja) | 2022-01-13 |
CN112789954A (zh) | 2021-05-11 |
KR102497915B1 (ko) | 2023-02-09 |
JP7417598B2 (ja) | 2024-01-18 |
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