WO2020073440A1 - 传输信号的数据存储方法、装置及存储介质 - Google Patents

传输信号的数据存储方法、装置及存储介质 Download PDF

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Publication number
WO2020073440A1
WO2020073440A1 PCT/CN2018/116932 CN2018116932W WO2020073440A1 WO 2020073440 A1 WO2020073440 A1 WO 2020073440A1 CN 2018116932 W CN2018116932 W CN 2018116932W WO 2020073440 A1 WO2020073440 A1 WO 2020073440A1
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Prior art keywords
signal
data storage
time point
data
clock signal
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Ceased
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PCT/CN2018/116932
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English (en)
French (fr)
Inventor
王明良
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HKC Co Ltd
Chongqing HKC Optoelectronics Technology Co Ltd
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HKC Co Ltd
Chongqing HKC Optoelectronics Technology Co Ltd
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Publication of WO2020073440A1 publication Critical patent/WO2020073440A1/zh
Priority to US17/033,920 priority Critical patent/US11206156B2/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264—Arrangements for coupling to transmission lines
    • H04L25/0272—Arrangements for coupling to multiple lines, e.g. for differential transmission
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264—Arrangements for coupling to transmission lines
    • H04L25/028—Arrangements specific to the transmitter end
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264—Arrangements for coupling to transmission lines
    • H04L25/0292—Arrangements specific to the receiver end

Definitions

  • the present application relates to the field of communication technologies, and in particular, to a data storage method and apparatus for transmitting signals, and a computer-readable storage medium.
  • the main purpose of the present application is to provide a data storage method and device for transmission signals and a computer-readable storage medium. By storing the data of the transmission signal during the data storage period, the accuracy of data extraction of the transmission signal is improved.
  • the data of the transmission signal is stored in the data storage period.
  • the step of obtaining the zero-volt time point of the clock signal after signal superposition with the transmission signal according to the signal frequency includes:
  • the method before the step of acquiring a preset time duration and generating a data storage period centered on the zero volt time point based on the zero volt time point and the preset time duration, the method further includes:
  • the preset duration is determined according to the waveform abnormal value.
  • the present application also provides a data storage device for transmitting signals.
  • the data storage device for transmitting signals includes:
  • the data storage device for the transmission signal includes a memory, a processor, and a data storage program for the transmission signal stored on the memory and operable on the processor, and the data storage program for the transmission signal is used by the processor When executed, the steps of the data storage method for transmitting signals as described above are implemented.
  • the present application also provides a computer-readable storage medium on which a data storage program for transmitting signals is stored, and the data storage program for transmitting signals is implemented by the processor as described above The steps of the data storage method of the transmission signal.
  • the data storage method of the transmission signal, the data storage device of the transmission signal, and the computer-readable storage medium provided by the present application when receiving the transmission signal, parse the clock signal corresponding to the transmission signal to obtain the signal frequency of the clock signal; Obtain the zero-volt time point of the clock signal after signal superimposition with the transmission signal according to the signal frequency; obtain a preset duration, and generate the following according to the zero-volt time point and the preset duration
  • the zero-volt time point is the data storage period of the center time point; the data of the transmission signal is stored in the data storage period. In this way, by storing the data of the transmission signal in the data storage period in which the signal waveform is stable, the accuracy of data extraction of the transmission signal is improved.
  • FIG. 1 is a schematic diagram of a hardware operating environment of a terminal according to an embodiment of the present application
  • FIG. 2 is a schematic flowchart of an embodiment of a data storage method for transmitting signals according to the present application
  • FIG. 3 is a schematic flowchart of another embodiment of a data storage method for transmitting signals according to this application;
  • FIG. 4 is a schematic flowchart of still another embodiment of a data storage method for transmitting signals according to the present application
  • FIG. 5 is a schematic flowchart of still another embodiment of a data storage method for transmitting signals according to the present application
  • FIG. 6 is a schematic flowchart of still another embodiment of a data storage method for transmitting signals according to the present application.
  • FIG. 7 is a schematic flowchart of another embodiment of a data storage method for transmitting signals according to this application.
  • FIG. 8 is a schematic flowchart of still another embodiment of a data storage method for transmitting signals according to the present application.
  • FIG. 9 is a schematic flowchart of still another embodiment of a data storage method for transmitting signals according to the present application
  • FIG. 10 is a diagram of an example of data extraction abnormality of the data storage method of the transmission signal of the present application.
  • 11 is a diagram of an example of data storage control of the data storage method of the transmission signal of the present application.
  • FIG. 12 is an example diagram of a data storage period of a data storage method of a transmission signal of the present application.
  • the present application provides a data storage method for transmission signals, which aims to solve the problem of inaccurate data extraction of transmission signals. By storing data of transmission signals within a data storage period, the accuracy of data extraction for transmission signals is improved.
  • FIG. 1 is a schematic diagram of a hardware operating environment of a terminal according to an embodiment of the present application
  • the terminal may be a data extraction device for transmitting signals, or may be a television.
  • the terminal may include: a processor 1001, such as a CPU, a memory 1002, a communication bus 1003, and a data driver (Data Driver) 1004, clock source 1005.
  • the communication bus 1003 is configured to implement connection communication between the components in the terminal.
  • the memory 1002 may be a high-speed RAM memory or a stable memory (non-volatile memory), such as disk storage.
  • the memory 1002 may optionally be a storage device independent of the foregoing processor 1001.
  • the data driver 1004 performs processing of transmitting signals, and may include at least one of a data memory and an internal processing circuit.
  • the time source 1005 may also include at least one of a frequency analysis circuit and a data memory control circuit.
  • FIG. 1 does not constitute a limitation on the terminal in the embodiments of the present application, and may include more or fewer components than those illustrated, or a combination of certain components, or different components. Layout.
  • the memory 1002 as a computer storage medium may include a data storage program for transmitting signals.
  • the processor 1001 may be set to call a data storage program of the transmission signal stored in the memory 1002, and perform the following operations:
  • the data of the transmission signal is stored in the data storage period.
  • processor 1001 may call the data storage program of the transmission signal stored in the memory 1002, and also perform the following operations:
  • processor 1001 may call the data storage program of the transmission signal stored in the memory 1002, and also perform the following operations:
  • the time interval is calculated according to the signal period.
  • processor 1001 may call the data storage program of the transmission signal stored in the memory 1002, and also perform the following operations:
  • the preset duration is determined according to the waveform abnormal value.
  • processor 1001 may call the data storage program of the transmission signal stored in the memory 1002, and also perform the following operations:
  • the waveform abnormal value of the clock signal after signal superposition is obtained.
  • processor 1001 may call the data storage program of the transmission signal stored in the memory 1002, and also perform the following operations:
  • the data of the transmission signal is stored in the data storage period.
  • processor 1001 may call the data storage program of the transmission signal stored in the memory 1002, and also perform the following operations:
  • the data of the transmission signal is extracted according to the time point.
  • processor 1001 may call the data storage program of the transmission signal stored in the memory 1002, and also perform the following operations:
  • the data storage is controlled to activate a data storage function to store the data of the transmission signal.
  • the data storage method of the transmission signal includes:
  • Step S10 When receiving the transmission signal, analyze the clock signal corresponding to the transmission signal to obtain the signal frequency of the clock signal.
  • Step S20 Obtain a zero-volt time point of the clock signal after signal superposition with the transmission signal according to the signal frequency.
  • the clock signal waveform changes.
  • the reflected differential signal is superimposed on the initial clock signal from the clock source, the clock signal is obtained ,
  • the waveform of the time signal after the signal superposition may be distorted. If the data of the differential signal is extracted according to the rising or falling edge of the time signal after the signal superposition, when the first clock signal is caused by signal reflection
  • the waveform sag or bump is too large, it may cause the receiver to judge the rising or falling edge of the clock signal incorrectly, and extract the data of the differential signal at the wrong rising or falling edge. It is possible for the terminal to receive erroneous data, which leads to the problem of inaccurate data extraction of the transmitted signal, resulting in abnormal data display or noise.
  • the solution of the present application is to obtain the signal frequency of the initial clock signal according to the initial clock signal sent by the analytical clock source, and then obtain the clock signal after signal superposition according to the signal frequency And generate a data storage period centered on the zero volt time point, so as to ensure that the data storage period can include the rising or falling edge of the clock signal after signal superposition.
  • the rising edge is the moment when the level of the digital signal changes from low level to high level
  • the falling edge is the level of the digital signal changing from high level to low power.
  • the data storage period can realize the rising or falling edge of the clock signal including the signal superposition.
  • the clock source is provided with a frequency analysis circuit.
  • the frequency analysis circuit analyzes the initial clock signal sent by the clock source to obtain the signal frequency of the initial clock signal and stores it in the generated data
  • an enable signal is output through the data memory control circuit provided in the clock source to control the data memory provided in the data driver to enable or disable the signal data storage function.
  • the signal data storage function of the data memory is activated within the data storage period to store the data of the transmission signal -Data.
  • the data driver Data Driver's internal processing circuit processes the signal data stored in the data memory.
  • the signal frequency of the clock signal obtained by analysis by the frequency analysis circuit provided in the clock source can also be used as the signal superimposed with the transmission signal Frequency of the clock signal.
  • Obtaining the zero-volt time point of the clock signal after signal superposition with the transmission signal according to the signal frequency may be a time interval between two adjacent zero-volt time points according to the signal frequency , And then obtain the zero-volt time point according to the time interval.
  • the signal period and the signal frequency can be used as the reciprocal relationship, and the signal superimposed according to the signal frequency calculation The signal period of the clock signal, and then according to the signal period, the time interval can be calculated.
  • every other time interval that is, a time point of acquiring a clock signal after signal superposition is taken as a zero volt time point, in this way, it is possible to avoid acquiring a zero volt time point caused by waveform fluctuation.
  • Step S30 Acquire a preset duration, and generate a data storage period centered on the zero-volt time point based on the zero-volt time point and the preset duration.
  • Step S40 Store the data of the transmission signal in the data storage period.
  • the rising edge is the moment when the level of the digital signal changes from low level to high level
  • the falling edge is the level of the digital signal changing from high level to low
  • FIG. 12 after acquiring the zero-volt time point of the clock signal after signal superposition, then obtaining a preset duration, based on the zero-volt time point and the preset duration, A data storage period with the zero-volt time point as a center time point is generated, so that the data storage period can include a rising edge and / or a falling edge of the first clock signal. Then, storing the data of the transmission signal according to the data storage period can improve the accuracy of data extraction of the transmission signal.
  • the method further includes according to the clock signal and the signal The superimposed clock signal to obtain a waveform abnormal value of the clock signal after signal superposition; determining the preset duration according to the waveform abnormal value. Specifically, acquiring the zero-volt time point of the clock signal as a first time point; acquiring all the zero-volt time points of the clock signal after signal superposition as a second time point; according to the first At a time point and the second time point, the waveform abnormal value of the clock signal after signal superposition is obtained.
  • the number of zero-volt time points of the clock signal after signal superposition may be lower than that of the zero-volt time point of the clock signal whose waveform is not mutated under ideal conditions. The number is higher. Therefore, the waveform abnormal value can be obtained according to the difference between the number of the first time point and the second time point.
  • the preset duration may be inversely proportional to the waveform abnormal value. Therefore, the preset duration may be obtained by calculating the reciprocal of the waveform abnormal value. According to the actual situation, in order to avoid acquiring unnecessary data of the transmission signal, the maximum value of the preset duration may also be set to an interval of one-eighth of the time interval.
  • the data storage is started in the data storage period, and the data of the transmission signal is extracted by storing the data of the transmission signal in the data storage period. It should be noted that it may be the start time of each period of the data storage period, by controlling the enable signal output by the data memory control circuit to be high, the signal data storage function of the data memory is started; during each period of the data storage period At the end time, the enable signal output by the control circuit of the data memory is controlled to be a low level, and the signal data storage function of the data memory is turned off. At times other than the data storage period, the data of the transmission signal is not stored.
  • the clock signal corresponding to the transmission signal is parsed to obtain the signal frequency of the clock signal; according to the signal frequency, the signal superimposed on the transmission signal is obtained The zero-volt time point of the clock signal; acquiring a preset duration, and generating a data storage period centered on the zero-volt time point based on the zero-volt time point and the preset duration; in the data storage
  • the data of the transmission signal is stored during the period. In this way, by generating a data storage period centered on the zero-volt time point, it is ensured that the data storage period can include the rising or falling edge of the clock signal after signal superposition, and the transmission signal is stored in the data storage period Data, which improves the accuracy of data extraction of the transmitted signal.
  • Step S21 Calculate a time interval between two adjacent zero-volt time points according to the signal frequency.
  • Step S22 Obtain the zero-volt time point according to the time interval.
  • the signal period and the signal frequency can be used as the reciprocal relationship, and the signal superimposed according to the signal frequency calculation The signal period of the clock signal, and then according to the signal period, the time interval can be calculated.
  • the clock signal corresponding to the transmission signal is generated by the clock source
  • the signal frequency of the clock signal obtained by analysis by the frequency analysis circuit provided in the clock source can also be used as the signal to the transmission signal. The frequency of the superimposed clock signal.
  • every other time interval that is, a time point of acquiring a clock signal after signal superposition is taken as a zero volt time point, in this way, it is possible to avoid acquiring a zero volt time point due to waveform fluctuations.
  • a time interval between two adjacent zero-volt time points is calculated according to the signal frequency; the zero-volt time point is obtained according to the time interval. In this way, accurate acquisition of the zero volt time point is achieved, and the zero volt time point caused by the waveform fluctuation is avoided.
  • the step of calculating the time interval between two adjacent zero-volt time points according to the signal frequency include:
  • Step S23 Calculate the signal period of the clock signal after signal superposition according to the signal frequency.
  • Step S24 Calculate the time interval according to the signal period.
  • the signal period of the clock signal after signal superposition can be calculated from the signal frequency, because the time interval between two adjacent zero-volt time points is equal to half a signal period , The time interval can be calculated according to the signal period.
  • the signal period of the clock signal after signal superposition is calculated according to the signal frequency; the time interval is calculated according to the signal period. In this way, the calculation of the time interval between two adjacent zero-volt time points is realized.
  • Step S50 Obtain an abnormal value of the waveform of the clock signal after signal superimposition according to the clock signal and the clock signal after signal superimposition.
  • Step S60 Determine the preset duration according to the waveform abnormal value.
  • the step of acquiring a preset duration and generating a data storage period centered on the zero volt time point according to the zero volt time point and the preset time period further includes Obtaining the clock signal and the clock signal after signal superimposition to obtain a waveform abnormal value of the clock signal after signal superposition; determining the preset duration according to the waveform abnormal value. Specifically, acquiring the zero-volt time point of the clock signal as a first time point; acquiring all the zero-volt time points of the clock signal after signal superposition as a second time point; according to the first At a time point and the second time point, the waveform abnormal value of the clock signal after signal superposition is obtained.
  • the number of zero-volt time points of the clock signal after signal superposition may be lower than that of the zero-volt time point of the clock signal whose waveform is not mutated under ideal conditions. The number is higher. Therefore, the waveform abnormal value can be obtained according to the difference between the number of the first time point and the second time point.
  • the preset duration may be inversely proportional to the waveform abnormal value. Therefore, the preset duration may be obtained by calculating the reciprocal of the waveform abnormal value.
  • the preset duration is determined by the waveform abnormal value, which may be the smaller the preset duration when the waveform abnormal value is larger, and according to the actual situation, in order to avoid obtaining unnecessary transmission signal data, it can also be set
  • the maximum value of the preset duration is set to be one eighth of the time interval between two zero-volt time points.
  • the waveform abnormal value of the clock signal after signal superposition is obtained according to the clock signal and the clock signal after signal superposition; the preset duration is determined according to the waveform abnormal value.
  • the preset duration is determined according to the waveform abnormal value. Accordingly, by setting the larger the waveform abnormal value, the determined preset duration is smaller, so as to ensure that the data of the transmission signal can be stored according to the time period when the waveform is stable.
  • the clock signal after signal superimposition is obtained according to the clock signal and the clock signal after signal superimposition
  • the steps of signal waveform abnormal value include:
  • Step S51 Obtain the zero-volt time point of the clock signal as the first time point.
  • Step S52 Obtain all the zero-volt time points of the clock signal after signal superposition as a second time point.
  • Step S53 Obtain an abnormal value of the waveform of the clock signal after signal superposition according to the first time point and the second time point.
  • the number of zero-volt time points of the clock signal after signal superposition may be lower than that of the zero-volt time point of the clock signal whose waveform is not mutated under ideal conditions. The number is higher. Therefore, the waveform abnormal value can be obtained according to the difference between the number of the first time point and the second time point.
  • the preset duration may be inversely proportional to the waveform abnormal value. Therefore, the preset duration may be obtained by calculating the reciprocal of the waveform abnormal value.
  • the zero-volt time point of the clock signal is acquired as a first time point; all the zero-volt time points of the clock signal after signal superimposition are acquired as a second time point; At the first time point and the second time point, the waveform abnormal value of the clock signal after signal superposition is obtained. In this way, the acquisition of the abnormal value of the waveform is achieved, and accordingly, the preset duration that is determined as the larger the abnormal value of the waveform is, the smaller the value can be achieved.
  • the zero of the clock signal after signal superposition with the transmission signal is obtained according to the signal frequency After the step at volt time, it also includes:
  • Step S70 Determine a rising edge or a falling edge of the clock signal after signal superposition according to the zero-volt time point.
  • Step S71 Acquire a preset duration, and generate data starting from the rising edge or the falling edge according to the preset duration and the rising edge, or the preset duration and the falling edge Storage period.
  • Step S72 Store the data of the transmission signal in the data storage period.
  • the rising or falling edge of the clock signal after signal superposition can be determined.
  • the preset duration may be determined according to the waveform abnormal value, or may be preset to 3s, 5s, and so on.
  • the starting time point of the data storage period is a rising edge or a falling edge, that is, when the clock signal after the signal superposition is on the rising edge or the falling edge, the data memory is started to store the data of the transmission signal, and after a preset duration Close the data storage.
  • the rising or falling edge of the clock signal after signal superposition is determined according to the zero volt time point; a preset duration is obtained, based on the preset duration and the rising edge, or the A preset time duration and the falling edge generate a data storage period with the rising edge or the falling edge as a starting time point; and store the data of the transmission signal in the data storage period. In this way, the accuracy of data extraction of the transmission signal is improved.
  • the clock signal after the signal is superimposed on the transmission signal is obtained according to the signal frequency.
  • the step at volt time it also includes:
  • Step S80 When the clock signal after the signal superposition is on the rising edge or the falling edge, acquire a time point of the transmission signal corresponding to the rising edge or the falling edge.
  • Step S81 Extract the data of the transmission signal according to the time point.
  • the transmission signal and the rising The time point corresponding to the falling edge or the falling edge extracts the data of the transmission signal according to the time point. In this way, the accuracy of data extraction of the transmission signal is improved.
  • the step of storing the data of the transmission signal in the data storage period includes:
  • Step S90 During the data storage period, control the data storage to start a data storage function to store the data of the transmission signal.
  • the data storage is started in the data storage period, and the data of the transmission signal is extracted by storing the data of the transmission signal in the data storage period.
  • it may be the start time of each period of the data storage period, by controlling the enable signal output by the data memory control circuit to be high, the signal data storage function of the data memory is started; during each period of the data storage period At the end time, the enable signal output by the control circuit of the data memory is controlled to be a low level, and the signal data storage function of the data memory is turned off. At times other than the data storage period, the data of the transmission signal is not stored.
  • the data storage is controlled to activate a data storage function to store the data of the transmission signal.
  • the data memory control circuit outputs the enable signal during the data storage period to control the data memory to store the data of the transmission signal.
  • the present application also provides a data storage device for transmitting signals.
  • the data storage device for transmitting signals includes a memory, a processor, and a data storage program for the transmission signal stored on the memory and executable on the processor.
  • the processor executes the data storage program of the transmission signal, the steps of the data storage method of the transmission signal described in the above embodiments are implemented.
  • the present application also provides a computer-readable storage medium, wherein the computer-readable storage medium includes a data storage program for transmitting signals, and the data storage program for transmitting signals is implemented by a processor as implemented in the above embodiments The steps of the data storage method of the transmission signal described above.
  • the methods in the above embodiments can be implemented by means of software plus a necessary general hardware platform, and of course, can also be implemented by hardware, but in many cases the former is better Implementation.
  • the technical solution of the present application can be essentially embodied in the form of a software product, and the computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, or optical disk) as described above, including several instructions It is used to enable a terminal device (which may be a television, a mobile phone, a computer, a server, an air conditioner, or a network device, etc.) to execute the methods described in the embodiments of the present application.
  • a terminal device which may be a television, a mobile phone, a computer, a server, an air conditioner, or a network device, etc.

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Abstract

一种传输信号的数据存储方法：在接收到传输信号时，解析所述传输信号对应的时钟信号，得到所述时钟信号的信号频率；根据所述信号频率，获取与所述传输信号进行信号叠加后的所述时钟信号的零伏时间点；获取预设时长，根据所述零伏时间点和所述预设时长，生成以所述零伏时间点为中心时间点的数据存储时段；以及在所述数据存储时段内存储所述传输信号的数据。本申请还提供了一种传输信号的数据存储装置和计算机可读存储介质。

Description

传输信号的数据存储方法、装置及存储介质
技术领域
本申请涉及通信技术领域，尤其涉及一种传输信号的数据存储方法、装置以及计算机可读存储介质。
背景技术
在通信技术领域中，一般根据接收到的传输信号对应的时钟信号，存储该传输信号的相关数据。可是在实际情况中，由于传输走线特征阻抗的不一致性，信号在传输的过程中会遇到反射现象，反射回来的信号再与初始信号进行叠加，那么实际的时钟信号的波形就会出现凹凸不平现象，这时再根据该时钟信号去存储传输信号的相关数据，就会导致可能会存储到错误的数据。
申请内容
本申请的主要目的在于提供一种传输信号的数据存储方法、装置以及计算机可读存储介质，通过在数据存储时段内存储传输信号的数据，提高了对传输信号的数据提取的准确性。
在接收到传输信号时，解析所述传输信号对应的时钟信号，得到所述时钟信号的信号频率；
根据所述信号频率，获取与所述传输信号进行信号叠加后的所述时钟信号的零伏时间点；
获取预设时长，根据所述零伏时间点和所述预设时长，生成以所述零伏时间点为中心时间点的数据存储时段；以及
在所述数据存储时段内存储所述传输信号的数据。
可选的，所述根据所述信号频率，获取与所述传输信号进行信号叠加后的所述时钟信号的零伏时间点的步骤包括：
根据所述信号频率计算相邻两个所述零伏时间点之间的时间区间；以及
根据所述时间区间获取所述零伏时间点。
可选的，所述获取预设时长，根据所述零伏时间点和所述预设时长，生成以所述零伏时间点为中心时间点的数据存储时段的步骤之前，还包括：
根据所述时钟信号和信号叠加后的所述时钟信号，得到信号叠加后的所述时钟信号的波形异常值；以及
根据所述波形异常值确定所述预设时长。
为实现上述目的，本申请还提供一种传输信号的数据存储装置，所述传输信号的数据存储装置包括：
所述传输信号的数据存储装置包括存储器、处理器及存储在所述存储器上并可在所述处理器上运行的传输信号的数据存储程序，所述传输信号的数据存储程序被所述处理器执行时实现如上述传输信号的数据存储方法的步骤。
为实现上述目的，本申请还提供一种计算机可读存储介质，所述计算机可读存储介质上存储有传输信号的数据存储程序，所述传输信号的数据存储程序被处理器执行时实现如上述传输信号的数据存储方法的步骤。
本申请提供的传输信号的数据存储方法、传输信号的数据存储装置以及计算机可读存储介质，在接收到传输信号时，解析所述传输信号对应的时钟信号，得到所述时钟信号的信号频率；根据所述信号频率，获取与所述传输信号进行信号叠加后的所述时钟信号的零伏时间点；获取预设时长，根据所述零伏时间点和所述预设时长，生成以所述零伏时间点为中心时间点的数据存储时段；在所述数据存储时段内存储所述传输信号的数据。这样，通过在信号波形稳定的数据存储时段内存储传输信号的数据，提高了对传输信号的数据提取的准确性。
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图1为本申请实施例方案涉及的实施例终端的硬件运行环境示意图；
图2为本申请传输信号的数据存储方法的一实施例的流程示意图；
图3为本申请传输信号的数据存储方法的另一实施例的流程示意图；
图4为本申请传输信号的数据存储方法的又一实施例的流程示意图；
图5为本申请传输信号的数据存储方法的又一实施例的流程示意图；
图6为本申请传输信号的数据存储方法的又一实施例的流程示意图；
图7为本申请传输信号的数据存储方法的又一实施例的流程示意图；
图8为本申请传输信号的数据存储方法的又一实施例的流程示意图；
图9为本申请传输信号的数据存储方法的又一实施例的流程示意图
图10为本申请传输信号的数据存储方法的数据提取异常示例图；
图11为本申请传输信号的数据存储方法的数据存储器控制示例图；
图12为本申请传输信号的数据存储方法的数据存储时段示例图。
本申请目的的实现、功能特点及优点将结合实施例，参照附图做进一步说明。
具体实施方式
应当理解，此处所描述的具体实施例仅仅用以解释本申请，并不限定本申请。
本申请提供一种传输信号的数据存储方法，旨在解决传输信号的数据提取不准确的问题，通过在数据存储时段内存储传输信号的数据，提高了对传输信号的数据提取的准确性。
如图1所示，图1是本申请实施例方案涉及的实施例终端的硬件运行环境示意图；
本申请实施例终端可以是传输信号的数据提取装置，也可以是电视机。
如图1所示，该终端可以包括：处理器1001，例如CPU，存储器1002，通信总线1003，数据驱动器（Data Driver）1004，时钟源1005。其中，通信总线1003设置为实现该终端中各组成部件之间的连接通信。存储器1002可以是高速RAM存储器，也可以是稳定的存储器（non-volatile memory），例如磁盘存储器。存储器1002可选的还可以是独立于前述处理器1001的存储装置。数据驱动器1004进行传输信号的处理，可以是包括数据存储器和内部处理电路中的至少一个。时间源1005除了能产生时钟信号之外，还可以包括频率解析电路和数据存储器控制电路中的至少一个。
本领域技术人员可以理解，图1中示出的终端的结构并不构成对本申请实施例终端的限定，可以包括比图示更多或更少的部件，或者组合某些部件，或者不同的部件布置。
如图1所示，作为一种计算机存储介质的存储器1002中可以包括传输信号的数据存储程序。
在图1所示的终端中，处理器1001可以设置为调用存储器1002中存储的传输信号的数据存储程序，并执行以下操作：
在接收到传输信号时，解析所述传输信号对应的时钟信号，得到所述时钟信号的信号频率；
根据所述信号频率，获取与所述传输信号进行信号叠加后的所述时钟信号的零伏时间点；
获取预设时长，根据所述零伏时间点和所述预设时长，生成以所述零伏时间点为中心时间点的数据存储时段；以及
在所述数据存储时段内存储所述传输信号的数据。
进一步地，处理器1001可以调用存储器1002中存储的传输信号的数据存储程序，还执行以下操作：
根据所述信号频率计算相邻两个所述零伏时间点之间的时间区间；以及
根据所述时间区间获取所述零伏时间点。
进一步地，处理器1001可以调用存储器1002中存储的传输信号的数据存储程序，还执行以下操作：
根据所述信号频率计算进行信号叠加后的所述时钟信号的信号周期；以及
根据所述信号周期计算所述时间区间。
进一步地，处理器1001可以调用存储器1002中存储的传输信号的数据存储程序，还执行以下操作：
根据所述时钟信号和信号叠加后的所述时钟信号，得到信号叠加后的所述时钟信号的波形异常值；以及
根据所述波形异常值确定所述预设时长。
进一步地，处理器1001可以调用存储器1002中存储的传输信号的数据存储程序，还执行以下操作：
获取所述时钟信号的所述零伏时间点，作为第一时间点；
获取信号叠加后的所述时钟信号的所有所述零伏时间点，作为第二时间点；以及
根据所述第一时间点和所述第二时间点，得到信号叠加后的所述时钟信号的波形异常值。
进一步地，处理器1001可以调用存储器1002中存储的传输信号的数据存储程序，还执行以下操作：
根据所述零伏时间点确定进行信号叠加后的所述时钟信号的上升沿或者下降沿；
获取预设时长，根据所述预设时长和所述上升沿，或者所述预设时长和所述下降沿，生成以所述上升沿或者所述下降沿为起始时间点的数据存储时段；以及
在所述数据存储时段内存储所述传输信号的数据。
进一步地，处理器1001可以调用存储器1002中存储的传输信号的数据存储程序，还执行以下操作：
在信号叠加后的所述时钟信号处于所述上升沿或者下降沿时，获取所述传输信号与所述上升沿或者下降沿对应的时间点；以及
根据所述时间点提取所述传输信号的所述数据。
进一步地，处理器1001可以调用存储器1002中存储的传输信号的数据存储程序，还执行以下操作：
在所述数据存储时段内，控制数据存储器启动数据存储功能，以存储所述传输信号的所述数据。
参照图2，在一实施例中，所述传输信号的数据存储方法包括：
步骤S10、在接收到传输信号时，解析所述传输信号对应的时钟信号，得到所述时钟信号的信号频率。
步骤S20、根据所述信号频率，获取与所述传输信号进行信号叠加后的所述时钟信号的零伏时间点。
在现今生活中，随着通信技术越来越发达，传输信号传输的数据也越来越多。以数字电视的技术领域为例，随着液晶电视尺寸越来越大，解析度越来越高，需要传输的数据也日益增多，差分信号作为传输信号中一种高速的传输协议便得到广泛普及。但在传输信号在实际传输的过程中，由于传输走线特征阻抗的不一致性，传输信号在传输的过程中会遇到反射现象，反射回来的传输信号再与初始的时钟信号进行信号叠加，那么得到的实际的时钟信号的波形就会出现凹凸不平现象，如果这时再直接根据进行信号叠加后的时钟信号去提取传输信号的数据，就可能会提取到错误的数据。
参照图10，以差分信号作为传输信号为例，由于差分信号反射会带来时钟信号波形的变化，当反射回来的差分信号再与时钟源发出的初始的时钟信号进行信号叠加后得到的时钟信号，所述信号叠加后的时间信号的波形可能会发生变形，此时若根据信号叠加后的时间信号的上升沿或者下降沿去提取差分信号的数据，当所述第一时钟信号因为信号反射导致的波形凹陷或凸起过大时，就有可能会导致接收端对时钟信号的上升沿或下降沿的判断错误，并在错误的上升沿或者下降沿时去进行差分信号的数据的提取，接收端便有可能接收到错误的数据，导致出现对传输信号的数据提取不准确的问题，造成数据显示异常或噪点的出现。
为了解决传输信号的数据提取不准确的问题，本申请的方案是根据解析时钟源发出的初始的时钟信号，得到初始的时钟信号的信号频率，再根据该信号频率获取进行信号叠加后的时钟信号的零伏时间点，并生成以所述零伏时间点为中心时间点的数据存储时段，这样一来，就能保证该数据存储时段能包含信号叠加后的时钟信号的上升沿或者下降沿。在该数据存储时段内存储传输信号的数据，即可保证传输信号数据提取的准确性。
需要说明的是，在数字电路中，上升沿为数字信号的电平从低电平跳变为高电平的那一瞬间，下降沿为数字信号的电平从高电平跳变为低电平的那一瞬间，因此所述数据存储时段能够实现包含信号叠加后的时钟信号的上升沿或者下降沿。
具体地，参见图11，所述时钟源设置有频率解析电路，在接收到传输信号时，频率解析电路解析时钟源发出的初始的时钟信号，得到初始的时钟信号的信号频率，在生成数据存储时段之后，通过设置在时钟源的数据存储器控制电路输出使能信号，以控制设置在数据驱动器中的数据存储器启动或者关闭信号数据存储功能。根据所述数据存储时段，在数据存储时段内启动数据存储器的信号数据存储功能，存储传输信号-Data的数据。在所述传输信号的数据存储完成后，再经过数据驱动器(Data Driver)的内部处理电路处理数据存储器所存储的信号数据。
需要说明的是，可以是在数据存储器控制电路输出的使能信号为高电平时，启动数据存储器的信号数据存储功能；在数据存储器控制电路输出的使能信号为低电平时，关闭数据存储器的信号数据存储功能。
具体地，由于与所述传输信号对应的时钟信号是由时钟源产生的，通过设置在时钟源的频率解析电路解析得到的所述时钟信号的信号频率，亦可作为与传输信号进行信号叠加后的时钟信号的频率。根据所述信号频率，获取与所述传输信号进行信号叠加后的所述时钟信号的零伏时间点，可以是根据所述信号频率计算相邻两个所述零伏时间点之间的时间区间，再根据所述时间区间获取所述零伏时间点。
需要说明的是，由于相邻两个零伏时间点之间的所述时间区间等于半个时钟周期，便可利用信号周期和信号频率为倒数关系，根据所述信号频率计算得到进行信号叠加后的时钟信号的信号周期，然后根据所述信号周期，即可计算得到所述时间区间。
具体地，每隔一个所述时间区间，即获取一个进行信号叠加后的时钟信号的时间点作为零伏时间点，这样，即可避免获取到因波形变动而产生的零伏时间点。
步骤S30、获取预设时长，根据所述零伏时间点和所述预设时长，生成以所述零伏时间点为中心时间点的数据存储时段。
步骤S40、在所述数据存储时段内存储所述传输信号的数据。
本实施例中，在数字电路中，由于上升沿为数字信号的电平从低电平跳变为高电平的那一瞬间，下降沿为数字信号的电平从高电平跳变为低电平的那一瞬间，因此，参照图12，在获取到进行信号叠加后的时钟信号的零伏时间点之后，然后获取预设时长，根据所述零伏时间点和所述预设时长，生成以所述零伏时间点为中心时间点的数据存储时段，这样，所述数据存储时段即可包括所述第一时钟信号的上升沿和/或下降沿。然后根据所述数据存储时段存储所述传输信号的所述数据，即可提高传输信号的数据提取的准确率。
所述获取预设时长，根据所述零伏时间点和所述预设时长，生成以所述零伏时间点为中心时间点的数据存储时段的步骤之前，还包括根据所述时钟信号和信号叠加后的所述时钟信号，得到信号叠加后的所述时钟信号的波形异常值；根据所述波形异常值确定所述预设时长。具体地，获取所述时钟信号的所述零伏时间点，作为第一时间点；获取信号叠加后的所述时钟信号的所有所述零伏时间点，作为第二时间点；根据所述第一时间点和所述第二时间点，得到信号叠加后的所述时钟信号的波形异常值。
需要说明的是，由于进行信号叠加后的时钟信号的波形变异，因此信号叠加后的时钟信号的零伏时间点的数量可能会比理想状态下，波形未变异的时钟信号的零伏时间点的数量要多。因此，可以根据第一时间点和第二时间点的数量的差值，得到所述波形异常值。所述预设时长可以是与所述波形异常值成反比例关系，因此，所述预设时长可以是计算所述波形异常值的倒数得到。根据实际情况，为了避免获取到不需要的传输信号的数据，还可以设定所述预设时长的最大值为所述时间区间的八分之一的区间时长。
在生成所述数据存储时段之后，在所述数据存储时段内启动数据存储器，在该数据存储时段内通过存储传输信号的数据，实现对传输信号的数据的提取。需要说明的是，可以是在数据存储时段的各个时段的开始时间，通过控制数据存储器控制电路输出的使能信号为高电平，启动数据存储器的信号数据存储功能；在数据存储时段的各个时段的结束时间，通过控制数据存储器控制电路输出的使能信号为低电平，关闭数据存储器的信号数据存储功能。在数据存储时段以外的时间，不进行传输信号的数据的存储。
在一实施例中，在接收到传输信号时，解析所述传输信号对应的时钟信号，得到所述时钟信号的信号频率；根据所述信号频率，获取与所述传输信号进行信号叠加后的所述时钟信号的零伏时间点；获取预设时长，根据所述零伏时间点和所述预设时长，生成以所述零伏时间点为中心时间点的数据存储时段；在所述数据存储时段内存储所述传输信号的数据。这样，通过生成以所述零伏时间点为中心时间点的数据存储时段，保证该数据存储时段能包含信号叠加后的时钟信号的上升沿或者下降沿，并在该数据存储时段内存储传输信号的数据，提高了对传输信号的数据提取的准确性。
在一实施例中，如图3所示，在上述图2所示的实施例基础上，所述根据所述信号频率，获取与所述传输信号进行信号叠加后的所述时钟信号的零伏时间点的步骤包括：
步骤S21、根据所述信号频率计算相邻两个所述零伏时间点之间的时间区间。
步骤S22、根据所述时间区间获取所述零伏时间点。
本实施例中，由于相邻两个零伏时间点之间的所述时间区间等于半个时钟周期，便可利用信号周期和信号频率为倒数关系，根据所述信号频率计算得到进行信号叠加后的时钟信号的信号周期，然后根据所述信号周期，即可计算得到所述时间区间。需要说明的是，由于与所述传输信号对应的时钟信号是由时钟源产生的，通过设置在时钟源的频率解析电路解析得到的所述时钟信号的信号频率，亦可作为与传输信号进行信号叠加后的时钟信号的频率。
具体地，每隔一个所述时间区间，即获取一个进行信号叠加后的时钟信号的时间点作为零伏时间点，这样，即可避免获取到因波形变动而产生的零伏时间点。
在一实施例中，根据所述信号频率计算相邻两个所述零伏时间点之间的时间区间；根据所述时间区间获取所述零伏时间点。这样，实现对零伏时间点的准确获取，避免获取到因波形变动而产生的零伏时间点。
在一实施例中，如图4所示，在上述图2至图3的实施例基础上，所述根据所述信号频率计算相邻两个所述零伏时间点之间的时间区间的步骤包括：
步骤S23、根据所述信号频率计算进行信号叠加后的所述时钟信号的信号周期。
步骤S24、根据所述信号周期计算所述时间区间。
本实施例中，根据信号频率和信号周期的倒数关系，即可通过信号频率计算出进行信号叠加后的时钟信号的信号周期，由于两个相邻零伏时间点的时间区间等于半个信号周期，即可根据信号周期计算出所述时间区间。
在一实施例中，根据所述信号频率计算进行信号叠加后的所述时钟信号的信号周期；根据所述信号周期计算所述时间区间。这样，实现了对两个相邻零伏时间点的时间区间的计算。
在一实施例中，如图5所示，在上述图2至图4的实施例基础上，所述获取预设时长，根据所述零伏时间点和所述预设时长，生成以所述零伏时间点为中心时间点的数据存储时段的步骤之前，还包括：
步骤S50、根据所述时钟信号和信号叠加后的所述时钟信号，得到信号叠加后的所述时钟信号的波形异常值。
步骤S60、根据所述波形异常值确定所述预设时长。
本实施例中，所述获取预设时长，根据所述零伏时间点和所述预设时长，生成以所述零伏时间点为中心时间点的数据存储时段的步骤之前，还包括根据所述时钟信号和信号叠加后的所述时钟信号，得到信号叠加后的所述时钟信号的波形异常值；根据所述波形异常值确定所述预设时长。具体地，获取所述时钟信号的所述零伏时间点，作为第一时间点；获取信号叠加后的所述时钟信号的所有所述零伏时间点，作为第二时间点；根据所述第一时间点和所述第二时间点，得到信号叠加后的所述时钟信号的波形异常值。
需要说明的是，由于进行信号叠加后的时钟信号的波形变异，因此信号叠加后的时钟信号的零伏时间点的数量可能会比理想状态下，波形未变异的时钟信号的零伏时间点的数量要多。因此，可以根据第一时间点和第二时间点的数量的差值，得到所述波形异常值。所述预设时长可以是与所述波形异常值成反比例关系，因此，所述预设时长可以是计算所述波形异常值的倒数得到。
这样，通过波形异常值确定预设时长，可以是在波形异常值越大时，确定的预设时长就越小，并且根据实际情况，为了避免获取到不需要的传输信号的数据，还可以设定所述预设时长的最大值为，两个零伏时间点之间的时间区间的八分之一区间时长。
在一实施例中，根据所述时钟信号和信号叠加后的所述时钟信号，得到信号叠加后的所述时钟信号的波形异常值；根据所述波形异常值确定所述预设时长。这样，根据波形异常值确定预设时长，相应地，通过设定在波形异常值越大时，确定的预设时长越小，以保证能根据波形稳定的时间段存储传输信号的数据。
在一实施例中，如图6所示，在上述图2至图5的实施例基础上，所述根据所述时钟信号和信号叠加后的所述时钟信号，得到信号叠加后的所述时钟信号的波形异常值的步骤包括：
步骤S51、获取所述时钟信号的所述零伏时间点，作为第一时间点。
步骤S52、获取信号叠加后的所述时钟信号的所有所述零伏时间点，作为第二时间点。
步骤S53、根据所述第一时间点和所述第二时间点，得到信号叠加后的所述时钟信号的波形异常值。
本实施例中，由于进行信号叠加后的时钟信号的波形变异，因此信号叠加后的时钟信号的零伏时间点的数量可能会比理想状态下，波形未变异的时钟信号的零伏时间点的数量要多。因此，可以根据第一时间点和第二时间点的数量的差值，得到所述波形异常值。所述预设时长可以是与所述波形异常值成反比例关系，因此，所述预设时长可以是计算所述波形异常值的倒数得到。
在一实施例中，获取所述时钟信号的所述零伏时间点，作为第一时间点；获取信号叠加后的所述时钟信号的所有所述零伏时间点，作为第二时间点；根据所述第一时间点和所述第二时间点，得到信号叠加后的所述时钟信号的波形异常值。这样，实现根据波形异常值的获取，相应地，还可以实现通过设定在波形异常值越大时，确定的预设时长越小。
在一实施例中，如图7所示，在上述图2至图6的实施例基础上，所述根据所述信号频率，获取与所述传输信号进行信号叠加后的所述时钟信号的零伏时间点的步骤之后，还包括：
步骤S70、根据所述零伏时间点确定进行信号叠加后的所述时钟信号的上升沿或者下降沿。
步骤S71、获取预设时长，根据所述预设时长和所述上升沿，或者所述预设时长和所述下降沿，生成以所述上升沿或者所述下降沿为起始时间点的数据存储时段。
步骤S72、在所述数据存储时段内存储所述传输信号的数据。
本实施例中，通过检测零伏时间点附近信号波形的电平跳变，即可确定信号叠加后的所述时钟信号的上升沿或者下降沿。所述预设时长可以是是根据波形异常值确定的，也可以是预设为3s、5s等。所述数据存储时段的起始时间点为上升沿或者下降沿，即在信号叠加后的所述时钟信号处于上升沿或者下降沿时，启动数据存储器存储传输信号的数据，经过预设时长后，关闭数据存储器。
在一实施例中，根据所述零伏时间点确定进行信号叠加后的所述时钟信号的上升沿或者下降沿；获取预设时长，根据所述预设时长和所述上升沿，或者所述预设时长和所述下降沿，生成以所述上升沿或者所述下降沿为起始时间点的数据存储时段；在所述数据存储时段内存储所述传输信号的数据。这样，提高了对传输信号的数据提取的准确性。
在一实施例中，如图8所示，在上述图2至图7的实施例基础上，所述根据所述信号频率，获取与所述传输信号进行信号叠加后的所述时钟信号的零伏时间点的步骤之后，还包括：
步骤S80、在信号叠加后的所述时钟信号处于所述上升沿或者下降沿时，获取所述传输信号与所述上升沿或者下降沿对应的时间点。
步骤S81、根据所述时间点提取所述传输信号的所述数据.
本实施例中，在获取到信号叠加后的所述时钟信号的零伏时间点之后，在信号叠加后的所述时钟信号处于上升沿或者下降沿时，获取所述传输信号的与所述上升沿或者所述下降沿对应的时间点，根据所述时间点提取所述传输信号的所述数据。这样，提高了对传输信号的数据提取的准确性。
在一实施例中，如图9所示，在上述图2至图8的实施例基础上，所述在所述数据存储时段内存储所述传输信号的数据的步骤包括：
步骤S90、在所述数据存储时段内，控制数据存储器启动数据存储功能，以存储所述传输信号的所述数据。
本实施例中，在生成所述数据存储时段之后，在所述数据存储时段内启动数据存储器，在该数据存储时段内通过存储传输信号的数据，实现对传输信号的数据的提取。需要说明的是，可以是在数据存储时段的各个时段的开始时间，通过控制数据存储器控制电路输出的使能信号为高电平，启动数据存储器的信号数据存储功能；在数据存储时段的各个时段的结束时间，通过控制数据存储器控制电路输出的使能信号为低电平，关闭数据存储器的信号数据存储功能。在数据存储时段以外的时间，不进行传输信号的数据的存储。
在一实施例中，在所述数据存储时段内，控制数据存储器启动数据存储功能，以存储所述传输信号的所述数据。这样，通过数据存储器控制电路在数据存储时段输出使能信号，以实现控制数据存储器存储传输信号的数据。
此外，本申请还提出一种传输信号的数据存储装置，所述传输信号的数据存储装置包括存储器、处理器及存储在存储器上并可在处理器上运行的传输信号的数据存储程序，所述处理器执行所述传输信号的数据存储程序时实现如以上实施例所述的传输信号的数据存储方法的步骤。
此外，本申请还提出一种计算机可读存储介质，其中，所述计算机可读存储介质包括传输信号的数据存储程序，所述传输信号的数据存储程序被处理器执行时实现如以上实施例所述的传输信号的数据存储方法的步骤。
上述本申请实施例序号仅仅为了描述，不代表实施例的优劣。
通过以上的实施方式的描述，本领域的技术人员可以清楚地了解到上述实施例方法可借助软件加必需的通用硬件平台的方式来实现，当然也可以通过硬件，但很多情况下前者是更佳的实施方式。基于这样的理解，本申请的技术方案本质上可以以软件产品的形式体现出来，该计算机软件产品存储在如上所述的一个存储介质(如ROM/RAM、磁碟、光盘)中，包括若干指令用以使得一台终端设备(可以是电视机，手机，计算机，服务器，空调器，或者网络设备等)执行本申请各个实施例所述的方法。
以上仅为本申请的可选实施例，并非因此限制本申请的专利范围，凡是利用本申请说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本申请的专利保护范围内。

Claims (18)

  1. 一种传输信号的数据存储方法，其中，所述传输信号的数据存储方法包括以下步骤：
    在接收到传输信号时，解析所述传输信号对应的时钟信号，得到所述时钟信号的信号频率；
    根据所述信号频率，获取与所述传输信号进行信号叠加后的所述时钟信号的零伏时间点；
    获取预设时长，根据所述零伏时间点和所述预设时长，生成以所述零伏时间点为中心时间点的数据存储时段；以及
    在所述数据存储时段内存储所述传输信号的数据。
  2. 如权利要求1所述的传输信号的数据存储方法，其中，所述根据所述信号频率，获取与所述传输信号进行信号叠加后的所述时钟信号的零伏时间点的步骤包括：
    根据所述信号频率计算相邻两个所述零伏时间点之间的时间区间；以及
    根据所述时间区间获取所述零伏时间点。
  3. 如权利要求2所述的传输信号的数据存储方法，其中，所述根据所述信号频率计算相邻两个所述零伏时间点之间的时间区间的步骤包括：
    根据所述信号频率计算进行信号叠加后的所述时钟信号的信号周期；以及
    根据所述信号周期计算所述时间区间。
  4. 如权利要求1所述的传输信号的数据存储方法，其中，所述获取预设时长，根据所述零伏时间点和所述预设时长，生成以所述零伏时间点为中心时间点的数据存储时段的步骤之前，还包括：
    根据所述时钟信号和信号叠加后的所述时钟信号，得到信号叠加后的所述时钟信号的波形异常值；以及
    根据所述波形异常值确定所述预设时长。
  5. 如权利要求4所述的传输信号的数据存储方法，其中，所述根据所述时钟信号和信号叠加后的所述时钟信号，得到信号叠加后的所述时钟信号的波形异常值的步骤包括：
    获取所述时钟信号的所述零伏时间点，作为第一时间点；
    获取信号叠加后的所述时钟信号的所有所述零伏时间点，作为第二时间点；以及
    根据所述第一时间点和所述第二时间点，得到信号叠加后的所述时钟信号的波形异常值。
  6. 如权利要求5所述的传输信号的数据存储方法，其中，所述根据所述第一时间点和所述第二时间点，得到信号叠加后的所述时钟信号的波形异常值的步骤包括：
    计算所述第一时间点和所述第二时间点的数量的差值，以得到信号叠加后的所述时钟信号的波形异常值。
  7. 如权利要求1所述的传输信号的数据存储方法，其中，所述在所述数据存储时段内存储所述传输信号的数据的步骤包括：
    在所述数据存储时段内，控制数据存储器启动数据存储功能，以存储所述传输信号的所述数据。
  8. 如权利要求1所述的传输信号的数据存储方法，其中，所述在所述数据存储时段内存储所述传输信号的数据的步骤包括：
    在各个所述数据存储时段的开始时间，通过控制输出的数据存储器的使能信号为高电平，启动数据存储器的信号数据存储功能，以存储所述传输信号的数据；以及
    在各个所述数据存储时段的结束时间，通过控制输出的数据存储器的使能信号为低电平，关闭数据存储器的信号数据存储功能，以停止存储所述传输信号的数据。
  9. 如权利要求1所述的解析所述传输信号对应的时钟信号，得到所述时钟信号的信号频率的步骤包括：
    控制设置在时钟源的频率解析电路解析所述传输信号对应的时钟信号，以得到所述时钟信号的信号频率，其中，所述时钟信号由所述时钟源生成。
  10. 如权利要求1所述的传输信号的数据存储方法，其中，所述根据所述信号频率，获取与所述传输信号进行信号叠加后的所述时钟信号的零伏时间点的步骤之后，还包括：
    根据所述零伏时间点确定进行信号叠加后的所述时钟信号的上升沿或者下降沿；
    获取预设时长，根据所述预设时长和所述上升沿，或者所述预设时长和所述下降沿，生成以所述上升沿或者所述下降沿为起始时间点的数据存储时段；以及
    在所述数据存储时段内存储所述传输信号的数据。
  11. 如权利要求10所述的传输信号的数据存储方法，其中，所述根据所述零伏时间点确定进行信号叠加后的所述时钟信号的上升沿或者下降沿的步骤包括：
    通过检测所述零伏时间点附近信号波形的电平跳变，以确定信号叠加后的所述时钟信号的上升沿或者下降沿。
  12. 如权利要求10所述的传输信号的数据存储方法，其中，所述在所述数据存储时段内存储所述传输信号的数据的步骤包括：
    在所述数据存储时段内，控制数据存储器启动数据存储功能，以存储所述传输信号的所述数据。
  13. 如权利要求12所述的传输信号的数据存储方法，其中，所述在所述数据存储时段内，控制数据存储器启动数据存储功能的步骤包括：
    在各个所述数据存储时段的开始时间，通过控制输出的数据存储器的使能信号为高电平，启动数据存储器的信号数据存储功能；以及
    在各个所述数据存储时段的结束时间，通过控制输出的数据存储器的使能信号为低电平，关闭数据存储器的信号数据存储功能。
  14. 如权利要求10所述的传输信号的数据存储方法，其中，所述在所述数据存储时段内存储所述传输信号的数据的步骤包括：
    在信号叠加后的所述时钟信号处于上升沿或者下降沿时，启动数据存储器存储传输信号的数据；以及
    经过预设时长后，关闭数据存储器。
  15. 如权利要求10所述的传输信号的数据存储方法，其中，所述根据所述零伏时间点确定进行信号叠加后的所述时钟信号的上升沿或者下降沿的步骤之后，还包括：
    在信号叠加后的所述时钟信号处于所述上升沿或者下降沿时，获取所述传输信号与所述上升沿或者下降沿对应的时间点；以及
    根据所述时间点提取所述传输信号的所述数据。
  16. 如权利要求1所述的传输信号的数据存储方法，其中，所述传输信号的数据存储方法还包括：
    在接收到差分信号时，解析所述差分信号对应的时钟信号，得到所述时钟信号的信号频率；
    根据所述信号频率，获取与所述差分信号进行信号叠加后的所述时钟信号的零伏时间点；
    获取预设时长，根据所述零伏时间点和所述预设时长，生成以所述零伏时间点为中心时间点的数据存储时段；以及
    在所述数据存储时段内存储所述差分信号的数据。
  17. 一种传输信号的数据存储装置，其中，所述传输信号的数据存储装置包括存储器、处理器及存储在所述存储器上并可在所述处理器上运行的传输信号的数据存储程序，所述传输信号的数据存储程序被所述处理器执行时实现如下传输信号的数据存储方法的步骤：
    在接收到传输信号时，解析所述传输信号对应的时钟信号，得到所述时钟信号的信号频率；
    根据所述信号频率，获取与所述传输信号进行信号叠加后的所述时钟信号的零伏时间点；
    获取预设时长，根据所述零伏时间点和所述预设时长，生成以所述零伏时间点为中心时间点的数据存储时段；以及
    在所述数据存储时段内存储所述传输信号的数据。
  18. 一种计算机可读存储介质，其中，所述计算机可读存储介质上存储有传输信号的数据存储程序，所述传输信号的数据存储程序被所述处理器执行时实现如下传输信号的数据存储方法的步骤：
    在接收到传输信号时，解析所述传输信号对应的时钟信号，得到所述时钟信号的信号频率；
    根据所述信号频率，获取与所述传输信号进行信号叠加后的所述时钟信号的零伏时间点；
    获取预设时长，根据所述零伏时间点和所述预设时长，生成以所述零伏时间点为中心时间点的数据存储时段；以及
    在所述数据存储时段内存储所述传输信号的数据。
PCT/CN2018/116932 2018-10-08 2018-11-22 传输信号的数据存储方法、装置及存储介质 Ceased WO2020073440A1 (zh)

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