WO2020062905A1 - 一种oled显示装置及其控制方法 - Google Patents

一种oled显示装置及其控制方法 Download PDF

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Publication number
WO2020062905A1
WO2020062905A1 PCT/CN2019/089139 CN2019089139W WO2020062905A1 WO 2020062905 A1 WO2020062905 A1 WO 2020062905A1 CN 2019089139 W CN2019089139 W CN 2019089139W WO 2020062905 A1 WO2020062905 A1 WO 2020062905A1
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WIPO (PCT)
Prior art keywords
power
transistor
display device
terminal
oled display
Prior art date
Application number
PCT/CN2019/089139
Other languages
English (en)
French (fr)
Inventor
于伟经
卢蒙蒙
王西瑜
贺洋
薛广华
贾少谦
陈彦霖
张在京
程志
白晓东
Original Assignee
青岛海信电器股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Priority claimed from CN201811115226.0A external-priority patent/CN110942747B/zh
Priority claimed from CN201811615553.2A external-priority patent/CN109688355A/zh
Application filed by 青岛海信电器股份有限公司 filed Critical 青岛海信电器股份有限公司
Priority to US16/663,032 priority Critical patent/US11200837B2/en
Publication of WO2020062905A1 publication Critical patent/WO2020062905A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/026—Arrangements or methods related to booting a display
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/027—Arrangements or methods related to powering off a display
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/028—Generation of voltages supplied to electrode drivers in a matrix display other than LCD

Definitions

  • the present application mainly relates to the field of display technology, and in particular, to an OLED display device and a control method thereof.
  • OLED Organic Light-Emitting Diode
  • the standby power supply signal needs to be changed from low level to high level, and then the reset signal is changed from low level to high. Level before being able to AC power on.
  • the OLED display device In order to protect the OLED screen, the OLED display device requires the power output to the display screen and TCON (Timer Control Register) to be maintained for a period of time after the power is turned off (AC power off or DC power off). Therefore, the power board requires Add a large amount of electrolytic capacitor discharge to keep the output power supply capability.
  • TCON Timer Control Register
  • the power supply board outputs 5V voltage as standby power to power the main chip for a period of time, which makes the main chip power supply and standby power supply signal 3.3VS after AC power failure. Can't fall quickly. If the AC is powered on at this time, it will not be able to meet the normal AC online timing requirements, and the display device will not start normally, causing problems such as crashes and no response.
  • the object of the present application is to provide an OLED display device and a control method thereof, and at least to a certain extent, overcome the limitations and defects caused by related technologies.
  • the OLED screen In order to meet the power failure, the OLED screen needs to be continuously powered for a period of time.
  • the main chip power supply cannot drop quickly when the AC is powered off, which causes the problem that the OLED display device cannot be started normally when the AC is powered on again.
  • an OLED display device including a power board, a main chip, and further including:
  • the first switch unit is electrically connected to the standby voltage terminal of the power board and the standby voltage terminal of the main chip, respectively, and is used to control the connection or disconnection of the standby voltage terminal of the power board and the standby voltage terminal of the main chip. open;
  • the first control unit is electrically connected to the first switch unit, the power board, and the main chip, respectively, and is configured to receive an AC detection signal output by the power board and a DC detection signal output by the main chip, and control Turning on or off the first switching unit;
  • the AC detection signal is used to detect whether a signal of AC power failure or AC power is received, and the DC detection signal is used to detect whether a signal of DC power failure or DC power is received.
  • a method for controlling an OLED display device for controlling the OLED display device according to any one of the above, and the method for controlling an OLED display device includes: when the AC detection signal is low When the DC detection signal is at a high level, the first switching unit is controlled to be turned off to disconnect the standby voltage terminal of the power board from the standby voltage terminal of the main chip.
  • the OLED display device of the exemplary embodiment of the present application and a control method thereof.
  • the OLED display device includes a first switch unit, which is electrically connected to a standby voltage terminal of the power board and a standby voltage terminal of the main chip, respectively, for controlling.
  • the standby voltage terminal of the power board is connected or disconnected with the standby voltage terminal of the main chip;
  • the first control unit is electrically connected to the first switch unit, the power board and the main chip, respectively, and is used for Receiving the AC detection signal output by the power board and the DC detection signal output by the main chip to control the on or off of the first switch unit; wherein the AC detection signal is used to detect whether an AC power failure is received Or an AC power-on signal, and the DC detection signal is used to detect whether a DC power-off or DC power-on signal is received.
  • the logic control of the OLED display device of the present application is: when the AC detection signal is at a low level and the DC detection signal is at a high level, controlling the first switching unit to be turned off to disconnect the standby voltage of the power board And the terminal is in communication with the standby voltage terminal of the main chip. Therefore, through the power supply circuit and the control method of the present application, the problem that the power supply of the main chip cannot be dropped quickly when the AC is powered off, causing the problem that the OLED display device cannot be normally started when the AC is powered on again.
  • FIG. 1A shows a schematic diagram of an AC power-on sequence in a prior art solution
  • FIG. 1B shows a schematic diagram of an abnormal AC power-on sequence in a prior art solution
  • FIG. 2 shows a schematic diagram of a reset circuit in a prior art solution
  • FIG. 3 shows a schematic diagram of detecting AC power failure through an AC control signal in a prior art solution
  • 5A shows a schematic diagram of a power supply circuit according to some embodiments of the present application.
  • 5B is a schematic diagram illustrating a process of a false wake-up problem after AC power failure after DC standby in the present application
  • 5C illustrates an interaction process between a T8032 chip and an ARM chip when solving the false wake-up problem in some embodiments of the present application
  • FIG. 6A is a schematic diagram of a power supply circuit according to another embodiment of the present application.
  • FIG. 6B shows a schematic diagram of a power supply circuit according to still other embodiments of the present application.
  • FIG. 7 schematically illustrates a timing diagram of an AC control signal and a DC control signal during DC power-off / power-on according to some embodiments of the present application
  • FIG. 8 illustrates a schematic diagram of an OLED display device according to still other embodiments of the present application.
  • FIG. 9A shows a schematic diagram of an OLED display device according to still other embodiments of the present application.
  • FIG. 9B illustrates a schematic circuit structure of an OLED display device according to some embodiments of the present application.
  • FIG. 9C illustrates a power-on flowchart of an OLED unit during normal startup according to some embodiments of the present application.
  • FIG. 9D illustrates a power-on timing diagram of an OLED unit according to some embodiments of the present application.
  • FIG. 9E illustrates a power-down flowchart of the OLED unit when the OLED display device is in normal DC standby according to some embodiments of the present application.
  • FIG. 9F shows a flowchart of an OLED display display driving unit achieving rapid discharge when the OLED display device is powered on and AC is turned off according to some embodiments of the present application.
  • FIG. 10 is a schematic flowchart of a method for controlling an OLED display device according to some embodiments of the present application.
  • FIG. 11 schematically illustrates a timing diagram when AC is powered off according to some embodiments of the present application.
  • FIG. 12 schematically illustrates a timing diagram when an AC is powered on according to some embodiments of the present application
  • FIG. 13 schematically illustrates a timing diagram when DC is powered off according to some embodiments of the present application
  • FIG. 14 schematically illustrates a timing diagram when a DC is powered on according to some embodiments of the present application
  • FIG. 15 shows a schematic diagram of a conventional power supply.
  • Coupled and “connected” as used in this patent application may refer to two or more elements in direct physical or electrical contact with each other, or indirect physical or electrical contact with each other.
  • the terms “first”, “second”,... And the like used in this patent application do not specifically refer to an order or sequence, but merely to distinguish elements or operations described in the same technical terms.
  • the terms “including”, “including”, “having” and the like used in this patent application are all open terms, which means including but not limited to.
  • the directional terms used in this patent application such as: up, down, left, right, front, or rear, etc., are only directions referring to the attached drawings. Therefore, the directional terms used are used to illustrate and not to limit the patent application.
  • FIG. 1A shows a schematic diagram of an AC power-on sequence of an OLED display device in a technical solution.
  • T0 represents the time interval (150 ⁇ S ⁇ T0 ⁇ 1S) from the rise of the standby power supply signal 3.3VS to the start of the reset signal.
  • the level of the reset signal is the voltage at node R. Level, when the standby power supply signal 3.3VS goes high, the level at node R rises as the electrolytic capacitor C21 is charged.
  • T1 indicates the time interval from the standby power supply signal 3.3VS to the normal working power supply signal (150 ⁇ S ⁇ T1 ⁇ 1S), and T2 indicates the reset signal and normal operation.
  • Time interval from power supply signal to system startup T2> 14.1mS. It can be seen that the above-mentioned timing requirements, first change the standby power supply signal from a low level to a high level, and then change the reset signal from a low level to a high level, and then be able to AC power on, so that the display device can work normally.
  • the power supply board used by a common display device outputs 5V voltage as a standby power supply to the main chip, and outputs 12V as a power source for the display screen and TCON (Timer Control Register).
  • the power supply board Turn off the 12V power supply to the display and TCON, and only reserve the 5V power supply to the main chip, thereby reducing standby power consumption.
  • the OLED display device Due to the performance of the OLED screen, in order to protect the OLED screen, the OLED display device requires the 12V power supply of the display to be maintained for a period of time after the power is cut off (AC power off or DC power off), so the power board needs to add a lot of electrolysis Capacitor discharge maintains the ability to power the output.
  • the power supply of 5V / 3.3V (where 3.3V is converted from 5V) will also be maintained for a period of time, which makes the main chip's 5V power supply after AC power failure. And the standby power supply signal 3.3VS cannot be dropped quickly. If the AC is powered on at this time (restart the display device), the situation shown in Figure 1B will appear: As can be seen from the part marked in circle 101, the standby power supply signal (3.3VS) does not change from low level to high power. This process is leveled, but the reset signal changes from a low level to a high level while the standby power supply signal is continuously maintained at a high level. Obviously, it does not meet the timing requirements for normal AC power-on shown in Figure 1A. When the display device fails to start normally, it will cause crashes and no response.
  • the main chip power supply cannot drop quickly when AC power is lost, causing the AC power-on display device to fail to start normally.
  • the 3.3V power supply drops slowly.
  • a switching circuit is added. When AC power is cut off, the main board's 5V is cut off directly through the switch circuit, which also cuts off 3.3V.
  • a signal is required to notify the motherboard when AC power is lost.
  • the power board outputs an AC_DETECT signal to TCON to instruct TCON to respond.
  • the AC_DETECT signal will be pulled low after AC is OFF, that is, about 20ms after the AC is powered off. Therefore, the AC_DETECT signal can be used as the trigger signal of the switching circuit to indicate the opening and closing of the switching circuit.
  • a switching circuit is added between the power board and the main chip.
  • the switching circuit is controlled by the AC_DETECT signal.
  • AC_DETECT When AC is powered on, that is, ACON, the AC_DETECT signal is high level, and the switch The circuit is on.
  • AC power When AC power is off, that is, AC_DETECT is low, the switch circuit is cut off, and all power supply of the system is cut off. Therefore, it can be guaranteed that about 20ms after AC power failure (AC_DETECT is pulled low), even if the power board has 5V power supply and output, but the 5V power supply is cut off by the switch circuit, it cannot be transmitted to the main chip, that is, the 5V power of the main chip. It can drop quickly, and the standby power supply signal 3.3V also drops rapidly. At this time, when the AC is powered on again, the timing of the main chip meets the specifications and can be started normally.
  • the AC_DETECT signal is not only pulled down when AC is powered down, but also pulled down when DC is powered down.
  • the above scheme also switches the circuit when the DC power is turned off (the OLED display device is in the standby state). At the end of this period, 5V power cannot supply power to the main chip, and according to requirements, the main chip must work when the display device is in standby, otherwise it cannot be turned on remotely.
  • an OLED display device is first provided.
  • the OLED display device includes a power board 510, a main chip 520, and a power supply circuit.
  • the power supply circuit includes a first switch unit 530 and a first control unit 540.
  • the first switch unit 530 is electrically connected to the standby voltage terminal P1 of the power board 510 and the standby voltage terminal P2 of the main chip 520, respectively, and is used to control the standby voltage terminal P1 of the power board 510 and the standby voltage terminal P2 of the main chip 520.
  • the first control unit 540 is electrically connected to the first switch unit 530, the port P3 of the power board 510, and the port P4 of the main chip 520, respectively, for responding to the AC detection signal output from the port P3 of the power board 510 And a DC detection signal output from the port P4 of the main chip 520 to control the on or off of the first switch unit 530, the AC detection signal is a signal indicating AC power failure or AC power on, and the DC detection signal is DC power failure Or DC power-on signal.
  • the AC detection signal may be the AC_DETECT signal output from the port P3 of the power board 510, and the DC detection signal may be the DC_DETECT signal output from the GPIO port of the main chip 520.
  • the AC detection signal is converted from a high level to a low level.
  • the first control unit 540 controls the first switch unit 530 to turn off, and disconnects the standby voltage terminal P1 of the power board 510 from The standby voltage terminal P2 of the main chip 520 is connected, and the standby voltage stops supplying power to the main chip 520, so that the 5V standby voltage of the main chip can be quickly disconnected when the AC power is off. Because the 5V standby voltage can be quickly disconnected when the AC is powered off, the OLED display device can be normally started when the AC is powered on.
  • the DC detection signal when the DC power is cut off, the DC detection signal is first converted from a high level to a low level.
  • the first control unit 540 controls the first switching unit 530 to keep conducting, and then the AC detection signal is changed from high power Level transitions to low. Because the DC detection signal transitions earlier than the AC detection signal, controlling the first switch unit 530 to keep on when the DC detection signal transitions from a high level to a low level can ensure that the OLED display device can normally stand by when the DC power is off .
  • the first control unit receives the first input signal of AC power failure of the power board and the third input signal of DC power on of the main chip at the same time, it outputs a second control signal.
  • the second control signal is a signal that controls the first switch unit to power off the main chip, and when the first switch unit receives the second control signal, controls the main chip to power off.
  • the main chip includes interconnected System core unit and standby wake-up unit, of which:
  • the system core unit is configured to receive the first wake-up information sent by the standby wake-up unit, run a startup program, and send a first confirmation message to the standby wake-up unit when it reaches a setting part of the startup program;
  • the standby wake-up unit is configured to send a first wake-up message to the system core unit when a standby wake-up signal is received, and start a timer to determine whether the system core unit is received within the timing period of the timer.
  • the first confirmation information sent if not, outputs a third input signal that is DC powered on by the main chip.
  • the main chip includes a system core unit and a standby wake-up unit that are interconnected.
  • the core unit of the system includes an ARM chip for maintaining the system running after booting, and the standby wake-up unit includes a T8032 chip for waking the ARM after detecting a wake-up instruction during standby operation.
  • a first control unit and a first switching unit are provided in the present application.
  • both the power supply board and the main chip are in a power-off state.
  • the first control unit cannot receive the first input signal of the power supply board's AC power failure and the third input signal of the main chip's DC power at the same time.
  • the main chip cannot be controlled to be powered off. Therefore, at this time, the T8032 chip, which is used to wake up the display device, is still normally powered.
  • the T8032 chip is powered by the discharge of the electrolytic capacitor, and the ARM core will also be powered, so the OLED display device is woken up.
  • the ARM core is faster than the T8032 chip, the ARM core will stop immediately because of insufficient power supply, while the T8032 chip still has power and thinks that the OLED display device has been woken up. If the AC power is turned on at this time, it will reappear. Unable to wake up. Specifically, the AC power is cut off during the DC standby.
  • the power supply process of the entire OLED display device operating system is shown in FIG. 5B.
  • the OLED display device When the OLED display device enters DC standby, the AC power-on detection signal AC_DET at the power supply terminal is pulled down to a low level, and the DC power-on detection signal DC_DET is also low by default. At this time, T8032 is normally powered. At this time, if the AC power is off, AC_DET and DC_DET are still low, that is, the first control unit receives the input signals of DC power off and AC power off. Therefore, after the output of the first control unit, T8032 is still in the power supply. status. At this time, if the OLED display device is woken up, a false wake-up occurs, that is, the ARM has not been loaded with the kernel. Due to insufficient nuclear power supply, it will stop directly, but T8032 still supplies power for a period of time. If the AC is powered on again, T8032 thinks that ARM has already woken up and will not wake up ARM again.
  • this problem is solved by re-programming the boot-up startup program to the main chip.
  • the remote controller When the user presses the standby button of the remote controller, the remote controller sends a standby wake-up signal to the OLED display device.
  • the standby wake-up unit receives the standby wake-up signal and wakes up the OLED display device by sending the first wake-up information to the system core unit.
  • the system core unit of the main chip After the system core unit of the main chip receives the first wake-up information, it starts to run the startup program. Under normal circumstances, when the system core unit runs to the setting part of the startup program, it sends a first confirmation message to the standby wake-up unit, indicating that the current system core unit has started normally.
  • the setting part is the core part of the startup program, that is, the kernel part, which can ensure that the OLED display device starts normally when the startup program runs to this point.
  • the standby wake-up unit starts the timer at the same time as sending the first wake-up message, and judges whether the first confirmation message has been received within the timing period of the timer. If it is, it will stop responding to the standby wake-up signal; if not, it indicates that the current core unit of the system is in an abnormal situation, that is, a false wake-up state: the core unit of the system stops directly because of insufficient power supply.
  • the standby wake-up unit needs to output a third input signal of the main chip DC power-on through the first control unit and the first control unit.
  • a switch unit controls the standby wake-up unit included in the main chip to directly power off, so that the display device system is restored to the initial state, so that it can be turned on again normally.
  • the interaction process between the standby wake-up unit T8032 chip and the system core unit ARM chip is shown in FIG. 5C.
  • Step 1 When the OLED display device is in the standby state, T8032 will detect whether a standby wake-up signal is received. When a standby wake-up signal is detected, it will wake up the ARM chip by sending the first wake-up message to the ARM chip. At the same time, T8032 starts a timer ,start the timer.
  • the ARM chip When the ARM chip receives the first wake-up message, it starts to run the startup program. When it reaches the Kernel part of the start-up program, it sends an ACK, which is the first confirmation message, to the T8032.
  • Step 2 T8032 determines whether the first confirmation message sent by the ARM chip is received within the timing period of the timer.
  • the OLED display device is in a power-on state, and T8032 no longer responds to the standby wake-up signal.
  • the system sends a first confirmation message to the standby wake-up unit when the system core unit runs to the setting part of the startup program to ensure whether the OLED display device has been woken up, and solves the false wake-up after the standby AC power failure. , Resulting in a problem that ca n’t really wake up in a certain period of time.
  • FIG. 6A shows a schematic diagram of a power supply circuit according to another embodiment of the present application.
  • the first switching unit 530 includes a first transistor V1, an optional MOS transistor, a transistor, and the like
  • the first control unit 540 includes a second transistor V2, a third transistor V3, and a fourth transistor. V4.
  • the second transistor V2 when the second transistor V2 is turned on, the first transistor V1 is turned on; otherwise, when the second transistor V2 is turned off, the first transistor V1 is turned off.
  • the second transistor V2 is controlled by both the level of AC-DETECT and the level of the second terminal of the third transistor V2. When at least one of these two levels is high, the second transistor V2 will be turned on. Conversely, when these two levels are at the low level at the same time, the second transistor V2 is turned off.
  • control terminal 3 of the first transistor V1 is electrically connected to the first terminal 1 of the second transistor V2, and the first terminal 1 of the first transistor V1 is electrically connected to the standby voltage terminal P1 of the power board 510, that is, 5VS_IN.
  • the second terminal 2 of the first transistor V1 is electrically connected to the standby voltage terminal P2 of the main chip 520, that is, 5VS.
  • the second terminal 2 of the first transistor V1 can also be connected to the standby of the motherboard (not shown in the figure).
  • the voltage terminals (not shown) are connected.
  • the standby voltage terminal P1 of the control power board 510 When the first transistor V1 is turned on, the standby voltage terminal P1 of the control power board 510 is connected to the standby voltage terminal P2 of the main chip 520; when the first transistor V1 is turned off, the standby voltage terminal P1 of the control power board 510 is connected to the main The standby voltage terminal P2 of the chip 520 is turned off.
  • the standby voltage of the power board 510 When the standby voltage terminal P1 of the power board 510 is connected to the standby voltage terminal P2 of the main chip 520, the standby voltage of the power board 510, that is, 5V voltage can supply power to the main chip 520; the standby voltage terminal P1 of the power board 510 and the main chip 520 When the standby voltage terminal P2 is turned off, the standby voltage of the power supply board 510 stops supplying power to the main chip 520, and the 5V standby voltage that supplies power to the main chip 520 can be quickly disconnected.
  • the control terminal 3 of the second transistor V2 is electrically connected to the second terminal 2 of the third transistor V3 and the port P3 (see FIG. 5A) of the power board 510, and the second terminal 2 of the second transistor V2 is grounded.
  • the control terminal 3 of the second transistor V2 receives the AC detection signal, that is, the AC_DETECT signal;
  • the control terminal 3 of the third transistor V3 is electrically connected to the first terminal 1 of the fourth transistor V4, and the first terminal 1 of the third transistor V3 is connected to a power source.
  • the standby voltage terminal P1 of the board 510 is electrically connected;
  • the control terminal 3 of the fourth transistor V4 is electrically connected to the output terminal P4 of the main chip 520 (see FIG. 5A), the second terminal 2 of the fourth transistor V4 is grounded, and the fourth transistor V4
  • the control terminal 3 receives a DC detection signal, that is, a DC_DETECT signal.
  • the AC_DETECT signal when an AC power failure is detected, the AC_DETECT signal is pulled from high to low, but at this time, the standby voltage 5VS_IN has not been powered off because the electrolytic capacitor is discharged, that is, DC has not yet occurred Power off, DC_DETECT remains high, so the fourth transistor V4 is turned on and the third transistor V3 is turned off. Since the AC-DETECT signal is at a low level and the third terminal V3 is turned off, the second terminal voltage is low, so the base voltage of the second transistor V2 is at a low level, that is, the second transistor V2 is turned off.
  • the standby voltage 5V of the main chip SoC System on Chip
  • the standby power supply signal is at a low level
  • the timing of the main chip can meet the specifications shown in FIG. 1A, and the OLED display device can be started normally.
  • FIG. 11 schematically illustrates a timing diagram when the AC is powered off according to some embodiments of the present application.
  • the AC power-off signal is received in the power-on state, that is, at the moment of the vertical line a
  • the AC_DETECT signal is pulled from a high level to a low level.
  • the first transistor V1 is a MOS transistor.
  • V1 is turned off, the standby voltage 5VS is quickly powered off, and then the DC_DETECT signal changes from a high level to a low level.
  • the AC_DETECT signal becomes high, the second transistor V2 is turned on, the first transistor V1 is turned on, and the standby voltage 5V starts to be powered on.
  • the power supply signal is low, so the timing of the main chip can meet the specifications shown in FIG. 1A, so that the OLED display device can be started normally.
  • FIG. 12 schematically illustrates a timing diagram when an AC is powered on according to some embodiments of the present application.
  • the AC_DETECT signal in the off state, when the AC power-on signal is received, that is, at the moment of the vertical line a, the AC_DETECT signal is pulled up from a low level to a high level.
  • the AC_DETECT power As long as the level of the second terminal of the Pinghe third transistor V3 is high, the second transistor V2 will be turned on, so that the MOS transistor V1 is turned on, and the standby voltage is 5V. Then, the DC_DETECT signal is pulled up from a low level to a high level at a time where the vertical line b is located.
  • the OLED display device receives the standby signal, and first transitions the DC_DETECT signal from a high level to a low level, and then the AC_DETECT signal changes from a high level to Low.
  • DC_DETECT transitions to a low level
  • the fourth transistor V4 is turned off
  • the third transistor V3 is turned on
  • the base voltage of the second transistor V2 is high.
  • AC_DETECT is still high
  • the voltage of the second transistor V2 is high.
  • the base voltage is at a high level, at this time the second transistor V2 is turned on (the principle has been mentioned above, and will not be repeated here), and the first transistor V1 is turned on, so the standby voltage 5V can be maintained.
  • FIG. 13 schematically illustrates a timing diagram when DC is powered off according to some embodiments of the present application.
  • the DC power-off signal is received, that is, at the moment of the vertical line b
  • the DC_DETECT signal is pulled from a high level to a low level.
  • the AC_DETECT signal is still high.
  • the base of the second transistor V2 is a high-level signal from the two branches, so the second transistor V2 is turned on, the MOS tube V1 remains on, and the standby voltage 5V remains powered;
  • the AC_DETECT signal is pulled from high to low at the moment of line a, the DC_DETECT signal is low and its branch provides a high level to the base of the second transistor V2, so the second transistor is still Turn on, the MOS tube V1 remains on, and the standby voltage 5V continues to maintain power.
  • the AC_DETECT signal when the DC is powered on, that is, when the DC is powered on, the AC_DETECT signal first transitions from a low level to a high level, and then the DC_DETECT signal transitions from a low level to a high level. Since the first transistor V1 is turned on when the AC_DETECT signal is at a high level (the principle has already been mentioned above and will not be repeated here), the standby voltage 5V can be maintained for power supply.
  • FIG. 14 schematically illustrates a timing diagram when a DC is powered on according to some embodiments of the present application.
  • the DC power-on signal that is, the time at which the vertical line b is located
  • the AC_DETECT signal is first pulled from a low level to a high level, and then the vertical line a is located at
  • DC_DETECT is pulled up from low level to high level.
  • the MOS tube V1 is kept on, and the standby voltage 5V is kept powered.
  • FIG. 6A shows that the first transistor V1 is a P-type MOS transistor, the second transistor V2, the third transistor V3, and the fourth transistor V4 are all NPN type triodes, and the second transistor V2, the third transistor The first terminal of the three transistors V3 and the fourth transistor V4 is a collector, the second terminal is an emitter, and the control terminal is a base.
  • the first transistor, the second transistor, the third transistor, and the fourth transistor may also be other suitable forms of transistors, for example, the first transistor V1 may also be an N-type MOS transistor, and the second transistor One or more of V2, the third transistor V3, and the fourth transistor V4 may also be a PNP-type triode.
  • the first terminal of the first transistor V1 is a source, the second terminal is a drain, and the control terminal is a gate, but the example embodiment of the present application is not limited thereto.
  • the first transistor V1 is The first terminal may also be a drain, and the second terminal is a source, which is also within the protection scope of the present application.
  • the first control unit 540 may further include a diode VD1.
  • the first terminal of the diode VD1 receives an AC detection signal AC_DETECT, and the second terminal is electrically connected to the control terminal of the second transistor V2. connection. Because the AC_DETECT signal is low when the DC power is off, and the control terminal 3 of the second transistor V2 is high, the diode VD1 has a unidirectional conduction function. Therefore, the diode VD1 can prevent The voltage is inverted to the AC detection signal AC_DETECT.
  • the application does not specifically limit the resistance values of the resistors R1 to R10, and the resistors R1 to R10 may also have other appropriate resistance values.
  • FIG. 7 schematically illustrates a timing diagram of an AC control signal and a DC control signal during DC power-off / power-on according to some embodiments of the present application.
  • DC_DETECT another control signal, DC_DETECT, is needed to enable the first switch unit 530 to remain on when the DC power is cut off. That is, when the DC is powered off, the DC_DETECT control signal transitions earlier than AC_DETECT, so as not to affect the open state of the first switch unit 530. In this way, even in a state where the DC is powered off, the first switching unit 530 can still be turned on, and the OLED display device can normally stand by.
  • the OLED display device receives the standby signal, and first transitions the DC_DETECT signal from a high level to a low level, and then the AC_DETECT signal transitions from a high level to a low level.
  • the transistor V4 when DC_DETECT transitions to a low level, the transistor V4 is turned off, the transistor V3 is turned on, the base voltage of the transistor V2 is high, and because AC_DETECT is still high, then ( Only in FIG. 6B, the diode VD1 is turned on) The base voltage of the triode V2 is still high, the triode V2 is turned on, and the MOS transistor V1 is turned on, so the standby voltage 5V can be maintained.
  • the logical relationship between the AC detection signal, that is, AC_DETECT, the DC detection signal, that is, DC_DETECT, the first transistor, and the standby voltage of 5V is shown in Table 1 below:
  • the above-mentioned analog circuit can also be converted into a digital circuit, which can be implemented by a digital circuit. ,specific,
  • the first control unit includes a logic NOT gate and a logic NAND gate, wherein:
  • An input terminal of the logic NAND gate is connected to the power board, and an output terminal is connected to an input terminal of the logic NAND gate;
  • the other input terminal of the logic NAND gate is connected to the main chip, and the output terminal is connected to the first switch unit;
  • the first switch unit includes a first switch:
  • the first switch is respectively connected to an output terminal of the logic NAND gate, the power board, and the standby wake-up unit.
  • the first control unit is composed of a logic NOT gate, a logic NAND gate, and the logic NOT
  • the input end of the gate is connected to the power board, the output end is connected to one input end of the NAND gate; the other input end of the NAND gate is connected to the main chip, and the output end is connected to the first switch unit.
  • the first switch unit is composed of a first switch.
  • the first switch is turned off to power off the T8032 of the main chip.
  • the working principle of the first control unit and the first switch unit in the embodiment of the present invention is as follows:
  • both the power board and the main chip are in a power-on state, that is, the AC power-on detection signal AC_DET and the DC power-on detection signal DC_DET of the power board are both high, that is, the two inputs of the logic NAND gate.
  • the input connected to the logical NOT gate has a low level due to the inversion of the first level of the logical NOT gate, and the other end has a high input level.
  • the control logic of the logical NAND gate the high level is output.
  • the first switch of the first switch unit should be closed, so the control logic of the first switch should be open at a low level and closed at a high level. If the standby button is pressed, AC_DET and DC_DET are both low level at this time, and the high level is output through the control of the logical NOT gate and the logical NAND gate. At this time, the first switch is closed to ensure that it can be woken up in the standby state. .
  • AC_DET If there is a sudden AC power failure in the power-on state, AC_DET is low. Due to the discharge of the electrolytic capacitor, DC_DET is high. At this time, in order to avoid the situation that the display device cannot be awakened during the discharge, the logic negate and logic AND The gate outputs a low level, so that the first switch is turned off, that is, the main chip is powered off, specifically, the standby wake-up unit T8032 included in the main chip is powered off, so that the OLED display device is restored to the initial state, and then can be turned on normally.
  • Input 1 AC_DET
  • Input 2 DC_DET
  • switch status T8032 power supply status L L turn off powered by L H open Power off H L turn off powered by
  • FIG. 8 is a schematic diagram of an OLED display device according to still other embodiments of the present application.
  • the OLED display device includes a power board 510, a main chip 520, a main board 550, and a power supply circuit.
  • the power supply circuit includes a first switch unit 530 and a first control unit 540.
  • the first switch unit 530 is electrically connected to the standby voltage terminal P1 of the power board 510 and the standby voltage terminal P2 of the main board 550, and is used to control the connection and disconnection of the standby voltage terminal P1 of the power board 510 and the standby voltage terminal P2 of the main board 550.
  • the first control unit 540 is electrically connected to the first switching unit 530 and is used to control the first in response to the AC detection signal AC_DETECT output from the port P3 of the power board 510 and the DC detection signal DC_DETECT output from the port P4 of the main chip 520.
  • the switching unit 530 is turned on and off, the AC detection signal is used to detect whether a signal of AC power failure or AC power is received, and the DC detection signal is used to detect whether a signal of DC power failure or DC power is received.
  • the specific structure of the power supply circuit is basically the same as the power supply circuit shown in FIG. 6B, which will not be repeated here.
  • OLED In the field of large-screen display, OLED has almost no rivals in core indicators such as color performance, contrast, response speed, and viewing angle, so OLED display devices have developed extremely rapidly.
  • the screen logic control unit is responsible for analyzing the video signal sent by the main chip to control the display of the screen display drive unit. Due to the particularity of the screen, the discharge will be very slow after the power is cut off. Therefore, if the two are controlled to lose power at the same time, it will happen that the screen logic control unit has been powered off and the screen display drive unit has not been powered off. Afterimages appear on the OLED screen, and because the OLED screen loses control, it may cause screen burnout with a certain probability.
  • an electrolytic capacitor in order to prevent afterimages, an electrolytic capacitor is often introduced at the power supply side, and the electrolytic capacitor can maintain the ARM core power for a short time. Therefore, the ARM core cannot notify the screen to display the drive discharge.
  • the notification screen display drive is quickly discharged to ensure the timing of the screen discharge when the AC power is off, to prevent the occurrence of afterimages.
  • this method can ensure that the screen display drive unit is first discharged when the AC power is off to prevent the occurrence of afterimages, it is also necessary to discharge the screen display drive in various scenarios such as display device upgrade, factory reset, and error protection.
  • the system will notify the screen display drive discharge, and because there is no AC power failure, the power supply does not think that it is necessary to discharge the screen display drive.
  • the screen discharge timing will be disordered, so it is currently not possible in multiple scenarios and at the same time.
  • the display drive quickly discharges when power is off, so it cannot prevent afterimages.
  • FIG. 9A an OLED display device proposed in the embodiment of the present application is shown in FIG. 9A.
  • the device includes a power board 510 and a main chip 520. It also includes a screen logic control unit 503, a screen display drive unit 504, a second control unit 505, and a second switch unit 506. Among them:
  • the second control unit 505 is connected to the power board 510, the main chip 520, and the second switch unit 506, respectively, and is configured to receive the first input signal of the power board AC power failure or the main chip DC When the second input signal is turned off, the first control signal is output;
  • the second switching unit 506 is connected to the screen display driving unit, and is configured to control the screen display driving unit to discharge when receiving a first control signal output by the second control unit.
  • the second control unit since the second control unit is respectively connected to the power board and the main chip, the second control unit can receive signals of AC power on or power off of the power board, as well as the main chip. DC power-on or power-off signal, and output a corresponding control signal when a specified signal is received.
  • the second control unit when the second control unit receives the first input signal of AC power failure of the power board, or receives the second input signal of DC power failure of the main chip, the second control unit outputs the first control signal.
  • the first control signal is a signal that causes the second switch unit control panel display drive unit to discharge; when the second switch unit receives the first control signal, the control panel display drive unit discharges.
  • the OLED display device receives signals output from the power board and the main chip through the second control unit. If the first input signal of the power board AC power off or the second input signal of the main chip DC power off is received, , The second switch unit is used to control the display display drive unit to discharge, so that the drive unit can be discharged as long as the AC power of the power supply board is cut off or the DC power of the main chip is discharged, thereby preventing the afterimage from occurring in any scene.
  • the second control unit includes a logical AND gate:
  • An input terminal of the logic AND gate is connected to the power board, another input terminal is connected to the main chip, and an output terminal is connected to a second switching unit;
  • the second switch unit includes a second switch:
  • the second switch is respectively connected to the screen display driving unit and the ground terminal.
  • the second control unit is composed of a logical AND gate, which has two input terminals and one output terminal. One input terminal is connected to the power board, the other input terminal is connected to the main chip, and the output terminal is connected to the second switch unit.
  • the control logic of the logic AND gate circuit is to output a high level only if the input of all input terminals is high level, otherwise it outputs a low level.
  • the power supply board and the main chip are both in a power-on state, that is, the control signal output after the logical AND gate is high, but it is not necessary to discharge the screen display driving unit at this time. Therefore, a second switch is provided in the second switch unit, and the second switch is turned off at a high level to ensure that the OLED display device can work normally.
  • One end of the second switch is connected to a screen display driving unit, and in order to ensure that the screen display drive is quickly discharged, the other end of the second switch is connected to a ground terminal.
  • the working principle of the second control unit and the second switching unit in the embodiment of the present invention is as follows:
  • both the power board and the main chip are in a power-on state, that is, the AC power-on detection signal AC_DET and the DC power-on detection signal DC_DET of the power board are both high, that is, the two input terminals of the logic AND gate. Both are high-level inputs.
  • the high-level output is output, and the second switch is high-level open, so the screen display driving unit does not discharge. If the standby key is pressed for standby, AC_DET and DC_DET are both low level at this time, and a low level is output through the logical AND gate. At this time, the second switch is closed, and the display driving unit is quickly discharged.
  • AC_DET If the AC power is cut off suddenly in the power-on state, AC_DET is low at this time. Due to the discharge of the electrolytic capacitor, DC_DET is high. After the logic AND gate outputs a low level, the second switch is closed, that is, the screen display drive unit is fast. Discharge prevents the problem of afterimages in the event of a sudden AC power failure.
  • Input 1 AC_DET
  • Input 2 DC_DET
  • switch status Discharge state L L turn off Discharge L H turn off Discharge H L turn off Discharge H H open No discharge
  • L stands for low level
  • H stands for high level
  • FIG. 9B is a schematic diagram of a circuit structure of the OLED display device.
  • the schematic diagram of the circuit structure includes a power board, a main chip: T8032 and an ARM chip, an OLED unit: a screen display driving unit and a screen logic control unit, and a second control unit: an AND gate 1.
  • First control unit NAND gate 0, second switch unit and first switch unit.
  • FIG. 9C is a power-on flowchart of the OLED unit during normal startup.
  • AC_DET Before the OLED display device is powered on, AC_DET is at a low level. Because DC_DET is also at a low level by default, the NAND gate 0 outputs a high level at this time, that is, the T8032 switch is controlled to be closed, and T8032 is normally powered at this time. After booting, AC_DET becomes high level, and the main chip can set the pin GPIO0 of the control screen logic control power supply to high level, so that the OLED unit Vdd is powered on.
  • the main chip controls GPIO2 (DC_DET) to high level, and the control panel display drive discharge pin Panel_AC_DET becomes high level via AND gate 1, the screen stops discharging, and finally pulls
  • the high control screen shows that the driver power supply pin GPIO1 powers up Evdd, so that the OLED unit is powered normally.
  • FIG. 9E is a power-down flowchart of the OLED unit when the OLED display device is in normal DC standby.
  • the OLED display device When the OLED display device receives the standby signal issued after pressing the remote power button, it executes the standby process. At this time, the main chip first sets GPIO2 (DC_DET) to low level. At this time, the AC is not powered off, and AC_DET is high. After the logic control of AND gate 1, Panel_AC_DET becomes low, and the screen is quickly discharged. Pull down the screen display drive unit to power Evdd. When the screen display driving unit is completely discharged, that is, after 30 ms, the power supply Vdd of the screen logic control unit is pulled down to ensure that the screen logic control unit is powered off normally. After standby, the ARM will also power down, only T8032 is working, it will wait for the wake-up source to wake the ARM.
  • DC_DET GPIO2
  • the main chip After the logic control of AND gate 1, Panel_AC_DET becomes low, and the screen is quickly discharged. Pull down the screen display drive unit to power Evdd.
  • FIG. 9F is a flowchart of the OLED display driving unit realizing fast discharge when the OLED display device is turned on and AC is turned off.
  • a method for controlling an OLED display device is also provided.
  • the method for controlling an OLED display device is used to control the OLED display device.
  • the method for controlling an OLED display device includes:
  • step S1010 when the AC detection signal is at a low level and the DC detection signal is at a high level, the first switch unit is controlled to be turned off to disconnect the standby voltage terminal of the power board from the main chip. Connect the standby voltage terminal.
  • the method for controlling an OLED display device further includes: in a power-on state, if an AC power-off signal is received, such as a signal to turn off a power source, converting the AC detection signal from a high level to a low level , Controlling the first switch unit to turn off, so that the DC detection signal is converted from a high level to a low level.
  • an AC power-off signal such as a signal to turn off a power source
  • the method for controlling an OLED display device further includes: in a shutdown state, if an AC power-on signal is received, such as a signal to turn on a power source, converting the AC detection signal from a low level to a high level , Controlling the first switch unit to be turned on, and converting the DC detection signal from a low level to a high level.
  • an AC power-on signal such as a signal to turn on a power source
  • the method for controlling an OLED display device further includes: in a power-on state, if a DC power-off signal is received, such as a standby signal from a remote controller, first converting the DC detection signal from a high level to Low level, and then convert the AC detection signal from high level to low level, and keep the first switch unit on.
  • a DC power-off signal such as a standby signal from a remote controller
  • the OLED display device control method further includes: in a standby state, if a DC power-on signal is received, such as a start-up signal from a remote controller, first converting the AC detection signal from a low level to The high level controls the first switch unit to be turned on, and then converts the DC detection signal from a low level to a high level.
  • a DC power-on signal such as a start-up signal from a remote controller
  • the first switch unit when the AC power is cut off, the first switch unit is controlled to be turned off by the AC detection signal, so that the 5V standby voltage can be quickly disconnected.
  • the detection signal is converted from a high level to a low level, and then the AC detection signal is converted from a high level to a low level, and the first switch unit is kept on, thereby ensuring normal standby when the DC power is off; Because the 5V standby voltage can be quickly disconnected when the AC is powered off, the OLED display device can be started normally when the AC is powered on.
  • an electronic device including: a processor; and a memory, where the computer-readable instructions are stored on the memory, and the computer-readable instructions are executed by the processor.
  • the control method of the OLED display device as described above is sometimes implemented.
  • this application may be provided as a method, a system, or a computer program product. Therefore, this application may take the form of an entirely hardware embodiment, an entirely application embodiment, or an embodiment combining application and hardware aspects. Moreover, this application may take the form of a computer program product implemented on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.
  • computer-usable storage media including, but not limited to, disk storage, CD-ROM, optical storage, etc.
  • These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to work in a particular manner such that the instructions stored in the computer-readable memory produce a manufactured article including an instruction device, the instructions
  • the device implements the functions specified in one or more flowcharts and / or one or more blocks of the block diagram.
  • These computer program instructions can also be loaded on a computer or other programmable data processing device, so that a series of steps can be performed on the computer or other programmable device to produce a computer-implemented process, which can be executed on the computer or other programmable device.
  • the instructions provide steps for implementing the functions specified in one or more flowcharts and / or one or more blocks of the block diagrams.

Abstract

一种OLED显示装置及其控制方法，涉及显示技术领域。该显示装置包括：第一开关单元（530），与电源板（510）的待机电压端（P1）以及主芯片（520）的待机电压端（P2）电连接，用于控制电源板（510）的待机电压端（P1）与主芯片（520）的待机电压端（P2）的连通和断开；第一控制单元（540），与第一开关单元（530）电连接，用于响应于电源板（510）输出的交流检测信号（AC_DETECT）和主芯片（520）输出的直流检测信号（DC_DETECT）来控制开关单元（530）的导通和截止，其中，交流检测信号（AC_DETECT）用于检测是否接收到了交流断电或交流上电的信号，直流检测信号（DC_DETECT）用于检测是否接收到了直流断电或直流上电的信号。能够在交流断电时快速断开待机电压，从而在交流上电时能够正常启动显示装置，并且能够在直流断电时保证正常待机。

Description

一种OLED显示装置及其控制方法
相关申请的交叉引用
本申请要求在2018年09月25日提交中国专利局、申请号为201811115226.0、申请名称为“OLED显示装置及其控制方法”的中国专利申请的优先权，其全部内容通过引用结合在本申请中；本申请要求在2018年12月27日提交中国专利局、申请号为201811615553.2、申请名称为“一种OLED电视的显示屏放电控制装置”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请主要涉及显示技术领域，尤其涉及一种OLED显示装置及其控制方法。
背景技术
近年来，OLED(Organic Light-Emitting Diode，有机发光二极管)显示技术作为一种新型的显示技术逐渐受到更多的关注。
为了保证OLED显示装置能够正常工作，对OLED显示装置的上电时序有一定的要求，首先需要将待机供电信号从低电平变化为高电平，其次将复位信号再由低电平变化为高电平，然后才能够交流上电。
为了保护OLED屏，OLED显示装置要求在断电(AC断电或DC断电)后，输出给显示屏和TCON(Timer Control Register，计数器控制寄存器)的电源需要维持一段时间，因此，电源板需要增加大量的电解电容放电保持输出供电的能力。
但是，电解电容放电维持12V供电的同时，电源板输出5V电压作为待机电源给主芯片供电也会维持一段时间，这就使得在交流断电后，给主芯片的供电及待机供电信号3.3VS都不能快速跌落。若此时交流上电，将无法满足正 常的交流上线的时序要求，显示装置无法正常启动，导致死机无响应等问题。
综上，亟需一种方案解决上述满足掉电时要给OLED屏再持续供电一段时间，而导致AC掉电时主芯片供电不能快速跌落，引发再次AC上电OLED显示装置无法正常启动的问题。
发明内容
本申请的目的在于提供一种OLED显示装置及其控制方法，进而至少在一定程度上克服由于相关技术的限制和缺陷而导致，为了满足掉电时要给OLED屏再持续供电一段时间，而导致AC掉电时主芯片供电不能快速跌落，引发再次AC上电OLED显示装置无法正常启动的问题。
根据本申请一方面，提供了一种OLED显示装置，包括电源板、主芯片，还包括：
第一开关单元，分别与所述电源板的待机电压端以及所述主芯片的待机电压端电连接，用于控制所述电源板的待机电压端与所述主芯片的待机电压端的连通或断开；
第一控制单元，分别与所述第一开关单元、所述电源板及所述主芯片电连接，用于接收所述电源板输出的交流检测信号和所述主芯片输出的直流检测信号，控制所述第一开关单元的导通或截止；
其中，所述交流检测信号用于检测是否接收到了交流断电或交流上电的信号，所述直流检测信号用于检测是否接收到了直流断电或直流上电的信号。
根据本申请另一方面，提供了一种OLED显示装置的控制方法，用于控制根据上述任意一项所述的OLED显示装置，所述OLED显示装置控制方法包括：在所述交流检测信号为低电平并且所述直流检测信号为高电平时，控制所述第一开关单元截止，以断开所述电源板的待机电压端与所述主芯片的待机电压端的连通。
本申请的示例实施例的OLED显示装置及其控制方法，OLED显示装置包括：第一开关单元，分别与所述电源板的待机电压端以及所述主芯片的待 机电压端电连接，用于控制所述电源板的待机电压端与所述主芯片的待机电压端的连通或断开；第一控制单元，分别与所述第一开关单元、所述电源板及所述主芯片电连接，用于接收所述电源板输出的交流检测信号和所述主芯片输出的直流检测信号，控制所述第一开关单元的导通或截止；其中，所述交流检测信号用于检测是否接收到了交流断电或交流上电的信号，所述直流检测信号用于检测是否接收到了直流断电或直流上电的信号。
具体的，当接收到交流断电信号后，交流检测信号被拉低，但此时，由于为了保持OLED屏在断电后再持续供电一段时间，电源板增加的电解电容会放电使得待机供电电压继续供电，因此，直流检测信号仍为高电平。本申请OLED显示装置的逻辑控制为，在所述交流检测信号为低电平并且所述直流检测信号为高电平时，控制所述第一开关单元截止，以断开所述电源板的待机电压端与所述主芯片的待机电压端的连通。因此，通过本申请的供电电路及其控制方法，能够解决AC掉电时主芯片供电不能快速跌落，引发再次AC上电OLED显示装置无法正常启动的问题。
附图说明
为了更清楚地说明本申请实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简要介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域的普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1A示出了一种现有技术方案中的交流上电时序的示意图；
图1B示出了一种现有技术方案中的非正常交流上电时序的示意图；
图2示出了一种现有技术方案中的复位电路的示意图；
图3示出了一种现有技术方案中通过AC控制信号检测AC断电的示意图；
图4示出了一种技术方案中AC断电控制电路的示意图；
图5A示出了根据本申请的一些实施例的供电电路的示意图；
图5B示出了本申请的直流待机后交流断电出现假唤醒问题的过程示意 图；
图5C示出了本申请的一些实施例的在解决假唤醒问题时T8032芯片和ARM芯片之间的交互过程；
图6A示出了根据本申请的另一些实施例的供电电路的示意图；
图6B示出了根据本申请的再一些实施例的供电电路的示意图；
图7示意性示出了根据本申请的一些实施例的直流断电/上电时的交流控制信号和直流控制信号的时序图；
图8示出了根据本申请的再一些实施例的OLED显示装置示意图；
图9A示出了根据本申请的又一些实施例的OLED显示装置示意图；
图9B示出根据本申请的一些实施例的OLED显示装置的电路结构示意图；
图9C示出了根据本申请的一些实施例的正常开机时OLED单元的上电流程图；
图9D示出了根据本申请的一些实施例的OLED单元上电时序图；
图9E示出了根据本申请的一些实施例的OLED显示装置直流正常待机时OLED单元的掉电流程图；
图9F示出了根据本申请的一些实施例的OLED显示装置开机交流断电时OLED屏显示驱动单元实现快速放电的流程图；
图10示出了根据本申请的一些实施例的OLED显示装置控制方法的流程示意图；
图11示意性示出了根据本申请的一些实施例的AC断电时的时序图；
图12示意性示出了根据本申请的一些实施例的AC上电时的时序图；
图13示意性示出了根据本申请的一些实施例的DC断电时的时序图；
图14示意性示出了根据本申请的一些实施例的DC上电时的时序图；
图15示出了现有电源供电示意图。
具体实施方式
现在将参考附图更全面地描述示例实施例。然而，示例实施例能够以多 种形式实施，且不应被理解为限于在此阐述的范例；相反，提供这些实施例使得本申请将更加全面和完整，并将示例实施例的构思全面地传达给本领域的技术人员。所描述的特征、结构或特性可以以任何合适的方式结合在一个或更多实施例中。在下面的描述中，提供许多具体细节从而给出对本申请的实施例的充分理解。然而，本领域技术人员将意识到，可以实践本申请的技术方案而省略所述特定细节中的一个或更多，或者可以采用其它的方法、组元、装置、步骤等。在其它情况下，不详细示出或描述公知技术方案以避免使本申请的各方面变得模糊。
此外，附图仅为本申请的示意性图解，并非一定是按比例绘制。图中相同的附图标记表示相同或类似的部分，因而将省略对它们的重复描述。附图中所示的一些方框图是功能实体，不一定必须与物理或逻辑上独立的实体相对应。可以采用软件形式来实现这些功能实体，或在一个或多个硬件模块或集成电路中实现这些功能实体，或在不同网络和/或处理器装置和/或微控制器装置中实现这些功能实体。
本专利申请中所使用的“耦接”及“连接”，可指两个或多个元件相互直接实体或电性接触，或是相互间接实体或电性接触。本专利申请中所使用的“第一”、“第二”、……等，并非特别指称次序或顺序，而仅为了区别以相同技术用语描述的元件或操作。本专利申请中所使用的“包括”、“包含”、“具有”等等，均为开放性的用语，即意指包含但不限于。本专利申请中所使用的方向用语，例如：上、下、左、右、前或后等，仅是参考附加图式附图的方向。因此，使用的方向用语是用来说明并非用来限制本专利申请。
实施例1：
图1A示出了一种技术方案中OLED显示装置的交流上电时序的示意图。参照图1A所示，T0表示从待机供电信号3.3VS升高至复位信号开始升高的时间间隔(150μS<T0<1S)，参照图2所示，复位信号的电平为节点R处的电平，在待机供电信号3.3VS变为高电平时，节点R处的电平随着电解电容C21 的充电而上升，因此，在待机供电信号3.3VS变为高电平之后，复位信号的电平也随着电解电容C21的充电过程逐渐升高；T1表示从待机供电信号3.3VS升高至正常工作供电信号开始升高的时间间隔(150μS<T1<1S)，T2表示从复位信号以及正常工作供电信号至系统启动的时间间隔(T2>14.1mS)。可见上述时序要求，首先将待机供电信号从低电平变化为高电平，其次将复位信号再由低电平变化为高电平，然后才能够交流上电，这样显示装置才能够正常工作。
如图15所示，普通的显示装置使用的电源板输出5V电压作为待机电源给主芯片供电，输出12V作为显示屏和TCON(Timer Control Register，计数器控制寄存器)的电源；待机过程中，电源板关掉给显示屏和TCON的12V供电，只保留给主芯片的5V供电，从而降低待机功耗。而由于OLED屏的性能，为了保护OLED屏，OLED显示装置要求在断电(AC断电或DC断电)后，显示屏的12V供电仍要保持一段时间，因此，电源板需要增加大量的电解电容放电保持输出供电的能力。
但是，电解电容放电维持12V供电的同时，5V/3.3V(其中，3.3V是由5V转换而得)的供电也会维持一段时间，这就使得在AC断电后，给主芯片的5V供电及待机供电信号3.3VS都不能快速跌落。若此时AC上电(重启显示装置)，就会出现图1B所示的情况：从圈101标记的部分可以看出，待机供电信号(3.3VS)并没有出现从低电平变化到高电平这一过程，而是在待机供电信号持续维持在高电平过程中，复位信号由低电平变化到高电平，显然，不满足图1A所示的正常AC上电的时序要求，此时显示装置无法正常启动，会导致死机无响应等问题。
为了解决上述满足掉电时要给OLED屏再持续供电一段时间，而导致AC掉电时主芯片供电不能快速跌落，引发再次AC上电显示装置无法正常启动的问题，即解决断电后5V和3.3V供电跌落缓慢的问题，在一种技术方案中，增加了一个开关电路。当AC断电时，通过该开关电路直接将主板的5V切断，从而也切断了3.3V。在该技术方案中，需要一个信号通知到主板何时AC断 电。而现有电路中，电源板在AC断电后就会输出AC_DETECT信号传输给TCON，以指示TCON做出响应。示例性的，如图3所示，在AC OFF即AC断电后约20ms，AC_DETECT信号会被拉低。因此，可以利用AC_DETECT信号来作为开关电路的触发信号，以指示开关电路的开断。
于是，得到图4所示的一种改进的方案，电源板和主芯片之间增加开关电路，该开关电路受控于AC_DETECT信号，在AC上电即ACON时，AC_DETECT信号为高电平，开关电路导通，在AC断电即AC OFF时，AC_DETECT为低电平，开关电路截止，系统的所有供电断开。因此，可以保证在AC掉电后约20ms(AC_DETECT拉低)，即使电源板5V供电还有输出，但该5V供电被开关电路切断，也就不能传输到主芯片中，即主芯片的5V电能够快速跌落，同理待机供电信号3.3V也快速跌落。此时，再次AC上电时，主芯片的时序满足规格要求，可以正常启动。
但是，经过测试发现，AC_DETECT信号不仅在AC掉电时候会被拉低，在DC掉电时候也会被拉低，上述方案在DC掉电(OLED显示装置在待机状态)时，开关电路也会截止，5V电就无法给主芯片供电，而按照要求，显示装置待机时候主芯片是要工作的，否则无法遥控开机。
基于上述内容，在本申请的示例实施例中，首先提供了一种OLED显示装置。参照图5A所示，该OLED显示装置包括电源板510、主芯片520以及供电电路，该供电电路包括第一开关单元530以及第一控制单元540。其中，第一开关单元530分别与电源板510的待机电压端P1以及主芯片520的待机电压端P2电连接，用于控制电源板510的待机电压端P1与主芯片520的待机电压端P2的连通或断开；第一控制单元540，分别与第一开关单元530、电源板510的端口P3及主芯片520的端口P4电连接，用于响应于电源板510的端口P3输出的交流检测信号和主芯片520的端口P4输出的直流检测信号来控制第一开关单元530的导通或截止，该交流检测信号为表示交流断电或交流上电的信号，该直流检测信号为表示直流断电或直流上电的信号。交流检测信号可以为电源板510的端口P3输出的AC_DETECT信号，直流检测信 号可以为主芯片520的GPIO口输出的DC_DETECT信号。
在示例实施例中，在交流断电时，将交流检测信号从高电平转换成低电平，第一控制单元540控制第一开关单元530截止，断开电源板510的待机电压端P1与主芯片520的待机电压端P2的连通，待机电压停止给主芯片520供电，从而能够在交流断电时快速断开主芯片的5V待机电压。由于在交流断电时能够快速断开5V待机电压，从而在交流上电时OLED显示装置能够正常启动。
在示例实施例中，在直流断电时，首先将直流检测信号从高电平转换成低电平，第一控制单元540控制第一开关单元530保持导通，然后将交流检测信号从高电平转换成低电平。由于直流检测信号比交流检测信号早跳变，在直流检测信号从高电平转换成低电平时，控制第一开关单元530保持导通，就能够保证在直流断电时OLED显示装置能够正常待机。
如果该第一控制单元同时接收到电源板交流断电的第一输入信号和主芯片直流上电的第三输入信号，则会输出第二控制信号。该第二控制信号为控制第一开关单元为主芯片断电的信号，当第一开关单元接收到该第二控制信号时，控制主芯片断电。
为了解决待机交流断电后出现假唤醒，从而导致在某段时间内无法真正唤醒显示装置的问题，在上述各实施例的基础上，在本申请实施例中，所述主芯片包括互相连接的系统核心单元和待机唤醒单元，其中：
所述系统核心单元，用于接收所述待机唤醒单元发送的第一唤醒信息，运行启动程序，当运行到所述启动程序的设定部分时，向所述待机唤醒单元发送第一确认信息；
所述待机唤醒单元，用于当接收到待机唤醒信号时，向所述系统核心单元发送第一唤醒信息，并开启定时器，判断所述定时器的定时时长内是否接收到所述系统核心单元发送的第一确认信息，如果否，则输出所述主芯片直流上电的第三输入信号。
通常的，主芯片包括互相连接的系统核心单元和待机唤醒单元。该系统 核心单元包括用于开机后维持系统运行的ARM芯片，该待机唤醒单元包括用于待机运行时，检测到唤醒指示后唤醒ARM的T8032芯片。
为了解决上述引入电解电容带来的开机交流断电时，无法在电解电容放电期间再次上电唤醒显示装置的问题，本申请中提供了第一控制单元和第一开关单元。但是这样却导致了直流待机后再交流断电出现假唤醒的情况。正常直流待机情况下，电源板和主芯片均处于断电状态，此时第一控制单元由于不能同时接收到电源板交流断电的第一输入信号和主芯片直流上电的第三输入信号，从而无法控制该主芯片断电，因此此时位于主芯片内部的用于唤醒显示装置的T8032芯片仍旧正常供电。
如果在这时候交流断电，并且刚好此时有人误碰触了OLED显示装置遥控的唤醒键，由于电解电容的放电使得T8032芯片有电，ARM核也会有电，因此OLED显示装置被唤醒，但是由于ARM核要比T8032芯片掉电快，此时ARM核则会因为供电不足而直接停止，而T8032芯片依旧有电并且认为OLED显示装置已经唤醒，若此时交流上电则会导致再次出现无法唤醒的情况。具体的直流待机时交流断电，整个OLED显示装置运行系统的供电过程如图5B所示的直流待机后交流断电出现假唤醒问题的过程。
正常情况下，OLED显示装置在进入直流待机时，电源端交流上电检测信号AC_DET会被拉低为低电平，直流开机检测信号DC_DET默认也为低电平，此时T8032正常供电。这个时候若交流断电，AC_DET与DC_DET仍然为低电平，即第一控制单元接收到的是直流断电和交流断电的输入信号，因此经过上述第一控制单元的输出，T8032依然处于供电状态。而这个时候若唤醒OLED显示装置会出现假唤醒，即ARM还没加载kernel，由于核电供电不足，会直接停止，但是T8032仍然供电一段时间。若再次交流上电，T8032认为ARM已经唤醒，将不会再唤醒ARM。
基于上述内容，本发明实施例中通过对主芯片重新烧写开机启动程序来解决该问题。
当用户按下遥控器的待机按钮时，该遥控器会向OLED显示装置发送待 机唤醒信号。待机唤醒单元接收该待机唤醒信号，通过向系统核心单元发送第一唤醒信息来唤醒该OLED显示装置。
当主芯片的系统核心单元接收该第一唤醒信息之后，开始运行开机启动程序。正常情况下，当该系统核心单元运行到该启动程序的设定部分时，会向待机唤醒单元发送第一确认信息，表明当前系统核心单元已经正常启动。其中，该设定部分为该启动程序的核心部分，即kernel部分，可以保证当启动程序运行到此处时OLED显示装置正常启动。
待机唤醒单元在发送第一唤醒信息的同时开启定时器，并会判断在该定时器的定时时长内是否接收到了第一确认信息。如果是，则会停止响应待机唤醒信号；如果否，则表明当前系统核心单元处于不正常的情况下，即假唤醒状态：系统核心单元由于供电不足直接停止。为了防止出现在待机唤醒单元有电的时间内再次交流上电无法唤醒显示装置的问题，此时待机唤醒单元需要输出该主芯片直流上电的第三输入信号，通过上述第一控制单元和第一开关单元来控制该主芯片包含的待机唤醒单元直接断电，使显示装置系统恢复到初始状态，以便再次可以正常开机。
具体地，为了解决假唤醒状态带来的问题，在开机过程中，待机唤醒单元T8032芯片和系统核心单元ARM芯片之间的交互过程如图5C所示。
步骤1：当OLED显示装置处于待机状态时，T8032会检测是否接收到待机唤醒信号，当检测到待机唤醒信号时，通过向ARM芯片发送第一唤醒信息来唤醒ARM芯片，同时，T8032启动定时器，开始计时。
ARM芯片接收到该第一唤醒信息时，开始运行启动程序，当运行到该启动程序Kernel部分时，向T8032发送ARM唤醒成功的ACK，即第一确认信息。
步骤2：T8032判断在该定时器的定时时长内是否接收到ARM芯片发送的第一确认信息。
步骤3：如果否，则OLED显示装置未正常开机，即处于假唤醒状态，此时T8032通过输出直流上电的第三输入信号，即DC_DET＝1，通过第一控 制单元和第一开关单元控制自身断电。
如果是，则OLED显示装置处于开机状态，T8032不再响应待机唤醒信号。
本发明实施例中，通过系统核心单元运行到启动程序的设定部分时向待机唤醒单元发送第一确认信息，来确保该OLED显示装置是否已经被唤醒，解决了待机交流断电后出现假唤醒，从而导致在某段时间内无法真正唤醒的问题。
图6A示出了根据本申请的另一些实施例的供电电路的示意图。参照图6A所示，在示例实施例中，第一开关单元530包括第一晶体管V1，可选MOS管、三极管等，第一控制单元540包括第二晶体管V2、第三晶体管V3以及第四晶体管V4。
值得注意的是，第二晶体管V2导通，则第一晶体管V1就导通，反之，第二晶体管V2截止，则第一晶体管V1截止。而第二晶体管V2同时受控于AC-DETECT的电平和第三晶体管V2第二端电平的控制，当这两个电平中至少存在一个高电平时，第二晶体管V2就会导通，反之，当这两个电平同时为低电平时，第二晶体管V2就会截止。
在示例实施例中，第一晶体管V1的控制端3与第二晶体管V2的第一端1电连接，第一晶体管V1的第一端1与电源板510的待机电压端P1即5VS_IN电连接，第一晶体管V1的第二端2与主芯片520的待机电压端P2即5VS电连接，可选的，也可以将第一晶体管V1的第二端2与主板(图中未示出)的待机电压端(图中未示出)相连。在该第一晶体管V1导通时，控制电源板510的待机电压端P1与主芯片520的待机电压端P2连接；在该第一晶体管V1截止时，控制电源板510的待机电压端P1与主芯片520的待机电压端P2断开。在电源板510的待机电压端P1与主芯片520的待机电压端P2连接时，电源板510的待机电压即5V电压能够向主芯片520供电；在电源板510的待机电压端P1与主芯片520的待机电压端P2断开时，电源板510的待机电压停止向主芯片520供电，能够快速断开给主芯片520供电的5V待机电压。
在示例实施例中，第二晶体管V2的控制端3分别与第三晶体管V3的第二端2、电源板510的端口P3(见图5A)电连接，第二晶体管V2的第二端2接地，并且第二晶体管V2的控制端3接收交流检测信号即AC_DETECT信号；第三晶体管V3的控制端3与第四晶体管V4的第一端1电连接，第三晶体管V3的第一端1与电源板510的待机电压端P1电连接；第四晶体管V4的控制端3与主芯片520的输出端P4(见图5A)电连接，第四晶体管V4的第二端2接地，并且第四晶体管V4的控制端3接收直流检测信号即DC_DETECT信号。
在示例实施例中，在检测到交流断电时，会将AC_DETECT信号从高电平拉低到低电平，但是此时由于电解电容放电，待机电压5VS_IN还未断电，即还未发生DC断电，DC_DETECT保持高电平，因此第四晶体管V4导通、第三晶体管V3截止。由于AC-DETECT信号为低电平，并且第三晶体管V3截止导致其第2端电压为低，因此第二晶体管V2的基极电压为低电平，即第二晶体管V2截止。由于第二晶体管V2截止，第一晶体管V1截止，因此，主芯片SoC(System on Chip，系统级芯片)的待机电压5V能够快速断电。再次交流上电时，待机供电信号为低电平，主芯片的时序能够满足图1A所示的规格要求，OLED显示装置能够正常启动。
图11示意性示出了根据本申请的一些实施例的AC断电时的时序图。参照图11所示，在开机状态下接收到AC断电的信号时即竖线a所处的时刻，将AC_DETECT信号从高电平拉低到低电平，此时第一晶体管V1即MOS管V1截止，待机电压5VS快速断电，然后DC_DETECT信号从高电平变为低电平例如在26.8ms后即竖线b所处的时刻DC_DETECT信号从高电平变为低电平。
在示例实施例中，在检测到交流上电时，AC_DETECT信号变为高电平，第二晶体管V2导通，第一晶体管V1导通，待机电压5V开始上电，由于在交流断电时待机供电信号为低电平，因此主芯片时序能满足图1A所示的规格要求，从而OLED显示装置能够正常启动。
图12示意性示出了根据本申请的一些实施例的AC上电时的时序图。参照图12所示，在关机状态下，接收到AC上电的信号时即竖线a所处的时刻，将AC_DETECT信号从低电平拉高到高电平，前面提到过，AC_DETECT的电平和第三晶体管V3的第二端电平只要存在高电平时，第二晶体管V2就会导通，从而MOS管V1导通，待机电压5V供电。然后，在竖线b处所处的时刻将DC_DETECT信号从低电平拉高到高电平。
在示例实施例中，在直流断电即DC断电时，OLED显示装置接收到待机信号，将DC_DETECT信号先从高电平跳变到低电平，然后AC_DETECT信号再从高电平跳变到低电平。在DC_DETECT跳变到低电平时，第四晶体管V4截止，第三晶体管V3导通，第二晶体管V2的基极电压为高电平；同时，由于AC_DETECT还为高电平，第二晶体管V2的基极电压为高电平，则此时第二晶体管V2导通(前述已经提到过原理，这里不再重复说明)，第一晶体管V1导通，因此能够保持待机电压5V供电。
在AC_DETECT也跳变到低电平时，由于DC_DETECT仍然为低电平，此时第四晶体管V4截止，第三晶体管V3导通，第二晶体管V2的基极电压为高电平，第二晶体管V2仍然导通(前述已经提到过原理，这里不再重复说明)，则第一晶体管V1导通，因此能够继续保持待机电压5V供电。
图13示意性示出了根据本申请的一些实施例的DC断电时的时序图。参照图13所示，在开机状态下，接收到DC断电的信号时即竖线b所处的时刻，将DC_DETECT信号从高电平拉低到低电平，此时AC_DETECT信号仍为高电平，此时第二晶体管V2的基极由两条支路来的电压都为高电平信号，因此第二晶体管V2导通，MOS管V1保持导通，待机电压5V保持供电；然后在竖线a所处的时刻虽然AC_DETECT信号从高电平拉低到低电平，但是DC_DETECT信号为低电平，其所在支路为第二晶体管V2的基极提供高电平，因此第二晶体管仍然导通，MOS管V1保持导通，待机电压5V继续保持供电。
在示例实施例中，在直流上电即DC上电时，AC_DETECT信号先从低电 平跳变到高电平，然后DC_DETECT信号再从低电平跳变到高电平。由于AC_DETECT信号为高电平时第一晶体管V1导通(前述已经提到过原理，这里不再重复说明)，则能够保持待机电压5V供电。
图14示意性示出了根据本申请的一些实施例的DC上电时的时序图。参照图14所示，在待机状态下，接收到DC上电的信号时即竖线b所处的时刻，首先将AC_DETECT信号从低电平拉高到高电平，然后在竖线a所处的时刻将DC_DETECT从低电平拉高到高电平，此时MOS管V1保持导通，待机电压5V保持供电。
需要说明是，虽然在图6A中示出了第一晶体管V1为P型MOS管，第二晶体管V2、第三晶体管V3以及第四晶体管V4均为NPN型三级管，第二晶体管V2、第三晶体管V3以及第四晶体管V4的第一端为集电极、第二端为发射极、控制端为基极。但是本领域技术人员应该理解的是，第一晶体管、第二晶体管、第三晶体管以及第四晶体管还可以为其他适当形式的晶体管，例如第一晶体管V1还可以为N型MOS管，第二晶体管V2、第三晶体管V3以及第四晶体管V4中的一个或多个还可以为PNP型三级管。
在本示例实施例中，第一晶体管V1的第一端为源极，第二端为漏极，控制端为栅极，但是本申请的示例实施例不限于此，例如，第一晶体管V1的第一端也可以为漏极，第二端为源极，这同样在本申请的保护范围内。
此外，在一些实施例中，如图6B所示，第一控制单元540还可以包括二极管VD1，该二极管VD1的第一端接收交流检测信号AC_DETECT，第二端与第二晶体管V2的控制端电连接。由于在直流断电时，AC_DETECT信号为低电平，而第二晶体管V2的控制端3为高电平，由于二级管VD1具有单向导通功能，因此，二极管VD1可以防止在直流断电时电压倒灌给交流检测信号AC_DETECT。
需要说明的是，本申请对电阻R1至R10的阻值不进行特殊限定，电阻R1至R10还可以为其他适当的阻值。
图7示意性示出了根据本申请的一些实施例的直流断电/上电时的交流控 制信号和直流控制信号的时序图。
参照图7所示，为了在直流断电即DC断电时保持待机电压，需要另一控制信号即DC_DETECT使第一开关单元530在直流断电时仍然能够保持导通。也就是说，在DC断电时，DC_DETECT控制信号要比AC_DETECT早跳变，才不会影响第一开关单元530的打开状态。这样，即使在DC断电的状态下，第一开关单元530仍然能够保持导通，OLED显示装置能够正常待机。
在图7中，在DC断电即t1时，OLED显示装置接收到待机信号，将DC_DETECT信号先从高电平跳变到低电平，然后AC_DETECT信号再从高电平跳变到低电平。对应参考图6A和图6B，在DC_DETECT跳变到低电平时，三极管V4截止，三极管V3导通，三级管V2的基极电压为高，并且由于AC_DETECT还为高电平，则此时(仅在图6B中，二极管VD1导通)三级管V2的基极电压仍为高，三极管V2导通，MOS管V1导通，因此能够保持待机电压5V供电。
在AC_DETECT也跳变到低电平时，但此时DC_DETECT为低电平，三极管V4截止，三极管V3导通，三级管V2的基极电压仍为高，三极管V2导通，则MOS管V1导通，因此能够保持待机电压5V供电。
在图7中，在DC上电即t2时，AC_DETECT信号先从低电平跳变到高电平，然后DC_DETECT信号再从低电平跳变到高电平。由于AC_DETECT信号为高电平时MOS管V1导通，则能够保持待机电压5V供电。
在示例实施例中，交流检测信号即AC_DETECT、直流检测信号即DC_DETECT、第一晶体管、待机电压5V的逻辑关系如下表1所示：
表1.AC_DETECT、DC_DETECT、第一晶体管、5V的逻辑关系表
AC_DETECT DC_DETECT 第一晶体管状态 5VS
H H 导通 ON
H L 导通 ON
L H 截止 OFF
L L 导通 ON
表1
在表1中，在AC_DETECT信号和DC_DETECT信号均为高电平时，MOS管导通，待机电压5V保持供电；在AC_DETECT信号为高电平，并且DC_DETECT信号为低电平时，MOS管V1导通，待机电压5V保持供电；在AC_DETECT信号为低电平，并且DC_DETECT信号为高电平时，MOS管截止，待机电压5V停止供电；在AC_DETECT信号和DC_DETECT信号均为低电平时，MOS管V1导通，待机电压5V保持供电。
为了保证第一控制单元能输出控制主芯片断电第二控制信号，在上述各实施例的基础上，在本发明实施例中，还可以将上述模拟电路转换为数字电路，通过数字电路来实现，具体的，
所述第一控制单元包括逻辑非门和逻辑与非门，其中：
所述逻辑非门的输入端与所述电源板连接，输出端与逻辑与非门的输入端连接；
所述逻辑与非门的另一输入端与主芯片连接，输出端与所述第一开关单元连接；
并且为了能响应第二控制信号实现给主芯片断电，所述第一开关单元包括第一开关：
所述第一开关分别连接所述逻辑与非门的输出端、所述电源板及所述待机唤醒单元。
为了解决引入电解电容带来的开机交流断电时，无法在电解电容放电期间再次上电唤醒OLED显示装置的问题，该第一控制单元由逻辑非门、逻辑与非门构成，其中该逻辑非门的输入端与电源板连接，输出端与与非门的一输入端连接；而该与非门的另一输入端与主芯片连接，输出端与第一开关单元连接。
该第一开关单元由第一开关构成，由于是为了解决电解电容放电引起的主芯片不能及时断电而造成的无法在该放电期间唤醒OLED显示装置的问题， 所以在该种状态下，应该控制第一开关断开，以实现主芯片的T8032的断电。
具体地，本发明实施例中第一控制单元和第一开关单元的工作原理为：
OLED显示装置在正常工作状态下，电源板和主芯片均处于上电状态，即电源板交流上电检测信号AC_DET和直流开机检测信号DC_DET均为高电平，即逻辑与非门的两个输入端中，与逻辑非门连接的一端由于逻辑非门的一级取反使得输入为低电平，另外一端输入为高电平，此时，根据逻辑与非门的控制逻辑输出高电平，而此时并不需要给主芯片断电，因此该第一开关单元的第一开关应为闭合状态，因此该第一开关的控制逻辑应为低电平断开，高电平闭合。若按下待机键待机时，此时AC_DET和DC_DET均为低电平，通过逻辑非门及逻辑与非门的控制输出高电平，此时第一开关闭合，以保证待机状态下可以被唤醒。
如果在开机状态下突然交流断电，AC_DET为低电平，由于电解电容的放电，DC_DET为高电平，此时为了避免产生在放电期间无法唤醒显示装置的情况，经过逻辑非门及逻辑与门，输出低电平，使得第一开关断开，即给主芯片断电，具体的为给主芯片包含的待机唤醒单元T8032断电，以使得OLED显示装置恢复初始状态，进而可以正常开机。而如果OLED显示装置处于系统升级或者恢复出厂设置时，此时并没有交流断电，即AC_DET为高电平，但是主芯片处于不正常工作状态，DC_DET为低电平，因此经过逻辑非门及逻辑与门，输出为高电平，给主芯片进行供电，才能维持主芯片完成系统升级或者恢复出厂设置。具体的，第一控制单元及第一开关单元控制T8032断电的特性如表2所示。
输入1(AC_DET) 输入2(DC_DET) 开关状态 T8032供电状态
L L 关 供电
L H 开 断电
H L 关 供电
H H 关 供电
表2
其中H代表高电平，L代表低电平。
本发明实施例中，通过给第一控制单元设置一个逻辑非门和一个逻辑与非门，实现了输出控制主芯片断电第二控制信号，并在第一开关单元设置一个开关来控制主芯片的上电和断电。
图8示出了根据本申请的再一些实施例的OLED显示装置的示意图。参照图8所示，该OLED显示装置包括电源板510、主芯片520、主板550以及供电电路。该供电电路包括第一开关单元530以及第一控制单元540。其中，第一开关单元530与电源板510的待机电压端P1以及主板550的待机电压端P2电连接，用于控制电源板510的待机电压端P1与主板550的待机电压端P2的连接和断开；第一控制单元540，与第一开关单元530电连接，用于响应于电源板510的端口P3输出的交流检测信号AC_DETECT和主芯片520的端口P4输出的直流检测信号DC_DETECT来控制第一开关单元530的导通和截止，该交流检测信号用于检测是否接收到了交流断电或交流上电的信号，该直流检测信号用于检测是否接收到了直流断电或直流上电的信号。该供电电路的具体结构与图6B中所示的供电电路基本相同，在此将不再赘述。
实施例2：
OLED在大屏幕显示领域，其色彩表现能力、对比度、响应速度、视角等核心指标几乎没有对手，因此OLED显示装置发展异常迅速。但是在OLED面板供电时，屏逻辑控制单元和屏显示驱动单元是分开的，其中屏逻辑控制单元负责解析主芯片发来的视频信号，控制屏显示驱动单元的显示，而屏显示驱动单元因为OLED屏的特殊性，断电之后其放电会很慢，因此如果同时控制两者掉电，会出现屏逻辑控制单元已经掉电，而屏显示驱动单元还未掉电的情况，此时就会导致OLED屏出现残影，另外由于OLED屏失去控制，会一定概率引起烧屏。现有技术在防止残影发生时，常采用在电源端引入电解电容的方法，而电解电容能维持ARM核有电的时间很短暂，因此ARM核 无法通知屏显示驱动放电，只能通过电源来通知屏显示驱动迅速放电以保证交流断电时屏放电的时序，防止残影的发生。这种方法虽然可以在交流断电时保证屏显示驱动单元先放电从而防止残影的发生，但是在显示装置升级、恢复出厂设置、出错保护等多种场景下，也需要给屏显示驱动放电，此时系统则会通知屏显示驱动放电，而由于并未交流断电，电源并不认为需要给屏显示驱动放电，此时则会造成屏放电时序紊乱，因此目前无法在多种场景下并且同时兼容交流断电时通知屏显示驱动迅速放电，从而也无法防止残影的发生。
为了解决上述提到的技术问题，在上述各实施例的基础上，在本申请实施例中提出的一种OLED显示装置，如图9A所示，该装置包括电源板510、和主芯片520，还包括：屏逻辑控制单元503、屏显示驱动单元504、第二控制单元505和第二开关单元506其中：
所述第二控制单元505分别连接所述电源板510、所述主芯片520连接及第二开关单元506，用于接收到所述电源板交流断电的第一输入信号或所述主芯片直流断电的第二输入信号时，输出第一控制信号；
所述第二开关单元506连接所述屏显示驱动单元，用于接收到所述第二控制单元输出的第一控制信号时，控制所述屏显示驱动单元放电。
根据图9A所示的OLED显示装置，由于第二控制单元分别与电源板和主芯片连接，所以该第二控制单元既可接收电源板交流上电或者交流断电的信号，也可接收主芯片直流上电或者直流断电的信号，并且在接收到某一指定信号的时候就输出对应的控制信号。
具体的，当第二控制单元接收到电源板交流断电的第一输入信号，或者接收到主芯片直流断电的第二输入信号时，该第二控制单元就会输出第一控制信号，该第一控制信号为使第二开关单元控制屏显示驱动单元放电的信号；第二开关单元接收到该第一控制信号时，控制屏显示驱动单元放电。
本发明实施例中，该OLED显示装置通过第二控制单元分别接收电源板及主芯片输出的信号，如果接收到电源板交流断电的第一输入信号或主芯片 直流断电的第二输入信号，则通过第二开关单元来控制屏显示驱动单元放电，从而可以保证只要电源板交流断电或者主芯片直流断电都能使驱动单元放电，进而可以在任何场景下防止残影的发生。
为了保证第二控制单元能输出控制屏显示驱动单元断电第一控制信号，在上述各实施例的基础上，在本申请实施例中，所述第二控制单元包括逻辑与门：
所述逻辑与门的输入端与所述电源板连接，另一输入端与所述主芯片连接，输出端与第二开关单元连接；
并且为了能响应第一控制信号实现给主芯片断电，所述第二开关单元包括第二开关：
所述第二开关分别连接屏显示驱动单元和接地端。
为了实现由电源板和主芯片共同来控制屏显示驱动单元的放电，该第二控制单元由一个逻辑与门构成，该逻辑与门有两个输入端和一个输出端，其中该逻辑与门的一输入端与电源板连接，另一输入端与主芯片连接，输出端与第二开关单元连接。逻辑与门电路的控制逻辑是只有所有输入端的输入均为高电平，才会输出高电平，否则输出低电平。
而OLED显示装置在正常工作状态下，电源板和主芯片均处于上电状态，即经过该逻辑与门之后输出的控制信号为高电平，但是此时并不需要给屏显示驱动单元放电，因此，在第二开关单元内设置了第二开关，并且该第二开关为高电平断开，以便保证OLED显示装置可以正常工作。该第二开关的一端与屏显示驱动单元连接，并且为了保证屏显示驱动快速放电，该第二开关的另一端与接地端连接。
具体地，本发明实施例中第二控制单元和第二开关单元的工作原理为：
OLED显示装置在正常工作状态下，电源板和主芯片均处于上电状态，即电源板交流上电检测信号AC_DET和直流开机检测信号DC_DET均为高电平，即逻辑与门的两个输入端均为高电平输入，此时，根据逻辑与门的控制逻辑输出高电平，而第二开关为高电平断开，所以屏显示驱动单元不放电。 若按待机键进行待机时，此时AC_DET和DC_DET均为低电平，通过逻辑与门输出低电平，此时第二开关闭合，屏显示驱动单元快速放电。
如果在开机状态下突然交流断电，此时AC_DET为低电平，由于电解电容的放电，DC_DET为高电平，经过逻辑与门输出低电平，第二开关闭合，即屏显示驱动单元快速放电，防止在突然交流断电时出现残影的问题。而如果OLED显示装置处于系统升级或者恢复出厂设置时，此时并没有交流断电，即AC_DET为高电平，但是主芯片处于不正常工作状态，DC_DET为低电平，因此逻辑与门的输出仍为低电平，屏显示驱动单元快速放电，使得系统在进行升级或者恢复出厂设置时仍能控制屏显示驱动单元迅速放电，避免残影的发生。具体的该逻辑与门及第二开关的控制屏显示驱动电路放电的特性如表3所示。
输入1(AC_DET) 输入2(DC_DET) 开关状态 放电状态
L L 关 放电
L H 关 放电
H L 关 放电
H H 开 不放电
表3
其中L代表低电平，H代表高电平。
本申请实施例中，通过给第二控制单元设置一个逻辑与门，实现了输出控制屏显示驱动单元断电第一控制信号，并在第二开关单元设置一个开关来控制屏显示驱动单元的放电。
下面结合图9B，以一个具体的实施例，对该OLED显示装置进行详细描述。图9B为该OLED显示装置的电路结构示意图，该电路结构示意图中包括电源板、主芯片：T8032和ARM芯片、OLED单元：屏显示驱动单元和屏逻辑控制单元、第二控制单元：与门1、第一控制单元：与非门0、第二开关单元和第一开关单元。
接下来分别从正常开机、直流正常待机、开机交流断电三个过程对该OLED显示装置的电路结构进行描述。
图9C为正常开机时OLED单元的上电流程图。
OLED显示装置在交流上电之前AC_DET为低电平，由于DC_DET默认也为低电平，此时经过与非门0输出高电平，即控制T8032开关闭合，这个时候T8032正常供电。开机后，AC_DET变为高电平，主芯片可以将控制屏逻辑控制供电的引脚GPIO0置为高电平，让OLED单元Vdd上电。根据OLED单元上电时序图9D，500ms后，主芯片控制GPIO2(DC_DET)置为高电平，通过与门1将控制屏显示驱动放电引脚Panel_AC_DET变为高电平，屏停止放电，最后拉高控制屏显示驱动供电的引脚GPIO1给Evdd上电，这样OLED单元就正常供电了。
图9E为OLED显示装置直流正常待机时OLED单元的掉电流程图。
OLED显示装置在收到按下遥控POWER键后发出的待机信号时，会执行待机流程。此时主芯片先将GPIO2(DC_DET)置为低电平，这个时候交流未断电，AC_DET为高电平，通过与门1的逻辑控制以后，Panel_AC_DET变为低电平，屏迅速放电，同时拉低屏显示驱动单元供电Evdd。待屏显示驱动单元放电完全，也就是30ms后，屏逻辑控制单元供电Vdd被拉低，以保证屏逻辑控制单元正常掉电。待机后，ARM也会掉电，只有T8032在工作，它将等待唤醒源将ARM唤醒。
图9F为OLED显示装置开机交流断电时OLED屏显示驱动单元实现快速放电的流程图。
OLED显示装置在正常开机的状态下，AC_DET为高电平，DC_DET也为高电平，若突然交流断电，AC_DET会变为低电平，经过非门的一级反向，此时与非门0的一端输入为高电平。由于OLED显示装置在交流断电的时候，电源板的电解电容会放电，即使得DC_DET为高电平，因此与非门0的另一输入端为高电平，经过与非门0的逻辑控制，输出低电平，即T8032被断电，使得再次交流上电后，T8032会重新上电，然后唤醒机器，而不会出现唤不醒 的问题。同时，由于与门1的两端输入分别连接AC_DET和DC_DET，交流断电时，AC_DET会变为低电平，DC_DET仍为高电平，因此与门0的输出为低电平，第二开关单元包含的第二开关闭合，进而屏显示驱动单元迅速放电，防止在交流断电时残影的发生。由于屏显示驱动单元储能有限，待屏显示驱动单元放电完全，也就是30ms后，屏逻辑控制单元供电Vdd被拉低，以保证屏逻辑控制单元正常掉电。
实施例3：
在本申请的示例实施例中，还提供了一种OLED显示装置控制方法，该OLED显示装置的控制方法用于控制上述OLED显示装置。参照图10所示，该OLED显示装置控制方法包括：
步骤S1010，在所述交流检测信号为低电平并且所述直流检测信号为高电平时，控制所述第一开关单元截止，以断开所述电源板的待机电压端与所述主芯片的待机电压端的连通。
在示例实施例中，该OLED显示装置控制方法还包括：在开机状态下，若接收到交流断电的信号例如关闭电源的信号，则将所述交流检测信号从高电平转换成低电平，控制所述第一开关单元截止，以使所述直流检测信号从高电平转换成低电平。
在示例实施例中，该OLED显示装置控制方法还包括：在关机状态下，若接收到交流上电的信号例如打开电源的信号，则将所述交流检测信号从低电平转换成高电平，控制所述第一开关单元导通，并将所述直流检测信号从低电平转换成高电平。
在示例实施例中，该OLED显示装置控制方法还包括：在开机状态下，若接收到直流断电的信号例如遥控器发出的待机信号，则首先将所述直流检测信号从高电平转换成低电平，然后将所述交流检测信号从高电平转换成低电平，并保持所述第一开关单元导通。
在示例实施例中，该OLED显示装置控制方法还包括：在待机状态下，若接收到直流上电的信号例如遥控器发出的开机信号，则首先将所述交流检 测信号从低电平转换成高电平，控制所述第一开关单元导通，然后将所述直流检测信号从低电平转换成高电平。
根据图10中所示的OLED显示装置控制方法，一方面，在交流断电时通过交流检测信号控制第一开关单元截止，从而能够快速断开5V待机电压，在直流断电时，首先将直流检测信号从高电平转换成低电平，然后将交流检测信号从高电平转换成低电平，并保持第一开关单元导通，从而能够在直流断电时保证正常待机；另一方面，由于在交流断电时能够快速断开5V待机电压，从而在交流上电时OLED显示装置能够正常启动。
进一步地，本申请的另一示例实施例中提供了一种电子设备，包括：处理器；以及存储器，所述存储器上存储有计算机可读指令，所述计算机可读指令被所述处理器执行时实现如上所述的OLED显示装置控制方法。
对于系统/装置实施例而言，由于其基本相似于方法实施例，所以描述的比较简单，相关之处参见方法实施例的部分说明即可。
需要说明的是，在本文中，诸如第一和第二等之类的关系术语仅仅用来将一个实体或者一个操作与另一个实体或者另一个操作区分开来，而不一定要求或者暗示这些实体或者操作之间存在任何这种实际的关系或者顺序。
本领域内的技术人员应明白，本申请的实施例可提供为方法、系统、或计算机程序产品。因此，本申请可采用完全硬件实施例、完全应用实施例、或结合应用和硬件方面的实施例的形式。而且，本申请可采用在一个或多个其中包含有计算机可用程序代码的计算机可用存储介质(包括但不限于磁盘存储器、CD-ROM、光学存储器等)上实施的计算机程序产品的形式。
本申请是参照根据本申请实施例的方法、设备(系统)、和计算机程序产品的流程图和/或方框图来描述的。应理解可由计算机程序指令实现流程图和/或方框图中的每一流程和/或方框、以及流程图和/或方框图中的流程和/或方框的结合。可提供这些计算机程序指令到通用计算机、专用计算机、嵌入式处理机或其他可编程数据处理设备的处理器以产生一个机器，使得通过计算机或其他可编程数据处理设备的处理器执行的指令产生用于实现在流 程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的装置。
这些计算机程序指令也可存储在能引导计算机或其他可编程数据处理设备以特定方式工作的计算机可读存储器中，使得存储在该计算机可读存储器中的指令产生包括指令装置的制造品，该指令装置实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能。
这些计算机程序指令也可装载到计算机或其他可编程数据处理设备上，使得在计算机或其他可编程设备上执行一系列操作步骤以产生计算机实现的处理，从而在计算机或其他可编程设备上执行的指令提供用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的步骤。
尽管已描述了本申请的优选实施例，但本领域内的技术人员一旦得知了基本创造性概念，则可对这些实施例作出另外的变更和修改。所以，所附权利要求意欲解释为包括优选实施例以及落入本申请范围的所有变更和修改。
显然，本领域的技术人员可以对本申请进行各种改动和变型而不脱离本申请的精神和范围。这样，倘若本申请的这些修改和变型属于本申请权利要求及其等同技术的范围之内，则本申请也意图包含这些改动和变型在内。

Claims (13)

  1. 一种OLED显示装置，包括电源板、主芯片，其特征在于，还包括：
    第一开关单元，分别与所述电源板的待机电压端以及所述主芯片的待机电压端电连接，用于控制所述电源板的待机电压端与所述主芯片的待机电压端的连通或断开；
    第一控制单元，分别与所述第一开关单元、所述电源板及所述主芯片电连接，用于接收所述电源板输出的交流检测信号和所述主芯片输出的直流检测信号，控制所述第一开关单元的导通或截止；
    其中，所述交流检测信号用于检测是否接收到了交流断电或交流上电的信号，所述直流检测信号用于检测是否接收到了直流断电或直流上电的信号。
  2. 根据权利要求1所述的OLED显示装置，其特征在于，所述第一开关单元包括第一晶体管，所述第一控制单元包括第二晶体管、第三晶体管以及第四晶体管，其中：
    所述第一晶体管的控制端与所述第二晶体管的第一端电连接，所述第一晶体管的第一端与所述电源板的待机电压端电连接，所述第一晶体管的第二端与所述主芯片的待机电压端电连接；
    所述第二晶体管的控制端与所述第三晶体管的第二端电连接，所述第二晶体管的第二端接地，并且所述第二晶体管的控制端用于接收所述交流检测信号；
    所述第三晶体管的控制端与所述第四晶体管的第一端电连接，所述第三晶体管的第一端与所述电源板的待机电压端电连接；
    所述第四晶体管的控制端与所述主芯片的输出端电连接，所述第四晶体管的第二端接地，并且所述第四晶体管的控制端用于接收所述直流检测信号。
  3. 根据权利要求2所述的OLED显示装置，其特征在于，所述第一晶体管为MOS管，所述第二晶体管、所述第三晶体管以及所述第四晶体管均为三极管。
  4. 根据权利要求3所述的OLED显示装置，其特征在于，所述第一晶体管为P型MOS管，所述第二晶体管、所述第三晶体管以及所述第四晶体管均为NPN型三级管。
  5. 根据权利要求2至4中任一项所述的OLED显示装置，其特征在于，所述第一控制单元还包括：二级管，所述二极管的第一端用于接收所述交流检测信号，所述二极管的第二端与所述第二晶体管的控制端电连接。
  6. 根据权利要求1至4中任一项所述的OLED显示装置，其特征在于，还包括：屏逻辑控制单元和屏显示驱动单元、第二开关单元和第二控制单元，其中，
    所述第二控制单元分别连接所述电源板、所述主芯及第二开关单元，用于接收到所述电源板交流断电的第一输入信号或所述主芯片直流断电的第二输入信号时，输出第一控制信号；
    所述第二开关单元连接所述屏显示驱动单元，用于接收到所述第二控制输出的第一控制信号时，控制所述屏显示驱动单元放电。
  7. 根据权利要求6所述的OLED显示装置，其特征在于，所述第二控制单元包括逻辑与门：
    所述逻辑与门的输入端与所述电源板连接，另一输入端与所述主芯片连接，输出端与第二开关单元连接。
  8. 根据权利要求6所述的OLED显示装置，其特征在于，所述第二开关单元包括第二开关：
    所述第二开关分别连接屏显示驱动单元和接地端。
  9. 一种OLED显示装置控制方法，用于控制根据权利要求1至8中任一项所述的OLED显示装置，其特征在于，所述OLED显示装置控制方法包括：
    在所述交流检测信号为低电平并且所述直流检测信号为高电平时，控制所述第一开关单元截止，以断开所述电源板的待机电压端与所述主芯片的待机电压端的连通。
  10. 根据权利要求9所述的OLED显示装置控制方法，其特征在于，所 述OLED显示装置控制方法还包括：
    在开机状态下，若接收到交流断电的信号，则将所述交流检测信号从高电平转换成低电平，控制所述第一开关单元截止，以使所述直流检测信号从高电平变为低电平。
  11. 根据权利要求9所述的OLED显示装置控制方法，其特征在于，所述OLED显示装置控制方法还包括：
    在关机状态下，若接收到交流上电的信号，则将所述交流检测信号从低电平转换成高电平，控制所述第一开关单元导通，并将所述直流检测信号从低电平转换成高电平。
  12. 根据权利要求9所述的OLED显示装置控制方法，其特征在于，所述OLED显示装置控制方法还包括：
    在开机状态下，若接收到直流断电的信号，则首先将所述直流检测信号从高电平转换成低电平，然后将所述交流检测信号从高电平转换成低电平，并保持所述第一开关单元导通。
  13. 根据权利要求9所述的OLED显示装置控制方法，其特征在于，所述OLED显示装置控制方法还包括：
    在待机状态下，若接收到直流上电的信号，则首先将所述交流检测信号从低电平转换成高电平，控制所述第一开关单元导通，然后将所述直流检测信号从低电平转换成高电平。
PCT/CN2019/089139 2018-09-25 2019-05-29 一种oled显示装置及其控制方法 WO2020062905A1 (zh)

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