WO2022083360A1 - 显示触摸装置和供电控制方法 - Google Patents

显示触摸装置和供电控制方法 Download PDF

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Publication number
WO2022083360A1
WO2022083360A1 PCT/CN2021/118244 CN2021118244W WO2022083360A1 WO 2022083360 A1 WO2022083360 A1 WO 2022083360A1 CN 2021118244 W CN2021118244 W CN 2021118244W WO 2022083360 A1 WO2022083360 A1 WO 2022083360A1
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WIPO (PCT)
Prior art keywords
control
power supply
control circuit
circuit
terminal
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PCT/CN2021/118244
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English (en)
French (fr)
Inventor
孟昭晖
孙伟
丛林
黄翠兰
赵敬鹏
Original Assignee
京东方科技集团股份有限公司
北京京东方光电科技有限公司
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Priority to US17/789,172 priority Critical patent/US20230032344A1/en
Publication of WO2022083360A1 publication Critical patent/WO2022083360A1/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3206—Monitoring of events, devices or parameters that trigger a change in power modality
    • G06F1/3231—Monitoring the presence, absence or movement of users
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416—Control or interface arrangements specially adapted for digitisers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/266—Arrangements to supply power to external peripherals either directly from the computer or under computer control, e.g. supply of power through the communication port, computer controlled power-strips
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3206—Monitoring of events, devices or parameters that trigger a change in power modality
    • G06F1/3215—Monitoring of peripheral devices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/325—Power saving in peripheral device
    • G06F1/3262—Power saving in digitizer or tablet
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/325—Power saving in peripheral device
    • G06F1/3265—Power saving in display device
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3293—Power saving characterised by the action undertaken by switching to a less power-consuming processor, e.g. sub-CPU
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3296—Power saving characterised by the action undertaken by lowering the supply or operating voltage

Definitions

  • the present disclosure relates to the field of display touch technology, and in particular, to a display touch device and a power supply control method.
  • the sleep-wake-up of the large-size display touch device is only a solution such as moving a mouse, a keyboard, a touch remote control or a wake-up switch, and has not implemented a touch-wake-up.
  • a large-sized display touch device there are many independent chips, such as power management chip, timing controller chip, touch power chip, touch computing chip, display driver chip, etc., which are not integrated into a whole chip. The logic function design of touch wake-up will be more difficult.
  • the system operating voltage is provided after the power is turned off, so the touch event cannot be detected, and the wake-up function after sleep cannot be realized.
  • an embodiment of the present disclosure provides a display touch device, including a display touch panel, a display touch drive circuit, a touch integrated circuit, a power management chip, and a touch operation processing circuit, and the display touch device further includes a power supply module group; the power supply module includes a first power supply end, a second power supply end and a power supply control circuit;
  • the power management chip provides a working voltage for the touch operation processing circuit, the display touch drive circuit and the touch integrated circuit;
  • the control terminal of the power supply control circuit is electrically connected to the control signal output terminal of the touch operation processing circuit
  • the touch operation processing circuit is configured to provide a first control signal to the control signal output end when the display touch device is in a dormant state, so that the power supply control circuit, under the control of the first control signal,
  • the power management chip is powered by the second power supply terminal;
  • the touch operation processing circuit is further configured to provide power to the control signal output terminal when the display touch device is in a sleep state and the display touch panel is touched the second control signal, so that the power supply control circuit supplies power to the power management chip through the first power supply terminal under the control of the second control signal.
  • the first power supply terminal is used to provide a 0V voltage signal when the display touch device is in a dormant state;
  • the display touch device further includes a system terminal;
  • the touch operation processing circuit is configured to provide a wake-up prompt signal to the system end when the display touch device is in a dormant state and the display touch panel is touched;
  • the system end controls the first power supply end to provide a first working voltage when receiving the wake-up prompt signal.
  • the touch operation processing circuit is further configured to provide a second control signal to the control signal output end when the display touch device is in a normal working state, so that the power supply control circuit is in the second state. Under the control of the control signal, power is supplied to the power management chip through the first power supply terminal.
  • the power supply control circuit includes a first resistor, a second resistor, a third resistor, a first control circuit, a second control circuit, a third control circuit and a fourth control circuit, wherein,
  • the control end of the first control circuit is electrically connected to the control signal output end, the first end of the first control circuit is connected to the control end of the second control circuit, the control end of the third control circuit and the The first end of the first resistor is electrically connected, the second end of the first resistor is electrically connected to the second power supply end; the second end of the first control circuit is electrically connected to the first voltage end;
  • a control circuit is used to control the communication between the control end of the second control circuit and the first voltage end when the control signal output end outputs the first control signal, and control the control of the third control circuit
  • the first control circuit is further configured to control the control end of the second control circuit to communicate with the first voltage end when the control signal output end outputs a second control signal. disconnecting between the voltage terminals, and controlling the disconnection between the control terminal of the third control circuit and the first voltage terminal;
  • the first end of the second control circuit is electrically connected to the second power supply end, the second end of the second control circuit is electrically connected to the control end of the fourth control circuit, and the second control circuit
  • the second end of the power supply is electrically connected to the second voltage end through a second resistor, and the second control circuit is used to control the second power supply end and the The control terminals of the fourth control circuit are connected, and the second control circuit is further configured to control the second power supply terminal and the fourth control circuit when the control terminal of the second control circuit is disconnected from the first voltage terminal disconnected between the control terminals;
  • the first end of the third control circuit is electrically connected to the second power supply end, the second end of the third control circuit is electrically connected to the power management chip through a third resistor, and the third control circuit uses When the control terminal is connected with the first voltage terminal, the power management chip is controlled to supply power through the second power supply terminal, and the third control circuit is also used for connecting the control terminal with the first voltage terminal. When the terminals are disconnected, controlling the disconnection between the second power supply terminal and the power management chip;
  • the first end of the fourth control circuit is electrically connected to the first power supply end
  • the second end of the fourth control circuit is electrically connected to the power management chip through the third resistor
  • the fourth control circuit is electrically connected to the power management chip.
  • the circuit is used to control the disconnection between the first power supply terminal and the power management chip when its control terminal is electrically connected to the second power supply terminal
  • the fourth control circuit is also used to connect the control terminal and the power management chip. When the second power supply terminals are disconnected, the control is to supply power to the power management chip through the first power supply terminal.
  • the first control circuit includes a first control transistor and a first control resistor
  • the control end of the first control transistor is electrically connected to the control signal output end, and the first pole of the first control transistor is respectively connected to the control end of the second control circuit and the control end of the third control circuit is electrically connected to the first terminal of the first resistor; the second pole of the first control transistor is electrically connected to the first voltage terminal.
  • the second control circuit includes a second control transistor
  • the control electrode of the second control transistor is electrically connected to the first end of the first control circuit, the first electrode of the second control transistor is electrically connected to the second power supply end, and the second control transistor is electrically connected to the first end of the first control circuit.
  • the second electrode is electrically connected to the control terminal of the fourth control circuit, and the second electrode of the second control transistor is electrically connected to the second voltage terminal through a second resistor.
  • the third control circuit includes a third control transistor
  • the control electrode of the third control transistor is electrically connected to the first end of the first control circuit, the first electrode of the third control transistor is electrically connected to the second power supply end, and the third control transistor is electrically connected to the first end of the first control circuit.
  • the second pole is electrically connected to the power management chip through the third resistor.
  • the fourth control circuit includes a fourth control transistor and a fifth control transistor, wherein,
  • the control electrode of the fourth control transistor and the control electrode of the fifth control transistor are electrically connected to the second end of the second control circuit, and the first electrode of the fourth control transistor is connected to the first power supply end Electrically connected, the second pole of the fourth control transistor is electrically connected to the first pole of the fifth control transistor, and the second pole of the fifth control transistor is electrically connected to the power management chip through the third resistor connect.
  • the display touch device further includes a timing controller
  • the touch operation processing circuit and the timing controller are integrated on one chip.
  • an embodiment of the present disclosure further provides a power supply control method, which is applied to the above-mentioned display touch device, and the power supply control method includes:
  • the power management chip provides the operating voltage for the touch operation processing circuit, the display touch drive circuit and the touch integrated circuit;
  • the touch operation processing circuit When the display touch device is in a dormant state, the touch operation processing circuit provides a first control signal to the control signal output terminal, so that the power supply control circuit can manage the power supply through the second power supply terminal under the control of the first control signal. chip power supply;
  • the touch operation processing circuit When the display touch device is in a sleep state and the display touch panel is touched, the touch operation processing circuit provides a second control signal to the control signal output end, so that the power supply control circuit is in the first Under the control of two control signals, the power management chip is powered through the first power supply terminal.
  • the display touch device further includes a system terminal
  • the power supply control method further includes:
  • the first power supply terminal When the display touch device is in a dormant state, the first power supply terminal provides a 0V voltage signal
  • the touch operation processing circuit detects that a wake-up prompt signal is provided to the system end;
  • the system terminal controls the first power supply terminal to provide a first working voltage when receiving the wake-up prompt signal.
  • the power supply control method described in at least one embodiment of the present disclosure further includes:
  • the touch operation processing circuit When the display touch device is in a normal working state, the touch operation processing circuit provides a second control signal to the control signal output terminal, so that the power supply control circuit, under the control of the second control signal, passes The first power supply terminal supplies power to the power management chip.
  • FIG. 1 is a structural diagram of a display touch device according to at least one embodiment of the present disclosure
  • FIG. 2 is a structural diagram of a display touch device according to at least one embodiment of the present disclosure
  • FIG. 3 is a structural diagram of a display touch device according to at least one embodiment of the present disclosure.
  • FIG. 4 is a working sequence diagram of at least one embodiment of the display touch device shown in FIG. 3 of the present disclosure
  • FIG. 5 is a circuit diagram of a display touch device according to at least one embodiment of the present disclosure.
  • the transistors used in all the embodiments of the present disclosure may be triodes, thin film transistors, field effect transistors, or other devices with the same characteristics.
  • one pole is called the first pole, and the other pole is called the second pole.
  • control electrode when the transistor is a triode, the control electrode may be the base electrode, the first electrode may be the collector electrode, and the second electrode may be the emitter electrode; or the control electrode may be the base electrode electrode, the first electrode can be an emitter electrode, and the second electrode can be a collector electrode.
  • the control electrode when the transistor is a thin film transistor or a field effect transistor, the control electrode may be a gate electrode, the first electrode may be a drain electrode, and the second electrode may be a source electrode;
  • the control electrode may be a gate electrode, the first electrode may be a source electrode, and the second electrode may be a drain electrode.
  • the display touch device includes a display touch panel, a display touch driving circuit 11 , a touch integrated circuit 12 , a power management chip 21 and a touch operation processing circuit 22 .
  • the touch device further includes a power supply module; the power supply module includes a first power supply terminal P1, a second power supply terminal P2 and a power supply control circuit 20;
  • the power management chip 21 provides operating voltages for the touch operation processing circuit 22 , the display touch driving circuit 11 and the touch integrated circuit 12 ;
  • the control terminal of the power supply control circuit 20 is electrically connected to the control signal output terminal S0 of the touch operation processing circuit 22;
  • the touch operation processing circuit 22 is respectively electrically connected with the first power supply terminal P1, the second power supply terminal P2, the control signal output terminal S0 and the power management chip 21, and is used for sending a signal to the touch display device when the display touch device is in a dormant state.
  • the control signal output terminal S0 provides a first control signal, so that the power supply control circuit 20 supplies power to the power management chip 21 through the second power supply terminal P2 under the control of the first control signal; the touch operation processing
  • the circuit 22 is further configured to provide a second control signal to the control signal output end S0 when the display touch device is in a dormant state and the display touch panel is touched, so that the power supply control circuit 20 is in the Under the control of the second control signal, power is supplied to the power management chip 21 through the first power supply terminal P1.
  • the touch display device described in at least one embodiment of the present disclosure simplifies the power supply scheme, reduces the number of external power supplies (at least one embodiment of the present disclosure only uses the first power supply terminal and the second power supply), and uses the power supply control circuit 20 to When the display touch device is in a dormant state, the second power supply terminal P2 is used to supply power to the power management chip 21 , and the power management chip 21 provides the display touch drive circuit 11 , the touch integrated circuit 12 and the touch operation processing circuit 22 .
  • the working voltage (the display touch driving circuit 11, the touch integrated circuit 12 and the touch operation processing circuit 22 can complete the touch event detection), so that the touch event can be detected even when the display touch device is in a sleep state, Therefore, the touch wake-up in the sleep state can be realized, and at the same time, less external power supply and devices are used, the operation is convenient, and the structure is simple.
  • the display touch driving circuit 11 may be specifically configured to provide touch driving signals to the touch driving electrodes included in the display touch panel, and receive touch sensing feedback feedback from the touch sensing electrodes included in the display panel. signal, and determine whether there is a touch event according to the touch sensing signal.
  • the touch integrated circuit 12 may be specifically configured to provide a first modulation voltage signal and a second modulation voltage signal to the display touch driving circuit 11;
  • the first modulated voltage signal is a voltage signal obtained by superimposing a pulse signal on the basis of the common electrode voltage signal
  • the second modulated voltage signal is a voltage signal obtained by superimposing a pulse signal on the basis of the low voltage signal. This is limited.
  • the first power supply terminal P1 is a power supply terminal that provides a working voltage for the display touch device when the display touch device operates normally.
  • the second power supply terminal may be a USB (Universal Serial Bus, Universal Serial Bus) power supply terminal, but not limited thereto.
  • USB Universal Serial Bus, Universal Serial Bus
  • the first power supply terminal is used to provide a 0V voltage signal when the display touch device is in a dormant state;
  • the display touch device further includes a system terminal;
  • the touch operation processing circuit is configured to provide a wake-up prompt signal to the system end when the display touch device is in a dormant state and the display touch panel is touched;
  • the system end controls the first power supply end to provide a first working voltage when receiving the wake-up prompt signal.
  • the first power supply terminal when the display touch device is in a sleep state, the first power supply terminal does not work, the first power supply terminal provides a 0V voltage signal, and the touch operation processing circuit wakes up the display by touch in the sleep state
  • a wake-up prompt signal is provided to the system end, and the system end responds to the wake-up prompt signal to control the first power supply terminal to normally provide the first working voltage.
  • system end is a board provided by a complete machine factory with a windows operating system.
  • the touch operation processing circuit is further configured to provide a second control signal to the control signal output end when the display touch device is in a normal working state, so that the power supply control circuit is in the second state. Under the control of the control signal, power is supplied to the power management chip through the first power supply terminal.
  • the touch operation processing circuit may provide a second control signal when the display touch device is in a normal working state, and the power supply control circuit manages the power supply through the first power supply terminal under the control of the second control signal. Chip power supply.
  • that the display touch device is in a normal working state means that the display touch device normally performs display and touch control.
  • the power supply control circuit includes a first resistor, a second resistor, a third resistor, a first control circuit, a second control circuit, a third control circuit, and a fourth control circuit, wherein,
  • the control end of the first control circuit is electrically connected to the control signal output end, the first end of the first control circuit is connected to the control end of the second control circuit, the control end of the third control circuit and the The first end of the first resistor is electrically connected, the second end of the first resistor is electrically connected to the second power supply end; the second end of the first control circuit is electrically connected to the first voltage end;
  • a control circuit is used to control the communication between the control end of the second control circuit and the first voltage end when the control signal output end outputs the first control signal, and control the control of the third control circuit
  • the first control circuit is further configured to control the control end of the second control circuit to communicate with the first voltage end when the control signal output end outputs a second control signal. disconnecting between the voltage terminals, and controlling the disconnection between the control terminal of the third control circuit and the first voltage terminal;
  • the first end of the second control circuit is electrically connected to the second power supply end, the second end of the second control circuit is electrically connected to the control end of the fourth control circuit, and the second control circuit
  • the second end of the power supply is electrically connected to the second voltage end through a second resistor, and the second control circuit is used to control the second power supply end and the The control terminals of the fourth control circuit are connected, and the second control circuit is further configured to control the second power supply terminal and the fourth control circuit when the control terminal of the second control circuit is disconnected from the first voltage terminal disconnected between the control terminals;
  • the first end of the third control circuit is electrically connected to the second power supply end, the second end of the third control circuit is electrically connected to the power management chip through a third resistor, and the third control circuit uses When the control terminal is connected with the first voltage terminal, the power management chip is controlled to supply power through the second power supply terminal, and the third control circuit is also used for connecting the control terminal with the first voltage terminal. When the terminals are disconnected, controlling the disconnection between the second power supply terminal and the power management chip;
  • the first end of the fourth control circuit is electrically connected to the first power supply end
  • the second end of the fourth control circuit is electrically connected to the power management chip through the third resistor
  • the fourth control circuit is electrically connected to the power management chip.
  • the circuit is used to control the disconnection between the first power supply terminal and the power management chip when its control terminal is electrically connected to the second power supply terminal
  • the fourth control circuit is also used to connect the control terminal and the power management chip. When the second power supply terminals are disconnected, the control is to supply power to the power management chip through the first power supply terminal.
  • the power supply control circuit may include a first control circuit, a second control circuit, a third control circuit and a fourth control circuit, so that the power supply control circuit 20 can Under the control of the control signal, power is supplied to the power management chip 21 through the second power supply terminal P2, and the power supply control circuit 20 can supply power to the power supply through the first power supply terminal P1 under the control of the second control signal.
  • the management chip 21 supplies power.
  • the first voltage terminal V1 may be a low voltage terminal or a ground terminal
  • the second voltage terminal V2 may be a low voltage terminal or a ground terminal, but not limited thereto.
  • the power supply control circuit includes a first resistor R1, a second resistor R2, a third resistor R3, a first control circuit 31, a second control circuit 32, a third control circuit 33 and a fourth control circuit 34, wherein,
  • the control terminal of the first control circuit 31 is electrically connected to the control signal output terminal S0, the first terminal of the first control circuit 31 is electrically connected to the control terminal of the second control circuit 32 and the third control circuit
  • the control terminal of 33 is electrically connected to the first terminal of the first resistor R1, the second terminal of the first resistor R1 is electrically connected to the second power supply terminal P2; the second terminal of the first control circuit 31 is electrically connected to the second power supply terminal P2.
  • a voltage terminal V1 is electrically connected;
  • the first control circuit 31 is configured to control the control terminal of the second control circuit 32 and the first voltage terminal V1 when the control signal output terminal S0 outputs a first control signal and control the connection between the control terminal of the third control circuit 33 and the first voltage terminal V1;
  • the first control circuit 31 is also used to output a second control signal at the control signal output terminal S0 When the signal is received, the control terminal of the second control circuit 32 is controlled to be disconnected from the first voltage terminal V1, and the control terminal of the third control circuit 33 is controlled to be disconnected from the first voltage terminal V1;
  • the first end of the second control circuit 32 is electrically connected to the second power supply end P2, the second end of the second control circuit 32 is electrically connected to the control end of the fourth control circuit 34, and the The second terminal of the second control circuit 32 is electrically connected to the second voltage terminal V2 through the second resistor R2, and the second control circuit 32 is configured to control the
  • the second power supply terminal P2 is connected to the control terminal of the fourth control circuit 34, and the second control circuit 32 is also used to control the voltage when the control terminal is disconnected from the first voltage terminal V1.
  • the second power supply terminal P2 is disconnected from the control terminal of the fourth control circuit 34;
  • the first end of the third control circuit 33 is electrically connected to the second power supply end P2, the second end of the third control circuit 33 is electrically connected to the power management chip 21 through a third resistor R3, the The third control circuit 33 is used to control the supply of power to the power management chip 21 through the second power supply terminal P2 when the control terminal is connected to the first voltage terminal V1, and the third control circuit 33 is also used for When the control terminal is disconnected from the first voltage terminal V1, the second power supply terminal P2 is controlled to be disconnected from the power management chip 21;
  • the first end of the fourth control circuit 34 is electrically connected to the first power supply end P1, the second end of the fourth control circuit 34 is electrically connected to the power management chip 21 through the third resistor R3,
  • the fourth control circuit 34 is used to control the disconnection between the first power supply terminal P1 and the power management chip 21 when its control terminal is electrically connected to the second power supply terminal P2, and the fourth control circuit 34 is also used for controlling the power supply to the power management chip 21 through the first power supply terminal P1 when the control terminal is disconnected from the second power supply terminal P2.
  • the first control circuit 31 controls the second control circuit 32 when the control signal output terminal S0 outputs the first control signal.
  • the control terminal of the circuit 33 communicates with the first voltage terminal V1, and controls the communication between the control terminal of the third control circuit 33 and the first voltage terminal V1; the second control circuit 32 controls the first voltage terminal V1.
  • the second power supply terminal P2 communicates with the control terminal of the fourth control circuit 34, and the fourth control circuit 34 controls the disconnection between the first power supply terminal P1 and the power management chip 21; the third control circuit 34 controls the disconnection between the first power supply terminal P1 and the power management chip 21;
  • the circuit 33 controls to supply power to the power management chip 21 through the second power supply terminal P2;
  • the first control circuit 31 controls the disconnection between the control terminal of the second control circuit 32 and the first voltage terminal V1, and controls the first voltage terminal V1.
  • the control terminal of the three control circuits 33 is disconnected from the first voltage terminal V1; the second control circuit 32 controls the disconnection between the second power supply terminal P2 and the control terminal of the fourth control circuit 34;
  • the third control circuit 33 controls the disconnection between the second power supply terminal P2 and the power management chip 21;
  • the fourth control circuit 34 controls the power supply to the power management chip 21 through the first power supply terminal P1.
  • a control diode may be further provided between P1 and the fourth control circuit 34 , the anode of the control diode is electrically connected to P1 , and the cathode of the control diode is connected to the fourth control circuit 34 .
  • the circuit 34 is electrically connected, but not limited thereto.
  • the first control circuit includes a first control transistor and a first control resistor
  • the control end of the first control transistor is electrically connected to the control signal output end, and the first pole of the first control transistor is respectively connected to the control end of the second control circuit and the control end of the third control circuit is electrically connected to the first terminal of the first resistor; the second pole of the first control transistor is electrically connected to the first voltage terminal.
  • the first control transistor may be an NPN transistor, but not limited thereto.
  • the second control circuit includes a second control transistor
  • the control electrode of the second control transistor is electrically connected to the first end of the first control circuit, the first electrode of the second control transistor is electrically connected to the second power supply end, and the second control transistor is electrically connected to the first end of the first control circuit.
  • the second electrode is electrically connected to the control terminal of the fourth control circuit, and the second electrode of the second control transistor is electrically connected to the second voltage terminal through a second resistor.
  • the second control transistor may be a PNP transistor, but not limited thereto.
  • the third control circuit includes a third control transistor
  • the control electrode of the third control transistor is electrically connected to the first end of the first control circuit, the first electrode of the third control transistor is electrically connected to the second power supply end, and the third control transistor is electrically connected to the first end of the first control circuit.
  • the second pole is electrically connected to the power management chip through the third resistor.
  • the third control transistor may be a PMOS transistor (P-type metal-oxide-semiconductor transistor), but not limited thereto.
  • the fourth control circuit includes a fourth control transistor and a fifth control transistor, wherein,
  • the control electrode of the fourth control transistor and the control electrode of the fifth control transistor are electrically connected to the second end of the second control circuit, and the first electrode of the fourth control transistor is connected to the first power supply end Electrically connected, the second pole of the fourth control transistor is electrically connected to the first pole of the fifth control transistor, and the second pole of the fifth control transistor is electrically connected to the power management chip through the third resistor connect.
  • the fourth control transistor and the fifth control transistor may be PMOS transistors (P-type metal-oxide-semiconductor transistors), but not limited thereto.
  • the display touch device described in at least one embodiment of the present disclosure further includes a timing controller
  • the touch operation processing circuit and the timing controller are integrated on one chip.
  • the touch operation processing circuit and the timing controller may be integrated on the same chip, so as to reduce the number of chips used in the display touch device.
  • the first control circuit 31 includes a first control transistor N1 and a first control resistor R0;
  • the base of the first control transistor N1 is electrically connected to the control signal output terminal S0, and the collector of the first control transistor N1 is respectively connected to the control terminal of the second control circuit and the control terminal of the third control circuit.
  • the control terminal is electrically connected to the first terminal of the first resistor R1; the emitter of the first control transistor N1 is electrically connected to the ground terminal GND;
  • the second control circuit 32 includes a second control transistor P21;
  • the base of the second control transistor P21 is electrically connected to the collector of N1, the emitter of P21 is electrically connected to the second power supply terminal P2, the collector of P21 is electrically connected to the control terminal of the fourth control circuit, And the collector of P21 is electrically connected to the ground terminal GND through the second resistor R2;
  • the third control circuit 33 includes a third control transistor P31;
  • the gate of the third control transistor P31 is electrically connected to the collector of N1, the source of P31 is electrically connected to the second power supply terminal P2, and the drain of P31 is electrically connected to the power management chip through the third resistor R3 21 electrical connection;
  • the fourth control circuit 34 includes a fourth control transistor P32 and a fifth control transistor P33, wherein,
  • the gate of the fourth control transistor P32 and the gate of the fifth control transistor P33 are electrically connected to the collector of P21, the drain of P32 is electrically connected to the first power supply terminal P1, and the source of P32 is electrically connected to P33 The source of P33 is electrically connected, and the drain of P33 is electrically connected to the power management chip 21 through the third resistor R3.
  • N1 is an NPN transistor
  • P21 is a PNP transistor
  • P31 , P32 and P33 are all PMOS transistors, but not limited thereto.
  • the gate of P31 is electrically connected to the drain of P31 through the first resistor R1 to form a diode connection; More thoroughly, to avoid leakage or leakage.
  • a control diode may be further provided between P1 and the fourth control circuit 34 , the anode of the control diode is electrically connected to P1 , and the cathode of the control diode is electrically connected to the drain of P32 connection, but not limited thereto.
  • the touch operation processing circuit 22 When the display touch device is in a sleep state, the touch operation processing circuit 22 provides a high voltage signal to S0, N1 is turned on, the base of P21 is electrically connected to the ground GND, P21 is turned on, and the gate of P32 and the gate of P33 are connected For the second working voltage provided by the second power supply terminal P2, P32 and P33 are turned off, P31 is turned on, and P2 supplies power to the power management chip 21 through P31 and R3; the power management chip 21 is the touch operation processing circuit 22, the The display touch driving circuit 11 and the touch integrated circuit 12 provide working voltages, so that the display touch device can detect touch events;
  • the touch operation processing circuit 22 When the touch display device is touched in the sleep state, the touch operation processing circuit 22 provides a low voltage signal to S0, N1 is turned off, the base of P21 and the gate of P31 are electrically connected to P2 through resistors, and P2 provides a positive voltage Voltage signal (for example, P2 can provide a 3.3V voltage signal), both P21 and P31 are turned off to cut off the connection between P2 and the power management chip 21, the gate of P32 and the gate of P33 are connected to the ground terminal GND through R2. Connected, both P32 and P33 are turned on, and P1 supplies power to the power management chip 21.
  • P2 can provide a 3.3V voltage signal
  • the display touch device performs normal display touch (that is, the display touch device is in a normal working state), the touch operation processing circuit 22 provides a low voltage signal to S0, and both P1 and P2 can provide 3.3V Voltage signal, P1 is used as the power supply to supply power to the power management chip 21, and P1 is used as the core power supply;
  • the display touch device In the sleep phase S2, the display touch device is in a sleep state, the touch operation processing circuit 22 provides a high voltage signal to S0, the voltage signal provided by P1 is a low potential, P2 continues to work, and P2 is used as the working power supply and power management chip during sleep. 21 supplies power, and the power management chip 21 provides operating voltages for the touch operation processing circuit 22, the display touch drive circuit 11 and the touch integrated circuit 12, so that when the display touch device is in a dormant state, normal operation can be performed. Touch detection.
  • the basic logic voltage AVDD is provided by the power management chip 21;
  • the power management chip 21 provides a working voltage to the touch operation processing circuit 22 (the working voltage can be selected according to the actual situation, for example, the working voltage can be 1.2V or 0.9V, but not limited thereto); and, The power management chip 21 supplies power to the auxiliary circuits in the chip 50;
  • the power management chip 21 provides the display touch driving circuit 11 with a 1.2V voltage signal, a 1.5V voltage signal or a 1.8V voltage signal, but not limited thereto;
  • the power management chip 21 provides the touch integrated circuit 12 with a 2.5V voltage signal, a 3.3V voltage signal or a 1.8V voltage signal, but not limited thereto.
  • the display touch device further includes a timing controller 40 ;
  • the timing controller 40 and the touch operation processing circuit 22 are integrated on the same chip 50 to reduce the number of chips used by the display touch device;
  • P1 is electrically connected to the anode of the control diode D0
  • the cathode of the control diode D0 is electrically connected to the timing controller 40 in the chip 50
  • the cathode of the control diode D0 is also electrically connected to the drain of P32
  • P1 is shown in the display When the touch device displays touch normally, power is supplied to the timing controller 40;
  • the timing controller 40 provides the touch operation processing circuit 22 with the touch synchronization signal St and the display synchronization signal Sd.
  • the capacitor C0 is the capacitor
  • the R04 is the second control resistor
  • the gamma circuit 51 is the gamma circuit
  • the power management chip 21 supplies power to the gamma circuit 51 .
  • control diode D0 is used to realize reverse cutoff to avoid reverse current burning caused by the 0V voltage signal provided by P1 when the display touch device is in a sleep state.
  • the display touch drive circuit 11 , the touch integrated circuit 12 and the touch operation processing circuit 22 are electrically connected to each other.
  • At least one embodiment of the present disclosure further provides a power supply control method, which is applied to the above-mentioned display touch device, and the power supply control method includes:
  • the power management chip provides the operating voltage for the touch operation processing circuit, the display touch drive circuit and the touch integrated circuit;
  • the touch operation processing circuit When the display touch device is in a dormant state, the touch operation processing circuit provides a first control signal to the control signal output terminal, so that the power supply control circuit can manage the power supply through the second power supply terminal under the control of the first control signal. chip power supply;
  • the touch operation processing circuit When the display touch device is in a sleep state and the display touch panel is touched, the touch operation processing circuit provides a second control signal to the control signal output end, so that the power supply control circuit is in the first Under the control of two control signals, the power management chip is powered through the first power supply terminal.
  • the power supply control method described in at least one embodiment of the present disclosure uses a power supply control circuit to control the second power supply terminal to supply power to a power management chip when the display touch device is in a sleep state, where the power management chip is a display touch drive circuit,
  • the touch integrated circuit and the touch operation processing circuit provide a working voltage, so that the touch event can be detected even when the display touch device is in a sleep state, so that touch wake-up from the sleep state can be realized.
  • the power supply control method described in at least one embodiment of the present disclosure may further include:
  • the touch operation processing circuit When the display touch device is in a normal working state, the touch operation processing circuit provides a second control signal to the control signal output terminal, so that the power supply control circuit, under the control of the second control signal, passes The first power supply terminal supplies power to the power management chip.
  • the display touch device may further include a system terminal, and the power supply control method may further include:
  • the first power supply terminal When the display touch device is in a dormant state, the first power supply terminal provides a 0V voltage signal
  • the touch operation processing circuit detects that a wake-up prompt signal is provided to the system end;
  • the system end controls the first power supply end to provide a first working voltage when receiving the wake-up prompt signal.
  • the first power supply terminal when the display touch device is in a sleep state, the first power supply terminal does not work, the first power supply terminal provides a 0V voltage signal, and the touch operation processing circuit wakes up the display by touch in the sleep state
  • a wake-up prompt signal is provided to the system end, and the system end responds to the wake-up prompt signal to control the first power supply terminal to normally provide the first working voltage.
  • the display device provided by at least one embodiment of the present disclosure can be any product or component with display and touch functions, such as a mobile phone, a tablet computer, a TV, a monitor, a notebook computer, a digital photo frame, and a navigator.

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Abstract

一种显示触摸装置和供电控制方法。显示触摸装置包括供电模组；供电模组包括供电控制电路（20）；电源管理芯片（21）为触摸运算处理电路（22）、显示触控驱动电路（11）和触摸集成电路（12）提供工作电压；触摸运算处理电路（22）在显示触摸装置处于休眠状态时，向控制信号输出端（S0）提供第一控制信号，以使得供电控制电路（20）在第一控制信号的控制下，通过第二供电端（P2）为电源管理芯片（21）供电；触摸运算处理电路（22）还用于在显示触摸装置处于休眠状态，并显示触摸面板被触摸时，向控制信号输出端（S0）提供第二控制信号，以使得供电控制电路（20）在第二控制信号的控制下，通过第一供电端（P1）为电源管理芯片（21）供电。能够实现休眠状态触摸唤醒，并同时采用的外供电源和器件少，操作方便，结构简单。

Description

显示触摸装置和供电控制方法
相关申请的交叉引用
本申请主张在2020年10月22日在中国提交的中国专利申请号No.202011138409.1的优先权，其全部内容通过引用包含于此。
技术领域
本公开涉及显示触控技术领域，尤其涉及一种显示触摸装置和供电控制方法。
背景技术
在相关技术中，大尺寸显示触摸装置的睡眠唤醒仅仅为移动鼠标、键盘、触摸遥控器或唤醒开关等方案，还没有实现触摸唤醒。在大尺寸的显示触摸装置中，有很多独立的芯片，例如电源管理芯片、时序控制器芯片、触摸电源芯片、触摸计算芯片、显示屏驱动芯片等都没有集成为一整颗芯片，所以在进行触摸唤醒的逻辑功能设计上会有较大难度。由于不同工作电压的种类繁多，且各个电路分离工作，互相影响，为了实现休眠状态下进行触控监控功能，需要加入很多外围电源芯片，由晶体管单独控制，结构复杂，增加了成本，以及设计和使用风险。
并且，对于大尺寸显示触摸装置，基于现有的eDP(增强设备)协议，在休眠断电后提供系统工作电压，所以无法检测触摸事件，无法实现休眠后触摸唤醒功能。
发明内容
在一个方面中，本公开实施例提供了一种显示触摸装置，包括显示触摸面板、显示触控驱动电路、触摸集成电路、电源管理芯片和触摸运算处理电路，所述显示触摸装置还包括供电模组；所述供电模组包括第一供电端、第二供电端和供电控制电路；
所述电源管理芯片为所述触摸运算处理电路、所述显示触控驱动电路和 所述触摸集成电路提供工作电压；
所述供电控制电路的控制端与所述触摸运算处理电路的控制信号输出端电连接；
所述触摸运算处理电路用于在所述显示触摸装置处于休眠状态时，向所述控制信号输出端提供第一控制信号，以使得所述供电控制电路在所述第一控制信号的控制下，通过第二供电端为所述电源管理芯片供电；所述触摸运算处理电路还用于在所述显示触摸装置处于休眠状态，并所述显示触摸面板被触摸时，向所述控制信号输出端提供第二控制信号，以使得所述供电控制电路在所述第二控制信号的控制下，通过第一供电端为所述电源管理芯片供电。
可选的，所述第一供电端用于当所述显示触摸装置处于休眠状态时，提供0V电压信号；所述显示触摸装置还包括系统端；
所述触摸运算处理电路用于在所述显示触摸装置处于休眠状态，并所述显示触摸面板被触摸时，向所述系统端提供唤醒提示信号；
所述系统端在接收到所述唤醒提示信号时，控制所述第一供电端提供第一工作电压。
可选的，所述触摸运算处理电路还用于在所述显示触摸装置处于正常工作状态时，向所述控制信号输出端提供第二控制信号，以使得所述供电控制电路在所述第二控制信号的控制下，通过第一供电端为所述电源管理芯片供电。
可选的，所述供电控制电路包括第一电阻、第二电阻、第三电阻、第一控制电路、第二控制电路、第三控制电路和第四控制电路，其中，
所述第一控制电路的控制端与所述控制信号输出端电连接，所述第一控制电路的第一端与所述第二控制电路的控制端、所述第三控制电路的控制端和第一电阻的第一端电连接，所述第一电阻的第二端与所述第二供电端电连接；所述第一控制电路的第二端与第一电压端电连接；所述第一控制电路用于在所述控制信号输出端输出第一控制信号时，控制所述第二控制电路的控制端与所述第一电压端之间连通，并控制所述第三控制电路的控制端与所述第一电压端之间连通；所述第一控制电路还用于在所述控制信号输出端输出 第二控制信号时，控制所述第二控制电路的控制端与所述第一电压端之间断开，并控制所述第三控制电路的控制端与所述第一电压端之间断开；
所述第二控制电路的第一端与所述第二供电端电连接，所述第二控制电路的第二端与所述第四控制电路的控制端电连接，并所述第二控制电路的第二端通过第二电阻与第二电压端电连接，所述第二控制电路用于在其控制端与所述第一电压端之间连通时，控制所述第二供电端与所述第四控制电路的控制端之间连通，所述第二控制电路还用于在其控制端与所述第一电压端之间断开时，控制所述第二供电端与所述第四控制电路的控制端之间断开；
所述第三控制电路的第一端与所述第二供电端电连接，所述第三控制电路的第二端通过第三电阻与所述电源管理芯片电连接，所述第三控制电路用于在其控制端与所述第一电压端之间连通时，控制通过所述第二供电端为电源管理芯片供电，所述第三控制电路还用于在其控制端与所述第一电压端之间断开时，控制所述第二供电端与所述电源管理芯片之间断开；
所述第四控制电路的第一端与所述第一供电端电连接，所述第四控制电路的第二端通过所述第三电阻与所述电源管理芯片电连接，所述第四控制电路用于在其控制端与所述第二供电端电连接时，控制所述第一供电端与所述电源管理芯片之间断开，所述第四控制电路还用于在其控制端与所述第二供电端之间断开时，控制通过所述第一供电端为所述电源管理芯片供电。
可选的，所述第一控制电路包括第一控制晶体管和第一控制电阻；
所述第一控制晶体管的控制端与所述控制信号输出端电连接，所述第一控制晶体管的第一极分别与所述第二控制电路的控制端、所述第三控制电路的控制端和第一电阻的第一端电连接；所述第一控制晶体管的第二极与所述第一电压端电连接。
可选的，所述第二控制电路包括第二控制晶体管；
所述第二控制晶体管的控制极与所述第一控制电路的第一端电连接，所述第二控制晶体管的第一极与所述第二供电端电连接，所述第二控制晶体管的第二极与所述第四控制电路的控制端电连接，并所述第二控制晶体管的第二极通过第二电阻与第二电压端电连接。
可选的，所述第三控制电路包括第三控制晶体管；
所述第三控制晶体管的控制极与所述第一控制电路的第一端电连接，所述第三控制晶体管的第一极与所述第二供电端电连接，所述第三控制晶体管的第二极通过所述第三电阻与所述电源管理芯片电连接。
可选的，所述第四控制电路包括第四控制晶体管和第五控制晶体管，其中，
所述第四控制晶体管的控制极和所述第五控制晶体管的控制极与所述第二控制电路的第二端电连接，所述第四控制晶体管的第一极与所述第一供电端电连接，所述第四控制晶体管的第二极与所述第五控制晶体管的第一极电连接，所述第五控制晶体管的第二极通过所述第三电阻与所述电源管理芯片电连接。
可选的，本公开至少一实施例所述的显示触摸装置还包括时序控制器；
所述触摸运算处理电路和所述时序控制器集成于一个芯片上。
在第二个方面中，本公开实施例还提供了一种供电控制方法，应用于上述的显示触摸装置，所述供电控制方法包括：
电源管理芯片为触摸运算处理电路、显示触控驱动电路和触摸集成电路提供工作电压；
在所述显示触摸装置处于休眠状态时，触摸运算处理电路向控制信号输出端提供第一控制信号，以使得供电控制电路在所述第一控制信号的控制下，通过第二供电端为电源管理芯片供电；
在所述显示触摸装置处于休眠状态，并所述显示触摸面板被触摸时，所述触摸运算处理电路向所述控制信号输出端提供第二控制信号，以使得所述供电控制电路在所述第二控制信号的控制下，通过第一供电端为所述电源管理芯片供电。
可选的，所述显示触摸装置还包括系统端，所述供电控制方法还包括：
当所述显示触摸装置处于休眠状态时，所述第一供电端提供0V电压信号；
在所述显示触摸装置处于休眠状态，并所述显示触摸面板被触摸时，所述触摸运算处理电路检测向所述系统端提供唤醒提示信号；
所述系统端在接收到所述唤醒提示信号时，控制所述第一供电端提供第 一工作电压。
可选的，本公开至少一实施例所述的供电控制方法还包括：
在所述显示触摸装置处于正常工作状态时，所述触摸运算处理电路向所述控制信号输出端提供第二控制信号，以使得所述供电控制电路在所述第二控制信号的控制下，通过第一供电端为所述电源管理芯片供电。
附图说明
图1是本公开至少一实施例所述的显示触摸装置的结构图；
图2是本公开至少一实施例所述的显示触摸装置的结构图；
图3是本公开至少一实施例所述的显示触摸装置的结构图；
图4是本公开如图3所示的显示触摸装置的至少一实施例的工作时序图；
图5是本公开至少一实施例所述的显示触摸装置的电路图。
具体实施方式
下面将结合本公开实施例中的附图，对本公开实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本公开一部分实施例，而不是全部的实施例。基于本公开中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本公开保护的范围。
本公开所有实施例中采用的晶体管均可以为三极管、薄膜晶体管或场效应管或其他特性相同的器件。在本公开实施例中，为区分晶体管除控制极之外的两极，将其中一极称为第一极，另一极称为第二极。
在实际操作时，当所述晶体管为三极管时，所述控制极可以为基极，所述第一极可以为集电极，所述第二极可以发射极；或者，所述控制极可以为基极，所述第一极可以为发射极，所述第二极可以集电极。
在实际操作时，当所述晶体管为薄膜晶体管或场效应管时，所述控制极可以为栅极，所述第一极可以为漏极，所述第二极可以为源极；或者，所述控制极可以为栅极，所述第一极可以为源极，所述第二极可以为漏极。
如图1所示，本公开至少一实施例所述的显示触摸装置，包括显示触摸面板、显示触控驱动电路11、触摸集成电路12、电源管理芯片21和触摸运 算处理电路22，所述显示触摸装置还包括供电模组；所述供电模组包括第一供电端P1、第二供电端P2和供电控制电路20；
所述电源管理芯片21为所述触摸运算处理电路22、所述显示触控驱动电路11和所述触摸集成电路12提供工作电压；
所述供电控制电路20的控制端与所述触摸运算处理电路22的控制信号输出端S0电连接；
所述触摸运算处理电路22分别与第一供电端P1、第二供电端P2、控制信号输出端S0和所述电源管理芯片21电连接，用于在所述显示触摸装置处于休眠状态时，向控制信号输出端S0提供第一控制信号，以使得所述供电控制电路20在所述第一控制信号的控制下，通过第二供电端P2为所述电源管理芯片21供电；所述触摸运算处理电路22还用于在所述显示触摸装置处于休眠状态，并所述显示触摸面板被触摸时，向所述控制信号输出端S0提供第二控制信号，以使得所述供电控制电路20在所述第二控制信号的控制下，通过第一供电端P1为所述电源管理芯片21供电。
本公开至少一实施例所述的显示触摸装置对电源方案进行简化，减少外供电源的数量(本公开至少一实施例仅采用第一供电端和第二供电)，并利用供电控制电路20来控制在显示触摸装置处于休眠状态时，通过第二供电端P2为电源管理芯片21供电，所述电源管理芯片21为显示触控驱动电路11、触摸集成电路12和所述触摸运算处理电路22提供工作电压(所述显示触控驱动电路11、所述触摸集成电路12和所述触摸运算处理电路22能完成触摸事件检测)，从而使得在显示触摸装置处于休眠状态时也能够进行检测触摸事件，从而能够实现休眠状态触摸唤醒，并同时采用的外供电源和器件少，操作方便，结构简单。
在具体实施时，所述显示触控驱动电路11可以具体用于向所述显示触摸面板包括的触控驱动电极提供触控驱动信号，并接收显示面板包括的触控感应电极反馈的触控感应信号，根据所述触控感应信号判断是否存在触摸事件。
所述触摸集成电路12可以具体用于向所述显示触控驱动电路11提供第一调制电压信号和第二调制电压信号；
其中，第一调制电压信号是在公共电极电压信号的基础上叠加脉冲信号 后得到的电压信号，第二调制电压信号是在低电压信号的基础上叠加脉冲信号后得到的电压信号，但不以此为限。
在本公开至少一实施例中，所述第一供电端P1为显示触摸装置正常工作时，为显示触摸装置提供工作电压的电源端。
可选的，所述第二供电端可以为USB(Universal Serial Bus，通用串行总线)供电端，但不以此为限。
在具体实施时，所述第一供电端用于当所述显示触摸装置处于休眠状态时，提供0V电压信号；所述显示触摸装置还包括系统端；
所述触摸运算处理电路用于在所述显示触摸装置处于休眠状态，并所述显示触摸面板被触摸时，向所述系统端提供唤醒提示信号；
所述系统端在接收到所述唤醒提示信号时，控制所述第一供电端提供第一工作电压。
在本公开至少一实施例中，在显示触摸装置处于休眠状态时，第一供电端不工作，所述第一供电端提供0V电压信号，由触摸运算处理电路在休眠状态下触摸唤醒所述显示触摸装置时，向系统端提供唤醒提示信号，所述系统端响应所述唤醒提示信号，以控制第一供电端正常提供第一工作电压。
在本公开至少一实施例中，系统端是整机厂提供的带windows操作系统的板卡。
可选的，所述触摸运算处理电路还用于在所述显示触摸装置处于正常工作状态时，向所述控制信号输出端提供第二控制信号，以使得所述供电控制电路在所述第二控制信号的控制下，通过第一供电端为所述电源管理芯片供电。
在具体实施时，所述触摸运算处理电路可以在显示触摸装置处于正常工作状态时，提供第二控制信号，所述供电控制电路在第二控制信号的控制下，通过第一供电端为电源管理芯片供电。
在本公开至少一实施例中，所述显示触摸装置处于正常工作状态指的是：所述显示触摸装置正常进行显示和触控。
在本公开至少一实施例中，所述供电控制电路包括第一电阻、第二电阻、第三电阻、第一控制电路、第二控制电路、第三控制电路和第四控制电路， 其中，
所述第一控制电路的控制端与所述控制信号输出端电连接，所述第一控制电路的第一端与所述第二控制电路的控制端、所述第三控制电路的控制端和第一电阻的第一端电连接，所述第一电阻的第二端与所述第二供电端电连接；所述第一控制电路的第二端与第一电压端电连接；所述第一控制电路用于在所述控制信号输出端输出第一控制信号时，控制所述第二控制电路的控制端与所述第一电压端之间连通，并控制所述第三控制电路的控制端与所述第一电压端之间连通；所述第一控制电路还用于在所述控制信号输出端输出第二控制信号时，控制所述第二控制电路的控制端与所述第一电压端之间断开，并控制所述第三控制电路的控制端与所述第一电压端之间断开；
所述第二控制电路的第一端与所述第二供电端电连接，所述第二控制电路的第二端与所述第四控制电路的控制端电连接，并所述第二控制电路的第二端通过第二电阻与第二电压端电连接，所述第二控制电路用于在其控制端与所述第一电压端之间连通时，控制所述第二供电端与所述第四控制电路的控制端之间连通，所述第二控制电路还用于在其控制端与所述第一电压端之间断开时，控制所述第二供电端与所述第四控制电路的控制端之间断开；
所述第三控制电路的第一端与所述第二供电端电连接，所述第三控制电路的第二端通过第三电阻与所述电源管理芯片电连接，所述第三控制电路用于在其控制端与所述第一电压端之间连通时，控制通过所述第二供电端为电源管理芯片供电，所述第三控制电路还用于在其控制端与所述第一电压端之间断开时，控制所述第二供电端与所述电源管理芯片之间断开；
所述第四控制电路的第一端与所述第一供电端电连接，所述第四控制电路的第二端通过所述第三电阻与所述电源管理芯片电连接，所述第四控制电路用于在其控制端与所述第二供电端电连接时，控制所述第一供电端与所述电源管理芯片之间断开，所述第四控制电路还用于在其控制端与所述第二供电端之间断开时，控制通过所述第一供电端为所述电源管理芯片供电。
在本公开至少一实施例中，所述供电控制电路可以包括第一控制电路、第二控制电路、第三控制电路和第四控制电路，以使得所述供电控制电路20能够在所述第一控制信号的控制下，通过第二供电端P2为所述电源管理芯片 21供电，并所述供电控制电路20能够在所述第二控制信号的控制下，通过第一供电端P1为所述电源管理芯片21供电。
在本公开至少一实施例中，所述第一电压端V1可以为低电压端或地端，所述第二电压端V2可以为低电压端或地端，但不以此为限。
如图2所示，在图1所示的显示触摸装置的至少一实施例的基础上，
所述供电控制电路包括第一电阻R1、第二电阻R2、第三电阻R3、第一控制电路31、第二控制电路32、第三控制电路33和第四控制电路34，其中，
所述第一控制电路31的控制端与所述控制信号输出端S0电连接，所述第一控制电路31的第一端与所述第二控制电路32的控制端、所述第三控制电路33的控制端和第一电阻R1的第一端电连接，所述第一电阻R1的第二端与所述第二供电端P2电连接；所述第一控制电路31的第二端与第一电压端V1电连接；所述第一控制电路31用于在所述控制信号输出端S0输出第一控制信号时，控制所述第二控制电路32的控制端与所述第一电压端V1之间连通，并控制所述第三控制电路33的控制端与所述第一电压端V1之间连通；所述第一控制电路31还用于在所述控制信号输出端S0输出第二控制信号时，控制所述第二控制电路32的控制端与所述第一电压端V1之间断开，并控制所述第三控制电路33的控制端与所述第一电压端V1之间断开；
所述第二控制电路32的第一端与所述第二供电端P2电连接，所述第二控制电路32的第二端与所述第四控制电路34的控制端电连接，并所述第二控制电路32的第二端通过第二电阻R2与第二电压端V2电连接，所述第二控制电路32用于在其控制端与所述第一电压端V1之间连通时，控制所述第二供电端P2与所述第四控制电路34的控制端之间连通，所述第二控制电路32还用于在其控制端与所述第一电压端V1之间断开时，控制所述第二供电端P2与所述第四控制电路34的控制端之间断开；
所述第三控制电路33的第一端与所述第二供电端P2电连接，所述第三控制电路33的第二端通过第三电阻R3与所述电源管理芯片21电连接，所述第三控制电路33用于在其控制端与所述第一电压端V1之间连通时，控制通过所述第二供电端P2为电源管理芯片21供电，所述第三控制电路33还用于在其控制端与所述第一电压端V1之间断开时，控制所述第二供电端P2与所 述电源管理芯片21之间断开；
所述第四控制电路34的第一端与所述第一供电端P1电连接，所述第四控制电路34的第二端通过所述第三电阻R3与所述电源管理芯片21电连接，所述第四控制电路34用于在其控制端与所述第二供电端P2电连接时，控制所述第一供电端P1与所述电源管理芯片21之间断开，所述第四控制电路34还用于在其控制端与所述第二供电端P2之间断开时，控制通过所述第一供电端P1为所述电源管理芯片21供电。
本公开如图2所示的显示触摸装置的至少一实施例在工作时，所述第一控制电路31在所述控制信号输出端S0输出第一控制信号时，控制所述第二控制电路32的控制端与所述第一电压端V1之间连通，并控制所述第三控制电路33的控制端与所述第一电压端V1之间连通；所述第二控制电路32控制所述第二供电端P2与所述第四控制电路34的控制端之间连通，所述第四控制电路34控制所述第一供电端P1与所述电源管理芯片21之间断开；所述第三控制电路33控制通过所述第二供电端P2为电源管理芯片21供电；
所述第一控制电路31在所述控制信号输出端S0输出第二控制信号时，控制所述第二控制电路32的控制端与所述第一电压端V1之间断开，并控制所述第三控制电路33的控制端与所述第一电压端V1之间断开；所述第二控制电路32控制所述第二供电端P2与所述第四控制电路34的控制端之间断开；所述第三控制电路33控制所述第二供电端P2与所述电源管理芯片21之间断开；所述第四控制电路34控制通过所述第一供电端P1为所述电源管理芯片21供电。
在图2所示的至少一实施例中，在P1与所述第四控制电路34之间还可以设置有控制二极管，控制二极管的阳极与P1电连接，控制二极管的阴极与所述第四控制电路34电连接，但不以此为限。
可选的，所述第一控制电路包括第一控制晶体管和第一控制电阻；
所述第一控制晶体管的控制端与所述控制信号输出端电连接，所述第一控制晶体管的第一极分别与所述第二控制电路的控制端、所述第三控制电路的控制端和第一电阻的第一端电连接；所述第一控制晶体管的第二极与所述第一电压端电连接。
在具体实施时，所述第一控制晶体管可以为NPN型三极管，但不以此为限。
可选的，所述第二控制电路包括第二控制晶体管；
所述第二控制晶体管的控制极与所述第一控制电路的第一端电连接，所述第二控制晶体管的第一极与所述第二供电端电连接，所述第二控制晶体管的第二极与所述第四控制电路的控制端电连接，并所述第二控制晶体管的第二极通过第二电阻与第二电压端电连接。
在具体实施时，所述第二控制晶体管可以为PNP型三极管，但不以此为限。
可选的，所述第三控制电路包括第三控制晶体管；
所述第三控制晶体管的控制极与所述第一控制电路的第一端电连接，所述第三控制晶体管的第一极与所述第二供电端电连接，所述第三控制晶体管的第二极通过所述第三电阻与所述电源管理芯片电连接。
在具体实施时，所述第三控制晶体管可以为PMOS管(P型金属-氧化物-半导体晶体管)，但不以此为限。
可选的，所述第四控制电路包括第四控制晶体管和第五控制晶体管，其中，
所述第四控制晶体管的控制极和所述第五控制晶体管的控制极与所述第二控制电路的第二端电连接，所述第四控制晶体管的第一极与所述第一供电端电连接，所述第四控制晶体管的第二极与所述第五控制晶体管的第一极电连接，所述第五控制晶体管的第二极通过所述第三电阻与所述电源管理芯片电连接。
在具体实施时，所述第四控制晶体管和所述第五控制晶体管可以为PMOS管(P型金属-氧化物-半导体晶体管)，但不以此为限。
在具体实施时，本公开至少一实施例所述的显示触摸装置还包括时序控制器；
所述触摸运算处理电路和所述时序控制器集成于一个芯片上。
在本公开至少一实施例中，所述触摸运算处理电路和所述时序控制器可以集成于同一芯片上，以减少显示触摸装置采用的芯片的个数。
如图3所示，在图2所示的显示触摸装置的至少一实施例的基础上，
所述第一控制电路31包括第一控制晶体管N1和第一控制电阻R0；
所述第一控制晶体管N1的基极与所述控制信号输出端S0电连接，所述第一控制晶体管N1的集电极分别与所述第二控制电路的控制端、所述第三控制电路的控制端和第一电阻R1的第一端电连接；所述第一控制晶体管N1的发射极与地端GND电连接；
所述第二控制电路32包括第二控制晶体管P21；
所述第二控制晶体管P21的基极与N1的集电极电连接，P21的发射极与所述第二供电端P2电连接，P21的集电极与所述第四控制电路的控制端电连接，并P21的集电极通过第二电阻R2与地端GND电连接；
所述第三控制电路33包括第三控制晶体管P31；
所述第三控制晶体管P31的栅极与N1的集电极电连接，P31的源极与所述第二供电端P2电连接，P31的漏极通过所述第三电阻R3与所述电源管理芯片21电连接；
所述第四控制电路34包括第四控制晶体管P32和第五控制晶体管P33，其中，
所述第四控制晶体管P32的栅极和所述第五控制晶体管P33的栅极与P21的集电极电连接，P32的漏极与所述第一供电端P1电连接，P32的源极与P33的源极电连接，P33的漏极通过所述第三电阻R3与所述电源管理芯片21电连接。
在图3所示的至少一实施例中，N1为NPN型三极管，P21为PNP型三极管，P31、P32和P33都为PMOS管，但不以此为限。
在图3所示的至少一实施例中，P31的栅极通过第一电阻R1与P31的漏极电连接，形成二极管连接；P32和P33采用级联方式连接，以能够使得P32和P33开关的更彻底，避免漏充或漏放。
在图3所示的至少一实施例中，在P1与所述第四控制电路34之间还可以设置有控制二极管，控制二极管的阳极与P1电连接，控制二极管的阴极与P32的漏极电连接，但不以此为限。
本公开如图3所示的显示触摸装置的至少一实施例在工作时，
在显示触摸装置处于休眠状态下时，触摸运算处理电路22向S0提供高电压信号，N1打开，P21的基极与地端GND电连接，P21打开，P32的栅极和P33的栅极接入第二供电端P2提供的第二工作电压，P32和P33关断，P31打开，P2通过P31和R3为电源管理芯片21供电；所述电源管理芯片21为所述触摸运算处理电路22、所述显示触控驱动电路11和所述触摸集成电路12提供工作电压，以使得所述显示触摸装置能够检测触摸事件；
当所述显示触摸装置在休眠状态下被触摸时，触摸运算处理电路22向S0提供低电压信号，N1关断，P21的基极和P31的栅极都通过电阻与P2电连接，P2提供正电压信号(P2例如可以提供3.3V电压信号)，P21和P31都关断，以切断P2与电源管理芯片21之间的连接，P32的栅极和P33的栅极都通过R2与地端GND电连接，P32和P33都打开，P1为电源管理芯片21供电。
如图4所示，本公开如图3所示的显示触摸装置的至少一实施例在工作时，
在正常工作阶段S1，所述显示触摸装置进行正常显示触控(也即所述显示触摸装置处于正常工作状态)，触摸运算处理电路22向S0提供低电压信号，P1和P2可以都提供3.3V电压信号，P1作为供电电源以为电源管理芯片21供电，P1作为核心电源；
在休眠阶段S2，所述显示触摸装置处于休眠状态，触摸运算处理电路22向S0提供高电压信号，P1提供的电压信号为低电位，P2继续工作，P2作为休眠时的工作电源与电源管理芯片21供电，电源管理芯片21为所述触摸运算处理电路22、所述显示触控驱动电路11和所述触摸集成电路12提供工作电压，使得当所述显示触摸装置处于休眠状态时，能够正常进行触控检测。
在本公开至少一实施例中，由电源管理芯片21提供基本逻辑电压AVDD；
电源管理芯片21向所述触摸运算处理电路22提供工作电压(所述工作电压可以根据实际情况选定，例如，该工作电压可以为1.2V或0.9V，但不以此为限)；并且，电源管理芯片21为所述芯片50中的辅助电路供电；
电源管理芯片21向所述显示触控驱动电路11提供1.2V电压信号、1.5V电压信号或1.8V电压信号，但不以此为限；
电源管理芯片21向所述触摸集成电路12提供2.5V电压信号、3.3V电压信号或1.8V电压信号，但不以此为限。
如图5所示，在图3所示的显示触摸装置的至少一实施例的基础上，所述显示触摸装置还包括时序控制器40；
所述时序控制器40与所述触摸运算处理电路22集成于同一芯片50上，以减少显示触摸装置采用的芯片的个数；
P1与控制二极管D0的阳极电连接，所述控制二极管D0的阴极与所述芯片50中的时序控制器40电连接，所述控制二极管D0的阴极还与P32的漏极电连接，P1在显示触摸装置正常显示触控时为所述时序控制器40供电；
时序控制器40向所述触摸运算处理电路22提供触控同步信号St和显示同步信号Sd。
在图5中，标号为C0的为电容，标号为R04的为第二控制电阻，标号为51的为伽马电路，电源管理芯片21为伽马电路51供电。
本公开如图5所示的显示触摸装置的至少一实施例采用控制二极管D0，以实现反向截止，避免在显示触摸装置处于休眠状态时，P1提供的0V电压信号引起的反向电流烧毁。
在本公开如图5所示的显示触摸装置的至少一实施例中，所述显示触控驱动电路11、所述触摸集成电路12和触摸运算处理电路22相互电连接。
本公开至少一实施例还提供了一种供电控制方法，应用于上述的显示触摸装置，所述供电控制方法包括：
电源管理芯片为触摸运算处理电路、显示触控驱动电路和触摸集成电路提供工作电压；
在所述显示触摸装置处于休眠状态时，触摸运算处理电路向控制信号输出端提供第一控制信号，以使得供电控制电路在所述第一控制信号的控制下，通过第二供电端为电源管理芯片供电；
在所述显示触摸装置处于休眠状态，并所述显示触摸面板被触摸时，所述触摸运算处理电路向所述控制信号输出端提供第二控制信号，以使得所述供电控制电路在所述第二控制信号的控制下，通过第一供电端为所述电源管理芯片供电。
本公开至少一实施例所述的供电控制方法采用供电控制电路来控制在显示触摸装置处于休眠状态时，通过第二供电端为电源管理芯片供电，所述电源管理芯片为显示触控驱动电路、触摸集成电路和所述触摸运算处理电路提供工作电压，从而使得在显示触摸装置处于休眠状态时也能够进行检测触摸事件，从而能够实现休眠状态触摸唤醒。
在具体实施时，本公开至少一实施例所述的供电控制方法还可以包括：
在所述显示触摸装置处于正常工作状态时，所述触摸运算处理电路向所述控制信号输出端提供第二控制信号，以使得所述供电控制电路在所述第二控制信号的控制下，通过第一供电端为所述电源管理芯片供电。
在本公开至少一实施例中，所述显示触摸装置还可以包括系统端，所述供电控制方法还可以包括：
当所述显示触摸装置处于休眠状态时，所述第一供电端提供0V电压信号；
在所述显示触摸装置处于休眠状态，并所述显示触摸面板被触摸时，所述触摸运算处理电路检测向所述系统端提供唤醒提示信号；
所述系统端在接收到所述唤醒提示信号时，控制所述第一供电端提供第一工作电压。
在本公开至少一实施例中，在显示触摸装置处于休眠状态时，第一供电端不工作，所述第一供电端提供0V电压信号，由触摸运算处理电路在休眠状态下触摸唤醒所述显示触摸装置时，向系统端提供唤醒提示信号，所述系统端响应所述唤醒提示信号，以控制第一供电端正常提供第一工作电压。
本公开至少一实施例所提供的显示装置可以为手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示和触控功能的产品或部件。
以上所述是本公开的优选实施方式，应当指出，对于本技术领域的普通技术人员来说，在不脱离本公开所述原理的前提下，还可以作出若干改进和润饰，这些改进和润饰也应视为本公开的保护范围。

Claims (12)

  1. 一种显示触摸装置，包括显示触摸面板、显示触控驱动电路、触摸集成电路、电源管理芯片和触摸运算处理电路，所述显示触摸装置还包括供电模组；所述供电模组包括第一供电端、第二供电端和供电控制电路；
    所述电源管理芯片为所述触摸运算处理电路、所述显示触控驱动电路和所述触摸集成电路提供工作电压；
    所述供电控制电路的控制端与所述触摸运算处理电路的控制信号输出端电连接；
    所述触摸运算处理电路用于在所述显示触摸装置处于休眠状态时，向所述控制信号输出端提供第一控制信号，以使得所述供电控制电路在所述第一控制信号的控制下，通过第二供电端为所述电源管理芯片供电；所述触摸运算处理电路还用于在所述显示触摸装置处于休眠状态，并所述显示触摸面板被触摸时，向所述控制信号输出端提供第二控制信号，以使得所述供电控制电路在所述第二控制信号的控制下，通过第一供电端为所述电源管理芯片供电。
  2. 如权利要求1所述的显示触摸装置，其中，所述第一供电端用于当所述显示触摸装置处于休眠状态时，提供0V电压信号；所述显示触摸装置还包括系统端；
    所述触摸运算处理电路用于在所述显示触摸装置处于休眠状态，并所述显示触摸面板被触摸时，向所述系统端提供唤醒提示信号；
    所述系统端在接收到所述唤醒提示信号时，控制所述第一供电端提供第一工作电压。
  3. 如权利要求1或2所述的显示触摸装置，其中，所述触摸运算处理电路还用于在所述显示触摸装置处于正常工作状态时，向所述控制信号输出端提供第二控制信号，以使得所述供电控制电路在所述第二控制信号的控制下，通过第一供电端为所述电源管理芯片供电。
  4. 如权利要求3所述的显示触摸装置，其中，所述供电控制电路包括第一电阻、第二电阻、第三电阻、第一控制电路、第二控制电路、第三控制电 路和第四控制电路，其中，
    所述第一控制电路的控制端与所述控制信号输出端电连接，所述第一控制电路的第一端与所述第二控制电路的控制端、所述第三控制电路的控制端和第一电阻的第一端电连接，所述第一电阻的第二端与所述第二供电端电连接；所述第一控制电路的第二端与第一电压端电连接；所述第一控制电路用于在所述控制信号输出端输出第一控制信号时，控制所述第二控制电路的控制端与所述第一电压端之间连通，并控制所述第三控制电路的控制端与所述第一电压端之间连通；所述第一控制电路还用于在所述控制信号输出端输出第二控制信号时，控制所述第二控制电路的控制端与所述第一电压端之间断开，并控制所述第三控制电路的控制端与所述第一电压端之间断开；
    所述第二控制电路的第一端与所述第二供电端电连接，所述第二控制电路的第二端与所述第四控制电路的控制端电连接，并所述第二控制电路的第二端通过第二电阻与第二电压端电连接，所述第二控制电路用于在其控制端与所述第一电压端之间连通时，控制所述第二供电端与所述第四控制电路的控制端之间连通，所述第二控制电路还用于在其控制端与所述第一电压端之间断开时，控制所述第二供电端与所述第四控制电路的控制端之间断开；
    所述第三控制电路的第一端与所述第二供电端电连接，所述第三控制电路的第二端通过第三电阻与所述电源管理芯片电连接，所述第三控制电路用于在其控制端与所述第一电压端之间连通时，控制通过所述第二供电端为电源管理芯片供电，所述第三控制电路还用于在其控制端与所述第一电压端之间断开时，控制所述第二供电端与所述电源管理芯片之间断开；
    所述第四控制电路的第一端与所述第一供电端电连接，所述第四控制电路的第二端通过所述第三电阻与所述电源管理芯片电连接，所述第四控制电路用于在其控制端与所述第二供电端电连接时，控制所述第一供电端与所述电源管理芯片之间断开，所述第四控制电路还用于在其控制端与所述第二供电端之间断开时，控制通过所述第一供电端为所述电源管理芯片供电。
  5. 如权利要求4所述的显示触摸装置，其中，所述第一控制电路包括第一控制晶体管和第一控制电阻；
    所述第一控制晶体管的控制端与所述控制信号输出端电连接，所述第一 控制晶体管的第一极分别与所述第二控制电路的控制端、所述第三控制电路的控制端和第一电阻的第一端电连接；所述第一控制晶体管的第二极与所述第一电压端电连接。
  6. 如权利要求4所述的显示触摸装置，其中，所述第二控制电路包括第二控制晶体管；
    所述第二控制晶体管的控制极与所述第一控制电路的第一端电连接，所述第二控制晶体管的第一极与所述第二供电端电连接，所述第二控制晶体管的第二极与所述第四控制电路的控制端电连接，并所述第二控制晶体管的第二极通过第二电阻与第二电压端电连接。
  7. 如权利要求4所述的显示触摸装置，其中，所述第三控制电路包括第三控制晶体管；
    所述第三控制晶体管的控制极与所述第一控制电路的第一端电连接，所述第三控制晶体管的第一极与所述第二供电端电连接，所述第三控制晶体管的第二极通过所述第三电阻与所述电源管理芯片电连接。
  8. 如权利要求4所述的显示触摸装置，其中，所述第四控制电路包括第四控制晶体管和第五控制晶体管，其中，
    所述第四控制晶体管的控制极和所述第五控制晶体管的控制极与所述第二控制电路的第二端电连接，所述第四控制晶体管的第一极与所述第一供电端电连接，所述第四控制晶体管的第二极与所述第五控制晶体管的第一极电连接，所述第五控制晶体管的第二极通过所述第三电阻与所述电源管理芯片电连接。
  9. 如权利要求1或2所述的显示触摸装置，其中，还包括时序控制器；
    所述触摸运算处理电路和所述时序控制器集成于一个芯片上。
  10. 一种供电控制方法，应用于如权利要求1至9中任一权利要求所述的显示触摸装置，所述供电控制方法包括：
    电源管理芯片为触摸运算处理电路、显示触控驱动电路和触摸集成电路提供工作电压；
    在所述显示触摸装置处于休眠状态时，触摸运算处理电路向控制信号输出端提供第一控制信号，以使得供电控制电路在所述第一控制信号的控制下， 通过第二供电端为电源管理芯片供电；
    在所述显示触摸装置处于休眠状态，并所述显示触摸面板被触摸时，所述触摸运算处理电路向所述控制信号输出端提供第二控制信号，以使得所述供电控制电路在所述第二控制信号的控制下，通过第一供电端为所述电源管理芯片供电。
  11. 如权利要求10所述的供电控制方法，其中，所述显示触摸装置还包括系统端，所述供电控制方法还包括：
    当所述显示触摸装置处于休眠状态时，所述第一供电端提供0V电压信号；
    在所述显示触摸装置处于休眠状态，并所述显示触摸面板被触摸时，所述触摸运算处理电路检测向所述系统端提供唤醒提示信号；
    所述系统端在接收到所述唤醒提示信号时，控制所述第一供电端提供第一工作电压。
  12. 如权利要求10或11所述的供电控制方法，其中，还包括：
    在所述显示触摸装置处于正常工作状态时，所述触摸运算处理电路向所述控制信号输出端提供第二控制信号，以使得所述供电控制电路在所述第二控制信号的控制下，通过第一供电端为所述电源管理芯片供电。
PCT/CN2021/118244 2020-10-22 2021-09-14 显示触摸装置和供电控制方法 WO2022083360A1 (zh)

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