WO2020042388A1 - Method for improving sequential read performance of solid state drive - Google Patents

Method for improving sequential read performance of solid state drive Download PDF

Info

Publication number
WO2020042388A1
WO2020042388A1 PCT/CN2018/116814 CN2018116814W WO2020042388A1 WO 2020042388 A1 WO2020042388 A1 WO 2020042388A1 CN 2018116814 W CN2018116814 W CN 2018116814W WO 2020042388 A1 WO2020042388 A1 WO 2020042388A1
Authority
WO
WIPO (PCT)
Prior art keywords
splicing unit
read command
sequential read
command
splicing
Prior art date
Application number
PCT/CN2018/116814
Other languages
French (fr)
Chinese (zh)
Inventor
白琮
Original Assignee
苏州韦科韬信息技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 苏州韦科韬信息技术有限公司 filed Critical 苏州韦科韬信息技术有限公司
Publication of WO2020042388A1 publication Critical patent/WO2020042388A1/en

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/061Improving I/O performance
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0614Improving the reliability of storage systems
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0638Organizing or formatting or addressing of data
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0659Command handling arrangements, e.g. command buffers, queues, command scheduling
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0673Single storage device
    • G06F3/0679Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0683Plurality of storage devices
    • G06F3/0688Non-volatile semiconductor memory arrays

Definitions

  • the invention relates to a solid-state hard disk control technology, and in particular, to a method for improving sequential read performance of a solid-state hard disk.
  • An SSD (Solid State Drives) controller is a device that connects a user's host and storage particles (for example: NAND flash memory). One end of the SSD controller is connected to the host and the other end is connected to the storage particles. A compatible host is provided at the end connected to the host. A host interface protocol module of the interface protocol, and a storage particle interface protocol module conforming to the storage particle interface protocol is provided at one end connected to the storage particle. Because the speed of data transmission between the two interface protocol modules exists
  • the purpose of the present invention is how to improve the probability of sequential read and parallel operation, and overall improve the performance of the solid state hard disk.
  • the present invention proposes a method for improving the sequential read performance of a solid-state hard disk, which is characterized in that a splicing unit and a command judgment module are added to the read operation, and the command judgment module judges continuously whether the logical address of the read command is input. Whether the commands within a certain interval are sequential read commands. If so, add the current sequential read request to the stitching unit, and stitch the read commands according to the written rules. After the stitching is completed, the read commands of the same stitching unit are read in parallel. Way to access the storage unit.
  • the method for improving the sequential read performance of the solid-state hard disk is characterized in that the newly generated sequential read command first determines whether the new sequential read command conforms to the existing splicing unit before joining the splicing unit, and if it is, then directly joins the splicing Unit, if not, refresh the existing splicing unit and generate a new splicing unit, and add the sequential read command to the new splicing unit.
  • the method for improving sequential read performance of a solid-state hard disk further includes a timeout trigger module.
  • a timeout trigger module When a splicing unit exceeds a preset time and no new read command is added to the splicing unit, the existing splicing unit is refreshed and executed.
  • a solid state hard disk is characterized in that a splicing unit and a command judgment module are added during a read operation, and the command judgment module continuously judges whether a command within a certain interval belongs to a sequential read command according to whether the logical address of the read command is input, and if so, The current sequential read request is added to the splicing unit, and after the splicing is completed, the read command of the same splicing unit is accessed in parallel to the storage unit.
  • the solid-state hard disk is characterized in that the newly generated sequential read command judges whether the new sequential read command conforms to the existing splicing unit before joining the splicing unit, and if it is, it is directly added to the splicing unit.
  • the existing splicing unit is refreshed and executed, and a new splicing unit is generated, and the sequential read command is added to the new splicing unit.
  • the solid state hard disk further includes a timeout trigger module.
  • a timeout trigger module When a splicing unit exceeds a preset time and no new read command is added to the splicing unit, the existing splicing unit is refreshed and executed.
  • the beneficial effects of the present invention are as follows: simply judging whether the logical address of the read command is a sequential read command or not, by adding the splicing unit, the read command is spliced according to the writing rule, and multiple commands are read in parallel. , Which effectively improves sequential read performance.
  • FIG. 1 is a schematic diagram of a write address allocation rule for continuous LPA
  • FIG. 2 is an execution flowchart when the task is driven
  • Figure 3 is an execution flowchart triggered by the timeout mechanism.
  • the logical address LPA of the read request is continuous, and the magnitude of the read request is relatively large.
  • the source address of the data being read on NandFlash is related to the write distribution rules of these data.
  • Figure 1 is the write of continuous LPA
  • the schematic diagram of the incoming address allocation rule can simply show the effect of the write allocation rule.
  • This write allocation rule can trigger the parallel read operation Multi_PlaneRead with the greatest probability when reading the scene sequentially.
  • LPA0-LPA7 is distributed to the Page of the same index Index of Blockn and Blockm. Blockn and Blockm belong to two different Planes under a Die, which conforms to the Parallel Multi_Plane rule. achieve.
  • the method of this patent is that the firmware system determines the LPAID of the read request. If the continuous LPA reaches a certain number, it is determined that the system is currently in the sequential read scenario, and these and subsequent subsequent LPA reads are read. Requests are marked for sequential reading.
  • Figure 2 is a task-driven execution flowchart; task-driven and time-out mechanisms cooperate, and task-driven splicing mechanism processes execute input-dependent requests.
  • the request is first parsed and judged according to the request type. If the current request is a sequential read request, the process is continued based on whether there is currently a splicing unit. When a splicing unit exists in the system, it indicates that the previous sequential read request is newly generated or assembled into a splicing unit.
  • the input sequential read request determines whether to join the splicing unit according to whether it conforms to the Multi_Plane rule of the splicing unit. If the Multi_Plane splicing rule of the splicing unit is not met, the current splicing unit is refreshed (that is, the NandFlash terminal executes the Multi_PlaneRead operation corresponding to this splicing unit), and the sequential read input is requested to newly generate the corresponding splicing unit. Whenever the current sequential read request is added to the splicing unit, the system checks the splicing unit to confirm whether the updated splicing unit has reached the maximum capacity of the splicing unit. For example, the sequential read scenario of LPA0-LPA7.
  • the read request of LPA0 newly generates Page0's Multi_Plane splicing unit.
  • the read requests of LPA1- LPA7 and Page0 splicing unit conform to the Multi_Plane rule. They are added to the splicing unit.
  • the splicing unit contains read requests for LPA0-LPA7, and the inspection of the splicing unit has found that it has reached the maximum capacity (see Figure 1 that the largest LPAID of Multi_PlaneRead for Blockn and BlockmPage0 can only support LPA7), and then the Refresh action.
  • the timeout mechanism can increase the flexibility of the sequential read request time, avoid long-term waiting of the splicing unit, and also prevent the splicing unit caused by the request delay from being refreshed and executed without forming a Multi_Plane operation.
  • this module receives the sequential read requests of LPA0-LPA3 and combines them into a splicing unit (only read requests of LPA0-LPA3 are received at one time instead of LPA0-LPA7 at one time.
  • the reason for the read request is the module's scheduling strategy and the saturation of the request.
  • the splicing unit actually only has the Signle_PlaneRead of BlocknPage0; 2 wait until the next request drives the refresh of the splicing unit (the request and the splicing unit do not comply with the Multi_Plane splicing rule) or update (sequential read request joins the splicing unit ), That is, after receiving the last LPA3 sequential read request, the waiting time is unknown.

Abstract

A method for improving sequential read performance of a solid state drive, comprising: before a newly generated sequential read command is added into a splicing unit, determining whether the new sequential read command conforms to splicing rules of the existing splicing unit; if yes, directly adding the new sequential read command into the splicing unit; if not, refreshing the existing splicing unit, and generating a new splicing unit; adding the sequential read command into the new splicing unit. The method for improving sequential read performance of the solid state drive further comprises a timeout trigger module which refreshes the existing splicing unit when a splicing unit does not have a new read command added beyond a pre-determined time. A plurality of commands is read in parallel, and the read performance of the solid state drive is effectively improved.

Description

一种提升固态硬盘顺序读性能的方法Method for improving sequential read performance of solid state hard disk 技术领域Technical field
本发明涉及固态硬盘控制技术,特别涉及一种提升固态硬盘顺序读性能的方法。The invention relates to a solid-state hard disk control technology, and in particular, to a method for improving sequential read performance of a solid-state hard disk.
背景技术Background technique
SSD(Solid State Drives,固态硬盘)控制器是连接用户主机与存储颗粒(例如:NAND闪存)的设备,SSD控制器的一端连接主机,另一端连接存储颗粒,在连接主机的一端设有符合主机接口协议的主机接口协议模块,而在连接存储颗粒的一端设有符合存储颗粒接口协议的存储颗粒接口协议模块。因为两种接口协议模块之间的数据传输存在速An SSD (Solid State Drives) controller is a device that connects a user's host and storage particles (for example: NAND flash memory). One end of the SSD controller is connected to the host and the other end is connected to the storage particles. A compatible host is provided at the end connected to the host. A host interface protocol module of the interface protocol, and a storage particle interface protocol module conforming to the storage particle interface protocol is provided at one end connected to the storage particle. Because the speed of data transmission between the two interface protocol modules exists
传统的页映射对每个逻辑页(常见为4KB大小)进行逻辑地址到物理地址的映射管理。主机写命令下发后,会根据写命令说描述的数据大小进行4KB大小的切割,分散成若干个4KB大小的数据页,这些数据页依次顺序写入NAND flash中,页映射表记录每个数据页被写入的物理地址,形成逻辑地址到物理地址的映射关系。该映射管理方法使得映射表的大小变得很大,需要较大的片外。Traditional page mapping manages the mapping of logical addresses to physical addresses for each logical page (commonly 4KB). After the host write command is issued, it will cut the 4KB size according to the data size described by the write command and distribute it into several 4KB data pages. These data pages are written into NAND flash sequentially, and the page mapping table records each data. The physical address to which the page is written forms the mapping relationship from logical address to physical address. This mapping management method makes the size of the mapping table very large and requires a large off-chip.
发明内容Summary of the Invention
针对以上缺陷,本发明目的是如何提高顺序读可并行操作的概率,整体上提高固体硬盘的性能。In view of the above defects, the purpose of the present invention is how to improve the probability of sequential read and parallel operation, and overall improve the performance of the solid state hard disk.
为了解决以上问题本发明提出了一种提升固态硬盘顺序读性能的方法,其特征在于在读操作中增加一个拼接单元和命令判断模块,所述命令判断模块根据输入的读命令的逻辑地址是否连续判断一定间隔内的命令是否属于顺序读命令,如果是则将当前的顺序读请求加入拼接单元,将读命令按照写入的规则进行拼接,完成拼接后实现同一个拼接单元的读命令按并行读取的方式访问存储单元。In order to solve the above problems, the present invention proposes a method for improving the sequential read performance of a solid-state hard disk, which is characterized in that a splicing unit and a command judgment module are added to the read operation, and the command judgment module judges continuously whether the logical address of the read command is input. Whether the commands within a certain interval are sequential read commands. If so, add the current sequential read request to the stitching unit, and stitch the read commands according to the written rules. After the stitching is completed, the read commands of the same stitching unit are read in parallel. Way to access the storage unit.
所述的固态硬盘提升顺序读性能的方法,其特征在于新产生的顺序读命令在加入拼接单元前先判断新的顺序读命令是否与已有的拼接单元符合拼接规则,如果是则直接加入拼接单元,如果不是则将已有拼接单元刷新执行,并生成新的拼接单元,将顺序读命令加入新的拼接单元。The method for improving the sequential read performance of the solid-state hard disk is characterized in that the newly generated sequential read command first determines whether the new sequential read command conforms to the existing splicing unit before joining the splicing unit, and if it is, then directly joins the splicing Unit, if not, refresh the existing splicing unit and generate a new splicing unit, and add the sequential read command to the new splicing unit.
所述的固态硬盘提升顺序读性能的方法,其特征在于还包括超时触发模块,当一个拼接单元超过预先设定的时间没有新的读命令加入拼接单元,则将已有拼接单元刷新执行。The method for improving sequential read performance of a solid-state hard disk further includes a timeout trigger module. When a splicing unit exceeds a preset time and no new read command is added to the splicing unit, the existing splicing unit is refreshed and executed.
一种固态硬盘,其特征在于在读操作中增加一个拼接单元和命令判断模块,所述命令判断模块根据输入的读命令的逻辑地址是否连续判断一定间隔内的命令是否属于顺序读命令,如果是则将当前的顺序读请求加入拼接单元,完成拼接后实现同一个拼接单元的读命令按并行读取的方式访问存储单元。A solid state hard disk is characterized in that a splicing unit and a command judgment module are added during a read operation, and the command judgment module continuously judges whether a command within a certain interval belongs to a sequential read command according to whether the logical address of the read command is input, and if so, The current sequential read request is added to the splicing unit, and after the splicing is completed, the read command of the same splicing unit is accessed in parallel to the storage unit.
所述的固态硬盘,其特征在于新产生的顺序读命令在加入拼接单元前先判断新的顺序读命令是否与已有的拼接单元符合拼接规则,如果是则直接加入拼接单元,如果不是则将已有拼接单元刷新执行,并生成新的拼接单元,将顺序 读命令加入新的拼接单元。The solid-state hard disk is characterized in that the newly generated sequential read command judges whether the new sequential read command conforms to the existing splicing unit before joining the splicing unit, and if it is, it is directly added to the splicing unit. The existing splicing unit is refreshed and executed, and a new splicing unit is generated, and the sequential read command is added to the new splicing unit.
所述的固态硬盘,其特征在于还包括超时触发模块,当一个拼接单元超过预先设定的时间没有新的读命令加入拼接单元,则将已有拼接单元刷新执行。The solid state hard disk further includes a timeout trigger module. When a splicing unit exceeds a preset time and no new read command is added to the splicing unit, the existing splicing unit is refreshed and executed.
本发明的有益效果是:简单的根据读命令的逻辑地址是否连续判定是否为顺序读命令,通过增加的拼接单元,将读命令按照写入的规则进行拼接,实现多个命令并行的读取操作,有效地提升了顺序读性能。The beneficial effects of the present invention are as follows: simply judging whether the logical address of the read command is a sequential read command or not, by adding the splicing unit, the read command is spliced according to the writing rule, and multiple commands are read in parallel. , Which effectively improves sequential read performance.
附图说明BRIEF DESCRIPTION OF THE DRAWINGS
图1是连续LPA的写入地址分配规则示意图;FIG. 1 is a schematic diagram of a write address allocation rule for continuous LPA;
图2是任务驱动时的执行流程图;FIG. 2 is an execution flowchart when the task is driven;
图3是超时机制触发的执行流程图。Figure 3 is an execution flowchart triggered by the timeout mechanism.
具体实施方式detailed description
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。In the following, the technical solutions in the embodiments of the present invention will be clearly and completely described with reference to the drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, but not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by a person of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.
具体实现以前文所述的技术要点的顺序展开。The specific implementation of the technical points described in the foregoing is unfolded in order.
顺序读场景中,读请求的逻辑地址LPA是连续的,且读请求的量级比较大,被读取数据在NandFlash上的源地址与这些数据的写入分配规则相关图1是连续LPA的写入地址分配规则示意图,能简单表示写入分配规则产生的效果,这种写入分配规则在顺序读场景时能最大机率触发并行读操作Multi_PlaneRead。LPA0-LPA7分散到Blockn和Blockm同一个索引Index的Page,Blockn和Blockm属于一个Die下两个不同的Plane,符合并行Multi_Plane规则,可使得LPA0-LPA7的读取可以通过NandFlash端的并行读操作Multi_PlaneRead来实现。In the sequential read scenario, the logical address LPA of the read request is continuous, and the magnitude of the read request is relatively large. The source address of the data being read on NandFlash is related to the write distribution rules of these data. Figure 1 is the write of continuous LPA The schematic diagram of the incoming address allocation rule can simply show the effect of the write allocation rule. This write allocation rule can trigger the parallel read operation Multi_PlaneRead with the greatest probability when reading the scene sequentially. LPA0-LPA7 is distributed to the Page of the same index Index of Blockn and Blockm. Blockn and Blockm belong to two different Planes under a Die, which conforms to the Parallel Multi_Plane rule. achieve.
对于如何识别出顺序读请求,本专利的做法是固件系统判断读请求的LPAID,如果连续的LPA达到一定的数量,则认定当前是系统处于顺序读场景,且将这些及后续的连续LPA的读请求标记为顺序读。For how to identify sequential read requests, the method of this patent is that the firmware system determines the LPAID of the read request. If the continuous LPA reaches a certain number, it is determined that the system is currently in the sequential read scenario, and these and subsequent subsequent LPA reads are read. Requests are marked for sequential reading.
顺序读场景中,拼接机制执行(专指拼接成Multi_Plane操作)流程如图2和图3所示。图2是任务驱动时的执行流程图;任务驱动和超时机制相配合,任务驱动的拼接机制流程执行依赖输入的请求。首先解析请求、并根据请求类型作判断,如果当前请求是顺序读请求,则依据当前是否存在拼接单元以继续流程。当系统中存在拼接单元时,表明前面的顺序读请求新生成或者集合成了拼接单元,此时输入的顺序读请求根据是否符合拼接单元的Multi_Plane规则来确定是否加入此拼接单元。若不符合拼接单元的Multi_Plane拼接规则,则刷新当前的拼接单元(即让NandFlash端执行此拼接单元对应的Multi_PlaneRead操作),同时输入的顺序读请求新生成对应的拼接单元。每当当前的顺序读请求加入拼接单元后,系统进行拼接单元的检查,确认更新后的拼接单元是否已经达到此拼接单元的最大容纳能力。举例说明,LPA0-LPA7的顺序读场景,LPA0的读请求新生成Page0的Multi_Plane拼接单元,LPA1- LPA7的读请求与Page0拼接单元符合Multi_Plane规则,加入拼接单元中,当LPA7加入拼接单元集合中后,此时拼接单元包含LPA0-LPA7的读请求,拼接单元的检查发现已经达到最大容纳能力(图1中可看出Blockn、BlockmPage0的Multi_PlaneRead最大的LPAID只能支持到LPA7),随后进行拼接单元的刷新动作。In the sequential reading scenario, the process of splicing mechanism execution (specifically, splicing into Multi_Plane operation) is shown in Figure 2 and Figure 3. Figure 2 is a task-driven execution flowchart; task-driven and time-out mechanisms cooperate, and task-driven splicing mechanism processes execute input-dependent requests. The request is first parsed and judged according to the request type. If the current request is a sequential read request, the process is continued based on whether there is currently a splicing unit. When a splicing unit exists in the system, it indicates that the previous sequential read request is newly generated or assembled into a splicing unit. At this time, the input sequential read request determines whether to join the splicing unit according to whether it conforms to the Multi_Plane rule of the splicing unit. If the Multi_Plane splicing rule of the splicing unit is not met, the current splicing unit is refreshed (that is, the NandFlash terminal executes the Multi_PlaneRead operation corresponding to this splicing unit), and the sequential read input is requested to newly generate the corresponding splicing unit. Whenever the current sequential read request is added to the splicing unit, the system checks the splicing unit to confirm whether the updated splicing unit has reached the maximum capacity of the splicing unit. For example, the sequential read scenario of LPA0-LPA7. The read request of LPA0 newly generates Page0's Multi_Plane splicing unit. The read requests of LPA1- LPA7 and Page0 splicing unit conform to the Multi_Plane rule. They are added to the splicing unit. When LPA7 is added to the splicing unit set At this time, the splicing unit contains read requests for LPA0-LPA7, and the inspection of the splicing unit has found that it has reached the maximum capacity (see Figure 1 that the largest LPAID of Multi_PlaneRead for Blockn and BlockmPage0 can only support LPA7), and then the Refresh action.
超时机制能增加顺序读请求时间量上的弹性,避免拼接单元的长时间等待,同时也能避免请求的延时引起的拼接单元未组成Multi_Plane操作而被刷新执行。考虑没有超时机制控制的顺序读场景,本模块一次性接收到LPA0–LPA3的顺序读请求并集合成一个拼接单元(一次性只接收到LPA0-LPA3的读请求而非一次性接收到LPA0-LPA7的读请求的原因在于模块的调度策略和请求的饱和程度),存在两种对拼接单元处理的可能策略:①立即刷新,接收到最后一个顺序读请求后刷新拼接单元,即接收到最后一个LPA3顺序读请求后刷新拼接单元,此时拼接单元实际上只有BlocknPage0的Signle_PlaneRead;②一直等到下一个请求驱动拼接单元的刷新(请求与拼接单元不符合Multi_Plane拼接规则)或者更新(顺序读请求加入拼接单元),即接收到最后一个LPA3顺序读请求后,等待时间未知。当采用策略①时,有可能下一批LPA4-LPA7的顺序读请求随后就到,本来可以进行Blockn、BlockmPage0的Multi_PlaneRead被分解成Block0Page0的Signle_PlaneRead和BlockmPage0的Signle_PlaneRead,同样的LPA0-LPA7的读,NandFlash端的执行时间被延长。当采用策略②后,由于等待时间未知,本可以在等待的这段时间内完成的LPA0-LPA3读请求一直在等待,严重浪费性能。本专利引入超时机制控制,在新生成的拼接单元的同时记录其时间点,当当前拼接单s元等待超过一定的时间立即刷新执行。The timeout mechanism can increase the flexibility of the sequential read request time, avoid long-term waiting of the splicing unit, and also prevent the splicing unit caused by the request delay from being refreshed and executed without forming a Multi_Plane operation. Considering the sequential read scenario without the timeout mechanism control, this module receives the sequential read requests of LPA0-LPA3 and combines them into a splicing unit (only read requests of LPA0-LPA3 are received at one time instead of LPA0-LPA7 at one time. The reason for the read request is the module's scheduling strategy and the saturation of the request.) There are two possible strategies for processing the splicing unit: ① refresh immediately, refresh the splicing unit after receiving the last sequential read request, that is, the last LPA3 is received Refresh the splicing unit after a sequential read request. At this time, the splicing unit actually only has the Signle_PlaneRead of BlocknPage0; ② wait until the next request drives the refresh of the splicing unit (the request and the splicing unit do not comply with the Multi_Plane splicing rule) or update (sequential read request joins the splicing unit ), That is, after receiving the last LPA3 sequential read request, the waiting time is unknown. When strategy ① is adopted, it is possible that the next batch of sequential read requests for LPA4-LPA7 will arrive later. The Multi_PlaneRead that could have performed Blockn, BlockmPage0 is decomposed into the Signle_PlaneRead of Block0Page0 and the Signle_PlaneRead of BlockmPage0, the same read of LPA0-LPA7, NandFlash The execution time of the end is extended. When strategy ② is adopted, because the waiting time is unknown, the LPA0-LPA3 read requests that could have been completed during the waiting period have been waiting, which is a serious waste of performance. This patent introduces a timeout mechanism control, and records the time point of the newly generated splicing unit at the same time. When the current splicing unit s waits for more than a certain time, it will be refreshed and executed immediately.
以上所揭露的仅为本发明一种实施例而已,当然不能以此来限定本之权利范围,本领域普通技术人员可以理解实现上述实施例的全部或部分流程,并依本发明权利要求所作的等同变化,仍属于本发明所涵盖的范围What has been disclosed above is only one embodiment of the present invention, and of course, the scope of the rights of the present invention cannot be limited by this. Those of ordinary skill in the art can understand all or part of the processes for implementing the above embodiments and make according to the claims of the present invention. Equivalent changes still belong to the scope covered by the present invention

Claims (6)

  1. 一种提升固态硬盘顺序读性能的方法,其特征在于在读操作中增加一个拼接单元和命令判断模块,所述命令判断模块根据输入的读命令的逻辑地址是否连续判断一定间隔内的命令是否属于顺序读命令,如果是则将当前的顺序读请求加入拼接单元,将读命令按照写入的规则进行拼接,完成拼接后实现同一个拼接单元的读命令按并行读取的方式访问存储单元。A method for improving sequential read performance of a solid-state hard disk, which is characterized in that a splicing unit and a command judgment module are added in the read operation, and the command judgment module continuously judges whether a command within a certain interval belongs to a sequence according to whether the logical address of the read command input is continuous The read command, if it is, adds the current sequential read request to the splicing unit, and splices the read command according to the writing rules. After the splicing is completed, the read command of the same splicing unit is accessed in parallel to the storage unit.
  2. 根据权利要求1所述的固态硬盘提升顺序读性能的方法,其特征在于新产生的顺序读命令在加入拼接单元前先判断新的顺序读命令是否与已有的拼接单元符合拼接规则,如果是则直接加入拼接单元,如果不是则将已有拼接单元刷新执行,并生成新的拼接单元,将顺序读命令加入新的拼接单元。The method for improving sequential read performance of a solid state hard disk according to claim 1, characterized in that the newly generated sequential read command determines whether the new sequential read command conforms to the existing stitching unit before joining the stitching unit, and if it is Add the splicing unit directly, if not, refresh the existing splicing unit and generate a new splicing unit, and add the sequential read command to the new splicing unit.
  3. 根据权利要求1所述的固态硬盘提升顺序读性能的方法,其特征在于还包括超时触发模块,当一个拼接单元超过预先设定的时间没有新的读命令加入拼接单元,则将已有拼接单元刷新执行。The method for improving sequential read performance of a solid-state hard disk according to claim 1, further comprising a timeout trigger module. When a splicing unit exceeds a preset time without a new read command being added to the splicing unit, the existing splicing unit is added. Refresh execution.
  4. 一种固态硬盘,其特征在于在读操作中增加一个拼接单元和命令判断模块,所述命令判断模块根据输入的读命令的逻辑地址是否连续判断一定间隔内的命令是否属于顺序读命令,如果是则将当前的顺序读请求加入拼接单元,将读命令按照写入的规则进行拼接,完成拼接后实现同一个拼接单元的读命令按并行读取的方式访问存储单元。A solid state hard disk is characterized in that a splicing unit and a command judgment module are added during a read operation, and the command judgment module continuously judges whether a command within a certain interval belongs to a sequential read command according to whether the logical address of the read command is input, and if so, The current sequential read request is added to the splicing unit, and the read command is spliced according to the writing rules. After the splicing is completed, the read command of the same splicing unit is accessed in parallel to the storage unit.
  5. 根据权利要求4所述的固态硬盘,其特征在于新产生的顺序读命令在加入拼接单元前先判断新的顺序读命令是否与已有的拼接单元符合拼接规则,如果是则直接加入拼接单元,如果不是则将已有拼接单元刷新执行,并生成新的拼接单元,将顺序读命令加入新的拼接单元。The solid-state hard disk according to claim 4, wherein the newly generated sequential read command determines whether the new sequential read command conforms to the existing splicing unit before joining the splicing unit, and if so, directly adds the splicing unit, If not, the existing splicing unit is refreshed and executed, and a new splicing unit is generated, and a sequential read command is added to the new splicing unit.
  6. 根据权利要求4所述的固态硬盘,其特征在于还包括超时触发模块,当一个拼接单元超过预先设定的时间没有新的读命令加入拼接单元,则将已有拼接单元刷新执行。The solid-state hard disk according to claim 4, further comprising a timeout trigger module, and when a splicing unit exceeds a preset time and no new read command is added to the splicing unit, the existing splicing unit is refreshed and executed.
PCT/CN2018/116814 2018-09-01 2018-11-22 Method for improving sequential read performance of solid state drive WO2020042388A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201811017961.8 2018-09-01
CN201811017961.8A CN109271107A (en) 2018-09-01 2018-09-01 A method of promoting solid state hard disk sequence reading performance

Publications (1)

Publication Number Publication Date
WO2020042388A1 true WO2020042388A1 (en) 2020-03-05

Family

ID=65187718

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2018/116814 WO2020042388A1 (en) 2018-09-01 2018-11-22 Method for improving sequential read performance of solid state drive

Country Status (3)

Country Link
CN (1) CN109271107A (en)
LU (1) LU101773B1 (en)
WO (1) WO2020042388A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112433672B (en) * 2020-11-12 2023-01-06 苏州浪潮智能科技有限公司 Solid state disk reading method and device

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101196850A (en) * 2007-12-28 2008-06-11 祥硕科技股份有限公司 Data access integration method and its system
US20150052415A1 (en) * 2013-08-13 2015-02-19 SK Hynix Inc. Data storage device, operating method thereof and data processing system including the same
CN106201774A (en) * 2016-06-28 2016-12-07 中国人民解放军61660部队 A kind of NAND FLASH storage chip data store organisation analyzes method
CN108170380A (en) * 2017-12-28 2018-06-15 深圳忆联信息系统有限公司 A kind of method and solid state disk of solid state disk promotion sequence reading performance

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102298508B (en) * 2011-09-07 2014-08-06 记忆科技(深圳)有限公司 Stream-based method and device for prereading solid state disk
CN104111894A (en) * 2014-07-17 2014-10-22 记忆科技(深圳)有限公司 Method for improving multi-partition sequential read-write performance and system thereof

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101196850A (en) * 2007-12-28 2008-06-11 祥硕科技股份有限公司 Data access integration method and its system
US20150052415A1 (en) * 2013-08-13 2015-02-19 SK Hynix Inc. Data storage device, operating method thereof and data processing system including the same
CN106201774A (en) * 2016-06-28 2016-12-07 中国人民解放军61660部队 A kind of NAND FLASH storage chip data store organisation analyzes method
CN108170380A (en) * 2017-12-28 2018-06-15 深圳忆联信息系统有限公司 A kind of method and solid state disk of solid state disk promotion sequence reading performance

Also Published As

Publication number Publication date
CN109271107A (en) 2019-01-25
LU101773B1 (en) 2020-09-04

Similar Documents

Publication Publication Date Title
US9110669B2 (en) Power management of a storage device including multiple processing cores
US8738837B2 (en) Control of page access in memory
US10860494B2 (en) Flushing pages from solid-state storage device
US11360705B2 (en) Method and device for queuing and executing operation commands on a hard disk
WO2023103296A1 (en) Write data cache method and system, device, and storage medium
US10645164B1 (en) Consistent latency for solid state drives
CN110941395B (en) Dynamic random access memory, memory management method, system and storage medium
US11385831B2 (en) Memory controller and storage device including the same
US9632958B2 (en) System for migrating stash transactions
RU2643499C2 (en) Memory control
CN110910921A (en) Command read-write method and device and computer storage medium
US11010094B2 (en) Task management method and host for electronic storage device
TWI698744B (en) Data storage device and method for updating logical-to-physical mapping table
WO2020042388A1 (en) Method for improving sequential read performance of solid state drive
WO2022032990A1 (en) Command information transmission method, system, and apparatus, and readable storage medium
US20180173639A1 (en) Memory access method, apparatus, and system
WO2024027140A1 (en) Data processing method and apparatus, and device, system and readable storage medium
CN108170380B (en) Method for improving sequential reading performance of solid state disk and solid state disk
US20230325082A1 (en) Method for setting up and expanding storage capacity of cloud without disruption of cloud services and electronic device employing method
Kim et al. Fast i/o: Qos supports for urgent i/os in nvme ssds
WO2022228566A1 (en) Hardware queue management system and method, and solid state drive controller and solid state drive
US20220261354A1 (en) Data access method and apparatus and storage medium
WO2024021485A1 (en) Processor performance adjustment method and apparatus, electronic device and storage medium
WO2021139733A1 (en) Memory allocation method and device, and computer readable storage medium
CN111177027B (en) Dynamic random access memory, memory management method, system and storage medium

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 18932268

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 18932268

Country of ref document: EP

Kind code of ref document: A1

32PN Ep: public notification in the ep bulletin as address of the adressee cannot be established

Free format text: NOTING OF LOSS OF RIGHTS PURSUANT TO RULE 112(1) EPC (EPO FORM 1205A DATED 170821)

122 Ep: pct application non-entry in european phase

Ref document number: 18932268

Country of ref document: EP

Kind code of ref document: A1