LU101773B1 - Method for improving sequential read performance of solid-state drive - Google Patents
Method for improving sequential read performance of solid-state drive Download PDFInfo
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- LU101773B1 LU101773B1 LU101773A LU101773A LU101773B1 LU 101773 B1 LU101773 B1 LU 101773B1 LU 101773 A LU101773 A LU 101773A LU 101773 A LU101773 A LU 101773A LU 101773 B1 LU101773 B1 LU 101773B1
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- splicing unit
- sequential read
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- splicing
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0614—Improving the reliability of storage systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/061—Improving I/O performance
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0638—Organizing or formatting or addressing of data
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
- G06F3/0659—Command handling arrangements, e.g. command buffers, queues, command scheduling
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0683—Plurality of storage devices
- G06F3/0688—Non-volatile semiconductor memory arrays
Abstract
A method for improving sequential read performance of a solid state drive, characterized in that before a newly generated sequential read command is added into a splicing unit, it is judged whether the new sequential read command and the existing splicing unit conform to splicing rules, and if it does, the new sequential read command is directly added into the splicing unit; and if it does not, the existing splicing unit is refreshed and executed and a new splicing unit is generated, and the sequential read command is added into the new splicing unit. The method for improving sequential read performance of the solid state drive is characterized by further comprising a timeout trigger module, which refreshes and executes the existing splicing unit, when the splicing unit does not have a new read command added beyond a preset time. The operation of reading a plurality of commands in parallel is realized, which effectively improves the read performance of the solid state drive.
Description
BL-5138 METHOD FOR IMPROVING SEQUENTIAL READ PERFORMANCE OF 101773 SOLID-STATE DRIVE Technical field
[0001] The present invention relates to a solid-state drive control technology, and in particular to a method for improving sequential read performance of a solid-state drive.
Technical background
[0002] A solid state drive (SSD) controller is a device that connects a user host to a storage particle (e.g., a NAND flash memory). One end of the SSD controller is connected to the host, and the other end is connected to the storage particle. A host interface protocol module conforming to a host interface protocol is provided at | the end connected to the host, and a storage particle interface protocol module conforming to a storage particle interface protocol is provided at the end connected | to the storage particle. The data transmission speed between the two interface protocol modules is different.
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[0003] Traditional page mapping performs logical address to physical address mapping management for each logical page (commonly 4 KB in size). After a host | write command is issued, it will be cut by a 4 KB size according to the data size | described by the write command, and it is divided into several data pages of 4 KB | size. These data pages are sequentially written to the NAND flash, and a page | mapping table records a physical address where each data page is written, forming | a mapping relationship between the logical address and the physical address. The | mapping management method makes the size of the mapping table very large, requiring a large off-chip.
BL-5138 2 lu101773 Summary of the invention
[0004] In view of the above shortcomings, an objective of the present invention is how to increase the probability that sequential reads can be operated in parallel to improve the performance of the solid-state drive as a whole.
[0005] In order to solve the above problems, the present invention proposes a method for improving sequential read performance of a solid-state drive, characterized in that a splicing unit and a command judgment module are added in a read operation, the command judgment module judges whether commands within a certain interval belong to sequential read commands or not according to whether logical addresses of input read commands are continuous or not, and if they are, then a current sequential read request is added to the splicing unit, the read command is spliced according to a rule of writing, and after the splicing is completed, the read command of the same splicing unit accesses a storage unit in a parallel reading manner.
[0006] The method for improving sequential read performance of the solid-state drive, characterized in that before a newly generated sequential read command is added into a splicing unit, it is judged whether the new sequential read command and the existing splicing unit conform to splicing rules, and if it does, the new sequential read command is directly added into the splicing unit; and if it does not, | the existing splicing unit is refreshed and executed and a new splicing unit is generated, and the sequential read command is added into the new splicing unit.
[0007] The method for improving sequential read performance of the solid-state drive, characterized by further comprising a timeout trigger module, which refreshes and executes the existing splicing unit when the splicing unit does not have a new read command added beyond a preset time.
[0008] A solid-state drive, characterized in that a splicing unit and a command judgment module are added in a read operation, the command judgment module judges whether commands within a certain interval belong to sequential read
| 3 lu101773 | commands or not according to whether logical addresses of input read commands | are continuous or not, and if they are, then the current sequential read request is | added to the splicing unit, and after the splicing is completed, the read command of | the same splicing unit accesses the storage unit in a parallel reading manner. ) [0009] The solid-state drive, characterized in that before a newly generated : sequential read command is added into a splicing unit, it is judged whether the new ! sequential read command and the existing splicing unit conform to splicing rules, | and if it does, the new sequential read command is directly added into the splicing | 10 unit; and if it does not, the existing splicing unit is refreshed and executed and a | new splicing unit is generated, and the sequential read command is added into the ; new splicing unit. | [0010] The solid-state drive, characterized by further comprising a timeout trigger | 15 module, which refreshes and executes the existing splicing unit when the splicing | unit does not have a new read command added beyond a preset time. | [0011] The beneficial effects of the present invention are as follows: it is simply ‘ judged whether it is a sequential read command or not according to whether logical | 20 addresses of the read command are continuous, and through an added splicing unit, the read command is spliced according to a rule of writing, achieving the operation of reading a plurality of commands in parallel and effectively improving the sequential read performance.
Brief description of the drawings
[0012] Fig. 1 is a schematic view of a write address allocation rule for continuous L PAs;
[0013] Fig. 2 is an execution flowchart when a task is driven; and
[0014] Fig. 3 is an execution flowchart triggered by a timeout mechanism.
| BL-5138 | 4 lu101773 | Detailed description of the embodiments | [0015] The technical solutions in the embodiments of the present invention will be | clearly and completely described below with reference to the accompanying | 5 drawings in the embodiments of the present invention. Obviously, the described | embodiments are only a part of the embodiments of the present invention, and not | all the embodiments. All other embodiments obtained by those of ordinary skill in | the art based on the embodiments in the present invention without creative efforts | are within the scope of the present invention. | [0016] The specific implementations are carried out in a sequence of the technical | points described previously. | [0017] In a sequential read scene, logical addresses LPAs of a read request are | 15 continuous, and the magnitude of the read request is relatively large. The source | addresses of the read data on the NandFlash are related to the write allocation rule | of these data. Fig. 1 is a schematic view of a write address allocation rule for | continuous LPAs, which can simply indicate the effects generated by the write allocation rule. This write allocation rule can trigger the parallel read operation Multi_PlaneRead with the highest probability in the sequential read scene. LPAO-LPA7 are distributed to pages with the same index Index of Blockn and Blockm. Blockn and Blockm belong to two different Planes under one Die, and conform to the parallel Multi_Plane rule, so that reading of LPAO-LPA7 can be realized through a parallel read operation Multi_PlaneRead on the NandFlash side.
[0018] As to how to identify a sequential read request, the practice of the present patent is that a firmware system judges LPAID of the read request, if the number of continuous LPAs reaches a certain number, it is considered that the system is currently in a sequential read scene, and these and subsequently continuous LPAs read requests are marked as sequential read.
| BL-5138 | 5 lu101773 / [0019] In the sequential read scene, a process of executing a splicing mechanism | (specifically splicing into a Multi_Plane operation) is shown in Figs. 2 and 3. Figure | 2 is an execution flowchart when a task is driven; and the task being driven and a | timeout mechanism cooperates, and the task-driven splicing mechanism process | 5 executes input-dependent requests. The request is first parsed and it is judged | according to the type of request. If the current request is a sequential read request, | the process is continued according to whether there is currently a splicing unit. | When there is a splicing unit in the system, it indicates that the previous sequential | read request is newly generated or assembled into a splicing unit. At this time, the | 10 input sequential read request determines whether to be added into the splicing unit | or not according to whether it conforms to the Multi_Plane rule of the splicing unit. If | it does not conform to the Multi_Plane splicing rule of the splicing unit, the current splicing unit is refreshed (that is, a NandFlash terminal executes a Multi_PlaneRead operation corresponding to the splicing unit), and at the same time, the input sequential read request newly generates a corresponding splicing unit. Each time the current sequential read request is added to the splicing unit, the system checks the splicing unit to confirm whether the updated splicing unit has reached the maximum capacity of the splicing unit. For example, in the sequential read scene of LPAO-LPA7, the read request of LPAO newly generates the Multi_Plane splicing unit of Page0. The read requests of LPA1-LPA7 and the splicing unit of PageO conform to the Multi_Plane rules, and are added into the splicing unit. When LPA7 is added the splicing unit set, at this time, the splicing unit contains the read requests of LPAO-LPA7, it is found by checking the splicing unit that it has reached the maximum capacity (it can be seen in Fig. 1 that the maximum LPAID of Multi PlaneRead of Blockn and BlockmPage0 can only support LPA7), and then the refresh action of the splicing unit is performed.
[0020] The timeout mechanism can increase the flexibility in the amount of time for the sequential read request, avoiding the long waiting time of the splicing unit. At the same time, it can also prevent the splicing unit caused by the request delay from being refreshed and executed without forming a Multi Plane operation. Considering the sequential read scene without the control of the timeout mechanism, the present module receives the sequential read requests of
| BL-5138 | lu101773 | LPAO—LPAS3 at one time and assembles them into a splicing unit (the reason why | only LPAO-LPA3 read requests are received at one time instead of LPAO-LPA7 read | requests is the scheduling strategy of the module and the degree of saturation of | the requests), and there are two possible strategies for the processing of the | 5 splicing unit: © refresh immediately, refresh the splicing unit after receiving the | last sequential read request, that is, refresh the splicing unit after receiving the last | LPA3 sequential read request, and at this time, the splicing unit actually has only | Signal_PlaneRead of Block_Pagene0; and @ wait until the next request drives the | refresh (the request and the splicing unit do not conform to a Multi_ Plane splicing | 10 rule) or update (the sequential read request is added into the splicing unit) of the | splicing unit, that is, after receiving the last LPA3 sequential read request, the | waiting time is unknown. When the strategy © is adopted, it is possible that the | next batch of sequential read requests of LPA4-LPA7 will arrive later, the | Multi_PlaneRead that could have been Blockn and BlockmPageQ could be | 15 decomposed into Signal _PlaneRead of Block0Page0 and Signal PlaneRead of BlockmPage0, similarly, for LPAO-LPA7 read, the execution time of the NandFlash side is extended. After the strategy @ is adopted, since the waiting time is unknown, the LPAO-LPAS read requests that could have been completed during the waiting time have been waiting, which is a serious waste of performance. The ; 20 present patent introduces the time-out mechanism to control, records its time point at the same time when the splicing unit is newly generated. When the current splicing unit is waiting for more than a certain time, it will be refreshed and executed immediately.
[0021] Disclosed above is only one embodiment of the present invention, and of course, the scope of the claims of the present invention cannot be defined by this. Those of ordinary skill in the art can understand that all or part of the processes for implementing the above embodiments and equivalent changes made according to the claims of the present invention still fall within the scope covered by the present invention.
Claims (6)
1. À method for improving sequential read performance of a solid-state drive, characterized in that a splicing unit and a command judgment module are added in a read operation, the command judgment module judges whether commands within a certain interval belong to sequential read commands or not according to whether logical addresses of input read commands are continuous or not, and if they are, then a current sequential read request is added to the splicing unit, the read command is spliced according to a rule of writing, and after the splicing is completed, the read command of the same splicing unit accesses a storage unit in a parallel reading manner.
2. The method for improving sequential read performance of the solid-state drive according to claim 1, characterized in that before a newly generated sequential read command is added into a splicing unit, it is judged whether the new sequential read command and the existing splicing unit conform to splicing rules, and if it does, the new sequential read command is directly added into the splicing unit; and if it does not, the existing splicing unit is refreshed and executed and a new splicing unit is generated, and the sequential read command is added into the new splicing unit.
3. The method for improving sequential read performance of the solid-state drive according to claim 1, characterized by further comprising a timeout trigger module, which refreshes and executes the existing splicing unit when the splicing unit does not have a new read command added beyond a preset time.
4. A solid-state drive, characterized in that a splicing unit and a command judgment module are added in a read operation, the command judgment module judges whether commands within a certain interval belong to sequential read commands or not according to whether logical addresses of input read commands are continuous or not, and if they are, then a current sequential read request is added to the splicing unit, the read command is spliced according to a rule of writing, and after the splicing is completed, the read command of the same splicing unit
| BL-5138 | 8 lu101773 | accesses a storage unit in a parallel reading manner.
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5. The solid-state drive according to claim 4, characterized in that before a newly [ generated sequential read command is added into a splicing unit, it is judged | 5 whether the new sequential read command and the existing splicing unit conform to | splicing rules, and if it does, the new sequential read command is directly added | into the splicing unit; and if it does not, the existing splicing unit is refreshed and | executed and a new splicing unit is generated, and the sequential read command is | added into the new splicing unit.
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6. The solid-state drive according to claim 4, characterized by further comprising a ; timeout trigger module, which refreshes and executes the existing splicing unit | when the splicing unit does not have a new read command added beyond a preset | time.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811017961.8A CN109271107A (en) | 2018-09-01 | 2018-09-01 | A method of promoting solid state hard disk sequence reading performance |
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| LU101773B1 true LU101773B1 (en) | 2020-09-04 |
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| LU (1) | LU101773B1 (en) |
| WO (1) | WO2020042388A1 (en) |
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| CN112433672B (en) * | 2020-11-12 | 2023-01-06 | 苏州浪潮智能科技有限公司 | Solid state disk reading method and device |
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| CN100583059C (en) * | 2007-12-28 | 2010-01-20 | 祥硕科技股份有限公司 | Data access integration method and its system |
| CN102298508B (en) * | 2011-09-07 | 2014-08-06 | 记忆科技(深圳)有限公司 | Stream-based method and device for prereading solid state disk |
| KR20150020385A (en) * | 2013-08-13 | 2015-02-26 | 에스케이하이닉스 주식회사 | Data storage device, operating method thereof and data processing system including the same |
| CN104111894A (en) * | 2014-07-17 | 2014-10-22 | 记忆科技(深圳)有限公司 | Method for improving multi-partition sequential read-write performance and system thereof |
| CN106201774B (en) * | 2016-06-28 | 2020-11-06 | 中国人民解放军61660部队 | NAND FLASH storage chip data storage structure analysis method |
| CN108170380B (en) * | 2017-12-28 | 2021-02-05 | 深圳忆联信息系统有限公司 | Method for improving sequential reading performance of solid state disk and solid state disk |
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| WO2020042388A1 (en) | 2020-03-05 |
| CN109271107A (en) | 2019-01-25 |
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