WO2020039709A1 - Display device and integrated circuit module - Google Patents

Display device and integrated circuit module Download PDF

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Publication number
WO2020039709A1
WO2020039709A1 PCT/JP2019/023454 JP2019023454W WO2020039709A1 WO 2020039709 A1 WO2020039709 A1 WO 2020039709A1 JP 2019023454 W JP2019023454 W JP 2019023454W WO 2020039709 A1 WO2020039709 A1 WO 2020039709A1
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WO
WIPO (PCT)
Prior art keywords
terminal group
glass substrate
integrated circuit
display device
flexible substrate
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PCT/JP2019/023454
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French (fr)
Japanese (ja)
Inventor
英明 阿部
日向 章二
前田 謹一
鈴木 由幸
真弘 田口
Original Assignee
株式会社ジャパンディスプレイ
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Application filed by 株式会社ジャパンディスプレイ filed Critical 株式会社ジャパンディスプレイ
Publication of WO2020039709A1 publication Critical patent/WO2020039709A1/en

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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1345Conductors connecting electrodes to cell terminals
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09FDISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/14Structural association of two or more printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits

Definitions

  • the present invention relates to a display device and an integrated circuit module.
  • Patent Document 1 discloses connecting a flexible substrate (Flexible Printed Circuit (FPC) Board) on which a driver IC glass chip is mounted to a liquid crystal display.
  • the flexible substrate is connected to an end of the liquid crystal display, and is bent at its side toward the back surface.
  • the flexible substrate is provided so that the integrated circuit chip is located inside (the side of the liquid crystal display). For this reason, it is necessary to provide a gap between the integrated circuit chip and the liquid crystal display so that the chip does not come into contact with the liquid crystal display.
  • the base substrate of the flexible substrate needs to be made of a material suitable for bonding an integrated circuit chip.
  • a material suitable for bonding an integrated circuit chip has a large elastic force, so that it is difficult to make the flexible substrate bend tightly, and it is also difficult to bend locally. For this reason, the flexible substrate becomes large around the display and the size of the module cannot be reduced (narrow frame).
  • the present invention aims to make a display device smaller (narrower frame).
  • the display device has a display surface on which an image is displayed and a display panel having a back surface opposite to the display surface, and a first surface and a second surface opposite to the first surface, A first glass substrate that overlaps the display panel such that a first surface faces the back surface and has a wiring pattern on the second surface; and an integrated circuit chip mounted on the second surface of the first glass substrate.
  • the integrated circuit chip is mounted on the first glass substrate, the occurrence of warpage can be suppressed by the hardness of the first glass substrate.
  • a material having a small elastic force can be used in addition to a material suitable for mounting the integrated circuit chip. In that case, the flexible substrate can be bent tightly, so that the display device can be reduced in size (narrow frame).
  • FIG. 2 is a plan view of the display device in which the first flexible substrate shown in FIG. 1 is developed.
  • FIG. 3 is a diagram illustrating a circuit of a display panel.
  • FIG. 4 is a diagram illustrating a circuit configuration of a sub-pixel illustrated in FIG. 3.
  • FIG. 5 is a sectional view taken along line VV of the display panel shown in FIG. 2. It is a top view of a mounting glass substrate.
  • FIG. 3 is a perspective view of a first flexible substrate shown in FIG. 2.
  • FIG. 8 is an enlarged sectional view taken along line VIII-VIII of the integrated circuit module shown in FIG. 2. It is a figure showing the end of a display panel.
  • FIG. 1 is a plan view of the display device in which the first flexible substrate shown in FIG. 1 is developed.
  • FIG. 3 is a diagram illustrating a circuit of a display panel.
  • FIG. 4 is a diagram illustrating a circuit configuration of a sub-pixel illustrated in FIG. 3.
  • FIG. 5 is
  • FIG. 3 is a perspective view of a second flexible substrate shown in FIG. 2.
  • FIG. 4 is a diagram illustrating a method of manufacturing the integrated circuit module according to the embodiment.
  • FIG. 4 is a diagram illustrating a method of manufacturing the integrated circuit module according to the embodiment.
  • FIG. 4 is a diagram illustrating a method of manufacturing the integrated circuit module according to the embodiment.
  • FIG. 4 is a diagram illustrating a method of manufacturing the integrated circuit module according to the embodiment.
  • FIG. 11 is a diagram illustrating a method of manufacturing the integrated circuit module according to Modification Example 1 of the embodiment.
  • FIG. 11 is a diagram illustrating a method of manufacturing the integrated circuit module according to Modification Example 1 of the embodiment.
  • FIG. 1 is a diagram illustrating a method of manufacturing the integrated circuit module according to Modification Example 1 of the embodiment.
  • FIG. 11 is a diagram illustrating a method of manufacturing the integrated circuit module according to Modification Example 1 of the embodiment.
  • FIG. 11 is a diagram illustrating a method of manufacturing the integrated circuit module according to Modification 2 of the embodiment.
  • FIG. 15 is a diagram illustrating a method of manufacturing the integrated circuit module according to Modification 3 of the embodiment.
  • ⁇ above '' and ⁇ below '' are only when located directly above or directly below a certain component. Unless otherwise specified, it is intended to include the case where another component is further interposed therebetween.
  • FIG. 1 is a schematic cross-sectional view of the display device according to the embodiment.
  • the display device has a display panel 10, a backlight module 68, and an integrated circuit module 70.
  • the first flexible substrate 98 included in the integrated circuit module 70 is bent.
  • FIG. 2 is a plan view of the display device in which the first flexible substrate 98 shown in FIG. 1 is developed.
  • FIG. 3 is a diagram illustrating a circuit of the display panel 10.
  • the display panel 10 is a liquid crystal display panel in the present embodiment.
  • the display panel 10 includes a display area DA for displaying an image, and a peripheral area PA outside the display area DA.
  • the peripheral area PA surrounds the display area DA and has a frame shape.
  • the display panel 10 includes a plurality of sub-pixels SP in the display area DA.
  • the plurality of sub-pixels SP are arranged in a matrix in the first direction X and the second direction Y. In the present embodiment, one pixel is constituted by three sub-pixels SP adjacent in the first direction X.
  • the display panel 10 includes a plurality of scanning lines 12 and a plurality of signal lines 14.
  • the scanning lines 12 extend in the first direction X and are arranged at intervals in the second direction Y.
  • the signal lines 14 extend in the second direction Y and are arranged at intervals in the first direction X. Note that the scanning lines 12 and the signal lines 14 do not necessarily extend linearly, and some of them may be bent.
  • the scanning line 12 is connected to a scanning drive circuit GD.
  • the signal line 14 is connected to the signal drive circuit SD.
  • FIG. 4 is a diagram showing a circuit configuration of the sub-pixel SP shown in FIG.
  • the sub-pixel SP includes a thin film transistor 16 arranged near a position where the scanning line 12 and the signal line 14 intersect.
  • the thin film transistor 16 is electrically connected to the scanning line 12 and the signal line 14.
  • the scanning line 12 is connected to the thin film transistors 16 in each of the sub-pixels SP arranged in the first direction X shown in FIG.
  • the signal line 14 is connected to the thin film transistor 16 in each of the sub-pixels SP arranged in the second direction Y shown in FIG.
  • the thin film transistor 16 is further electrically connected to the pixel electrode 18.
  • the pixel electrode 18 faces the common electrode 20 and drives the liquid crystal layer 22 by an electric field generated between the pixel electrode 18 and the common electrode 20.
  • the common electrode 20 is connected to the common drive circuit CD shown in FIG. 3 and is arranged over a plurality of sub-pixels SP.
  • the storage capacitor CS is formed between the common electrode 20 and the pixel electrode 18, for example.
  • the scanning lines 12 extend in the first direction X and are arranged at intervals in the second direction Y
  • the signal lines 14 extend in the second direction Y and are arranged at intervals in the first direction X.
  • the pixel electrodes 18 are arranged in a region surrounded by the scanning lines 12 and the signal lines 14.
  • FIG. 5 is a cross-sectional view taken along line VV of the display panel 10 shown in FIG.
  • the display panel 10 has a TFT glass substrate 24.
  • the circuit layer 26 is laminated on the TFT glass substrate 24.
  • the circuit layer 26 includes the thin film transistor 16.
  • the thin film transistor 16 includes a semiconductor layer 28, a gate electrode 30, and a first insulating film 32 including a portion interposed therebetween as a gate insulating film.
  • a second insulating film is stacked on the first insulating film 32 so as to cover the gate electrode 30.
  • a drain electrode 38 is provided so as to be connected to the semiconductor layer 28 via a contact hole 36 penetrating the second insulating film 34.
  • a third insulating film 40 is stacked on the second insulating film 34 so as to cover the drain electrode 38.
  • a light shielding film 42 made of, for example, metal is provided on the TFT glass substrate 24 in order to prevent malfunction due to light.
  • a base insulating film 44 is stacked on the TFT glass substrate 24 so as to cover the light shielding film 42, and the semiconductor layer 28 is provided on the base insulating film 44.
  • the circuit layer 26 has the signal line 14 (FIG. 3) formed in the same layer as the drain electrode 38, and the scanning line 12 (FIG. 3) formed in the same layer as the gate electrode 30.
  • the plurality of signal lines 14 are arranged at intervals in the first direction X, and are arranged between the plurality of pixel electrodes 18 in the display area DA.
  • the source electrode (not shown) of the thin film transistor 16 is formed integrally with the signal line 14 (see FIG. 4).
  • the common electrode 20 is arranged on the circuit layer 26 so as to be stacked on the third insulating film 40.
  • the common electrode 20 is formed over a plurality of sub-pixels SP.
  • a fourth insulating film 46 is stacked on the third insulating film 40 so as to cover the common electrode 20.
  • the plurality of pixel electrodes 18 are stacked on the fourth insulating film 46.
  • the pixel electrode 18 has a contact portion 48 penetrating through the fourth insulating film 46 and connecting to the drain electrode 38.
  • the first alignment film 50 is stacked so as to cover the plurality of pixel electrodes 18.
  • the pixel electrode 18 is formed above the common electrode 20 and has a plurality of slits (not shown).
  • the display panel 10 has the opposite glass substrate 52.
  • the opposite glass substrate 52 is provided with a black matrix 54 and a color filter layer 56, and is covered with an overcoat layer 58 on the lower side.
  • the second alignment film 60 is stacked so as to cover the overcoat layer 58.
  • the black matrix 54 is disposed between the counter glass substrate 52 and the color filter layer 56, but may be disposed between the color filter layer 56 and the overcoat layer 58. Alternatively, it may be disposed between the overcoat layer 58 and the second alignment film 60.
  • the liquid crystal layer 22 is interposed between the first alignment film 50 and the second alignment film 60.
  • the cell gap is held by the plurality of spacers 62.
  • the plurality of spacers 62 are located between the first alignment film 50 and the overcoat layer 58.
  • a spacer 62 is provided on the overcoat layer 58, and a second alignment film 60 is formed so as to cover the overcoat layer 58 and the spacer 62.
  • the first alignment film 50 and the spacer 62 may be in contact with each other, or the second alignment film 60 may be interposed between them.
  • a lateral electric field driving method in which the common electrode 20 and the pixel electrode 18 are located on the TFT glass substrate 24 side of the display panel 10 is adopted.
  • the display panel 10 has a display surface 64 on which an image is displayed and a back surface 66 opposite thereto.
  • the display device has a backlight module 68 on the back surface 66 side of the display panel 10.
  • the backlight module 68 includes a light source such as an LED (Light Emitting Diode), a light guide plate, an optical film, a diffusion plate, a reflection plate, and a frame.
  • the point light source is converted into a surface light source by the light guide plate.
  • the integrated circuit module 70 has a mounting glass substrate 72.
  • the mounting glass substrate 72 has a first surface 74 and a second surface 76 opposite thereto.
  • the mounting glass substrate 72 overlaps the display panel 10 such that the first surface 74 faces the back surface 66 of the display panel 10.
  • the mounting glass substrate 72 is below the backlight module 68. Even though the mounting glass substrate 72 is indirectly fixed to the display panel 10, it is not directly fixed.
  • FIG. 6 is a plan view of the mounting glass substrate 72.
  • the mounting glass substrate 72 has a first end 78 and a second end 80 on both sides in the length direction L.
  • the mounting glass substrate 72 has a wiring pattern 82 on the second surface 76.
  • the wiring pattern 82 includes a first terminal group 84.
  • the first terminal group 84 is arranged at the first end portion 78 in the width direction W orthogonal to the length direction L.
  • the first terminal group 84 extends radially along a plurality of straight lines intersecting each other at one point P1. For example, set the reference line L R to the center in the width direction W of the mounting glass substrate 72, on both sides of the reference line L R, a first terminal group 84 are arranged.
  • One point P1 is on the side of the first end portion 78 and outside the mounting glass substrate 72. Therefore, the first terminal group 84 is inclined outwardly so as to approach each other. As a modification, the first terminal group 84 may be inclined outward and away from each other. One point in that case is on the side of the second end portion 80 and outside the mounting glass substrate 72.
  • the first terminal group 84 is arranged so that the interval between adjacent terminals is equal. On the other hand, the first terminal group 84 is unequal in width orthogonal to the length (the length in the direction along the plurality of straight lines). Width is wider farther from the reference line L R. Therefore, the first terminal groups 84 are arranged at an uneven pitch. Pitch is wider farther from the reference line L R. The maximum pitch is 1.1 to 2 times the minimum pitch.
  • the wiring pattern 82 includes a second terminal group 86.
  • the second terminal group 86 is arranged at the second end 80 in the width direction W.
  • the second terminal groups 86 extend parallel to each other along the length direction L.
  • the second terminal groups 86 are arranged at an equal pitch.
  • the second terminal group 86 may extend radially along a plurality of straight lines that cross each other at one point.
  • the wiring pattern 82 includes a first wiring group 88.
  • the first wiring group 88 extends from the first terminal group 84 to the mounting region MR.
  • the wiring pattern 82 includes a second wiring group 90.
  • the second wiring group 90 extends from the second terminal group 86 to the mounting region MR.
  • the mounting glass substrate 72 has first alignment marks 92 (for example, negative marks) on both sides of the first terminal group 84 in the width direction W.
  • the first alignment mark 92 sandwiches the first terminal group 84.
  • the first alignment mark 92 is used for positioning the mounting glass substrate 72 and the first flexible substrate 98 (FIG. 2).
  • the outermost first terminal 84 is branched so as to draw a scale line, which is also used for alignment.
  • the mounting glass substrate 72 has second alignment marks 94 on both sides of the second terminal group 86 in the width direction W.
  • the second alignment mark 94 sandwiches the second terminal group 86.
  • the second alignment mark 94 is a recognition mark for visually checking the position of the mounting glass substrate 72.
  • the mounting glass substrate 72 is thinner than the TFT glass substrate 24 of the display panel 10 (FIG. 5). Note that the same technical effects as those of the embodiment can be achieved by using a PCB (Printed Circuit Board) having a fine pitch wiring pattern instead of the mounting glass substrate 72.
  • PCB Printed Circuit Board
  • the mounting glass substrate 72 has a mounting region MR between the first end 78 and the second end 80.
  • the integrated circuit chip 96 shown in FIG. 2 is mounted on the mounting area MR.
  • the integrated circuit chip 96 is electrically connected to the first wiring group 88 and the second wiring group 90.
  • the glass constituting the mounting glass substrate 72 has higher hardness than resin. Therefore, the mounting glass substrate 72 is suitable for mounting the integrated circuit chip 96 even if it is thin. For example, even if the integrated circuit chip 96 is warped, the mounting glass substrate 72 can resist the stress. In addition, if there is a technology for mounting the integrated circuit chip 96 on a glass substrate, a technology for mounting the integrated circuit chip 96 on a flexible substrate is not required.
  • the mounting region MR is on the second surface 76 of the mounting glass substrate 72 (the side opposite to the display panel 10 and the backlight module 68), as shown in FIG. It does not intervene between the display panels 10 (backlight module 68). Therefore, the mounting glass substrate 72 can be brought closer to the display panel 10 (the backlight module 68), and the display device can be reduced in size (narrow frame).
  • the integrated circuit module 70 has a first flexible substrate 98.
  • the first flexible substrate 98 is electrically connected to the display panel 10 and the mounting glass substrate 72 and is bent. Since the first flexible substrate 98 does not have the integrated circuit chip 96 mounted thereon, it is possible to select a material (resin) that does not satisfy the requirement therefor. Can be done. Thus, the display device can be reduced in size (narrow frame).
  • FIG. 7 is a perspective view of the first flexible substrate 98 shown in FIG.
  • the first flexible substrate 98 has a third end 100 and a fourth end 102 on both sides in the length direction L.
  • the first flexible substrate 98 has a first wiring pattern 104.
  • the first wiring pattern 104 includes a third terminal group 106.
  • the third terminal group 106 is arranged in the width direction W orthogonal to the length direction L at the third end 100.
  • the third terminal group 106 extends radially along a plurality of straight lines intersecting each other at one point P3. For example, it sets the reference line L R is the center in the width direction W of the first flexible substrate 98, on both sides of the reference line L R, the third terminal group 106 are arranged.
  • One point P3 is on the side of the fourth end 102 opposite to the third end 100 where the third terminal group 106 is provided, and is outside the first flexible substrate 98. Therefore, the third terminal group 106 is inclined outwardly away from each other. This shape is symmetric with the first terminal group 84 (FIG. 6) described above. As a modification, similarly to the first terminal group 84, the third terminal group 106 may be inclined so as to approach each other outward. One point in that case is on the third end 100 side and outside the first flexible substrate 98.
  • the third terminal group 106 is uniform in width orthogonal to the length (the direction along the plurality of straight lines). On the other hand, the third terminal groups 106 are arranged such that the intervals between adjacent terminals are unequal. Interval is wider farther from the reference line L R. Therefore, the third terminal groups 106 are arranged at an uneven pitch. Pitch is wider farther from the reference line L R. The maximum pitch is 1.1 to 2 times the minimum pitch.
  • the first wiring pattern 104 includes the fourth terminal group 108.
  • the fourth terminal group 108 is arranged in the width direction W at the fourth end 102.
  • the fourth terminal group 108 extends radially along a plurality of straight lines intersecting each other at one point P4.
  • the details of the third terminal group 106 correspond to the fourth terminal group 108.
  • the first wiring pattern 104 includes a third wiring group 110.
  • the third wiring group 110 connects the third terminal group 106 and the fourth terminal group 108, respectively.
  • the first flexible substrate 98 has third alignment marks 112 (for example, positive marks) on both sides of the third terminal group 106 in the width direction W.
  • third alignment marks 112 for example, positive marks
  • the outermost third terminal is branched so as to draw a scale line, which is also used for alignment.
  • the third alignment mark 112 sandwiches the third terminal group 106.
  • the first flexible substrate 98 has fourth alignment marks 114 (for example, positive marks) on both sides of the fourth terminal group 108 in the width direction W.
  • the outermost fourth terminal 108 is branched so as to draw a scale line, which is also used for alignment.
  • the fourth alignment mark 114 sandwiches the fourth terminal group 108.
  • FIG. 8 is an enlarged cross-sectional view taken along line VIII-VIII of the integrated circuit module 70 shown in FIG.
  • the third terminal group 106 of the first flexible substrate 98 is connected to the first terminal group 84 of the mounting glass substrate 72, respectively.
  • an anisotropic conductive film 116 in which fine metal particles are mixed with a thermosetting resin is used.
  • the first terminal group 84 has an equal pitch between the adjacent terminals, but has an uneven pitch because of an uneven width.
  • the third terminal group 106 is uniform in width, but has an uneven pitch because the distance between adjacent terminals is uneven. Any pitch, large enough distance from the reference line L R.
  • the first flexible substrate 98 has a larger coefficient of thermal expansion than the mounting glass substrate 72.
  • the positions of the first terminal group 84 and the third terminal group 106 are shifted.
  • a point P1 (FIG. 6) at which a plurality of straight lines extending along the first terminal group 84 respectively intersects with a point P3 (FIG. 7) at which a plurality of straight lines extending along the third terminal group 106 intersect.
  • the positions of the first terminal group 84 and the third terminal group 106 can be adjusted by relatively moving the first flexible substrate 98 and the mounting glass substrate 72 so that the points P1 and P3 coincide. . That is, the first flexible substrate 98 and the mounting glass substrate 72 may be relatively moved in a direction toward or away from each other.
  • the first flexible substrate 98 is connected to the display panel 10.
  • the details correspond to the description of the connection between the first flexible substrate 98 and the mounting glass substrate 72.
  • FIG. 9 is a diagram showing an end of the display panel 10.
  • the display panel 10 has a TFT glass substrate 24. As shown in FIG. 5, a circuit including the thin film transistor 16 is formed on the TFT glass substrate 24.
  • the display panel 10 (TFT glass substrate 24) has an external terminal group 118.
  • the external terminal group 118 extends radially along a plurality of straight lines intersecting each other at one point Px. The details of the external terminal group 118 correspond to the description of the first terminal group 84 shown in FIG.
  • the display panel 10 has alignment marks 120 (for example, negative marks) on both sides of the external terminal group 118 in the width direction W.
  • the display panel 10 and the first flexible substrate 98 are aligned.
  • the fourth terminal group 108 of the first flexible substrate 98 is electrically connected to the external terminal group 118 of the display panel 10.
  • FIG. 10 is a perspective view of the second flexible substrate 122 shown in FIG.
  • the integrated circuit module 70 has a second flexible substrate 122.
  • the second flexible board 122 has a second wiring pattern 124.
  • the second wiring pattern 124 includes several terminals 124 ⁇ / b> A for electrically connecting to the second terminal group 86 of the mounting glass substrate 72.
  • the second wiring pattern 124 includes some other terminals 124B for connecting to a circuit board (not shown) (for example, PCB: Printed Circuit Board).
  • the second wiring pattern 124 includes some other terminals 124C for connecting to the third flexible substrate 126 (FIG. 2) connected to the backlight module 68.
  • the second flexible substrate 122 is fixed (adhered) to the backlight module 68 (frame (not shown)).
  • the mounting glass substrate 72 is indirectly fixed to the backlight module 68.
  • a backlight module 68 is provided between the display panel 10 and the mounting glass substrate 72 and the second flexible substrate 122.
  • the integrated circuit chip 96 is mounted on the mounting glass substrate 72, it is possible to suppress the occurrence of warpage due to the hardness of the mounting glass substrate 72.
  • a material having a small elastic force can be used for the first flexible substrate 98. In that case, the first flexible substrate 98 can be bent tightly, so that the display device can be reduced in size (narrow frame).
  • FIG. 11 to 14 are views showing a method for manufacturing an integrated circuit module according to the embodiment.
  • multiple mounting of the mounting glass substrate 72 is performed.
  • the wiring patterns 82 corresponding to the plurality of mounting glass substrates 72 are formed on the mother glass substrate 128 (FIG. 11), and the individual mounting glass substrates 72 are cut from the mother glass substrate 128 (FIG. 12).
  • the integrated circuit chip 96 is mounted on the mounting glass substrate 72 (FIG. 13), and the first flexible substrate 98 and the second flexible substrate 122 are connected to the mounting glass substrate 72 (FIG. 14).
  • FIGS. 15 to 17 are views showing a method of manufacturing an integrated circuit module according to Modification 1 of the embodiment.
  • a plurality of integrated circuit chips 96 are mounted on the mother glass substrate 128 so as to be arranged in a plurality of rows and a plurality of columns (FIG. 15).
  • FIG. 16 an assembly 130 in which the mounting glass substrates 72 arranged in a line are integrated is cut out from the mother glass substrate 128.
  • the adjacent mounting glass substrates 72 are integrated at a portion not related to the connection between the first flexible substrate 98 and the second flexible substrate 122.
  • the first flexible substrate 98 and the second flexible substrate 122 are connected to the respective mounting glass substrates 72. Note that either the first flexible substrate 98 or the second flexible substrate 122 may be connected first.
  • the assembly 130 is cut into individual mounting glass substrates 72.
  • FIG. 18 is a diagram illustrating the method of manufacturing the integrated circuit module according to the second modification of the embodiment.
  • a chip bonder (not shown) for mounting a chip corresponds to a substrate of a certain size or more (at least 20 mm square), and mounts the chip at a position close to one side of the substrate. Therefore, as shown in FIG. 18, a glass substrate 132 larger than the size of the mounting glass substrate 72 is prepared, the wiring pattern 82 is formed, and the integrated circuit chip 96 is mounted by a chip bonder. Thereafter, unnecessary portions are cut and removed.
  • FIG. 19 is a diagram illustrating the method of manufacturing the integrated circuit module according to Modification 3 of the embodiment.
  • the wiring patterns of the TFT glass substrate 24 and the mounting glass substrate 72 are mixedly formed on the mother glass substrate 128, and thereafter, these are cut.
  • the mounting of the integrated circuit chip 96 on the mounting glass substrate 72 is performed after cutting.
  • the present invention is not limited to the embodiments described above, and various modifications are possible.
  • the configuration described in the embodiment can be replaced with a configuration having substantially the same configuration, a configuration having the same operation and effect, or a configuration capable of achieving the same object.

Abstract

This display device includes: a display surface (64) on which images are displayed; a display panel (10) having a rear surface (66) which is opposite to the display surface (64); a mounting glass substrate (72) having a first surface (74) and a second surface (76) which is opposite to the first surface (74), the first surface (74) overlapping the display panel (10) so as to face the rear surface (66) and the second surface (76) having a wiring pattern (82); an integrated circuit chip (96) mounted on the second surface (76) of the mounting glass substrate (72); and a first flexible substrate (98) which bends and is electrically connected to the display panel (10) and to the mounting glass substrate (72), and which has a first wiring pattern (104).

Description

表示装置及び集積回路モジュールDisplay device and integrated circuit module
 本発明は、表示装置及び集積回路モジュールに関する。 << The present invention relates to a display device and an integrated circuit module.
 液晶ディスプレイなどの表示ディスプレイにドライバIC(Integrated Circuit)を接続するために、COF(Chip on Flexible)が適用されている。例えば、特許文献1には、ドライバICガラスチップが実装されたフレキシブル基板(Flexible Printed Circuit (FPC) Board)を、液晶ディスプレイに接続することが開示されている。フレキシブル基板は、液晶ディスプレイの端部に接続されて、その側方で、裏面に向けて折り曲げられている。 (4) COF (Chip on Flexible) is applied to connect a driver IC (Integrated Circuit) to a display such as a liquid crystal display. For example, Patent Document 1 discloses connecting a flexible substrate (Flexible Printed Circuit (FPC) Board) on which a driver IC glass chip is mounted to a liquid crystal display. The flexible substrate is connected to an end of the liquid crystal display, and is bent at its side toward the back surface.
特開平11-064881号公報JP-A-11-064881
 特許文献1では、集積回路チップが内側(液晶ディスプレイの側)に位置するように、フレキシブル基板が設けられる。そのため、集積回路チップが液晶ディスプレイに接触しないように、両者間には隙間を設ける必要があり、モジュールの小型化を妨げていた。 で は In Patent Document 1, the flexible substrate is provided so that the integrated circuit chip is located inside (the side of the liquid crystal display). For this reason, it is necessary to provide a gap between the integrated circuit chip and the liquid crystal display so that the chip does not come into contact with the liquid crystal display.
 COFを適用するには、フレキシブル基板のベース基板が、集積回路チップのボンディングに適した材料からなる必要がある。しかし、そのような材料は弾性力が大きく、フレキシブル基板の曲がり具合をきつくすることが難しく、局所的な折り曲げも難しい。そのため、表示ディスプレイの周囲で、フレキシブル基板が大きくなってしまい、モジュールの小型化(狭額縁)を図ることができなかった。 In order to apply COF, the base substrate of the flexible substrate needs to be made of a material suitable for bonding an integrated circuit chip. However, such a material has a large elastic force, so that it is difficult to make the flexible substrate bend tightly, and it is also difficult to bend locally. For this reason, the flexible substrate becomes large around the display and the size of the module cannot be reduced (narrow frame).
 本発明は、表示装置の小型化(狭額縁)を可能にすることを目的とする。 The present invention aims to make a display device smaller (narrower frame).
 本発明に係る表示装置は、画像が表示される表示面及び前記表示面とは反対の裏面を有する表示パネルと、第1面及び前記第1面とは反対の第2面を有し、前記第1面が前記裏面に対向するように前記表示パネルに重なり、前記第2面に配線パターンを有する第1ガラス基板と、前記第1ガラス基板の前記第2面に搭載された集積回路チップと、前記表示パネルと前記第1ガラス基板に電気的に接続して屈曲する、配線パターンを有するフレキシブル基板と、を有することを特徴とする。 The display device according to the present invention has a display surface on which an image is displayed and a display panel having a back surface opposite to the display surface, and a first surface and a second surface opposite to the first surface, A first glass substrate that overlaps the display panel such that a first surface faces the back surface and has a wiring pattern on the second surface; and an integrated circuit chip mounted on the second surface of the first glass substrate. A flexible substrate having a wiring pattern, which is electrically connected to the display panel and the first glass substrate and bends.
 本発明によれば、集積回路チップは、第1ガラス基板に搭載されているので、第1ガラス基板の硬さによって反りの発生を抑制することができる。また、フレキシブル基板には、集積回路チップの実装に適した材料以外に、弾性力の小さい材料を使用することができる。その場合、フレキシブル基板をきつく曲げることができるので、表示装置の小型化(狭額縁)が可能になる。 According to the present invention, since the integrated circuit chip is mounted on the first glass substrate, the occurrence of warpage can be suppressed by the hardness of the first glass substrate. Further, for the flexible substrate, a material having a small elastic force can be used in addition to a material suitable for mounting the integrated circuit chip. In that case, the flexible substrate can be bent tightly, so that the display device can be reduced in size (narrow frame).
実施形態に係る表示装置の概略断面図である。It is a schematic sectional view of the display concerning an embodiment. 図1に示す第1フレキシブル基板を展開した表示装置の平面図である。FIG. 2 is a plan view of the display device in which the first flexible substrate shown in FIG. 1 is developed. 表示パネルの回路を示す図である。FIG. 3 is a diagram illustrating a circuit of a display panel. 図3に示す副画素の回路構成を示す図である。FIG. 4 is a diagram illustrating a circuit configuration of a sub-pixel illustrated in FIG. 3. 図2に示す表示パネルのV-V線断面図である。FIG. 5 is a sectional view taken along line VV of the display panel shown in FIG. 2. 実装ガラス基板の平面図である。It is a top view of a mounting glass substrate. 図2に示す第1フレキシブル基板の透視図である。FIG. 3 is a perspective view of a first flexible substrate shown in FIG. 2. 図2に示す集積回路モジュールのVIII-VIII線断面拡大図である。FIG. 8 is an enlarged sectional view taken along line VIII-VIII of the integrated circuit module shown in FIG. 2. 表示パネルの端部を示す図である。It is a figure showing the end of a display panel. 図2に示す第2フレキシブル基板の透視図である。FIG. 3 is a perspective view of a second flexible substrate shown in FIG. 2. 実施形態に係る集積回路モジュールの製造方法を示す図である。FIG. 4 is a diagram illustrating a method of manufacturing the integrated circuit module according to the embodiment. 実施形態に係る集積回路モジュールの製造方法を示す図である。FIG. 4 is a diagram illustrating a method of manufacturing the integrated circuit module according to the embodiment. 実施形態に係る集積回路モジュールの製造方法を示す図である。FIG. 4 is a diagram illustrating a method of manufacturing the integrated circuit module according to the embodiment. 実施形態に係る集積回路モジュールの製造方法を示す図である。FIG. 4 is a diagram illustrating a method of manufacturing the integrated circuit module according to the embodiment. 実施形態の変形例1に係る集積回路モジュールの製造方法を示す図である。FIG. 11 is a diagram illustrating a method of manufacturing the integrated circuit module according to Modification Example 1 of the embodiment. 実施形態の変形例1に係る集積回路モジュールの製造方法を示す図である。FIG. 11 is a diagram illustrating a method of manufacturing the integrated circuit module according to Modification Example 1 of the embodiment. 実施形態の変形例1に係る集積回路モジュールの製造方法を示す図である。FIG. 11 is a diagram illustrating a method of manufacturing the integrated circuit module according to Modification Example 1 of the embodiment. 実施形態の変形例2に係る集積回路モジュールの製造方法を示す図である。FIG. 11 is a diagram illustrating a method of manufacturing the integrated circuit module according to Modification 2 of the embodiment. 実施形態の変形例3に係る集積回路モジュールの製造方法を示す図である。FIG. 15 is a diagram illustrating a method of manufacturing the integrated circuit module according to Modification 3 of the embodiment.
 以下、本発明の実施形態について図面を参照して説明する。但し、本発明は、その要旨を逸脱しない範囲において様々な態様で実施することができ、以下に例示する実施形態の記載内容に限定して解釈されるものではない。 Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, the present invention can be carried out in various modes without departing from the gist of the present invention, and is not to be construed as being limited to the description of the embodiments exemplified below.
 図面は、説明をより明確にするため、実際の態様に比べ、各部の幅、厚さ、形状等について模式的に表される場合があるが、あくまで一例であって、本発明の解釈を限定するものではない。本明細書と各図において、既出の図に関して説明したものと同様の機能を備えた要素には、同一の符号を付して、重複する説明を省略することがある。 The drawings may be schematically illustrated in terms of width, thickness, shape, and the like of each portion as compared with actual embodiments in order to make the description clearer, but are merely examples, and the interpretation of the present invention is limited. It does not do. In the present specification and each drawing, elements having the same functions as those described in relation to the already described drawings are denoted by the same reference numerals, and redundant description may be omitted.
 さらに、本発明の詳細な説明において、ある構成物と他の構成物の位置関係を規定する際、「上に」「下に」とは、ある構成物の直上あるいは直下に位置する場合のみでなく、特に断りの無い限りは、間にさらに他の構成物を介在する場合を含むものとする。 Furthermore, in the detailed description of the present invention, when defining the positional relationship between a certain component and another component, `` above '' and `` below '' are only when located directly above or directly below a certain component. Unless otherwise specified, it is intended to include the case where another component is further interposed therebetween.
 図1は、実施形態に係る表示装置の概略断面図である。表示装置は、表示パネル10、バックライトモジュール68及び集積回路モジュール70を有する。集積回路モジュール70に含まれる第1フレキシブル基板98は屈曲している。図2は、図1に示す第1フレキシブル基板98を展開した表示装置の平面図である。 FIG. 1 is a schematic cross-sectional view of the display device according to the embodiment. The display device has a display panel 10, a backlight module 68, and an integrated circuit module 70. The first flexible substrate 98 included in the integrated circuit module 70 is bent. FIG. 2 is a plan view of the display device in which the first flexible substrate 98 shown in FIG. 1 is developed.
[表示パネル]
 図3は、表示パネル10の回路を示す図である。表示パネル10は、本実施形態では、液晶表示パネルである。表示パネル10は、画像を表示する表示領域DAと、表示領域DAの外側の周辺領域PAと、を備えている。例えば、周辺領域PAは、表示領域DAを囲み、額縁状の形状を有している。表示パネル10は、表示領域DAにおいて、複数の副画素SPを備えている。複数の副画素SPは、第1方向X及び第2方向Yにマトリクス状に配置されている。本実施形態においては、第1方向Xに隣り合う3個の副画素SPで1つの画素を構成する。
[Display panel]
FIG. 3 is a diagram illustrating a circuit of the display panel 10. The display panel 10 is a liquid crystal display panel in the present embodiment. The display panel 10 includes a display area DA for displaying an image, and a peripheral area PA outside the display area DA. For example, the peripheral area PA surrounds the display area DA and has a frame shape. The display panel 10 includes a plurality of sub-pixels SP in the display area DA. The plurality of sub-pixels SP are arranged in a matrix in the first direction X and the second direction Y. In the present embodiment, one pixel is constituted by three sub-pixels SP adjacent in the first direction X.
 表示パネル10は、複数の走査線12、複数の信号線14を備えている。走査線12は、各々第1方向Xに延出し、第2方向Yに間隔を置いて配置されている。信号線14は、各々第2方向Yに延出し、第1方向Xに間隔を置いて配置されている。なお、走査線12及び信号線14は、必ずしも直線的に延出していなくてもよく、それらの一部が屈曲していてもよい。走査線12は、走査駆動回路GDに接続されている。信号線14は、信号駆動回路SDに接続されている。 The display panel 10 includes a plurality of scanning lines 12 and a plurality of signal lines 14. The scanning lines 12 extend in the first direction X and are arranged at intervals in the second direction Y. The signal lines 14 extend in the second direction Y and are arranged at intervals in the first direction X. Note that the scanning lines 12 and the signal lines 14 do not necessarily extend linearly, and some of them may be bent. The scanning line 12 is connected to a scanning drive circuit GD. The signal line 14 is connected to the signal drive circuit SD.
 図4は、図3に示す副画素SPの回路構成を示す図である。副画素SPは、走査線12及び信号線14が交差する位置近傍に配置された薄膜トランジスタ16を備えている。薄膜トランジスタ16は、走査線12及び信号線14と電気的に接続されている。走査線12は、図3に示す第1方向Xに並んだ副画素SPの各々における薄膜トランジスタ16と接続されている。信号線14は、図3に示す第2方向Yに並んだ副画素SPの各々における薄膜トランジスタ16と接続されている。 FIG. 4 is a diagram showing a circuit configuration of the sub-pixel SP shown in FIG. The sub-pixel SP includes a thin film transistor 16 arranged near a position where the scanning line 12 and the signal line 14 intersect. The thin film transistor 16 is electrically connected to the scanning line 12 and the signal line 14. The scanning line 12 is connected to the thin film transistors 16 in each of the sub-pixels SP arranged in the first direction X shown in FIG. The signal line 14 is connected to the thin film transistor 16 in each of the sub-pixels SP arranged in the second direction Y shown in FIG.
 薄膜トランジスタ16は、さらに画素電極18と電気的に接続されている。画素電極18は、共通電極20と対向し、画素電極18と共通電極20との間に生じる電界によって液晶層22を駆動する。共通電極20は、図3に示す共通駆動回路CDに接続されて、複数の副画素SPにわたって配置されている。保持容量CSは、例えば、共通電極20と画素電極18との間に形成される。 (4) The thin film transistor 16 is further electrically connected to the pixel electrode 18. The pixel electrode 18 faces the common electrode 20 and drives the liquid crystal layer 22 by an electric field generated between the pixel electrode 18 and the common electrode 20. The common electrode 20 is connected to the common drive circuit CD shown in FIG. 3 and is arranged over a plurality of sub-pixels SP. The storage capacitor CS is formed between the common electrode 20 and the pixel electrode 18, for example.
 走査線12は第1方向Xに延出し、第2方向Yに間隔を置いて配置され、信号線14は第2方向Yに延出し、第1方向Xに間隔を置いて配置されている。図示した例では、画素電極18は、走査線12と信号線14とで囲まれた領域に配置されている。 The scanning lines 12 extend in the first direction X and are arranged at intervals in the second direction Y, and the signal lines 14 extend in the second direction Y and are arranged at intervals in the first direction X. In the illustrated example, the pixel electrodes 18 are arranged in a region surrounded by the scanning lines 12 and the signal lines 14.
 図5は、図2に示す表示パネル10のV-V線断面図である。表示パネル10は、TFTガラス基板24を有する。TFTガラス基板24上に回路層26が積層している。回路層26は、薄膜トランジスタ16を含む。薄膜トランジスタ16は、半導体層28及びゲート電極30並びにこれらの間にゲート絶縁膜として介在する部分を含む第1絶縁膜32を有する。ゲート電極30を覆うように、第1絶縁膜32上に第2絶縁膜34が積層する。第2絶縁膜34を貫通するコンタクトホール36を介して半導体層28に接続するように、ドレイン電極38が設けられている。ドレイン電極38を覆うように、第2絶縁膜34上に第3絶縁膜40が積層する。 FIG. 5 is a cross-sectional view taken along line VV of the display panel 10 shown in FIG. The display panel 10 has a TFT glass substrate 24. The circuit layer 26 is laminated on the TFT glass substrate 24. The circuit layer 26 includes the thin film transistor 16. The thin film transistor 16 includes a semiconductor layer 28, a gate electrode 30, and a first insulating film 32 including a portion interposed therebetween as a gate insulating film. A second insulating film is stacked on the first insulating film 32 so as to cover the gate electrode 30. A drain electrode 38 is provided so as to be connected to the semiconductor layer 28 via a contact hole 36 penetrating the second insulating film 34. A third insulating film 40 is stacked on the second insulating film 34 so as to cover the drain electrode 38.
 薄膜トランジスタ16の下には、光による誤作動を防止するため、例えば金属からなる遮光膜42がTFTガラス基板24上に設けられている。遮光膜42を覆うように下地絶縁膜44がTFTガラス基板24上に積層され、下地絶縁膜44の上に半導体層28が設けられている。 (4) Under the thin film transistor 16, a light shielding film 42 made of, for example, metal is provided on the TFT glass substrate 24 in order to prevent malfunction due to light. A base insulating film 44 is stacked on the TFT glass substrate 24 so as to cover the light shielding film 42, and the semiconductor layer 28 is provided on the base insulating film 44.
 回路層26は、ドレイン電極38と同層に形成された信号線14(図3)と、ゲート電極30と同層に形成された走査線12(図3)を有する。信号線14は、第1方向Xに間隔を置いて複数配置されており、表示領域DAにおいては、複数の画素電極18の間に配置されている。薄膜トランジスタ16のソース電極(図示せず)は、信号線14と一体的に形成されている(図4参照)。 The circuit layer 26 has the signal line 14 (FIG. 3) formed in the same layer as the drain electrode 38, and the scanning line 12 (FIG. 3) formed in the same layer as the gate electrode 30. The plurality of signal lines 14 are arranged at intervals in the first direction X, and are arranged between the plurality of pixel electrodes 18 in the display area DA. The source electrode (not shown) of the thin film transistor 16 is formed integrally with the signal line 14 (see FIG. 4).
 回路層26の上には、第3絶縁膜40上に積層するように、共通電極20が配置されている。共通電極20は、複数の副画素SPに亘って形成されている。共通電極20を覆うように、第3絶縁膜40上に第4絶縁膜46が積層している。第4絶縁膜46の上には、複数の画素電極18が積層している。画素電極18は、第4絶縁膜46を貫通して、ドレイン電極38に接続するコンタクト部48を有する。複数の画素電極18を覆うように、第1配向膜50が積層する。画素電極18は、共通電極20より上に形成され、複数のスリット(図示せず)を有するように形成されている。 (4) The common electrode 20 is arranged on the circuit layer 26 so as to be stacked on the third insulating film 40. The common electrode 20 is formed over a plurality of sub-pixels SP. A fourth insulating film 46 is stacked on the third insulating film 40 so as to cover the common electrode 20. The plurality of pixel electrodes 18 are stacked on the fourth insulating film 46. The pixel electrode 18 has a contact portion 48 penetrating through the fourth insulating film 46 and connecting to the drain electrode 38. The first alignment film 50 is stacked so as to cover the plurality of pixel electrodes 18. The pixel electrode 18 is formed above the common electrode 20 and has a plurality of slits (not shown).
 表示パネル10は、対向ガラス基板52を有する。対向ガラス基板52には、ブラックマトリクス54及びカラーフィルタ層56が設けられ、下側においてオーバーコート層58で覆われている。オーバーコート層58を覆うように、第2配向膜60が積層する。なお、図示した例では、ブラックマトリクス54は、対向ガラス基板52とカラーフィルタ層56との間に配置されているが、カラーフィルタ層56とオーバーコート層58との間に配置されていてもよいし、オーバーコート層58と第2配向膜60との間に配置されていてもよい。 The display panel 10 has the opposite glass substrate 52. The opposite glass substrate 52 is provided with a black matrix 54 and a color filter layer 56, and is covered with an overcoat layer 58 on the lower side. The second alignment film 60 is stacked so as to cover the overcoat layer 58. In the illustrated example, the black matrix 54 is disposed between the counter glass substrate 52 and the color filter layer 56, but may be disposed between the color filter layer 56 and the overcoat layer 58. Alternatively, it may be disposed between the overcoat layer 58 and the second alignment film 60.
 第1配向膜50と第2配向膜60の間に液晶層22が介在する。セルギャップは、複数のスペーサ62によって保持されている。複数のスペーサ62は、第1配向膜50とオーバーコート層58との間に位置している。オーバーコート層58上にスペーサ62が設けられ、オーバーコート層58及びスペーサ62を覆うように第2配向膜60が成膜されている。なお、第1配向膜50とスペーサ62は、接触してもよいし、両者間に第2配向膜60が介在していてもよい。図示した例では、表示パネル10のTFTガラス基板24の側に、共通電極20及び画素電極18が位置する横電界駆動方式が採用されている。 (4) The liquid crystal layer 22 is interposed between the first alignment film 50 and the second alignment film 60. The cell gap is held by the plurality of spacers 62. The plurality of spacers 62 are located between the first alignment film 50 and the overcoat layer 58. A spacer 62 is provided on the overcoat layer 58, and a second alignment film 60 is formed so as to cover the overcoat layer 58 and the spacer 62. Note that the first alignment film 50 and the spacer 62 may be in contact with each other, or the second alignment film 60 may be interposed between them. In the illustrated example, a lateral electric field driving method in which the common electrode 20 and the pixel electrode 18 are located on the TFT glass substrate 24 side of the display panel 10 is adopted.
 表示パネル10は、図1に示すように、画像が表示される表示面64及びその反対の裏面66を有する。表示装置は、表示パネル10の裏面66側に、バックライトモジュール68を有する。バックライトモジュール68は、LED(Light Emitting Diode)などの光源、導光板、光学フィルム、拡散板、反射板及びフレームを含む。点光源が導光板によって面光源に変換される。 As shown in FIG. 1, the display panel 10 has a display surface 64 on which an image is displayed and a back surface 66 opposite thereto. The display device has a backlight module 68 on the back surface 66 side of the display panel 10. The backlight module 68 includes a light source such as an LED (Light Emitting Diode), a light guide plate, an optical film, a diffusion plate, a reflection plate, and a frame. The point light source is converted into a surface light source by the light guide plate.
[集積回路モジュール]
[実装ガラス基板]
 図1及び図2に示すように、集積回路モジュール70は、実装ガラス基板72を有する。実装ガラス基板72は、第1面74及びその反対の第2面76を有する。実装ガラス基板72は、第1面74が表示パネル10の裏面66に対向するように、表示パネル10に重なる。詳しくは、実装ガラス基板72は、バックライトモジュール68の下方にある。実装ガラス基板72は、表示パネル10に間接的に固定されるとしても直接的には固定されない。
[Integrated circuit module]
[Mounted glass substrate]
As shown in FIGS. 1 and 2, the integrated circuit module 70 has a mounting glass substrate 72. The mounting glass substrate 72 has a first surface 74 and a second surface 76 opposite thereto. The mounting glass substrate 72 overlaps the display panel 10 such that the first surface 74 faces the back surface 66 of the display panel 10. Specifically, the mounting glass substrate 72 is below the backlight module 68. Even though the mounting glass substrate 72 is indirectly fixed to the display panel 10, it is not directly fixed.
 図6は、実装ガラス基板72の平面図である。実装ガラス基板72は、長さ方向Lの両側にある第1端部78及び第2端部80を有する。実装ガラス基板72は、第2面76に配線パターン82を有する。 FIG. 6 is a plan view of the mounting glass substrate 72. FIG. The mounting glass substrate 72 has a first end 78 and a second end 80 on both sides in the length direction L. The mounting glass substrate 72 has a wiring pattern 82 on the second surface 76.
 配線パターン82は、第1端子群84を含む。第1端子群84は、第1端部78にあって長さ方向Lに直交する幅方向Wに並ぶ。第1端子群84は、相互に一点P1で交差する複数の直線にそれぞれ沿って放射線状に延びる。例えば、実装ガラス基板72の幅方向Wの中央に基準線Lが設定され、基準線Lの両側に、第1端子群84は配列されている。 The wiring pattern 82 includes a first terminal group 84. The first terminal group 84 is arranged at the first end portion 78 in the width direction W orthogonal to the length direction L. The first terminal group 84 extends radially along a plurality of straight lines intersecting each other at one point P1. For example, set the reference line L R to the center in the width direction W of the mounting glass substrate 72, on both sides of the reference line L R, a first terminal group 84 are arranged.
 一点P1は、第1端部78の側で、実装ガラス基板72の外側にある。そのため、第1端子群84は、外方向に向かって、相互に接近するように傾斜している。変形例として、第1端子群84は、外方向に向かって、相互に離れるように傾斜してもよい。その場合の一点は、第2端部80の側で、実装ガラス基板72の外側にくる。 One point P1 is on the side of the first end portion 78 and outside the mounting glass substrate 72. Therefore, the first terminal group 84 is inclined outwardly so as to approach each other. As a modification, the first terminal group 84 may be inclined outward and away from each other. One point in that case is on the side of the second end portion 80 and outside the mounting glass substrate 72.
 第1端子群84は、隣同士の間隔が均等になるように配列されている。一方で、第1端子群84は、長さ(複数の直線に沿った方向の長さ)に直交する幅において、不均等になっている。幅は、基準線Lから離れるほど広い。そのため、第1端子群84は、不均等なピッチで配列される。ピッチは、基準線Lから離れるほど広い。最大ピッチは、最小ピッチの1.1倍から2倍である。 The first terminal group 84 is arranged so that the interval between adjacent terminals is equal. On the other hand, the first terminal group 84 is unequal in width orthogonal to the length (the length in the direction along the plurality of straight lines). Width is wider farther from the reference line L R. Therefore, the first terminal groups 84 are arranged at an uneven pitch. Pitch is wider farther from the reference line L R. The maximum pitch is 1.1 to 2 times the minimum pitch.
 配線パターン82は、第2端子群86を含む。第2端子群86は、第2端部80にあって幅方向Wに並ぶ。第2端子群86は、長さ方向Lに沿ってそれぞれ平行に延びる。第2端子群86は等ピッチで並んでいる。変形例として、第2端子群86は、第1端子群84と同様に、相互に一点で交差する複数の直線にそれぞれ沿って放射線状に延びていてもよい。 The wiring pattern 82 includes a second terminal group 86. The second terminal group 86 is arranged at the second end 80 in the width direction W. The second terminal groups 86 extend parallel to each other along the length direction L. The second terminal groups 86 are arranged at an equal pitch. As a modification, similarly to the first terminal group 84, the second terminal group 86 may extend radially along a plurality of straight lines that cross each other at one point.
 配線パターン82は、第1配線群88を含む。第1配線群88は、第1端子群84から実装領域MRにそれぞれ延びる。配線パターン82は、第2配線群90を含む。第2配線群90は、第2端子群86から実装領域MRにそれぞれ延びる。 The wiring pattern 82 includes a first wiring group 88. The first wiring group 88 extends from the first terminal group 84 to the mounting region MR. The wiring pattern 82 includes a second wiring group 90. The second wiring group 90 extends from the second terminal group 86 to the mounting region MR.
 実装ガラス基板72は、第1端子群84の幅方向Wの両側に第1アライメントマーク92(例えばネガマーク)を有する。第1アライメントマーク92は、第1端子群84を挟む。第1アライメントマーク92は、実装ガラス基板72と第1フレキシブル基板98(図2)の位置合わせに使用される。最も外側の第1端子84は、目盛線を描くように分岐しており、これも位置合わせに使用される。 The mounting glass substrate 72 has first alignment marks 92 (for example, negative marks) on both sides of the first terminal group 84 in the width direction W. The first alignment mark 92 sandwiches the first terminal group 84. The first alignment mark 92 is used for positioning the mounting glass substrate 72 and the first flexible substrate 98 (FIG. 2). The outermost first terminal 84 is branched so as to draw a scale line, which is also used for alignment.
 実装ガラス基板72は、第2端子群86の幅方向Wの両側に第2アライメントマーク94を有する。第2アライメントマーク94は、第2端子群86を挟む。第2アライメントマーク94は、実装ガラス基板72の位置を目視するための認識マークである。 The mounting glass substrate 72 has second alignment marks 94 on both sides of the second terminal group 86 in the width direction W. The second alignment mark 94 sandwiches the second terminal group 86. The second alignment mark 94 is a recognition mark for visually checking the position of the mounting glass substrate 72.
 実装ガラス基板72は、表示パネル10のTFTガラス基板24(図5)よりも薄い。なお、実装ガラス基板72の代わりに、ファインピッチの配線パターンを有するPCB(Printed Circuit Board)を使用しても、実施形態と同様の技術的効果を達成する。 The mounting glass substrate 72 is thinner than the TFT glass substrate 24 of the display panel 10 (FIG. 5). Note that the same technical effects as those of the embodiment can be achieved by using a PCB (Printed Circuit Board) having a fine pitch wiring pattern instead of the mounting glass substrate 72.
[実装領域・集積回路チップ]
 実装ガラス基板72は、第1端部78及び第2端部80の間に、実装領域MRを有する。実装領域MRに、図2に示す集積回路チップ96が搭載される。集積回路チップ96は、第1配線群88及び第2配線群90に電気的に接続される。
[Mounting area and integrated circuit chip]
The mounting glass substrate 72 has a mounting region MR between the first end 78 and the second end 80. The integrated circuit chip 96 shown in FIG. 2 is mounted on the mounting area MR. The integrated circuit chip 96 is electrically connected to the first wiring group 88 and the second wiring group 90.
 実装ガラス基板72を構成するガラスは、樹脂よりも硬度が高い。そのため、実装ガラス基板72は、薄くても集積回路チップ96の搭載に適している。例えば、集積回路チップ96に反りが生じても、その応力に実装ガラス基板72は対抗することができる。また、ガラス基板に集積回路チップ96を搭載する技術があれば、フレキシブル基板に集積回路チップ96を搭載する技術は要求されない。 ガ ラ ス The glass constituting the mounting glass substrate 72 has higher hardness than resin. Therefore, the mounting glass substrate 72 is suitable for mounting the integrated circuit chip 96 even if it is thin. For example, even if the integrated circuit chip 96 is warped, the mounting glass substrate 72 can resist the stress. In addition, if there is a technology for mounting the integrated circuit chip 96 on a glass substrate, a technology for mounting the integrated circuit chip 96 on a flexible substrate is not required.
 実装領域MRは、実装ガラス基板72の第2面76(表示パネル10及びバックライトモジュール68とは反対側)にあるので、図1に示すように、集積回路チップ96が、実装ガラス基板72と表示パネル10(バックライトモジュール68)の間には介在しない。そのため、実装ガラス基板72を表示パネル10(バックライトモジュール68)に接近させることができ、表示装置の小型化(狭額縁)が可能である。 Since the mounting region MR is on the second surface 76 of the mounting glass substrate 72 (the side opposite to the display panel 10 and the backlight module 68), as shown in FIG. It does not intervene between the display panels 10 (backlight module 68). Therefore, the mounting glass substrate 72 can be brought closer to the display panel 10 (the backlight module 68), and the display device can be reduced in size (narrow frame).
[第1フレキシブル基板]
 図1及び図2に示すように、集積回路モジュール70は、第1フレキシブル基板98を有する。第1フレキシブル基板98は、表示パネル10と実装ガラス基板72に電気的に接続して屈曲する。第1フレキシブル基板98は、集積回路チップ96を搭載しないので、そのための要求を満たさない材料(樹脂)を選択することが可能であり、例えば、低反発素材を選択して、きつい曲がり具合で屈曲させることができる。これにより、表示装置の小型化(狭額縁)が可能である。
[First flexible substrate]
As shown in FIGS. 1 and 2, the integrated circuit module 70 has a first flexible substrate 98. The first flexible substrate 98 is electrically connected to the display panel 10 and the mounting glass substrate 72 and is bent. Since the first flexible substrate 98 does not have the integrated circuit chip 96 mounted thereon, it is possible to select a material (resin) that does not satisfy the requirement therefor. Can be done. Thus, the display device can be reduced in size (narrow frame).
 図7は、図2に示す第1フレキシブル基板98の透視図である。第1フレキシブル基板98は、長さ方向Lの両側にある第3端部100及び第4端部102を有する。第1フレキシブル基板98は、第1配線パターン104を有する。 FIG. 7 is a perspective view of the first flexible substrate 98 shown in FIG. The first flexible substrate 98 has a third end 100 and a fourth end 102 on both sides in the length direction L. The first flexible substrate 98 has a first wiring pattern 104.
 第1配線パターン104は、第3端子群106を含む。第3端子群106は、第3端部100にあって長さ方向Lに直交する幅方向Wに並ぶ。第3端子群106は、相互に一点P3で交差する複数の直線にそれぞれ沿って放射線状に延びる。例えば、第1フレキシブル基板98の幅方向Wの中央に基準線Lが設定され、基準線Lの両側に、第3端子群106は配列されている。 The first wiring pattern 104 includes a third terminal group 106. The third terminal group 106 is arranged in the width direction W orthogonal to the length direction L at the third end 100. The third terminal group 106 extends radially along a plurality of straight lines intersecting each other at one point P3. For example, it sets the reference line L R is the center in the width direction W of the first flexible substrate 98, on both sides of the reference line L R, the third terminal group 106 are arranged.
 一点P3は、第3端子群106が設けられる第3端部100とは反対の第4端部102の側で、第1フレキシブル基板98の外側にある。そのため、第3端子群106は、外方向に向かって、相互に離れるように傾斜している。この形状は、上述した第1端子群84(図6)とは対称的になっている。変形例として、第3端子群106は、第1端子群84と同様に、外方向に向かって相互に接近するように傾斜してもよい。その場合の一点は、第3端部100の側で、第1フレキシブル基板98の外側にくる。 One point P3 is on the side of the fourth end 102 opposite to the third end 100 where the third terminal group 106 is provided, and is outside the first flexible substrate 98. Therefore, the third terminal group 106 is inclined outwardly away from each other. This shape is symmetric with the first terminal group 84 (FIG. 6) described above. As a modification, similarly to the first terminal group 84, the third terminal group 106 may be inclined so as to approach each other outward. One point in that case is on the third end 100 side and outside the first flexible substrate 98.
 第3端子群106は、長さ(複数の直線に沿った方向)に直交する幅において、均等になっている。一方で、第3端子群106は、隣同士の間隔が不均等になるように配列されている。間隔は、基準線Lから離れるほど広い。そのため、第3端子群106は、不均等なピッチで配列されている。ピッチは、基準線Lから離れるほど広い。最大ピッチは、最小ピッチの1.1倍から2倍である。 The third terminal group 106 is uniform in width orthogonal to the length (the direction along the plurality of straight lines). On the other hand, the third terminal groups 106 are arranged such that the intervals between adjacent terminals are unequal. Interval is wider farther from the reference line L R. Therefore, the third terminal groups 106 are arranged at an uneven pitch. Pitch is wider farther from the reference line L R. The maximum pitch is 1.1 to 2 times the minimum pitch.
 第1配線パターン104は、第4端子群108を含む。第4端子群108は、第4端部102にあって幅方向Wに並ぶ。第4端子群108は、相互に一点P4で交差する複数の直線にそれぞれ沿って放射線状に延びる。第4端子群108には、第3端子群106の詳細が該当する。第1配線パターン104は、第3配線群110を含む。第3配線群110は、第3端子群106と第4端子群108をそれぞれ接続する。 The first wiring pattern 104 includes the fourth terminal group 108. The fourth terminal group 108 is arranged in the width direction W at the fourth end 102. The fourth terminal group 108 extends radially along a plurality of straight lines intersecting each other at one point P4. The details of the third terminal group 106 correspond to the fourth terminal group 108. The first wiring pattern 104 includes a third wiring group 110. The third wiring group 110 connects the third terminal group 106 and the fourth terminal group 108, respectively.
 第1フレキシブル基板98は、第3端子群106の幅方向Wの両側に第3アライメントマーク112(例えばポジマーク)を有する。第3アライメントマーク112を、実装ガラス基板72の第1アライメントマーク92と合致させることで、実装ガラス基板72と第1フレキシブル基板98の位置合わせを行う。最も外側の第3端子は、目盛線を描くように分岐しており、これも位置合わせに使用される。第3アライメントマーク112は、第3端子群106を挟む。 The first flexible substrate 98 has third alignment marks 112 (for example, positive marks) on both sides of the third terminal group 106 in the width direction W. By aligning the third alignment mark 112 with the first alignment mark 92 of the mounting glass substrate 72, the positioning of the mounting glass substrate 72 and the first flexible substrate 98 is performed. The outermost third terminal is branched so as to draw a scale line, which is also used for alignment. The third alignment mark 112 sandwiches the third terminal group 106.
 第1フレキシブル基板98は、第4端子群108の幅方向Wの両側に第4アライメントマーク114(例えばポジマーク)を有する。最も外側の第4端子108は、目盛線を描くように分岐しており、これも位置合わせに使用される。第4アライメントマーク114は、第4端子群108を挟む。 The first flexible substrate 98 has fourth alignment marks 114 (for example, positive marks) on both sides of the fourth terminal group 108 in the width direction W. The outermost fourth terminal 108 is branched so as to draw a scale line, which is also used for alignment. The fourth alignment mark 114 sandwiches the fourth terminal group 108.
 図8は、図2に示す集積回路モジュール70のVIII-VIII線断面拡大図である。第1フレキシブル基板98の第3端子群106は、それぞれ、実装ガラス基板72の第1端子群84に接続する。接続には、熱硬化性樹脂に微細な金属粒子を混ぜ合わせた異方性導電フィルム116を使用する。 FIG. 8 is an enlarged cross-sectional view taken along line VIII-VIII of the integrated circuit module 70 shown in FIG. The third terminal group 106 of the first flexible substrate 98 is connected to the first terminal group 84 of the mounting glass substrate 72, respectively. For connection, an anisotropic conductive film 116 in which fine metal particles are mixed with a thermosetting resin is used.
 第1端子群84は、隣同士の間隔が均等であるが、幅において不均等であるため、不均等なピッチになっている。第3端子群106は、幅において均等であるが、隣同士の間隔が不均等であるため、不均等なピッチになっている。いずれのピッチも、基準線Lから離れるほど大きい。 The first terminal group 84 has an equal pitch between the adjacent terminals, but has an uneven pitch because of an uneven width. The third terminal group 106 is uniform in width, but has an uneven pitch because the distance between adjacent terminals is uneven. Any pitch, large enough distance from the reference line L R.
 第1フレキシブル基板98は、実装ガラス基板72よりも熱膨張率が大きい。第1フレキシブル基板98が、実装ガラス基板72よりも大きく膨張又は収縮すると、第1端子群84及び第3端子群106の位置がずれてしまう。 1The first flexible substrate 98 has a larger coefficient of thermal expansion than the mounting glass substrate 72. When the first flexible substrate 98 expands or contracts more than the mounting glass substrate 72, the positions of the first terminal group 84 and the third terminal group 106 are shifted.
 第1端子群84がそれぞれ沿って延びる複数の直線が交差する一点P1(図6)と、第3端子群106がそれぞれ沿って延びる複数の直線が交差する一点P3(図7)とは、一致するように設計されている。しかし、第1フレキシブル基板98が膨張又は収縮すると、点P1,P3が一致しなくなる。その場合、点P1,P3が一致するように、第1フレキシブル基板98及び実装ガラス基板72を相対的に移動させることで、第1端子群84及び第3端子群106の位置を合わせることができる。つまり、第1フレキシブル基板98及び実装ガラス基板72を、相対的に、近づく方向又は離れる方向に移動させればよい。 A point P1 (FIG. 6) at which a plurality of straight lines extending along the first terminal group 84 respectively intersects with a point P3 (FIG. 7) at which a plurality of straight lines extending along the third terminal group 106 intersect. Designed to be. However, when the first flexible substrate 98 expands or contracts, the points P1 and P3 do not match. In that case, the positions of the first terminal group 84 and the third terminal group 106 can be adjusted by relatively moving the first flexible substrate 98 and the mounting glass substrate 72 so that the points P1 and P3 coincide. . That is, the first flexible substrate 98 and the mounting glass substrate 72 may be relatively moved in a direction toward or away from each other.
 図2に示すように、第1フレキシブル基板98は、表示パネル10に接続されている。その詳細は、第1フレキシブル基板98と実装ガラス基板72の接続についての説明が該当する。 1As shown in FIG. 2, the first flexible substrate 98 is connected to the display panel 10. The details correspond to the description of the connection between the first flexible substrate 98 and the mounting glass substrate 72.
 図9は、表示パネル10の端部を示す図である。表示パネル10は、TFTガラス基板24を有する。TFTガラス基板24には、図5に示すように、薄膜トランジスタ16を含む回路が形成されている。表示パネル10(TFTガラス基板24)は、外部端子群118を有する。外部端子群118は、相互に一点Pxで交差する複数の直線にそれぞれ沿って放射線状に延びる。外部端子群118の詳細は、図6に示す第1端子群84についての説明が該当する。表示パネル10は、外部端子群118の幅方向Wの両側にアライメントマーク120(例えばネガマーク)を有する。第1フレキシブル基板98の第4アライメントマーク114を、表示パネル10のアライメントマーク120と合致させることで、表示パネル10と第1フレキシブル基板98の位置合わせを行う。第1フレキシブル基板98の第4端子群108は、表示パネル10の外部端子群118に電気的に接続する。 FIG. 9 is a diagram showing an end of the display panel 10. The display panel 10 has a TFT glass substrate 24. As shown in FIG. 5, a circuit including the thin film transistor 16 is formed on the TFT glass substrate 24. The display panel 10 (TFT glass substrate 24) has an external terminal group 118. The external terminal group 118 extends radially along a plurality of straight lines intersecting each other at one point Px. The details of the external terminal group 118 correspond to the description of the first terminal group 84 shown in FIG. The display panel 10 has alignment marks 120 (for example, negative marks) on both sides of the external terminal group 118 in the width direction W. By aligning the fourth alignment mark 114 of the first flexible substrate 98 with the alignment mark 120 of the display panel 10, the display panel 10 and the first flexible substrate 98 are aligned. The fourth terminal group 108 of the first flexible substrate 98 is electrically connected to the external terminal group 118 of the display panel 10.
[第2フレキシブル基板]
 図10は、図2に示す第2フレキシブル基板122の透視図である。集積回路モジュール70は、第2フレキシブル基板122を有する。第2フレキシブル基板122は、第2配線パターン124を有する。第2配線パターン124は、実装ガラス基板72の第2端子群86に電気的に接続するためのいくつかの端子124Aを含む。第2配線パターン124は、図示しない回路基板(例えばPCB: Printed Circuit Board)に接続するための他のいくつかの端子124Bを含む。第2配線パターン124は、バックライトモジュール68に接続された第3フレキシブル基板126(図2)に接続するための他のいくつかの端子124Cを含む。
[Second flexible substrate]
FIG. 10 is a perspective view of the second flexible substrate 122 shown in FIG. The integrated circuit module 70 has a second flexible substrate 122. The second flexible board 122 has a second wiring pattern 124. The second wiring pattern 124 includes several terminals 124 </ b> A for electrically connecting to the second terminal group 86 of the mounting glass substrate 72. The second wiring pattern 124 includes some other terminals 124B for connecting to a circuit board (not shown) (for example, PCB: Printed Circuit Board). The second wiring pattern 124 includes some other terminals 124C for connecting to the third flexible substrate 126 (FIG. 2) connected to the backlight module 68.
 第2フレキシブル基板122は、バックライトモジュール68(図示しないフレーム)に固定(粘着)されている。これにより、実装ガラス基板72は、間接的に、バックライトモジュール68に固定される。図表示パネル10と実装ガラス基板72及び第2フレキシブル基板122との間に、バックライトモジュール68がある。 The second flexible substrate 122 is fixed (adhered) to the backlight module 68 (frame (not shown)). Thus, the mounting glass substrate 72 is indirectly fixed to the backlight module 68. A backlight module 68 is provided between the display panel 10 and the mounting glass substrate 72 and the second flexible substrate 122.
 本実施形態によれば、集積回路チップ96は、実装ガラス基板72に搭載されているので、実装ガラス基板72の硬さによって反りの発生を抑制することができる。また、第1フレキシブル基板98には、集積回路チップ96の実装に適した材料以外に、弾性力の小さい材料を使用することができる。その場合、第1フレキシブル基板98をきつく曲げることができるので、表示装置の小型化(狭額縁)が可能になる。 According to the present embodiment, since the integrated circuit chip 96 is mounted on the mounting glass substrate 72, it is possible to suppress the occurrence of warpage due to the hardness of the mounting glass substrate 72. In addition to the material suitable for mounting the integrated circuit chip 96, a material having a small elastic force can be used for the first flexible substrate 98. In that case, the first flexible substrate 98 can be bent tightly, so that the display device can be reduced in size (narrow frame).
[製造方法]
 図11~図14は、実施形態に係る集積回路モジュールの製造方法を示す図である。本実施形態では、実装ガラス基板72の多面取りを行う。例えば、複数の実装ガラス基板72に対応する配線パターン82をマザーガラス基板128に形成し(図11)、個々の実装ガラス基板72をマザーガラス基板128から切断する(図12)。そして、実装ガラス基板72に集積回路チップ96を搭載し(図13)、さらに実装ガラス基板72に第1フレキシブル基板98及び第2フレキシブル基板122を接続する(図14)。
[Production method]
11 to 14 are views showing a method for manufacturing an integrated circuit module according to the embodiment. In this embodiment, multiple mounting of the mounting glass substrate 72 is performed. For example, the wiring patterns 82 corresponding to the plurality of mounting glass substrates 72 are formed on the mother glass substrate 128 (FIG. 11), and the individual mounting glass substrates 72 are cut from the mother glass substrate 128 (FIG. 12). Then, the integrated circuit chip 96 is mounted on the mounting glass substrate 72 (FIG. 13), and the first flexible substrate 98 and the second flexible substrate 122 are connected to the mounting glass substrate 72 (FIG. 14).
 図15~図17は、実施形態の変形例1に係る集積回路モジュールの製造方法を示す図である。マザーガラス基板128には、複数行及び複数列に並ぶように、複数の集積回路チップ96を搭載する(図15)。そして、図16に示すように、一行に並ぶ実装ガラス基板72が一体化した集合体130を、マザーガラス基板128から切り出す。隣同士の実装ガラス基板72は、第1フレキシブル基板98及び第2フレキシブル基板122の接続に関係しない部分で一体化している。続いて、図17に示すように、それぞれの実装ガラス基板72に、第1フレキシブル基板98及び第2フレキシブル基板122を接続する。なお、第1フレキシブル基板98及び第2フレキシブル基板122のいずれを先に接続してもよい。その後、集合体130を個々の実装ガラス基板72に切断する。 FIGS. 15 to 17 are views showing a method of manufacturing an integrated circuit module according to Modification 1 of the embodiment. A plurality of integrated circuit chips 96 are mounted on the mother glass substrate 128 so as to be arranged in a plurality of rows and a plurality of columns (FIG. 15). Then, as shown in FIG. 16, an assembly 130 in which the mounting glass substrates 72 arranged in a line are integrated is cut out from the mother glass substrate 128. The adjacent mounting glass substrates 72 are integrated at a portion not related to the connection between the first flexible substrate 98 and the second flexible substrate 122. Subsequently, as shown in FIG. 17, the first flexible substrate 98 and the second flexible substrate 122 are connected to the respective mounting glass substrates 72. Note that either the first flexible substrate 98 or the second flexible substrate 122 may be connected first. Thereafter, the assembly 130 is cut into individual mounting glass substrates 72.
 図18は、実施形態の変形例2に係る集積回路モジュールの製造方法を示す図である。チップを搭載するためのチップボンダ(図示せず)は、ある程度以上の大きさ(少なくとも20mm四方)の基板に対応しており、基板の片側に寄った位置にチップを搭載するようになっている。そのため、図18に示すように、実装ガラス基板72のサイズよりも大きいガラス基板132を用意し、配線パターン82を形成し、チップボンダで集積回路チップ96を搭載する。その後、不要な部分を切断して除去する。 FIG. 18 is a diagram illustrating the method of manufacturing the integrated circuit module according to the second modification of the embodiment. A chip bonder (not shown) for mounting a chip corresponds to a substrate of a certain size or more (at least 20 mm square), and mounts the chip at a position close to one side of the substrate. Therefore, as shown in FIG. 18, a glass substrate 132 larger than the size of the mounting glass substrate 72 is prepared, the wiring pattern 82 is formed, and the integrated circuit chip 96 is mounted by a chip bonder. Thereafter, unnecessary portions are cut and removed.
 図19は、実施形態の変形例3に係る集積回路モジュールの製造方法を示す図である。この例では、マザーガラス基板128に、TFTガラス基板24及び実装ガラス基板72の配線パターンを混在させて形成し、その後にこれらを切断する。なお、実装ガラス基板72への集積回路チップ96の搭載は、切断後に行う。 FIG. 19 is a diagram illustrating the method of manufacturing the integrated circuit module according to Modification 3 of the embodiment. In this example, the wiring patterns of the TFT glass substrate 24 and the mounting glass substrate 72 are mixedly formed on the mother glass substrate 128, and thereafter, these are cut. The mounting of the integrated circuit chip 96 on the mounting glass substrate 72 is performed after cutting.
 本発明は、上述した実施形態に限定されるものではなく種々の変形が可能である。例えば、実施形態で説明した構成は、実質的に同一の構成、同一の作用効果を奏する構成又は同一の目的を達成することができる構成で置き換えることができる。

 
The present invention is not limited to the embodiments described above, and various modifications are possible. For example, the configuration described in the embodiment can be replaced with a configuration having substantially the same configuration, a configuration having the same operation and effect, or a configuration capable of achieving the same object.

Claims (14)

  1.  画像が表示される表示面及び前記表示面とは反対の裏面を有する表示パネルと、
     第1面及び前記第1面とは反対の第2面を有し、前記第1面が前記裏面に対向するように前記表示パネルに重なり、前記第2面に配線パターンを有する第1ガラス基板と、
     前記第1ガラス基板の前記第2面に搭載された集積回路チップと、
     前記表示パネルと前記第1ガラス基板に電気的に接続して屈曲する、配線パターンを有するフレキシブル基板と、
     を有することを特徴とする表示装置。
    A display panel having a display surface on which an image is displayed and a back surface opposite to the display surface,
    A first glass substrate having a first surface and a second surface opposite to the first surface, overlapping the display panel so that the first surface faces the back surface, and having a wiring pattern on the second surface When,
    An integrated circuit chip mounted on the second surface of the first glass substrate;
    A flexible substrate having a wiring pattern, which is electrically connected to the display panel and the first glass substrate and bent,
    A display device comprising:
  2.  請求項1に記載された表示装置において、
     前記第1ガラス基板は、長さ方向の両側にある第1端部及び第2端部と、前記第1端部及び前記第2端部の間にある実装領域と、を有し、
     前記第1ガラス基板の前記配線パターンは、前記第1端部にあって前記長さ方向に直交する幅方向に並ぶ第1端子群と、前記第2端部にあって前記幅方向に並ぶ第2端子群と、前記第1端子群から前記実装領域にそれぞれ延びる第1配線群と、前記第2端子群から前記実装領域にそれぞれ延びる第2配線群と、を有し、
     前記集積回路チップは、前記実装領域に搭載され、前記第1配線群及び前記第2配線群に電気的に接続されることを特徴とする表示装置。
    The display device according to claim 1,
    The first glass substrate has first and second ends on both sides in the length direction, and a mounting area between the first and second ends,
    The wiring pattern of the first glass substrate has a first terminal group located at the first end and arranged in a width direction orthogonal to the length direction, and a second terminal group located at the second end and arranged in the width direction. A second wiring group extending from the first terminal group to the mounting area, and a second wiring group extending from the second terminal group to the mounting area;
    The display device, wherein the integrated circuit chip is mounted in the mounting area and is electrically connected to the first wiring group and the second wiring group.
  3.  請求項2に記載された表示装置において、
     前記第1ガラス基板は、前記第1端子群もしくは前記第2端子群の前記幅方向の両側にアライメントマークを有することを特徴とする表示装置。
    The display device according to claim 2,
    The display device, wherein the first glass substrate has alignment marks on both sides of the first terminal group or the second terminal group in the width direction.
  4.  請求項3に記載された表示装置において、
     前記フレキシブル基板は、長さ方向の両側にある第3端部及び第4端部を有し、
     前記フレキシブル基板の前記配線パターンは、前記第3端部にあって前記長さ方向に直交する幅方向に並ぶ第3端子群と、前記第4端部にあって前記幅方向に並ぶ第4端子群と、前記第3端子群と前記第4端子群をそれぞれ接続する第3配線群と、を有し、
     前記第3端子群が前記第1端子群にそれぞれ接続することを特徴とする表示装置。
    The display device according to claim 3,
    The flexible substrate has a third end and a fourth end on both sides in the length direction,
    The wiring pattern of the flexible substrate includes a third terminal group arranged at the third end in a width direction orthogonal to the length direction, and a fourth terminal arranged at the fourth end in the width direction. And a third wiring group for connecting the third terminal group and the fourth terminal group, respectively.
    The display device, wherein the third terminal group is connected to the first terminal group, respectively.
  5.  請求項4に記載された表示装置において、
     前記第1端子群は、相互に一点で交差する複数の直線にそれぞれ沿って放射線状に延び、
     前記第3端子群は、前記複数の直線にそれぞれ沿って放射線状に延び、
     前記第2端子群は、前記長さ方向に沿ってそれぞれ平行に延びることを特徴とする表示装置。
    The display device according to claim 4,
    The first terminal group extends radially along a plurality of straight lines intersecting each other at one point,
    The third terminal group extends radially along each of the plurality of straight lines,
    The display device, wherein the second terminal group extends parallel to each other along the length direction.
  6.  請求項4に記載された表示装置において、
     前記第4端子群は、相互に一点で交差する複数の直線にそれぞれ沿って放射線状に延び、
     前記表示パネルは、前記第4端子群に電気的に接続する外部端子群を有し、
     前記外部端子群は、前記複数の直線にそれぞれ沿って放射線状に延びることを特徴とする表示装置。
    The display device according to claim 4,
    The fourth terminal group extends radially along a plurality of straight lines intersecting each other at one point,
    The display panel has an external terminal group electrically connected to the fourth terminal group,
    The display device, wherein the external terminal group extends radially along each of the plurality of straight lines.
  7.  請求項2から6のいずれか1項に記載された表示装置において、
     前記表示パネルは、薄膜トランジスタを含む回路が形成された第2ガラス基板を有し、
     前記第1ガラス基板は、前記表示パネルの前記第2ガラス基板よりも薄いことを特徴とする表示装置。
    The display device according to any one of claims 2 to 6,
    The display panel has a second glass substrate on which a circuit including a thin film transistor is formed,
    The display device, wherein the first glass substrate is thinner than the second glass substrate of the display panel.
  8.  請求項2から6のいずれか1項に記載された表示装置において、
     前記第1ガラス基板の前記第2端子群に電気的に接続する第2フレキシブル基板をさらに有することを特徴とする表示装置。
    The display device according to any one of claims 2 to 6,
    The display device, further comprising a second flexible substrate electrically connected to the second terminal group of the first glass substrate.
  9.  請求項8に記載された表示装置において、
     前記表示パネルと前記第1ガラス基板及び前記第2フレキシブル基板との間にバックライトモジュールをさらに含み、
     前記第2フレキシブル基板は、前記バックライトモジュールに固定されていることを特徴とする表示装置。
    The display device according to claim 8,
    A backlight module between the display panel and the first glass substrate and the second flexible substrate,
    The display device, wherein the second flexible substrate is fixed to the backlight module.
  10.  ガラス基板と、
     前記ガラス基板に搭載された集積回路チップと、
     を有し、
     前記ガラス基板は、
     長さ方向の両側にある第1端部及び第2端部と、
     前記第1端部及び前記第2端部の間にある実装領域と、
     前記第1端部にあって前記長さ方向に直交する幅方向に並ぶ第1端子群と、
     前記第2端部にあって前記幅方向に並ぶ第2端子群と、
     前記第1端子群から前記実装領域にそれぞれ延びる第1配線群と、
     前記第2端子群から前記実装領域にそれぞれ延びる第2配線群と、
     を有し、
     前記集積回路チップは、前記実装領域に搭載され、前記第1配線群及び前記第2配線群に電気的に接続されることを特徴とする集積回路モジュール。
    A glass substrate,
    An integrated circuit chip mounted on the glass substrate,
    Has,
    The glass substrate,
    A first end and a second end on opposite sides in the longitudinal direction;
    A mounting area between the first end and the second end;
    A first terminal group at the first end and arranged in a width direction orthogonal to the length direction;
    A second terminal group at the second end and arranged in the width direction;
    A first wiring group extending from the first terminal group to the mounting area,
    A second wiring group extending from the second terminal group to the mounting area,
    Has,
    An integrated circuit module, wherein the integrated circuit chip is mounted in the mounting area and is electrically connected to the first wiring group and the second wiring group.
  11.  請求項10に記載された集積回路モジュールにおいて、
     前記ガラス基板は、第1アライメントマークと第2アライメントマークを有し、
     前記第1アライメントマークは、前記第1端子群を挟むように前記幅方向の両側に配置され、
     前記第2アライメントマークは、前記第2端子群を挟むように前記幅方向の両側に配置されることを特徴とする集積回路モジュール。
    The integrated circuit module according to claim 10,
    The glass substrate has a first alignment mark and a second alignment mark,
    The first alignment mark is disposed on both sides in the width direction so as to sandwich the first terminal group,
    The integrated circuit module according to claim 1, wherein the second alignment mark is disposed on both sides in the width direction so as to sandwich the second terminal group.
  12.  請求項10に記載された集積回路モジュールにおいて、
     前記ガラス基板に接続するフレキシブル基板をさらに有し、
     前記フレキシブル基板は、長さ方向の両側にある第3端部及び第4端部と、前記第3端部にあって前記長さ方向に直交する幅方向に並ぶ第3端子群と、前記第4端部にあって前記幅方向に並ぶ第4端子群と、前記第3端子群と前記第4端子群をそれぞれ接続する第3配線群と、を有し、
     前記第3端子群が前記第1端子群にそれぞれ電気的に接続することを特徴とする集積回路モジュール。
    The integrated circuit module according to claim 10,
    Further comprising a flexible substrate connected to the glass substrate,
    The flexible substrate includes third and fourth ends on both sides in the length direction, a third terminal group at the third end arranged in a width direction orthogonal to the length direction, and A fourth terminal group located at four ends and arranged in the width direction, and a third wiring group connecting the third terminal group and the fourth terminal group, respectively;
    An integrated circuit module, wherein the third terminal group is electrically connected to the first terminal group.
  13.  請求項12に記載された集積回路モジュールにおいて、
     前記第1端子群は、相互に一点で交差する複数の直線にそれぞれ沿って放射線状に延び、
     前記第3端子群は、前記複数の直線にそれぞれ沿って放射線状に延び、
     前記第2端子群は、前記長さ方向に沿ってそれぞれ平行に延びることを特徴とする集積回路モジュール。
    The integrated circuit module according to claim 12,
    The first terminal group extends radially along a plurality of straight lines intersecting each other at one point,
    The third terminal group extends radially along each of the plurality of straight lines,
    The integrated circuit module according to claim 1, wherein the second terminal group extends in parallel along the length direction.
  14.  請求項10から13のいずれか1項に記載された集積回路モジュールにおいて、
     前記ガラス基板の前記第2端子群に電気的に接続する第2フレキシブル基板をさらに有することを特徴とする集積回路モジュール。

     
    An integrated circuit module according to any one of claims 10 to 13,
    An integrated circuit module further comprising a second flexible substrate electrically connected to the second terminal group of the glass substrate.

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