WO2020034649A1

WO2020034649A1 - Piezoelectric wafer and manufacturing method therefor

Info

Publication number: WO2020034649A1
Application number: PCT/CN2019/081791
Authority: WO
Inventors: 枋明辉; 林彦甫; 杨胜裕
Original assignee: 福建晶安光电有限公司
Priority date: 2018-08-17
Filing date: 2019-04-08
Publication date: 2020-02-20
Also published as: CN109273586A

Abstract

A piezoelectric wafer and a manufacturing method therefor, the method being a thinning method for providing an ultra-thin piezoelectric wafer. The piezoelectric wafer comprises a piezoelectric material (100) and a wear-resistant material (200) at least partially enveloped by the piezoelectric material (100), the hardness of the wear-resistant material (200) being greater than that of the piezoelectric material (100), and the wear-resistant material (200) serving as a removal stop part of the wafer. The piezoelectric wafer resulting from manufacture using the removal stop part has a more uniform thickness, and is easier to operate and control.

Description

TECHNICAL FIELD

[0001] The present invention relates to an ultra-thin wafer, and more particularly, to a method for manufacturing an ultra-thin piezoelectric wafer.

Background technique

[0002] In the past, a surface acoustic wave filter was fabricated with an interdigital electrode on a lithium tantalate or lithium niobate single crystal substrate. With the development of application requirements, a composite substrate with a higher surface propagation speed has been developed. The characteristics are easily affected by the uneven thickness of the piezoelectric film, which will affect the frequency shift of the interdigitated electrodes of the surface layer and affect the performance of the final device.

[0003] In the currently disclosed piezoelectric material film manufacturing method, only CMP (Chemical Mechanical Polishing) is used to throw it to the target thickness, but the uniformity and thickness of the film cannot be effectively controlled because CMP is performed on the entire surface of a single material Accuracy leads to poor process capability and low yield.

Summary of invention

technical problem

Problem solution

Technical solutions

[0004] The present invention provides a piezoelectric wafer, which can maintain good thickness uniformity in a thinning process, and includes a piezoelectric material and an anti-wear material at least partially wrapped by the piezoelectric material. The piezoelectric material is made of a piezoelectric crystal material. Structure, especially single crystal piezoelectric crystal material, the piezoelectric material is the main component of the crystal, the hardness of the abrasion-resistant material is greater than that of the piezoelectric material, and the abrasion-resistant material is used as the cut-off portion of the wafer.

[0005] In the present invention, in the thinning process, the removal speed of the removal cutoff is slower than that of the piezoelectric material, which slows down or prevents the piezoelectric material from being removed further.

[0006] In some embodiments of the present invention, the wafer has a support substrate, and the support substrate is connected to the piezoelectric material.

[0007] In some embodiments of the present invention, the wafer has been or will undergo a thinning process, and the thinning process includes grinding and polishing.

[0008] In some embodiments of the present invention, before the wafer is thinned, one side of the wafer is a surface to be thinned, and the distance between the removal cutoff portion and the wafer to be thinned is the thickness of the wafer to be removed. [0009] In these embodiments, after the wafer thinning process is completed, the removal cutoff is exposed on the polished side of the wafer.

[0010] In these embodiments, preferably, the material for removing the cutoff portion includes tungsten, aluminum, copper, tantalum, or a nitride or an oxide of the above-mentioned material.

[0011] In some variations of these embodiments, it is preferred that the removal of the cut-off portion reflects different colors of the piezoelectric material, for example, the difference between the metallic luster of tungsten and the reflective luster of the crystal.

[0012] In some embodiments of the present invention, preferably, the removal cutoff portion is close to the edge of the wafer.

[0013] In these embodiments, preferably, the cutoff portions are symmetrically distributed about the center of the wafer.

[0014] According to the present invention, preferably, the piezoelectric material is lithium tantalate or lithium niobate.

[0015] In some embodiments of the present invention, preferably, the thickness of the removal cutoff is from 0.1 μm to 10 _[ xm or less, or 10 _[ xm to 20 _[ xm] or less.

[0016] In these implementations, preferably, the Mohs hardness of the removal cutoff is 5 or more and 10 or less, or more than 10.

[0017] In these implementations, preferably, the removal selection ratio of the piezoelectric material and the anti-wear material is greater than 10: 1.

[0018] In these implementations, preferably, the removal cutoff includes a circle, a ring, and a polygon.

[0019] In these implementations, it is preferable to have one or a plurality of removal cut-off portions in the piezoelectric material.

[0020] In some embodiments of the present invention, preferably, the side of the piezoelectric material near the support substrate is subjected to ion implantation.

[0021] According to these embodiments, preferably, the depth of the ion implantation is at least greater than the position of the end of the removal cutoff side away from the support substrate.

[0022] In addition to the above-mentioned wafer structure, the present invention also provides a method for manufacturing a piezoelectric wafer, which is used to manufacture an ultra-thin wafer, including:

[0023] Step (1) Provide a wafer made of piezoelectric material, one side of the wafer is a surface to be bonded, and the other side is a surface to be thinned, and a groove is formed on the surface to be bonded of the wafer;

[0024] Step (2) Fill the trench with an anti-wear material having a hardness greater than that of the piezoelectric material, and use the anti-wear material as a cut-off portion of the wafer;

[0025] Step (3) bonding one side of the wafer to be bonded to the supporting substrate;

[0026] Step (4) performing a thinning process on the wafer from a side of the surface to be thinned of the wafer, so that the wafer is thinned to expose the wafer The cut-off portion is removed to protect the piezoelectric material of the wafer from further removal.

[0027] According to the manufacturing method of the wafer, preferably, the thinning process includes grinding or polishing.

[0028] According to the method for manufacturing the wafer, preferably, the piezoelectric material is lithium tantalate or lithium niobate.

[0029] In some embodiments of the present invention, preferably, the wafer provided in step (1) or the piezoelectric material of the wafer after step (2) is subjected to ion implantation on a side of the wafer near the supporting substrate.

[0030] In these embodiments, preferably, the depth of the ion implantation is at least larger than the position of the end of the removal cut-off portion on the side far from the surface to be bonded.

[0031] In these embodiments, preferably, between step (3) and step (4), the piezoelectric material passes through the ion-implanted area by thermal decomposition, so as to peel off a portion of the piezoelectric material to be thinned.

[0032] In some embodiments of the present invention, preferably, the removal cutoff portion has good light reflection characteristics.

The beneficial effects of the invention

Beneficial effect

[0033] The present invention has at least the following beneficial effects:

[0034] A CMP chemical mechanical polishing removal cut-off structure is fabricated in a piezoelectric material, and a material with high and low polishing removal rates is used to help the film thickness reach the target thickness uniformly and accurately throughout the wafer. Compared with the direct CMP polishing process for wafers, the wafers produced by removing the cutoff have a more uniform thickness and simpler operation control. From the practical application point of view, in the micron / nano level polishing, The thickness uniformity of the wafer obtained by thin polishing can not meet the requirement of less than 5%, and the uniformity can be achieved even better by removing the cut-off portion.

[0035] Other features and advantages of the present invention will be explained in the following description, and will become partially obvious from the description, or be understood by implementing the present invention. The objects and other advantages of the present invention can be achieved and obtained by the structures specifically pointed out in the description, the claims, and the drawings.

[0036] Although the invention will be described below in conjunction with some exemplary implementations and methods of use, those skilled in the art should understand that it is not intended to limit the invention to these embodiments. On the contrary, the intention is to cover all alternatives, modifications, and equivalents as included within the spirit and scope of the invention as defined by the appended claims.

Brief description of the drawings

BRIEF DESCRIPTION OF THE DRAWINGS [0037] The accompanying drawings are used to provide a further understanding of the present invention, and constitute a part of the specification. They are used to explain the present invention together with embodiments of the present invention, and do not constitute a limitation on the present invention. In addition, the figures in the drawings are summary descriptions and are not drawn to scale.

[0038] FIG. 1 to FIG. 3 are schematic cross-sectional structural diagrams of Embodiment 1;

[0039] FIG. 4 is a schematic plan view of the structure of Embodiment 1;

[0040] FIG. 5 is a schematic sectional structural view of Embodiment 2;

6 to 8 are sectional structural diagrams of Embodiment 3;

9 is a schematic diagram of optical signal recognition in Embodiment 4.

[0043] In the figure:

100, Piezoelectric material, 101, Surface to be thinned, 102, Surface to be bonded, 110, Groove, 120, Ion implantation area, 200, Anti-wear material, 300, Support substrate, 400, Grinding and polishing equipment, 410, Detection Device. Invention Examples

Embodiments of the invention

[0044] The embodiments of the present invention will be described in detail below with reference to the accompanying drawings and embodiments, so as to fully understand and implement the implementation process of how the present invention applies technical means to solve technical problems and achieve technical effects. It should be noted that, as long as no conflict is formed, each embodiment of the present invention and each feature of each embodiment may be combined with each other, and the technical solutions formed are within the protection scope of the present invention.

[0045] It should be understood that the terms used in the present invention are only for the purpose of describing specific embodiments, and are not intended to limit the present invention. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should be further understood that when the terms "comprising," "including," and "containing" are used in the present invention, they are used to indicate the presence of stated features, wholes, steps, operations, elements, and / or packages without Exclude the presence or addition of one or more other features, integers, steps, operations, components, packages, and / or combinations thereof.

[0046] Unless otherwise defined, all terms (including technical and scientific terms) used in the present invention have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It should be further understood that terms used in the present invention should be understood to have meanings consistent with the meanings of these terms in the context of this specification and related fields, and should not be understood in an idealized or overly formal sense, except for the present invention. It is explicitly defined as such. [0047] In a first embodiment of the present invention, a structure of a piezoelectric wafer is disclosed, which includes a piezoelectric material 100 and an anti-wear material 200 at least partially surrounded by the piezoelectric material 100. The piezoelectric material 100 consists of a crystal. Material composition. The crystalline material referred to in the present invention mainly refers to a piezoelectric crystal single crystal material, such as lithium tantalate or lithium niobate single crystal. The hardness of the anti-wear material 200 is greater than that of the piezoelectric material 100. The wear resistance in chemical mechanical polishing, the anti-wear material 200 is more difficult to be removed by polishing. From the perspective of the removal selection ratio, the piezoelectric material 100 and the removal selection ratio of the anti-wear material 200 are greater than 10: 1. In this embodiment, In the example, an abrasion resistant material 200 having a Mohs hardness of 5 to 10 or 10 or more is selected as the removal cutoff portion of the wafer. When the wafer is thinned by a thinning process such as grinding or polishing, such as the chemical mechanical polishing of this embodiment, the wafer is thinned to expose the anti-wear material 200 originally wrapped by the piezoelectric material 100, because the removal speed of the removal cutoff is less than The piezoelectric material 100 slows down or prevents the piezoelectric material 100 from being removed for at least a period of time, so as to obtain a piezoelectric wafer with a precise target thickness.

[0048] As an application of the wafer in Example 1, the surface acoustic wave filter is made of an interdigital electrode on a lithium tantalate or lithium niobate single crystal wafer, but because the entire wafer material is a piezoelectric material, the piezoelectric The characteristics of the material are susceptible to deformation due to temperature changes. This deformation will affect the frequency shift of the interdigitated electrodes on the surface layer and affect the final device performance. Therefore, a composite wafer structure is adopted, that is, another one corresponding to the surface to be thinned of the wafer. The side piezoelectric material 100 is bonded to the support substrate 300 by bonding, thereby reducing the degree of deformation of the wafer.

[0049] Referring to FIG. 1, a piezoelectric wafer structure before the thinning process is provided. One side of the wafer is the surface to be thinned 1 01, and the distance c between the removal cutoff portion and the surface to be thinned 101 of the wafer is the wafer to be removed. thickness.

[0050] Referring to FIG. 2, the difference from the wafer structure of FIG. 1 is that the wafer has a support substrate 300 bonded thereto, and the material of the support substrate 300 includes silicon, sapphire, or spinel material. These substrate materials can solve the problem of temperature compensation during the operation of the piezoelectric wafer, reduce the warpage of the piezoelectric wafer, and improve the accuracy. The expansion coefficient of these materials is close to that of the piezoelectric wafer material.

[0051] Referring to FIG. 3, a wafer structure after the thinning process is provided. After the thinning process is completed, the removal cutoff portion is exposed on the polished side of the wafer. It is more convenient to protect the piezoelectric material from being removed. In some cases, the thickness of the cutoff is the thickness of the finished piezoelectric wafer.

[0052] Referring to FIG. 4, in Embodiment 1, the removal cutoff is provided near the edge of the wafer, and is about the center of the wafer Symmetrical distribution. The cut portion due to the removal of reduced thickness target value setting portion is turned off to remove not less than 0.1 _[xm less than or equal to 10 _[xm or greater than 10 _[xm less than or equal to 20 _[xm. The shape of the cut-off portion includes a circle, a ring, or a polygon. One or more removal cut-off portions are provided in the piezoelectric material 100

[0053] In some modified embodiments of Embodiment 1, in order to quickly identify when the cut-off portion is exposed, the cut-off portion is set to a material that provides a clear spectral signal. For example, the cut-off portion has excellent The light reflection characteristic reflects the optical signal from the polishing equipment. When the detector 410 of the polishing equipment 400 detects this signal, the process is terminated.

[0054] In a second embodiment of the present invention, a method for manufacturing an ultra-thin wafer is provided, including:

[0055] Step (1) Referring to FIG. 5, a piezoelectric wafer made of a piezoelectric material 100 such as lithium tantalate or lithium niobate single crystal is provided. One side of the piezoelectric wafer is the surface to be bonded 102, and the other side For the surface to be thinned 101, a groove 110 is produced on the wafer to be bonded 102 using a yellow light lithography and an ICP plasma etching process;

[0056] Step (2) Referring back to FIG. 1, the CVD or PVD process is used to deposit, and the groove 110 is filled with an anti-wear material 200 having a hardness greater than that of the piezoelectric material 100. The anti-wear material 200 is used as a cut-off part of the wafer, and The polishing method removes excess filler. After polishing, the roughness of the polished surface of the bonding surface 102 to be bonded and the bonding surface of the corresponding support substrate 300 should be no greater than 0.5 nm in order to improve bonding performance;

[0057] Step (3) Referring back to FIG. 2, the side to be bonded 102 of the wafer is bonded to the supporting substrate 300 to form a composite wafer structure;

[0058] Step (4) Referring back to FIG. 3, a wafer thinning process is performed from a side of the wafer to be thinned side 101. The thinning process includes grinding, polishing, and other processes. This embodiment uses chemical mechanical polishing. The removal cut-off portion is thin enough to expose the wafer, and the removal cut-off portion protects the piezoelectric material 100 of the wafer from being removed further.

[0059] In order to accelerate the thinning efficiency and shorten the thinning time, a third embodiment of the present invention is proposed. In this embodiment, an ion implantation method is used, for example, hydrogen ion or nitrogen ion implantation is used to implant ions into a piezoelectric crystal. The specific depth of the side to be bonded 102- is set to a depth exceeding the position of the end face of the removal cutoff section far from the side of the to-be-bonded surface 102, and the bonding surface 102 of the piezoelectric wafer and the support substrate 300 are bonded in a manner Bonding is performed, and the composite wafer structure is heated to vaporize the ion-implanted layer to complete the film transfer. A polishing liquid with high and low polishing removal rates is used to help the film thickness reach the target thickness uniformly and accurately throughout the wafer. Specifically, this embodiment includes: [0060] Step (1) Referring to FIG. 6, a piezoelectric wafer made of a piezoelectric material 100 such as lithium tantalate or lithium niobate single crystal is provided, and an ion implantation process is performed on the piezoelectric wafer, and the depth of ion implantation is at least greater than The position of the end of the removal cut-off part away from the side to be bonded 102 is to ensure that the final piezoelectric film is not damaged during the thermal decomposition process. One side of the piezoelectric wafer is the surface to be bonded 102, and The other side corresponding to the surface to be thinned 101, using yellow light lithography and ICP process to make grooves 110 on the surface to be bonded 101 of the wafer;

[0061] Referring to FIG. 7, using a CVD or PVD process to deposit, fill the trench 110 with an abrasion-resistant material 200 having a hardness greater than that of the piezoelectric material 100. The abrasion-resistant material 200 is used as a cut-off portion of the wafer and polished. The excess filler is removed in a manner that the roughness of the polished surface of the bonding surface 102 to be bonded and the bonding surface of the supporting substrate after polishing is not greater than 0.5 nm in order to improve bonding performance;

[0062] Step (3) Referring to FIG. 8, the side to be bonded 102 of the wafer is bonded to the support substrate 300 to form a composite wafer structure, and the area where the piezoelectric material 100 passes through the ion implantation is decomposed by heating, so as to peel off the part. The piezoelectric material 100 to be thinned to achieve the purpose of quickly removing the piezoelectric material 100 and shorten the process time;

[0063] Step (4) Referring back to FIG. 3, a wafer thinning process is performed from a side of the wafer to be thinned side 101 after peeling. The thinning process includes grinding, polishing, and other processes. This embodiment uses chemical mechanical polishing. The thinning is performed to expose the removal cut-off portion of the wafer, and the removal cut-off portion protects the piezoelectric material 100 of the wafer from being removed further.

[0064] Compared with Embodiment 3, the present invention also provides a fourth embodiment. The difference between Embodiment 4 and Embodiment 3 is that a trench is formed on the surface to be bonded before ion implantation.

[0065] Step (1) Referring back to FIG. 5, a piezoelectric wafer made of a piezoelectric material 100 such as lithium tantalate or lithium niobate single crystal is provided. One side of the piezoelectric wafer is a surface to be bonded 102, and the other Side is to be thinned surface 101, using yellow light lithography and ICP process to make grooves 110 on the surface to be bonded of the wafer;

[0066] Step (2) Referring back to FIG. 7, the CVD or PVD process is used to deposit, and the groove 110 is filled with an anti-wear material 200 having a hardness greater than that of the piezoelectric material 100. The polishing method removes the excess filler. After polishing, the roughness of the polished surface of the bonding surface 102 to be bonded and the bonding surface of the corresponding supporting substrate should be no greater than 0.5 nm in order to improve the bonding performance. In the ion implantation process, the depth of the ion implantation is at least greater than the end position of the removal cutoff far from the 102-side of the surface to be bonded, so as to ensure that the final piezoelectric film is not damaged during the thermal decomposition process;

[0067] Step (3) Referring back to FIG. 8, the side to be bonded 102-side of the wafer is bonded to the support substrate 300 to form a composite wafer structure, and the piezoelectric material 100 is decomposed by heating to pass through the ion implantation region 120, thereby peeling off. section The piezoelectric material to be thinned to achieve the purpose of quickly removing the piezoelectric material 100 and shorten the process time;

[0068] Step (4) Referring back to FIG. 3, a thinning process is performed on the wafer from one side of the wafer to be thinned side 101. The thinning process includes grinding, polishing, and other processes. This embodiment uses chemical mechanical polishing. The removal cut-off portion is thin enough to expose the wafer, and the removal cut-off portion protects the piezoelectric material 100 of the wafer from being removed further.

[0069] With respect to Embodiment 3 and Embodiment 4, the present invention also provides a fifth embodiment. Referring to FIG. 9, this embodiment is different from the two embodiments described above in that the material of the cutoff portion is removed using light reflectivity Good material, and cause optical difference from the piezoelectric material 100, such as Al, Cu or Ta, or the above metal alloy. The wafer is polished and thinned by the polishing disc of the grinding and polishing equipment 400. By applying pressure to the wafer toward the polishing disc, the wafer box and the polishing disc are bonded, and a light signal can be transmitted to the wafer, such as being received by the detector 410. In addition to the light signal reflected from the cut-off portion, it indicates that the polishing process has been removed to the removal of the cut-off portion, which improves the controllability of the wafer removal process.

[0070] It should be noted that the above embodiments are only used to describe the present invention, but not intended to limit the present invention. Those skilled in the art can make the present invention without departing from the spirit and scope of the present invention. Various modifications and changes, so all equivalent technical solutions also belong to the scope of the present invention, and the patent protection scope of the present invention should be limited by the scope of the claims.

Claims

Claim

[Claim 1] A piezoelectric wafer, comprising a piezoelectric material and an abrasion-resistant material at least partially wrapped by the piezoelectric material, the piezoelectric material is composed of a piezoelectric crystal material, and the hardness of the abrasion-resistant material is greater than that of the piezoelectric material The anti-wear material is used as the cut-off part of the wafer.

[Claim 2] The piezoelectric wafer according to claim i, wherein the wafer has been or will be subjected to a thinning process, and the thinning process includes grinding and polishing.

[Claim 3] The piezoelectric wafer according to claim i, wherein the wafer has a supporting substrate, and the supporting substrate is connected to the piezoelectric material.

[Claim 4] The piezoelectric wafer according to claim 2, characterized in that, in the thinning process, the removal speed of the removal cutoff portion is less than that of the piezoelectric material, and the piezoelectric material is slowed down or prevented from being removed.

[Claim 5] The piezoelectric wafer according to claim 1, wherein before the wafer is thinned, one side of the wafer is a surface to be thinned, and the distance between the removal cutoff portion and the surface to be thinned of the wafer is The thickness of the wafer to be removed.

[Claim 6] The piezoelectric wafer according to claim 1, wherein after the wafer thinning process is completed, the removal cutoff portion is exposed on the polished side of the wafer.

[Claim 7] The piezoelectric wafer according to claim 1, wherein the material for removing the cutoff portion includes tungsten, aluminum, copper, tantalum, or an alloy of the above metals, or the above-mentioned nitride, Oxide.

[Claim 8] The piezoelectric wafer according to claim 1, wherein the appearance of the anti-wear material is different from that of the piezoelectric material.

[Claim 9] The piezoelectric wafer according to claim 1, wherein the removal cutoff portion is close to an edge of the wafer.

[Claim 10] The piezoelectric wafer according to claim 1, wherein the removal cutoff portions are symmetrically distributed about the center of the wafer.

[Claim 11] The piezoelectric wafer according to claim 1, wherein the piezoelectric material includes lithium tantalate or lithium niobate.

[Claim 12] The piezoelectric wafer according to claim 1, wherein the thickness of the cutoff portion is removed. Degree is greater than or equal to 0.1 _[ xm to less than or equal to 10 _[ xm or greater than 10 _[ xm to less than or equal to 20 _[ xm

[Claim 13] The piezoelectric wafer according to claim 1, wherein the Mohs hardness of the removal cutoff is 5 or more and 10 or less, or 10 or more.

[Claim 14] The piezoelectric wafer according to claim 1, wherein a removal selection ratio of the piezoelectric material and the anti-wear material is greater than 10: 1.

[Claim 15] The piezoelectric wafer according to claim 1, wherein the removal cutoff portion includes a circle, a ring, and a polygon.

[Claim 16] The piezoelectric wafer according to claim 1, further comprising one or a plurality of removal cutoff portions in the piezoelectric material.

[Claim 17] A method for manufacturing a piezoelectric wafer, for manufacturing an ultra-thin wafer, comprising:

Step (1) A wafer made of a piezoelectric material is provided, one side of the wafer is a surface to be bonded, and the other side is a surface to be thinned, and a groove is formed on the surface to be bonded of the wafer;

Step (2) Fill the trench with an abrasion-resistant material having a hardness greater than that of the piezoelectric material, and use the abrasion-resistant material as a cut-off portion of the wafer;

Step (3) Bonding one side of the wafer to be bonded to the supporting substrate;

Step (4) The thinning process is performed on the wafer from the side to be thinned, and the thinning is performed until the removal cut-off portion of the wafer is exposed. The removal cut-off portion protects the piezoelectric material of the wafer from further removal.

[Claim 18] The method for manufacturing a piezoelectric wafer according to claim 17, wherein the thinning process includes grinding or polishing.

[Claim 19] The method for manufacturing a piezoelectric wafer according to claim 17, wherein the piezoelectric material is lithium tantalate or lithium niobate.

[Claim 20] The method for manufacturing a piezoelectric wafer according to claim 17, wherein the appearance of the anti-wear material is different from that of the piezoelectric material.