WO2020030031A1 - 一种同步信号的传输方法和装置 - Google Patents

一种同步信号的传输方法和装置 Download PDF

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Publication number
WO2020030031A1
WO2020030031A1 PCT/CN2019/099724 CN2019099724W WO2020030031A1 WO 2020030031 A1 WO2020030031 A1 WO 2020030031A1 CN 2019099724 W CN2019099724 W CN 2019099724W WO 2020030031 A1 WO2020030031 A1 WO 2020030031A1
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Prior art keywords
sequence
synchronization
synchronization sequence
generator polynomial
different
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PCT/CN2019/099724
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English (en)
French (fr)
Inventor
黎超
袁璞
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华为技术有限公司
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Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to KR1020217007163A priority Critical patent/KR102468869B1/ko
Priority to MX2021001555A priority patent/MX2021001555A/es
Priority to EP23176308.7A priority patent/EP4277374A3/en
Priority to JP2021507007A priority patent/JP7264991B2/ja
Priority to EP19846973.6A priority patent/EP3836650B1/en
Priority to BR112021002221-0A priority patent/BR112021002221A2/pt
Publication of WO2020030031A1 publication Critical patent/WO2020030031A1/zh
Priority to US17/171,492 priority patent/US11696245B2/en
Priority to US18/320,810 priority patent/US20230292268A1/en

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00—Arrangements affording multiple use of the transmission path
    • H04L5/003—Arrangements for allocating sub-channels of the transmission path
    • H04L5/0048—Allocation of pilot signals, i.e. of signals known to the receiver
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W56/00—Synchronisation arrangements
    • H04W56/001—Synchronization between nodes
    • H04W56/0015—Synchronization between nodes one node acting as a reference for the others
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2602—Signal structure
    • H04L27/261—Details of reference signals
    • H04L27/2613—Structure of the reference signals
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J13/00—Code division multiplex systems
    • H04J13/0007—Code type
    • H04J13/0022—PN, e.g. Kronecker
    • H04J13/0025—M-sequences
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J13/00—Code division multiplex systems
    • H04J13/0074—Code shifting or hopping
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2602—Signal structure
    • H04L27/2605—Symbol extensions, e.g. Zero Tail, Unique Word [UW]
    • H04L27/2607—Cyclic extensions
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W56/00—Synchronisation arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J11/00—Orthogonal multiplex systems, e.g. using WALSH codes
    • H04J11/0069—Cell search, i.e. determining cell identity [cell-ID]
    • H04J11/0073—Acquisition of primary synchronisation channel, e.g. detection of cell-ID within cell-ID group
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J11/00—Orthogonal multiplex systems, e.g. using WALSH codes
    • H04J11/0069—Cell search, i.e. determining cell identity [cell-ID]
    • H04J11/0076—Acquisition of secondary synchronisation channel, e.g. detection of cell-ID group
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W4/00—Services specially adapted for wireless communication networks; Facilities therefor
    • H04W4/30—Services specially adapted for particular environments, situations or purposes
    • H04W4/40—Services specially adapted for particular environments, situations or purposes for vehicles, e.g. vehicle-to-pedestrians [V2P]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W4/00—Services specially adapted for wireless communication networks; Facilities therefor
    • H04W4/30—Services specially adapted for particular environments, situations or purposes
    • H04W4/40—Services specially adapted for particular environments, situations or purposes for vehicles, e.g. vehicle-to-pedestrians [V2P]
    • H04W4/44—Services specially adapted for particular environments, situations or purposes for vehicles, e.g. vehicle-to-pedestrians [V2P] for communication between vehicles and infrastructures, e.g. vehicle-to-cloud [V2C] or vehicle-to-home [V2H]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W4/00—Services specially adapted for wireless communication networks; Facilities therefor
    • H04W4/30—Services specially adapted for particular environments, situations or purposes
    • H04W4/40—Services specially adapted for particular environments, situations or purposes for vehicles, e.g. vehicle-to-pedestrians [V2P]
    • H04W4/46—Services specially adapted for particular environments, situations or purposes for vehicles, e.g. vehicle-to-pedestrians [V2P] for vehicle-to-vehicle communication [V2V]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W56/00—Synchronisation arrangements
    • H04W56/001—Synchronization between nodes
    • H04W56/002—Mutual synchronization
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W84/00—Network topologies
    • H04W84/02—Hierarchically pre-organised networks, e.g. paging networks, cellular networks, WLAN [Wireless Local Area Network] or WLL [Wireless Local Loop]
    • H04W84/04—Large scale networks; Deep hierarchical networks
    • H04W84/06—Airborne or Satellite Networks

Definitions

  • Embodiments of the present application relate to the field of communications, and in particular, to a method and an apparatus for transmitting a synchronization signal.
  • V2V Device-to-Device
  • V2V Vehicle-to-Vehicle
  • V2P Vehicle-to-Pedestrian
  • V2I / N Vehicle-to-Infrastructure / Network
  • the basic of D2D and V2X communication is to achieve synchronization between the terminal devices that need to communicate.
  • the synchronization signal between the terminal devices may be interfered by the synchronization signal on the cellular link.
  • the synchronization signal between D2D and V2X devices may also interfere with the cellular chain
  • the transmission of synchronization signals on the road causes the synchronization performance between devices to decrease.
  • the embodiments of the present application provide a method and an apparatus for transmitting a synchronization signal, which can improve synchronization performance between devices.
  • an embodiment of the present application provides a method for sending a synchronization signal.
  • a first device generates a first synchronization sequence and / or a second synchronization sequence, wherein the first synchronization sequence and the third synchronization sequence in a set Any sequence is different, and / or, the second synchronization sequence is different from any sequence in the fourth synchronization sequence set; any sequence in the third synchronization sequence set satisfies:
  • the synchronization sequence obtained by the method provided in the embodiment of the present application can be different from any synchronization sequence in the synchronization sequence set in the 5G NR system, effectively reducing the synchronization signals of other source synchronization devices and the synchronization on the Uu link in the NR system Interference between signals, thus improving synchronization performance between devices.
  • the first synchronization sequence is different from any sequence in the third synchronization sequence set, including the cyclic shift of the first synchronization sequence to any sequence in the third synchronization sequence set ; And / or, a generator polynomial corresponding to the first synchronization sequence is different from a generator polynomial corresponding to any sequence in the third synchronization sequence set.
  • ⁇ is a non-zero integer.
  • the value of ⁇ is greater than 0 and less than A.
  • said Or said R is a positive integer, Means round down, Rounds up.
  • the ⁇ is indicated by signaling, or the ⁇ is predefined.
  • the generator polynomial corresponding to the first synchronization sequence is different from the generator polynomial corresponding to any sequence in the third synchronization sequence set, and the generator polynomial corresponding to the first synchronization sequence is [K 6 , K 5 , K 4 , K 3 , K 2 , K 1 , K 0 ] ⁇ [0,0,1,0,0,0,1], and K is an integer, where x (0) ⁇ x (6) is the initial value.
  • the second synchronization sequence satisfies:
  • the second synchronization sequence is different from any sequence in the fourth synchronization sequence set, including the sequence For sequence Cyclic shift, and / or, sequence For sequence And / or, the generator polynomial corresponding to the second synchronization sequence is different from the generator polynomial corresponding to any sequence in the fourth synchronization sequence set.
  • the second synchronization sequence satisfies among them ⁇ is a non-zero integer.
  • the ⁇ ⁇ 45, or the ⁇ is greater than zero and not an integer multiple of 5, or the ⁇ is greater than or equal to 45 and an integer multiple of 5.
  • the ⁇ 45.
  • the ⁇ is indicated by signaling, or the ⁇ is predefined.
  • the generator polynomial corresponding to the second synchronization sequence includes
  • x 1 (i + 7) (x 1 (i + 3) + x 1 (i + 2) + x 1 (i + 1) + x 1 (i)) mod 2 where x 1 (0) ⁇ x 1 (6) is the initial value.
  • the method further includes determining a synchronization signal identifier N ID from a synchronization signal identifier set; and determining a first identifier according to the synchronization signal identifier N ID. And / or second logo among them
  • the synchronization signal identifier set includes one or more subsets, and the synchronization signal identifiers in the subset indicate at least one of the following information:
  • the timing reference of the first device is a network device
  • the timing reference of the first device is a second device that uses a network device as a timing parameter
  • the timing reference of the first device is a satellite
  • the timing reference of the first device is a second device using the satellite as a timing parameter
  • the timing reference of the first device is the second device that uses the first device itself or is not synchronized to a network device or satellite.
  • an embodiment of the present application provides a method for receiving a synchronization signal, which is applied to a second device.
  • the method includes receiving a first synchronization signal corresponding to a first synchronization sequence and / or a second synchronization signal corresponding to a second synchronization sequence; wherein the first synchronization sequence is different from any sequence in a third synchronization sequence set , And / or, the second synchronization sequence is different from any sequence in the fourth synchronization sequence set; any sequence in the third synchronization sequence set satisfies:
  • the first synchronization sequence is different from any sequence in the third synchronization sequence set, including that the first synchronization sequence is a cyclic shift of any sequence in the third synchronization sequence set And / or, the generator polynomial corresponding to the first synchronization sequence is different from the generator polynomial corresponding to any sequence in the third synchronization sequence set.
  • the value of ⁇ is greater than 0 and less than 43.
  • said Or said R is a positive integer, Means round down, Rounds up.
  • the ⁇ is indicated by signaling, or the ⁇ is predefined.
  • the generator polynomial corresponding to the first synchronization sequence is different from the generator polynomial corresponding to any sequence in the third synchronization sequence set, including that the generator polynomial corresponding to the first synchronization sequence is [K 6 , K 5 , K 4 , K 3 , K 2 , K 1 , K 0 ] ⁇ [0,0,1,0,0,0,1], and K is an integer, where x (0) ⁇ x (6) is the initial value.
  • the second synchronization sequence satisfies:
  • the second synchronization sequence is different from any sequence in the fourth synchronization sequence set, and includes:
  • sequence For sequence Cyclic shift, and / or, sequence For sequence And / or, the generator polynomial corresponding to the second synchronization sequence is different from the generator polynomial corresponding to any sequence in the fourth synchronization sequence set.
  • the second synchronization sequence satisfies among them ⁇ is a non-zero integer.
  • the ⁇ ⁇ 45, or the ⁇ is greater than zero and not an integer multiple of 5, or the ⁇ is greater than or equal to 45 and an integer multiple of 5.
  • the ⁇ is indicated by signaling, or the ⁇ is predefined.
  • the method further includes determining a timing reference source of the first device according to the synchronization signal identifier N ID .
  • acquiring the synchronization signal identifier N ID according to the first synchronization information and / or the second synchronization information includes determining the first identifier according to the first synchronization signal and / or the second synchronization signal. And / or second logo According to the first identification And / or the second identification Determine the synchronization signal identification N ID , where: or
  • an embodiment of the present invention provides a device for sending a synchronization signal, including a processor, a memory and a transceiver coupled to the processor; wherein,
  • the processor is configured to generate a first synchronization sequence and / or a second synchronization sequence, wherein the first synchronization sequence is different from any sequence in a third synchronization sequence set, and / or the second synchronization sequence Different from any sequence in the fourth synchronization sequence set; any sequence in the third synchronization sequence set satisfies:
  • the transceiver is configured to send a first synchronization signal corresponding to the first synchronization sequence and / or a second synchronization signal corresponding to the second synchronization sequence.
  • the first synchronization sequence is different from any sequence in the third synchronization sequence set, including that the first synchronization sequence is a cyclic shift of any sequence in the third synchronization sequence set And / or, the generator polynomial corresponding to the first synchronization sequence is different from the generator polynomial corresponding to any sequence in the third synchronization sequence set.
  • the value of ⁇ is greater than 0 and less than A.
  • said Or said R is a positive integer, Means round down, Rounds up.
  • the ⁇ is indicated by signaling, or the ⁇ is predefined.
  • the generator polynomial corresponding to the first synchronization sequence is different from the generator polynomial corresponding to any sequence in the third synchronization sequence set, including:
  • the generator polynomial corresponding to the first synchronization sequence is [K 6 , K 5 , K 4 , K 3 , K 2 , K 1 , K 0 ] ⁇ [0,0,1,0,0,0,1], and K is an integer, where x (0) ⁇ x (6) is the initial value.
  • the second synchronization sequence satisfies:
  • the second synchronization sequence is different from any sequence in the fourth synchronization sequence set, and includes:
  • sequence For sequence Cyclic shift, and / or, sequence For sequence And / or, the generator polynomial corresponding to the second synchronization sequence is different from the generator polynomial corresponding to any sequence in the fourth synchronization sequence set.
  • the second synchronization sequence satisfies among them ⁇ is a non-zero integer.
  • the ⁇ ⁇ 45, or the ⁇ is greater than zero and not an integer multiple of 5, or the ⁇ is greater than or equal to 45 and an integer multiple of 5.
  • the ⁇ 45.
  • the ⁇ is indicated by signaling, or the ⁇ is predefined.
  • the generator polynomial corresponding to the second synchronization sequence is different from the generator polynomial corresponding to any sequence in the fourth synchronization sequence set, including the generator polynomial corresponding to the second synchronization sequence include
  • x 1 (i + 7) (x 1 (i + 3) + x 1 (i + 2) + x 1 (i + 1) + x 1 (i)) mod 2 where x 1 (0) ⁇ x 1 (6) is the initial value.
  • the processor is further configured to determine a synchronization signal identifier N ID from a synchronization signal identifier set; the processor is further configured to determine a first identifier according to the synchronization signal identifier N ID And / or second logo among them
  • the synchronization signal identifier set includes one or more subsets, and the synchronization signal identifiers in the subset indicate at least one of the following information:
  • the timing reference of the first device is a network device
  • the timing reference of the first device is a second device that uses a network device as a timing parameter
  • the timing reference of the first device is a satellite
  • the timing reference of the first device is a second device using the satellite as a timing parameter
  • the timing reference of the first device is the second device that uses the first device itself or is not synchronized to a network device or satellite.
  • an embodiment of the present invention provides a device for receiving a synchronization signal, including a processor, a memory and a transceiver coupled to the processor; wherein,
  • the transceiver is configured to receive a first synchronization signal corresponding to a first synchronization sequence and / or a second synchronization signal corresponding to a second synchronization sequence; wherein the first synchronization sequence and any one of a third synchronization sequence set Different, and / or, the second synchronization sequence is different from any sequence in the fourth synchronization sequence set; any sequence in the third synchronization sequence set satisfies:
  • the processor is configured to obtain a synchronization signal identifier N ID according to the first synchronization sequence and / or the second synchronization sequence.
  • the first synchronization sequence is different from any sequence in the third synchronization sequence set, including that the first synchronization sequence is a cyclic shift of any sequence in the third synchronization sequence set And / or, the generator polynomial corresponding to the first synchronization sequence is different from the generator polynomial corresponding to any sequence in the third synchronization sequence set.
  • the value of ⁇ is greater than 0 and less than 43.
  • said Or said R is a positive integer, Means round down, Rounds up.
  • the ⁇ is indicated by signaling, or the ⁇ is predefined.
  • the generator polynomial corresponding to the first synchronization sequence is different from the generator polynomial corresponding to any sequence in the third synchronization sequence set.
  • the generator polynomial corresponding to the first synchronization sequence is [K 6 , K 5 , K 4 , K 3 , K 2 , K 1 , K 0 ] ⁇ [0,0,1,0,0,0,1], and K is an integer, where x (0) ⁇ x (6) is the initial value.
  • the second synchronization sequence satisfies:
  • the second synchronization sequence is different from any sequence in the fourth synchronization sequence set, and includes:
  • sequence For sequence Cyclic shift, and / or, sequence For sequence And / or, the generator polynomial corresponding to the second synchronization sequence is different from the generator polynomial corresponding to any sequence in the fourth synchronization sequence set.
  • the second synchronization sequence satisfies among them ⁇ is a non-zero integer.
  • the ⁇ ⁇ 45, or the ⁇ is greater than zero and not an integer multiple of 5, or the ⁇ is greater than or equal to 45 and an integer multiple of 5.
  • the ⁇ 45.
  • the ⁇ is indicated by signaling, or the ⁇ is predefined.
  • the generator polynomial corresponding to the second synchronization sequence is different from the generator polynomial corresponding to any sequence in the fourth synchronization sequence set, including:
  • the generator polynomial corresponding to the second synchronization sequence includes
  • x 1 (i + 7) (x 1 (i + 3) + x 1 (i + 2) + x 1 (i + 1) + x 1 (i)) mod 2 where x 1 (0) ⁇ x 1 (6) is the initial value.
  • the processor is further configured to determine a timing reference source of the first device according to the synchronization signal identifier N ID .
  • the processor is configured to obtain the synchronization signal identifier N ID according to the first synchronization information and / or the second synchronization information, including:
  • the processor is configured to determine a first identifier according to a first synchronization signal and / or the second synchronization signal And / or second logo
  • the processor is configured to, according to the first identifier And / or the second identification Determine the synchronization signal identification N ID , where: or
  • the first device may be a terminal device, a network device, or a device that executes the foregoing method in the terminal device or the network device.
  • the second device may be a terminal device, a network device, or a device that executes the foregoing method in the terminal device or the network device.
  • a communication device configured to perform a function of the behavior of the first device or the second device in the foregoing method.
  • These functions can be realized by hardware, and can also be implemented by hardware executing corresponding software.
  • the hardware or software includes one or more units corresponding to the functions described above.
  • a computer storage medium containing instructions which when run on a computer, causes the computer to perform a function of the behavior of the first device or the second device in the above method.
  • FIG. 1 is a schematic architecture diagram of a wireless communication system according to an embodiment of the present application.
  • FIG. 2 is a schematic diagram of a possible structure of a network device in an embodiment of the present application.
  • FIG. 3 is a schematic diagram of a possible structure of a terminal device in an embodiment of the present application.
  • FIG. 4 is a schematic diagram showing an interval of different cyclic shift values based on an m sequence in an embodiment of the present application.
  • FIG. 5 is a schematic signaling diagram of a method provided by an embodiment of the present application.
  • One in the embodiments of the present invention means a single individual, and does not mean that it can only be one individual, and cannot be applied to other individuals.
  • a terminal device in the embodiments of the present invention refers to a certain terminal device, and does not mean that it can only be applied to a specific terminal device.
  • system may be used interchangeably with "network.”
  • references to "one embodiment” (or “an implementation") or “an embodiment” (or “an implementation”) in this application means that a particular feature, structure, characteristic, etc. described in connection with the embodiment is included in at least one embodiment .
  • the appearance of "in one embodiment” or “in an embodiment” in various places in the specification does not mean that they all refer to the same embodiment.
  • "One” in the embodiments of the present invention means a single individual, and does not mean that it can only be one individual, and cannot be applied to other individuals.
  • a terminal device in the embodiments of the present invention refers to a certain terminal device, and does not mean that it can only be applied to a specific terminal device.
  • the term “system” may be used interchangeably with "network.”
  • references to "one embodiment” (or “an implementation") or “an embodiment” (or “an implementation”) in this application means that a particular feature, structure, characteristic, etc. described in connection with the embodiment is included in at least one embodiment .
  • the appearance of "in one embodiment” or “in an embodiment” in various places in the specification does not mean that they all refer to the same embodiment.
  • such a phrase includes any of the six schemes, that is, includes A but not including B and C, including B but not including A and C, including C but not including A and B, including A and B but not including C, including B and C but not including A , Including A and C but not B, and the three options A, B, and C.
  • the embodiments of the present invention can be understood in the foregoing manner.
  • the wireless communication system may be a system using various radio access technologies (radio access technologies, RATs), such as code division multiple access (CDMA), time division multiple access (TDMA), Frequency division multiple access (FDMA), orthogonal frequency-division multiple access (OFDMA), or single carrier frequency division multiple access (FDMA, SC-FDMA) and other systems .
  • radio access technologies such as code division multiple access (CDMA), time division multiple access (TDMA), Frequency division multiple access (FDMA), orthogonal frequency-division multiple access (OFDMA), or single carrier frequency division multiple access (FDMA, SC-FDMA) and other systems .
  • CDMA code division multiple access
  • TDMA time division multiple access
  • FDMA Frequency division multiple access
  • OFDMA orthogonal frequency-division multiple access
  • SC-FDMA single carrier frequency division multiple access
  • the wireless communication system can be a long term evolution (LTE) system, a CDMA system, a wideband code division multiple access (WCDMA) system, a global system for mobile communications (GSM) system, and a wireless local area network (GSM).
  • LTE long term evolution
  • CDMA compact code division multiple access
  • WCDMA wideband code division multiple access
  • GSM global system for mobile communications
  • GSM wireless local area network
  • WLAN wireless local area network
  • 5G 5th Generation
  • NR New Radio
  • FIG. 1 shows a possible scenario in which there is one network device 101 and three terminal devices 102, 103, and 104.
  • the network device 101 and the terminal device 103 are two different source synchronization devices in the same wireless communication system.
  • the network device 101 may be a base station in a cellular network
  • the terminal devices 102, 103, and 104 may be an in-vehicle wireless communication device or a mobile phone, and the terminal devices 102, 103, and 104 may perform wireless communication with a base station, and the communication devices 102, 103, and 104 may also perform direct communication between terminal devices.
  • the network device 101 sends a synchronization signal 2 to the terminal devices 102, 103, and 104.
  • the terminal device 103 sends a synchronization signal 1 to the terminal devices 102 and 104.
  • the terminal devices 102 and 104 need to simultaneously synchronize the synchronization signal 1 and / or Signal 2 is blindly detected. If synchronization sequence 1 for synchronization signal 1 and synchronization sequence 2 for synchronization signal 2 are the same or have a high correlation, terminal devices 102 and 104 may be unable to distinguish between synchronization signal 1 and synchronization signal 2. That is, the synchronization signals 1 and 2 will interfere with each other, and affect the establishment of a connection between the terminal devices 102, 103, and 104 and the network device 101, and the establishment of a direct connection between the terminal devices 102 and 104 and the terminal device 103.
  • the synchronization signals of different source synchronization devices supporting different services may also cause interference, while the synchronization signals of source synchronization devices supporting other services (outside the Uu link) may also be separately associated with Interference is caused by synchronization signals on the cellular link.
  • the terminal device 102 sends a synchronization signal 3.
  • the synchronization signal 1 and the synchronization signal 3 may be different transmission modes for links between different devices. For example, synchronization signal 1 is used for transmission mode 1, transmission mode 1 is used for eMBB services, synchronization signal 3 is used for transmission mode 3, and transmission mode 3 is used for security services related to intelligent traffic of V2X. The timing reference between them may be different.
  • the synchronization signal 1 and the synchronization signal 2 also need to avoid potential mutual interference.
  • the mutual interference between the three signals between the synchronization signal 1 and the synchronization signal 2 and the synchronization signal 3 also needs to be avoided as much as possible. Therefore, the embodiments of the present application provide a solution capable of improving synchronization performance between devices. It should be understood that the scenario shown in FIG. 1 is only an example, and is not intended to limit the solution of the present application.
  • the network equipment involved in this application is a device that is deployed in a wireless access network to provide wireless communication functions for terminal equipment.
  • the network device may be a base station (Base, Station, BS), for example, a macro base station, a micro base station, a relay station, or an access point, and so on. It may also be another form of device, such as a street lamp, a roadside unit (RSU).
  • BS Base, Station
  • RSU roadside unit
  • the names of devices with network device functions may be different. For example, they are network devices or base stations in the fifth generation 5G network.
  • eNB Long Term Evolution, In an LTE
  • eNodeB Long Term Evolution, In an LTE
  • 3G Third Generation
  • Node B Node B
  • V2X V2X communication
  • RSU roadside unit
  • SOC system-on-chip
  • the terminal devices involved in this application may include various handheld devices with wireless communication functions, vehicle-mounted devices, wearable devices, computing devices, or other processing devices connected to a wireless modem, or units, components, devices, and chips in the above devices Or SOC.
  • the terminal device may be referred to as a wireless communication device, and may also be referred to as a mobile station (MS), a terminal, a user equipment (UE), and the like.
  • MS mobile station
  • UE user equipment
  • the terminal device may include a subscriber unit, a cellular phone, a smart phone, a wireless data card, a personal digital assistant (PDA) computer, a tablet computer, and a modem ( modem) or modem processor, handheld device, laptop computer, netbook, cordless phone or wireless local loop (WLL) station, Bluetooth device , Machine type communication (machine type communication (MTC) terminals, etc.).
  • PDA personal digital assistant
  • WLL wireless local loop
  • Bluetooth device Bluetooth device
  • MTC Machine type communication
  • Terminal equipment can support one or more wireless technologies for wireless communication, such as 5G, LTE, WCDMA, CDMA, 1X, Time Division-Synchronous Code Division Multiple Access (TS-SCDMA), GSM, 802.11 and more.
  • the terminal device can also support different transmission services or different transmission modes on the cellular link or sidelink between the terminal devices, such as vehicle to vehicle (V2X) services, device to device (device to device, D2D) services can also support different technical features on cellular links, such as the Internet of Things (IoT), machine type communication (MTC), and so on.
  • V2X vehicle to vehicle
  • D2D device to device
  • IoT Internet of Things
  • MTC machine type communication
  • Multiple terminal devices can perform the same or different services. For example, mobile broadband services, enhanced mobile broadband (eMBB) services, ultra-reliable and low-latency communication (URLLC) services, and so on.
  • eMBB enhanced mobile broadband
  • URLLC ultra-reliable and low-latency communication
  • the network device 101 can execute the method provided by the embodiment of the present invention.
  • the network device 101 may include: a controller or processor 201 (hereinafter, the processor 201 is used as an example for description) and a transceiver 202.
  • the controller / processor 201 is sometimes referred to as a modem processor.
  • the modem processor 201 may include a baseband processor (BBP) (not shown), which processes the digitized received signal to extract information or data bits conveyed in the signal.
  • BBP baseband processor
  • DSPs digital signal processors
  • IC separate integrated circuit
  • the transceiver 402 may be used to support the transmission and reception of information between the network device 101 and the terminal device, and support radio communication between the terminal devices.
  • the processor 201 may also be configured to perform functions of various terminal devices communicating with other network devices.
  • the uplink signal from the terminal device is received via the antenna, mediated by the transceiver 202, and further processed by the processor 201 to recover the service data and / or signaling information sent by the terminal device.
  • service data and / or signaling messages are processed by the terminal device and modulated by the transceiver 202 to generate a downlink signal and transmitted to the terminal device via the antenna.
  • the network device 101 may further include a memory 203, which may be used to store program code and / or data of the network device 101.
  • the transceiver 202 may include independent receiver and transmitter circuits, or the same circuit may be used to implement the transceiver function.
  • the network device 101 may further include a communication unit 204 for supporting the network device 201 to communicate with other network entities.
  • the network device 101 is configured to support communication between the network device 101 and a network device of a core network.
  • the network device may further include a bus.
  • the transceiver 202, the memory 203, and the communication unit 204 may be connected to the processor 201 through a bus.
  • the bus may be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, or the like.
  • PCI Peripheral Component Interconnect
  • EISA Extended Industry Standard Architecture
  • the bus may include an address bus, a data bus, a control bus, and the like.
  • FIG. 3 is a schematic diagram of a possible structure of a terminal device in the wireless communication system.
  • the terminal device can execute the method provided by the embodiment of the present invention.
  • the terminal device may be any one of three terminal devices 102-104.
  • the terminal device includes a transceiver 301, an application processor 302, a memory 303, and a modem processor 304.
  • the transceiver 301 can adjust (for example, analog conversion, filtering, amplification, up-conversion, etc.) the output samples and generate an uplink signal, which is transmitted to the base station described in the above embodiment via an antenna.
  • the antenna receives a downlink signal transmitted by a network device.
  • the transceiver 301 can condition (e.g., filter, amplify, downconvert, and digitize, etc.) the signal received from the antenna and provide input samples.
  • the modem processor 304 is sometimes referred to as a controller or processor and may include a baseband processor (BBP) (not shown) that processes the digitized received signal to extract the information conveyed in the signal Or data bits.
  • BBP baseband processor
  • BBP is typically implemented on demand or as desired in one or more numbers within modem processor 304 or as a separate integrated circuit (IC).
  • the modem processor 304 may include an encoder 3041, a modulator 3042, a decoder 3043, and a demodulator 3044.
  • the encoder 3041 is configured to encode a signal to be transmitted.
  • the encoder 3041 may be used to receive service data and / or signaling messages to be sent on the uplink, and process (e.g., format, encode, or interleave, etc.) the service data and signaling messages.
  • the modulator 3042 is configured to modulate an output signal of the encoder 3041.
  • the modulator may perform symbol mapping and / or modulation on the output signals (data and / or signaling) of the encoder, and provide output samples.
  • the demodulator 3044 is used for demodulating the input signal.
  • the demodulator 3044 processes the input samples and provides symbol estimates.
  • the decoder 5043 is configured to decode the demodulated input signal.
  • the decoder 3043 deinterleaves and / or decodes the demodulated input signal, and outputs the decoded signal (data and / or signaling).
  • the encoder 3041, the modulator 3042, the demodulator 3044, and the decoder 3043 may be implemented by a synthesized modem processor 304. These units process according to the radio access technology used by the radio access network.
  • the modem processor 304 receives digitized data that can represent voice, data, or control information from the application processor 302, and processes the digitized data for transmission.
  • the modem processor can support one or more of multiple wireless communication protocols of multiple communication systems, such as LTE, New Air Interface, Universal Mobile Telecommunications System (UMTS), High-Speed Packet Access Packet Access, HSPA) and so on.
  • the modem processor 304 may also include one or more memories.
  • the modem processor 304 and the application processor 302 may be integrated in a processor chip.
  • the memory 303 is configured to store program code (sometimes also referred to as a program, an instruction, software, etc.) and / or data for supporting communication of the terminal device.
  • program code sometimes also referred to as a program, an instruction, software, etc.
  • the memory 203 or the memory 303 may include one or more storage units.
  • the memory 203 or the memory 303 may be a storage unit inside the processor 201 or the modem processor 304 or the application processor 302 for storing program code, or may be It is an external storage unit independent from the processor 201 or the modem processor 304 or the application processor 302, or may also be a storage unit including the processor 201 or the modem processor 304 or the application processor 302 and the processor 201 or the modem
  • the components of the processor 304 or the application processor 302 are independent external storage units.
  • the processor 201 and the modem processor 301 may be the same type of processor, or may be different types of processors. For example, it can be implemented in a central processing unit (CPU), a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), and a field programmable gate array (ASIC). Field Programmable Gate Array (FPGA) or other programmable logic devices, transistor logic devices, hardware components, other integrated circuits, or any combination thereof.
  • the processor 201 and the modem processor 301 may implement or execute various exemplary logical blocks, modules, and circuits described in connection with the disclosure of the embodiments of the present invention.
  • the processor may also be a combination of devices that implement computing functions, such as a combination of one or more microprocessors, a combination of a DSP and a microprocessor, or a system-on-a-chip (SOC).
  • the synchronization signals sent by the network equipment include a primary synchronization signal (PSS) and a secondary synchronization signal (SSS).
  • PSS primary synchronization signal
  • SSS secondary synchronization signal
  • the terminal equipment needs to receive PSS and SSS.
  • the PSS (at least) is used for a receiver of a synchronization signal to perform initial symbol positioning (boundary), position determination of a synchronization signal block (Synchronization Signal Block, SSB), cyclic prefix, subframe positioning (boundary), and initial cell frequency synchronization.
  • SS is used for radio frame boundary calibration.
  • PSS and SSS are used together for physical layer cell ID detection.
  • a network device To send a synchronization signal, a network device must first generate a corresponding sequence.
  • a cellular link is generally called a Uu link in the standard, which refers to a wireless link between a terminal device and a network device, such as a wireless link between a mobile phone or a vehicle-mounted communication device and a base station.
  • a cellular link is generally called a Uu link in the standard, which refers to a wireless link between a terminal device and a network device, such as a wireless link between a mobile phone or a vehicle-mounted communication device and a base station.
  • the synchronization signals on the Uu link in the NR system described below are all downlink synchronization signals.
  • the master synchronization sequence d PSS (n) for PSS is generated according to the following formula:
  • formula (2) is a binary sequence Generator polynomial of, can generate binary sequence based on initial value (3) and generator polynomial (2)
  • Binary sequence generated as above Is an m-sequence, which is an abbreviation of the longest linear feedback shift register sequence, and is a pseudo-random sequence, a pseudo noise (PN) code, or a pseudo-random code.
  • the independent variable m can be regarded as the cyclic shift of the independent variable n in d PSS (n), and the corresponding cyclic shift value is one of them with Yes with cell ID Relevant identification.
  • 1008 physical layer cell numbers are defined in the NR standard.
  • the slave synchronization sequence d SSS (n) for SSS is generated according to the following formula:
  • the design of the synchronization sequence d SSS (n) uses a Gold code sequence, which is a sequence generated based on the m sequence and consists of two m sequences. As described in formulas (4), (5), and (6), with Each is a binary m sequence. Similarly, x 0 (0) to x 0 (6) are sequences. X 1 (0) ⁇ x 1 (6) is the initial value of The initial value of then Equation (5) is a binary m-sequence with Generator polynomial of, m 0 is a sequence Cyclic shift value, m 1 is the sequence Cyclic shift value, where with Yes with cell ID Relevant identification. 1008 physical layer cell numbers are defined in the NR standard.
  • slave synchronization sequences that can be generated by the above formula constitute a slave synchronization sequence set on the Uu link in the NR system.
  • this slave synchronization sequence set is represented as ⁇ d SSS (n) ⁇ in this application.
  • the synchronization sequence set in the system includes a total of 1008 sets of different master synchronization sequences and slave synchronization sequences.
  • the other source synchronization device refers to a source synchronization device that supports other services in the NR system other than the cellular network, or a source synchronization device in other wireless communication systems other than the
  • an embodiment of the present application provides a design scheme of a synchronization sequence.
  • the synchronization sequence obtained by the method provided in the embodiment of the present application can be different from any synchronization sequence in a synchronization sequence set in a 5G NR system and It has lower correlation with any synchronization sequence in the synchronization sequence set in the 5G NR system, effectively reducing the interference between the synchronization signals of other source synchronization equipment and the synchronization signals on the Uu link in the NR system, thereby improving Synchronization performance between devices.
  • a vehicle-to-everything (V2X) service in the NR system is used as an example.
  • a terminal device supporting the V2X service in the NR system can directly communicate with other terminal devices without using a network device.
  • the relay as the source synchronization device, sends a first synchronization signal and / or a second synchronization signal, where the first synchronization signal may be a master synchronization signal and the second synchronization signal may be a slave synchronization signal.
  • the first synchronization sequence is different from any of the sequences of ⁇ d PSS (n) ⁇ , and / or the second synchronization sequence is different from any of the sequences of ⁇ d SSS (n) ⁇ .
  • the first synchronization sequence is a cyclic shift of any sequence in ⁇ d PSS (n) ⁇ ; and / or, the generator polynomial corresponding to the first synchronization sequence is in ⁇ d PSS (n) ⁇
  • the generator polynomial corresponding to any sequence is different.
  • the binary sequence x is an m sequence. According to the characteristics of the m sequence, it can be known that the cross-correlation value of an m sequence and its own cyclic shift is the theoretically optimal value of -1. This can be illustrated by the following formula:
  • the first synchronization sequence d 1 (n) is a cyclic shift of any sequence in ⁇ d PSS (n) ⁇ , indicating that the correlation value between the first synchronization sequence and any sequence in ⁇ d PSS (n) ⁇ is theoretical The lowest value can reduce the interference between the first synchronization signal corresponding to the first synchronization sequence and the main synchronization signal on the Uu link in the NR system. Therefore, the first synchronization sequence is a cyclic shift of any of the sequences ⁇ d PSS (n) ⁇ , which can ensure that the synchronization between the first synchronization signal corresponding to the first synchronization sequence and the main synchronization signal on the Uu link in the NR system.
  • the first synchronization sequence is a cyclic shift of any of the sequences ⁇ d PSS (n) ⁇ .
  • One possible implementation manner is that when the first synchronization sequence is generated, the sequence is the same as the main synchronization signal sequence on the Uu link in the NR system.
  • the generator polynomials used to generate the m-sequence are the same, but they use different cyclic shift values.
  • Generating m-sequences refers to generating polynomials.
  • the generated sequences are different and can reach the theoretically best correlation performance of the m-sequence of formula (10).
  • the length of the main synchronization signal sequence on the Uu link in the NR system is 127. At present, only three values of 0, 43, 86 are used for the cyclic shift value. For m-sequences with a length of 127, a total of 127 different cyclic shift values can be used. Therefore, a sufficient number of cyclic shift values can be generated as the first synchronization sequence in the embodiment of the present application.
  • ⁇ d PSS (n) ⁇ when used ⁇ d PSS (n) ⁇ to any sequence corresponding to a different generating polynomial to generate the m-sequence generator polynomial, can be reduced with a first synchronization sequence ⁇ d PSS (n) ⁇ to any Cross-correlation between a sequence.
  • this design method is simple, relatively small design changes compared to the NR system Uu link, strong version inheritance. For an m-sequence of a certain length, at least one other m-sequence paired with it can always be found, and its cross-correlation value can reach the theoretical bounds of the sequence (see equation (11) later).
  • the generator polynomial corresponding to the first synchronization sequence is different from the generator polynomial corresponding to the main synchronization signal sequence on the Uu link in the NR system, the first synchronization sequence and the main synchronization are different regardless of their respective cyclic shift values
  • the sequences are always different and have the best cross-correlation performance achievable by the above theory. Therefore, when different generator polynomials are used, the cyclic shift value corresponding to the first synchronization sequence is not specifically limited. Alternatively, when different generator polynomials are used, the same cyclic shift value as the main synchronization signal sequence on the Uu link in the NR system may be used.
  • the cyclic shift of the first synchronization sequence to any of the sequences ⁇ d PSS (n) ⁇ can be implemented in the following manner.
  • the master synchronization sequence d PSS (n) is the m sequence To A cyclic shift of a cyclic shift value. In that case.
  • the first synchronization sequence d 1 (n) is based on the same m sequence as d PSS (n) Increase the cyclic shift value by an offset value ⁇ , that is, the first synchronization sequence d 1 (n) is an m sequence To Is the cyclic shift of the cyclic shift value, where Optional, Respectively with the d PSS (n) expression with The value ranges are the same. Optional, And Therefore, in this case, it can be ensured that the first synchronization sequence d 1 (n) is a cyclic shift of any of the sequences ⁇ d PSS (n) ⁇ . Further, a new cyclic shift value The 3 cyclic shift values corresponding to d PSS (n) are placed at equal intervals.
  • the first synchronization sequence d 1 (n) is the primary synchronization sequence d on the Uu link in the NR system.
  • PSS (n) has better frequency deviation detection performance. The reason is that, for m-sequences, if the cyclic shift value of the target sequence detected by the device is not equal to the cyclic shift value interval of another potential target or the interference sequence, the performance of anti-frequency deviation is determined by one of the smallest intervals determine. Only when the cyclic shift value of the target sequence is equal to or as far as possible from the cyclic shift value of another potential target or the interference sequence, the ability to resist frequency offset can reach the maximum value.
  • the first synchronization sequence d 1 (n) in this case is based on the same m sequence as d PSS (n) m sequence It may be generated by the same generator polynomial and initial value, or may be generated by different generator polynomials and initial values, which is not limited here.
  • the cyclic shift value corresponding to the first synchronization sequence d 1 (n) and the cyclic shift value corresponding to d PSS (n) are equally spaced.
  • the solid arrows indicate the cyclic shift values corresponding to d PSS (n), which are 0, 43, 86, and the interval between them is 43.
  • the dotted arrow indicates the cyclic shift value corresponding to the first synchronization sequence d 1 (n).
  • the cyclic shift values corresponding to d 1 (n) are 22,65,108.
  • the first synchronization sequence d 1 (n) of the system Uu link NR The frequency deviation detection performance of the master synchronization sequence d PSS (n) is the best.
  • the offset value ⁇ is signaled or the offset value ⁇ is predefined.
  • the signaling including the offset value ⁇ may be directly notified by the base station through signaling of RRC, SIB, or DCI, or may be indirectly indicated by other parameters.
  • the signaling including the offset value ⁇ may also be directly notified by the terminal device through control signaling on a sidelink between devices, or may be indirectly indicated by other parameters.
  • the indirect indication method for example, it may be indicated by an identifier of a synchronization sequence or an identifier of a group number to which the synchronization sequence belongs.
  • the first synchronization sequence can be generated according to the following formula:
  • x (0) ⁇ x (6) are initial values
  • formula (8) is the generator polynomial of binary sequence x.
  • the initial value and generator polynomial are both the main synchronization sequence on the Uu link in the NR system, that is, d PSS (n) ,
  • the corresponding initial value and generator polynomial are the same.
  • m ′ in formula (7) adds an offset value ⁇ , 0 ⁇ ⁇ 43, and ⁇ is a positive integer, so that in this possible design, the first synchronization
  • the sequence d 1 (n) is a cyclic shift of any of the sequences ⁇ d PSS (n) ⁇ .
  • Respectively with the d PSS (n) expression with The value ranges are the same.
  • a possible implementation manner is that the generator polynomial corresponding to the first synchronization sequence is different from the generator polynomial corresponding to any sequence in ⁇ d PSS (n) ⁇ , and the m sequence corresponding to d PSS (n) is used with the same length but a generator polynomial Different m sequences are used to generate the first synchronization sequence, which can reduce the cross-correlation between the first synchronization sequence and any sequence of ⁇ d PSS (n) ⁇ . And this design method is simple, relatively small design changes compared to the NR system Uu link, strong version inheritance.
  • the generator polynomial of the first synchronization sequence can be [K 6 , K 5 , K 4 , K 3 , K 2 , K 1 , K 0 ] ⁇ [0,0,1,0,0,0,1], and K n is an integer, where x (0) ⁇ X (6) is the initial value.
  • the initial value of a sequence cannot be all zeros. When it is all zeros, the corresponding sequence cannot be generated by generating a polynomial. The reason is that the initial value of the sequence corresponds to the initial state of the cyclic shift register in the m-sequence implementation. If it is all zeros, the result output through the rotary shift register will always be zero.
  • the value of the non-zero initial value the present invention is not particularly limited.
  • m-sequences with the same shift register length there are only m-sequences generated by uncorrelated generator polynomial pairs, which have the best cross-correlation performance between them.
  • the so-called cross-correlation is the correlation value between two cyclically shifted unequal sequences.
  • the best cross-correlation performance means that the cross-correlation value of these 2 sequences at any cyclic shift value has the following theoretical minimum value:
  • the first synchronization sequence may be different from any of the sequences in ⁇ d PSS (n) ⁇ , which facilitates the cyclic shift corresponding to the first synchronization sequence Determination of bit values.
  • the correlation performance of this sequence is similar after changing from frequency domain to time domain or from time domain to frequency domain. Therefore, there are few restrictions on the receiver's implementation algorithm, which is more friendly to implementation.
  • a mode may be determined according to characteristics defined by different protocol versions, or a mode determined according to a service type, or a mode determined according to a resource selection and allocation method.
  • the first mode is used to support eMBB services; the second mode is used to support V2X services.
  • it can also be divided according to the technical characteristics of the protocol standardization process.
  • Mode 1 and / or Mode 2; Mode B and Mode 3 and / or Mode 4 are defined.
  • It may also be a mode defined according to a resource scheduling mode, such as a mode in which mode 1 is used for configuration or indication based on a base station, such as a mode in which mode 2 is used for a terminal-selected resource.
  • different methods may be used to generate synchronization sequences, that is, the terminal device or network device may also generate a fifth synchronization.
  • Sequence, the fifth synchronization sequence and the first synchronization sequence correspond to the first mode and the second mode, respectively. All possible first synchronization sequences constitute a first synchronization sequence set, and the fifth synchronization sequence is different from any one of the first synchronization sequence sets, and the difference includes that the fifth synchronization sequence is any one of the first synchronization sequence sets.
  • the generator polynomial corresponding to the fifth synchronization sequence is different from the generator polynomial corresponding to any sequence in the first synchronization sequence set.
  • the mutual interference between sidelink synchronization signal transmission of different modes can also be reduced or controlled.
  • the fifth synchronization sequence may be generated in any of the following ways.
  • Method 1 The first mode corresponds to the same generator polynomial as the second mode, and any sequence in the first synchronization sequence set corresponds to the first cyclic shift value, the fifth synchronization sequence corresponds to the second cyclic shift value, and the first cycle The shift value is different from the second cyclic shift value.
  • the first mode and the second mode correspond to different generator polynomials, that is, the generator polynomial corresponding to the fifth synchronization sequence is different from the generator polynomial corresponding to any sequence in the first synchronization sequence set.
  • Method 3 Any sequence in the first synchronization sequence set corresponds to the first generation polynomial and the first cyclic shift value, the fifth synchronization sequence corresponds to the second generation polynomial and the second cyclic shift value, and the first generation polynomial and the second The generation polynomials are different, and the first cyclic shift value and the second cyclic shift value are different.
  • the second synchronization sequence d 2 (n) may satisfy:
  • the sequence is defined in this application And sequence
  • the second synchronization sequence is different from any of the sequences in ⁇ d SSS (n) ⁇ , including the sequence For sequence Cyclic shift, and / or, sequence For sequence And / or, the generator polynomial corresponding to the second synchronization sequence is different from the generator polynomial corresponding to any of the sequences in ⁇ d SSS (n) ⁇ .
  • the second synchronization sequence is also generated based on the gold code sequence. According to the characteristics of the gold code sequence described above, it can be known that the sequence constituting the second synchronization sequence And sequence Each is generated based on an m-sequence.
  • the second synchronization sequence and any sequence of ⁇ d SSS (n) ⁇ can have the theoretically lowest correlation.
  • the generator polynomial corresponding to the second synchronization sequence is different from the generator polynomial corresponding to any of the sequences in ⁇ d SSS (n) ⁇ , it can be based on a different gold sequence from the slave synchronization signal on the Uu link in the NR system. This allows the second synchronization sequence to have a lower correlation with any of the sequences of ⁇ d SSS (n) ⁇ .
  • the analysis of correlation is similar to the above, and will not be repeated here.
  • the sequence For sequence Cyclic shift, and / or, sequence For sequence The cyclic shift can be implemented in the following way, the second synchronization sequence satisfies Among them, ⁇ is a non-zero integer.
  • ⁇ is a non-zero integer.
  • d SSS (n) expression with The value ranges are the same.
  • d SSS (n) For the m sequence Cyclic shift with m 0 as the cyclic shift value. In that case.
  • the sequence in this case Based on Same m sequence m sequence It may be generated by the same generator polynomial and initial value, or may be generated by different generator polynomials and initial values, which is not limited here.
  • ⁇ 45 which indicates that the offset value of the increased cyclic shift value is further selected after 45, or that ⁇ is greater than zero and not an integer multiple of 5, which indicates that there is no clear limit on the size of the increased offset value.
  • ⁇ is greater than or equal to 45 and an integer multiple of 5, which means that the increased offset value is further selected after 45 and is selected at an equal interval of 5.
  • the offset value ⁇ is indicated by signaling, or the offset value ⁇ is predefined. Sequence at this time The corresponding cyclic shift value and The corresponding cyclic shift values are equally spaced, and The corresponding cyclic shift value is The intervals between the corresponding cyclic shift values are all equal, which can improve the frequency deviation detection performance of the second synchronization sequence d 2 (n) on the main synchronization sequence d SSS (n) on the Uu link in the NR system.
  • the second synchronization sequence satisfying m 0 ′ may also satisfy In this case, the value of the offset value ⁇ will cause a corresponding change. It should be understood that any simple deformation of m 0 ′ is included in the scope disclosed in the embodiments of the present application. The specific value changes No detailed enumeration.
  • the offset value ⁇ is signaled or the offset value ⁇ is predefined.
  • the generator polynomial corresponding to the second synchronization sequence is different from the generator polynomial corresponding to any sequence of ⁇ d SSS (n) ⁇ .
  • this design method is simple, relatively small design changes compared to the NR system Uu link, strong version inheritance. For a certain length of Gold sequence, it is generated from 2 equal-length m sequences.
  • the generated Gold sequence will be different. Therefore, if the generator polynomial corresponding to the second synchronization sequence is different from the generator polynomial corresponding to the synchronization signal sequence on the Uu link in the NR system, the respective sequences generated based on the respective generator polynomials, regardless of their respective cyclic shifts What is the value, it is always different and low cross-correlation value. Therefore, when different generator polynomials are used, there is no special limitation on the cyclic shift value corresponding to the second synchronization sequence. Alternatively, when different generator polynomials are used, the same cyclic shift value as the slave synchronization signal sequence on the Uu link in the NR system may be used.
  • a mode may be determined according to characteristics defined by different protocol versions, or a mode determined according to a service type, or a mode determined according to a resource selection and allocation method.
  • the first mode is used to support eMBB services; the second mode is used to support V2X services.
  • it can also be divided according to the technical characteristics of the protocol standardization process.
  • Mode 1 and / or Mode 2; Mode B and Mode 3 and / or Mode 4 are defined.
  • It may also be a mode defined according to a resource scheduling mode, such as a mode in which mode 1 is used for configuration or indication based on a base station, such as a mode in which mode 2 is used for a terminal-selected resource.
  • the same terminal device or the same network device supports multiple different modes
  • different methods may be used to generate synchronization sequences, that is, the terminal device or network device may also generate a sixth sequence.
  • the synchronization sequence, the sixth synchronization sequence and the second synchronization sequence correspond to the first mode and the second mode, respectively.
  • All possible second synchronization sequences form a second synchronization sequence set, and the sixth synchronization sequence is different from any sequence in the second synchronization sequence set, and the difference includes that one or more m sequences corresponding to the sixth synchronization sequence are the Cyclic shift of one or more m sequences corresponding to any sequence in the second synchronization sequence set, and / or, a generator polynomial corresponding to the sixth synchronization sequence and any sequence in the second synchronization sequence set The corresponding generator polynomials are different.
  • the sixth synchronization sequence may be generated in any of the following ways.
  • Method 1 The first pattern corresponds to the same generator polynomial as the second pattern, and one or more m sequences in any one of the second synchronization sequence sets correspond to the first cyclic shift value and one of the sixth synchronization sequence.
  • the one or more m sequences correspond to a second cyclic shift value, and the first cyclic shift value is different from the second cyclic shift value.
  • the first mode and the second mode correspond to different generator polynomials, that is, the generator polynomial corresponding to one or more m sequences in the sixth synchronization sequence and one or more m in any sequence in the second synchronization sequence set. Sequences have different generator polynomials.
  • Manner 3 One or more m sequences of any sequence in the second synchronization sequence set correspond to the first generation polynomial and the first cyclic shift value, and one or more m sequences of the sixth synchronization sequence correspond to the second generation polynomial and In the second cyclic shift value, the first and second polynomials are different, and the first and second cyclic shift values are different.
  • the synchronization signal identification set includes one or more subsets, and the synchronization signal identification in the subset indicates at least one of the following information:
  • the timing reference of the first device is a network device
  • the timing reference of the first device is a third device using the network device as a timing parameter
  • the timing reference of the first device is a satellite
  • the timing reference of the first device is a third device using the satellite as a timing parameter
  • the timing reference of the first device is the first device itself or the third device that is not synchronized to the network device or satellite.
  • the synchronization signal identification set includes two subsets, and different subsets correspond to different cyclic shift values of the first synchronization sequence and / or the second synchronization sequence;
  • the synchronization signal identifiers in the two subsets are used to indicate any of the following information: the timing reference of the first device is a network device, and the synchronization signal identifier is determined from the first sequence subset; the timing reference of the first device Not a network device, determining a synchronization signal identifier from the second sequence subset;
  • the synchronization signal identifiers in the two subsets are used to indicate any of the following information: the timing reference of the first device is a network device, and the synchronization signal identifier is determined from the first sequence subset, and the timing reference of the first device Determining a synchronization signal identifier from a second sequence subset for a third device using a network device as a timing parameter;
  • the synchronization signal identifiers in the two subsets are used to indicate any of the following information:
  • the timing reference of the first device is a satellite, and the synchronization signal identifier is determined from the first sequence subset.
  • the timing reference of the first device is not A satellite, determining a synchronization signal identifier from the second sequence subset;
  • the synchronization signal identifiers in the two subsets are used to indicate any of the following information: the timing reference of the first device is a satellite, and the synchronization signal identifier is determined from the first sequence subset, and the timing reference of the first device is The satellite is a third device with timing parameters, and determines the synchronization signal identifier from the second sequence subset;
  • the synchronization signal identification set includes four subsets, and different sequence subsets correspond to different cyclic shift values of the first synchronization sequence and / or the second synchronization sequence, and the four sequence subsets are respectively used to indicate the following Any of the information:
  • the timing reference of the first device is a network device, and the synchronization signal identifier is determined from the first sequence subset;
  • the timing reference of the first device is a third device that uses the network device as a timing parameter, and determines the synchronization signal identifier from the second sequence subset;
  • the timing reference of the first device is a satellite, and the synchronization signal identifier is determined from the third sequence subset;
  • the timing of the first device refers to the third device using the satellite as a timing parameter, and determines the synchronization signal identifier from the fourth sequence subset.
  • the synchronization signal identification set includes five subsets, and different sequence subsets correspond to different cyclic shift values of the first synchronization sequence and / or the second synchronization sequence.
  • the five sequence subsets respectively indicate the following Any of the information:
  • the timing reference of the first device is a network device, and the synchronization signal identifier is determined from the first sequence subset;
  • the timing reference of the first device is a third device that uses the network device as a timing parameter, and determines the synchronization signal identifier from the second sequence subset;
  • the timing reference of the first device is a satellite, and the synchronization signal identifier is determined from the third sequence subset;
  • the timing of the first device refers to the third device using the satellite as a timing parameter, and determines the synchronization signal identifier from the fourth sequence subset;
  • the timing reference of the first device uses the first device itself or the third device that is not synchronized to the network device or satellite to determine the synchronization signal identifier from the fifth sequence subset.
  • the obtained synchronization sequence can be different from any synchronization sequence in the synchronization sequence set in the 5G NR system, which effectively reduces the synchronization signals of other source synchronization devices and the Uu link in the NR system
  • the interference between signals improves the synchronization performance between devices, and at the same time minimizes the difference from the synchronization signal design in the 5G NR system.
  • Only small changes in the existing system are needed to ensure the synchronization performance of different services. , Reducing the restrictions on deploying different systems or different services in the same area.
  • FIG. 5 is a schematic signaling diagram of a method provided by an embodiment of the present application. It should be noted that some steps in FIG. 5 and the following may be optional, and the embodiments of the present invention are not limited to all steps. In addition, the sequence numbers of the steps are only for convenience of description, and do not represent the sequence. In addition, unless otherwise specified, the third synchronization sequence in the present application is the above. The fourth synchronization sequence is the above
  • Step 501 The first device generates a first synchronization sequence and / or a second synchronization sequence, wherein the first synchronization sequence is different from any sequence in a third synchronization sequence set, and / or the second synchronization sequence Different from any sequence in the fourth synchronization sequence set.
  • the first device in the embodiment of the present application may be a terminal device, a network device, or an apparatus that executes the method in the embodiment of the application in the terminal device or the network device.
  • the first device may generate only the first synchronization sequence or only the second synchronization sequence.
  • a first synchronization sequence and a second synchronization sequence are generated.
  • the first device uses only one synchronization signal to complete synchronization with the second device.
  • the first synchronization sequence may be a master synchronization sequence
  • the second synchronization sequence may be a slave synchronization sequence.
  • the operation in this step may be implemented by the modem processor 504 in the terminal device.
  • the operation in this step may be implemented by the processor 401 in the network device.
  • Step 502 The first device sends a first synchronization signal corresponding to the first synchronization sequence, and / or a second synchronization signal corresponding to the second synchronization sequence.
  • the second device receives a first synchronization signal corresponding to the first synchronization sequence, and / or a second synchronization signal corresponding to the second synchronization sequence.
  • the first device After the first device generates the first synchronization sequence and / or the second synchronization sequence, the first device maps the sequence to a corresponding time domain symbol or a frequency domain subcarrier of the corresponding time domain symbol, generates a synchronization signal, and sends the first synchronization signal and / Or a second synchronization signal.
  • the second device receives the first synchronization signal corresponding to the first synchronization sequence and / or the second synchronization signal corresponding to the second synchronization sequence.
  • the operation in this step may be implemented by the transceiver 501 in the terminal device, and of course, it may also be implemented by the modem processor 504 in the terminal device to control the transceiver 501.
  • the operation in this step may be implemented by the transceiver 402 in the foregoing network device, and of course, it may also be implemented by the processor 401 in the foregoing network device to control the transceiver 402.
  • Step 503 The second device acquires a synchronization signal identifier N ID according to the first synchronization information and / or the second synchronization information.
  • the second device determines the timing reference source of the first device according to the synchronization signal identifier N ID .
  • the synchronization signal identifier can indicate the timing reference source of the first device.
  • the synchronization signal identification N ID may determine a timing reference source of the first device.
  • the timing reference source is any of the following: a network device, a non-network device, a third device using the network device as a timing parameter, a satellite, a non-satellite, the first device itself, and a first device using the satellite as a timing parameter. Three devices, a third device that is not synchronized to a network device or satellite.
  • the second device acquires timing information according to the first synchronization signal and / or the second synchronization signal. Specifically, the second device receives and detects the first synchronization signal and / or the second synchronization sequence according to the first synchronization sequence and / or the second synchronization sequence stored locally or according to the signal characteristics of the first synchronization sequence and / or the second synchronization sequence. Sync signal. Thereby, the corresponding symbols, synchronization signals, time slots, sub-frames or radio frame boundaries are obtained. Combined with the indication signal of the frame number to further determine the exact position of each sub-frame radio frame, sub-frame, time slot, synchronization signal or symbol, thereby obtaining timing information.
  • the second device obtains the synchronization signal identifier N ID according to the first synchronization signal and / or the second synchronization signal, and includes the second device obtaining the first identification according to the first synchronization signal and / or the second synchronization signal. And / or second logo
  • the second device according to the first identifier And / or the second identification Determine the synchronization signal identification N ID .
  • the second device is based on the first identifier And / or second logo Determine the synchronization signal identification N ID , including
  • the second device in the embodiment of the present application may be a terminal device, a network device, or a device that executes the method in the embodiment of the application in the terminal device or the network device.
  • the operation in this step may be implemented by the modem processor 504 in the terminal device.
  • the operation in this step may be implemented by the processor 401 in the network device.
  • the first synchronization sequence and / or the second synchronization sequence sent by the above method can be different from any synchronization sequence in the synchronization sequence set in the 5G NR system, effectively reducing the synchronization signals of other source synchronization devices and the Uu chain in the NR system.
  • the interference between the synchronization signals on the road improves the synchronization performance between the devices, and at the same time minimizes the difference from the synchronization signal design in the 5G NR system. Only a small change in the existing system can ensure the difference.
  • Business synchronization performance simplifies possible system erection projects.
  • An example of the present invention further provides an apparatus (for example, an integrated circuit, a wireless device, a circuit module, etc.) for implementing the above method.
  • the means to implement the power tracker and / or power supply generator described herein may be a stand-alone device or may be part of a larger device.
  • the device may be (i) a stand-alone IC; (ii) a set with one or more 1Cs, which may include a memory IC for storing data and / or instructions; (iii) an RFIC, such as an RF receiver or RF transmitter / Receiver; (iv) ASIC, such as a mobile station modem; (v) modules that can be embedded in other devices; (vi) receiver, cell phone, wireless device, handset, or mobile unit; (vii) others Wait.
  • a stand-alone IC may include a memory IC for storing data and / or instructions; (iii) an RFIC, such as an RF receiver or RF transmitter / Receiver; (iv) ASIC, such as a mobile station modem; (v) modules that can be embedded in other devices; (vi) receiver, cell phone, wireless device, handset, or mobile unit; (vii) others Wait.
  • the method and apparatus provided in the embodiments of the present invention may be applied to a terminal device or a network device (which may be collectively referred to as a wireless device).
  • the terminal device or network device or wireless device may include a hardware layer, an operating system layer running on the hardware layer, and an application layer running on the operating system layer.
  • This hardware layer includes hardware such as a central processing unit (CPU), a memory management unit (MMU), and a memory (also called main memory).
  • the operating system may be any one or more computer operating systems that implement business processing through processes, such as a Linux operating system, a Unix operating system, an Android operating system, an iOS operating system, or a windows operating system.
  • This application layer contains applications such as browsers, address books, word processing software, and instant messaging software.
  • the embodiment of the present invention does not limit the specific structure of the method execution subject, as long as the program that records the code of the method of the embodiment of the present invention can be used to transmit a signal according to the embodiment of the present invention.
  • the communication method is sufficient.
  • the wireless communication method according to the embodiment of the present invention may be executed by a terminal device or a network device, or a function module in the terminal device or the network device that can call a program and execute the program.
  • various aspects or features of embodiments of the present invention may be implemented as a method, an apparatus, or an article of manufacture using standard programming and / or engineering techniques.
  • article of manufacture encompasses a computer program accessible from any computer-readable device, carrier, or medium.
  • computer-readable media may include, but are not limited to: magnetic storage devices (eg, hard disks, floppy disks, or magnetic tapes, etc.), optical disks (eg, compact discs (CD), digital versatile discs (DVD) Etc.), smart cards and flash memory devices (for example, erasable programmable read-only memory (EPROM), cards, sticks or key drives, etc.).
  • various storage media described herein may represent one or more devices and / or other machine-readable media used to store information.
  • machine-readable medium may include, but is not limited to, wireless channels and various other media capable of storing, containing, and / or carrying instruction (s) and / or data.
  • the computer program product includes one or more computer instructions.
  • the computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices.
  • the computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions may be from a website site, computer, server, or data center Transmission by wire (for example, coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (for example, infrared, wireless, microwave, etc.) to another website site, computer, server, or data center.
  • the computer-readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server, a data center, and the like that includes one or more available medium integration.
  • the available medium may be a magnetic medium (for example, a floppy disk, a hard disk, a magnetic tape), an optical medium (for example, a DVD), or a semiconductor medium (for example, a solid state disk (Solid State Disk (SSD)), and the like.
  • a magnetic medium for example, a floppy disk, a hard disk, a magnetic tape
  • an optical medium for example, a DVD
  • a semiconductor medium for example, a solid state disk (Solid State Disk (SSD)
  • the size of the sequence numbers of the above processes does not mean the order of execution, and the execution order of each process should be determined by its function and internal logic, and it should not deal with the present invention.
  • the implementation process of the examples constitutes any limitation.
  • the disclosed systems, devices, and methods may be implemented in other ways.
  • the device embodiments described above are only schematic.
  • the division of the unit is only a logical function division.
  • multiple units or components may be combined or Can be integrated into another system, or some features can be ignored or not implemented.
  • the displayed or discussed mutual coupling or direct coupling or communication connection may be indirect coupling or communication connection through some interfaces, devices or units, which may be electrical, mechanical or other forms.
  • the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, may be located in one place, or may be distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the objective of the solution of this embodiment.
  • the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium.
  • the technical solution of the embodiment of the present invention is essentially a part that contributes to the existing technology or a part of the technical solution may be embodied in the form of a software product, which is stored in a storage medium.
  • the foregoing storage media include: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), magnetic disks or optical disks and other media that can store program codes .

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Abstract

本申请实施例提供了同步信号的传输方法和装置。在该方法和装置中，第一设备生成第一同步序列和/或第二同步序列，其中，所述第一同步序列与第三同步序列集合中的任一个序列不同，和/或，所述第二同步序列与第四同步序列集合中的任一个序列不同。本方法和装置传输的同步信号能够有效降低与新空口系统蜂窝链路上的同步信号之间的干扰，提高了设备间的同步性能，可以应用于V2X、LTE-V、V2V、车联网、MTC、IoT、LTE-M，M2M，物联网等。

Description

一种同步信号的传输方法和装置
本申请要求于2018年08月10日提交中国国家知识产权局、申请号为201810911157.8、申请名称为“一种同步信号的传输方法和装置”中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请的实施例涉及通信领域，尤其是涉及一种同步信号的传输方法和装置。
背景技术
设备到设备(Device to Device，D2D)通信、车与车(Vehicle to Vehicle，V2V)通信、车与行人(Vehicle to Pedestrian，V2P)通信或车与基建/网络(Vehicle to Infrastructure/Network，V2I/N)通信是终端设备(terminal device)之间直接进行通信的技术，V2V、V2P以及V2I/N统称为V2X(vehicle to everything，V2X)，即车与任何事物相通信。
D2D、V2X通信的基本是在需要通信的终端设备之间实现同步，终端设备之间的同步信号可能受到蜂窝链路上同步信号的干扰，同时D2D、V2X设备间的同步信号也可能干扰蜂窝链路上的同步信号的传输，造成设备间的同步性能降低。
发明内容
本申请的实施例提供一种同步信号的传输方法和装置，能够提高设备间的同步性能。
第一方面，本申请实施例提供了一种同步信号的发送方法，第一设备生成第一同步序列和/或第二同步序列，其中，所述第一同步序列与第三同步序列集合中的任一个序列不同，和/或，所述第二同步序列与第四同步序列集合中的任一个序列不同；所述第三同步序列集合中的任一个序列满足：
Figure PCTCN2019099724-appb-000001
其中x(i+7)＝(x(i+4)+x(i))mod 2，
Figure PCTCN2019099724-appb-000002
且[x(6) x(5) x(4) x(3) x(2) x(1) x(0)]＝[1 1 1 0 1 1 0]；所述第四同步序列集合中的任一个序列满足：
Figure PCTCN2019099724-appb-000003
其中x 0(i+7)＝(x 0(i+4)+x 0(i))mod 2,x 1(i+7)＝(x 1(i+1)+x 1(i))mod 2，
Figure PCTCN2019099724-appb-000004
Figure PCTCN2019099724-appb-000005
且[x 0(6) x 0(5) x 0(4) x 0(3) x 0(2) x 0(1) x 0(0)]＝[0 0 0 0 0 0 1]，
[x 1(6) x 1(5) x 1(4) x 1(3) x 1(2) x 1(1) x 1(0)]＝[0 0 0 0 0 0 1]；
发送所述第一同步序列对应的第一同步信号和/或所述第二同步序列对应的第二同步信号。
通过本申请实施例提供的方法得到的同步序列能够与5G NR系统中的同步序列集合中的任一个同步序列不相同，有效降低其他源同步设备的同步信号与NR系统中Uu链路上的同步信号之间的干扰，从而提高了设备间的同步性能。
在一种可能的设计中，所述第一同步序列与第三同步序列集合中的任一个序列不同，包括所述第一同步序列为所述第三同步序列集合中任一个序列的循环移位；和/或，所述第一同步序列对应的生成多项式与所述第三同步序列集合中任一个序列对应的生成多项式不同。
在一种可能的设计中，所述第一同步序列满足d 1(n)＝1-2x(m′)，
Figure PCTCN2019099724-appb-000006
Δ为非零整数。
可选的，所述Δ的取值大于0且小于A。
可选的，所述
Figure PCTCN2019099724-appb-000007
或者所述
Figure PCTCN2019099724-appb-000008
R为正整数，
Figure PCTCN2019099724-appb-000009
表示向下取整，
Figure PCTCN2019099724-appb-000010
表示向上取整。
可选的，所述Δ＝21，或者所述Δ＝22。
可选的，所述Δ为信令指示的，或者，所述Δ为预定义的。
可选的，所述第一同步序列对应的生成多项式为x(i+7)＝(x(i+4)+x(i))mod 2，其中x(0)～x(6)为初始值。
在一种可能的设计中，所述第一同步序列对应的生成多项式与所述第三同步序列集合中任一个序列对应的生成多项式不同，包括所述第一同步序列对应的生成多项式为
Figure PCTCN2019099724-appb-000011
[K 6,K 5,K 4,K 3,K 2,K 1,K 0]≠[0,0,1,0,0,0,1]，且K为整数，其中x(0)～x(6)为初始值。
在一种可能的设计中，所述第一同步序列对应的生成多项式为x(i+7)＝(x(i+1)+x(i))mod 2。
在一种可能的设计中，所述第二同步序列满足：
Figure PCTCN2019099724-appb-000012
所述第二同步序列与第四同步序列集合中的任一个序列不同，包括序列
Figure PCTCN2019099724-appb-000013
为序列
Figure PCTCN2019099724-appb-000014
的循环移位，和/或，序列
Figure PCTCN2019099724-appb-000015
为序列
Figure PCTCN2019099724-appb-000016
的循环移位；和/或，所述第二同步序列对应的生成多项式与所述第四同步序列集合中任一个序列对应的生成多项式不同。
在一种可能的设计中，所述第二同步序列满足
Figure PCTCN2019099724-appb-000017
Figure PCTCN2019099724-appb-000018
其中
Figure PCTCN2019099724-appb-000019
Θ为非零整数。
可选的，所述Θ≥45，或者，所述Θ大于零且不是5的整数倍，或者，所述Θ大于等于45且为5的整数倍。
可选的，所述Θ＝45。
可选的，所述Θ为信令指示的，或者，所述Θ为预定义的。
在一种可能的设计中，所述第二同步序列对应的生成多项式包括x 0(i+7)＝(x 0(i+3)+x 0(i))mod 2，其中x 0(0)～x 0(6)为初始值。
在一种可能的设计中，所述第二同步序列对应的生成多项式包括
x 1(i+7)＝(x 1(i+3)+x 1(i+2)+x 1(i+1)+x 1(i))mod 2，其中x 1(0)～x 1(6)为初始值。
可选的，所述第二同步序列对应的生成多项式为x 0(i+7)＝(x 0(i+4)+x 0(i))mod 2，x 1(i+7)＝(x 1(i+1)+x 1(i))mod 2，其中，x 0(0)～x 0(6)为初始值，x 1(0)～x 1(6)为初始值。
在一种可能的设计中，所述方法还包括，从同步信号标识集合中确定同步信号标识N ID；根据所述同步信号标识N ID确定第一标识
Figure PCTCN2019099724-appb-000020
和/或第二标识
Figure PCTCN2019099724-appb-000021
其中
Figure PCTCN2019099724-appb-000022
在一种可能的设计中，所述同步信号标识集合包括一个或多个子集，所述子集中的同步信号标识指示以下信息中的至少一种：
所述第一设备的定时参考为网络设备；
所述第一设备的定时参考为以网络设备为定时参数的第二设备；
所述第一设备的定时参考为卫星；
所述第一设备的定时参考为以卫星为定时参数的第二设备；
所述第一设备的定时参考为以所述第一设备自身或未同步到网络设备或卫星的所述第二设备。
第二方面，本申请实施例提供了一种同步信号的接收方法，应用于第二设备。所述方法包括，接收第一同步序列对应的第一同步信号和/或第二同步序列对应的第二同步信号；其中，所述第一同步序列与第三同步序列集合中的任一个序列不同，和/或，所述第二同步序列与第四同步序列集合中的任一个序列不同；所述第三同步序列集合中的任一个序列满足：
Figure PCTCN2019099724-appb-000023
其中x(i+7)＝(x(i+4)+x(i))mod 2，
Figure PCTCN2019099724-appb-000024
且[x(6) x(5) x(4) x(3) x(2) x(1) x(0)]＝[1 1 1 0 1 1 0]；所述第四同步序列集合中的任一个序列满足：
Figure PCTCN2019099724-appb-000025
其中x 0(i+7)＝(x 0(i+4)+x 0(i))mod 2,x 1(i+7)＝(x 1(i+1)+x 1(i))mod 2，
Figure PCTCN2019099724-appb-000026
Figure PCTCN2019099724-appb-000027
且[x 0(6) x 0(5) x 0(4) x 0(3) x 0(2) x 0(1) x 0(0)]＝[0 0 0 0 0 0 1]，
[x 1(6) x 1(5) x 1(4) x 1(3) x 1(2) x 1(1) x 1(0)]＝[0 0 0 0 0 0 1]；
根据所述第一同步序列和/或所述第二同步序列获取同步信号标识N ID。
在一种可能的设计中，所述第一同步序列与第三同步序列集合中的任一个序列不同，包括，所述第一同步序列为所述第三同步序列集合中任一个序列的循环移位；和/或，所述第一同步序列对应的生成多项式与所述第三同步序列集合中任一个序列对应的生成多项式不同。
在一种可能的设计中，所述第一同步序列满足d 1(n)＝1-2x(m′)，
Figure PCTCN2019099724-appb-000028
Δ为非零整数。
可选的，所述Δ的取值大于0且小于43。
可选的，所述
Figure PCTCN2019099724-appb-000029
或者所述
Figure PCTCN2019099724-appb-000030
R为正整数，
Figure PCTCN2019099724-appb-000031
表示向下取整，
Figure PCTCN2019099724-appb-000032
表示向上取整。
可选的，所述Δ＝21，或者所述Δ＝22。
可选的，所述Δ为信令指示的，或者，所述Δ为预定义的。
在一种可能的设计中，所述第一同步序列对应的生成多项式为x(i+7)＝(x(i+4)+x(i))mod 2，其中x(0)～x(6)为初始值。
在一种可能的设计中，所述第一同步序列对应的生成多项式与所述第三同步序列集合中任一个序列对应的生成多项式不同，包括，所述第一同步序列对应的生成多项式为
Figure PCTCN2019099724-appb-000033
[K 6,K 5,K 4,K 3,K 2,K 1,K 0]≠[0,0,1,0,0,0,1]，且K为整数，其中x(0)～x(6)为初始值。
在一种可能的设计中，所述第一同步序列对应的生成多项式为x(i+7)＝(x(i+1)+x(i))mod 2。
在一种可能的设计中，所述第二同步序列满足：
Figure PCTCN2019099724-appb-000034
所述第二同步序列与第四同步序列集合中的任一个序列不同，包括：
序列
Figure PCTCN2019099724-appb-000035
为序列
Figure PCTCN2019099724-appb-000036
的循环移位，和/或，序列
Figure PCTCN2019099724-appb-000037
为序列
Figure PCTCN2019099724-appb-000038
的循环移位；和/或，所述第二同步序列对应的生成多项式与所述第四同步序列集合中任一个序列对应的生成多项式不同。
在一种可能的设计中，所述第二同步序列满足
Figure PCTCN2019099724-appb-000039
Figure PCTCN2019099724-appb-000040
其中
Figure PCTCN2019099724-appb-000041
Θ为非零整数。
可选的，所述Θ≥45，或者，所述Θ大于零且不是5的整数倍，或者，所述Θ大于等于45且为5的整数倍。
可选的，其特征在于，所述Θ＝45。
可选的，所述Θ为信令指示的，或者，所述Θ为预定义的。
在一种可能的设计中，所述所述第二同步序列对应的生成多项式与所述第四同步序列集合中任一个序列对应的生成多项式不同，包括，所述第二同步序列对应的生成多项式包括x 0(i+7)＝(x 0(i+3)+x 0(i))mod 2，其中x 0(0)～x 0(6)为初始值。
在一种可能的设计中，所述所述第二同步序列对应的生成多项式与所述第四同步序列集合中任一个序列对应的生成多项式不同，包括，所述第二同步序列对应的生成多项式包括x 1(i+7)＝(x 1(i+3)+x 1(i+2)+x 1(i+1)+x 1(i))mod 2，其中x 1(0)～x 1(6)为初始值。
在一种可能的设计中，所述第二同步序列对应的生成多项式为x 0(i+7)＝(x 0(i+4)+x 0(i))mod 2，x 1(i+7)＝(x 1(i+1)+x 1(i))mod 2，其中，x 0(0)～x 0(6)为初始值，x 1(0)～x 1(6)为初始值。
在一种可能的设计中，所述方法还包括，根据所述同步信号标识N ID确定所述第一设备的定时参考源。
在一种可能的设计中，所述根据第一同步信息和/或第二同步信息获取同步信号标识N ID，包括，根据第一同步信号和/或所述第二同步信号确定第一标识
Figure PCTCN2019099724-appb-000042
和/或第二标识
Figure PCTCN2019099724-appb-000043
根据所述第一标识
Figure PCTCN2019099724-appb-000044
和/或所述第二标识
Figure PCTCN2019099724-appb-000045
确定同步信号标识N ID，其中，
Figure PCTCN2019099724-appb-000046
或者
Figure PCTCN2019099724-appb-000047
第三方面，本发明实施例提供了一种同步信号的发送装置，包括处理器和与所述处理器耦合的存储器和收发器；其中，
所述处理器用于，生成第一同步序列和/或第二同步序列，其中，所述第一同步序列与第三同步序列集合中的任一个序列不同，和/或，所述第二同步序列与第四同步序列集合中的任一个序列不同；所述第三同步序列集合中的任一个序列满足：
Figure PCTCN2019099724-appb-000048
其中x(i+7)＝(x(i+4)+x(i))mod 2，
Figure PCTCN2019099724-appb-000049
且[x(6) x(5) x(4) x(3) x(2) x(1) x(0)]＝[1 1 1 0 1 1 0]；所述第四同步序列集合中的任一个序列满足：
Figure PCTCN2019099724-appb-000050
其中x 0(i+7)＝(x 0(i+4)+x 0(i))mod 2,x 1(i+7)＝(x 1(i+1)+x 1(i))mod 2，
Figure PCTCN2019099724-appb-000051
Figure PCTCN2019099724-appb-000052
且[x 0(6) x 0(5) x 0(4) x 0(3) x 0(2) x 0(1) x 0(0)]＝[0 0 0 0 0 0 1]，
[x 1(6) x 1(5) x 1(4) x 1(3) x 1(2) x 1(1) x 1(0)]＝[0 0 0 0 0 0 1]；
所述收发器用于，发送所述第一同步序列对应的第一同步信号和/或所述第二同步序列对应的第二同步信号。
在一种可能的设计中，所述第一同步序列与第三同步序列集合中的任一个序列不同，包括，所述第一同步序列为所述第三同步序列集合中任一个序列的循环移位；和/或，所述第一同步序列对应的生成多项式与所述第三同步序列集合中任一个序列对应的生成多项式不同。
在一种可能的设计中，所述第一同步序列满足d 1(n)＝1-2x(m′)，
Figure PCTCN2019099724-appb-000053
Δ为非零整数。
可选的，所述Δ的取值大于0且小于A。
可选的，所述
Figure PCTCN2019099724-appb-000054
或者所述
Figure PCTCN2019099724-appb-000055
R为正整数，
Figure PCTCN2019099724-appb-000056
表示向下取整，
Figure PCTCN2019099724-appb-000057
表示向上取整。
可选的，所述Δ＝21，或者所述Δ＝22。
可选的，所述Δ为信令指示的，或者，所述Δ为预定义的。
在一种可能的设计中，所述第一同步序列对应的生成多项式为x(i+7)＝(x(i+4)+x(i))mod 2，其中x(0)～x(6)为初始值。
在一种可能的设计中，所述第一同步序列对应的生成多项式与所述第三同步序列集合中任一个序列对应的生成多项式不同，包括，
所述第一同步序列对应的生成多项式为
Figure PCTCN2019099724-appb-000058
[K 6,K 5,K 4,K 3,K 2,K 1,K 0]≠[0,0,1,0,0,0,1]，且K为整数，其中x(0)～x(6)为初始值。
在一种可能的设计中，所述第一同步序列对应的生成多项式为x(i+7)＝(x(i+1)+x(i))mod 2。
在一种可能的设计中，所述第二同步序列满足：
Figure PCTCN2019099724-appb-000059
所述第二同步序列与第四同步序列集合中的任一个序列不同，包括：
序列
Figure PCTCN2019099724-appb-000060
为序列
Figure PCTCN2019099724-appb-000061
的循环移位，和/或，序列
Figure PCTCN2019099724-appb-000062
为序列
Figure PCTCN2019099724-appb-000063
的循环移位；和/或，所述第二同步序列对应的生成多项式与所述第四同步序列集合中任一个序列对应的生成多项式不同。
在一种可能的设计中，所述第二同步序列满足
Figure PCTCN2019099724-appb-000064
Figure PCTCN2019099724-appb-000065
其中
Figure PCTCN2019099724-appb-000066
Θ为非零整数。
可选的，所述Θ≥45，或者，所述Θ大于零且不是5的整数倍，或者，所述Θ大于等于45且为5的整数倍。
可选的，所述Θ＝45。
可选的，所述Θ为信令指示的，或者，所述Θ为预定义的。
在一种可能的设计中，所述所述第二同步序列对应的生成多项式与所述第四同步序列集合中任一个序列对应的生成多项式不同，包括，所述第二同步序列对应的生成多项式包括x 0(i+7)＝(x 0(i+3)+x 0(i))mod 2，其中x 0(0)～x 0(6)为初始值。
在一种可能的设计中，所述所述第二同步序列对应的生成多项式与所述第四同步序列集合中任一个序列对应的生成多项式不同，包括，所述第二同步序列对应的生成多项式包括
x 1(i+7)＝(x 1(i+3)+x 1(i+2)+x 1(i+1)+x 1(i))mod 2，其中x 1(0)～x 1(6)为初始值。
在一种可能的设计中，所述第二同步序列对应的生成多项式为x 0(i+7)＝(x 0(i+4)+x 0(i))mod 2，x 1(i+7)＝(x 1(i+1)+x 1(i))mod 2，其中，x 0(0)～x 0(6)为初始值，x 1(0)～x 1(6)为初始值。
在一种可能的设计中，所述处理器还用于，从同步信号标识集合中确定同步信号标识N ID；所述处理器还用于，根据所述同步信号标识N ID确定第一标识
Figure PCTCN2019099724-appb-000067
和/或第二标识
Figure PCTCN2019099724-appb-000068
其中
Figure PCTCN2019099724-appb-000069
在一种可能的设计中，所述同步信号标识集合包括一个或多个子集，所述子集中的同步信号标识指示以下信息中的至少一种：
所述第一设备的定时参考为网络设备；
所述第一设备的定时参考为以网络设备为定时参数的第二设备；
所述第一设备的定时参考为卫星；
所述第一设备的定时参考为以卫星为定时参数的第二设备；
所述第一设备的定时参考为以所述第一设备自身或未同步到网络设备或卫星的所述第二设备。
第四方面，本发明实施例提供了一种同步信号的接收装置，包括处理器和与所述处理器耦合的存储器和收发器；其中，
所述收发器用于，接收第一同步序列对应的第一同步信号和/或第二同步序列对应的第二同步信号；其中，所述第一同步序列与第三同步序列集合中的任一个序列不同，和/或，所述第二同步序列与第四同步序列集合中的任一个序列不同；所述第三同步序列集合中的任一个序列满足：
Figure PCTCN2019099724-appb-000070
其中x(i+7)＝(x(i+4)+x(i))mod 2，
Figure PCTCN2019099724-appb-000071
且[x(6) x(5) x(4) x(3) x(2) x(1) x(0)]＝[1 1 1 0 1 1 0]；所述第四同步序列集合中的任一个序列满足：
Figure PCTCN2019099724-appb-000072
其中x 0(i+7)＝(x 0(i+4)+x 0(i))mod 2,x 1(i+7)＝(x 1(i+1)+x 1(i))mod 2，
Figure PCTCN2019099724-appb-000073
Figure PCTCN2019099724-appb-000074
且[x 0(6) x 0(5) x 0(4) x 0(3) x 0(2) x 0(1) x 0(0)]＝[0 0 0 0 0 0 1]，
[x 1(6) x 1(5) x 1(4) x 1(3) x 1(2) x 1(1) x 1(0)]＝[0 0 0 0 0 0 1]；
所述处理器用于，根据所述第一同步序列和/或所述第二同步序列获取同步信号标识N ID。
在一种可能的设计中，所述第一同步序列与第三同步序列集合中的任一个序列不同，包括，所述第一同步序列为所述第三同步序列集合中任一个序列的循环移位；和/或，所述第一同步序列对应的生成多项式与所述第三同步序列集合中任一个序列对应的生成多项式不同。
在一种可能的设计中，所述第一同步序列满足d 1(n)＝1-2x(m′)，
Figure PCTCN2019099724-appb-000075
Δ为非零整数。
可选的，所述Δ的取值大于0且小于43。
可选的，所述
Figure PCTCN2019099724-appb-000076
或者所述
Figure PCTCN2019099724-appb-000077
R为正整数，
Figure PCTCN2019099724-appb-000078
表示向下取整，
Figure PCTCN2019099724-appb-000079
表示向上取整。
可选的，所述Δ＝21，或者所述Δ＝22。
可选的，所述Δ为信令指示的，或者，所述Δ为预定义的。
在一种可能的设计中，所述第一同步序列对应的生成多项式为x(i+7)＝(x(i+4)+x(i))mod 2，其中x(0)～x(6)为初始值。
在一种可能的设计中，所述第一同步序列对应的生成多项式与所述第三同步序列集合中任一个序列对应的生成多项式不同，包括，所述第一同步序列对应的生成多项式为
Figure PCTCN2019099724-appb-000080
[K 6,K 5,K 4,K 3,K 2,K 1,K 0]≠[0,0,1,0,0,0,1]，且K为整数，其中x(0)～x(6)为初始值。
在一种可能的设计中，所述第一同步序列对应的生成多项式为x(i+7)＝(x(i+1)+x(i))mod 2。
在一种可能的设计中，所述第二同步序列满足：
Figure PCTCN2019099724-appb-000081
所述第二同步序列与第四同步序列集合中的任一个序列不同，包括：
序列
Figure PCTCN2019099724-appb-000082
为序列
Figure PCTCN2019099724-appb-000083
的循环移位，和/或，序列
Figure PCTCN2019099724-appb-000084
为序列
Figure PCTCN2019099724-appb-000085
的循环移位；和/或，所述第二同步序列对应的生成多项式与所述第四同步序列集合中任一个序列对 应的生成多项式不同。
在一种可能的设计中，所述第二同步序列满足
Figure PCTCN2019099724-appb-000086
Figure PCTCN2019099724-appb-000087
其中
Figure PCTCN2019099724-appb-000088
Θ为非零整数。
可选的，所述Θ≥45，或者，所述Θ大于零且不是5的整数倍，或者，所述Θ大于等于45且为5的整数倍。
可选的，所述Θ＝45。
可选的，所述Θ为信令指示的，或者，所述Θ为预定义的。
在一种可能的设计中，所述所述第二同步序列对应的生成多项式与所述第四同步序列集合中任一个序列对应的生成多项式不同，包括，所述第二同步序列对应的生成多项式包括x 0(i+7)＝(x 0(i+3)+x 0(i))mod 2，其中x 0(0)～x 0(6)为初始值。
在一种可能的设计中，所述所述第二同步序列对应的生成多项式与所述第四同步序列集合中任一个序列对应的生成多项式不同，包括：
所述第二同步序列对应的生成多项式包括
x 1(i+7)＝(x 1(i+3)+x 1(i+2)+x 1(i+1)+x 1(i))mod 2，其中x 1(0)～x 1(6)为初始值。
在一种可能的设计中，所述第二同步序列对应的生成多项式为x 0(i+7)＝(x 0(i+4)+x 0(i))mod 2，x 1(i+7)＝(x 1(i+1)+x 1(i))mod 2，其中，x 0(0)～x 0(6)为初始值，x 1(0)～x 1(6)为初始值。
在一种可能的设计中，所述处理器还用于，根据所述同步信号标识N ID确定所述第一设备的定时参考源。
在一种可能的设计中，所述处理器用于根据第一同步信息和/或第二同步信息获取同步信号标识N ID，包括：
所述处理器用于，根据第一同步信号和/或所述第二同步信号确定第一标识
Figure PCTCN2019099724-appb-000089
和/或第二标识
Figure PCTCN2019099724-appb-000090
所述处理器用于，根据所述第一标识
Figure PCTCN2019099724-appb-000091
和/或所述第二标识
Figure PCTCN2019099724-appb-000092
确定同步信号标识N ID，其中，
Figure PCTCN2019099724-appb-000093
或者
Figure PCTCN2019099724-appb-000094
在上述方面中，第一设备可以是终端设备，也可以是网络设备，也可以是终端设备或网络设备中执行上述方法的装置。
在上述方面中，第二设备可以是终端设备，也可以是网络设备，也可以是终端设备或网络设备中执行上述方法的装置。
第五方面，提供了一种通信装置，所述通信装置用于执行上述方法实际中第一设备或第二设备行为的功能。这些功能可以通过硬件实现，也可以通过硬件执行相应的软件实现。所述硬件或软件包括一个或多个与上述功能相对应的单元。
第六方面，提供了一种包含指令的计算机存储介质，当其在计算机上运行时，使得计算机执行上述方法实际中第一设备或第二设备行为的功能。
附图说明
图1所示为本申请实施例的无线通信系统的示意性架构图。
图2所示为本申请实施例中网络设备的一种可能的结构示意图。
图3所示为本申请实施例中终端设备的一种可能的结构示意图。
图4所示为本申请实施例中基于m序列的不同循环移位值的间隔的示意图。
图5所示为本申请实施例提供的方法的信令示意图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行描述。需要说明的是，在不冲突的情况下，本发明各个实施例中的技术方案或特征可以相互组合。
本发明实施例中的“一个”意味着单个个体，并不代表只能是一个个体，不能应用于其他个体中。例如，本发明实施例中的“一个终端设备”指的是针对某一个终端设备，并不意味着只能应用于一个特定的终端设备。本申请中，术语“系统”可以和“网络”相互替换使用。
本申请中的“一个实施例”(或“一个实现”)或“实施例”(或“实现”)的引用意味着连同实施例描述的特定特征、结构、特点等包括在至少一个实施例中。因此，说明书的各个位置中出现的“在一个实施例中”或“在实施例中”，并不表示都指代相同实施例。本发明实施例中的“一个”意味着单个个体，并不代表只能是一个个体，不能应用于其他个体中。例如，本发明实施例中的“一个终端设备”指的是针对某一个终端设备，并不意味着只能应用于一个特定的终端设备。本申请中，术语“系统”可以和“网络”相互替换使用。
本申请中的“一个实施例”(或“一个实现”)或“实施例”(或“实现”)的引用意味着连同实施例描述的特定特征、结构、特点等包括在至少一个实施例中。因此，说明书的各个位置中出现的“在一个实施例中”或“在实施例中”，并不表示都指代相同实施例。
进一步地，本发明实施例中的“A和/或B”和“A和B中至少一个”的情况下使用术语“和/或”和“至少一个”包括三种方案中的任一种，即，包括A但不包括B的方案、包括B不包括A的方案、以及两个选项A和B都包括的方案。作为另一示例，在“A、B、和/或C”和“A、B、和/或C中至少一个”的情况下，这样的短语包括六种方案中的任一种，即，包括A但不包括B和C的方案、包括B不包括A和C的方案、包括C但不包括A和B的方案，包括A和B但不包括C的方案，包括B和C但不包括A的方案，包括A和C但不包括B的方案，以及三个选项A、B和C都包括的方案。如本领域和相关领域普通技术人员所容易理解的，对于其他类似的描述，本发明实施例均可以按照上述方式理解。
在一般的无线通信系统中，通信设备之间要建立链路进行通信首先要实现同步，同步的过程一般为源同步设备发送同步信号，需要进行同步的设备接收同步信号，并对同步信号进行解码，来实现与源同步设备之间的同步。所述无线通信系统可以是应用各种无线接入技术(radio access technology，RAT)的系统，例如码分多址(code division multiple access，CDMA)、时分多址(time division multiple access，TDMA)、 频分多址(frequency division multiple access，FDMA)、正交频分多址(orthogonal frequency-division multiple access，OFDMA)、或单载波频分多址(single carrier FDMA，SC-FDMA)和其它系统等。例如无线通信系统可以是长期演进(long term evolution，LTE)系统，CDMA系统，宽带码分多址(wideband CDMA，WCDMA)系统，全球移动通信(global system for mobile communications，GSM)系统，无线局域网(wireless local area network,WLAN)系统，第五代(5th Generation，5G)新空口(New Radio,NR)系统，各种演进或者融合的系统，以及面向未来的通信技术的系统。当空间中存在多种无线通信系统，或者当同一个通信系统中存在多种不同的源同步设备时，不同的同步信号之间可能存在干扰。图1示出了一种可能的场景，在该场景中存在一个网络设备101，以及三个终端设备102、103和104。其中网络设备101和终端设备103是同一个无线通信系统中的两种不同的源同步设备，例如，在一种可能的场景中网络设备101可以是蜂窝网络中的基站，终端设备102、103和104可以是车载无线通信设备或手机等，终端设备102、103和104可以和基站进行无线通信，通信设备102、103和104之间也可以进行终端设备之间的直连通信。图1中网络设备101向终端设备102、103和104发送同步信号2，同时，终端设备103向终端设备102和104发送同步信号1，终端设备102和104需要同时对同步信号1和/或同步信号2进行盲检测，如果用于同步信号1的同步序列1和用于同步信号2的同步序列2相同或者相关性高，则可能造成终端设备102和104无法区分同步信号1和同步信号2，即同步信号1和同步信号2之间会相互干扰，同时影响终端设备102、103和104与网络设备101之间建立连接，和终端设备102和104与终端设备103之间建立直连。进一步的，在同一个无线通信系统中，支持不同业务的不同源同步设备之间的同步信号也可能产生干扰，同时支持其他业务(Uu链路以外)的源同步设备的同步信号也可能分别与蜂窝链路上的同步信号产生干扰。如图1所示，终端设备102发送同步信号3。同步信号1和同步信号3可以是用于不同设备间链路的不同的传输模式。例如，同步信号1用于传输模式1，传输模式1用于eMBB的业务，同步信号3用于传输模式3，传输模式3用于V2X的与智能交通相关的安全业务。它们之间的定时参考可能是不同的，此时同步信号1，同步信号2之间也需要避免潜在的相互间干扰。同样的，同步信号1和同步信号2与同步信号3之间三种信号之间的相互间干扰也需要尽可能地避免。因此，本申请实施例提供了一种能够提高设备间同步性能的方案。需要理解的是，图1示出的场景仅仅是一种示例，不作为对本申请方案的限定。
本申请所涉及到的网络设备是一种部署在无线接入网中用以为终端设备提供无线通信功能的装置。网络设备可以为基站(Base Station，BS)，例如，宏基站，微基站，中继站或接入点等等，还可以是其它形式的设备，例如路灯、路边单元(Road Side Unit，RSU)。在采用不同的无线接入技术的系统中，具备网络设备功能的设备的名称可能会有所不同，例如，其为第五代5G网络中的网络设备或基站，在长期演进(Long Term Evolution，LTE)网络中，称为演进的节点B(evolved NodeB，简称：eNB或者eNodeB),在第三代(Third Generation，3G)网络中，称为节点B(Node B)等等，或者V2X通信中的路边单元(Road Side Unit，RSU)，或者为上述网络设备或者基站内部的芯片或者片上系统(System on Chip，SOC)。为方便描述，本申请中，上述为终端设备提供 无线通信功能的装置统称为网络设备。
本申请所涉及的终端设备可以包括各种具有无线通信功能的手持设备、车载设备、可穿戴设备、计算设备或连接到无线调制解调器的其它处理设备或者是以上设备中的单元、部件、装置、芯片或者SOC。所述终端设备可以称为无线通信设备，也可以称为移动台(mobile station,简称MS)，终端(terminal)，用户设备(user equipment，UE)等。所述终端设备可以是包括用户单元(subscriber unit)、蜂窝电话(cellular phone)、智能电话(smart phone)、无线数据卡、个人数字助理(personal digital assistant，PDA)电脑、平板型电脑、调制解调器(modem)或调制解调器处理器(modem processor)、手持设备(handheld)、膝上型电脑(laptop computer)、上网本、无绳电话(cordless phone)或者无线本地环路(wireless local loop，WLL)台、蓝牙设备、机器类型通信(machine type communication,MTC)终端等。为方便描述，本申请中，简称为终端设备或UE。
终端设备可以支持用于无线通信的一种或多种无线技术，例如5G,LTE,WCDMA,CDMA,1X,时分-同步码分多址(Time Division-Synchronous Code Division Multiple Access,TS-SCDMA),GSM,802.11等等。终端设备也可以支持蜂窝链路或终端设备之间的边链路(sidelink)上的不同传输业务或不同传输模式，例如车联网(vehicle to everything，V2X)业务，设备到设备(device to device，D2D)业务等，还可以支持蜂窝链路上的不同技术特征，例如物联网(Internet of Things，IoT)，机器类通信(machine type communication，MTC)等。
多个终端设备可以执行相同或者不同的业务。例如，移动宽带业务，增强移动宽带(Enhanced Mobile Broadband，eMBB)业务，极高可靠极低时延通信(Ultra-Reliable and Low-Latency Communication，URLLC)业务等等。
进一步地，上述网络设备101的一种可能的结构示意图可以如图2所示。该网络设备101能够执行本发明实施例提供的方法。其中，该网络设备101可以包括：控制器或处理器201(下文以处理器201为例进行说明)以及收发器202。控制器/处理器201有时也称为调制解调器处理器(modem processor)。调制解调器处理器201可包括基带处理器(baseband processor，BBP)(未示出)，该基带处理器处理经数字化的收到信号以提取该信号中传达的信息或数据比特。如此，BBP通常按需或按期望实现在调制解调器处理器201内的一个或多个数字信号处理器(digital signal processor，DSP)中或实现为分开的集成电路(integrated circuit，IC)。
收发器402可以用于支持网络设备101与终端设备之间收发信息，以及支持终端设备之间进行无线电通信。所述处理器201还可以用于执行各种终端设备与其他网络设备通信的功能。在上行链路，来自终端设备的上行链路信号经由天线接收，由收发器202进行调解，并进一步处理器201进行处理来恢复终端设备所发送的业务数据和/或信令信息。在下行链路上，业务数据和/或信令消息由终端设备进行处理，并由收发器202进行调制来产生下行链路信号，并经由天线发射给终端设备。所述网络设备101还可以包括存储器203，可以用于存储该网络设备101的程序代码和/或数据。收发器202可以包括独立的接收器和发送器电路，也可以是同一个电路实现收发功能。所述网络设备101还可以包括通信单元204，用于支持所述网路设备201与其他网络实体 进行通信。例如,用于支持所述网络设备101与核心网的网络设备等进行通信。
可选的，网络设备还可以包括总线。其中，收发器202、存储器203以及通信单元204可以通过总线与处理器201连接。例如，总线可以是外设部件互连标准(Peripheral Component Interconnect，PCI)总线或扩展工业标准结构(Extended Industry Standard Architecture，EISA)总线等。所述总线可以包括地址总线、数据总线、以及控制总线等。
图3为上述无线通信系统中，终端设备的一种可能的结构示意图。该终端设备能够执行本发明实施例提供的方法。该终端设备可以是三个终端设备102-104中的任一个。所述终端设备包括收发器301，应用处理器(application processor)302，存储器303和调制解调器处理器(modem processor)304。
收发器301可以调节(例如，模拟转换、滤波、放大和上变频等)该输出采样并生成上行链路信号，该上行链路信号经由天线发射给上述实施例中所述的基站。在下行链路上，天线接收网络设备发射的下行链路信号。收发器301可以调节(例如，滤波、放大、下变频以及数字化等)从天线接收的信号并提供输入采样。
调制解调器处理器304有时也称为控制器或处理器，可包括基带处理器(baseband processor,BBP)(未示出)，该基带处理器处理经数字化的收到信号以提取该信号中传达的信息或数据比特。BBP通常按需或按期望实现在调制解调器处理器304内的一个或多个数字中或实现为分开的集成电路(IC)。
在一个设计中，调制解调器处理器(modem processor)304可包括编码器3041，调制器3042，解码器3043，解调器3044。编码器3041用于对待发送信号进行编码。例如，编码器3041可用于接收要在上行链路上发送的业务数据和/或信令消息，并对业务数据和信令消息进行处理(例如，格式化、编码、或交织等)。调制器3042用于对编码器3041的输出信号进行调制。例如，调制器可对编码器的输出信号(数据和/或信令)进行符号映射和/或调制等处理，并提供输出采样。解调器3044用于对输入信号进行解调处理。例如，解调器3044处理输入采样并提供符号估计。解码器5043用于对解调后的输入信号进行解码。例如，解码器3043对解调后的输入信号解交织、和/或解码等处理，并输出解码后的信号(数据和/或信令)。编码器3041、调制器3042、解调器3044和解码器3043可以由合成的调制解调处理器304来实现。这些单元根据无线接入网采用的无线接入技术来进行处理。
调制解调器处理器304从应用处理器302接收可表示语音、数据或控制信息的数字化数据，并对这些数字化数据处理后以供传输。所属调制解调器处理器可以支持多种通信系统的多种无线通信协议中的一种或多种，例如LTE,新空口，通用移动通信系统(Universal Mobile Telecommunications System，UMTS)，高速分组接入(High Speed Packet Access，HSPA)等等。可选的，调制解调器处理器304中也可以包括一个或多个存储器。
可选的，该调制解调器处理器304和应用处理器302可以是集成在一个处理器芯片中。
存储器303用于存储用于支持所述终端设备通信的程序代码(有时也称为程序，指令，软件等)和/或数据。
需要说明的是，该存储器203或存储器303可以包括一个或多个存储单元，例如，可以是用于存储程序代码的处理器201或调制解调器处理器304或应用处理器302内部的存储单元，或者可以是与处理器201或调制解调器处理器304或应用处理器302独立的外部存储单元，或者还可以是包括处理器201或调制解调器处理器304或应用处理器302内部的存储单元以及与处理器201或调制解调器处理器304或应用处理器302独立的外部存储单元的部件。
处理器201和调制解调器处理器301可以是相同类型的处理器，也可以是不同类型的处理器。例如可以实现在中央处理器(Central Processing Unit，CPU)，通用处理器，数字信号处理器(Digital Signal Processor，DSP)，专用集成电路(Application-Specific Integrated Circuit，ASIC)，现场可编程门阵列(Field Programmable Gate Array，FPGA)或者其他可编程逻辑器件、晶体管逻辑器件、硬件部件、其他集成电路、或者其任意组合。处理器201和调制解调器处理器301可以实现或执行结合本发明实施例公开内容所描述的各种示例性的逻辑方框，模块和电路。所述处理器也可以是实现计算功能器件的组合，例如包含一个或多个微处理器组合，DSP和微处理器的组合或者片上系统(system-on-a-chip，SOC)等等。
本领域技术人员能够理解，结合本申请所公开的诸方面描述的各种解说性逻辑块、模块、电路和算法可被实现为电子硬件、存储在存储器中或另一计算机可读介质中并由处理器或其它处理设备执行的指令、或这两者的组合。作为示例，本文中描述的设备可用在任何电路、硬件组件、IC、或IC芯片中。本申请所公开的存储器可以是任何类型和大小的存储器，且可被配置成存储所需的任何类型的信息。为清楚地解说这种可互换性，以上已经以其功能性的形式一般地描述了各种解说性组件、框、模块、电路和步骤。此类功能性如何被实现取决于具体应用、设计选择和/或加诸于整体系统上的设计约束。本领域技术人员可针对每种特定应用以不同方式来实现所描述的功能性，但此类实现决策不应被解读为致使脱离本发明的范围。
在NR系统的蜂窝网业务的下行同步过程中，网络设备发送的同步信号包括主同步信号(primary synchronization signal,PSS)和从同步信号(secondary synchronization signal,SSS)，终端设备需要接收PSS和SSS，PSS(至少)用于同步信号的接收机进行初始符号定位(boundary)、同步信号块(Synchronization Signal Block，SSB)的位置确定、循环前缀、子帧定位(boundary)、小区初始频率同步等。SS用于无线帧边界标定。PSS和SSS一起用于物理层小区号(physical layer cell ID)检测。网络设备要发送同步信号首先要生成对应的序列，在NR release15中规定了NR蜂窝链路(Uu)上的同步信号的设计。蜂窝链路在标准中一般叫做Uu链路，指的是终端设备与网络设备之间的无线链路，例如手机或车载通信设备与基站之间的无线链路。为了方便起见，以下描述的NR系统中Uu链路上的同步信号均为下行同步信号。
用于PSS的主同步序列d PSS(n)根据如下公式生成：
Figure PCTCN2019099724-appb-000095
其中
x(i+7)＝(x(i+4)+x(i))mod 2，   (2)
且
[x(6) x(5) x(4) x(3) x(2) x(1) x(0)]＝[1 1 1 0 1 1 0]；(3)
x(0)～x(6)为初始值，公式(2)为二进制序列
Figure PCTCN2019099724-appb-000096
的生成多项式，根据初始值(3)和生成多项式(2)可以生成二进制序列
Figure PCTCN2019099724-appb-000097
按以上方式生成的二进制序列
Figure PCTCN2019099724-appb-000098
为m序列，m序列是最长线性反馈位移寄存器序列的简称，是一种伪随机序列、伪噪声(pseudo noise，PN)码或伪随机码。公式(1)中的
Figure PCTCN2019099724-appb-000099
是二进制序列
Figure PCTCN2019099724-appb-000100
的各个码元的自变量的表达式。自变量m可以看作是d PSS(n)中的自变量n的循环移位，相应的循环移位值为
Figure PCTCN2019099724-appb-000101
其中的
Figure PCTCN2019099724-appb-000102
和
Figure PCTCN2019099724-appb-000103
是与小区号(cell ID)
Figure PCTCN2019099724-appb-000104
相关的标识，NR标准中定义了1008个物理层小区号，满足
Figure PCTCN2019099724-appb-000105
且
Figure PCTCN2019099724-appb-000106
Figure PCTCN2019099724-appb-000107
网络设备根据小区号
Figure PCTCN2019099724-appb-000108
可以得到标识
Figure PCTCN2019099724-appb-000109
和
Figure PCTCN2019099724-appb-000110
结合(1)、(2)和(3)描述的公式生成主同步序列d PSS(n)。通过以上公式可以生成的所有主同步序列组成NR系统中Uu链路上的主同步序列集合，为了方便描述，该主同步序列集合表示为{d PSS(n)}。
用于SSS的从同步序列d SSS(n)根据如下公式生成：
Figure PCTCN2019099724-appb-000111
其中
Figure PCTCN2019099724-appb-000112
且
Figure PCTCN2019099724-appb-000113
从同步序列d SSS(n)的设计采用了Gold码序列，Gold码序列是一种基于m序列生成的序列，由两个m序列构成。如公式(4)、(5)和(6)的描述，
Figure PCTCN2019099724-appb-000114
和
Figure PCTCN2019099724-appb-000115
分别为一个二进制m序列，同样的，x 0(0)～x 0(6)为序列
Figure PCTCN2019099724-appb-000116
的初始值，x 1(0)～x 1(6)为序列
Figure PCTCN2019099724-appb-000117
的初始值，为了方便描述，本申请中定义
Figure PCTCN2019099724-appb-000118
Figure PCTCN2019099724-appb-000119
则
Figure PCTCN2019099724-appb-000120
公式(5)为二进制m序列
Figure PCTCN2019099724-appb-000121
和
Figure PCTCN2019099724-appb-000122
的生成多项式，m 0是序列
Figure PCTCN2019099724-appb-000123
的循环移位值，m 1是序列
Figure PCTCN2019099724-appb-000124
的循环移位值，其中的
Figure PCTCN2019099724-appb-000125
和
Figure PCTCN2019099724-appb-000126
是与小区号(cell ID)
Figure PCTCN2019099724-appb-000127
相关的标识，NR标准中定义了1008个物理层小区号，满足
Figure PCTCN2019099724-appb-000128
且
Figure PCTCN2019099724-appb-000129
通过以上公式可以生成的所有从同步序列组成NR系统中Uu链路上的从同步序列集合，为了方便描述，本申请中将该从同步序列集合表示为{d SSS(n)}。
从以上描述的5G NR系统中Uu链路上的同步信号的设计，可以知道同步小区号
Figure PCTCN2019099724-appb-000130
可以唯一地标识一组主同步序列和从同步序列，系统中的同步序列集合共包括1008组不同的主同步序列和从同步序列。在实际的网络部署中，当某一区域中的无线通信系统中，例如NR系统中，还存在除蜂窝网之外其他业务的源同步设备的时候，或者当空间中还存在除NR系统外的其他无线通信系统的源同步设备的时候，若其他源同步设备发送的同步信号包含的同步序列与NR系统中Uu链路上的同步序列相同，或者相关性高，则会使得接收同步信号的设备无法区分NR系统中Uu链路上的同步信号和其他源同步设备的同步信号，也就是说不同业务或者不同通信系统中的同步信号与NR系统中Uu链路上的同步信号之间会互相干扰。需要理解的是，所述其他源同步设备，指的是NR系统中除蜂窝网之外支持其他业务的源同步设备，或者是除NR系统外的其他无线通信系统中的源同步设备。
为了解决上述问题，本申请实施例提供了一种同步序列的设计方案，通过本申请实施例提供的方法得到的同步序列能够与5G NR系统中的同步序列集合中的任一个同步序列不相同且与5G NR系统中的同步序列集合中的任一个同步序列有较低的相关性，有效降低其他源同步设备的同步信号与NR系统中Uu链路上的同步信号之间的干扰，从而提高了设备间的同步性能。
本申请实施例中以NR系统中的车联万物(vehicle-to-everything，V2X)业务进行举例，NR系统中支持V2X业务的终端设备可以直接和其他终端设备进行通信，而不需要通过网络设备的中继，作为源同步设备的终端设备发送第一同步信号和/或第二同步信号，其中第一同步信号可以是主同步信号，第二同步信号可以是从同步信号。
在一种可能的设计中，第一同步序列与{d PSS(n)}中任一个序列不同，和/或，第二同步序列与{d SSS(n)}中任一个序列不同。
一种可能的实施方式中，第一同步序列为{d PSS(n)}中任一个序列的循环移位；和/或，第一同步序列对应的生成多项式与{d PSS(n)}中任一个序列对应的生成多项式不同。从前面的描述可知，二进制序列x为m序列，根据m序列的特性可以知道，对于一个m序列和自身循环移位的互相关值为理论最佳值-1。可以通过以下公式来说明：
Figure PCTCN2019099724-appb-000131
其中(a mod b)表示数a对数b进行取模操作，
Figure PCTCN2019099724-appb-000132
是从二进制m序列映射之后的BPSK序列，d((i+m)modL))的物理意义即为对序列d(i)进行值为m的循环移位，L为序列的长度，d(i)表示序列第i个码元上的值。因此，第一同步序列d 1(n)为{d PSS(n)}中任一个序列的循环移位，表明第一同步序列与{d PSS(n)}中任一个序列的相关值为理论最低值，可以降低第一同步序列对应的第一同步信号与NR系统中Uu链路上的主同步信号之间的干扰。因此，第一同步序列为{d PSS(n)}中任一个序列的循环移位，能够保证第一同步序列对应的第一同步信号与NR系统中Uu链路上的主同步信号之间的干扰为较低值，即第一同步序列对应的第一同步信号与NR系统中Uu链路上的主同步信号之间规一化的互相关值达到理论最低的1/L。例如，当L＝127时，对应的值约为0.0079，在实际通信系统中，这是一个很低的相互干扰值。第一同步序列为{d PSS(n)}中任一个序列的循环移位，一种可能的实现方式是，在生成第一同步信序列时与NR系统中Uu链路上的主同步信号序列使用的生成m序列的生成多项式相同，但其使用的循化移位 值不同。生成m序列指的是通过生成多项式。从而生成的序列不同且能够达到式(10)的m序列的理论最佳相关性能。NR系统中Uu链路上的主同步信号序列的长度为127，目前循环移位值只使用了0，43，86三个值。对于长为127的m序列，可以使用的不同的循化移位值总共有127个。所以可以生成足够多的循化移位值来作为本申请实施例中的第一同步序列。
另外，可选的，当使用与{d PSS(n)}中任一个序列对应的生成多项式不同的生成多项式来生成m序列时，可以减少第一同步序列与{d PSS(n)}中任一个序列之间的互相关。并且这种设计方法简单，相对与NR系统Uu链路的设计改动小，版本继承性强。对于一个一定长度的m序列，总能找到与之配对的至少另一个m序列，其互相关值可以达到序列的理论界(祥见后文的式(11))。而对任意一个循环移位不等价的m序列，总有一个生成多项式与之对应。因此，如果第一同步序列对应的生成多项式与NR系统中Uu链路上的主同步信号序列对应的生成多项式不同时，不论各自的循环移位值为何值，第一同步序列和所述主同步序列总是各不相同且具有上述的理论可达的最佳互相关性能。因此，当使用不同的生成多项式时，对第一同步序列对应的循环移位值没有别特的限定。可选地，当使用不同的生成多项式时，可以使用与NR系统中Uu链路上的主同步信号序列相同的循环移位值。
一种情况下，第一同步序列为{d PSS(n)}中任一个序列的循环移位可以用以下方式实现，第一同步序列满足d 1(n)＝1-2x(m′)，
Figure PCTCN2019099724-appb-000133
Figure PCTCN2019099724-appb-000134
Δ为非零整数。从以上描述可知，当生成二进制m序列
Figure PCTCN2019099724-appb-000135
之后，主同步序列d PSS(n)为该m序列
Figure PCTCN2019099724-appb-000136
以
Figure PCTCN2019099724-appb-000137
为循环移位值的循环移位。在该种情况下。第一同步序列d 1(n)基于与d PSS(n)相同的m序列
Figure PCTCN2019099724-appb-000138
将循环移位值增加一个偏移值Δ，即第一同步序列d 1(n)为m序列
Figure PCTCN2019099724-appb-000139
以
Figure PCTCN2019099724-appb-000140
为循环移位值的循环移位，其中
Figure PCTCN2019099724-appb-000141
可选的，
Figure PCTCN2019099724-appb-000142
分别与d PSS(n)表达式中的
Figure PCTCN2019099724-appb-000143
和
Figure PCTCN2019099724-appb-000144
取值范围相同。可选的，
Figure PCTCN2019099724-appb-000145
且
Figure PCTCN2019099724-appb-000146
因此，该种情况下可以保证第一同步序列d 1(n)为{d PSS(n)}中任一个序列的循环移位。进一步的，新的循环移位值
Figure PCTCN2019099724-appb-000147
相对于d PSS(n)对应的3个循环移位值是等间隔地放置的，在这种情况下，第一同步序列d 1(n)对NR系统中Uu链路上的主同步序列d PSS(n)的频率偏差检测性能更佳。原因是，对于m序列来说，如果设备检测的目标序列的循环移位值与潜在的另一个目标或干扰序列的循环移位值间隔不相等时，抗频偏差的性能由其中一个最小的间隔确定。只有目标序列的循环移位值与潜在的另一个目标或干扰序列的循环移位值间隔相等或尽可能相等时，抗频偏的能力才可以达到最大值。需要说明的是，该种情况下第一同步序列d 1(n)基于与d PSS(n)相同的m序列
Figure PCTCN2019099724-appb-000148
m序列
Figure PCTCN2019099724-appb-000149
可以是相同的生成多项式和初始值生成的，也可以是不同的生成多项式和初始值生成的，此处不作限定。
可选的，所述
Figure PCTCN2019099724-appb-000150
或者所述
Figure PCTCN2019099724-appb-000151
R为正整数，
Figure PCTCN2019099724-appb-000152
表示向下取整，
Figure PCTCN2019099724-appb-000153
表示向上取整，例如R＝4或R＝3或R＝2。
可选的，Δ＝21，或者Δ＝22。当R＝2时，
Figure PCTCN2019099724-appb-000154
或者
Figure PCTCN2019099724-appb-000155
此时第一同步序列d 1(n)对应的循环移位值与d PSS(n)对应的循环移位值之间是等间隔的。如图4所示，实线箭头表示d PSS(n)对应的循环移位值，分别为0,43,86，它们之间的间隔为43。虚线箭头表示第一同步序列d 1(n)对应的循环移位值，当Δ＝22时正好最 接近间隔43的一半，d 1(n)对应的循环移位值分别为22,65,108，此时d 1(n)对应的循环移位值与相邻的d PSS(n)对应的循环移位值之间的间隔均相等，第一同步序列d 1(n)对NR系统中Uu链路上的主同步序列d PSS(n)的频率偏差检测性能达到最佳。
可选的，偏移值Δ为信令通知的，或者偏移值Δ为预定义的。进一步的，包含偏移值Δ的信令可以是基站通过RRC，SIB或DCI的信令直接通知的，也可以是通过其它参数来间接指示的。或者，可选的，包含偏移值Δ的信令也可以是终端设备通过设备间链路(sidelink)上的控制信令直接通知的，也可以是通过其它参数来间接指示的。对于间接指示的方式，例如可以通过同步序列的标识或同步序列所属的组号的标识来指示。
示例的，第一同步序列可以根据以下公式生成：
Figure PCTCN2019099724-appb-000156
其中
x(i+7)＝(x(i+4)+x(i))mod 2，   (8)
且
[x(6) x(5) x(4) x(3) x(2) x(1) x(0)]＝[1 1 1 0 1 1 0]； (9)
x(0)～x(6)为初始值，公式(8)为二进制序列x的生成多项式，初始值与生成多项式均与NR系统中Uu链路上的主同步序列，即d PSS(n)，对应的初始值和生成多项式相同。公式(7)中的m′与公式(1)中的m相比增加了一个偏移值Δ，0＜Δ＜43，且Δ为正整数，使得在该种可能的设计中，第一同步序列d 1(n)为{d PSS(n)}中任一个序列的循环移位。可选的，
Figure PCTCN2019099724-appb-000157
分别与d PSS(n)表达式中的
Figure PCTCN2019099724-appb-000158
和
Figure PCTCN2019099724-appb-000159
取值范围相同。可选的，
Figure PCTCN2019099724-appb-000160
且
Figure PCTCN2019099724-appb-000161
一种可能的实施方式是，第一同步序列对应的生成多项式与{d PSS(n)}中任一个序列对应的生成多项式不同，使用与d PSS(n)对应的m序列相同长度但生成多项式不同的m序列来生成第一同步序列，可以减少第一同步序列与{d PSS(n)}中任一个序列之间的互相关。并且这种设计方法简单，相对与NR系统Uu链路的设计改动小，版本继承性强。
该种实现方式中，第一同步序列的生成多项式可以为
Figure PCTCN2019099724-appb-000162
[K 6,K 5,K 4,K 3,K 2,K 1,K 0]≠[0,0,1,0,0,0,1]，且K n为整数，其中x(0)～x(6)为初始值。通常的，序列初始值不能全为零，当其全为零时将不能通过生成多项式生成相应的序列。其原因是，序列初始值对应m序列实现中的循环移位寄存器的初始状态。如果全为零，通过循环移位寄存器输出的结果会始终为0。至于初始值的非零值的取值，本发明不做特别的限定。
可选的，第一同步序列对应的生成多项式为x(i+7)＝(x(i+1)+x(i))mod 2。生成多 项式x(i+7)＝(x(i+1)+x( i))mod 2和{d PSS(n)}中任一个序列对应的生成多项式x(i+7)＝(x(i+4)+x(i))mod 2是一对不相关的生成多项式对。在具有相同移位寄存器长度的m序列中，只有不相关的生成多项式对生成的m序列，它们两者之间具有最佳的互相关性能。所谓互相关，即为2个循环移位不等价的序列之间的相关值。最佳的互相关性能，即指这2个序列在任意的循环移位值的互相关的值有以下理论最低值：
Figure PCTCN2019099724-appb-000163
其中L＝2K-1。例如，在上述的实施例中，K＝7,L＝127。无论在该种实现方式中第一同步序列对应的循环移位值是多少，均可以实现第一同步序列与{d PSS(n)}中任一个序列不同，便于第一同步序列对应的循环移位值的确定。并且，进一步地，这个序列从频域变到时域或者从时域变换到频域后的相关性能类似。从而对接收机的实现算法的限定很少，对实现更加友好。
在同一无线通信系统中出蜂窝链路外的其他业务中，例如NR系统中即将研究的边链路(sidelink)中，可以存在不同的模式。这些sidelink上的模式可以按照不同的方式来定义。例如，可以根据不同协议版本定义的特性来确定模式，或者根据业务类型确定的模式，或者根据资源选择、分配方式确定的模式。例如，第一模式用于支持eMBB业务；第二模式用于支持V2X业务。又如，还可以按协议标准化过程中的技术特性来分。如版本A中定义：模式1和/或模式2；版本B中定义模式3和/或模式4。还可以是根据资源调度方式定义的模式，如模式1用于基于基站配置或指示的方式，如模式2用于终端自选资源的方式。
在本申请的实施例中，可选地，同一终端设备或同一网络设备在支持多种不同的模式时，可以分别使用不同的方法生成同步序列，即终端设备或网络设备还可以生成第五同步序列，第五同步序列与第一同步序列分别对应第一模式和第二模式。所有可能的第一同步序列组成第一同步序列集合，第五同步序列与第一同步序列集合中的任一个序列不同，所述不同包括第五同步序列为第一同步序列集合中任一个序列的循环移位；和/或，第五同步序列对应的生成多项式与第一同步序列集合中任一个序列对应的生成多项式不同。当有多种模式的sidelink传输并存时，同样也可以减少或控制不同模式的sidelink同步信号传输之间的相互干扰。例如，可以使用以下方式中的任意一种来生成第五同步序列。
方式一，第一模式与第二模式对应相同的生成多项式，且第一同步序列集合中的任一个序列对应第一循环移位值，第五同步序列对应第二循环移位值，第一循环移位值与第二循环移位值不同。
方式二，第一模式与第二模式对应不相同的生成多项式，即第五同步序列对应的生成多项式与第一同步序列集合中任一个序列对应的生成多项式不同。
方式三，第一同步序列集合中的任一个序列对应第一生多项式和第一循环移位值，第五同步序列对应第二生多项式和第二循环移位值，第一生多项式和第二生多项式不同，且第一循环移位值和第二循环移位值不同。
一种可能的实现方式中，第二同步序列d 2(n)可以满足：
Figure PCTCN2019099724-appb-000164
为了描述方便，本申请中定义序列
Figure PCTCN2019099724-appb-000165
和序列
Figure PCTCN2019099724-appb-000166
第二同步序列与{d SSS(n)}中的任一个序列不同，包括序列
Figure PCTCN2019099724-appb-000167
为序列
Figure PCTCN2019099724-appb-000168
的循环移位，和/或，序列
Figure PCTCN2019099724-appb-000169
为序列
Figure PCTCN2019099724-appb-000170
的循环移位；和/或，第二同步序列对应的生成多项式与{d SSS(n)}中任一个序列对应的生成多项式不同。第二同步序列同样是基于gold码序列生成的，根据上文所述的gold码序列的特性可知，构成第二同步序列的序列
Figure PCTCN2019099724-appb-000171
和序列
Figure PCTCN2019099724-appb-000172
分别是基于一个m序列生成的。因此基于和第一同步序列相同或相似的理由，当
Figure PCTCN2019099724-appb-000173
为序列
Figure PCTCN2019099724-appb-000174
的循环移位，和/或，序列
Figure PCTCN2019099724-appb-000175
为序列
Figure PCTCN2019099724-appb-000176
的循环移位时，可以使得第二同步序列和{d SSS(n)}中的任一个序列具有理论最低的相关性。同样的，第二同步序列对应的生成多项式与{d SSS(n)}中任一个序列对应的生成多项式不同时，可以与NR系统中Uu链路上的从同步信号基于不同的gold序列，从而使得第二同步序列与{d SSS(n)}中的任一个序列具有较低的相关性。关于相关性的分析与上文类似，此处不再赘述。
一种情况下，序列
Figure PCTCN2019099724-appb-000177
为序列
Figure PCTCN2019099724-appb-000178
的循环移位，和/或，序列
Figure PCTCN2019099724-appb-000179
为序列
Figure PCTCN2019099724-appb-000180
的循环移位可以用以下方式实现，第二同步序列满足
Figure PCTCN2019099724-appb-000181
Figure PCTCN2019099724-appb-000182
其中，Θ为非零整数。可选的，
Figure PCTCN2019099724-appb-000183
分别与d SSS(n)表达式中的
Figure PCTCN2019099724-appb-000184
和
Figure PCTCN2019099724-appb-000185
取值范围相同。可选的，
Figure PCTCN2019099724-appb-000186
且
Figure PCTCN2019099724-appb-000187
从以上描述可知，当生成二进制m序列
Figure PCTCN2019099724-appb-000188
之后，从同步序列d SSS(n)中的序列
Figure PCTCN2019099724-appb-000189
为该m序列
Figure PCTCN2019099724-appb-000190
以m 0为循环移位值的循环移位。在该种情况下。第二同步序列d 2(n)中的序列
Figure PCTCN2019099724-appb-000191
基于与
Figure PCTCN2019099724-appb-000192
相同的m序列
Figure PCTCN2019099724-appb-000193
将循环移位值增加一个偏移值Θ，即序列
Figure PCTCN2019099724-appb-000194
为m序列
Figure PCTCN2019099724-appb-000195
以m 0′＝Θ+m 0为循环移位值的循环移位。因此，该种情况下可以保证序列
Figure PCTCN2019099724-appb-000196
为序列
Figure PCTCN2019099724-appb-000197
的循环移位。进一步的，新的循环移位值m 0′＝Θ+m 0相对于序列
Figure PCTCN2019099724-appb-000198
对应的循环移位值是等间隔地放置的，在这种情况下，可以使得第二同步序列对NR系统中Uu链路上的从同步序列d SSS(n)的频率偏差检测性能更佳。原因是，对于m序列来说，如果设备检测的目标序列的循环移位值与潜在的另一个目标或干扰序列的循环移位值间隔不相等时，抗频偏差的性能由其中一个最小的间隔确定。只有目标序列的循环移位值与潜在的另一个目标或干扰序列的循环移位值间隔相等或尽可能相等时，抗频偏的能力才可以达到最大值。需要说明的是，该种情况下序列
Figure PCTCN2019099724-appb-000199
基于与
Figure PCTCN2019099724-appb-000200
相同的m序列
Figure PCTCN2019099724-appb-000201
m序列
Figure PCTCN2019099724-appb-000202
可以是相同的生成多项式和初始值生成的，也可以是不同的生成多项式和初始值生成的，此处不作限定。
可选的，Θ≥45，表示增加的循环移位值的偏移值在45之后进一步选取，或者，Θ大于零且不是5的整数倍，表示增加的偏移值的大小没有明确的限制，但不能与现有的相同，或者，Θ大于等于45且为5的整数倍，表示增加的偏移值在45之后进一步选取且按5为等间隔来选取。以上选择方法可以使得新生成的序列与现有的Uu链路的从同步序列不同，且为从同步序列的循环移位，当进一步以5为倍数等间隔选择时，可以进一步提升序列间的抗频偏的性能。进一步的，Θ＝45。偏移值Θ为信令指示的，或者，偏移值Θ为预定义的。此时序列
Figure PCTCN2019099724-appb-000203
对应的循环移位值与
Figure PCTCN2019099724-appb-000204
对应的循环移位值之间是等间隔的，且
Figure PCTCN2019099724-appb-000205
对应的循环移位值与相邻的
Figure PCTCN2019099724-appb-000206
对应的循环移 位值之间的间隔均相等，可以提高第二同步序列d 2(n)对NR系统中Uu链路上的主同步序列d SSS(n)的频率偏差检测性能。
可选的，第二同步序列满足m 0′也可以满足
Figure PCTCN2019099724-appb-000207
这种情况下偏移值Θ的取值会产生对应的变化，需要理解的是m 0′的任意简单变形都涵盖在本申请实施例公开的范围之内，具体的取值变化本申请实施例不作详细的列举。
可选的，偏移值Θ为信令通知的，或者偏移值Θ为预定义的。
可选的，第二同步序列对应的生成多项式为x 0(i+7)＝(x 0(i+4)+x 0(i))mod 2，x 1(i+7)＝(x 1(i+1)+x 1(i))mod 2，其中x 0(0)～x 0(6)为初始值，x 1(0)～x 1(6)为初始值。进一步可选的，[x 0(6) x 0(5) x 0(4) x 0(3) x 0(2) x 0(1) x 0(0)]＝[0 0 0 0 0 0 1]，且[x 1(6) x 1(5) x 1(4) x 1(3) x 1(2) x 1(1) x 1(0)]＝[0 0 0 0 0 0 1]。这种情况下，第二同步序列根据以下公式生成：
Figure PCTCN2019099724-appb-000208
其中
Figure PCTCN2019099724-appb-000209
且
Figure PCTCN2019099724-appb-000210
且
Figure PCTCN2019099724-appb-000211
且
Figure PCTCN2019099724-appb-000212
下面以这种可能的情况为例，进一步分析本申请实施例设计的第二同步序列的特性。对于NR系统中的Uu链路上的主同步信号，它对应的表达式中的各个参数取值如表1所示。
表1.d PSS(n)对应的表达式中各参数的取值
Figure PCTCN2019099724-appb-000213
对于按照上述公式(12)、(13)和(14)设计的第二同步序列，例如当Θ＝45时，公式中各参数的取值如表2所示。
表2.当Θ＝45时，公式(12)、(13)和(14)中各参数的取值
Figure PCTCN2019099724-appb-000214
从表1和表2的对比中可以看出，m 0′和m 0完全不同且均小于126，因此可以确保使用上述方法生成出来的第二同步序列与{d SSS(n)}中任一个序列之间具有理论最低的相关性能。从而确保两者之间的相互干扰值达到最小。
一种可能的实施方式中，第二同步序列对应的生成多项式与{d SSS(n)}中任一个序列对应的生成多项式不同。使用与{d SSS(n)}对应的m序列相同长度但生成多项式不同的m序列来生成第二同步序列，可以减少第二同步序列与{d SSS(n)}中任一个序列之间的互相关。并且这种设计方法简单，相对与NR系统Uu链路的设计改动小，版本继承性强。对于一定长度Gold序列，其由2个等长的m序列生成。只要改变其中任意一个m序列的生成多项式，生成的Gold序列都将不同。因此，如果第二同步序列对应的生成多项式与NR系统中Uu链路上的从同步信号序列对应的生成多项式不同时，基于各自的生成多项式生成的各自的序列，不论其各自的循化移位值为何值，其总是各不相同且较低的互相关值。因此，当使用不同的生成多项式时，对第二同步序列对应的循环移位值没有别特的限定。可选地，当使用不同的生成多项式时，可以使用与NR系统中Uu链路上的从同步信号序列一样的循环移位值。
可选的，该种实现方式中，第二同步序列对应的生成多项式可以包括x 0(i+7)＝(x 0(i+3)+x 0(i))mod 2，其中 x0(0)～x 0(6)为初始值。
可选的，第二同步序列对应的生成多项式可以包括x 1(i+7)＝(x 1(i+3)+x 1(i+2)+x 1(i+1)+x 1(i))mod 2，其中x 1(0)～x 1(6)为初始值。
在同一无线通信系统中出蜂窝链路外的其他业务中，例如NR系统中即将研究的边链路(sidelink)中，可以存在不同的模式。这些sidelink上的模式可以按照不同的方式来定义。例如，可以根据不同协议版本定义的特性来确定模式，或者根据业务类型确定的模式，或者根据资源选择、分配方式确定的模式。例如，第一模式用于支持eMBB业务；第二模式用于支持V2X业务。又如，还可以按协议标准化过程中的技术特性来分。如版本A中定义：模式1和/或模式2；版本B中定义模式3和/或模式4。还可以是根据资源调度方式定义的模式，如模式1用于基于基站配置或指示的方式，如模式2用于终端自选资源的方式。
在该种可能的实施方式中，可选地，同一终端设备或同一网络设备在支持多种不同的模式时，可以分别使用不同的方法生成同步序列，即终端设备或网络设备还可以 生成第六同步序列，第六同步序列与第二同步序列分别对应第一模式和第二模式。所有可能的第二同步序列组成第二同步序列集合，第六同步序列与第二同步序列集合中的任一个序列不同，所述不同包括第六同步序列对应的一个或多个m序列为所述第二同步序列集合中的任一个序列对应的一个或多个m序列的循环移位，和/或，所述第六同步序列对应的生成多项式与所述第二同步序列集合中的任一个序列对应的生成多项式不同。当有多种模式的sidelink传输并存时，同样也可以减少或控制不同模式的sidelink同步信号传输之间的相互干扰。例如，可以使用以下方式中的任意一种来生成第六同步序列。
方式一，第一模式与第二模式对应相同的生成多项式，且第二同步序列集合中的任一个序列中的一个或多个m序列对应第一循环移位值，第六同步序列中的一个或多个m序列对应第二循环移位值，第一循环移位值与第二循环移位值不同。
方式二，第一模式与第二模式对应不相同的生成多项式，即第六同步序列中的一个或多个m序列对应的生成多项式与第二同步序列集合中任一个序列的一个或多个m序列对应的生成多项式不同。
方式三，第二同步序列集合中的任一个序列的一个或多个m序列对应第一生多项式和第一循环移位值，第六同步序列的一个或多个m序列对应第二生多项式和第二循环移位值，第一生多项式和第二生多项式不同，且第一循环移位值和第二循环移位值不同。
在以上可能的实现方式中，
Figure PCTCN2019099724-appb-000215
且
Figure PCTCN2019099724-appb-000216
和
Figure PCTCN2019099724-appb-000217
由同步信号标识N ID确定，系统中所有不同的同步信号标识N ID构成同步信号标识集合。同步信号标识集合包括一个或多个子集，子集中的同步信号标识指示以下信息中的至少一种：
第一设备的定时参考为网络设备；
第一设备的定时参考为以网络设备为定时参数的第三设备；
第一设备的定时参考为卫星；
第一设备的定时参考为以卫星为定时参数的第三设备；
第一设备的定时参考为以所述第一设备自身或未同步到网络设备或卫星的所述第三设备。
可选的，同步信号标识集合包括两个子集，不同的子集对应第一同步序列和/或第二同步序列的不同的循环移位值；
可选的，两个子集中的同步信号标识分别用于指示以下信息中的任一种：第一设备的定时参考为网络设备，从第一序列子集确定同步信号标识；第一设备的定时参考不是网络设备，从第二序列子集确定同步信号标识；
可选的，两个子集中的同步信号标识分别用于指示以下信息中的任一种：第一设备的定时参考为网络设备，从第一序列子集确定同步信号标识，第一设备的定时参考为以网络设备为定时参数的第三设备，从第二序列子集确定同步信号标识；
可选的，两个子集中的同步信号标识分别用于指示以下信息中的任一种：第一设备的定时参考为卫星，从第一序列子集确定同步信号标识，第一设备的定时参考不是 卫星，从第二序列子集确定同步信号标识；
可选的，两个子集中的同步信号标识分别用于指示以下信息中的任一种：第一设备的定时参考为卫星，从第一序列子集确定同步信号标识，第一设备的定时参考以卫星为定时参数的第三设备，从第二序列子集确定同步信号标识；
可选的，同步信号标识集合包括四个子集，不同的序列子集对应第一同步序列和/或第二同步序列的不同的循环移位值，这四个序列子集分别用于指示以下的信息中的任意一种：
第一设备的定时参考为网络设备，从第一序列子集确定同步信号标识；
第一设备的定时参考为以网络设备为定时参数的第三设备，从第二序列子集确定同步信号标识；
第一设备的定时参考为卫星，从第三序列子集确定同步信号标识；
第一设备的定时参考以卫星为定时参数的第三设备，从第四序列子集确定同步信号标识。
可选的，同步信号标识集合包括五个子集，不同的序列子集对应第一同步序列和/或第二同步序列的不同的循环移位值，这五个序列子集分别用了指示以下的信息中的任意一种：
第一设备的定时参考为网络设备，从第一序列子集确定同步信号标识；
第一设备的定时参考为以网络设备为定时参数的第三设备，从第二序列子集确定同步信号标识；
第一设备的定时参考为卫星，从第三序列子集确定同步信号标识；
第一设备的定时参考以卫星为定时参数的第三设备，从第四序列子集确定同步信号标识；
第一设备的定时参考以所述第一设备自身或未同步到网络设备或卫星的所述第三设备，从第五序列子集确定同步信号标识。
通过上述同步序列的设计方案，得到的同步序列能够与5G NR系统中的同步序列集合中的任一个同步序列不相同，有效降低其他源同步设备的同步信号与NR系统中Uu链路上的同步信号之间的干扰，提高了设备间的同步性能，同时尽可能的降低了与5G NR系统中同步信号设计的差异，仅需要在现有系统中做少量的改动即可以保证不同业务的同步性能，减少在同一区域部署不同系统或不同业务的限制。
下面将结合上文中的实施例进一步提供本申请实施例如何应用上述设计的同步序列。
本申请实施例提供了一种同步信号的发送和接收方法。图5为本申请实施例提供的方法的信令示意图。需要说明的是，图5以及下文中的部分步骤可以是可选的，本发明实施例并不限定必须包含所有步骤。此外，步骤的序号也仅仅是便于描述，并不代表先后顺序。另外，在没有特别说明的情况下，本申请是实施例中的第三同步序列 是上文中的
Figure PCTCN2019099724-appb-000218
第四同步序列是上文中的
Figure PCTCN2019099724-appb-000219
步骤501，第一设备生成第一同步序列和/或第二同步序列，其中，所述第一同步序列与第三同步序列集合中的任一个序列不同，和/或，所述第二同步序列与第四同步序列集合中的任一个序列不同。
需要说明的是，第三同步序列和第四同步序列的生成方式如前文所述，此处不再赘述。本申请实施例中的第一设备可以是终端设备，也可以是网络设备，也可以是终端设备或网络设备中执行本申请实施例方法的装置。
第一同步序列和第二同步序列的可能的设计和生成方式如上文所述，此处不再赘述，需要说明的是第一设备可以仅生成第一同步序列，或者仅生成第二同步序列，或者生成第一同步序列和第二同步序列。在仅生成第一同步序列，或者仅生成第二同步序列的情况下，第一设备只采用一个同步信号与第二设备完成同步。在生成第一同步序列和第二同步序列的情况下，第一同步序列可以是主同步序列，第二同步序列可以是从同步序列。
本步骤的操作可以是由上述终端设备中的调制解调器处理器504实现。
本步骤的操作可以是由上述网络设备中的处理器401实现。
步骤502，第一设备发送第一同步序列对应的第一同步信号，和/或，第二同步序列对应的第二同步信号。对应的，第二设备接收第一同步序列对应的第一同步信号，和/或，第二同步序列对应的第二同步信号。
第一设备生成第一同步序列和/或第二同步序列之后，将所述序列映射到相应的时域符号或相应时域符号的频域子载波上，生成同步信号，发送第一同步信号和/或第二同步信号。
对应的，第二设备接收第一同步序列对应的第一同步信号和/或第二同步序列对应的第二同步信号。
本步骤的操作可以是由上述终端设备中的收发器501来实现，当然，也可以是上述终端设备中的调制解调器处理器504来控制收发器501实现。
本步骤的操作可以是由上述网络设备中的收发器402来实现，当然，也可以是上述网络设备中的处理器401来控制收发器402实现。
步骤503，第二设备根据第一同步信息和/或第二同步信息获取同步信号标识N ID。
可选的，第二设备根据同步信号标识N ID确定第一设备的定时参考源，从上文的描述可知，同步信号标识可以指示第一设备的定时参考源，对应的，第二设备通过获取同步信号标识N ID可以确定第一设备的定时参考源。可选的，定时参考源为以下中的任意一种：网络设备、非网络设备、以网络设备为定时参数的第三设备、卫星、非卫星、第一设备自身、以卫星为定时参数的第三设备、未同步到网络设备或卫星的第三设备。
可选的，第二设备根据第一同步信号和/或第二同步信号获取定时信息。具体地，第二设备根据本地存储的第一同步序列和/或第二同步序列或根据第一同步序列和/或第二同步序列的信号特征来接收、检测第一同步信号和/或第二同步信号。从而获得相应的符号、同步信号、时隙、子帧或无线帧的边界。再结合帧号的指示信号进一步确定每个子帧无线帧、子帧、时隙、同步信号或符号的准确位置，从而获取到定时的信息。
可选的，第二设备根据第一同步信号和/或第二同步信号获取同步信号标识N ID，包括第二设备根据第一同步信号和/或所述第二同步信号获取第一标识
Figure PCTCN2019099724-appb-000220
和/或第二标识
Figure PCTCN2019099724-appb-000221
第二设备根据所述第一标识
Figure PCTCN2019099724-appb-000222
和/或所述第二标识
Figure PCTCN2019099724-appb-000223
确定同步信号标识N ID。
可选的，第二设备根据第一标识
Figure PCTCN2019099724-appb-000224
和/或第二标识
Figure PCTCN2019099724-appb-000225
确定同步信号标识N ID，包括
Figure PCTCN2019099724-appb-000226
或者
Figure PCTCN2019099724-appb-000227
需要说明的是，第三同步序列和第四同步序列的生成方式如前文所述，此处不再赘述。本申请实施例中的第二设备可以是终端设备，也可以是网络设备，也可以是终端设备或网络设备中执行本申请实施例方法的装置。
本步骤的操作可以是由上述终端设备中的调制解调器处理器504实现。
本步骤的操作可以是由上述网络设备中的处理器401实现。
通过上述方法发送的第一同步序列和/或第二同步序列能够与5G NR系统中的同步序列集合中的任一个同步序列不相同，有效降低其他源同步设备的同步信号与NR系统中Uu链路上的同步信号之间的干扰，提高了设备间的同步性能，同时尽可能的降低了与5G NR系统中同步信号设计的差异，仅需要在现有系统中做少量的改动即可以保证不同业务的同步性能，简化了可能的系统架设工程。
本发明示例还提供一种装置(例如，集成电路、无线设备、电路模块等)用于实现上述方法。实现本文描述的功率跟踪器和/或供电发生器的装置可以是自立设备或者可以是较大设备的一部分。设备可以是(i)自立的IC；(ii)具有一个或多个1C的集合，其可包括用于存储数据和/或指令的存储器IC；(iii)RFIC，诸如RF接收机或RF发射机/接收机；(iv)ASIC，诸如移动站调制解调器；(v)可嵌入在其他设备内的模块；(vi)接收机、蜂窝电话、无线设备、手持机、或者移动单元；(vii)其他等等。
本发明实施例提供的方法和装置，可以应用于终端设备或网络设备(可以统称为无线设备)。该终端设备或网络设备或无线设备可以包括硬件层、运行在硬件层之上的操作系统层，以及运行在操作系统层上的应用层。该硬件层包括中央处理器(central processing unit，CPU)、内存管理单元(memory management unit，MMU)和内存(也称为主存)等硬件。该操作系统可以是任意一种或多种通过进程(process)实现业务处理的计算机操作系统，例如，Linux操作系统、Unix操作系统、Android操作系统、iOS操作系统或windows操作系统等。该应用层包含浏览器、通讯录、文字处理软件、以及即时通信软件等应用。并且，在本发明实施例中，本发明实施例并不限定方法的执行主体的具体结构，只要能够通过运行记录有本发明实施例的方法的代码的程序，以根据本发明实施例的传输信号的方法进行通信即可，例如，本发明实施例的无线通信的方法的执行主体可以是终端设备或网络设备，或者，是终端设备或网络设备中能够调用程序并执行程序的功能模块。
本领域普通技术人员可以意识到，结合本文中所公开的实施例描述的各示例的单元及算法步骤，能够以电子硬件、或者计算机软件和电子硬件的结合来实现。这些功 能究竟以硬件还是软件方式来执行，取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能，但是这种实现不应认为超出本发明实施例的范围。
此外，本发明实施例的各个方面或特征可以实现成方法、装置或使用标准编程和/或工程技术的制品。本申请中使用的术语“制品”涵盖可从任何计算机可读器件、载体或介质访问的计算机程序。例如，计算机可读介质可以包括，但不限于:磁存储器件(例如，硬盘、软盘或磁带等)，光盘(例如，压缩盘(compact disc，CD)、数字通用盘(digital versatile disc，DVD)等)，智能卡和闪存器件(例如，可擦写可编程只读存储器(erasable programmable read-only memory，EPROM)、卡、棒或钥匙驱动器等)。另外，本文描述的各种存储介质可代表用于存储信息的一个或多个设备和/或其它机器可读介质。术语“机器可读介质”可包括但不限于，无线信道和能够存储、包含和/或承载指令和/或数据的各种其它介质。
在上述实施例中，可以全部或部分地通过软件、硬件、固件或者其任意组合来实现。当使用软件实现时，可以全部或部分地以计算机程序产品的形式实现。所述计算机程序产品包括一个或多个计算机指令。在计算机上加载和执行所述计算机程序指令时，全部或部分地产生按照本发明实施例所述的流程或功能。所述计算机可以是通用计算机、专用计算机、计算机网络、或者其他可编程装置。所述计算机指令可以存储在计算机可读存储介质中，或者从一个计算机可读存储介质向另一个计算机可读存储介质传输，例如，所述计算机指令可以从一个网站站点、计算机、服务器或数据中心通过有线(例如同轴电缆、光纤、数字用户线(DSL))或无线(例如红外、无线、微波等)方式向另一个网站站点、计算机、服务器或数据中心进行传输。所述计算机可读存储介质可以是计算机能够存取的任何可用介质或者是包含一个或多个可用介质集成的服务器、数据中心等数据存储设备。所述可用介质可以是磁性介质，(例如，软盘、硬盘、磁带)、光介质(例如，DVD)、或者半导体介质(例如固态硬盘Solid State Disk(SSD))等。
应理解，在本发明实施例的各种实施例中，上述各过程的序号的大小并不意味着执行顺序的先后，各过程的执行顺序应以其功能和内在逻辑确定，而不应对本发明实施例的实施过程构成任何限定。
所属领域的技术人员可以清楚地了解到，为描述的方便和简洁，上述描述的系统、装置和单元的具体工作过程，可以参考前述方法实施例中的对应过程，在此不再赘述。
在本申请所提供的几个实施例中，应该理解到，所揭露的系统、装置和方法，可以通过其它的方式实现。例如，以上所描述的装置实施例仅仅是示意性的，例如，所述单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到另一个系统，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，装置或单元的间接耦合或通信连接，可以是电性，机械或其它的形式。
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例 方案的目的。
所述功能如果以软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在一个计算机可读取存储介质中。基于这样的理解，本发明实施例的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者接入网设备等)执行本发明实施例各个实施例所述方法的全部或部分步骤。而前述的存储介质包括：U盘、移动硬盘、只读存储器(ROM，Read-Only Memory)、随机存取存储器(RAM，Random Access Memory)、磁碟或者光盘等各种可以存储程序代码的介质。
以上所述，仅为本发明实施例的具体实施方式，但本发明实施例的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本发明实施例揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本发明实施例的保护范围之内。

Claims (41)

  1. 一种同步信号的发送方法，应用于第一设备，其特征在于，所述方法包括：
    生成第一同步序列和/或第二同步序列，其中，所述第一同步序列与第三同步序列集合中的任一个序列不同，和/或，所述第二同步序列与第四同步序列集合中的任一个序列不同；所述第三同步序列集合中的任一个序列满足：
    d 3(n)＝1-2x(m)
    Figure PCTCN2019099724-appb-100001
    0≤n＜127
    其中，所述第三同步序列集合中的任一个序列对应的生成多项式为x(i+7)＝(x(i+4)+x(i))mod 2，
    Figure PCTCN2019099724-appb-100002
    且[x(6) x(5) x(4) x(3) x(2) x(1) x(0)]＝[1 1 1 0 1 1 0]；所述第四同步序列集合中的任一个序列满足：
    Figure PCTCN2019099724-appb-100003
    其中，第四同步序列集合中的任一个序列对应的生成多项式为x 0(i+7)＝(x 0(i+4)+x 0(i))mod 2,x 1(i+7)＝(x 1(i+1)+x 1(i))mod 2，
    Figure PCTCN2019099724-appb-100004
    Figure PCTCN2019099724-appb-100005
    且[x 0(6) x 0(5) x 0(4) x 0(3) x 0(2) x 0(1) x 0(0)]＝[0 0 0 0 0 0 1]，
    [x 1(6) x 1(5) x 1(4) x 1(3) x 1(2) x 1(1) x 1(0)]＝[0 0 0 0 0 0 1]；
    发送所述第一同步序列对应的第一同步信号和/或所述第二同步序列对应的第二同步信号。
  2. 根据权利要求1所述的方法，其特征在于，所述第一同步序列与第三同步序列集合中的任一个序列不同，包括：
    所述第一同步序列为所述第三同步序列集合中任一个序列的循环移位；和/或，所述第一同步序列对应的生成多项式与所述第三同步序列集合中任一个序列对应的生成多项式不同。
  3. 根据权利要求1或2所述的方法，其特征在于，所述第一同步序列满足d 1(n)＝1-2x(m′)，
    Figure PCTCN2019099724-appb-100006
    Δ为非零整数。
  4. 根据权利要求3所述的方法，其特征在于，所述Δ的取值大于0且小于A。
  5. 根据权利要求2所述的方法，其特征在于，所述第一同步序列对应的生成多项式与所述第三同步序列集合中任一个序列对应的生成多项式不同，包括：
    所述第一同步序列对应的生成多项式为
    Figure PCTCN2019099724-appb-100007
    [K 6,K 5,K 4,K 3,K 2,K 1,K 0]≠[0,0,1,0,0,0,1]，且K n为整数，其中x(0)～x(6)为初始值。
  6. 根据权利要求1-5任一项所述的方法，其特征在于，所述第二同步序列满足：
    Figure PCTCN2019099724-appb-100008
    所述第二同步序列与第四同步序列集合中的任一个序列不同，包括：
    序列
    Figure PCTCN2019099724-appb-100009
    为序列
    Figure PCTCN2019099724-appb-100010
    的循环移位，和/或，序列
    Figure PCTCN2019099724-appb-100011
    为序列
    Figure PCTCN2019099724-appb-100012
    的循环移位；和/或，所述第二同步序列对应的生成多项式与所述第四同步序列集合中任一个序列对应的生成多项式不同。
  7. 根据权利要求1或6所述的方法，其特征在于，所述第二同步序列满足
    Figure PCTCN2019099724-appb-100013
    其中
    Figure PCTCN2019099724-appb-100014
    Θ为非零整数。
  8. 根据权利要求6-7任一项所述的方法，其特征在于，所述所述第二同步序列对应的生成多项式与所述第四同步序列集合中任一个序列对应的生成多项式不同，包括：
    所述第二同步序列对应的生成多项式包括x 0(i+7)＝(x 0(i+3)+x 0(i))mod 2，其中x 0(0)～x 0(6)为初始值。
  9. 根据权利要求1-8任一项所述的方法，其特征在于，所述方法还包括：
    从同步信号标识集合中确定同步信号标识N ID；
    根据所述同步信号标识N ID确定第一标识
    Figure PCTCN2019099724-appb-100015
    和/或第二标识
    Figure PCTCN2019099724-appb-100016
    其中
    Figure PCTCN2019099724-appb-100017
  10. 根据权利要求9所述的方法，其特征在于，所述同步信号标识集合包括一个或多个子集，所述子集中的同步信号标识分别指示以下信息中的至少一种：
    所述第一设备的定时参考为网络设备；
    所述第一设备的定时参考为以网络设备为定时参数的第二设备；
    所述第一设备的定时参考为卫星；
    所述第一设备的定时参考为以卫星为定时参数的第二设备；
    所述第一设备的定时参考为以所述第一设备自身或未同步到网络设备或卫星的所述第二设备。
  11. 一种同步信号的接收方法，应用于第二设备，其特征在于，所述方法包括：
    接收第一同步序列对应的第一同步信号和/或第二同步序列对应的第二同步信号；其中，所述第一同步序列与第三同步序列集合中的任一个序列不同，和/或，所述第二同步序列与第四同步序列集合中的任一个序列不同；所述第三同步序列集合中的任一个序列满足：
    d 3(n)＝1-2x(m)
    Figure PCTCN2019099724-appb-100018
    0≤n＜127
    其中，所述第三同步序列集合中的任一个序列对应的生成多项式为x(i+7)＝(x(i+4)+x(i))mod 2，
    Figure PCTCN2019099724-appb-100019
    且[x(6) x(5) x(4) x(3) x(2) x(1) x(0)]＝[1 1 1 0 1 1 0]；所述第四同步 序列集合中的任一个序列满足：
    Figure PCTCN2019099724-appb-100020
    其中，所述第四同步序列集合中的任一个序列对应的生成多项式为x 0(i+7)＝(x 0(i+4)+x 0(i))mod 2,x 1(i+7)＝(x 1(i+1)+x 1(i))mod 2，
    Figure PCTCN2019099724-appb-100021
    Figure PCTCN2019099724-appb-100022
    且[x 0(6) x 0(5) x 0(4) x 0(3) x 0(2) x 0(1) x 0(0)]＝[0 0 0 0 0 0 1]，
    [x 1(6) x 1(5) x 1(4) x 1(3) x 1(2) x 1(1) x 1(0)]＝[0 0 0 0 0 0 1]；
    根据所述第一同步序列和/或所述第二同步序列获取同步信号标识N ID。
  12. 根据权利要求11所述的方法，其特征在于，所述第一同步序列与第三同步序列集合中的任一个序列不同，包括：
    所述第一同步序列为所述第三同步序列集合中任一个序列的循环移位；和/或，所述第一同步序列对应的生成多项式与所述第三同步序列集合中任一个序列对应的生成多项式不同。
  13. 根据权利要求11或12所述的方法，其特征在于，所述第一同步序列满足d 1(n)＝1-2x(m′)，
    Figure PCTCN2019099724-appb-100023
    Δ为非零整数。
  14. 根据权利要求13所述的方法，其特征在于，所述Δ的取值大于0且小于43。
  15. 根据权利要求12所述的方法，其特征在于，所述第一同步序列对应的生成多项式与所述第三同步序列集合中任一个序列对应的生成多项式不同，包括：
    所述第一同步序列对应的生成多项式为
    Figure PCTCN2019099724-appb-100024
    [K 6,K 5,K 4,K 3,K 2,K 1,K 0]≠[0,0,1,0,0,0,1]，且K n为整数，其中x(0)～x(6)为初始值。
  16. 根据权利要求11-15任一项所述的方法，其特征在于，所述第二同步序列满足：
    Figure PCTCN2019099724-appb-100025
    所述第二同步序列与第四同步序列集合中的任一个序列不同，包括：
    序列
    Figure PCTCN2019099724-appb-100026
    为序列
    Figure PCTCN2019099724-appb-100027
    的循环移位，和/或，序列
    Figure PCTCN2019099724-appb-100028
    为序列
    Figure PCTCN2019099724-appb-100029
    的循环移位；和/或，所述第二同步序列对应的生成多项式与所述第四同步序列集合中任一个序列对应的生成多项式不同。
  17. 根据权利要求11或16所述的方法，其特征在于，所述第二同步序列满足
    Figure PCTCN2019099724-appb-100030
    其中
    Figure PCTCN2019099724-appb-100031
    Θ为非零整数。
  18. 根据权利要求16-17任一项所述的方法，其特征在于，所述所述第二同步序列对应的生成多项式与所述第四同步序列集合中任一个序列对应的生成多项式不同， 包括：
    所述第二同步序列对应的生成多项式包括x 0(i+7)＝(x 0(i+3)+x 0(i))mod 2，其中x 0(0)～x 0(6)为初始值。
  19. 根据权利要求11-18任一项所述的方法，其特征在于，所述方法还包括：
    根据所述同步信号标识N ID确定所述第一设备的定时参考源。
  20. 根据权利要求11-18所述的方法，其特征在于，所述根据第一同步信息和/或第二同步信息获取同步信号标识N ID，包括：
    根据第一同步信号和/或所述第二同步信号确定第一标识
    Figure PCTCN2019099724-appb-100032
    和/或第二标识
    Figure PCTCN2019099724-appb-100033
    根据所述第一标识
    Figure PCTCN2019099724-appb-100034
    和/或所述第二标识
    Figure PCTCN2019099724-appb-100035
    确定同步信号标识N ID，其中，
    Figure PCTCN2019099724-appb-100036
    或者
    Figure PCTCN2019099724-appb-100037
  21. 一种同步信号的发送装置，其特征在于，包括：
    处理器和与所述处理器耦合的存储器和收发器；其中，
    所述处理器用于，生成第一同步序列和/或第二同步序列，其中，所述第一同步序列与第三同步序列集合中的任一个序列不同，和/或，所述第二同步序列与第四同步序列集合中的任一个序列不同；所述第三同步序列集合中的任一个序列满足：
    d 3(n)＝1-2x(m)
    Figure PCTCN2019099724-appb-100038
    0≤n＜127
    其中，所述第三同步序列集合中的任一个序列对应的生成多项式为x(i+7)＝(x(i+4)+x(i))mod 2，
    Figure PCTCN2019099724-appb-100039
    且[x(6) x(5) x(4) x(3) x(2) x(1) x(0)]＝[1 1 1 0 1 1 0]；所述第四同步序列集合中的任一个序列满足：
    Figure PCTCN2019099724-appb-100040
    其中，第四同步序列集合中的任一个序列对应的生成多项式为x 0(i+7)＝(x 0(i+4)+x 0(i))mod 2,x 1(i+7)＝(x 1(i+1)+x 1(i))mod 2，
    Figure PCTCN2019099724-appb-100041
    Figure PCTCN2019099724-appb-100042
    且[x 0(6) x 0(5) x 0(4) x 0(3) x 0(2) x 0(1) x 0(0)]＝[0 0 0 0 0 0 1]，
    [x 1(6) x 1(5) x 1(4) x 1(3) x 1(2) x 1(1) x 1(0)]＝[0 0 0 0 0 0 1]；
    所述收发器用于，发送所述第一同步序列对应的第一同步信号和/或所述第二同步序列对应的第二同步信号。
  22. 根据权利要求21所述的装置，其特征在于，所述第一同步序列与第三同步序列集合中的任一个序列不同，包括：
    所述第一同步序列为所述第三同步序列集合中任一个序列的循环移位；和/或，所述第一同步序列对应的生成多项式与所述第三同步序列集合中任一个序列对应的生成 多项式不同。
  23. 根据权利要求21或22所述的装置，其特征在于，所述第一同步序列满足d 1(n)＝1-2x(m′)，
    Figure PCTCN2019099724-appb-100043
    Δ为非零整数。
  24. 根据权利要求23所述的装置，其特征在于，所述Δ的取值大于0且小于A。
  25. 根据权利要求22所述的装置，其特征在于，所述第一同步序列对应的生成多项式与所述第三同步序列集合中任一个序列对应的生成多项式不同，包括：
    所述第一同步序列对应的生成多项式为
    Figure PCTCN2019099724-appb-100044
    [K 6,K 5,K 4,K 3,K 2,K 1,K 0]≠[0,0,1,0,0,0,1]，且K n为整数，其中x(0)～x(6)为初始值。
  26. 根据权利要求21-25任一项所述的装置，其特征在于，所述第二同步序列满足：
    Figure PCTCN2019099724-appb-100045
    所述第二同步序列与第四同步序列集合中的任一个序列不同，包括：
    序列
    Figure PCTCN2019099724-appb-100046
    为序列
    Figure PCTCN2019099724-appb-100047
    的循环移位，和/或，序列
    Figure PCTCN2019099724-appb-100048
    为序列
    Figure PCTCN2019099724-appb-100049
    的循环移位；和/或，所述第二同步序列对应的生成多项式与所述第四同步序列集合中任一个序列对应的生成多项式不同。
  27. 根据权利要求11或26所述的装置，其特征在于，所述第二同步序列满足
    Figure PCTCN2019099724-appb-100050
    其中
    Figure PCTCN2019099724-appb-100051
    Θ为非零整数。
  28. 根据权利要求21-27任一项所述的装置，其特征在于，所述所述第二同步序列对应的生成多项式与所述第四同步序列集合中任一个序列对应的生成多项式不同，包括：
    所述第二同步序列对应的生成多项式包括x 0(i+7)＝(x 0(i+3)+x 0(i))mod 2，其中x 0(0)～x 0(6)为初始值。
  29. 根据权利要求21-28任一项所述的装置，其特征在于，所述处理器还用于，从同步信号标识集合中确定同步信号标识N ID；
    所述处理器还用于，根据所述同步信号标识N ID确定第一标识
    Figure PCTCN2019099724-appb-100052
    和/或第二标识
    Figure PCTCN2019099724-appb-100053
    其中
    Figure PCTCN2019099724-appb-100054
  30. 根据权利要求29所述的装置，其特征在于，所述同步信号标识集合包括一个或多个子集，所述子集中的同步信号标识分别指示以下信息中的至少一种：
    所述第一设备的定时参考为网络设备；
    所述第一设备的定时参考为以网络设备为定时参数的第二设备；
    所述第一设备的定时参考为卫星；
    所述第一设备的定时参考为以卫星为定时参数的第二设备；
    所述第一设备的定时参考为以所述第一设备自身或未同步到网络设备或卫星的所述第二设备。
  31. 一种同步信号的接收装置，其特征在于，包括：
    处理器和与所述处理器耦合的存储器和收发器；其中，
    所述收发器用于，接收第一同步序列对应的第一同步信号和/或第二同步序列对应的第二同步信号；其中，所述第一同步序列与第三同步序列集合中的任一个序列不同，和/或，所述第二同步序列与第四同步序列集合中的任一个序列不同；所述第三同步序列集合中的任一个序列满足：
    d 3(n)＝1-2x(m)
    Figure PCTCN2019099724-appb-100055
    0≤n＜127
    其中，所述第三同步序列集合中的任一个序列对应的生成多项式为x(i+7)＝(x(i+4)+x(i))mod 2，
    Figure PCTCN2019099724-appb-100056
    且[x(6) x(5) x(4) x(3) x(2) x(1) x(0)]＝[1 1 1 0 1 1 0]；所述第四同步序列集合中的任一个序列满足：
    Figure PCTCN2019099724-appb-100057
    其中，所述第四同步序列集合中的任一个序列对应的生成多项式为x 0(i+7)＝(x 0(i+4)+x 0(i))mod 2,x 1(i+7)＝(x 1(i+1)+x 1(i))mod 2，
    Figure PCTCN2019099724-appb-100058
    Figure PCTCN2019099724-appb-100059
    且[x 0(6) x 0(5) x 0(4) x 0(3) x 0(2) x 0(1) x 0(0)]＝[0 0 0 0 0 0 1]，
    [x 1(6) x 1(5) x 1(4) x 1(3) x 1(2) x 1(1) x 1(0)]＝[0 0 0 0 0 0 1]；
    所述处理器用于，根据所述第一同步序列和/或所述第二同步序列获取同步信号标识N ID。
  32. 根据权利要求31所述的装置，其特征在于，所述第一同步序列与第三同步序列集合中的任一个序列不同，包括：
    所述第一同步序列为所述第三同步序列集合中任一个序列的循环移位；和/或，所述第一同步序列对应的生成多项式与所述第三同步序列集合中任一个序列对应的生成多项式不同。
  33. 根据权利要求31或32所述的装置，其特征在于，所述第一同步序列满足d 1(n)＝1-2x(m′)，
    Figure PCTCN2019099724-appb-100060
    Δ为非零整数。
  34. 根据权利要求33所述的装置，其特征在于，所述Δ的取值大于0且小于43。
  35. 根据权利要求32所述的装置，其特征在于，所述第一同步序列对应的生成多项式与所述第三同步序列集合中任一个序列对应的生成多项式不同，包括：
    所述第一同步序列对应的生成多项式为
    Figure PCTCN2019099724-appb-100061
    [K 6,K 5,K 4,K 3,K 2,K 1,K 0]≠[0,0,1,0,0,0,1]，且K n为整数，其中x(0)～x(6)为初始值。
  36. 根据权利要求31-35任一项所述的装置，其特征在于，所述第二同步序列满足：
    Figure PCTCN2019099724-appb-100062
    所述第二同步序列与第四同步序列集合中的任一个序列不同，包括：
    序列
    Figure PCTCN2019099724-appb-100063
    为序列
    Figure PCTCN2019099724-appb-100064
    的循环移位，和/或，序列
    Figure PCTCN2019099724-appb-100065
    为序列
    Figure PCTCN2019099724-appb-100066
    的循环移位；和/或，所述第二同步序列对应的生成多项式与所述第四同步序列集合中任一个序列对应的生成多项式不同。
  37. 根据权利要求31或36所述的装置，其特征在于，所述第二同步序列满足
    Figure PCTCN2019099724-appb-100067
    其中
    Figure PCTCN2019099724-appb-100068
    Θ为非零整数。
  38. 根据权利要求31-37任一项所述的装置，其特征在于，所述所述第二同步序列对应的生成多项式与所述第四同步序列集合中任一个序列对应的生成多项式不同，包括：
    所述第二同步序列对应的生成多项式包括x 0(i+7)＝(x 0(i+3)+x 0(i))mod 2，其中x 0(0)～x 0(6)为初始值。
  39. 根据权利要求31-38任一项所述的装置，其特征在于，所述处理器还用于，根据所述同步信号标识N ID确定所述第一设备的定时参考源。
  40. 根据权利要求31-38所述的装置，其特征在于，所述处理器用于根据第一同步信息和/或第二同步信息获取同步信号标识N ID，包括：
    所述处理器用于，根据第一同步信号和/或所述第二同步信号确定第一标识
    Figure PCTCN2019099724-appb-100069
    和/或第二标识
    Figure PCTCN2019099724-appb-100070
    所述处理器用于，根据所述第一标识
    Figure PCTCN2019099724-appb-100071
    和/或所述第二标识
    Figure PCTCN2019099724-appb-100072
    确定同步信号标识N ID，其中，
    Figure PCTCN2019099724-appb-100073
    或者
    Figure PCTCN2019099724-appb-100074
  41. 一种包含指令的计算机存储介质，当其在计算机上运行时，使得计算机执行所述权利要求1-40中任一项所述的方法。
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