WO2020026080A1 - 撮像装置の動作方法 - Google Patents
撮像装置の動作方法 Download PDFInfo
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- WO2020026080A1 WO2020026080A1 PCT/IB2019/056306 IB2019056306W WO2020026080A1 WO 2020026080 A1 WO2020026080 A1 WO 2020026080A1 IB 2019056306 W IB2019056306 W IB 2019056306W WO 2020026080 A1 WO2020026080 A1 WO 2020026080A1
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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Abstract
Description
本実施の形態では、本発明の一態様である撮像装置及びその動作方法について説明する。
図1(A)は、本発明の一態様の撮像装置に用いることができる画素10の構成例を説明する図である。画素10は、光電変換素子11と、トランジスタ12と、トランジスタ13と、容量素子14と、トランジスタ15とを有する。ここで、トランジスタ12、トランジスタ13、及びトランジスタ15は、すべてnチャネル型トランジスタとすることができる。また、説明の便宜のため、図1(A)には画素10に含まれない電流源16を示している。なお、画素10の構成例を示す他の図でも、画素10に含まれない電流源16を示している。
図2(A)は、画素10の構成例を説明する図であり、図1(A)に示す構成の変形例である。図2(A)に示す画素10の構成は、トランジスタ15がpチャネル型トランジスタである点が、図1(A)に示す画素10の構成と異なる。
図3は、本発明の一態様の撮像装置の構成例を説明するブロック図である。当該撮像装置は、撮像部41と、信号生成回路44と、ゲートドライバ回路42と、CDS回路45と、データドライバ回路46と、A/D変換回路47と、電源回路48と、を有する。また、撮像部41には、画素10がマトリクス状に配列されている。
図4は、本発明の一態様の撮像装置の構成例を説明するブロック図であり、図3に示す構成の変形例である。図4に示す撮像装置の構成は、光センサ49が設けられている点が、図3に示す撮像装置の構成と異なる。
図6は、本発明の一態様の撮像装置の構成例を説明するブロック図であり、図3に示す構成の変形例である。図6に示す撮像装置の構成は、検出回路50が設けられている点が、図3に示す撮像装置の構成と異なる。
図7は、本発明の一態様の撮像装置の構成例を説明するブロック図であり、図3に示す構成の変形例である。図7に示す撮像装置の構成は、すべての画素10が、1本の配線22、及び1本の配線23を介してゲートドライバ回路42と電気的に接続されている点が、図3に示す撮像装置の構成と異なる。図7に示す構成の撮像装置において、撮像部41にはn行(nは2以上の整数)の画素10が設けられているとする。
図9(A)、(B)、(C)、(D)は、画素10の構成例を説明する図であり、図1(A)に示す構成の変形例である。図9(A)に示す画素10の構成は、トランジスタ13のソース又はドレインの一方が、光電変換素子11の一方の電極と電気的に接続されている点が、図1(A)に示す画素10の構成と異なる。
本実施の形態では、本発明の一態様の撮像装置の構成例等について説明する。
本実施の形態は、本発明の一態様で開示されるトランジスタに用いることができるCAC(Cloud−Aligned Composite)−OSの構成について説明する。
本実施の形態では、本発明の一態様の撮像装置を用いることができる電子機器について説明する。
Claims (9)
- 画素を有し、
前記画素は、光電変換素子と、第1のトランジスタと、第2のトランジスタと、容量素子と、を有し、
前記光電変換素子の一方の電極は、前記第1のトランジスタのソース又はドレインの一方と電気的に接続され、
前記第1のトランジスタのソース又はドレインの他方は、前記第2のトランジスタのゲートと電気的に接続され、
前記第2のトランジスタのゲートは、前記容量素子の一方の電極と電気的に接続されている撮像装置の動作方法であって、
第1の期間において、前記容量素子の他方の電極に第1の電位を供給し、かつ前記第1のトランジスタをオン状態とすることにより、前記光電変換素子に照射された光の照度に対応する撮像データを前記画素に書き込み、
第2の期間において、前記容量素子の他方の電極に第2の電位を供給することにより、前記撮像データを前記画素から読み出す撮像装置の動作方法。 - 請求項1において、
前記第1の期間において、前記第2のトランジスタはオフ状態であり、
前記第2の期間において、前記第2のトランジスタはオン状態である撮像装置の動作方法。 - 請求項1又は2において、
前記第2のトランジスタは、nチャネル型トランジスタであり、
前記第2の電位は、前記第1の電位より高い撮像装置の動作方法。 - 請求項1又は2において、
前記第2のトランジスタは、pチャネル型トランジスタであり、
前記第2の電位は、前記第1の電位より低い撮像装置の動作方法。 - 画素を有し、
前記画素は、光電変換素子と、第1のトランジスタと、第2のトランジスタと、第3のトランジスタと、容量素子と、を有し、
前記光電変換素子の一方の電極は、前記第1のトランジスタのソース又はドレインの一方と電気的に接続され、
前記第1のトランジスタのソース又はドレインの他方は、前記第2のトランジスタのゲートと電気的に接続され、
前記第2のトランジスタのゲートは、前記第3のトランジスタのソース又はドレインの一方と電気的に接続され、
前記第3のトランジスタのソース又はドレインの一方は、前記容量素子の一方の電極と電気的に接続されている撮像装置の動作方法であって、
第1の期間において、前記第3のトランジスタをオン状態とすることにより、前記第2のトランジスタのゲートの電位をリセットし、
第2の期間において、前記容量素子の他方の電極に第1の電位を供給し、かつ前記第1のトランジスタをオン状態、前記第3のトランジスタをオフ状態とすることにより、前記光電変換素子に照射された光の照度に対応する撮像データを前記画素に書き込み、
第3の期間において、前記容量素子の他方の電極に第2の電位を供給することにより、前記撮像データを前記画素から読み出す撮像装置の動作方法。 - 請求項5において、
前記第1及び第2の期間において、前記第2のトランジスタはオフ状態であり、
前記第3の期間において、前記第2のトランジスタはオン状態である撮像装置の動作方法。 - 請求項5又は6において、
前記第2のトランジスタは、nチャネル型トランジスタであり、
前記第2の電位は、前記第1の電位より高い撮像装置の動作方法。 - 請求項5又は6において、
前記第2のトランジスタは、pチャネル型トランジスタであり、
前記第2の電位は、前記第1の電位より低い撮像装置の動作方法。 - 請求項1乃至8のいずれか一項において、
前記第1のトランジスタは、チャネル形成領域に金属酸化物を有し、
前記金属酸化物は、Inと、Znと、M(MはAl、Ti、Ga、Sn、Y、Zr、La、Ce、Nd又はHf)と、を有する撮像装置の動作方法。
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US17/261,664 US11825220B2 (en) | 2018-08-03 | 2019-07-24 | Operation method of imaging device |
CN201980051728.8A CN112534802B (zh) | 2018-08-03 | 2019-07-24 | 摄像装置的工作方法 |
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JP2017022706A (ja) * | 2015-07-07 | 2017-01-26 | 株式会社半導体エネルギー研究所 | 撮像装置およびその動作方法 |
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WO2011099360A1 (en) * | 2010-02-12 | 2011-08-18 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for driving the same |
DE112011102837B4 (de) * | 2010-08-27 | 2021-03-11 | Semiconductor Energy Laboratory Co., Ltd. | Speichereinrichtung und Halbleitereinrichtung mit Doppelgate und Oxidhalbleiter |
JP2015186069A (ja) * | 2014-03-25 | 2015-10-22 | キヤノン株式会社 | 光電変換装置及びその駆動方法 |
US10389961B2 (en) | 2015-04-09 | 2019-08-20 | Semiconductor Energy Laboratory Co., Ltd. | Imaging device and electronic device |
US10896923B2 (en) * | 2015-09-18 | 2021-01-19 | Semiconductor Energy Laboratory Co., Ltd. | Method of operating an imaging device with global shutter system |
JP6802653B2 (ja) * | 2016-07-15 | 2020-12-16 | 株式会社ジャパンディスプレイ | 表示装置 |
WO2019009023A1 (ja) * | 2017-07-05 | 2019-01-10 | パナソニックIpマネジメント株式会社 | 撮像装置 |
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