WO2020020537A1

WO2020020537A1 - Encapsulation of acoustic wave device with multilayer layer resin containing filler for improved heat dissipation

Info

Publication number: WO2020020537A1
Application number: PCT/EP2019/065839
Authority: WO
Inventors: Huanen KU
Original assignee: RF360 Europe GmbH
Priority date: 2018-07-24
Filing date: 2019-06-17
Publication date: 2020-01-30
Also published as: DE102018117870A1; DE102018117870B4

Abstract

A device operating with acoustic waves comprises a device chip (DC) mounted onto a surface of a substrate (SU) in a flip chip technique. Sealing means close a cavity between device chip and substrate. The sealing means comprises a bottom layer (BL) of a first resin adapted to seal to the surface of the substrate as to close the cavity and to prevent intrusion of further material of the sealing means when reflowing or laminating same onto the bottom layer. A top layer (TL) is deposited on top of the bottom layer and comprises a second resin and a filler that is chosen to provide a thermal conductivity to the top layer of 2.0 to 2.0 W/mK. Optionally a planarizing middle layer (ML) is provided.

Description

ENCAPSULATION OF ACOUSTIC WAVE DEVICE WITH MULTILAYER LAYER RESIN CONTAINING FILLER FOR IMPROVED HEAT DISSIPATION

The application relates to an acoustic wave device e.g. a SAW or BAW device like an RF filter. Especially a device with improved heat dissipation is provided.

Acoustic wave device are usually mounted on top of a

substrate via a flip chip mounting technique such that an active device surface of the device chip with sensitive device structures thereon faces the substrate. Mounting means like e.g. bumps function as a spacer such that a gap is preserved between the sensitive device structures and the substrate surface.

Above the device chip a sealing is provided to form a closed cavity under the device chip wherein the device structures can operate undisturbed by avoiding intrusion of any

particles or moisture into the cavity.

It is known to use different sealing layers at least one of them comprises a resin sheet laminated onto chip and

substrate to seal to the device chip and to the substrate around the chip. Further sealing layers usually comprising another resin provide a mechanically robust package of sufficient thickness.

Properties like e.g. elastic modulus and coefficient of thermal expansion can be set different in the sealing layers by proper selection of suitable material like. Further, it is possible to adjust the desired property by using a resin with a suitable amount of a suitable filler material of suitable size and shape like silica.

However, SAW devices for example produce a substantial amount of heat that needs to be dissipated as especially the

frequency of such a device is substantially influenced by the temperature. Usually the main part of the produced heat is dissipated via the substrate that may comprise thermal vias connecting the arrangement to a heat sink. Another solution uses a metal layer deposited on top of device chip or on top of a bottom sealing layer of resin. Such solutions need high effort during manufacture thereof and are hence expensive. Moreover, other disadvantages like uneven surface profile on the top of the package, and lengthy process cycle time may arise .

Hence it is an object of the invention to provide an acoustic wave device with improved heat dissipation.

This object is met by an acoustic wave device according to the independent claims.

Embodiments and advantageous features can be taken from dependent claims.

A device operating with acoustic waves comprises a device chip mounted in a flip chip technique onto a surface of a substrate. Flip-chip technique leaves a gap between chip and substrate which is advantageous for safe arrangement of sensitive device structures as for example those of devices working with acoustic waves that are sensitive to any

mechanical or chemical impact onto the device structure.

Further protection of the device chip is achieved by a sealing means that seals to the surface of the substrate and closes the cavity without intruding too far into the cavity. The sealing means is applied onto the surface of substrate and device chip and comprises a bottom layer of a first resin adapted to seal to the surface of the substrate as to close the cavity and to prevent intrusion of further material of the sealing means when reflowing or laminating same onto the bottom layer a top layer. Further, a top layer deposited on top of the middle layer comprises a second resin filled with a filler that is chosen to provide a thermal conductivity to the top layer of 2.0 to 10.0 W/mK.

Epoxy resin filled with silica that are formerly used for sealing purpose of acoustic device packages have only poor thermal conductivities of 0.4 to 1.0 W/mK which does not yield sufficient heat dissipation.

The proposed sealing means provides improved dissipation of heat away from the active part of the sealed device and hence, prevent the device from excessive self-heating during operation. Thereby temperature dependent variation of device properties and function are avoided. This results in more constant device properties and smaller tolerances.

The high thermal conductivity of the top layer is achieved with a filler material having a thermal conductivity better than silica that has been in used for former sealing of known devices. Such materials can be chosen from materials like AIN, BN, AI₂O₃ and Graphite, Graphene. A small obstacle of this solution is due to the higher price of such highly conductive materials. But this obstacle is compensated by the proposed layer construction of the sealing means where only the top layer is filled with highly conductive material. Formerly known devices have been provided with multiple sealing layers that are all silica filled. Limiting the addition of expensive material only to the top layer saves material and cost amount.

To achieve sufficient heat dissipation with a smaller total amount of filler material in the top resin layer this layer is made as thin as possible and is applied next to the device chip .

According to an embodiment the bottom layer is a layer laminated conformal to the surface of substrate and chip. A middle layer is used as a planarizing layer and is interposed between the bottom layer and the top layer. The top layer is directly applied to the middle layer in constant over the entire surface. Further, the plane surface of the middle layer enables to produce the top layer in a constant

thickness smaller than the thickness of the middle layer.

This restricts the material amount of the highly conductive filler material to the indispensable.

Further, the thickness of the middle layer is optimized to just cover the upper side of the device chip with a thickness as small as possible. Even more advantageously the middle layer just lets the upper side of the chip uncovered. Then, the thickness of the middle layer over the surface of the substrate is slightly smaller than the height of the device chip over the substrate or is just equal to the height of the device chip over the substrate. A top layer with constant thickness over the entire surface provides better heat dissipation than a layer that has the same filler amount but is not plane or has a varying thickness over the surface. A layer thickness of the middle layer over the chip that is small or that equals zero provides low or zero thermal resistance by the middle layer in addition to the low

resistance of the top layer. By doing so heat dissipation is optimized at highest possible level.

The bottom layer is preferably a conformal layer following the topography of the substrate surface and the device chip. According to an embodiment the bottom layer is laminated to the surface over the device chip to have a nearly constant thickness over the entire surface. The thickness may be chosen between 15 ym and 40 ym and is optimized to prevent resin of middle layer from intruding into the gap. A too high thickness of the pure and unfilled resin has to be avoided for the higher thermal resistance thereof.

The middle layer too is preferably an unfilled resin and only serves for covering the bottom layer and to provide a plane surface as close as possible at the level of the upper side of the chip respectively the bottom layer over the chip.

There, the remaining thickness is limited to about 20 ym at maximum while lowest remaining height or zero height is preferred .

As the middle layer provides a plane surface the top layer applied above is also plane independent from the material thereof. The top layer has a filler content that may be chosen between 20 and 90 wt%. For achieving high thermal conductivity a high filler content is preferred.

The filler content and the applicability of the filled second resin require a trade-off to allow easy and conformal application or deposition of the top layer. Application of heat, pressure and vacuum in a laminating process facilitate the deposition.

All three layers of the sealing means may comprise the same resin but are not restricted to a specific resin material.

The bottom layer may comprise a polymeric material like a polyolefin, polyimide or an epoxy-based material. This material need to have substantial viscosity or needs to be processed at a lower temperature to prevent the material from entering the gap under the device chip.

The middle layer too may comprise an epoxy-based material which has a good flow ability during the application process by lamination for example. The good flow ability facilitates achieving a plane surface after application.

The top layer too may comprise an epoxy-based or a polyimide material (second resin) that is filled with a highly

conductive filler in an amount sufficient to achieve a thermal conductivity of 2 W/mK in the top layer. This layer enables the final heat transfer to the ambient and thus, away from the device.

All materials may require a curing step after application. Curing can be done separately for each layer. However, a common curing step for curing two or more layers in parallel is possible too. Curing includes a heat treatment for a given time interval.

The device chip may be a SAW device or a BAW device providing a filter function for RF frequencies. A SAW device may comprise a bulk piezoelectric material of 100 ym to 300 ym thickness onto which a transducer electrode or other metallic device structures are applied.

Sophisticated SAW devices are built on a thin film

piezoelectric material of a thickness of only a few

wavelengths of the acoustic wave the device is operating with. The thin film needs to be applied on a chip substrate usually of crystalline silicon or another Si based or any other crystalline or rigid material like sapphire for

example. The thin film piezoelectric may be bonded to the chip substrate as wafer the thickness thereof is reduced after the bonding step by grinding or by cleaving off exceeding thickness.

The piezoelectric material of the SAW device may be chosen from lithium tantalate or lithium niobate. The SAW device may be a temperature compensated SAW device (TCSAW) comprising a layer that reduces the temperature drift of the frequency that is measured as TCF (temperature coefficient of

frequency) .

A BAW device comprises a layer structure of at least two electrodes and a piezoelectric layer sandwiched there

between. This sandwich is applied on a BAW substrate with an intermediate acoustic reflector. This may be an air gap formed by a recess in the BAW substrate suspended by the sandwich and the device may be called an FBAR (thin film BAW resonator) . Another embodiment uses a Bragg mirror that comprises at least one pair of layers of alternating high and low acoustic impedance. The BAW substrate may be the same like that used for thinfilm SAW devices. Such a device is also called solidly mounted resonator. The substrate of the device may be any kind of PCB such as multilayer board made from FR4, a ceramic like HTCC or LTCC, a liquid crystalline polymer, or glass-based substrates which have Through-Glass Via (TGV) . The substrate may include an integrated passive element like a capacitor, a coil or a resistor. On top of the substrate other electronic devices may be mounted which possibly cooperate together with the device .

In the following the device and its manufacture will be explained in more detail with reference to the accompanied drawings .

The drawings are schematically only and not drawn to scale. Some elements may be depicted enlarged for better visibility. Others may depicted with reduced size. Hence, neither

absolute nor relative size parameters can be taken from the figures .

Figure 1 shows a first embodiment of an acoustic wave device in a cross-sectional view

Figure 2 shows a second embodiment of an acoustic wave device in a cross-sectional view

Figure 3 shows a third embodiment of an acoustic wave device in a cross-sectional view

Figures 4 to 7 show comparative examples of acoustic wave devices according to the art in a cross-sectional view.

Figure 1 shows as a first embodiment an acoustic wave device according to the invention in a cross-sectional view. A device chip DC of an acoustic wave device is mounted via interconnects IC in a flip-chip technique on the upper surface of a substrate SU that is embodied as a PCB . The substrate may have a thickness of 80 ym to 500 ym. In such an arrangement device structures (not shown) of the device chip DC on the underside US thereof are facing the substrate SU but keep an air filled gap GP to the substrate SU.

The cavity formed by the gap GP is closed along its perimeter by applying a bottom layer BL of a sealing means conformal to the upper side of the device chip DC and the substrate SU by a lamination step and seals to the upper surface of the substrate SU along the edge of the device chip DC. The bottom layer is an unfilled first resin and has a nearly constant thickness .

On top of the bottom layer BL a middle layer of another resin is applied to the entire surface. Resin and deposition conditions are chosen to allow flowing of the resin such that a plane surface thereof forms. The height h2 over the

substrate surface of the middle layer ML is slightly higher than the height hi of the bottom layer BL over the substrate. Hence, the upper side of the device chip DC is covered by a remaining small thickness of the middle layer ML of about 0 to 20 ym.

Finally the top layer TL of the sealing means is applied in a fashion that another plane surface is achieved. The top layer TL comprises a second resin filled with a high amount of a thermally conductive filler. The height of the top layer TL over the middle layer can be set to about 20 ym to 120 ym. Further, the second resin shows improved passivation

properties and is mechanically stable to withstand mechanical or chemical impact from the environment. The thickness of the top layer TL is thinner than that of the middle layer ML corresponding to height h2 Moreover, since the low thickness the total amount of the more expensive thermally high

conductive filler can be minimized.

On top of the top layer a product marking may be applied e.g. by laser writing or ink printing.

Figure 2 shows as a second embodiment an acoustic wave device that differs only slightly from the above first embodiment. The height h2 of the middle layer ML over the surface of the substrate SU complies with the height of the top surface of the bottom layer BL over the device chip DC. Hence, the middle layer ML and the bottom layer BL over the device chip DC are on the same height level and form a common surface.

The highly thermally conductive top layer is hence applied directly to the bottom layer BL in the area of the device chip. A good thermal contact between top layer TL and the heat producing device chip DC is achieved.

Figure 3 shows as a third embodiment an acoustic wave device that differs only slightly from the above first and second embodiment. Here, the height h2 of the middle layer ML over the surface of the substrate SU is lower than the height of the top surface of the bottom layer BL over the device chip DC. This arrangement provides safe contact between top surface of the bottom layer BL and top layer TL in the region above the device chip DC. By the lower thickness of middle layer ML the surface thereof is not as plane as in the second embodiment but sufficiently plane to allow easy applying of top layer in a planar fashion. Figure 4 shows an acoustic wave device according to prior art that is sealed by a similar but less advantageous sealing means. A conformal bottom layer of a polyolefin or a

polyimide or an epoxy-based material contains silica as a filler. A middle layer ML of another epoxy-based material that contains silica as a filler is applied on the entire bottom layer BL . The surface of this layer still has a topography of the layers below and is thus not even. A top layer TL of another epoxy-based material that contains silica as a filler is applied thereon to provide a plane and even surface. Due to the topography below this layer has varying thickness. Due to the lower thermal conductivity of silica in view of the highly conducting filler material of the

invention the thermal conductivity of the sealing means as a whole is worse than that of the invention and reaches only 1.0 W/K m.

Figure 5 shows a second comparative example according to the art. Here, a filled bottom layer BL is applied conformally to the surface of device chip DC and to substrate SU to provide an uneven topography. Directly thereon a top layer TL is applied in a planarizing manner. Both layer are made of epoxy-based resin filled with silica.

Figure 6 shows a third comparative example according to the art. Here, a bottom layer BL is applied non-conformally to the surface of device chip and substrate in a sealing manner on a surface with a reduced topography. Directly thereon a top layer TL is applied in a planarizing manner. Both layers are made of epoxy-based resin filled with silica.

Figure 7 shows a fourth comparative example according to the art. Here, only a top layer TL is applied in a planarizing manner to the surface of device chip DC and substrate SU in a sealing manner. The layer is a resin filled with silica.

Replacing the filler material with a more conductive filler material would lead to enhanced costs.

The invention is not restricted to the shown embodiments in shape, number and material. The scope of the invention is only defined by the claims. Hence, the embodiments may be modified without extending beyond the scope of the invention.

List of used terms and reference symbols

Claims

Claims (We claim)

1. A device operating with acoustic waves comprising

- a device chip (DC) mounted onto a surface of a substrate (SU) in a flip chip technique

- a sealing means for sealing the device chip to the

substrate and for closing a cavity between device chip and substrate applied onto the surface of substrate and device chip

wherein the sealing means comprises

- a bottom layer (BL) comprising a first resin adapted to seal to the surface of the substrate (SU) as to close the cavity and to prevent intrusion of further material of the sealing means when reflowing or laminating same onto the bottom layer (BL)

- a top layer (TL) deposited on top of the arrangement comprising a second resin and a filler that is chosen to provide a thermal conductivity to the top layer of 2.0 to 10.0 W/mK.

2. The device of the foregoing claim,

wherein the filler is an anorganic material having a high thermal conductivity chosen from AIN, BN, AI₂O₃ and Graphite, Graphene .

3. The device of one of the foregoing claims, wherein

a middle layer is interposed between the bottom layer and the top layer

the middle layer is a planarizing layer

the top layer has a thickness that is constant over the entire surface and lower than the thickness of the middle layer .

4. The device of one of the foregoing claims, wherein

wherein the bottom layer is a layer laminated conformal to the surface of substrate and chip

wherein the middle layer has a plane top surface

wherein the thickness of the middle layer over the substrate

- is smaller than the height of the device chip over the substrate, or

- is equal to the height of the device chip over the

substrate, or

- is higher than the height of the device chip, such that the height of the middle layer over the chip is smaller than the height of the device chip over the surface of the substrate.

5. The device of one of the foregoing claims, wherein

the thickness of the bottom layer is between 15 and 40 ym.

6. The device of one of the foregoing claims,

wherein a remaining thickness of the middle layer over the device chip is between 0 and 20 ym.

7. The device of one of the foregoing claims,

wherein the filler content of the top layer is between 20 and 90 wt%.

8. The device of one of the foregoing claims, wherein the device chip is SAW device or a BAW device.

9. The device of one of the foregoing claims, wherein the substrate is a PCB and comprises an FR4 material, HTCC, LTCC, LCP or glass-based substrates.

10. The device of one of the foregoing claims, wherein the upper layer comprises an epoxy-based or polyimide-based resrn .