WO2020014977A1 - 电容检测电路、触摸检测装置和终端设备 - Google Patents

电容检测电路、触摸检测装置和终端设备 Download PDF

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Publication number
WO2020014977A1
WO2020014977A1 PCT/CN2018/096503 CN2018096503W WO2020014977A1 WO 2020014977 A1 WO2020014977 A1 WO 2020014977A1 CN 2018096503 W CN2018096503 W CN 2018096503W WO 2020014977 A1 WO2020014977 A1 WO 2020014977A1
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Prior art keywords
capacitor
voltage
capacitance
detection circuit
charging
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PCT/CN2018/096503
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English (en)
French (fr)
Inventor
范硕
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深圳市汇顶科技股份有限公司
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Application filed by 深圳市汇顶科技股份有限公司 filed Critical 深圳市汇顶科技股份有限公司
Priority to PCT/CN2018/096503 priority Critical patent/WO2020014977A1/zh
Priority to CN201880001034.9A priority patent/CN109073692B/zh
Publication of WO2020014977A1 publication Critical patent/WO2020014977A1/zh

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R27/00—Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
    • G01R27/02—Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
    • G01R27/26—Measuring inductance or capacitance; Measuring quality factor, e.g. by using the resonance method; Measuring loss factor; Measuring dielectric constants ; Measuring impedance or related variables
    • G01R27/2605—Measuring capacitance

Definitions

  • the present application relates to the field of electronic technology, and in particular, to a capacitance detection circuit, a touch detection device, and a terminal device.
  • Capacitive sensors are widely used in the field of human-computer interaction in electronic products. Specifically, a self-capacitance is formed between the detection electrode and the ground. When a conductor (such as a finger) approaches or touches the detection electrode, the Capacitance will change, and the information of the conductor approaching or touching the detection electrode is acquired by detecting the amount of change in the capacitance, so as to determine the effect of the user's operation on the capacitor to be measured.
  • the high-frequency component of the coded waveform generated when the capacitor detection circuit detects the capacitor under test may cause electromagnetic interference (Electromagnetic Interference, EMI) to nearby receiving devices such as Radio Frequency (RF) equipment. Therefore, How to reduce the EMI interference caused by the capacitance detection circuit is an urgent problem.
  • EMI Electromagnetic Interference
  • the embodiments of the present application provide a capacitance detection circuit, a touch detection device, and a terminal device, which can reduce EMI interference caused by the capacitance detection circuit.
  • a capacitance detection circuit including a first charging and discharging circuit and a voltage generating circuit, the first charging and discharging circuit including a capacitor under test; wherein the voltage generating circuit is configured to generate a Voltage; the first charging and discharging circuit is used to clear the charge on the capacitor under test in the first stage, and charge the capacitor under test to the first voltage based on the control of the first voltage in the second stage.
  • the capacitance detection circuit detects the capacitor under test by executing the first stage and the second stage multiple times.
  • the capacitance detection circuit generates a first voltage with a variable voltage value through the voltage generating circuit, so that the charging time of the capacitor to be tested is no longer equal for many times, thereby reducing the time required for the capacitor detection circuit to detect the capacitor to be tested
  • the high-frequency component of the generated coding waveform can further reduce the EMI interference caused by the capacitance detection circuit to nearby RF receiving devices.
  • the capacitance detection circuit further includes a comparator.
  • the comparator includes a first input terminal, a second input terminal, and a first output terminal.
  • the first input terminal inputs the voltage of the capacitor under test, and the second input terminal inputs the first voltage
  • the first output terminal When the voltage of the capacitor under test is equal to the first voltage, the first output terminal outputs a control signal, which is used to control the first charging and discharging circuit to end the charging of the capacitor under test in the second stage.
  • the voltage generating circuit includes a first resistor and a second resistor with adjustable resistance, one end of the first resistor is connected to a voltage source, and the other end of the first resistor is connected to the One end of a second resistor, and the other end of the second resistor is grounded,
  • the voltage generating circuit uses the divided voltage of the first resistor as the first voltage, and generates a first voltage with a variable voltage value by adjusting a ratio of the first resistor / the second resistor.
  • the capacitance detection circuit further includes a second charging and discharging circuit, and the second charging and discharging circuit includes an integrating capacitor,
  • the second charging and discharging circuit is used to clear the charge on the integrating capacitor in the first stage and charge the integrating capacitor in the second stage.
  • the charging time of the integrating capacitor is equal to the capacitor under test. The charging time is such that the capacitance change of the capacitor under test is related to the capacitance change of the integrating capacitor.
  • the capacitance detection circuit further includes a controller, and the controller is configured to control a time period for charging the integration capacitor equal to a time period for charging the capacitor under test.
  • the controller may be the above comparator.
  • the first output terminal of the comparator outputs a control signal, and the control signal is also used to control the second
  • the charging and discharging circuit ends the charging of the integrating capacitor in the second stage.
  • the controller may also be an independent module.
  • the controller may execute the first phase and the second phase in synchronization with the first charge and discharge circuit.
  • the length of time it takes to charge a capacitor is equal to the length of time it takes to charge the capacitor under test.
  • the first charging and discharging circuit and the second charging and discharging circuit are further configured to:
  • the operations in the first stage and the second stage are performed N times, and the average value of the N capacitance values of the integration capacitor obtained in the N operations is used as the actual measurement value of the capacitance of the integration capacitor.
  • the first voltage is partially or completely different in N operations, and an average value of the first voltage in N operations is equal to a preset voltage value.
  • the preset voltage value may be determined according to at least one of noise, signal to noise ratio (SNR), and sensitivity of the radio frequency receiving device.
  • SNR signal to noise ratio
  • the first charging and discharging circuit and the second charging and discharging circuit are an RC charging and discharging circuit or a current source charging and discharging circuit.
  • the first charging and discharging circuit includes a first current source, a first switch, and a second switch,
  • One end of the first current source is connected to a power source, the other end of the first current source is connected to one end of the capacitor under test through the first switch, the other end of the capacitor under test is grounded, and the second switch is connected to the The capacitor under test is connected in parallel.
  • the first switch is opened and the second switch is closed;
  • the second switch is opened, and the first switch is closed until the voltage on the capacitor under test reaches the first voltage.
  • the second charging and discharging circuit includes a second current source, a third switch, and a fourth switch,
  • One end of the second current source is connected to a power source, the other end of the second current source is connected to one end of the integrating capacitor through the third switch, the other end of the integrating capacitor is grounded, and the fourth switch is connected to the integrating capacitor. in parallel.
  • the third switch is opened and the fourth switch is closed;
  • the fourth switch is opened, and the third switch is closed until the voltage on the capacitor under test reaches the first voltage.
  • the first charging and discharging circuit includes a fifth switch, a sixth switch, and a third resistor
  • One end of the third resistor is connected to a power source, and the other end of the third resistor is connected to one end of the capacitor under test through the fifth switch. The other end of the capacitor under test is grounded, and the sixth switch is connected to the one under test.
  • the capacitors are connected in parallel.
  • the fifth switch is opened and the sixth switch is closed;
  • the sixth switch is opened, and the fifth switch is closed until the voltage on the capacitor under test reaches the first voltage.
  • the second charging and discharging circuit includes a seventh switch, an eighth switch, and a fourth resistor,
  • One end of the fourth resistor is connected to a power source, the other end of the fourth resistor is connected to one end of the integrating capacitor through the seventh switch, the other end of the integrating capacitor is grounded, and the eighth switch is connected in parallel to the integrating capacitor.
  • the seventh switch is opened and the eighth switch is closed;
  • the eighth switch is opened, and the seventh switch is closed until the voltage on the capacitor under test reaches the first voltage.
  • the capacitance detection circuit further includes an analog-to-digital conversion circuit, configured to convert a voltage signal of the integration capacitor into a digital signal.
  • the capacitance detection circuit further includes a voltage buffer, configured to perform buffer processing on a voltage signal corresponding to the integrating capacitor.
  • the capacitance detection circuit further includes a processing circuit, configured to determine a capacitance of the capacitor to be tested according to a voltage signal corresponding to the integrating capacitor.
  • the capacitance detection circuit is applied to a capacitance sensor, and the capacitor to be tested is a sensor capacitance of the capacitance sensor.
  • an embodiment of the present application provides a touch detection device, including the capacitance detection circuit according to the first aspect or any optional implementation manner of the first aspect, and the touch detection device is determined according to the capacitance detection circuit.
  • the amount of capacitance change of the capacitor under test relative to the base capacitor determines a user's touch position.
  • an embodiment of the present application provides a terminal device including the touch detection apparatus according to the second aspect.
  • FIG. 1 is a schematic diagram of a coding waveform in a conventional capacitance detection process.
  • FIG. 2 is a schematic diagram of another coding waveform in a conventional capacitance detection process.
  • FIG. 3 is a schematic diagram of a voltage change of a capacitor under test during a capacitance detection process.
  • FIG. 4 is a schematic block diagram of a capacitance detection circuit according to an embodiment of the present application.
  • FIG. 5 is an exemplary schematic structural diagram of a comparator according to an embodiment of the present application.
  • FIG. 6 is a schematic structural diagram of a voltage generating circuit according to an embodiment of the present application.
  • FIG. 7 is a schematic block diagram of another capacitance detection circuit according to an embodiment of the present application.
  • FIG. 8 is a schematic diagram of a coding waveform in a capacitance detection process according to an embodiment of the present application.
  • FIG. 9a is a spectrum diagram in a conventional capacitance detection process.
  • FIG. 9b is a spectrum diagram in the capacitance detection process in the embodiment of the present application.
  • FIG. 10a is a partial enlarged view of a spectrogram in a conventional capacitance detection process.
  • FIG. 10b is a partial enlarged view of a spectrogram in a capacitance detection process according to an embodiment of the present application.
  • FIG. 11 is another schematic structural diagram of a capacitance detection circuit according to an embodiment of the present application.
  • FIG. 12 is another schematic structural diagram of a capacitance detection circuit according to an embodiment of the present application.
  • FIG. 13 is another schematic structural diagram of a capacitance detection circuit according to an embodiment of the present application.
  • FIG. 14 is a schematic block diagram of a touch detection device according to an embodiment of the present application.
  • the technical solutions of the embodiments of the present application can be applied to various devices using touch, for example, active pens, capacitive pens, mobile terminals, computers, home appliances, and the like.
  • the capacitance detection circuit in the embodiment of the present application may be provided in various touch devices for detecting a capacitance change of the capacitor under test, that is, a capacitance of the capacitor under test (the capacitor to be detected), and then detecting a pressure change caused by the touch.
  • the capacitor under test here refers to a capacitive sensor provided on a touch panel.
  • the capacitance change of the capacitor under test can be either a relative value or an absolute value. For example, when the initial capacitance of the capacitor under test is zero, the capacitance change of the capacitor under test is the absolute value of its capacitance.
  • capacitor may also be simply referred to as “capacitance”, and accordingly, the capacitance of a capacitor may also be referred to as a capacitance value.
  • capacitor and the capacitance of the capacitor are taken as an example for description.
  • a capacitance is formed between the capacitor Cx to be tested and the ground.
  • a conductor such as a finger approaches or touches the capacitor Cx to be tested
  • the capacitance between the capacitor Cx and the ground changes.
  • the capacitance change amount ⁇ C of the capacitor capacitance Cx can obtain the information of the conductor approaching or touching the capacitor Cx to be measured, thereby judging the user's operation.
  • the capacitance detection circuit needs to charge and discharge the capacitor Cx to be tested multiple times during the process of detecting the capacitor Cx to be tested (for example, the charge on the capacitor Cx to be tested is cleared in the first stage, and in the second stage Charge the capacitor under test Cx to a preset voltage). Therefore, during multiple charging and discharging processes, the voltage of the capacitor under test Cx will show a certain coding waveform.
  • the high-frequency component of the coding waveform may affect the Adjacent devices such as RF receivers generate EMI interference, which reduces the sensitivity of the RF receiver.
  • the voltage of the capacitor Cx to be tested will present a certain coding waveform as the charging progresses.
  • the voltage of the capacitor under test during the charging process shows a triangular wave with time. Each charging time is the same, which is denoted as T0.
  • the measuring capacitor Cx is charged to the same voltage and is recorded as Vcx.
  • the coding waveform shown in FIG. 1 As another example, as shown in the coding waveform shown in FIG.
  • each charging and discharging process includes four parts: a rising part, a high-level part, a falling part, and a low-level part.
  • the rising and falling portions of the voltage of the capacitor Cx to be tested as the charging progresses may be in the form of RC charging and discharging.
  • the arc-shaped voltage change form in FIG. 3 may also be a current source charge-discharge form, specifically the linear voltage change form as shown in FIG. 3.
  • a voltage generation circuit is provided in the embodiment of the present application to generate a first voltage with a variable voltage value.
  • the capacitance detection circuit When the capacitor Cx to be tested is charged and discharged multiple times, the capacitor Cx to be tested is charged to the first voltage each time, and the first voltage is partially or completely different in multiple charges and discharges, and the average of the first voltage in N operations is averaged.
  • the value is equal to the preset voltage value, the time required for each charge is no longer equal, and it will not affect the detection of the capacitor Cx to be tested.
  • the coded waveform of the voltage of the capacitor Cx to be tested appears during multiple charging and discharging.
  • the sharp peaks of the high-frequency components are significantly reduced, thereby reducing the EMI interference caused by the capacitance detection circuit to nearby RF receiving devices.
  • FIG. 4 is a schematic diagram of a capacitance detection circuit 200 according to an embodiment of the present application.
  • the capacitance detection circuit 200 can be applied to any scenario.
  • the capacitance detection circuit 200 is suitable for a touch detection device to detect touch information of a user.
  • the capacitor Cx to be tested can be regarded as a capacitor formed by the electrode of the touch channel and the ground. At this time, the capacitor Cx to be tested can also be called a detection capacitor or a detection electrode .
  • the capacitance detection circuit 200 includes a first charge-discharge circuit 210 and a voltage generation circuit 220.
  • the first charge-discharge circuit 210 includes a capacitor Cx to be tested.
  • the voltage generating circuit 220 is configured to generate a first voltage with a variable voltage value
  • the first charging and discharging circuit 210 is used to clear the charge on the capacitor Cx to be tested in the first stage, and to charge the capacitor Cx to be tested to the first voltage based on the control of the first voltage in the second stage.
  • the first charge-discharge circuit 210 clears the charge on the capacitor Cx to be tested in the first stage, and charges the capacitor Cx to be tested to the first voltage V R in the second stage.
  • the time for charging the capacitor under test Cx to the first voltage V R is T1; when a finger approaches or touches the capacitor under test Cx, the capacitor under test Cx
  • the time to charge to the first voltage V R is T2. Since the capacitance of the capacitor Cx to be measured changes when a finger approaches or touches, a capacitance change amount ⁇ C is generated. Therefore, the relationship between T2 and T1 is sufficient. Determine the capacitance change of the capacitor Cx under test.
  • the capacitance detection circuit 200 further includes a comparator 230.
  • the comparator 230 includes a first input terminal 231 (for example, a non-inverting input terminal), a second input terminal 232 (for example, an inverting input terminal), and a first output terminal 233.
  • the first input terminal 231 inputs the voltage V Cx of the capacitor Cx to be tested, and the second input terminal 232 inputs the first voltage V R.
  • the comparator 230 compares the voltage V Cx of the capacitor Cx to be tested with the first voltage V R.
  • the signal comparator 230 when the voltage V Cx Cx is equal to a first voltage V R, the signal comparator 230 overturns, the first output of the comparator 230 outputs a control signal terminal 233, a control signal for controlling the first charging and discharging circuit 210 The charging of the capacitor Cx to be tested in the second phase ends.
  • the first input terminal 231 can be connected to the capacitor Cx to be tested to obtain the voltage V Cx of the capacitor Cx to be measured in real time
  • the second input terminal 232 can be connected to the voltage generating circuit 220 to obtain the first voltage V R (in the voltage generating circuit 220 is changed to the first voltage V R, the first voltage can be accurately acquire the changed V R).
  • the control signal output from the first output terminal 233 can directly act on components such as switches in the first charging and discharging circuit 210 to end the charging of the capacitor Cx to be tested in the second stage.
  • the control signal output from the first output terminal 233 may also be input to a processor or controller to trigger the processor or controller to control components such as switches in the first charging and discharging circuit 210 to end the second stage.
  • the capacitor Cx under test is charged in the middle.
  • the voltage generating circuit 220 includes a first resistor R1 and a second resistor R2 with adjustable resistance values.
  • the first resistor R1 and the second resistor R2 may be sliding varistors, varistors, or other resistors with adjustable resistance values, which are not limited in this application.
  • the voltage generating circuit 220 uses the divided voltage of the first resistor R1 as the first voltage V R , and generates a first voltage V with a variable voltage value by adjusting a ratio of the first resistor R1 / the second resistor R2. R.
  • the capacitance detection circuit 200 further includes a second charging and discharging circuit 240, and the second charging and discharging circuit 240 includes an integrating capacitor C 1 .
  • the charging time of the integrating capacitor C I is equal to the charging time of the capacitor Cx to be tested, so that the capacitance change amount of the capacitor Cx to be tested is related to the capacitance change amount of the integrating capacitor C I. That is, the capacitance change amount of the integrating capacitor C I can reflect the capacitance change amount ⁇ C of the capacitor Cx to be measured.
  • the capacitance change amount of the integrating capacitor C I can reflect the capacitance change amount ⁇ C of the capacitor Cx to be measured.
  • a controller such as a switch in the second charge-discharge circuit 240 may be controlled by a controller, so as to realize that the charging time of the integration capacitor C 1 is equal to the charging time of the capacitor Cx to be tested.
  • This controller may control components such as switches in the second charge-discharge circuit 240 based on a control signal output from the comparator 230.
  • the first charge-discharge circuit 210 and the second charge-discharge circuit 240 perform the operations in the first phase and the second phase N times, and respectively obtain the operations obtained in the N operations.
  • the first voltage V R is not the same in some or all of the N operations, and the operation N times the average of the first voltage V R is equal to a preset voltage value.
  • the value of the first voltage V R in N operations may be fixed or may be periodically changed.
  • the period change value may be written with a PN (Pseudo-Noise Code) code.
  • the preset voltage value may be determined according to at least one of noise, SNR, and sensitivity of a nearby RF receiving device.
  • the peak value of the high-frequency component of the coding waveform generated when the operations of the first stage and the second stage are performed is reduced. Furthermore, it is possible to reduce the EMI interference caused by the capacitance detection circuit in the vicinity such as the RF receiving device.
  • the average voltage on the integrating capacitor C 1 may also be unchanged, so that the change in the first voltage V R is important for detecting the capacitor under test.
  • the effect of Cx is zero.
  • a first charging and discharging circuit 210 and a second charging and discharging circuit 240 performs the operation of the first stage and the second stage 4 times, and the first voltage V R and the execution of the first phase of the fourth The operations in the two phases are all different.
  • the times for charging the capacitor Cx to be tested to the first voltage V R four times are respectively denoted as T0, T1, T2, and T3.
  • T0 ⁇ T1 ⁇ T2 ⁇ T3 and ( T0 + T1 + T2 + T3) / 4 T, where T is the time for charging the capacitor Cx to be tested to a preset voltage value, as shown in FIG. 8.
  • FIG. 9a the triangular wave spectrum chart of charging the capacitor Cx to be tested to a preset voltage value 4 times is shown. At this time, the time to charge the capacitor Cx to be tested to the preset voltage value is T in each of the 4 charges. .
  • FIG. 9b the triangular wave spectrum diagram of charging the capacitor Cx to be tested to the first voltage V R 4 times is shown. At this time, the times of charging the capacitor Cx to be tested to the first voltage V R 4 times are respectively recorded as T0, T1, T2.
  • Figure 9a and Figure 9b are enlarged at a frequency of 1.5 GHz, as shown in Figure 10a and Figure 10b, respectively. It can be seen that the peak noise energy in some bands has decreased by about 3 dB (dB).
  • FIG. 9a and FIG. 9b, and FIG. 10a and FIG. N 4 as an example for illustration.
  • N the suppression effect after spreading is better.
  • the larger N the smaller the EMI interference to nearby RF receivers and the like is.
  • the received EMI interference signal is suppressed within a certain bandwidth, and the energy is reduced. This reduces the impact on sensitivity and improves the reception success rate.
  • the peak value of the high-frequency component of the coded waveform can be reduced, thereby reducing the capacitance detection circuit from Purpose of EMI interference caused by RF receivers, etc.
  • the first charge and discharge circuit and the second charge and discharge circuit are current source charge and discharge circuits, and the first charge and discharge circuit and the second charge and discharge circuit are RC charge and discharge. Circuit.
  • the first charge and discharge circuit 210 and the second charge and discharge circuit 240 are current source charge and discharge circuits, and the first charge and discharge circuit and the second charge and discharge circuit are RC charge and discharge circuits. These two cases are described in detail.
  • FIG. 11 and FIG. 12 are intended to help those skilled in the art to better understand the embodiments of the present application, but not to limit the scope of the embodiments of the present application.
  • Various equivalent modifications or changes based on FIG. 11 and FIG. 12 also fall within the scope of the embodiments of the present application.
  • the first charging and discharging circuit 210 and the second charging and discharging circuit 240 are current source charging and discharging circuits.
  • the capacitance detection circuit 200 includes a first charging and discharging circuit 210, a voltage generating circuit 220, a comparator 230, and a second charging and discharging circuit 240.
  • the first charge-discharge circuit 210 includes a first current source I 1, switch S 1 is the first and the second switch S 2, one end of the first current source I 1 is connected to the power supply V DD, the first current source I 1 the other end through the first switch S 1 is connected to one end of the capacitor Cx to be measured, the other end of the capacitor Cx to be measured, the second switch S 2 and the measured capacitor Cx in parallel.
  • the voltage generating circuit 220 includes a first resistor R1 and a second resistor R2 with adjustable resistance values. One end of the first resistor R1 is connected to a voltage source Vs, and the other end of the first resistor R1 is connected to one end of the second resistor R2. The other end of the second resistor R2 is grounded.
  • the voltage generating circuit 220 uses the divided voltage of the first resistor R1 as the first voltage V R , and generates a first voltage V with a variable voltage value by adjusting a ratio of the first resistor R1 / the second resistor R2. R.
  • the comparator 230 includes a first input terminal 231, a second input terminal 232, and a first output terminal 233.
  • the first input terminal 231 inputs the voltage V Cx of the capacitor Cx to be measured, and the second input terminal 232 inputs the first voltage V. R , the comparator 230 compares the voltage V Cx of the capacitor Cx under test with the first voltage V R. When the voltage V Cx of the capacitor Cx under test is equal to the first voltage V R , the first output of the comparator 230
  • the terminal 233 outputs a control signal, which is used to control the first charging and discharging circuit 210 to end the charging of the capacitor Cx to be tested in the second stage.
  • the second charging and discharging circuit 240 includes a second current source I 2, the third switch S 3 and a fourth switch S 4, one end of the second current source I 2 is connected to the power supply V DD, the second current source I 2 The other end is connected to one end of the integrating capacitor C I through the third switch S 3 , the other end of the integrating capacitor C I is grounded, and the fourth switch S 4 is connected in parallel to the integrating capacitor C I.
  • the duration that the second current source I 2 charges the integration capacitor C I is equal to the duration that the first current source I 1 charges the capacitor Cx under test, so that the capacitance of the capacitor under test Cx changes.
  • the capacitance change amount of the integration capacitor C I is correlated, so that the capacitance change of the capacitor Cx to be tested can be determined based on the capacitance change of the integration capacitor C I.
  • the capacitance change of the capacitor under test Cx is related to the The capacitance change amount of the integrating capacitor C I , that is, the capacitance change amount of the capacitor Cx to be measured is related to the capacitance change amount of the integrating capacitor C I , or the capacitance change amount of the integrating capacitor C I can reflect the capacitor under test Cx capacitance change.
  • the capacitance change amount of the integrating capacitor C I depends on the charging time, and the charging time of the integrating capacitor C I depends on the charging time of the capacitor Cx to be tested.
  • the charging time of the capacitor Cx to be tested is The time that elapses between charging to the first voltage V R. During this time, the capacitance of the capacitor under test Cx changes due to charging, so that the capacitance change of the integrating capacitor C I and the capacitance change of the capacitor Cx under test. Accordingly, the capacitance change of the capacitor Cx to be measured can be obtained by measuring the capacitance of the integrating capacitor C I.
  • the first stage and the second stage in the capacitance detection process may be performed in the following manner:
  • S1 and S3 are opened and S2 and S4 are closed. Because S2 is connected across the two ends of the capacitor Cx under test and S4 is connected across the two ends of the integrating capacitor C I , the capacitor under test Cx and the integrating capacitor C I are discharged to zero, that is, the capacitor under test Cx and the integrating capacitor C I The charge on it is cleared.
  • the measured capacitance of the integrating capacitor C I is assumed to be A
  • the measured capacitance of the integrating capacitor C I is assumed Is B
  • the capacitance change amount of the integration capacitor C I is the difference between A and B, because the value of A and B depends on the time during which the second current source I 2 charges the integration capacitor C I , and the charging time It is equal to the length of time that the first current source I 1 charges the capacitor Cx to be tested to the first capacitor V R , so the capacitance change amount ⁇ C of the capacitor Cx to be tested can be determined according to the difference between A and B.
  • the first output terminal 233 of the comparator 230 outputs a control signal.
  • the signal is used to control S1 in the first charge and discharge circuit 210 to be turned off to end the charging of the capacitor Cx under test in the second stage, and to control S3 to be turned off in the second charge and discharge circuit 240 to end
  • the integration capacitor C 1 is charged in this second stage.
  • the first charging and discharging circuit 210 and the second charging and discharging circuit 240 are RC charging and discharging circuits.
  • the capacitance detection circuit 200 includes a first charging and discharging circuit 210, a voltage generating circuit 220, a comparator 230, and a second charging and discharging circuit 240.
  • the first charging and discharging circuit 210 includes a third resistor R3, a switch S 1 is the first and the second switch S 2, one end of the third resistor R3 is connected to the power supply V DD, and the other end of the third resistor R3 through the first
  • the switch S 1 is connected to one end of the capacitor Cx to be tested, the other end of the capacitor Cx to be grounded, and the second switch S 2 is connected in parallel to the capacitor Cx to be tested.
  • the voltage generating circuit 220 includes a first resistor R1 and a second resistor R2 with adjustable resistance values. One end of the first resistor R1 is connected to a voltage source Vs, and the other end of the first resistor R1 is connected to one end of the second resistor R2. The other end of the second resistor R2 is grounded.
  • the voltage generating circuit 220 uses the divided voltage of the first resistor R1 as the first voltage V R , and generates a first voltage V with a variable voltage value by adjusting a ratio of the first resistor R1 / the second resistor R2. R.
  • the comparator 230 includes a first input terminal 231, a second input terminal 232, and a first output terminal 233.
  • the first input terminal 231 inputs the voltage V Cx of the capacitor Cx to be measured, and the second input terminal 232 inputs the first voltage V. R , the comparator 230 compares the voltage V Cx of the capacitor Cx under test with the first voltage V R. When the voltage V Cx of the capacitor Cx under test is equal to the first voltage V R , the first output of the comparator 230
  • the terminal 233 outputs a control signal, which is used to control the first charging and discharging circuit 210 to end the charging of the capacitor Cx to be tested in the second stage.
  • the second charging and discharging circuit 240 includes a fourth resistor R4, a third switch and a fourth switch S 3 S 4, the end of the fourth resistor R4 is connected to the power supply V DD, and the other end of the fourth resistor R4 through the third switch S 3 is connected to one end of the integrating capacitor C I, and the other end of the integrating capacitor C I, the fourth switch S 4 in parallel with the integration capacitor C I.
  • the power source V DD through the fourth resistor R4 to the integrating capacitor C I is charged by the power supply V DD is equal to the long duration of the third resistor R3 of the measured capacitor Cx is charged, so that the capacitance of the capacitor Cx measured
  • the amount of change is related to the amount of change in the capacitance of the integrating capacitor C I , that is, the amount of change in the capacitance of the capacitor Cx to be measured is related to the amount of change in the capacitance of the integrating capacitor C I , or the amount of change in the capacitance of the integrating capacitor C I can reflect The capacitance variation of the capacitor Cx to be measured.
  • the capacitance change amount of the integrating capacitor C I depends on the charging time, and the charging time of the integrating capacitor C I depends on the charging time of the capacitor Cx to be tested.
  • the charging time of the capacitor Cx to be tested is The time that elapses between charging to the first voltage V R. During this time, the capacitance of the capacitor under test Cx changes due to charging, so that the capacitance change of the integrating capacitor C I and the capacitance change of the capacitor Cx under test
  • the capacitance change of the capacitor Cx to be measured can be obtained by measuring the capacitance of the integrating capacitor C I.
  • the first stage and the second stage in the capacitance detection process may be performed in the following manner:
  • S1 and S3 are opened and S2 and S4 are closed. Because S2 is connected across the two ends of the capacitor Cx under test and S4 is connected across the two ends of the integrating capacitor C I , the capacitor under test Cx and the integrating capacitor C I are discharged to zero, that is, the capacitor under test Cx and the integrating capacitor C I The charge on it is cleared.
  • the measured capacitance of the integrating capacitor C I is assumed to be A
  • the measured capacitance of the integrating capacitor C I is assumed Is B
  • the capacitance change amount of the integrating capacitor C I is the difference between A and B, because the value of A and B depends on the time that the power source V DD charges the integrating capacitor C I through the fourth resistor R4, and the The charging time is equal to the time taken by the power source V DD to charge the capacitor Cx to be tested to the first capacitor V R through the third resistor R3. Therefore, the capacitance change of the capacitor Cx to be measured can be determined according to the difference between A and B ⁇ C.
  • the first output terminal 233 of the comparator 230 outputs a control signal, and the control The signal is used to control S1 in the first charge and discharge circuit 210 to be turned off to end the charging of the capacitor Cx under test in the second stage, and to control S3 to be turned off in the second charge and discharge circuit 240 to end
  • the integration capacitor C 1 is charged in this second stage.
  • the current source (the first current source I 1 and the second current source I 2 ) in FIG. 11 and the resistors (the third resistor R3 and the fourth resistor R4) in FIG. 12 described above may alternatively be used. It can be a voltage source or a MOS tube.
  • the capacitance detection circuit 200 may repeatedly perform the operations in the first stage and the second stage N times,
  • the average value of the N capacitance values of the integration capacitor C I obtained in the N operations is used as the actual measurement value of the capacitance of the integration capacitor C I , that is, the above A and B are obtained after N operations.
  • the first voltage V R is not the same in some or all of the N operations, and the operation N times the average of the first voltage V R is equal to a preset voltage value.
  • the first output terminal 233 of the comparator 230 may be connected to a control module.
  • the control signal (or when the output signal is inverted) can control the switches S1 to S3 accordingly, so as to realize the charging of the capacitor Cx and the integrating capacitor C I to be tested.
  • the non-inverting input terminal and the inverting input terminal of the comparator 230 can be switched as long as the state of the signal output by the comparator 230 can be detected to be reversed.
  • the capacitance detection circuit 200 further includes an analog to digital converter (ADC) 250 for converting a voltage signal of the integration capacitor C I into a digital signal.
  • ADC analog to digital converter
  • the capacitance detection circuit 200 further includes a voltage buffer 260 for buffering a voltage signal corresponding to the integrating capacitor C I.
  • the voltage buffer 260 can be used to drive the analog-to-digital conversion circuit 250.
  • An input terminal (for example, a non-inverting input terminal) of the voltage buffer 260 may be connected to the integrating capacitor C I , and its input voltage is the voltage V CI of the integrating capacitor C I , and the output terminal is connected to the analog-to-digital conversion circuit 250, so that The voltage signal obtained by charging or discharging on the integrating capacitor C I is passed to the analog-to-digital conversion circuit 250.
  • the capacitance detection circuit 200 further includes a processing circuit 270 for determining a capacitance of the capacitor Cx to be tested according to a voltage signal V CI corresponding to the integrating capacitor C I.
  • the capacitance detection circuit 200 may be applied to a capacitance sensor.
  • the capacitor Cx to be tested is the sensor capacitance of the capacitance sensor.
  • FIG. 14 is a schematic block diagram of a touch detection device 300 according to an embodiment of the present application.
  • the touch detection device 300 may include a capacitance detection circuit 200 as shown in FIG. 2.
  • the touch detection device 300 may determine the touch position of the user according to the capacitance of the capacitor Cx to be tested determined by the capacitance detection circuit 200.
  • the touch detection device 300 may determine the user's touch information such as the user's touch position on the display screen according to the capacitance change amount ⁇ C of the capacitor Cx to be tested relative to the initial capacitance determined by the capacitance detection circuit 200.
  • An embodiment of the present application further provides a terminal device including a touch detection apparatus 300 as shown in FIG. 14.
  • the terminal device may be a mobile phone, a tablet computer, a notebook computer, a desktop computer, a vehicle-mounted electronic device, or a wearable smart device.

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Abstract

一种电容检测电路、触摸检测装置和终端设备，能够降低电容检测电路所造成的EMI干扰。该电容检测电路包括：第一充放电电路（210）和电压产生电路（220），该第一充放电电路（210）包括待测电容器；其中，该电压产生电路（220）用于产生电压值可变的第一电压；该第一充放电电路（210）用于在第一阶段将该待测电容器上的电荷清零，并在第二阶段基于该第一电压的控制将该待测电容器充电至该第一电压。

Description

电容检测电路、触摸检测装置和终端设备 技术领域
本申请涉及电子技术领域，尤其涉及一种电容检测电路、触摸检测装置和终端设备。
背景技术
电容型传感器广泛应用于电子产品的人机交互领域，具体地，在检测电极与大地之间会形成自电容，当有导体(例如手指)靠近或触摸检测电极时，检测电极和大地之间的电容会发生变化，通过检测该电容的变化量获取导体靠近或触摸检测电极的信息，从而判断用户的操作对待测电容器的影响。在实际应用中，电容检测电路检测待测电容器时所产生的打码波形的高频分量可能会对临近诸如射频(Radio Frequency，RF)接收装置等造成电磁干扰(Electromagnetic Interference，EMI)，因此，如何降低电容检测电路所造成的EMI干扰是亟待解决的问题。
发明内容
本申请实施例提供了一种电容检测电路、触摸检测装置和终端设备，能够降低电容检测电路所造成的EMI干扰。
第一方面，提供了一种电容检测电路，包括第一充放电电路和电压产生电路，该第一充放电电路包括待测电容器；其中，该电压产生电路用于产生电压值可变的第一电压；该第一充放电电路用于在第一阶段将该待测电容器上的电荷清零，并在第二阶段基于该第一电压的控制将该待测电容器充电至该第一电压。
需要说明的是，该电容检测电路通过多次执行该第一阶段和该第二阶段来检测该待测电容器。
因此，本申请实施例中电容检测电路，通过电压产生电路产生电压值可变的第一电压，使得多次对待测电容器的充电时间不再相等，从而降低了电容检测电路检测待测电容器时所产生的打码波形的高频分量，进而，能够降低电容检测电路对临近诸如RF接收装置等所造成的EMI干扰。
可选地，在一种可能的实现方式中，该电容检测电路还包括比较器，该 比较器包括第一输入端、第二输入端和第一输出端，其中，
该第一输入端输入该待测电容器的电压，该第二输入端输入该第一电压；
在该待测电容器的电压等于该第一电压时，该第一输出端输出控制信号，该控制信号用于控制该第一充放电电路结束该第二阶段中对该待测电容器的充电。
可选地，在一种可能的实现方式中，该电压产生电路包括阻值可调节的第一电阻和第二电阻，该第一电阻的一端连接电压源，该第一电阻的另一端连接该第二电阻的一端，该第二电阻的另一端接地，
其中，该电压产生电路将该第一电阻的分压作为该第一电压，并通过调整该第一电阻/该第二电阻的比值以产生电压值可变的该第一电压。
可选地，在一种可能的实现方式中，该电容检测电路还包括第二充放电电路，该第二充放电电路包括积分电容器，
其中，该第二充放电电路用于在该第一阶段将该积分电容器上的电荷清零，并在该第二阶段对该积分电容器充电，对该积分电容器充电的时长等于对该待测电容器充电的时长，以使该待测电容器的电容变化量关联该积分电容器的电容变化量。
可选地，在一种可能的实现方式中，该电容检测电路还包括控制器，该控制器用于控制对该积分电容器充电的时长等于对该待测电容器充电的时长。
需要说明的是，该控制器可以是上述比较器，在该待测电容器的电压等于该第一电压时，上述比较器的第一输出端输出控制信号，该控制信号还用于控制该第二充放电电路结束该第二阶段中对该积分电容器的充电。
当然，该控制器也可以是一独立的模块，该控制器通过控制该第二充放电电路实现与该第一充放电电路同步执行该第一阶段和该第二阶段，即可以控制对该积分电容器充电的时长等于对该待测电容器充电的时长。
可选地，在一种可能的实现方式中，该第一充放电电路和该第二充放电电路还用于：
执行该第一阶段和该第二阶段中的操作N次，并将N次操作中分别得到的该积分电容器的N个电容值的平均值，作为该积分电容器的电容的实际测量值。
可选地，在一种可能的实现方式中，该第一电压在N次操作中部分或者 全部不相同，且N次操作中该第一电压的平均值等于预设电压值。
可选地，在一种可能的实现方式中，该预设电压值可以是根据噪声、信噪比(Signal Noise Ratio，SNR)、射频接收装置的灵敏度中的至少一种确定。
可选地，在一种可能的实现方式中，该第一充放电电路和该第二充放电电路为RC充放电电路或者电流源充放电电路。
可选地，在一种可能的实现方式中，该第一充放电电路包括第一电流源、第一开关和第二开关，
其中，该第一电流源的一端连接至电源，该第一电流源的另一端通过该第一开关与该待测电容器的一端相连，该待测电容器的另一端接地，该第二开关与该待测电容器并联。
可选地，在一种可能的实现方式中，
在该第一阶段，该第一开关断开，该第二开关闭合；
在该第二阶段，该第二开关断开，该第一开关闭合直至该待测电容器上的电压达到该第一电压时断开。
可选地，在一种可能的实现方式中，该第二充放电电路包括第二电流源、第三开关和第四开关，
其中，该第二电流源的一端连接至电源，该第二电流源的另一端通过该第三开关与该积分电容器的一端相连，该积分电容器的另一端接地，该第四开关与该积分电容器并联。
可选地，在一种可能的实现方式中，
在该第一阶段，该第三开关断开，该第四开关闭合；
在该第二阶段，该第四开关断开，该第三开关闭合直至该待测电容器上的电压达到该第一电压时断开。
可选地，在一种可能的实现方式中，该第一充放电电路包括第五开关、第六开关和第三电阻，
其中，该第三电阻的一端连接至电源，该第三电阻的另一端通过该第五开关与该待测电容器的一端相连，该待测电容器的另一端接地，该第六开关与该待测电容器并联。
可选地，在一种可能的实现方式中，
在该第一阶段，该第五开关断开，该第六开关闭合；
在该第二阶段，该第六开关断开，该第五开关闭合直至该待测电容器上 的电压达到该第一电压时断开。
可选地，在一种可能的实现方式中，该第二充放电电路包括第七开关、第八开关和第四电阻，
其中，该第四电阻的一端连接至电源，该第四电阻的另一端通过该第七开关与该积分电容器的一端相连，该积分电容器的另一端接地，该第八开关与该积分电容器并联。
可选地，在一种可能的实现方式中，
在该第一阶段，该第七开关断开，该第八开关闭合；
在该第二阶段，该第八开关断开，该第七开关闭合直至该待测电容器上的电压达到该第一电压时断开。
可选地，在一种可能的实现方式中，该电容检测电路还包括模数转换电路，用于将该积分电容器的电压信号转换为数字信号。
可选地，在一种可能的实现方式中，该电容检测电路还包括电压缓冲器，用于对该积分电容器对应的电压信号进行缓冲处理。
可选地，在一种可能的实现方式中，该电容检测电路还包括处理电路，用于根据该积分电容器对应的电压信号确定该待测电容器的电容。
可选地，在一种可能的实现方式中，该电容检测电路应用于电容传感器，该待测电容器为该电容传感器的传感器电容。
第二方面，本申请实施例提供了一种触摸检测装置，包括第一方面或第一方面任一可选实现方式所述的电容检测电路，所述触摸检测装置根据所述电容检测电路所确定的所述待测电容器相对于所述基础电容器的电容变化量，确定用户的触摸位置。
第三方面，本申请实施例提供了一种终端设备，包括如第二方面所述的触摸检测装置。
附图说明
图1是现有电容检测过程中的一种打码波形的示意图。
图2是现有电容检测过程中的另一种打码波形的示意图。
图3是电容检测过程中待测电容器的电压变化的示意图。
图4是本申请实施例的一种电容检测电路的示意性框图。
图5是本申请实施例的比较器的示例性结构示意图。
图6是本申请实施例的电压产生电路的示例性结构示意图。
图7是本申请实施例的另一种电容检测电路的示意性框图。
图8是本申请实施例的电容检测过程中的一种打码波形的示意图。
图9a是现有的电容检测过程中的一种频谱图。
图9b是本申请实施例的电容检测过程中的一种频谱图。
图10a是现有的电容检测过程中的一种频谱图的局部放大图。
图10b是本申请实施例的电容检测过程中的一种频谱图的局部放大图。
图11是本申请实施例的电容检测电路的另一示例性结构示意图。
图12是本申请实施例的电容检测电路的另一示例性结构示意图。
图13是本申请实施例的电容检测电路的另一示例性结构示意图。
图14是本申请实施例的触摸检测装置的示意性框图。
具体实施方式
本申请实施例的技术方案可以应用于各种采用触控的设备中，例如，主动笔、电容笔、移动终端、电脑、家电等。本申请实施例的电容检测电路可以设置于各种触控设备中，以用于检测待测电容器，即待测电容器(被检测电容器)的电容变化，进而检测由触控产生的压力变化等。这里的待测电容器，指的是设置在触控面板上的电容型传感器。
应理解，待测电容器的电容变化既可以是相对值也可以是绝对值，例如，在待测电容器的初始电容为零的情况下，待测电容器的电容变化即为其电容的绝对值。
还应理解，“电容器”也可以简称为“电容”，相应地，电容器的电容也可以称为电容值。以下为了便于描述，以电容器和电容器的电容为例进行说明。
在一个电容检测电路中，待测电容器Cx和大地之间会形成电容，当有导体例如手指靠近或触摸待测电容器Cx时，待测电容器Cx和大地之间的电容会发生变化，根据待测电容器电容Cx的电容变化量△C，就能够获取导体靠近或触摸待测电容器Cx的信息，从而判断用户的操作。
在实际应用中，电容检测电路在检测待测电容器Cx的过程中，需要多次对待测电容器Cx进行充放电(如在第一阶段将待测电容器Cx上的电荷清零，并在第二阶段将待测电容器Cx充电至预设电压)，因此，在多次充放 电过程中，待测电容器Cx的电压会呈现出一定的打码波形，然而，上述打码波形的高频分量可能会对临近的诸如RF接收装置产生EMI干扰，从而降低了RF接收器的灵敏度。
电容检测电路在检测待测电容器Cx的过程中，待测电容器Cx的电压随充电的进行会呈现出一定的打码波形。例如，如图1所示的打码波形，电容器检测电路在4次充电过程中，其充电过程中待测电容器的电压随时间呈现三角波，每次充电时间相同，记为T0，每次将待测电容器Cx充电至相同的电压，记为Vcx。又例如，如图2所示的打码波形，电容器检测电路在4次充放电过程中，每次充放电中包括4部分：上升部分，维持高电平部分，下降部分，以及维持低电平部分，每次将待测电容器Cx充电至相同的电压V＝1.2V，每次充电需要相同的时间t＝0.1s，每次放电需要相同的时间t＝0.05s。
需要说明的是，如图3所示，电容检测电路在检测待测电容器Cx的过程中，待测电容器Cx的电压随充电进行所呈现的上升和下降部分可以是RC充放电形式的，具体如图3中弧线型的电压变化形式；也可以是电流源充放电形式，具体如图3中直线型的电压变化形式。
为了消除电容检测电路在检测待测电容器Cx时可能对临近的诸如RF接收装置产生的EMI干扰，本申请实施例提出了一种电压产生电路以产生电压值可变的第一电压，电容检测电路在对待测电容器Cx进行多次充放电时，每次将待测电容器Cx充电至第一电压，第一电压在多次充电放电中部分或者全部不相同，且N次操作中第一电压的平均值等于预设电压值，每次充电所需时间不再相等，也不会对待测电容器Cx的检测构成影响，并且，多次充放电中，待测电容器Cx的电压所呈现出的打码波形的高频分量的尖峰值明显降低，从而，降低了电容检测电路对临近诸如RF接收装置等所造成的EMI干扰。
图4是本申请实施例的电容检测电路200的示意图。
该电容检测电路200可以应用于任何场景。特别地，该电容检测电路200适用于触摸检测装置，以用来对用户的触摸信息进行检测。其中，当该电容检测电路200应用于触摸检测装置时，待测电容器Cx可以认为是一个触摸通道的电极与地形成的电容器，此时，该待测电容器Cx也可以称为检测电容器或者检测电极。
如图4所示，该电容检测电路200包括第一充放电电路210和电压产生 电路220，该第一充放电电路210包括待测电容器Cx，其中，
该电压产生电路220用于产生电压值可变的第一电压；
该第一充放电电路210用于在第一阶段将该待测电容器Cx上的电荷清零，并在第二阶段基于该第一电压的控制将该待测电容器Cx充电至该第一电压。
例如，该第一充放电电路210在第一阶段将该待测电容器Cx上的电荷清零，并在第二阶段将该待测电容器Cx充电至第一电压V R。当没有手指靠近或触摸该待测电容器Cx时，将该待测电容器Cx充电至第一电压V R的用时为T1；当有手指靠近或触摸该待测电容器Cx时，将该待测电容器Cx充电至第一电压V R的用时为T2，由于手指靠近或触摸时，该待测电容器Cx的电容会发生变化，产生电容变化量△C，因此，通过T2与T1之间的关系，就可以判断待测电容器Cx的电容变化情况。
可选地，该电容检测电路200还包括比较器230。
具体地，如图5所示，该比较器230包括第一输入端231(例如同相输入端)、第二输入端232(例如反相输入端)和第一输出端233，该第一输入端231输入待测电容器Cx的电压V Cx，该第二输入端232输入第一电压V R，该比较器230比较待测电容器Cx的电压V Cx与第一电压V R的大小，在待测电容器Cx的电压V Cx等于第一电压V R时，该比较器230的信号发生翻转，该比较器230的该第一输出端233输出控制信号，该控制信号用于控制该第一充放电电路210结束该第二阶段中对该待测电容器Cx的充电。
需要注意的是，该第一输入端231可以连接该待测电容器Cx，以实时获取该待测电容器Cx的电压V Cx，该第二输入端232可以连接电压产生电路220，以获取该第一电压V R(在该电压产生电路220改变该第一电压V R时，也可以准确获取改变后的第一电压V R)。该第一输出端233输出的该控制信号可以直接作用于该第一充放电电路210中诸如开关等部件，以结束该第二阶段中对该待测电容器Cx的充电。该第一输出端233输出的该控制信号也可以输入一个处理器或者控制器，以触发这一处理器或者控制器控制该第一充放电电路210中诸如开关等部件，以结束该第二阶段中对该待测电容器Cx的充电。
可选地，如图6所示，该电压产生电路220包括阻值可调节的第一电阻R1和第二电阻R2。例如，该第一电阻R1和该第二电阻R2可以是滑动变阻 器，也可以是变阻箱，还可以是其他一些阻值可调的电阻器，本申请对此不作限定。
具体地，该第一电阻R1的一端连接电压源Vs，该第一电阻R1的另一端连接该第二电阻R2的一端，该第二电阻R2的另一端接地。该电压产生电路220将该第一电阻R1的分压作为该第一电压V R，并通过调整该第一电阻R1/该第二电阻R2的比值以产生电压值可变的该第一电压V R。
可选地，如图7所示，该电容检测电路200还包括第二充放电电路240，该第二充放电电路240包括积分电容器C 1。
具体地，该第二充放电电路240用于在该第一阶段将该积分电容器C 1上的电荷清零，并在该第二阶段对该积分电容器C 1充电，对该积分电容器C 1充电的时长等于对该待测电容器Cx充电的时长，以使该待测电容器Cx的电容变化量关联该积分电容器C 1的电容变化量。
需要说明的是，对该积分电容器C I充电的时长等于对该待测电容器Cx充电的时长，从而使得该待测电容器Cx的电容变化量关联该积分电容器C I的电容变化量。即，该积分电容器C I的电容变化量就可以反应该待测电容器Cx的电容变化量△C。因此，通过对该积分电容器C I的电容信号进行采集，就可以根据该积分电容器C I的电容变化情况确定该待测电容器Cx的电容变化情况。
可选地，可以是通过一个控制器控制该第二充放电电路240中诸如开关等部件，以实现对该积分电容器C 1充电的时长等于对该待测电容器Cx充电的时长。这一控制器可以是基于比较器230所输出的控制信号控制该第二充放电电路240中诸如开关等部件。
具体地，在该实施例中，该第一充放电电路210和该第二充放电电路240执行该第一阶段和该第二阶段中的操作N次，并将N次操作中分别得到的该积分电容器C 1的N个电容值的平均值，作为该积分电容器C 1的电容的实际测量值。
在该实施例中，该第一电压V R在N次操作中部分或者全部不相同，且N次操作中该第一电压V R的平均值等于预设电压值。
可选地，该第一电压V R在N次操作中的取值可以是固定的，也可以是周期变化的，此时，可以将周期变化值用PN(Pseudo-Noise Code)码编写。
需要说明的是，该预设电压值可以根据噪声、SNR、临近射频接收装置 的灵敏度中的至少一种确定。
应理解，在该第一电压V R在N次操作中部分或者全部不相同时，执行该第一阶段和该第二阶段的操作时所产生的打码波形的高频分量的峰值会降低，进而，可以降低电容检测电路对临近诸如RF接收装置等所造成的EMI干扰。
由于待测电容器Cx的变化量是通过多次读取积分电容器C 1上的电压后做平均得到的。如果能够保证多次读取过程中，第一电压V R的平均值不变，就可以使得积分电容器C 1上的平均电压也不变，从而使得第一电压V R的变化对检测待测电容器Cx的影响为0。
作为一个示例，第一充放电电路210和第二充放电电路240执行该第一阶段和该第二阶段中的操作4次，且第一电压V R在4次执行该第一阶段和该第二阶段中的操作中全部不相同，4次将待测电容器Cx充电至第一电压V R的时间分别记为T0、T1、T2、T3，此时，T0≠T1≠T2≠T3，且(T0+T1+T2+T3)/4＝T，T为将待测电容器Cx充电至预设电压值的时长，具体如图8所示。
为了进一步地说明该示例的降频效果，以下以检测待测电容器的过程中对待测电容器充电时所产生三角波频谱图为例进行说明。具体地，如图9a为4次将待测电容器Cx充电至预设电压值的三角波频谱图，此时，4次充电中每次将待测电容器Cx充电至预设电压值的时间都为T。如图9b为4次将待测电容器Cx充电至第一电压V R的三角波频谱图，此时，4次将待测电容器Cx充电至第一电压V R的时间分别记为T0、T1、T2、T3，此时，T0≠T1≠T2≠T3，且(T0+T1+T2+T3)/4＝T。在图9a和图9b中，横坐标(x轴)为频率，纵坐标(y轴)为噪声能量。由图9a和图9b对比可知，高频分量的尖峰值明显降低。
为了更进一步地说明该示例的降频效果，将图9a和图9b在频率为1.5GHz处放大，分别如图10a和图10b所示，由此可知，部分频段尖峰噪声能量大概下降了3分贝(dB)。
需要说明的是，上述图9a和图9b，以及图10a和图10b是以第一充放电电路210和第二充放电电路240执行该第一阶段和该第二阶段中的操作4次(即N＝4)为例进行说明，理论上如果N越大，那么扩频后的抑制效果就越好。换句话说，N越大，对临近诸如RF接收装置等所造成的EMI干扰就越小。
在申请实施例中，对于高频的RF接收器来讲，受到的EMI干扰信号在一定带宽内得到了抑制，能量降低了。这样对灵敏度的影响就降低了，提高了接收成功率。
因此，在申请实施例中，在检测待测电容器的过程中，在保证电容检测不受影响的前提下，可以实现降低打码波形的高频分量的峰值，从而达到降低电容检测电路对临近诸如RF接收装置等所造成的EMI干扰的目的。
可选地，在本申请实施例中，针对该第一充放电电路和该第二充放电电路为电流源充放电电路，以及该第一充放电电路和该第二充放电电路为RC充放电电路。
下面结合图11和图12，针对该第一充放电电路210和该第二充放电电路240为电流源充放电电路，以及该第一充放电电路和该第二充放电电路为RC充放电电路这两种情况进行具体描述。
应理解，图11和图12所示的例子是为了帮助本领域技术人员更好地理解本申请实施例，而非要限制本申请实施例的范围。基于图11和图12所进行的各种等价的修改或变化，也落入本申请实施例的范围内。
情况1，该第一充放电电路210和该第二充放电电路240为电流源充放电电路。
具体地，如图11所示，该电容检测电路200包括第一充放电电路210、电压产生电路220、比较器230和第二充放电电路240。
该第一充放电电路210包括第一电流源I 1、第一开关S 1和第二开关S 2，该第一电流源I 1的一端连接至电源V DD，该第一电流源I 1的另一端通过该第一开关S 1与该待测电容器Cx的一端相连，该待测电容器Cx的另一端接地，该第二开关S 2与该待测电容器Cx并联。
该电压产生电路220包括阻值可调节的第一电阻R1和第二电阻R2，该第一电阻R1的一端连接电压源Vs，该第一电阻R1的另一端连接该第二电阻R2的一端，该第二电阻R2的另一端接地。该电压产生电路220将该第一电阻R1的分压作为该第一电压V R，并通过调整该第一电阻R1/该第二电阻R2的比值以产生电压值可变的该第一电压V R。
该比较器230包括第一输入端231、第二输入端232和第一输出端233，该第一输入端231输入待测电容器Cx的电压V Cx，该第二输入端232输入第一电压V R，该比较器230比较待测电容器Cx的电压V Cx与第一电压V R 的大小，在待测电容器Cx的电压V Cx等于第一电压V R时，该比较器230的该第一输出端233输出控制信号，该控制信号用于控制该第一充放电电路210结束该第二阶段中对该待测电容器Cx的充电。
该第二充放电电路240包括第二电流源I 2、第三开关S 3和第四开关S 4，该第二电流源I 2的一端连接至电源V DD，该第二电流源I 2的另一端通过该第三开关S 3与该积分电容器C I的一端相连，该积分电容器C I的另一端接地，该第四开关S 4与该积分电容器C I并联。
需要说明的是，该第二电流源I 2对该积分电容器C I充电的时长等于该第一电流源I 1对该待测电容器Cx充电的时长，以使该待测电容器Cx的电容变化量关联该积分电容器C I的电容变化量，从而可以基于该积分电容器C I的电容变化确定该待测电容器Cx的电容变化。
这里，由于该第二电流源I 2对该积分电容器C I充电的时长等于该第一电流源I 1对该待测电容器Cx充电的时长，因此使得该待测电容器Cx的电容变化量关联该积分电容器C I的电容变化量，即，该待测电容器Cx的电容变化量与该积分电容器C I的电容变化量相关，或者说，该积分电容器C I的电容变化量能够反映该待测电容器Cx的电容变化量。具体地，该积分电容器C I的电容变化量取决于其充电时长，而该积分电容器C I的充电时长又取决于该待测电容器Cx的充电时长，该待测电容器Cx的充电时长为其被充电至第一电压V R所经过的时长，在该时长内，该待测电容器Cx因充电而电容发生变化，从而该积分电容器C I的电容变化量就与该待测电容器Cx的电容变化量相关联，可以通过对该积分电容器C I的电容进行测量，来获知该待测电容器Cx的电容变化情况。
具体地，如图11所示，可以通过如下方式执行电容检测过程中的第一阶段和第二阶段：
在该第一阶段，S1和S3断开，S2和S4闭合。由于S2跨接在待测电容器Cx的两端，S4跨接在积分电容器C I的两端，从而待测电容器Cx和积分电容器C I被放电至零，即待测电容器Cx和积分电容器C I上的电荷被清零。
在该第二阶段，S2和S4关断开，S1和S3闭合。该第一电流源I 1向待测电容器Cx充电，该第二电流源I 2对积分电容器C I充电，直至该待测电容器Cx上的电压达到该第一电压V R时S1和S3断开，该第一电流源I 1停止向待测电容器Cx充电，且该第二电流源I 2停止对该积分电容器C I充电，从 而该第二电流源I 2对该积分电容器C I充电的时长，与该第一电流源I 1向待测电容器Cx充电的时长相等。通过采集该积分电容器C I的电容信号，就可以基于该积分电容器C I的电容变化量来确定该待测电容器Cx的电容变化量。
当没有手指靠近或触摸该待测电容器Cx时，测得的该积分电容器C I的电容假设为A，当手指靠近或触摸该待测电容器Cx时，测得的该积分电容器C I的电容假设为B，那么该积分电容器C I的电容变化量为A与B的差值，由于A和B的值取决于该第二电流源I 2对该积分电容器C I充电的时长，而该充电时长等于该第一电流源I 1将待测电容器Cx充电至第一电容V R所经历的时长，因此根据A与B的差值就可以判断该待测电容器Cx的电容变化量△C。
可选地，如图11所示，在上述第二阶段，在待测电容器Cx的电压V Cx等于第一电压V R时，该比较器230的该第一输出端233输出控制信号，该控制信号用于控制该第一充放电电路210中的S1断开，以结束该第二阶段中对该待测电容器Cx的充电，以及控制该第二充放电电路240中的S3断开，以结束该第二阶段中对该积分电容器C 1的充电。
情况2，该第一充放电电路210和该第二充放电电路240为RC充放电电路。
具体地，如图12所示，该电容检测电路200包括第一充放电电路210、电压产生电路220、比较器230和第二充放电电路240。
该第一充放电电路210包括第三电阻R3、第一开关S 1和第二开关S 2，该第三电阻R3的一端连接至电源V DD，该第三电阻R3的另一端通过该第一开关S 1与该待测电容器Cx的一端相连，该待测电容器Cx的另一端接地，该第二开关S 2与该待测电容器Cx并联。
该电压产生电路220包括阻值可调节的第一电阻R1和第二电阻R2，该第一电阻R1的一端连接电压源Vs，该第一电阻R1的另一端连接该第二电阻R2的一端，该第二电阻R2的另一端接地。该电压产生电路220将该第一电阻R1的分压作为该第一电压V R，并通过调整该第一电阻R1/该第二电阻R2的比值以产生电压值可变的该第一电压V R。
该比较器230包括第一输入端231、第二输入端232和第一输出端233，该第一输入端231输入待测电容器Cx的电压V Cx，该第二输入端232输入第一电压V R，该比较器230比较待测电容器Cx的电压V Cx与第一电压V R 的大小，在待测电容器Cx的电压V Cx等于第一电压V R时，该比较器230的该第一输出端233输出控制信号，该控制信号用于控制该第一充放电电路210结束该第二阶段中对该待测电容器Cx的充电。
该第二充放电电路240包括第四电阻R4、第三开关S 3和第四开关S 4，该第四电阻R4的一端连接至电源V DD，该第四电阻R4的另一端通过该第三开关S 3与该积分电容器C I的一端相连，该积分电容器C I的另一端接地，该第四开关S 4与该积分电容器C I并联。
需要说明的是，电源V DD通过该第四电阻R4对该积分电容器C I充电的时长等于电源V DD通过该第三电阻R3对该待测电容器Cx充电的时长，以使该待测电容器Cx的电容变化量关联该积分电容器C I的电容变化量，从而可以基于该积分电容器C I的电容变化确定该待测电容器Cx的电容变化。
这里，由于电源V DD通过该第四电阻R4对该积分电容器C I充电的时长等于电源V DD通过该第三电阻R3对该待测电容器Cx充电的时长，因此使得该待测电容器Cx的电容变化量关联该积分电容器C I的电容变化量，即，该待测电容器Cx的电容变化量与该积分电容器C I的电容变化量相关，或者说，该积分电容器C I的电容变化量能够反映该待测电容器Cx的电容变化量。具体地，该积分电容器C I的电容变化量取决于其充电时长，而该积分电容器C I的充电时长又取决于该待测电容器Cx的充电时长，该待测电容器Cx的充电时长为其被充电至第一电压V R所经过的时长，在该时长内，该待测电容器Cx因充电而电容发生变化，从而该积分电容器C I的电容变化量就与该待测电容器Cx的电容变化量相关联，可以通过对该积分电容器C I的电容进行测量，来获知该待测电容器Cx的电容变化情况。
具体地，如图12所示，可以通过如下方式执行电容检测过程中的第一阶段和第二阶段：
在该第一阶段，S1和S3断开，S2和S4闭合。由于S2跨接在待测电容器Cx的两端，S4跨接在积分电容器C I的两端，从而待测电容器Cx和积分电容器C I被放电至零，即待测电容器Cx和积分电容器C I上的电荷被清零。
在该第二阶段，S2和S4关断开，S1和S3闭合。电源V DD通过该第三电阻R3向待测电容器Cx充电，电源V DD通过该第四电阻R4对积分电容器C I充电，直至该待测电容器Cx上的电压达到该第一电压V R时S1和S3断开，电源V DD停止通过该第三电阻R3向待测电容器Cx充电，且电源V DD 停止通过该第四电阻R4对该积分电容器C I充电，从而对该积分电容器C I充电的时长等于对该待测电容器Cx充电的时长。通过采集该积分电容器C I的电容信号，就可以基于该积分电容器C I的电容变化量来确定该待测电容器Cx的电容变化量。
当没有手指靠近或触摸该待测电容器Cx时，测得的该积分电容器C I的电容假设为A，当手指靠近或触摸该待测电容器Cx时，测得的该积分电容器C I的电容假设为B，那么该积分电容器C I的电容变化量为A与B的差值，由于A和B的值取决于电源V DD通过该第四电阻R4对该积分电容器C I充电的时长，而该充电时长等于电源V DD通过该第三电阻R3将待测电容器Cx充电至第一电容V R所经历的时长，因此根据A与B的差值就可以判断该待测电容器Cx的电容变化量△C。
可选地，如图12所示，在上述第二阶段，在待测电容器Cx的电压V Cx等于第一电压V R时，该比较器230的该第一输出端233输出控制信号，该控制信号用于控制该第一充放电电路210中的S1断开，以结束该第二阶段中对该待测电容器Cx的充电，以及控制该第二充放电电路240中的S3断开，以结束该第二阶段中对该积分电容器C 1的充电。
需要说明的是，上述图11中的电流源(第一电流源I 1和第二电流源I 2)，以及上述图12中的电阻(第三电阻R3和第四电阻R4)可替代地也可以是电压源或者MOS管。
进一步地，在上述图11所示的情况1和上述图12所示的情况2中，可选地，该电容检测电路200可以重复执行该第一阶段和该第二阶段中的操作N次，并将这N次操作中分别得到的该积分电容器C I的N个电容值的平均值，作为该积分电容器C I的电容的实际测量值，即上述的A和B均为N次操作后得到的该积分电容器C I的N个电容值的平均值。其中，该第一电压V R在N次操作中部分或者全部不相同，且N次操作中该第一电压V R的平均值等于预设电压值。
可选地，在上述图11所示的情况1和上述图12所示的情况2中，该比较器230的第一输出端233可以连接控制模块，当该控制模块检测到该比较器230输出的控制信号(或者，输出的信号发生翻转时)，可以相应地对开关S1至S3进行控制，从而实现对待测电容器Cx和积分电容器C I的充电。
其中，该比较器230的同相输入端和反相输入端可以调换，只要能够检 测到该比较器230输出的信号状态翻转即可。
可选地，如图13所示，该电容检测电路200还包括模数转换电路(Analog to Digital Converter，ADC)250，用于将该积分电容器C I的电压信号转换为数字信号。
可选地，该电容检测电路200还包括电压缓冲器260，用于将该积分电容器C I对应的电压信号进行缓冲处理。
例如图13所示，该电压缓冲器260可以用来驱动该模数转换电路250。该电压缓冲器260的一个输入端(例如同相输入端)可以与积分电容器C I连接，其输入电压为该积分电容器C I的电压V CI，而输出端连接该模数转换电路250，从而将积分电容器C I上充电或放电得到的电压信号传递给该模数转换电路250。
可选地，如图13所示，该电容检测电路200还包括处理电路270，用于根据该积分电容器C I对应的电压信号V CI确定该待测电容器Cx的电容。
可选地，该电容检测电路200可以应用于电容传感器，这时，该待测电容器Cx为该电容传感器的传感器电容。
图14是本申请实施例的触摸检测装置300的示意性框图。如图14所示，该触摸检测装置300可以包括如图2中所示的电容检测电路200。其中，该触摸检测装置300可以根据该电容检测电路200确定的该待测电容器Cx的电容，确定用户的触摸位置。具体地，该触摸检测装置300可以根据该电容检测电路200所确定的该待测电容器Cx相对于初始电容的电容变化量△C，确定用户的触摸信息例如用户在显示屏上的触摸位置。
本申请实施例还提供了一种终端设备，包括如图14所示的触摸检测装置300。作为示例而非限定，所述终端设备可以为手机、平板电脑、笔记本电脑、台式机电脑、车载电子设备或穿戴式智能设备等。
以上所述，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本申请揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应以所述权利要求的保护范围为准。

Claims (15)

  1. 一种电容检测电路，其特征在于，包括第一充放电电路和电压产生电路，所述第一充放电电路包括待测电容器；其中，
    所述电压产生电路用于产生电压值可变的第一电压；
    所述第一充放电电路用于在第一阶段将所述待测电容器上的电荷清零，并在第二阶段基于所述第一电压的控制将所述待测电容器充电至所述第一电压。
  2. 根据权利要求1所述的电容检测电路，其特征在于，所述电容检测电路还包括比较器，所述比较器包括第一输入端、第二输入端和第一输出端，其中，
    所述第一输入端输入所述待测电容器的电压，所述第二输入端输入所述第一电压；
    在所述待测电容器的电压等于所述第一电压时，所述第一输出端输出控制信号，所述控制信号用于控制所述第一充放电电路结束所述第二阶段中对所述待测电容器的充电。
  3. 根据权利要求1或2所述的电容检测电路，其特征在于，所述电压产生电路包括阻值可调节的第一电阻和第二电阻，所述第一电阻的一端连接电压源，所述第一电阻的另一端连接所述第二电阻的一端，所述第二电阻的另一端接地，
    其中，所述电压产生电路将所述第一电阻的分压作为所述第一电压，并通过调整所述第一电阻/所述第二电阻的比值以产生电压值可变的所述第一电压。
  4. 根据权利要求1至3中任一项所述的电容检测电路，其特征在于，所述电容检测电路还包括第二充放电电路，所述第二充放电电路包括积分电容器，
    其中，所述第二充放电电路用于在所述第一阶段将所述积分电容器上的电荷清零，并在所述第二阶段对所述积分电容器充电，对所述积分电容器充电的时长等于对所述待测电容器充电的时长，以使所述待测电容器的电容变化量关联所述积分电容器的电容变化量。
  5. 根据权利要求4所述的电容检测电路，其特征在于，所述电容检测电路还包括控制器，所述控制器用于控制对所述积分电容器充电的时长等于 对所述待测电容器充电的时长。
  6. 根据权利要求4或5所述的电容检测电路，其特征在于，所述第一充放电电路和所述第二充放电电路还用于：
    执行所述第一阶段和所述第二阶段中的操作N次，并将N次操作中分别得到的所述积分电容器的N个电容值的平均值，作为所述积分电容器的电容的实际测量值。
  7. 根据权利要求6所述的电容检测电路，其特征在于，
    所述第一电压在N次操作中部分或者全部不相同，且N次操作中所述第一电压的平均值等于预设电压值。
  8. 根据权利要求7所述的电容检测电路，其特征在于，所述预设电压值根据噪声、信噪比SNR、射频接收装置的灵敏度中的至少一种确定。
  9. 根据权利要求4至8中任一项所述的电容检测电路，其特征在于，所述第一充放电电路和所述第二充放电电路为RC充放电电路或者电流源充放电电路。
  10. 根据权利要求4至9中任一项所述的电容检测电路，其特征在于，所述电容检测电路还包括模数转换电路，用于将所述积分电容器的电压信号转换为数字信号。
  11. 根据权利要求10所述的电容检测电路，其特征在于，所述电容检测电路还包括电压缓冲器，用于对所述积分电容器对应的电压信号进行缓冲处理。
  12. 根据权利要求4至11中任一项所述的电容检测电路，其特征在于，所述电容检测电路还包括处理电路，用于根据所述积分电容器对应的电压信号确定所述待测电容器的电容。
  13. 根据权利要求1至12中任一项所述的电容检测电路，其特征在于，所述电容检测电路应用于电容传感器，所述待测电容器为所述电容传感器的传感器电容。
  14. 一种触摸检测装置，其特征在于，包括：如权利要求1至13中任一项所述的电容检测电路，所述触摸检测装置根据所述电路确定的所述待测电容器的电容，确定用户的触摸信息。
  15. 一种终端设备，其特征在于，包括：如权利要求14所述的触摸检测装置。
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