WO2019242561A1 - 逆变器、发电设备以及太阳能发电系统 - Google Patents

逆变器、发电设备以及太阳能发电系统 Download PDF

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Publication number
WO2019242561A1
WO2019242561A1 PCT/CN2019/091144 CN2019091144W WO2019242561A1 WO 2019242561 A1 WO2019242561 A1 WO 2019242561A1 CN 2019091144 W CN2019091144 W CN 2019091144W WO 2019242561 A1 WO2019242561 A1 WO 2019242561A1
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Prior art keywords
circuit
voltage
inverter
isolation
transformer
Prior art date
Application number
PCT/CN2019/091144
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English (en)
French (fr)
Inventor
王恋
李松
Original Assignee
北京汉能光伏技术有限公司
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Priority claimed from CN201820970346.8U external-priority patent/CN208690941U/zh
Priority claimed from CN201810689843.5A external-priority patent/CN108649830B/zh
Application filed by 北京汉能光伏技术有限公司 filed Critical 北京汉能光伏技术有限公司
Publication of WO2019242561A1 publication Critical patent/WO2019242561A1/zh

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00—Circuit arrangements for ac mains or ac distribution networks
    • H02J3/38—Arrangements for parallely feeding a single network by two or more generators, converters or transformers
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/14—Arrangements for reducing ripples from dc input or output
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/44—Circuits or arrangements for compensating for electromagnetic interference in converters or inverters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/539—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency

Definitions

  • the embodiments of the present application relate to the field of new energy, and in particular, to an inverter, a power generation device, and a solar power generation system.
  • the grid-connected inverters used when integrating photovoltaic power generation systems into the power grid are developed based on the characteristics of crystalline silicon power generation components.
  • thin-film power generation modules and crystalline silicon power generation modules have different electrical characteristics.
  • Power generation components need to be equipped with a power-frequency isolation transformer cabinet at the AC grid-connected end of the grid-connected inverter to isolate the common-mode leakage current loop. This results in a large system, low conversion efficiency, and high total cost.
  • the instantaneous impact of the start-stop current of the equipment may frequently trigger the operation of the overcurrent protection device of the power frequency isolation transformer cabinet, increase the number of false alarms and unnecessary maintenance, and affect the user experience.
  • Inverter equipment in the current application of distributed solar power generation systems is mainly developed based on the characteristics of crystalline silicon modules.
  • the distributed solar power generation system includes a solar thin film module, a bus kit, an inverter, and a power distribution cabinet in this order.
  • this type of inverter needs to add an electrical isolation transformer at the output of the inverter to effectively suppress the common mode leakage current of the thin film module power generation system and prevent Glass-based thin-film module PID (Potential Induced Degradation) effect.
  • the electrical isolation transformer has a large volume and low conversion efficiency, which leads to a high total cost of the solar power generation system.
  • the overcurrent protection device of the electrical isolation transformer switch cabinet is triggered frequently due to the instant impact of the start and stop current of the equipment, which increases the number of false alarms and unnecessary maintenance work, which affects the user experience.
  • Embodiments of the present application provide an inverter and a power generation device for a photovoltaic power generation device, which can realize electrical isolation between an input end and an output end of the inverter.
  • the present application provides an inverter applied to photovoltaic power generation equipment.
  • the inverter includes: at least one transformer circuit, at least one isolation circuit, and an inverter circuit; each of at least one of the transformer circuits The input terminals of the transformer circuits are respectively connected to the output terminals of the corresponding thin-film solar arrays, and the output terminals of at least one of the transformer circuits are respectively connected to the input terminals of at least one of the isolation circuits; The output end of the isolation circuit is respectively connected to the input end of the inverter circuit; the output end of the inverter circuit is connected to the AC power grid; wherein at least one transformer circuit is used to convert the DC input voltage generated by the thin-film solar array into A voltage-stabilized DC bus voltage; at least one of the isolation circuits is used to isolate the input terminal voltage of the isolation circuit from the output terminal voltage of the isolation circuit; the inverter circuit is used to isolate the output of the isolation circuit The DC voltage is converted into an AC voltage of the same frequency and phase as the AC grid voltage
  • the isolation circuit includes: a first inverter unit, an isolation unit, and a second inverter unit; wherein an input terminal of the first inverter unit is connected to an input terminal of the isolation circuit, and the first inverter The output terminal of the transformer unit is connected to the output terminal of the transformer circuit; the output terminal of the isolation unit is connected to the input terminal of the second inverter unit; the output terminal of the second inverter unit is connected to the input terminal of the inverter circuit
  • the first inverter unit is configured to convert a DC bus voltage at an input end of the first inverter unit into an AC voltage and output the voltage from an output end of the first inverter unit;
  • the isolation unit For isolating the AC voltage at the input terminal of the isolation unit and the AC voltage at the output terminal of the isolation unit;
  • the second inverter unit is configured to convert the AC voltage output from the output terminal of the isolation unit into DC Voltage and output.
  • the voltage transformation circuit specifically includes a Boost circuit.
  • At least one of the transformer circuits corresponds to the at least one isolation circuit.
  • the inverter specifically includes three of the transformer circuits and three of the isolation circuits.
  • At least the first inverter unit includes two three-level half-bridges connected in parallel, wherein the input ends of the two three-level half-bridges are respectively connected to the output ends of the transformer circuits, and two of the three The output terminals of the three-level half-bridge are respectively connected to the input terminals of the isolation unit.
  • the isolation unit includes a transformer, and the primary side of the transformer includes two exciting inductors, and the same-named ends of the two exciting inductors face oppositely; the two exciting inductors are respectively in two resonance circuits, and two The three resonance circuits are respectively connected to one of the three-level half bridges to form a three-level half-bridge resonance circuit; the two three-level half-bridge resonance circuits are connected in parallel.
  • the second inverter unit includes a diode full bridge; the diode full bridge is connected to the secondary side of the transformer.
  • the secondary side of the transformer includes two secondary-side excitation inductors connected in series, and the two secondary-side excitation inductances correspond to the two primary-side excitation inductances in a one-to-one manner.
  • the isolation circuit includes:
  • a high-frequency ripple filter circuit connected to the transformer circuit and performing high-frequency ripple filtering on an output voltage of the transformer circuit
  • the high-frequency transformer is connected to the high-frequency ripple filter circuit, and isolates the voltage input by the high-frequency ripple filter circuit from the output voltage of the high-frequency transformer;
  • a rectifier circuit is connected to the high-frequency transformer and rectifies an output voltage of the high-frequency transformer into a DC voltage.
  • the high-frequency ripple filter circuit includes: a deconstruction circuit, a filter sub-circuit, a resonance circuit, a clamp circuit, a midpoint loop, and a level switching circuit;
  • the deconstruction circuit deconstructs the output power of the transformer circuit; the filter sub-circuit filters the voltage input by the transformer circuit after deconstruction; and the resonance circuit filters the voltage input by the transformer circuit after filtering Perform high-frequency resonance; the clamping circuit protects the resonance capacitor in the resonance circuit; the midpoint loop is connected to the resonance circuit to form a current loop of the midpoint voltage; the level switching circuit and the The resonance circuit is connected for level switching.
  • the transformer circuit has two or more channels
  • isolation circuits There are two or more isolation circuits
  • each transformer circuit is transmitted to the inverter circuit through the isolation circuit.
  • two or more of the isolation circuits are connected in series or parallel.
  • the isolation circuit further includes a common-mode current filter circuit
  • the common mode current filter circuit is disposed on a primary side of the high-frequency transformer.
  • the two or more isolation circuits are connected in series through a midpoint voltage point, and the common mode current filter circuit includes a first capacitor, a second capacitor, and a third capacitor;
  • One end of the first capacitor is connected to the positive bus of the isolation circuit, and the other end is grounded;
  • One end of the second capacitor is grounded, and the other end is connected to a negative bus of the isolation circuit;
  • One end of the third capacitor is connected to the midpoint voltage point, and the other end is grounded.
  • the two or more isolation circuits are connected in series to form an isolation series circuit through a midpoint voltage point;
  • the inverter further includes a bus neutral point voltage stabilization circuit, and the bus neutral point voltage stabilization circuit includes N terminals, where N is the total number of isolation circuits included in the isolation series circuit plus 1;
  • a first terminal of the N terminals is connected to a positive bus of the isolated series circuit, a second terminal is connected to a negative bus of the isolated series circuit, and other than the first terminal and the second terminal Connect a neutral voltage point to each terminal.
  • the bus neutral point voltage stabilizing circuit includes N-1 switching circuits; each of the switching circuits is respectively connected in series between the positive and negative output ports of an isolation circuit.
  • the present application provides a power generation device including at least one thin-film solar array and an inverter as provided in the first aspect above.
  • the present application provides a solar power generation system, which includes a solar cell array, a bus kit, a power distribution cabinet, and an inverter as provided in the first aspect above, which are sequentially connected.
  • the inverter provided in the present application can achieve electrical isolation between the input end and the output end of the inverter, and effectively solves the problem of PID (Potential Induced Degradation) in the prior art because the inverter does not have the electrical isolation effect. (Potential induced attenuation) effect on power generation equipment and the problem of ground leakage current, and thus no longer need to configure a power frequency isolation transformer outside the inverter. Not only reduces the size of the entire system, but also improves conversion efficiency and reduces costs. In addition, because it is no longer necessary to configure another power frequency isolation transformer, false alarms due to frequent triggering of the overcurrent protection device of the power frequency isolation transformer cabinet are also avoided, and maintenance work is reduced.
  • PID Physical Induced Degradation
  • FIG. 1 is a schematic structural diagram of a photovoltaic power generation system provided by the prior art
  • FIG. 3 is a schematic structural diagram of an inverter provided by an embodiment of an inverter of the present application.
  • FIG. 4 is a schematic structural diagram of another inverter provided by an embodiment of an inverter of the present application.
  • FIG. 5 is a schematic structural diagram of still another inverter provided by an embodiment of an inverter of the present application.
  • FIG. 6 is a schematic diagram of a basic working waveform of a resonance current and a control current when an LLC series resonance conversion circuit is used in an isolation circuit 102 in an inverter provided in the present application;
  • FIG. 7 is a schematic structural diagram of an inverter provided by an embodiment of an inverter of the present application.
  • FIG. 8 is a schematic diagram of a common mode current filter circuit provided by an embodiment of an inverter of the present application.
  • FIG. 9 is a schematic diagram of a bus neutral point voltage stabilization circuit provided by an embodiment of an inverter of the present application.
  • FIG. 10 is a schematic diagram of a boost BOOST circuit provided by an embodiment of an inverter of the present application.
  • FIG. 11 is a schematic diagram of an LLC circuit provided by an embodiment of an inverter of the present application.
  • FIG. 12 (a) is a phase A half-bridge circuit of an inverter embodiment of the present application
  • FIG. 12 (b) is a phase B half-bridge circuit
  • FIG. 12 (c) is a phase C half-bridge circuit
  • FIG. 13 is a block diagram of a solar power generation system provided by an embodiment of an inverter of the present application.
  • first and second in the specification and claims of this application are used to distinguish different objects, rather than to describe a specific order of the objects.
  • first resistor, the second resistor, and the like are used to distinguish different antennas, rather than to describe a specific order of the antennas.
  • words such as “exemplary” or “for example” are used as examples, illustrations or illustrations. Any embodiment or design described as “exemplary” or “for example” in the embodiments of the present application should not be construed as more preferred or more advantageous than other embodiments or designs. Rather, the use of the words “exemplary” or “for example” is intended to present the relevant concept in a concrete manner.
  • the meaning of “a plurality” means two or more.
  • the related technology of the DC / DC conversion circuit involved in this application is introduced:
  • the commonly used isolated DC / DC conversion circuit is usually a phase-shifted full-bridge or LLC resonant circuit.
  • Figure 2 shows a phase-shifted full-bridge DC / DC converter circuit in the related art.
  • a fixed switching frequency is sampled to perform carrier phase-shift control.
  • the soft switching of the switching tube is mainly realized through the instants when the two switching tubes are turned on and off diagonally, so that the resonant inductance in the circuit and the high-frequency resonance of the switching tube capacitance are realized, and the switching tube capacitance is used to slow the flow
  • the rate of rise of the switch tube current achieves approximately soft-switch off.
  • phase-shifted full-bridge topology The main advantage of the phase-shifted full-bridge topology is that the output filter inductor and EMI filter are easier to design when the switching frequency is fixed, but the lagging bridge arm will lose the soft switching performance under light load, resulting in a large light load circulating current. loss. Therefore, there are certain limitations in the application to solar power generation systems. Because the energy emitted by solar cells during the day is parabolic and the light load time is relatively long, the phase-shifted full-bridge topology will lose the soft switching function, increase light load loss, and reduce Weighted efficiency. In order to further improve the inherent defects of the phase-shifted full bridge, an LLC series resonant DC / DC converter circuit was introduced.
  • the following application provides an inverter and a power generation device, which are applied to photovoltaic power generation equipment, which can realize the electrical isolation between the input end and the output end of the inverter, so that there is no need to increase the AC grid connection end of the inverter.
  • PID Physical Induced Degradation, potential induced attenuation
  • ground leakage current ground leakage current
  • inverter commutation the problems of PID (Potential Induced Degradation, potential induced attenuation), ground leakage current and inverter commutation.
  • it can reduce costs and maintenance costs, reduce the size of the power generation system, save on-site installation space and construction time.
  • an embodiment of the present application provides an inverter.
  • the inverter includes at least one voltage transformation circuit 101, at least one isolation circuit 102, and an inverter circuit 103.
  • the voltage generated by different solar cell arrays may be different, so they can be connected in the inverter through multiple transformer circuits, respectively. Different solar cell arrays, so that the converted AC voltage is more stable.
  • each of the at least one transformer circuit 101 is respectively connected to an output terminal of a corresponding thin-film solar array.
  • the output terminals of at least one of the transformer circuits 101 are respectively connected to the input terminals of at least one of the isolation circuits 102 and the output terminals of at least one of the isolation circuits 102 are respectively connected to the inverter circuit 103.
  • the input end; the output end of the inverter circuit 103 is connected to the AC power grid;
  • At least one transformer circuit 101 is configured to convert a DC input voltage generated by the thin-film solar array into a voltage-stabilized DC bus voltage; at least one isolation circuit 102 is configured to convert an input terminal voltage of the isolation circuit 102 to The output voltages of the isolation circuit 102 are isolated from each other; the inverter circuit 103 is configured to convert the DC voltage output by the isolation circuit 102 into an AC voltage with the same frequency and the same phase as the AC grid voltage and merge into the AC grid .
  • At least one of the voltage transformation circuits corresponds to the at least one isolation circuit on a one-to-one basis.
  • the inverter may include three of the transformer circuits 101 and three of the isolation circuits 102.
  • the inverter includes a transformer circuit 1011, a transformer circuit 1012, and a transformer circuit 1013.
  • the inverter further includes an isolation circuit 1021, an isolation circuit 1022, an isolation circuit 1023, and an inverter circuit 103.
  • the three transformer circuits are respectively connected to corresponding thin-film solar arrays.
  • the input terminals of the transformer circuit 1011 are respectively connected to the positive electrode and the negative electrode of the thin film solar array 1
  • the input terminals of the transformer circuit 1012 are respectively connected to the positive and negative electrodes of the thin film solar array 2
  • the input terminals of the transformer circuit 1013 are respectively connected to the thin film solar Positive and negative electrodes of array 3.
  • FIG. 4 is still taken as an example.
  • the first output terminal and the second output terminal of the transformer circuit 1011 are respectively connected to the first input terminal and the second input terminal of the isolation circuit 1021, and the first output terminal of the transformer circuit 1012.
  • the second output terminal is connected to the first input terminal and the second input terminal of the isolation circuit 1022, and the first output terminal and the second output terminal of the transformer circuit 1013 are connected to the first input terminal and the second input terminal of the isolation circuit 1023.
  • the transformer circuit 101 may correspond to the isolation circuit 102 one by one, that is, each transformer circuit 101 corresponds to one isolation circuit 102, as shown in FIG. 4.
  • multiple transformer circuits 101 may correspond to the same isolation circuit 102.
  • the first output terminals of multiple transformer circuits 101 are connected to the first input terminals of one isolation circuit 102, and multiple transformer circuits are connected.
  • the second output terminal of the circuit 101 is connected to the second input terminal of the isolation circuit 102.
  • the present application may be unrestricted.
  • a DC input voltage generated by the thin-film solar array is converted into a stable DC bus voltage by a voltage transformer circuit 101.
  • the DC input voltage generated by a thin-film solar array usually ranges from 200V to 1000V.
  • the voltage is raised to 700V when the DC input voltage is less than 700V, and the voltage is not boosted when the DC input voltage is greater than 700V.
  • the DC bus voltage is stabilized in the range of 700-1000V.
  • the inverter provided in this application can well solve the problem of preventing PID, ground leakage current, and the inverter without the need to add a power frequency isolation transformer cabinet at the AC grid-connected end of the inverter. Problems with commutation. At the same time, it can reduce costs and maintenance costs, reduce the size of the power generation system, save on-site installation space and construction time.
  • the transformer circuit 101 specifically includes a boost circuit. As shown in FIG. 5, the transformer circuit 101 specifically includes a first capacitor C1, a first inductor L1, a first IGBT tube Q1, and a first diode D1. among them,
  • One end of the first capacitor C1 is connected to a first input terminal of the transformer circuit 101, and the other end of the first capacitor C1 is connected to a second input terminal of the transformer circuit 101;
  • One end of the first inductor L1 is connected to a first input end of the transformer circuit 101, and the other end is connected to a first output end of the transformer circuit 101;
  • the collector of the first IGBT tube Q1 is connected to the first output terminal of the transformer circuit 101, and the emitter of the first IGBT tube Q1 is connected to the second output terminal of the transformer circuit 101;
  • the anode of the first diode D1 is connected to the emitter of the first IGBT tube Q1, and the anode of the first diode D1 is connected to the collector of the first IGBT tube Q1.
  • the isolation circuit 102 includes: a first inverter unit, an isolation unit, and a second inverter unit; wherein:
  • An input terminal of the first inverter unit is connected to an input terminal of the isolation circuit, and an output terminal of the first inverter unit is connected to an input terminal of the isolation unit;
  • An output terminal of the isolation unit is connected to an input terminal of the second inverter unit
  • An output terminal of the second inverter unit is connected to an input terminal of the inverter circuit
  • the first inverter unit is configured to convert a DC bus voltage at an input end of the first inverter unit into an AC voltage, and output the voltage from an output end of the first inverter unit;
  • the isolation unit is configured to isolate an AC voltage at an input terminal of the isolation unit from an AC voltage at an output terminal of the isolation unit;
  • the second inverter unit is configured to convert an AC voltage output from an output end of the isolation unit into a DC voltage and output the DC voltage.
  • the isolation circuit 102 specifically includes: a first inverter unit 102a, an isolation unit 102b, and a second inverter unit 102c;
  • the output terminal of the first inverter unit 102a includes a first output terminal and a second output terminal.
  • the input terminal of the isolation unit 102b includes a first input terminal and a second input terminal.
  • the first output terminal of the first inverter unit 102a is connected.
  • the first input terminal of the isolation unit 102b and the second output terminal of the first inverter unit 102a are connected to the second input terminal of the isolation unit 102b;
  • the first input terminal of the first inverter unit 102a is connected to the first input terminal of the isolation circuit 102b, and the second input terminal of the first inverter unit 102a is connected to the second input terminal of the isolation circuit 102b.
  • the output terminal is connected to the input terminal of the isolation unit 102b;
  • the first output terminal of the isolation unit 102b is connected to the first input terminal of the second inverter unit 102c, and the second output terminal of the isolation unit 102b is connected to the second input terminal of the second inverter unit 102c;
  • the first output terminal of the second inverter unit 102c is connected to the first output terminal of the isolation circuit 102, and the second output terminal of the second inverter unit 102c is connected to the second output terminal of the isolation circuit 102;
  • the first inverter unit 102a is configured to convert the DC bus voltage between the first input terminal and the second input terminal of the first inverter unit 102a into an AC voltage and output the voltage from the output terminal of the first inverter unit 102a.
  • the isolation unit 102b is configured to isolate the AC voltage at the input terminal of the isolation unit 102b from the AC voltage at the output terminal of the isolation unit 102b;
  • the second inverter unit 102c is configured to convert the AC voltage output from the output terminal of the isolation unit 102b into a DC voltage and output the DC voltage.
  • the first inverter unit 102a specifically includes a three-level half-bridge. As shown in FIG. 5, the first inverter unit 102 a includes a second capacitor C2, a third capacitor C3, a second inductor C3, a first excitation inductance Lm1, a second excitation inductance Lm2, a second diode D2, and a third Diode D3, first MOS tube VQ1, second MOS tube VQ2, third MOS tube VQ3, and fourth MOS tube VQ4;
  • the first terminal of the second capacitor C2 is connected to the first input terminal of the first inverter unit 102a, the second terminal of the second capacitor C2 is connected to the first terminal of the third capacitor C3, and the second terminal of the third capacitor C3 is connected to the first The second input terminal of the inverter unit 102a; the second terminal of the second capacitor C2 is also connected to the first output terminal of the first inverter unit 102a;
  • the drain of the first MOS tube VQ1 is connected to the first input terminal of the first inverter unit 102a, the source of the first MOS tube VQ1 is connected to the drain of the second MOS tube VQ2, and the source of the second MOS tube VQ2 is connected to the third
  • the drain of the MOS tube VQ3, the source of the third MOS tube VQ3 is connected to the drain of the fourth MOS tube VQ4, and the source of the fourth MOS tube VQ4 is connected to the second input terminal of the first inverter unit 102a;
  • the anode of the second diode D2 is connected to the second end of the second capacitor C2, and the anode of the second diode D2 is connected to the source of the first MOS tube VQ1; the anode of the third diode D3 is connected to the third MOS tube VQ3. Source, the negative electrode of the third diode D3 is connected to the second terminal of the second capacitor C2;
  • the source of the second MOS tube VQ2 is also connected to the second output terminal of the first inverter unit 102a.
  • the first inverter unit includes two three-level half-bridges connected in parallel.
  • the input ends of the two three-level half-bridges are respectively connected to the output ends of the transformer circuits, and the output ends of the two three-level half-bridges are respectively connected to the input ends of the isolation units.
  • the output terminal of the first inverter unit 102a further includes a third output terminal
  • the input terminal of the isolation unit 102b further includes a third input terminal
  • the third output terminal of the first inverter unit 102a Connected to the third input terminal of the isolation unit 102b;
  • the first inverter unit 102a further includes a fourth diode D4, a fifth diode D5, a fifth MOS transistor VQ5, a sixth MOS transistor VQ6, a seventh MOS transistor VQ7, and an eighth MOS transistor VQ8; wherein,
  • the drain of the fifth MOS tube VQ5 is connected to the first input terminal of the first inverter unit 102a, the source of the fifth MOS tube VQ5 is connected to the drain of the sixth MOS tube VQ6, and the source of the sixth MOS tube VQ6 is connected to the seventh
  • the anode of the fourth diode D4 is connected to the source of the fifth MOS tube VQ5, the anode of the fourth diode D4 is connected to the anode of the fifth diode D5, and the anode of the fifth diode D5 is connected to the seventh MOS tube VQ7.
  • the anode of the fourth diode D4 is also connected to the third output terminal of the first inverter unit 102a.
  • the isolation unit 102b is a transformer, and the primary side of the transformer includes two excitation inductors, and the same-named ends of the two excitation inductors are opposite to each other; the two excitation inductors are respectively in two resonance circuits.
  • the two resonance circuits are respectively connected to one of the three three-level half bridges to form a three-level half-bridge resonance circuit; the two three-level half-bridge resonance circuits are connected in parallel .
  • the isolation unit 102 b includes a fourth capacitor C4, a fifth capacitor C5, a second inductor L2, a third inductor L3, and a transformer Z.
  • the primary side of the transformer Z includes a first excitation inductor Lm1. 2.
  • the second excitation inductance Lm2, and the secondary side includes a third excitation inductance Lm3, wherein the first excitation inductance Lm1 and the second excitation inductance Lm2 have opposite ends of the same name;
  • first excitation inductance Lm1 is connected to the first input end of the isolation unit 102b; the other end of the first excitation inductance Lm1 is connected to one end of the second inductance L2, and the other end of the second inductance L2 is connected to one end of the fourth capacitor C4.
  • the other end of the fourth capacitor C4 is connected to the second input end of the isolation unit 102b;
  • One end of the second excitation inductance Lm2 is connected to the first input end of the isolation unit 102b, the other end of the second excitation inductance Lm2 is connected to one end of the third inductance L3, the other end of the third inductance L3 is connected to one end of the fifth capacitor C5, and the fifth The other end of the capacitor C5 is connected to the third input end of the isolation unit 102b;
  • One end of the third excitation inductance Lm3 is connected to the first output terminal of the isolation unit 102b, and the other end of the third excitation inductance Lm3 is connected to the second output terminal of the isolation unit 102b.
  • the secondary side of the transformer includes two secondary-side excitation inductors connected in series, and the two secondary-side excitation inductances correspond to the two primary-side excitation inductances one-to-one.
  • the third excitation inductance Lm3 includes two series excitation inductances, and the two excitation inductances correspond to the first excitation inductance and the second excitation inductance one to one.
  • the second inverter unit 102c includes a diode full bridge; the diode full bridge is connected to the secondary side of the transformer. As shown in FIG. 5 in detail, the second inverter unit 102c includes a sixth diode D6, a seventh diode D7, an eighth diode D8, and a ninth diode D9. among them:
  • the first input terminal of the second inverter unit 102c is connected to the positive electrode of the sixth diode D6 and the negative electrode of the seventh diode D7, respectively, and the second input terminal of the second inverter unit 102c is connected to the eighth diode D8, respectively. And the negative electrode of the ninth diode D9.
  • the anode of the sixth diode D6 and the anode of the eighth diode D8 are connected to the first output terminal of the second inverter unit 102c.
  • the anode of the seventh diode D7 and the anode of the ninth diode D9 are connected to the second.
  • the isolation circuit in this application uses a three-level half-bridge circuit, which eliminates the output filter inductor, and uses frequency conversion control in the software.
  • the soft switching of the MOS switch is mainly achieved by controlling the on and off moments of the MOS switch on the same bridge arm, so that the resonant inductance in the circuit, the excitation inductance of the high-frequency isolation transformer, and the high-frequency resonance of the resonant capacitor, At the same time, the body diode of the MOS switching tube to be turned on is turned on in advance through the same resonance circuit, so that the soft switching judgment of the switching tube can be realized.
  • the basic working waveform of the LLC series resonant conversion circuit used in the isolation circuit 102 in the inverter provided by the present application As shown in FIG. 6, the basic working waveform of the LLC series resonant conversion circuit used in the isolation circuit 102 in the inverter provided by the present application.
  • the resonance current waveform is determined by the resonance inductance and resonance capacitance
  • the switching frequency of the switching tube is determined by the resonance inductance, the excitation inductance, and the resonance capacitance together.
  • the switching tube is switched after the resonance current drops to zero, thereby realizing a soft switch with a full load range and a full input voltage range.
  • the LLC series resonant conversion circuit has a problem that the switching frequency variation range is too large, which makes it difficult to design a high-frequency isolation transformer.
  • a voltage doubler rectification LLC series resonant conversion circuit based on hybrid modulation is used, as shown in FIG. 5.
  • two identical three-level half-bridge resonant circuits are used in parallel.
  • the driving signals on the two bridge arms are the same to ensure the same output voltage.
  • the secondary winding of the transformer is connected in series.
  • Bridge rectification because the input voltage of the primary side is the same, the secondary winding is connected in series, which is equivalent to a voltage increase of 2 times. After the voltage increase, it is very convenient to be used in the subsequent T-type three-level inverter circuit.
  • the variable frequency control can be switched to phase-shifted fixed-frequency PWM control to achieve a hybrid modulation method.
  • the isolation circuit 102 further includes a sixth capacitor C6.
  • One end of the sixth capacitor C6 is connected to the first output terminal of the second inverter unit 102c, and the other end of the sixth capacitor C6 is connected to the second output terminal of the second inverter unit 102c.
  • the inverter circuit 103 includes: a first output terminal, a second output terminal, a third output terminal, a first output terminal, a second output terminal, and a third output terminal, respectively.
  • the inverter circuit 103 specifically includes: a second IGBT tube Q2, a third IGBT tube Q3, a fourth IGBT tube Q4, a fifth IGBT tube Q5, a sixth IGBT tube Q6, and a seventh IGBT tube Q7, eighth IGBT tube Q8, ninth IGBT tube Q9, tenth IGBT tube Q10, eleventh IGBT tube Q11, twelfth IGBT tube Q12, thirteenth IGBT tube Q13, tenth diode D10, Eleventh diode D11, twelfth diode D12, thirteenth diode D13, fourteenth diode D14, fifteenth diode D15, sixteenth diode D
  • the collector of the second IGBT tube is connected to the first input terminal of the inverter module, the emitter of the second IGBT tube is connected to the collector of the third IGBT tube; the anode of the ninth diode is connected to the emitter of the second IGBT tube.
  • the negative pole of the nine diodes is connected to the collector of the second IGBT tube;
  • the emitter of the second IGBT tube is also connected to the first output terminal of the inverter module;
  • the emitter of the third IGBT tube is connected to the second input terminal of the inverter module; the anode of the tenth diode is connected to the emitter of the third IGBT tube, and the anode of the tenth diode is connected to the collector of the third IGBT tube;
  • the emitter of the fourth IGBT tube is connected to the emitter of the second IGBT tube, the collector of the fourth IGBT tube is connected to the collector of the fifth IGBT tube, and the anode of the eleventh diode is connected to the emitter of the fourth IGBT tube.
  • the anode of the eleven diodes is connected to the collector of the fourth IGBT tube; the emitter of the fifth IGBT tube is connected to the first node;
  • the collector of the sixth IGBT tube is connected to the first input terminal of the inverter module, the emitter of the sixth IGBT tube is connected to the collector of the seventh IGBT tube; the anode of the thirteenth diode is connected to the emitter of the sixth IGBT tube, The negative electrode of the thirteenth diode is connected to the collector of the sixth IGBT tube;
  • the emitter of the sixth IGBT tube is also connected to the second output terminal of the inverter module;
  • the emitter of the seventh IGBT tube is connected to the second input terminal of the inverter module; the anode of the fourteenth diode is connected to the emitter of the seventh IGBT tube, and the anode of the fourteenth diode is connected to the collector of the seventh IGBT tube. ;
  • the emitter of the eighth IGBT tube is connected to the emitter of the sixth IGBT tube.
  • the collector of the eighth IGBT tube is connected to the collector of the ninth IGBT tube.
  • the anode of the fifteenth diode is connected to the emitter of the eighth IGBT tube.
  • the negative electrode of the fifteen diode is connected to the collector of the eighth IGBT tube; the emitter of the ninth IGBT tube is connected to the first node;
  • the collector of the tenth IGBT tube is connected to the first input of the inverter module, the emitter of the tenth IGBT tube is connected to the collector of the eleventh IGBT tube; the anode of the seventeenth diode is connected to the emitter of the tenth IGBT tube.
  • the negative electrode of the seventeenth diode is connected to the collector of the tenth IGBT tube;
  • the emitter of the tenth IGBT tube is also connected to the third output terminal of the inverter module;
  • the emitter of the eleventh IGBT tube is connected to the second input terminal of the inverter module; the anode of the eighteenth diode is connected to the emitter of the eleventh IGBT tube, and the anode of the eighteenth diode is connected to the eleventh IGBT tube.
  • the emitter of the twelfth IGBT tube is connected to the emitter of the tenth IGBT tube, the collector of the twelfth IGBT tube is connected to the collector of the thirteenth IGBT tube, and the anode of the nineteenth diode is connected to the twelfth IGBT tube.
  • the emitter, the negative pole of the nineteenth diode is connected to the collector of the twelfth IGBT tube; the emitter of the thirteenth IGBT tube is connected to the first node.
  • the tenth diode is connected between the collector and the emitter of the second IGBT tube, the eleventh diode is connected between the collector and the emitter of the third IGBT tube, and the twelfth diode is connected across Connected between the collector and emitter of the fourth IGBT tube, the thirteenth diode is connected across the collector and emitter of the fifth IGBT tube, and the fourteenth diode is connected across the sixth IGBT tube Between the collector and the emitter, the fifteenth transistor is connected between the collector and the emitter of the seventh IGBT tube, and the sixteenth diode is connected between the collector and the emitter of the eighth IGBT tube.
  • the seventeenth diode is connected between the collector and the emitter of the ninth IGBT tube, the eighteenth diode is connected between the collector and the emitter of the tenth IGBT tube, and the nineteenth diode
  • the tube is connected between the collector and the emitter of the eleventh IGBT tube, the twentieth diode is connected between the collector and the emitter of the twelfth IGBT tube, and the twenty-first diode is connected across Between the collector and emitter of the thirteenth IGBT tube.
  • the inverter circuit 103 further includes a fourth inductor L4, a fifth inductor L5, a sixth inductor L6, a seventh inductor L7, an eighth inductor L8, a ninth inductor L9, a seventh capacitor C7, an eighth capacitor C8, The ninth capacitor C9. among them:
  • L4 One end of L4 is connected to the emitter of Q2, the other end of L4 is connected to one end of L5 and the first node, and the other end of L5 is connected to the first output of the inverter circuit 103, so that the emitter of Q2 is connected to the inverter through L4 and L5 The first output of the circuit.
  • L6 One end of L6 is connected to the emitter of Q6, the other end of L6 is connected to one end of L7 and the first node, and the other end of L7 is connected to the second output end of the inverter circuit 103, so that the emitter of Q2 is connected to the inverter through L6 and L7.
  • the second output of the circuit is connected to the emitter of Q6 and the first node.
  • L8 One end of L8 is connected to the emitter of Q10, the other end of L8 is connected to one end of L9 and the first node, and the other end of L9 is connected to the second output of inverter circuit 103, so that the emitter of Q10 is connected to the inverter through L8 and L9.
  • the third output of the circuit is connected to the emitter of Q10, the other end of L8 is connected to one end of L9 and the first node, and the other end of L9 is connected to the second output of inverter circuit 103, so that the emitter of Q10 is connected to the inverter through L8 and L9.
  • the inverter provided in this application may specifically include three transformer circuits and three isolation circuits; each of the three transformer circuits corresponds to one transformer circuit respectively. Isolation circuit, and the first output terminal of each of the three transformer circuits is respectively connected to the first input terminal of the corresponding isolation circuit; the second output terminal of each of the three transformer circuits Connect the second input terminals of the corresponding isolation circuits respectively.
  • the inverter provided in the present application can achieve electrical isolation between the input end and the output end of the inverter, and effectively solves the problem of PID (Potential Induced Degradation) in the prior art because the inverter does not have the electrical isolation effect. (Potential induced attenuation) effect on power generation equipment and the problem of ground leakage current, and thus no longer need to configure a power frequency isolation transformer outside the inverter. Not only reduces the size of the entire system, but also improves conversion efficiency and reduces costs. In addition, because it is no longer necessary to configure another power frequency isolation transformer, false alarms due to frequent triggering of the overcurrent protection device of the power frequency isolation transformer cabinet are also avoided, and maintenance work is reduced.
  • PID Physical Induced Degradation
  • an embodiment of the present application provides an inverter, as shown in FIG. 7,
  • the inverter includes at least one transformer circuit 101, at least one isolation circuit 102, and an inverter circuit 103.
  • the voltage generated by different solar cell arrays may be different, so they can be connected in the inverter through multiple transformer circuits, respectively. Different solar cell arrays, so that the converted AC voltage is more stable.
  • each of the at least one transformer circuit 101 is respectively connected to an output terminal of a corresponding thin-film solar array.
  • the output terminals of at least one of the transformer circuits 101 are respectively connected to the input terminals of at least one of the isolation circuits 102 and the output terminals of at least one of the isolation circuits 102 are respectively connected to the inverter circuit 103.
  • the input end; the output end of the inverter circuit 103 is connected to the AC power grid;
  • the above isolation circuit 102 may include:
  • a high-frequency ripple filter circuit 2021 is connected to the transformer circuit 101 and performs high-frequency ripple filtering on an output voltage of the transformer circuit 101;
  • the high-frequency transformer 2022 is connected to the high-frequency ripple filter circuit 2021, and isolates a voltage input by the high-frequency ripple filter circuit 2021 and an output voltage of the high-frequency transformer 2022 from each other;
  • a rectifier circuit 2023 is connected to the high-frequency transformer 2022 and rectifies an output voltage of the high-frequency transformer 2022 into a DC voltage.
  • the above-mentioned high-frequency ripple filter circuit 2021 may include: a deconstruction circuit, a filter subcircuit, a resonance circuit, a clamp circuit, a midpoint loop, and a level switching circuit;
  • the deconstruction circuit deconstructs the output power of the transformer circuit; the filter subcircuit filters the voltage input by the transformer circuit after deconstruction; the resonance circuit filters the transformer circuit after filtering The input voltage undergoes high-frequency resonance; the clamping circuit protects the resonance capacitor in the resonance circuit; the midpoint loop is connected to the resonance circuit to form a current loop of the midpoint voltage; the level switching circuit It is connected to the resonance circuit to perform level switching.
  • the switching sequence of the switching tube included in the level switching circuit is used to realize the switching of three levels of high level, low level and midpoint level.
  • the destructuring circuit includes two supporting capacitors connected in series; the filter subcircuit includes three parallel branches, one of which includes two capacitors connected in series, and the other two branches each including one capacitor; the resonant circuit includes The resonant capacitor, the resonant inductor, and the primary side of the high-frequency transformer 2022 are connected in series; the clamp circuit includes two diodes connected in series; the mid-point loop includes two diodes connected in series; the level switching circuit includes four A series of switching tubes, and each switching tube has a protective capacitor connected in parallel. The four protection capacitors included in the level switching circuit also participate in resonance.
  • the above-mentioned isolation circuit 102 may further include a common-mode current filter circuit disposed on the primary side of the high-frequency transformer to provide a loop for common-mode current and reduce common-mode leakage current on the AC side.
  • the transformer circuit 101 in the embodiment of the present application may have two or more circuits; the isolation circuit 102 may have two or more circuits; the output of each transformer circuit 101 is transmitted to the inverter circuit 103 through one isolation circuit 102 respectively.
  • the two or more isolation circuits 102 may be connected in series or parallel.
  • the common mode current filter circuit includes a first capacitor C31_1, a second capacitor C32_1, and a third capacitor C33_1, as shown in FIG. 8;
  • One end of the first capacitor C31_1 is connected to the positive bus BUS + of the isolation circuit 102, and the other end is grounded;
  • One end of the second capacitor C32_1 is grounded, and the other end is connected to the negative bus BUS- of the isolation circuit 102;
  • One end of the third capacitor C33_1 is connected to the midpoint voltage point BUS_N, and the other end is grounded.
  • the inverter may further include a bus neutral point voltage stabilization circuit, and the bus neutral point voltage stabilization circuit includes N terminals , N is the total number of isolation circuits 102 included in the isolation series circuit plus 1;
  • a first terminal of the N terminals is connected to a positive bus of the isolated series circuit, a second terminal is connected to a negative bus of the isolated series circuit, and other than the first terminal and the second terminal Connect a neutral voltage point to each terminal.
  • the bus bar neutral point voltage stabilization circuit includes N-1 switch circuits; each of the switch circuits is connected in series between the positive and negative output ports of an isolation circuit 102, respectively.
  • the switching circuit may include a triode or a CMOS transistor, but is not limited thereto, and any element that can implement the functions of the switching circuit is applicable to the embodiments of the present application.
  • FIG. 9 shows a schematic diagram of a bus neutral point voltage stabilizing circuit.
  • the bus neutral point voltage stabilizing circuit is suitable for a case where two isolation circuits 102 are connected in series through an intermediate voltage point to form an isolation series circuit.
  • the bus neutral point voltage stabilization circuit includes 3 terminals. The first terminal is connected to the positive bus BUS1 + of the isolated series circuit, the second terminal is connected to the negative bus BUS1- of the isolated series circuit, and the third terminal is connected to the midpoint voltage point. BUS1_N.
  • the bus bar midpoint voltage stabilization circuit further includes a first switch circuit and a second switch circuit. The first switch circuit includes a switch Q26, and the second switch circuit includes a switch Q27.
  • An input terminal of the first switch circuit is connected to BUS1 +, an output terminal of the first switch circuit and an input terminal of the second switch circuit are connected to a midpoint voltage point BUS1_N, and an output terminal of the second switch circuit is connected to BUS1-;
  • the first switching circuit is turned on when the difference between the midpoint voltages BUS1_N and BUS1- is lower than a preset difference between BUS1 + and the midpoint voltage BUS1_N, and the difference between the midpoint voltages BUS1_N and BUS1- is increased;
  • the second switching circuit is turned on when the difference between the midpoint voltages BUS1_N and BUS1- is higher than a preset difference between BUS1 + and the midpoint voltage BUS1_N, and the difference between the midpoint voltages BUS1_N and BUS1- is reduced.
  • the preset value may be a number close to 0, the switch Q26 is turned on, and the ( BUS1_N-BUS1-), the promoted (BUS1_N-BUS1-) is basically the same as (BUS1 + -BUS1_N); if (BUS1_N-BUS1-)-(BUS1 + -BUS1_N) is higher than the preset value, the switch Q27 is turned on and the ( BUS1_N-BUS1-), the reduced (BUS1_N-BUS1-) is basically the same as (BUS1 + -BUS1_N).
  • the transformer circuit 101 in the embodiment of the present application may be a boost BOOST circuit; the isolation circuit 102 may be an LLC circuit, and the LLC circuit refers to a resonant conversion circuit including an inductor L, a capacitor C, and a high-frequency transformer L; an inverter
  • the circuit 103 may be an I-type three-level three-phase full-bridge circuit, which includes three half-bridge circuits, namely an A-phase half-bridge circuit, a B-phase half-bridge circuit, and a C-phase half-bridge circuit.
  • the transformer circuit and the inverter circuit are connected through an isolation circuit.
  • the electrical isolation transformer in the related technology is omitted, so that Frequent triggering of the overcurrent protection device of the electrical isolation transformer switchgear due to the instantaneous impact of the start-stop current of the equipment, the number of false alarms is low, which greatly reduces unnecessary maintenance work, improves the user experience, and can effectively suppress the membrane module
  • the common mode leakage current of the power generation system prevents the PID effect of the glass-based thin film module, and it occupies a small area and low cost, and is easy to install.
  • the inverter includes:
  • the boost BOOST circuit is connected to the thin-film solar array to filter and pump the DC voltage output by the thin-film solar array;
  • the I-type three-level three-phase full-bridge circuit converts the output voltage of the LLC circuit by inverting and performs LCL filtering and common-mode filtering to output AC current.
  • boost BOOST circuits There are two above-mentioned boost BOOST circuits; there are two above-mentioned LLC circuits; the output of each boost BOOST circuit is passed to an I-type three-level three-phase full-bridge circuit through one LLC circuit, respectively.
  • FIG. 10 is a schematic diagram of a boost boost circuit in the inverter.
  • the positive output terminal of the thin-film solar array is connected to PV1 + of the boost BOOST circuit, and the negative output terminal of the thin-film solar array is connected to BUS- of the boost BOOST circuit; common mode filtering is performed on the ground through capacitor C2_1 and capacitor C1_1 to form a common ground.
  • the support capacitor is charged; the support capacitor is composed of EC1_1 and EC2_1 in series; the high-frequency ripple is filtered by capacitor C4_1, so that the ripple voltage across the DC capacitor accounts for 5% of the total bus voltage.
  • the other boost BOOST circuit topology is consistent with the boost BOOST circuit shown in FIG. 9.
  • the input and output negative poles of the two boost BOOST circuits share BUS-.
  • FIG. 11 is a schematic diagram of an LLC circuit in the inverter.
  • EC21_1 and EC22_1 are supporting capacitors. In addition to deconstructing the input power, they also absorb some high-frequency ripples; C22_1 and C23_1 perform high-frequency ripple filtering; C21_1 is a resonant capacitor that forms a resonant circuit with the resonant inductor L21_1 and the primary side of transformer T21_1 ; D21_1 and D22 together form a clamping circuit to protect the resonant capacitor. When the resonant capacitor current is large, the voltage across the resonant capacitor is also large. The voltage across the resonant capacitor is limited to the middle potential of the positive and negative buses by the clamping circuit.
  • the protection of the resonance capacitor is realized; the reverse peak voltage across the series diodes D21_1 and D22_1 is absorbed by C24_1 to protect D21_1 and D22_1; C24_1 and C25_1 are used to filter the ripple voltage; D23_1 and D24_1 are combined together
  • the current loop of the mid-point voltage; the four switching tubes are Q21_1, Q22_1, Q23_1 and Q24_1, and the three switching levels of the four switching tubes are used to achieve the switching of three levels: high level, low level and midpoint level; C26_1, C27_1, C28_1, and C29_1 are the parallel capacitors of the four switch tubes.
  • the corresponding switch tubes are also connected.
  • the topology of the other LLC circuit is completely consistent with the LLC circuit shown in FIG. 11.
  • the structure of the high-frequency ripple filter circuit 2021 according to the embodiment of the present application may be the circuit structure of the primary side of the transformer T21_1 in FIG. 11.
  • Figures 12 (a), 12 (b), and 12 (c) are the A-phase half-bridge circuit, B-phase half-bridge circuit, and C-phase included in the I-type three-level three-phase three-phase full-bridge circuit in the inverter, respectively.
  • Half-bridge circuit is the A-phase half-bridge circuit, B-phase half-bridge circuit, and C-phase included in the I-type three-level three-phase three-phase full-bridge circuit in the inverter, respectively.
  • Half-bridge circuit are the A-phase half-bridge circuit, B-phase half-bridge circuit, and C-phase included in the I-type three-level three-phase three-phase full-bridge circuit in the inverter, respectively.
  • Half-bridge circuit is the A-phase half-bridge circuit, B-phase half-bridge circuit, and C-phase included in the I-type three-level three-phase three-phase full-bridge circuit in the inverter, respectively.
  • EC31_1 and EC32_1 are supporting capacitors and have high-frequency filtering; capacitors C32_1 and C33_1 perform high-frequency filtering; diodes D33_1 and D34_1 are current paths formed by the midpoint voltage; and switches Q31_1, Q32_1, Q33_1 And Q34_1 sequentially output three levels by controlling the switch; inductor L31_1, inductor L32_1, and capacitor C39_1 together form an LCL filter circuit to filter the ripple; an LC common mode filter circuit is added to the AC output side to filter the common Mode high-frequency interference current, where L is the inductor L33_1, C is the capacitor C312_1, C310_1, C310_2, and C310_3 are the differential mode capacitors between the three phases, which filters out the high-frequency interference current of the differential mode to achieve EMC (Electro Magnetic Compatibility, electromagnetic Compatibility) Conduction certification requirements.
  • EMC Electro Magnetic Compatibility, electromagnetic Compatibility
  • the topology of the B-phase half-bridge circuit shown in FIG. 12 (b) and the C-phase half-bridge circuit shown in FIG. 12 (c) is similar to that of the A-phase half-bridge circuit shown in FIG. 12 (a), and will not be repeated here. .
  • the transformer circuit and the inverter circuit are connected through an isolation circuit.
  • the electrical isolation transformer in the related technology is omitted, so that Frequent triggering of the overcurrent protection device of the electrical isolation transformer switchgear due to the instantaneous impact of the start-stop current of the equipment, the number of false alarms is low, which greatly reduces unnecessary maintenance work, improves the user experience, and can effectively suppress the membrane module
  • the common mode leakage current of the power generation system prevents the PID effect of the glass-based thin film module, and it occupies a small area and low cost, and is easy to install.
  • An embodiment of the present application further provides a power generation device including at least one thin-film solar array and an inverter as provided above.
  • An embodiment of the present application further provides a solar power generation system. As shown in FIG. 13, the system includes:
  • Thin-film solar arrays such as the inverters mentioned above, and power distribution cabinets.
  • the transformer circuit and the inverter circuit are connected through an isolation circuit.
  • the electrical isolation transformer in the related technology is omitted, so that The instantaneous impact of the start-stop current of the equipment frequently triggers the overcurrent protection device of the electrical isolation transformer switchgear.
  • the number of false alarms is low, which greatly reduces unnecessary maintenance work, improves the user experience, and can effectively suppress the generation of thin-film modules.
  • the system common-mode leakage current prevents the PID effect of glass-based thin-film components, has a small footprint, low cost, and is easy to install.
  • the methods of the above embodiments can be implemented by means of software plus the necessary universal hardware platform. Of course, they can also be implemented by hardware, but in many cases the former is more Best implementation.
  • the technical solution of this application that is essentially or contributes to the existing technology can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, magnetic disk, The CD-ROM) includes several instructions for causing a terminal (which may be a mobile phone, a computer, a server, an air conditioner, or a network device, etc.) to execute the methods described in the embodiments of the present application.
  • a terminal which may be a mobile phone, a computer, a server, an air conditioner, or a network device, etc.

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Abstract

本申请提供一种逆变器，涉及新能源领域。本申请实施例能够实现逆变器的输入端与输出端之间的电气隔离。该逆变器包括：至少一个变压电路、至少一个隔离电路以及逆变电路；至少一个变压电路的输出端分别连接至少一个隔离电路中的一个隔离电路；至少一个隔离电路的输出端分别连接逆变电路；逆变电路的输出端连接交流电网；其中，至少一个变压电路用于将薄膜太阳能阵列产生的直流输入电压转换为电压稳定的直流母线电压；至少一个隔离电路用于将隔离电路的输入端电压与隔离电路的输出端电压相互隔离；逆变电路用于将隔离电路输出的直流电压转换为与交流电网电压同频同相的交流电压并入交流电网。本申请应用于光伏发电。

Description

逆变器、发电设备以及太阳能发电系统 技术领域
本申请的实施例涉及新能源领域，尤其涉及一种逆变器、发电设备以及太阳能发电系统。
背景技术
目前，在将光伏发电系统并入电网时所采用的并网逆变器都是基于晶体硅发电组件的特性开发的。其中，薄膜发电组件与晶体硅发电组件具有不同的电气特性，考虑到在薄膜发电组件中，出于需要进行负极接地以及隔离共模漏电流回路等问题的考虑，如图1所示，在薄膜发电组件中需要在并网逆变器的交流并网端配置工频隔离变压器柜以隔离共模漏电流回路，这就导致整个系统的体积庞大、转换效率低并且总成本也会较高。同时，在应用中还可能因设备启停电流瞬间冲击而导致频繁触发工频隔离变压器柜自身过流保护器件动作，增加故障误报警的次数和不必要的维护工作，影响用户使用体验效果。
当前分布式太阳能发电系统应用中的逆变设备主要是基于晶硅组件的特性开发的，所述分布式太阳能发电系统依次包括太阳能薄膜组件、汇流套件、逆变器、配电柜。该类型逆变器在CIGS(太阳能薄膜电池CuInxGa(1-x)Se2)薄膜系统应用中需要在逆变器的输出端增加电气隔离变压器，以达到有效抑制薄膜组件发电系统共模漏电流和防止玻璃基薄膜组件PID(Potential Induced Degradation，电势诱导衰减)效应。
但是，在上述太阳能发电系统中，电气隔离变压器，体积庞大、转换效率较低，这导致太阳能发电系统总成本居高不下。另外，在应用中经常会遇到因设备启停电流瞬间冲击而导致频繁触发电气隔离变压器开关柜自身过流保护器件动作，增加故障误报警的次数和不必要的维护工作，影响用户使用体验。
申请内容
本申请的实施例提供一种逆变器以及发电设备，用于光伏发电设备，能够实现逆变器的输入端与输出端之间的电气隔离。
第一方面，本申请提供一种逆变器，应用于光伏发电设备，该逆变器包括：至少一个变压电路、至少一个隔离电路以及逆变电路；至少一个所述变压电路中每个变压电路的输入端分别连接相应的薄膜太阳能阵列的输出端，至少一个所述变压电路的输出端分别连接至少一个所述隔离电路中的一个所述隔离电路的输入端；至少一个所述隔离电路的输出端分别连接所述逆变电路的输入端；所述逆变电路的输出端连接交流电网；其中，至少一个变压电路用于将所述薄膜太阳能阵列产生的直流输入电压转换为电压稳定的直流母线电压；至少一个所述隔离电路用于将所述隔离电路的输入端电压与所述隔离电路的输出端电压相互隔离；所述逆变电路用于将所述隔离电路输出的直流电压转换为与所述交流电网电压同频同相的交流电压并入所述交流电网。
可选的，所述隔离电路包括：第一逆变单元、隔离单元以及第二逆变单元；其中所述第一逆变单元的输入端连接所述隔离电路的输入端，所述第一逆变单元的输出端连接变压电路的输出端；所述隔离单元的输出端连接所述第二逆变单元的输入端；所述第二逆变单元的输出端连接至逆变电路的输入端；其中，所述第一逆变单元，用于将所述第一逆变单元的输入端的直流母线电压转换为交流电压，并从所述第一逆变单元的输出端输出；所述隔离单元，用于将所述隔离单元的输入端的交流电压与所述隔离单元的输出端的交流电压相互隔离；所述第二逆变单元，用于将所述隔离单元输出端输出的交流电压转换成直流电压并输出。
可选的，所述变压电路具体包括Boost电路。
可选的，至少一个所述变压电路与所述至少一个隔离电路一一对应。
可选的，所述逆变器具体包括三个所述变压电路以及三个所述隔离电路。
可选的，至少第一逆变单元包括两个并联的三电平半桥；其中，两个所述三电平半桥的输入端分别连接所述变压电路的输出端，两个所述三电平半桥的输出端分别连接所述隔离单元的输入端。
可选的，所述隔离单元包括变压器，所述变压器的原边包括两个激磁电感，所述两个激磁电感的同名端朝向相反；所述两个激磁电感分别在两个谐振电路中，两个所述谐振电路分别与两个所述三电平半桥中的一个所述三电平半桥连接形成三电平半桥谐振电路；两个所述三电平半桥谐振电路并联。
可选的，第二逆变单元包括二极管全桥；所述二极管全桥与所述变压器的副边连接。
可选的，所述变压器的副边包括两个串联的副边激磁电感，两所述副边激磁电感与两所述原边激磁电感一一对应。
可选的，所述隔离电路包括：
高频纹波滤波电路，与所述变压电路连接，对所述变压电路的输出电压进行高频纹波滤波；
高频变压器，与所述高频纹波滤波电路连接，将所述高频纹波滤波电路输入的电压与所述高频变压器的输出电压相互隔离；
整流电路，与所述高频变压器连接，将所述高频变压器的输出电压整流成直流电压。
可选的，所述高频纹波滤波电路包括：解构电路、滤波子电路、谐振电路、钳位电路、中点回路及电平切换电路；
所述解构电路对所述变压电路的输出功率进行解构；所述滤波子电路对解构后所述变压电路输入的电压进行滤波；所述谐振电路对滤波后所述变压电路输入的电压进行高频谐振；所述钳位电路对所述谐振电路中的谐振电容进行保护；所述中点回路与所述谐振电路连接，组成中点电压的电流回路；所述电平切换电路与所述谐振电路连接进行电平切换。
可选的，其特征在于，
所述变压电路有两路或多路；
所述隔离电路有两路或多路；
每一路所述变压电路的输出分别通过一路所述隔离电路传递给所述 逆变电路。
可选的，两路或多路所述隔离电路通过串联或并联的方式连接。
可选的，所述隔离电路还包括共模电流滤波电路；
所述共模电流滤波电路设置在所述高频变压器的原边侧。
可选的，所述两路或多路隔离电路通过中点电压点串联，所述共模电流滤波电路包括第一电容、第二电容和第三电容；
所述第一电容的一端与所述隔离电路的正极总线连接，另一端接地；
所述第二电容的一端接地，另一端与所述隔离电路的负极总线连接；
所述第三电容的一端与所述中点电压点连接，另一端接地。
可选的，所述两路或多路隔离电路通过中点电压点串联成隔离串联电路；
所述逆变器还包括母线中点稳压电路，所述母线中点稳压电路包括N个端子，N为所述隔离串联电路包括的隔离电路的总数加1；
所述N个端子中的第一端子与所述隔离串联电路的正极总线连接，第二端子与所述隔离串联电路的负极总线连接，除所述第一端子和所述第二端子外的其他每个端子分别连接一个中点电压点。
可选的，所述母线中点稳压电路包括N-1个开关电路；每个所述开关电路分别串联于一路隔离电路的正负极输出端口之间。
第二方面，本申请提供一种发电设备，包括：至少一个薄膜太阳能阵列以及如上述第一方面所提供的逆变器。
第三方面，本申请提供一种太阳能发电系统，所述系统包括依次连接的太阳能电池阵列、汇流套件、配电柜以及如上述第一方面所提供的逆变器。
本申请所提供的逆变器能够实现逆变器的输入端与输出端之间的电气隔离，有效解决了现有技术中由于逆变器不具备电气隔离效果，从而所产生PID(Potential Induced Degradation，电势诱导衰减)效应对发电设备的危害以及对地漏电流的问题，进而不再需要在逆变器之外另外配 置工频隔离变压器。不仅缩小了整个系统的体积，还提高了转换效率、降低成本。另外，由于不再需要另外配置工频隔离变压器，也避免了由于工频隔离变压器柜自身过流保护器件的频繁触发而出现的误报警的情况，减少了维护工作。
附图说明
为了更清楚地说明本申请实施例的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为现有技术提供的一种光伏发电系统的结构示意图；
图2为本申请逆变器的实施例提供的一种移相全桥DC/DC变换电路；
图3为本申请逆变器的实施例提供的一种逆变器的结构示意图；
图4为本申请逆变器的实施例提供的另一种逆变器的结构示意图；
图5为本申请逆变器的实施例提供的又一种逆变器的结构示意图；
图6为本申请所提供的逆变器中隔离电路102所采用LLC串联谐振变换电路时谐振电流与控制电流的基本工作波形示意图；
图7为本申请逆变器的实施例提供的逆变器的组成示意图；
图8为本申请逆变器的实施例提供的共模电流滤波电路示意图；
图9为本申请逆变器的实施例提供的母线中点稳压电路的示意图；
图10为本申请逆变器的实施例提供的一路升压BOOST电路示意图；
图11为本申请逆变器的实施例提供的一路LLC电路示意图；
图12(a)为本申请逆变器的实施例A相半桥电路、图12(b)为B相半桥电路，图12(c)为C相半桥电路；
图13为本申请逆变器的实施例提供的太阳能发电系统组成模块图。
具体实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
本申请的说明书和权利要求书中的术语“第一”和“第二”等是用于区别不同的对象，而不是用于描述对象的特定顺序。例如，第一电阻和第二电阻等是用于区别不同的天线，而不是用于描述天线的特定顺序。
在本申请实施例中，“示例性的”或者“例如”等词用于表示作例子、例证或说明。本申请实施例中被描述为“示例性的”或者“例如”的任何实施例或设计方案不应被解释为比其它实施例或设计方案更优选或更具优势。确切而言，使用“示例性的”或者“例如”等词旨在以具体方式呈现相关概念。此外，在本申请实施例的描述中，除非另有说明，“多个”的含义是指两个或两个以上。
首先，介绍本申请中所涉及的关于DC/DC变换电路的相关技术：目前，常用的隔离型DC/DC变换电路通常为移相全桥或LLC谐振电路。如图2所示为相关技术中的一种移相全桥DC/DC变换电路，该电路中采样固定的开关频率，进行载波移相控制。主要通过对角两个开关管的开通与关断瞬间，使电路中的谐振电感和开关管结电容的高频谐振来实现开关管的软开关开通，同时通过开关管结电容来减慢流过开关管电流的上升率而实现近似软开关关断。
移相全桥拓扑的主要优点是开关频率固定情况下，输出滤波电感、及EMI滤波器等较容易设计，但是在轻载下滞后桥臂会失去软开关性能，而导致较大的轻载环流损耗。因而，应用于太阳能发电系统会有一定的限制，由于太阳能电池白天发出的能量呈抛物线状，轻载时间相对较长，因而移相全桥拓扑将丢失软开关功能、增大轻载损耗、降低了加权效率。为了进一步改进移相全桥存在的内在缺陷，引入了LLC串联谐振DC/DC变换电路。
以下本申请提供一种逆变器以及发电设备，应用于光伏发电设备中，能够实现逆变器的输入端与输出端之间的电气隔离，从而不需要在逆变器的交流并网端增加工频隔离变压器柜的情况下，也能够良好的解决PID(Potential Induced Degradation，电势诱导衰减)问题、对地漏电流以及逆变器的换流问题。同时还能降低成本和维护费用，缩小了发电系统的体积、节省现场安装空间以及施工时间。
为了实现上述技术效果，本申请的实施例提供一种逆变器，如图3所示，逆变器包括至少一个变压电路101、至少一个隔离电路102、逆变电路103。
在一种实现方式中，考虑到由于太阳能电池阵列的放置朝向可能存在差异，不同的太阳能电池阵列所产生的电压可能会有所不同，因此可以在逆变器中通过多个变压电路分别连接不同的太阳能电池阵列，从而使转换的交流电压更加平稳。
其中，至少一个变压电路101中的每个变压电路的输入端分别连接对应的薄膜太阳能阵列的输出端。至少一个所述变压电路101的输出端分别连接至少一个所述隔离电路102中的一个所述隔离电路102的输入端；至少一个所述隔离电路102的输出端分别连接所述逆变电路103的输入端；所述逆变电路103的输出端连接交流电网；
其中，至少一个变压电路101用于将所述薄膜太阳能阵列产生的直流输入电压转换为电压稳定的直流母线电压；至少一个所述隔离电路102用于将所述隔离电路102的输入端电压与所述隔离电路102的输出端电压相互隔离；所述逆变电路103用于将所述隔离电路102输出的直流电压转换为与所述交流电网电压同频同相的交流电压并入所述交流电网。
在一种实施例中，至少一个所述变压电路与所述至少一个隔离电路一一对应。
其中逆变器中可以包括三个所述变压电路101以及三个所述隔离电路102。
示例性的，具体如图4所示，逆变器包括变压电路1011、变压电路1012以及变压电路1013。逆变器还包括隔离电路1021、隔离电路1022、 隔离电路1023，以及逆变电路103。其中，三个变压电路分别与对应的薄膜太阳能阵列连接。具体的，变压电路1011的输入端分别连接薄膜太阳能阵列1的正极和负极，变压电路1012的输入端分别连接薄膜太阳能阵列2的正极和负极，变压电路1013的输入端分别连接薄膜太阳能阵列3的正极和负极。
具体的，仍以图4为例，其中变压电路1011的第一输出端和第二输出端分别连接隔离电路1021的第一输入端和第二输入端，变压电路1012的第一输出端和第二输出端连接隔离电路1022的第一输入端和第二输入端，变压电路1013的第一输出端和第二输出端连接隔离电路1023的第一输入端和第二输入端。
需要说明的是，本申请中，变压电路101可以与隔离电路102一一对应，即每个变压电路101对应一个隔离电路102，如图4中所示。另外，也可以多个变压电路101对应同一个隔离电路102，例如，将多个变压电路101的第一输出端都与一个隔离电路102的第一输入端连接，并将多个变压电路101的第二输出端都与该隔离电路102的第二输入端连接。对此，本申请可以不作限制。
本申请所提供的逆变器中，首先通过变压电路101将薄膜太阳能阵列产生的直流输入电压变换为稳定的直流母线电压。例如，通常薄膜太阳能阵列产生的直流输入电压的范围为200V-1000V，通过变压电路，当直流输入电压小于700V时将电压升至700V，当直流输入电压大于700V时则不对电压进行升压，进而将直流母线电压稳定在700-1000V的范围内。进一步，在变压电路101将直流母线电压稳定在700-1000V的范围内后，通过隔离电路102将隔离电路102的输入端电压与隔离电路102的输出端电压相互隔离，进而实现隔离共模漏电流的效果。之后，再经过逆变电路103对隔离电路102输出的直流电压转换为与交流电网电压同频同相的交流电压，并入交流电网。最终本申请所提供的逆变器，能够在不需要在逆变器的交流并网端增加工频隔离变压器柜的情况下，也能够良好的解决防PID问题、对地漏电流以及逆变器的换流问题。同时还能降低成本和维护费用，缩小了发电系统的体积、节省现场安装空间以及施工时间。
在一种实现方式中，本申请所提供的逆变器中，变压电路101具体包括Boost电路。如图5所示，变压电路101具体包括第一电容C1、第一电感L1、第一IGBT管Q1、第一二极管D1。其中，
第一电容C1的一端连接变压电路101的第一输入端，第一电容C1的另一端连接变压电路101的第二输入端；
第一电感L1的一端连接变压电路101的第一输入端，另一端连接变压电路101的第一输出端；
第一IGBT管Q1的集电极连接变压电路101的第一输出端，第一IGBT管Q1的发射极连接变压电路101的第二输出端；
第一二极管D1的正极连接第一IGBT管Q1的发射极，第一二极管D1的负极连接第一IGBT管Q1的集电极。
在一种实施例中，隔离电路102包括：第一逆变单元、隔离单元以及第二逆变单元；其中：
第一逆变单元的输入端连接所述隔离电路的输入端，所述第一逆变单元的输出端连接所述隔离单元的输入端；
所述隔离单元的输出端连接所述第二逆变单元的输入端；
所述第二逆变单元的输出端连接至所述逆变电路的输入端；
其中，所述第一逆变单元，用于将所述第一逆变单元的输入端的直流母线电压转换为交流电压，并从所述第一逆变单元的输出端输出；
所述隔离单元，用于将所述隔离单元的输入端的交流电压与所述隔离单元的输出端的交流电压相互隔离；
所述第二逆变单元，用于将所述隔离单元输出端输出的交流电压转换成直流电压并输出。
示例性的，如图5所示，隔离电路102，具体包括：第一逆变单元102a、隔离单元102b以及第二逆变单元102c；
其中第一逆变单元102a的输出端包括第一输出端和第二输出端，隔离单元102b的输入端包括第一输入端和第二输入端，第一逆变单元102a的第一输出端连接隔离单元102b的第一输入端，第一逆变单元102a的 第二输出端连接隔离单元102b的第二输入端；
其中第一逆变单元102a的第一输入端连接隔离电路102b的第一输入端，第一逆变单元102a的第二输入端连接隔离电路102b的第二输入端，第一逆变单元102a的输出端连接隔离单元102b的输入端；
隔离单元102b的第一输出端连接第二逆变单元102c的第一输入端，隔离单元102b的第二输出端连接第二逆变单元102c的第二输入端；
第二逆变单元102c的第一输出端连接至隔离电路102的第一输出端，第二逆变单元102c的第二输出端连接隔离电路102的第二输出端；
其中，第一逆变单元102a，用于将第一逆变单元102a的第一输入端与第二输入端之间的直流母线电压转换为交流电压，并从第一逆变单元102a的输出端输出；
隔离单元102b，用于将隔离单元102b的输入端的交流电压与隔离单元102b的输出端的交流电压相互隔离；
第二逆变单元102c，用于将隔离单元102b输出端输出的交流电压转换成直流电压并输出。
第一逆变单元102a，具体包括三电平半桥。如图5所示，第一逆变单元102a包括：第二电容C2、第三电容C3、第二电感C3、第一激磁电感Lm1、第二激磁电感Lm2、第二二极管D2、第三二极管D3、第一MOS管VQ1、第二MOS管VQ2、第三MOS管VQ3、第四MOS管VQ4；
第二电容C2的第一端连接第一逆变单元102a的第一输入端，第二电容C2的第二端连接第三电容C3的第一端，第三电容C3的第二端连接第一逆变单元102a的第二输入端；第二电容C2的第二端还连接第一逆变单元102a的第一输出端；
第一MOS管VQ1的漏极连接第一逆变单元102a的第一输入端，第一MOS管VQ1的源极连接第二MOS管VQ2的漏极，第二MOS管VQ2的源极连接第三MOS管VQ3的漏极，第三MOS管VQ3的源极连接第四MOS管VQ4的漏极，第四MOS管VQ4的源极连接第一逆变单元102a的第二输入端；
第二二极管D2的正极连接第二电容C2的第二端，第二二极管D2的负极连接第一MOS管VQ1的源极；第三二极管D3的正极连接第三MOS管VQ3的源极，第三二极管D 3的负极连接第二电容C 2的第二端；
第二MOS管VQ2的源极还连接第一逆变单元102a的第二输出端。
另外，在一种实现方式中，第一逆变单元包括两个并联的三电平半桥。其中，两个所述三电平半桥的输入端分别连接所述变压电路的输出端，两个所述三电平半桥的输出端分别连接所述隔离单元的输入端。
示例性的，如图5所示，第一逆变单元102a的输出端还包括第三输出端，隔离单元102b的输入端还包括第三输入端，第一逆变单元102a的第三输出端连接隔离单元102b的第三输入端；
第一逆变单元102a，还包括：第四二极管D4、第五二极管D5、第五MOS管VQ5、第六MOS管VQ6、第七MOS管VQ7以及第八MOS管VQ8；其中，
第五MOS管VQ5的漏极连接第一逆变单元102a的第一输入端，第五MOS管VQ5的源极连接第六MOS管VQ6的漏极，第六MOS管VQ6的源极连接第七MOS管VQ7的漏极，第七MOS管VQ7的源极连接第八MOS管VQ8的漏极，第八MOS管VQ8的源极连接第一逆变单元102a的第二输入端；
第四二极管D4的负极连接第五MOS管VQ5的源极，第四二极管D4的正极连接第五二极管D5的负极，第五二极管D5的正极连接第七MOS管VQ7的源极；第四二极管D4的正极还连接第一逆变单元102a的第三输出端。
在一种实现方式中，隔离单元102b，变压器，所述变压器的原边包括两个激磁电感，所述两个激磁电感的同名端朝向相反；所述两个激磁电感分别在两个谐振电路中，两个所述谐振电路分别与两个所述三电平半桥中的一个所述三电平半桥连接形成三电平半桥谐振电路；两个所述三电平半桥谐振电路并联。
示例性的，如图5所示，隔离单元102b包括：第四电容C4、第五电容C5、第二电感L2、第三电感L3以及变压器Z；其中变压器Z的原 边包括第一激磁电感Lm1、第二激磁电感Lm2，副边包括第三激磁电感Lm3，其中第一激磁电感Lm1和第二激磁电感Lm2同名端的朝向相反；
其中，第一激磁电感Lm1的一端连接隔离单元102b的第一输入端；第一激磁电感Lm1的另一端连接第二电感L2的一端，第二电感L2的另一端连接第四电容C4的一端，第四电容C4的另一端连接隔离单元102b的第二输入端；
第二激磁电感Lm2的一端连接隔离单元102b的第一输入端，第二激磁电感Lm2的另一端连接第三电感L3的一端，第三电感L3的另一端连接第五电容C5的一端，第五电容C5的另一端连接隔离单元102b的第三输入端；
第三激磁电感Lm3的一端连接隔离单元102b的第一输出端，第三激磁电感Lm3的另一端连接隔离单元102b的第二输出端。
另外，在一种实现方式中，变压器的副边包括两个串联的副边激磁电感，两个所述副边激磁电感与两所述原边激磁电感一一对应。具体如图5所示，第三激磁电感Lm3包括两个串联的激磁电感，这两个激磁电感与第一激磁电感、第二激磁电感一一对应。
进一步的，在一种实现方式中，第二逆变单元102c包括二极管全桥；所述二极管全桥与所述变压器的副边连接。具体如图5所示，第二逆变单元102c，包括：第六二极管D6、第七二极管D7、第八二极管D8、第九二极管D9。其中：
第二逆变单元102c的第一输入端分别连接第六二极管D6的正极以及第七二极管D7的负极，第二逆变单元102c的第二输入端分别连接第八二极管D8的正极以及第九二极管D9的负极。
第六二极管D6的负极以及第八二极管D8的负极连接第二逆变单元102c的第一输出端，第七二极管D7的正极以及第九二极管D9的正极连接第二逆变单元102c的第二输出端。
具体的，本申请中的隔离电路采用三电平半桥电路，取消输出滤波电感，软件上采用变频控制。主要通过控制同一桥臂上的MOS开关管的开通与关断瞬间，使电路中的谐振电感、高频隔离变压器的激磁电感、 和谐振电容的高频谐振来实现MOS开关管的软开关开通，同时通过相同的谐振电路实现将要开通MOS开关管的体二极管预先导通，从而可以实现开关管的软开关判断。通过合理选择开关频率与谐振频率的关系，不但可以实现全负载范围、全输入电压范围的软开关管，同时也可消除输出整流二极管反向恢复损耗。
如图6所示，为本申请所提供的逆变器中隔离电路102所采用LLC串联谐振变换电路的基本工作波形。其中，谐振电流波形是由谐振电感和谐振电容决定，而开关管的开关频率由谐振电感、激磁电感以及谐振电容共同决定。由图中可知，在谐振电流降至零点后再对开关管进行切换，从而实现了全负载范围、全输入电压范围的软开关。
进一步，本申请中，考虑到由于LLC串联谐振变换电路存在开关频率变化范围过大的问题，这样不便于设计高频隔离变压器。为了改进LLC串联谐振变换电路的内在缺陷，并进一步提高变换电路的转换效率，本申请中，采用基于混合调制的倍压整流LLC串联谐振变换电路，如图5所示。在变压器的原边采用两个相同的三电平半桥谐振电路并联，两个桥臂上的驱动信号相同，保证输出的电压相同；变压器副边绕组串联，将电压提升后，再经过二极管全桥整流，由于原边的输入电压相同，所以副边绕组串联，相当于电压提升2倍。电压提升后非常方便的用于后级T型三电平逆变电路。直流输入电压较低、或轻载时，在开关频率高于限定值的情况下，可以把变频控制改用移相定频PWM控制，从而实现混合调制方式。
在一种实现方式中，如图5所示，隔离电路102还包括第六电容C6。其中：第六电容C6的一端连接第二逆变单元102c的第一输出端，第六电容C6的另一端连接第二逆变单元102c的第二输出端。
在一种实现方式中，如图5所示，逆变电路103，包括：第一输出端、第二输出端、第三输出端，第一输出端、第二输出端、第三输出端分别与交流电网的三相电源线连接；逆变电路103，具体包括：第二IGBT管Q2、第三IGBT管Q3、第四IGBT管Q4、第五IGBT管Q5、第六IGBT管Q6、第七IGBT管Q7、第八IGBT管Q8、第九IGBT管Q9、第十IGBT管Q10、第十一IGBT管Q11、第十二IGBT管Q12、第十三IGBT管Q13、 第十二极管D10、第十一二极管D11、第十二二极管D12、第十三二极管D13、第十四二极管D14、第十五二极管D15、第十六二极管D16、第十七二极管D17、第十八二极管D18、第十九二极管D19、第二十二极管D20、第二十一二极管D21；其中，
第二IGBT管的集电极连接逆变模块的第一输入端，第二IGBT管的发射极连接第三IGBT管的集电极；第九二极管的正极连接第二IGBT管的发射极，第九二极管的负极连接第二IGBT管的集电极；
第二IGBT管的发射极还连接逆变模块的第一输出端；
第三IGBT管的发射极连接逆变模块的第二输入端；第十二极管的正极连接第三IGBT管的发射极，第十二极管的负极连接第三IGBT管的集电极；
第四IGBT管的发射极连接第二IGBT管的发射极，第四IGBT管的集电极连接第五IGBT管的集电极，第十一二极管的正极连接第四IGBT管的发射极，第十一二极管的负极连接第四IGBT管的集电极；第五IGBT管的发射极连接第一节点；
第六IGBT管的集电极连接逆变模块的第一输入端，第六IGBT管的发射极连接第七IGBT管的集电极；第十三二极管的正极连接第六IGBT管的发射极，第十三二极管的负极连接第六IGBT管的集电极；
第六IGBT管的发射极还连接逆变模块的第二输出端；
第七IGBT管的发射极连接逆变模块的第二输入端；第十四二极管的正极连接第七IGBT管的发射极，第十四二极管的负极连接第七IGBT管的集电极；
第八IGBT管的发射极连接第六IGBT管的发射极，第八IGBT管的集电极连接第九IGBT管的集电极，第十五二极管的正极连接第八IGBT管的发射极，第十五二极管的负极连接第八IGBT管的集电极；第九IGBT管的发射极连接第一节点；
第十IGBT管的集电极连接逆变模块的第一输入端，第十IGBT管的发射极连接第十一IGBT管的集电极；第十七二极管的正极连接第十IGBT管的发射极，第十七二极管的负极连接第十IGBT管的集电极；
第十IGBT管的发射极还连接逆变模块的第三输出端；
第十一IGBT管的发射极连接逆变模块的第二输入端；第十八二极管的正极连接第十一IGBT管的发射极，第十八二极管的负极连接第十一IGBT管的集电极；
第十二IGBT管的发射极连接第十IGBT管的发射极，第十二IGBT管的集电极连接第十三IGBT管的集电极，第十九二极管的正极连接第十二IGBT管的发射极，第十九二极管的负极连接第十二IGBT管的集电极；第十三IGBT管的发射极连接第一节点。
第十二极管跨接在第二IGBT管的集电极和发射极之间，第十一二极管跨接在第三IGBT管的集电极和发射极之间，第十二二极管跨接在第四IGBT管的集电极和发射极之间，第十三二极管跨接在第五IGBT管的集电极和发射极之间，第十四二极管跨接在第六IGBT管的集电极和发射极之间，第十五极管跨接在第七IGBT管的集电极和发射极之间，第十六二极管跨接在第八IGBT管的集电极和发射极之间，第十七极管跨接在第九IGBT管的集电极和发射极之间，第十八二极管跨接在第十IGBT管的集电极和发射极之间，第十九二极管跨接在第十一IGBT管的集电极和发射极之间，第二十二极管跨接在第十二IGBT管的集电极和发射极之间，第二十一二极管跨接在第十三IGBT管的集电极和发射极之间。
进一步的，逆变电路103还包括：第四电感L4、第五电感L5、第六电感L6、第七电感L7、第八电感L8、第九电感L9、第七电容C7、第八电容C8、第九电容C9。其中：
L4的一端连接Q2的发射极，L4的另一端连接L5的一端以及第一节点，L5的另一端连接逆变电路103的第一输出端，以便Q2的发射极通过L4、L5连接至逆变电路的第一输出端。
L6的一端连接Q6的发射极，L6的另一端连接L7的一端以及第一节点，L7的另一端连接逆变电路103的第二输出端，以便Q2的发射极通过L6、L7连接至逆变电路的第二输出端。
L8的一端连接Q10的发射极，L8的另一端连接L9的一端以及第一节点，L9的另一端连接逆变电路103的第二输出端，以便Q10的发射极 通过L8、L9连接至逆变电路的第三输出端。
另外，如图4-5所示，本申请所提供的逆变器中具体可以包括三个变压电路以及三个隔离电路；其中，三个变压电路中的每个变压电路分别对应一个隔离电路，并且三个变压电路中的每个变压电路的第一输出端分别连接对应的隔离电路的第一输入端；三个变压电路中的每个变压电路的第二输出端分别连接对应的隔离电路的第二输入端。
本申请所提供的逆变器能够实现逆变器的输入端与输出端之间的电气隔离，有效解决了现有技术中由于逆变器不具备电气隔离效果，从而所产生PID(Potential Induced Degradation，电势诱导衰减)效应对发电设备的危害以及对地漏电流的问题，进而不再需要在逆变器之外另外配置工频隔离变压器。不仅缩小了整个系统的体积，还提高了转换效率、降低成本。另外，由于不再需要另外配置工频隔离变压器，也避免了由于工频隔离变压器柜自身过流保护器件的频繁触发而出现的误报警的情况，减少了维护工作。
在另一种实施例中，本申请实施例提供了一种逆变器，如图7所示，
所述逆变器包括至少一个变压电路101、至少一个隔离电路102、逆变电路103。
在一种实现方式中，考虑到由于太阳能电池阵列的放置朝向可能存在差异，不同的太阳能电池阵列所产生的电压可能会有所不同，因此可以在逆变器中通过多个变压电路分别连接不同的太阳能电池阵列，从而使转换的交流电压更加平稳。
其中，至少一个变压电路101中的每个变压电路的输入端分别连接对应的薄膜太阳能阵列的输出端。至少一个所述变压电路101的输出端分别连接至少一个所述隔离电路102中的一个所述隔离电路102的输入端；至少一个所述隔离电路102的输出端分别连接所述逆变电路103的输入端；所述逆变电路103的输出端连接交流电网；
上述隔离电路102可以包括：
高频纹波滤波电路2021，与所述变压电路101连接，对所述变压电路101的输出电压进行高频纹波滤波；
高频变压器2022，与所述高频纹波滤波电路2021连接，将所述高频纹波滤波电路2021输入的电压与所述高频变压器2022的输出电压相互隔离；
整流电路2023，与所述高频变压器2022连接，将所述高频变压器2022的输出电压整流成直流电压。
上述高频纹波滤波电路2021可以包括：解构电路、滤波子电路、谐振电路、钳位电路、中点回路及电平切换电路；
所述解构电路，对所述变压电路的输出功率进行解构；所述滤波子电路，对解构后所述变压电路输入的电压进行滤波；所述谐振电路，对滤波后所述变压电路输入的电压进行高频谐振；所述钳位电路，对所述谐振电路中的谐振电容进行保护；所述中点回路与谐振电路连接，组成中点电压的电流回路；所述电平切换电路与谐振电路连接，进行电平切换，通过电平切换电路包含的开关管的开关顺序实现高电平、低电平和中点电平三种电平的切换。
所述解构电路包括两个串联的支撑电容；所述滤波子电路包括三个并联支路，其中一个支路包含两个串联的电容，另外两个支路各含有一个电容；所述谐振电路包括依次串联的谐振电容、谐振电感及所述高频变压器的2022的原边；所述钳位电路包括两个串联的二极管；中点回路包括两个串联的二极管；电平切换电路包括四个依次串联的开关管，且每个开关管分别并联一个保护电容。其中电平切换电路包含的四个保护电容还参与谐振。
在其他可选实施例中，上述隔离电路102还可以包括设置在所述高频变压器原边侧的共模电流滤波电路，为共模电流提供回路以及减少交流侧共模漏电流。
本申请实施例的变压电路101可以有两路或多路；隔离电路102可以有两路或多路；每一路变压电路101的输出分别通过一路隔离电路102传递给逆变电路103。
所述两路或多路隔离电路102可以通过串联或并联的方式连接。
当所述两路或多路隔离电路102通过中点电压点串联时，所述共模 电流滤波电路包括第一电容C31_1、第二电容C32_1和第三电容C33_1，如图8所示；
所述第一电容C31_1的一端与所述隔离电路102的正极总线BUS+连接，另一端接地；
所述第二电容C32_1的一端接地，另一端与所述隔离电路102的负极总线BUS-连接；
所述第三电容C33_1的一端与所述中点电压点BUS_N连接，另一端接地。
当所述两路或多路隔离电路102通过中点电压点串联成隔离串联电路时，所述逆变器还可以包括母线中点稳压电路，所述母线中点稳压电路包括N个端子，N为所述隔离串联电路包括的隔离电路102的总数加1；
所述N个端子中的第一端子与所述隔离串联电路的正极总线连接，第二端子与所述隔离串联电路的负极总线连接，除所述第一端子和所述第二端子外的其他每个端子分别连接一个中点电压点。
可选的，所述母线中点稳压电路包括N-1个开关电路；每个所述开关电路分别串联于一路隔离电路102的正负极输出端口之间。
所述开关电路可以包含三极管、或CMOS管，但不限于此，任何可实现上述开关电路功能的元件都适用于本申请实施例。
图9给出了一种母线中点稳压电路的示意图，该母线中点稳压电路适用于两路隔离电路102通过中点电压点串联成隔离串联电路的情况，如图9所示，该母线中点稳压电路包括3个端子，第一端子与所述隔离串联电路的正极总线BUS1+连接，第二端子与所述隔离串联电路的负极总线BUS1-连接，第三端子连接中点电压点BUS1_N。此外，所述母线中点稳压电路还包括第一开关电路和第二开关电路，第一开关电路包括开关管Q26，第二开关电路包括开关管Q27。所述第一开关电路的输入端与BUS1+连接，第一开关电路的输出端、第二开关电路的输入端连接到中点电压点BUS1_N，所述第二开关电路的输出端与BUS1-连接；所述第一开关电路在中点电压BUS1_N与BUS1-的差值相对BUS1+与中点 电压BUS1_N的差值低于预设值时导通，提升中点电压BUS1_N与BUS1-的差值；所述第二开关电路在中点电压BUS1_N与BUS1-的差值相对BUS1+与中点电压BUS1_N的差值高于预设值时导通，降低中点电压BUS1_N与BUS1-的差值。具体地，当中点电压发生偏移的时候，如(BUS1_N-BUS1-)-(BUS1+-BUS1_N)低于预设值，所述预设值可以为接近0的数，开关管Q26打开，提升(BUS1_N-BUS1-)，提升后的(BUS1_N-BUS1-)与(BUS1+-BUS1_N)基本一致；如果(BUS1_N-BUS1-)-(BUS1+-BUS1_N)高于预设值，开关管Q27打开，降低(BUS1_N-BUS1-)，降低后的(BUS1_N-BUS1-)跟(BUS1+-BUS1_N)基本一致。
本申请实施例中的变压电路101可以为升压BOOST电路；隔离电路102可以为LLC电路，所述LLC电路指的是包含电感L,电容C,高频变压器L的谐振变换电路；逆变电路103可以为I型三电平三相全桥电路，其包含三个半桥电路，分别为A相半桥电路、B相半桥电路和C相半桥电路。
本申请实施例提出的逆变器，通过隔离电路将变压电路与逆变电路连接起来，如此在将太阳能发电系统并入电网过程中省去了相关技术中的电气隔离变压器，，从而不会因设备启停电流瞬间冲击而导致频繁触发电气隔离变压器开关柜自身过流保护器件动作，故障误报警次数低，大大减少了不必要的维护工作，提高了用户使用体验，而且能够有效抑制薄膜组件发电系统共模漏电流，防止玻璃基薄膜组件PID效应，并且占地小成本低，安装方便。
下面以一个具体的应用示例对上述逆变器进行说明。
在本应用示例中，逆变器包括：
升压BOOST电路，与薄膜太阳能阵列连接，对薄膜太阳能阵列输出的直流电压进行滤波和泵升；
LLC电路，对所述升压BOOST电路输出的电压进行直流的隔离变换；
所述I型三电平三相全桥电路，对LLC电路的输出电压进行逆变转换并进行LCL滤波和共模滤波后输出交流电流。
上述升压BOOST电路有两路；上述LLC电路有两路；每一路升压BOOST电路的输出分别通过一路LLC电路传递给I型三电平三相全桥电路。
图10为上述逆变器中一路升压BOOST电路示意图。
薄膜太阳能阵列的正极输出端与升压BOOST电路的PV1+连接，薄膜太阳能阵列的负极输出端与升压BOOST电路的BUS-连接；通过电容C2_1和电容C1_1对地进行共模滤波，形成对地共模电流；通过C3_1将母线之间的差模电流进行差模滤波，把薄膜太阳能阵列输入的高频纹波电流有效值控制在额定电流的预设值(如5％)以内；通过升压BOOST电路的储能电感L1_1，在满载情况下，使纹波系数不超过预设值(如60％)；通过两个并联的单管Q1_1和Q2_1的导通，实现对电感L1_1的励磁，当开关管关断期间，对支撑电容进行充电；支撑电容由EC1_1和EC2_1串联组成；通过电容C4_1对高频纹波进行滤波，实现直流电容两端的纹波电压占母线总电压的5％。
另一路升压BOOST电路拓扑与图9所示的升压BOOST电路一致。两路升压BOOST电路的输入输出负极共用BUS-。
图11为上述逆变器中一路LLC电路示意图。
EC21_1和EC22_1为支撑电容，除了对输入功率进行解构，还吸收部分的高频纹波；C22_1和C23_1进行高频纹波滤波；C21_1为谐振电容，与谐振电感L21_1和变压器T21_1原边形成谐振电路；D21_1和D22共同组成了钳位电路对谐振电容进行保护，当谐振电容电流大的时候，谐振电容两端的电压也大，通过钳位电路把谐振电容两端电压限定在正负母线中间电位，从而实现对谐振电容的保护；通过C24_1吸收串联二极管D21_1和D22_1两端的反向尖峰电压，实现对D21_1和D22_1的保护作用；C24_1和C25_1起到滤除纹波电压的作用；D23_1和D24_1共同组成了中点电压的电流回路；四个开关管分别为Q21_1、Q22_1、Q23_1和Q24_1，通过四个开关管的开关顺序实现高电平、低电平和中点电平这三种电平的切换；C26_1、C27_1、C28_1和C29_1分别为四个开关管的并联电容，除了参与谐振外，还有对相应的开关管进行保护：当开关 管关闭的时候，由于谐振电流的影响，开关管两端的电压较高，开关管并联的电容通过吸收尖锋电压，从而起到保护开关管的作用；同时在开关管关闭的时候，通过谐振电流对开关管两端电容的充放电，实现开关管在打开的时候，开关管两端的电压为零；D25_1、D26_1、D27_1和D28_1共同组成一个整流桥，把变压器副边电压整流成直流电压；C30_1和EC23_1共同组成了LLC输出电容，除了对高频纹波进行滤波，还对输出功率进行解构。
另一路LLC电路的拓扑结构与图11所示LLC电路完全一致。本申请实施例所述的高频纹波滤波电路2021的结构可以为图11中变压器T21_1原边侧的电路结构。
当两路LLC电路串联连接时，把两路LLC电路输出侧的直流电压进行串联，BUS_N为中点电压。当两路LLC电路并联连接时，可以将第一路LLC电路变压器副边输出侧的母线正极和第二路LLC电路变压器副边输出侧的母线正极连接BUS+，将第一路LLC电路变压器副边输出侧的母线负极和第二路LLC电路变压器副边输出侧的母线负极连接BUS-，相对两路LLC电路串联可以减少一个二极管整流桥电路，提高产品安装的便捷性。
图12(a)、图12(b)和图12(c)依次为上述逆变器中I型三电平三相全桥电路包括的A相半桥电路、B相半桥电路及C相半桥电路。
图12(a)中，EC31_1和EC32_1为支撑电容，还有高频滤波作用；电容C32_1和C33_1进行高频滤波；二极管D33_1和D34_1为中点电压形成的电流通路；开关管Q31_1、Q32_1、Q33_1和Q34_1通过控制开关顺序输出三种电平状态；电感L31_1、电感L32_1和电容C39_1共同组成了LCL滤波电路，实现对纹波的滤波；在交流输出侧加入了LC共模滤波电路，滤除共模高频干扰电流，其中L为电感L33_1,C为电容C312_1、C310_1、C310_2和C310_3分别为三相之间的差模电容，滤除差模高频干扰电流，达到EMC(Electro Magnetic Compatibility，电磁兼容性)传导认证要求。图12(b)所示的B相半桥电路、图12(c)所示的C相半桥电路与图12(a)所示的A相半桥电路拓扑结构相似，在此不展开赘述。
本申请实施例提出的逆变器，通过隔离电路将变压电路与逆变电路连接起来，如此在将太阳能发电系统并入电网过程中省去了相关技术中的电气隔离变压器，，从而不会因设备启停电流瞬间冲击而导致频繁触发电气隔离变压器开关柜自身过流保护器件动作，故障误报警次数低，大大减少了不必要的维护工作，提高了用户使用体验，而且能够有效抑制薄膜组件发电系统共模漏电流，防止玻璃基薄膜组件PID效应，并且占地小成本低，安装方便。
本申请实施例还提供一种发电设备，包括至少一个薄膜太阳能阵列以及如上述所提供的逆变器。
本申请实施例还提供了一种太阳能发电系统，如图13所示，所述系统包括依次连接的：
薄膜太阳能阵列，汇流套件，如上述的逆变器，以及配电柜。
本申请实施例提出的逆变器，通过隔离电路将变压电路与逆变电路连接起来，如此在将太阳能发电系统并入电网过程中省去了相关技术中的电气隔离变压器，从而不会因设备启停电流瞬间冲击而导致频繁触发电气隔离变压器开关柜自身过流保护器件动作，故障误报警次数低，大大减少了不必要的维护工作，提高了用户使用体验，而且能够有效抑制薄膜组件发电系统共模漏电流，防止玻璃基薄膜组件PID效应，并且占地小成本低，安装方便。
需要说明的是，在本文中，术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含，从而使得包括一系列要素的过程、方法、物品或者装置不仅包括那些要素，而且还包括没有明确列出的其他要素，或者是还包括为这种过程、方法、物品或者装置所固有的要素。在没有更多限制的情况下，由语句“包括一个……”限定的要素，并不排除在包括该要素的过程、方法、物品或者装置中还存在另外的相同要素。
通过以上的实施方式的描述，本邻域的技术人员可以清楚地了解到 上述实施例方法可借助软件加必需的通用硬件平台的方式来实现，当然也可以通过硬件，但很多情况下前者是更佳的实施方式。基于这样的理解，本申请的技术方案本质上或者说对现有技术做出贡献的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质(如ROM/RAM、磁碟、光盘)中，包括若干指令用以使得一台终端(可以是手机，计算机，服务器，空调器，或者网络设备等)执行本申请各个实施例所述的方法。
以上所述的具体实施方式，对本申请的目的、技术方案和有益效果进行了进一步详细说明，所应理解的是，以上所述仅为本申请的具体实施方式而已，并不用于限定本申请的保护范围，凡在本申请的技术方案的基础之上，所做的任何修改、等同替换、改进等，均应包括在本申请的保护范围之内。

Claims (19)

  1. 一种逆变器，应用于光伏发电设备，其特征在于，所述逆变器包括：至少一个变压电路、至少一个隔离电路以及逆变电路；
    所述至少一个变压电路中每个变压电路的输入端分别连接相应的薄膜太阳能阵列的输出端，所述至少一个变压电路的输出端分别连接所述至少一个隔离电路中的一个隔离电路的输入端；所述至少一个隔离电路的输出端分别连接所述逆变电路的输入端；所述逆变电路的输出端连接交流电网；
    其中，所述至少一个变压电路用于将所述薄膜太阳能阵列产生的直流输入电压转换为电压稳定的直流母线电压；
    所述至少一个隔离电路用于将所述隔离电路的输入端电压与所述隔离电路的输出端电压相互隔离；
    所述逆变电路用于将所述隔离电路输出的直流电压转换为与所述交流电网电压同频同相的交流电压并入所述交流电网。
  2. 根据权利要求1所述逆变器，其特征在于，所述隔离电路包括：第一逆变单元、隔离单元以及第二逆变单元；
    其中所述第一逆变单元的输入端连接所述变压电路的输出端，所述第一逆变单元的输出端连接所述隔离单元的输入端；
    所述隔离单元的输出端连接所述第二逆变单元的输入端；
    所述第二逆变单元的输出端连接至所述逆变电路的输入端；
    其中，所述第一逆变单元，用于将所述第一逆变单元的输入端的直流母线电压转换为交流电压，并从所述第一逆变单元的输出端输出；
    所述隔离单元，用于将所述隔离单元的输入端的交流电压与所述隔离单元的输出端的交流电压相互隔离；
    所述第二逆变单元，用于将所述隔离单元输出端输出的交流电压转换成直流电压并输出。
  3. 根据权利要求1所述逆变器，其特征在于，所述变压电路包括Boost 电路。
  4. 根据权利要求1所述逆变器，其特征在于，至少一个所述变压电路与所述至少一个隔离电路一一对应。
  5. 根据权利要求4所述逆变器，其特征在于，所述逆变器具体包括三个所述变压电路以及三个所述隔离电路。
  6. 根据权利要求2所述逆变器，其特征在于，所述至少第一逆变单元包括两个并联的三电平半桥；
    其中，两个所述三电平半桥的输入端分别连接所述变压电路的输出端，两个所述三电平半桥的输出端分别连接所述隔离单元的输入端。
  7. 根据权利要求6所述逆变器，其特征在于，所述隔离单元包括变压器，所述变压器的原边包括两个激磁电感，所述两个激磁电感的同名端朝向相反；所述两个激磁电感分别在两个谐振电路中，两个所述谐振电路分别与两个所述三电平半桥中的一个所述三电平半桥连接形成三电平半桥谐振电路；两个所述三电平半桥谐振电路并联。
  8. 根据权利要求7所述逆变器，其特征在于，第二逆变单元包括二极管全桥；所述二极管全桥与所述变压器的副边连接。
  9. 根据权利要求7所述逆变器，其特征在于，所述变压器的副边包括两个串联的副边激磁电感，两个所述副边激磁电感与两个原边的两个所述激磁电感一一对应。
  10. 根据权利要求1所述的逆变器，其特征在于，所述隔离电路包括：
    高频纹波滤波电路，与所述变压电路连接，对所述变压电路的输出电压进行高频纹波滤波；
    高频变压器，与所述高频纹波滤波电路连接，将所述高频纹波滤波电路输入的电压与所述高频变压器的输出电压相互隔离；
    整流电路，与所述高频变压器连接，将所述高频变压器的输出电压整流成直流电压。
  11. 根据权利要求10所述的逆变器，其特征在于，所述高频纹波滤 波电路包括：解构电路、滤波子电路、谐振电路、钳位电路、中点回路及电平切换电路；
    所述解构电路对所述变压电路的输出功率进行解构；所述滤波子电路对解构后所述变压电路输入的电压进行滤波；所述谐振电路对滤波后所述变压电路输入的电压进行高频谐振；所述钳位电路对所述谐振电路中的谐振电容进行保护；所述中点回路与所述谐振电路连接，组成中点电压的电流回路；所述电平切换电路与所述谐振电路连接进行电平切换。
  12. 根据权利要求10或11所述的逆变器，其特征在于，
    所述变压电路有两路或多路；
    所述隔离电路有两路或多路；
    每一路所述变压电路的输出分别通过一路所述隔离电路传递给所述逆变电路。
  13. 根据权利要求12所述的逆变器，其特征在于，
    两路或多路所述隔离电路通过串联或并联的方式连接。
  14. 根据权利要求13所述的逆变器，其特征在于，所述隔离电路还包括共模电流滤波电路；
    所述共模电流滤波电路设置在所述高频变压器的原边侧。
  15. 根据权利要求14所述的逆变器，其特征在于，
    所述两路或多路隔离电路通过中点电压点串联，所述共模电流滤波电路包括第一电容、第二电容和第三电容；
    所述第一电容的一端与所述隔离电路的正极总线连接，另一端接地；
    所述第二电容的一端接地，另一端与所述隔离电路的负极总线连接；
    所述第三电容的一端与所述中点电压点连接，另一端接地。
  16. 根据权利要求13所述的逆变器，其特征在于，所述两路或多路隔离电路通过中点电压点串联成隔离串联电路；
    所述逆变器还包括母线中点稳压电路，所述母线中点稳压电路包括N 个端子，N为所述隔离串联电路包括的隔离电路的总数加1；
    所述N个端子中的第一端子与所述隔离串联电路的正极总线连接，第二端子与所述隔离串联电路的负极总线连接，除所述第一端子和所述第二端子外的其他每个端子分别连接一个中点电压点。
  17. 根据权利要求16所述的逆变器，其特征在于，所述母线中点稳压电路包括N-1个开关电路；每个所述开关电路分别串联于一路隔离电路的正负极输出端口之间。
  18. 一种发电设备，其特征在于，包括：至少一个薄膜太阳能阵列以及如权利要求1-17任一项所述逆变器。
  19. 一种太阳能发电系统，其特征在于，所述系统包括依次连接的太阳能电池阵列、汇流套件、配电柜以及权利要求1至17任一项所述的逆变器。
PCT/CN2019/091144 2018-06-22 2019-06-13 逆变器、发电设备以及太阳能发电系统 WO2019242561A1 (zh)

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