WO2019239689A1

WO2019239689A1 - Reception device, communication system, and reception method

Info

Publication number: WO2019239689A1
Application number: PCT/JP2019/015055
Authority: WO
Inventors: 塁阪井
Original assignee: ソニーセミコンダクタソリューションズ株式会社
Priority date: 2018-06-13
Filing date: 2019-04-05
Publication date: 2019-12-19
Also published as: JP7157807B2; JPWO2019239689A1; BR112020024830A2

Abstract

The present invention improves transmission efficiency in a communication system that transmits forward error correction (FEC) blocks. A reception device is equipped with a reception unit and a processing unit. The reception unit of the reception device receives divided data generated by dividing a series, in which a prescribed number of FEC blocks each having a prescribed size are arranged, using a division unit that differs from the aforementioned size. Also, the processing unit of the reception device performs a process for calculating, from the size and the division unit, the start positions of the FEC blocks in the divided data received by the reception unit.

Description

Reception device, communication system, and reception method

The present technology relates to a receiving device, a communication system, and a receiving method. Specifically, the present invention relates to a receiving apparatus, a communication system, and a receiving method for receiving terrestrial digital television broadcasting.

In recent years, the development of transmitters and receivers for providing next-generation digital terrestrial television broadcasting services that inherit the features of the ISDB-T (Integrated Services Digital Broadcasting Terrestrial) system has been underway. In the ISDB-T next-generation scheme, the transmission apparatus encodes the content to be broadcast into a plurality of codewords using a forward error correction (FEC) scheme. Then, the transmitting apparatus further divides the FEC block sequence in which these codewords are carrier-modulated and arranged into a plurality of divided data in a certain unit, and sequentially transmits in units of frames.

Here, in the next generation system of ISDB-T, it is proposed that the size of the FEC block is not limited to a divisor of the size of the divided data from the viewpoint of improving the transmission efficiency. For this reason, when an FEC block having a size that does not correspond to a divisor of the size of the divided data is used, the head of the FEC block is shifted in the frame without matching the head of the divided data. In view of this, there has been proposed a transmission apparatus that stores a pointer indicating the head position of the first FEC block in the next frame in its transmission control signal (TMCC: Transmission and Multiplexing, Configuration, and Control) (for example, a patent) Reference 1).

Japanese Patent Laying-Open No. 2015-65627

In the above-described conventional technology, the receiving apparatus can acquire the start position of the FEC block by referring to the pointer in the TMCC, and can extract the FEC block from the frame and decode it. However, since the pointer changes from frame to frame, a part of the TMCC changes from frame to frame due to the change. Thereby, when estimating a transmission line using TMCC, there exists a problem that the precision of estimation falls and noise tolerance falls. Here, the estimation of the transmission path means estimating the characteristics of the transmission path such as phase and amplitude in order to compensate for waveform distortion and fading.

This technology has been created in view of such a situation, and aims to improve noise resistance in a communication system that transmits FEC blocks.

The present technology has been made to solve the above-described problems. The first aspect of the present technology is to divide a sequence in which a predetermined number of FEC blocks each having a predetermined size are arranged in a division unit different from the above size. A receiving device comprising: a receiving unit that receives the divided data generated by the processing; and a processing unit that performs a process of calculating the start position of the FEC block in the divided data from the size and the division unit; This is the receiving method. This brings about the effect that the start position of the FEC block in the divided data is calculated in the receiving apparatus.

In the first aspect, the receiving unit further receives a transmission control signal including a code length and a modulation order of codewords constituting the FEC block, and the processing unit receives the code length and the modulation order. You may obtain | require the said size from. This brings about the effect that the size of the FEC block is acquired from the transmission control signal.

In this first aspect, the processing unit may estimate the next head position from the current head position, the size, and the division unit each time the divided data is received. As a result, the head position is calculated every time the divided data is received.

The first aspect further includes a transmission path estimation unit that generates a demodulation result by performing orthogonal frequency division multiplexing demodulation on the orthogonal frequency division multiplexing modulated frame and estimates the transmission path using the demodulation result. The frame may include the division data, and the processing unit may obtain the division unit from the demodulation result. As a result, the division unit is obtained from the demodulation result of the orthogonal frequency division multiplexed frame.

In the first aspect, the receiving unit further receives a differentially modulated transmission control signal carrier, and the processing unit differentially demodulates the transmission control signal carrier to obtain an error correction code. A differential demodulation unit; an error correction code decoding unit that decodes the error correction code to obtain a transmission control signal; a calculation unit that calculates the head position by obtaining the size from the transmission control signal and the division unit; An error correction encoding unit that generates an error correction code by encoding the transmission control signal including the calculated head position, and a new transmission control by differentially modulating the new error correction code A differential modulation unit that generates a signal carrier, and the transmission path estimation unit may perform transmission path estimation based on the new transmission control signal carrier. This brings about the effect that the transmission path is estimated based on the transmission control signal carrier generated by error correction coding and differential modulation of the transmission control signal including the head position.

Also, in this first aspect, the error correction code decoding unit may perform soft decision decoding. As a result, the transmission control signal can be obtained by soft decision decoding.

In this first aspect, the error correction encoding unit may divide the transmission control signal and perform error correction encoding. This brings about the effect that a plurality of codewords are generated from the transmission control signal.

Further, according to the first aspect, there is further provided a demodulated data decoding unit that performs orthogonal frequency division multiplexing demodulation of the frame, extracts the FEC block from the divided data in the demodulation result, and decodes the FEC block. You can also This brings about the effect that the error of the FEC block is corrected.

In addition, according to a second aspect of the present technology, a transmission device that divides and transmits a sequence in which a predetermined number of FEC blocks each having a predetermined size are arranged in a division unit different from the size, and reception that receives the division data. And a receiving device including a processing unit that performs processing for calculating the start position of the FEC block in the divided data from the predetermined size and the division unit. As a result, the division data is transmitted from the transmission device, and the leading position of the FEC block in the division data is calculated in the reception device.

According to the present technology, it is possible to achieve an excellent effect that noise resistance can be improved in a communication system that transmits FEC blocks. Note that the effects described here are not necessarily limited, and may be any of the effects described in the present disclosure.

It is a block diagram showing an example of 1 composition of a communications system in a 1st embodiment of this art. 6 is a diagram for describing a procedure until generation of an OFDM (OrthogonalgonFrequency Division Multiplexing) frame according to the first embodiment of the present technology. FIG. It is a figure which shows an example of the data structure of the TMCC carrier in 1st Embodiment of this technique. It is a figure which shows an example of the data structure of the OFDM frame in 1st Embodiment of this technique. It is a block diagram showing an example of 1 composition of a channel estimation part in a 1st embodiment of this art. It is a block diagram showing an example of 1 composition of a transmission control signal processing part in a 1st embodiment of this art. It is a block diagram showing an example of 1 composition of a FEC block pointer calculation part in a 1st embodiment of this art. It is a figure for demonstrating the processing method of the transmission control signal in 1st Embodiment of this technique. 7 is a flowchart illustrating an example of an operation of the transmission device according to the first embodiment of the present technology. 7 is a flowchart illustrating an example of an operation of the reception device according to the first embodiment of the present technology. 3 is a flowchart illustrating an example of transmission control signal processing according to the first embodiment of the present technology. It is a block diagram showing an example of 1 composition of a transmission control signal processing part in a modification of a 1st embodiment of this art. It is a block diagram showing an example of 1 composition of a transmission control signal processing part in a 2nd embodiment of this art. It is a figure for demonstrating the processing method of the transmission control signal in 2nd Embodiment of this technique. 12 is a flowchart illustrating an example of transmission control signal processing according to the second embodiment of the present technology.

Hereinafter, modes for carrying out the present technology (hereinafter referred to as embodiments) will be described. The description will be made in the following order.
1. First embodiment (an example in which the receiving device calculates the start position of an FEC block)
2. Second embodiment (an example in which a receiving device calculates the start position of an FEC block and divides data including the calculation result)

<1. First Embodiment>
[Configuration example of communication system]
FIG. 1 is a block diagram illustrating a configuration example of a communication system according to the first embodiment of the present technology. This communication system transmits and receives OFDM frames conforming to the ISDB-T standard used in next-generation terrestrial digital television broadcasting, and includes a transmission device 100 and a reception device 200.

The transmission device 100 includes an antenna 101. Transmitting apparatus 100 generates an OFDM frame subjected to orthogonal frequency division multiplexing modulation, and antenna 101 generates a radio signal on which the frame is superimposed, and wirelessly transmits it to receiving apparatus 200.

The receiving apparatus 200 includes an antenna 201, a tuner 210, an AD (Analog-to-Digital) conversion unit 220, a transmission path estimation unit 230, a transmission control signal processing unit 300, and a demodulated data decoding unit 240.

The antenna 201 receives a radio signal from the transmission device 100 and generates an analog reception signal. The antenna 201 supplies a received signal to the tuner 210. The antenna 201 is an example of a receiving unit described in the claims.

The tuner 210 selects a signal of a predetermined channel from the received signal and outputs it to the AD converter 220 via the signal line 219.

The AD converter 220 converts an analog output signal from the tuner 210 into a digital signal. This digital signal includes an OFDM frame. The AD conversion unit 220 supplies the digital signal to the transmission path estimation unit 230 via the signal line 229.

The transmission path estimation unit 230 demodulates the OFDM frame in the digital signal and estimates the transmission path using the demodulation result. The transmission path estimation unit 230 acquires a TMCC carrier including a transmission control signal (TMCC) from the demodulation result. Then, the transmission path estimation unit 230 supplies the TMCC carrier to the transmission control signal processing unit 300 via the signal line 309. Also, the transmission path estimation unit 230 performs equalization processing that compensates for the phase and amplitude based on the transmission path estimation result, and supplies the processed data to the demodulated data decoding unit 240 as demodulated data.

The transmission control signal processing unit 300 performs processing for updating a part of the transmission control signal. Details of the update contents will be described later. The transmission control signal processing unit 300 supplies the updated transmission control signal to the transmission path estimation unit 230 via the signal line 309. The transmission control signal processing unit 300 is an example of a processing unit described in the claims.

The demodulated data decoder 240 decodes demodulated data. The demodulated data decoding unit 240 outputs the decoding result as decoded data.

FIG. 2 is a diagram for describing a procedure until generation of an OFDM frame according to the first embodiment of the present technology. In the figure, a indicates an example of the input data series, and b in the figure indicates an example of the encoded series. C in the figure shows an example of a sequence after interleaving. D in the figure shows an example of the FEC block. Further, e in the figure indicates a sequence of OFDM frames.

When content to be broadcast is input, the transmitting apparatus 100 divides the content into a plurality of input data of a certain size such as input data # 1, # 2, and # 3 as illustrated in a in FIG. To do.

Then, the transmission apparatus 100 performs forward error correction (FEC: Forward Error Correction) coding on each of the input data. For example, in forward error correction coding, BCH coding and LDPC (Low-Density Parity-Check) coding are sequentially performed. With these encodings, a codeword sequence including data and parity for correcting an error in the data is generated as illustrated in FIG. Subsequently, the transmitting apparatus 100 performs interleaving, and generates a bit string after rearrangement illustrated as c in FIG. Then, the transmission apparatus 100 performs carrier modulation, and generates a plurality of FEC blocks such as FEC blocks # 1, # 2, and # 3 as illustrated by d in FIG. This FEC block is a sequence obtained by carrier-modulating a code word. The size of each FEC block is constant, and the size is m (m is an integer).

The transmission apparatus 100 generates a plurality of divided data by dividing a FEC block sequence in which a plurality of FEC blocks are arranged by a predetermined division unit. This division unit is N (N is an integer).

Then, the transmission device 100 generates an OFDM frame from each of the divided data. As a result, OFDM frames such as OFDM frames # 1 and # 2 are generated as illustrated in e in FIG. One division data is stored in each OFDM frame. For example, a data carrier and TMCC including divided data # 1 are stored in OFDM frame # 1, and a data carrier and TMCC including divided data # 2 are stored in OFDM frame # 2.

Here, in the next generation standard of ISDB-T, it is proposed that the size m of the FEC block is not limited to a divisor of the division unit N from the viewpoint of improving transmission efficiency. For this reason, when the size m does not correspond to the divisor of the division unit N, the heads of the second and subsequent OFDM frames are shifted without matching the head of the first FEC block in the OFDM frame. For this reason, the receiving apparatus 200 cannot extract the FEC block from the OFDM frame without acquiring the shift (in other words, the offset). This offset indicates the head position of the first FEC block in the OFDM frame, and information indicating the offset is hereinafter referred to as “FEC block pointer”. The transmitting apparatus 100 stores the FEC block pointer of the next OFDM frame in each TMCC of the OFDM frame. For example, the FCC block pointer of the next OFDM frame # 2 is stored in the TMCC in the OFDM frame # 1.

FIG. 3 is a diagram illustrating an example of a data structure of a TMCC carrier in the first embodiment of the present technology.

The transmitting apparatus 100 performs differential-set cyclic coding on TMCC including the number of segments, modulation order, code length, and reserved area, and further differentially modulates to generate a TMCC carrier.

Here, the modulation order represents the number of bits mapped to one symbol of the FEC block. The code length indicates the code length of the code word that constitutes the FEC block.

FIG. 4 is a diagram illustrating an example of the data structure of the OFDM frame according to the first embodiment of the present technology. The vertical axis in the figure is the time axis, and the horizontal axis is the frequency axis. This figure is described in STIB-B31 “terrestrial digital television broadcast transmission system” of the ARIB standard. The example in the figure is an example when QAM modulation is adopted as a modulation method. As shown in the figure, one carrier in one OFDM frame is used for TMCC transmission. An SP (Scattered Pilot) symbol is inserted at a predetermined position. A data carrier is stored in the OFDM frame. The receiving apparatus 200 can estimate the transmission path with reference to the position of the SP. However, when the size m of the FEC block is not a divisor of the division unit N, the FEC block pointer changes for each OFDM frame. Further, the parity for correcting the error also changes for each OFDM frame.

[Configuration example of transmission path estimation unit]
FIG. 5 is a block diagram illustrating a configuration example of the transmission path estimation unit 230 according to the first embodiment of the present technology. The transmission channel estimation unit 230 includes an FFT (Fast Fourier Transform) size estimation unit 231, a fast Fourier transform unit 232, a data carrier extraction circuit 233, a transmission control signal extraction circuit 234, a transmission channel estimation circuit 235, and an equalization circuit 236. .

The FFT size estimation unit 231 estimates the FFT size by performing quadrature detection on the digital signal from the AD conversion unit 220. The FFT size estimation unit 231 supplies the FFT size to the fast Fourier transform unit 232 and the transmission control signal processing unit 300.

The fast Fourier transform unit 232 removes the guard interval from the OFDM frame in the digital signal and performs fast Fourier transform. By this fast Fourier transform, a time-domain OFDM frame is converted into a frequency-domain OFDM symbol.

The OFDM frame is OFDM demodulated by the FFT size estimation unit 231 and the fast Fourier transform unit 232. The fast Fourier transform unit 232 supplies the demodulation result to the data carrier extraction circuit 233 and the transmission control signal extraction circuit 234.

The data carrier extraction circuit 233 extracts a data carrier from the demodulation result by the fast Fourier transform unit 232 and supplies the data carrier to the equalization circuit 236. This data carrier includes a data frame and the like.

The transmission control signal extraction circuit 234 extracts the TMCC carrier from the demodulation result by the fast Fourier transform unit 232. The transmission control signal extraction circuit 234 supplies the extracted TMCC carrier to the transmission control signal processing unit 300 and the transmission path estimation circuit 235 as a reception TMCC carrier.

The transmission path estimation circuit 235 estimates the amount of phase rotation and noise power by comparing the phase and amplitude with the received TMCC carrier using the differentially modulated predicted TMCC carrier as an expected value. The transmission path estimation circuit 235 supplies the estimation result to the equalization circuit 236.

The equalization circuit 236 equalizes the data carrier based on the estimation result from the transmission path estimation circuit 235. The equalization circuit 236 supplies the equalized data to the demodulated data decoding unit 240 as demodulated data.

[Configuration example of transmission control signal processor]
FIG. 6 is a block diagram illustrating a configuration example of the transmission control signal processing unit 300 according to the first embodiment of the present technology. The transmission control signal processing unit 300 includes a differential demodulation unit 310, an error correction code decoding circuit 320, an FEC block pointer calculation unit 330, a synchronization word confirmation circuit 340, an error correction coding circuit 350, a differential modulation unit 360, and a TMCC sequence. A generation circuit 370 is provided.

The differential demodulator 310 performs differential demodulation on the received TMCC carrier from the transmission path estimator 230. In the ISDB-T standard, differential BPSK (Binary Phase-Shift Keying) modulation is performed, so that demodulation corresponding to the modulation method is performed. Differential demodulation section 310 determines whether it is “1” or “0” from the phase difference between the TMCC carrier extracted from the previous OFDM symbol and the received TMCC carrier (that is, hard decision). The number of bits demodulated per OFDM symbol depends on the transmission specification. The differential demodulation unit 310 supplies the demodulation result to the synchronization word confirmation circuit 340 and the error correction code decoding circuit 320.

The error correction code decoding circuit 320 decodes an error correction code such as a difference set cyclic code to obtain a TMCC. For example, in the ISDB-T standard, data is error correction encoded by a differential set cyclic code, and the differential set cyclic code is arranged in order from the last carrier of the synchronization word. The error correction code decoding circuit 320 decodes the difference set cyclic code for the differentially demodulated sequence. The decoding algorithm may be any algorithm such as a variable threshold decoding method. In the first embodiment, the differential demodulated sequence is a bit sequence. However, when performing soft decision decoding such as the soft decision variable threshold decoding method or the probability propagation method (Belief Propagation), The differential demodulation result can be received with the judgment value. Further, the code length and information length of the difference set cyclic code are not limited to those proposed in the ISDB-T standard. Further, the error correction code is not limited to the difference set cyclic code. The error correction code decoding circuit 320 supplies the acquired TMCC to the FEC block pointer calculation unit 330 and the error correction coding circuit 350.

The FEC block pointer calculation unit 330 calculates the FEC block pointer from the FFT size from the transmission path estimation unit 230 and the TMCC. The FEC block pointer calculation unit 330 supplies the calculated FEC block pointer to the error correction coding circuit 350.

The error correction encoding circuit 350 updates a part of the TMCC in the previous OFDM frame with the FEC block pointer from the FEC block pointer calculation unit 330 and performs error correction encoding on the updated new TMCC. For example, difference set cyclic coding is performed. The error correction coding circuit 350 supplies an error correction code such as a difference set cyclic code to the TMCC sequence generation circuit 370.

The synchronization word confirmation circuit 340 confirms the coincidence of the synchronization words in the demodulation result of the differential demodulator 310 and takes frame synchronization. In the ISDB-T standard, a reference bit by differential modulation of the TMCC carrier is arranged at the head of the frame, and a synchronization word is arranged in the subsequent 16 carriers. This synchronization word is a 16-bit sequence known to the receiving apparatus 200 defined by the specification. The synchronization word confirmation circuit 340 confirms whether or not the next 16 bits of the reference bits are the defined synchronization word in the demodulation result. Since there is a case of erroneous reception due to noise in the transmission path, it is not limited to checking whether or not all 16 bits match, and may be checking whether or not the number of matching bits exceeds a threshold value. Although the transmission specification of the ISDB-T standard is taken as an example, the number of carriers and the bit sequence of the synchronization word are not limited thereto. The synchronization word confirmation circuit 340 supplies the confirmation result to the TMCC sequence generation circuit 370.

The TMCC sequence generation circuit 370 generates a predicted TMCC sequence for the next frame using a synchronization word and an error correction code. In the TMCC sequence arranged in an OFDM frame according to the ISDB-T standard, data is arranged in the order of a differential modulation reference bit, a synchronization word, and a difference set cyclic code. The reference bit is determined depending on the carrier number, and the synchronization word is inverted every OFDM frame. When the synchronization words match, the TMCC sequence generation circuit 370 generates a reference bit and a synchronization word based on the transmission specifications, and supplies the bit sequence obtained by adding them to the differential cyclic code as a TMCC sequence to the differential modulation unit 360 To do.

The differential modulation unit 360 performs differential modulation on the TMCC sequence based on the transmission specifications. The differential modulation unit 360 supplies the modulated symbol to the transmission path estimation unit 230 as a predicted TMCC carrier expected in the next OFDM frame.

[Configuration Example of FEC Block Pointer Calculation Unit]
FIG. 7 is a block diagram illustrating a configuration example of the FEC block pointer calculation unit 330 according to the first embodiment of the present technology. The FEC block pointer calculation unit 330 includes an FEC block size calculation unit 351, an OFDM frame data carrier number calculation unit 352, and a next frame FEC block pointer calculation unit 353.

The FEC block size calculation unit 351 calculates the size m of the FEC block. The FEC block size calculation unit 351 receives TMCC from the error correction code decoding circuit 320, and refers to the code length C and the modulation order μ of the FEC block described in the TMCC. Then, the FEC block size calculation unit 351 calculates the size m of the FEC block by the following formula and supplies the FEC block size calculation unit 351 to the next frame FEC block pointer calculation unit 353.
m = C / μ Equation 1

The intra-OFDM data carrier number calculation unit 352 calculates the number of data carriers corresponding to the division unit N. This intra-OFDM data carrier number calculation unit 352 obtains the _total number of carriers N _total from the FFT size estimated by the FFT size estimation unit 231 and calculates the number of data carriers (division unit) N using the following equation. The number of data carriers in OFDM frame calculation unit 352 supplies the calculated N to the next frame FEC block pointer calculation unit 353.
N = N _total −N _pilot −N _tmcc −N _AC
In the above equation, N _pilot is the number of pilot carriers, and N _tmcc is the number of TMCC carriers. N _AC is the number of AC carriers. These values are determined according to transmission specifications.

The next frame FEC block pointer calculation unit 353 calculates the FEC block pointer p_n of the next OFDM frame from the FEC block pointer p_c of the current OFDM frame, the size m of the FEC block, and the number N of data carriers. The next frame FEC block pointer calculation unit 353 acquires the FEC block pointer p_c of the current OFDM frame from the TMCC of the previous OFDM frame, and calculates the next FEC block pointer p_n by the following equation, for example. Then, the next frame FEC block pointer calculation unit 353 supplies the calculated p_n to the error correction coding circuit 350.
p_n = {m− (m−p_c + N)% m}% m Equation 3
In the above expression, “%” is an operator that obtains a remainder obtained by dividing the immediately preceding variable by the immediately following variable.

FIG. 8 is a diagram for explaining a transmission control signal processing method according to the first embodiment of the present technology. A in the figure is an example of the TMCC carrier before the update, and b in the figure is an example of the TMCC after the update. C in the figure is an example of a differential cyclic code obtained by encoding the updated TMCC.

The transmission control signal processing unit 300 differentially demodulates the TMCC carrier illustrated as a in FIG. 6 and further decodes the differential cyclic code to extract the TMCC. The TMCC stores the FEC block pointer p_c in addition to the number of segments, the modulation order, and the code length. The FEC block pointer p_c is stored in, for example, a reserved area in TMCC.

Since the offset (FEC block pointer) is the size of the FEC block at the maximum, for example, when the code length is 64800 (= C / μ = 3240/2) bits, the maximum is 15 bits (= log ₂ ) in QPSK modulation. 32400) changes for each OFDM frame. For example, “Toward Realization of Super Hi-Vision Broadcasting by Next Generation Terrestrial Broadcasting System” [online], NHK Broadcasting Technology Laboratory, Internet (URL: https://www.nhk.or.jp/strl/ open2016 / tenji / a8.html) describes that an LDPC (Low-Density Parity-check Code) code is adopted as an error correction code (FEC block) of the payload. Here, the maximum code length is assumed in DVB-Digital Video Broadcasting-Terrestrial (ATB) 2 and ATSC (Advanced Television Systems Committee standards) 3.0 which are overseas terrestrial broadcasting standards.

Then, the transmission control signal processing unit 300 calculates the next FEC block pointer p_n from the current FEC block pointer p_c using Expressions 1 to 3, and updates the reserved area with the value. As a result, a TMCC is newly generated as illustrated in FIG.

Subsequently, the transmission control signal processing unit 300 encodes a new TMCC and generates a difference set cyclic code as illustrated in c in FIG.

For example, in the ISDB-T standard, TMCC is error-correction-coded with a difference set cyclic code having a code length of 184 bits and an information length of 102 bits. In this case, the 82-bit parity of the difference between the code length and the information length changes for each OFDM frame. Thereby, about 50% of the bits are changed for each OFDM frame together with the changing information bits.

Here, in the next generation standard of ISDB-T, the transmission of the FEC block pointer is not stipulated. As described above, a method of storing the FEC block pointer in the TMCC and transmitting it can be considered. However, in this method, about 50% of the bits of the TMCC change for each OFDM frame due to the change of the FEC block pointer. The estimation accuracy of the used transmission path estimation is reduced. As a result, noise resistance may be reduced as compared with the current ISDB-T standard.

Therefore, the receiving apparatus 200 calculates the FEC block pointer p_n of the next OFDM frame from the size m of the FEC block and the number N of data carriers. For this reason, even if part of the TMCC changes for each OFDM frame due to the change of the FEC block pointer, the receiving apparatus 200 can predict the changed TMCC using the calculated p_n. Thereby, the estimation accuracy of the transmission path using TMCC can be improved, and noise tolerance can be improved.

Then, the demodulated data decoding unit 240 acquires the FEC block pointer from the TMCC, and extracts and decodes the FEC block from the divided data using the pointer.

[Operation example of transmitter]
FIG. 9 is a flowchart illustrating an example of the operation of the transmission device 100 according to the first embodiment of the present technology. This operation is started, for example, when a predetermined application for transmission is executed. The transmitting apparatus 100 performs carrier modulation such as bit interleaving and QAM mapping on the codeword obtained by encoding the input data, and encodes the codeword into an FEC block (step S901). The data carrier is generated by dividing (step S902). Then, transmitting apparatus 100 generates a TMCC carrier (step S903), and transmits an OFDM frame including a data carrier and a TMCC carrier (step S904). After step S904, the transmitting apparatus 100 repeats step S901 and subsequent steps.

[Example of receiver operation]
FIG. 10 is a flowchart illustrating an example of the operation of the reception device 200 according to the first embodiment of the present technology. This operation is started, for example, when a predetermined application for reception is executed. The receiving apparatus 200 receives the OFDM frame (step S951), and extracts a data carrier and a TMCC carrier by fast Fourier transform (step S952). Then, the receiving apparatus 200 performs transmission control signal processing for updating a part of the transmission control signal (step S960), and performs estimation and equalization of the transmission path (step S953). Subsequently, the receiving apparatus 200 executes a demodulated data decoding process for decoding the demodulated data (step S954), and repeatedly executes step S951 and subsequent steps.

FIG. 11 is a flowchart illustrating an example of transmission control signal processing according to the first embodiment of the present technology. The transmission control signal processing unit 300 performs differential demodulation for each OFDM symbol (step S961). The transmission control signal processing unit 300 buffers the 16-bit synchronization word (step S962), and checks whether or not the received synchronization word matches the specified synchronization word (step S963). If the synchronization words do not match (step S963: No), the transmission control signal processing unit 300 updates the buffer bit by bit and repeats step S963 and subsequent steps.

On the other hand, when the synchronization words match (step S963: Yes), the transmission control signal processing unit 300 buffers an error correction code (such as a difference set cyclic code) after the next bit of the synchronization word (step S964). The code is decoded (step S965). In the ISDB-T standard, a difference set cyclic code is assigned to 184 OFDM symbols, and the decoding process is required to be completed within one OFDM symbol. The transmission control signal processing unit 300 determines whether or not the decoding is successful (step S966). When decoding fails (step S966: No), the transmission control signal processing unit 300 repeats step S963 and subsequent steps.

On the other hand, when the decoding is successful (step S966: Yes), the transmission control signal processing unit 300 calculates the FEC block pointer of the next frame using Equations 1 to 3 (Step S967). Then, the transmission control signal processing unit 300 performs error correction coding on the TMCC partially updated with the calculated value (step S968), generates a TMCC sequence (step S969), and performs differential modulation (step S970). After step S970, the transmission control signal processing unit 300 ends the transmission control signal processing. Since the differentially modulated carrier is used as a predicted TMCC carrier for the next OFDM frame, steps S967 to S970 need to be completed before the first reception of the next OFDM frame.

As described above, according to the first embodiment of the present technology, the reception device 200 calculates the start position of the FEC block from the FEC block size m and the division unit N. Thus, a TMCC that has partially changed can be predicted. As a result, the accuracy of channel estimation using TMCC can be improved, and noise resistance can be improved.

[Modification]
In the first embodiment described above, the transmission control signal processing unit 300 performs hard decision decoding on the error correction code. However, the hard decision decoding lacks error correction capability and realizes sufficient reception performance. There is a risk that it cannot be done. The transmission control signal processing unit 300 in the modification of the first embodiment is different from the first embodiment in that soft decision decoding is performed.

FIG. 12 is a block diagram illustrating a configuration example of the transmission control signal processing unit 300 according to the modification of the first embodiment of the present technology. The transmission control signal processing unit 300 according to the modification of the first embodiment is different from the first embodiment in that an error correction code decoding circuit 321 is provided instead of the error correction code decoding circuit 320.

The error correction code decoding circuit 321 performs soft decision decoding on an error correction code such as a difference set cyclic code. As a soft decision value decoding method, a variable threshold value decoding method or a probability propagation method is known. In error correction code decoding, the probability of “0” to “1” and the log-likelihood ratio are calculated and used from the phase information of a differentially modulated bit string, etc., and reception performance can be improved.

As described above, according to the modification of the first embodiment of the present technology, the error correction code decoding circuit 321 performs error determination code soft decision decoding, and thus has higher error correction capability than the case of hard decision decoding. As a result, the reception performance can be improved.

<2. Second Embodiment>
In the first embodiment described above, the transmission control signal processing unit 300 encodes the updated TMCC without dividing it, and generates one codeword of a differential cyclic code for each TMCC. However, if the FEC block pointer or the like is stored in the TMCC on the receiving device 200 side, there is a possibility that it will not fit within one codeword. The transmission control signal processing unit 300 according to the second embodiment is different from the first embodiment in that TMCC is divided and a plurality of codewords are generated for each TMCC.

FIG. 13 is a block diagram illustrating a configuration example of the transmission control signal processing unit 300 according to the second embodiment of the present technology. The transmission control signal processing unit 300 of the second embodiment is different from the first embodiment in that an error correction code decoding circuit 322 is further provided.

Also, the transmission apparatus 100 according to the second embodiment divides the TMCC into two, generates two codewords of the differential cyclic code, and transmits an OFDM frame including them. For this reason, the differential demodulator 310 acquires two codewords of the difference set cyclic code for each TMCC carrier. The error correction code decoding circuit 320 decodes one of the two code words, and the error correction code decoding circuit 322 decodes the other.

FIG. 14 is a diagram for describing a transmission control signal processing method according to the second embodiment of the present technology. A in the figure is an example of the TMCC carrier before the update, and b in the figure is an example of the TMCC after the update. C in the figure is an example of a differential cyclic code obtained by encoding the updated TMCC.

The TMCC carrier includes difference set cyclic codes # 1_1 and # 1_2 as illustrated in a in FIG. The difference set cyclic code # 1_1 includes an information bit string # 1_1 and a parity # 1_1, and the difference set cyclic code # 1_2 includes an information bit string # 1_2 and a parity # 1_2. Each of the difference set cyclic codes # 1_1 and # 1_2 corresponds to one codeword. Information bit sequence # 1_1 and information bit sequence # 1_2 are obtained by dividing one TMCC and include the number of segments, the modulation order, and the like. The error correction code decoding circuit 320 decodes the difference set cyclic code # 1_1, and the error correction code decoding circuit 322 decodes the difference set cyclic code # 1_2.

The transmission control signal processing unit 300 calculates the next FEC block pointer p_n from the FEC block pointer p_c using Equations 1 to 3, and updates the reserved area with the value. As a result, a TMCC is newly generated as illustrated in FIG.

Subsequently, the transmission control signal processing unit 300 divides and encodes the TMCC into two, and generates two codewords of the difference cyclic code as illustrated in c in the figure.

In addition, although the transmission control signal processing unit 300 divides the TMCC into two, it can be divided into three or more.

FIG. 15 is a flowchart illustrating an example of transmission control signal processing according to the second embodiment of the present technology. The transmission control signal processing of the second embodiment is different from the first embodiment in that steps S971 to S973 are further executed.

When the synchronization words match (step S963: Yes), the transmission control signal processing unit 300 executes steps S964 to S966 for the first difference set cyclic code. When decoding is successful for the first one (step S966: Yes), the transmission control signal processing unit 300 buffers the second difference set cyclic code (step S971) and decodes the code (step S972). ). The transmission control signal processing unit 300 determines whether or not the decoding is successful (step S973). When decoding fails for the second one (step S973: No), the transmission control signal processing unit 300 repeats step S963 and subsequent steps. When decoding is successful for the second (step S973: Yes), the transmission control signal processing unit 300 executes step S967 and subsequent steps.

As described above, according to the second embodiment of the present technology, since the transmission control signal processing unit 300 divides and encodes the updated TMCC, error correction is performed even if the TMCC data size increases. A decrease in ability can be suppressed.

The above-described embodiment shows an example for embodying the present technology, and the matters in the embodiment and the invention-specific matters in the claims have a corresponding relationship. Similarly, the invention specific matter in the claims and the matter in the embodiment of the present technology having the same name as this have a corresponding relationship. However, the present technology is not limited to the embodiment, and can be embodied by making various modifications to the embodiment without departing from the gist thereof.

Further, the processing procedure described in the above embodiment may be regarded as a method having a series of these procedures, and a program for causing a computer to execute these series of procedures or a recording medium for storing the program. You may catch it. As this recording medium, for example, a CD (Compact Disc), an MD (MiniDisc), a DVD (Digital Versatile Disc), a memory card, a Blu-ray disc (Blu-ray (registered trademark) Disc), or the like can be used.

It should be noted that the effects described in this specification are merely examples, and are not limited, and other effects may be obtained.

In addition, this technique can also take the following structures.
(1) a receiving unit that receives divided data generated by dividing a sequence in which a predetermined number of FEC (Forward Error Correction) blocks each having a predetermined size are arranged in a division unit different from the size;
A receiving apparatus comprising: a processing unit that performs a process of calculating a start position of the FEC block in the divided data from the size and the division unit.
(2) The reception unit further receives a transmission control signal including a code length and a modulation order of codewords constituting the FEC block,
The receiving apparatus according to (1), wherein the processing unit obtains the size from the code length and the modulation order.
(3) The processing unit according to (1) or (2), wherein each time the divided data is received, the processing unit calculates the next head position from the current head position, the size, and the division unit. Receiver device.
(4) further comprising a transmission path estimator for generating a demodulation result by performing orthogonal frequency division multiplex demodulation on the orthogonal frequency division multiplex modulated frame and estimating a transmission path using the demodulation result;
The frame includes the divided data,
The receiving device according to any one of (1) to (3), wherein the processing unit acquires the division unit from the demodulation result.
(5) The receiver further receives a differentially modulated transmission control signal carrier,
The processor is
A differential demodulator for differentially demodulating the transmission control signal carrier to obtain an error correction code;
An error correction code decoding unit for decoding the error correction code to obtain a transmission control signal;
A calculation unit that calculates the head position by obtaining the size from the transmission control signal and the division unit;
An error correction encoding unit that generates an error correction code by performing error correction encoding on the transmission control signal including the calculated head position;
A differential modulation unit that differentially modulates the new error correction code to generate a new transmission control signal carrier,
The receiving apparatus according to (4), wherein the transmission path estimation unit performs transmission path estimation based on the new transmission control signal carrier.
(6) The receiving apparatus according to (5), wherein the error correction code decoding unit performs soft decision decoding.
(7) The receiving apparatus according to (5) or (6), wherein the error correction encoding unit divides the transmission control signal and performs error correction encoding.
(8) From the above (5), further comprising a demodulated data decoding unit that performs orthogonal frequency division multiplexing demodulation on the frame, extracts the FEC block from the divided data in the demodulation result using the head position, and decodes the FEC block (7) The receiving apparatus in any one of.
(9) a transmission apparatus that divides and transmits a sequence in which a predetermined number of FEC blocks each having a predetermined size are arranged in a division unit different from the size;
A communication system comprising: a receiving unit that receives the divided data; and a processing unit that performs processing for calculating a head position of the FEC block in the divided data from the predetermined size and the division unit.
(10) A reception procedure for receiving divided data generated by dividing a sequence in which a predetermined number of FEC blocks each having a predetermined size are arranged in division units different from the size;
And a processing procedure for performing a process of calculating the start position of the FEC block in the divided data from the size and the division unit.

DESCRIPTION OF SYMBOLS 100

Transmission apparatus

101, 201 Antenna 200 Reception apparatus 210 Tuner 220 AD conversion part 230 Transmission path estimation part 231 FFT size estimation part 232 Fast Fourier transform part 233 Data carrier extraction circuit 234 Transmission control signal extraction circuit 235 Transmission path estimation circuit 236 Equalization Circuit 240 Demodulated data decoding unit 300 Transmission control signal processing unit 310

Differential demodulation unit

320, 321, 322 Error correction code decoding circuit 330 FEC block pointer calculation unit 340 Synchronization word confirmation circuit 350 Error correction encoding circuit 351 FEC block size calculation unit 352 Number of data carriers in OFDM frame calculation unit 353 Next frame FEC block pointer calculation unit 360 Differential modulation unit 370 TMCC sequence generation circuit

Claims

A receiving unit that receives divided data generated by dividing a sequence in which a predetermined number of FEC (Forward Error Correction) blocks each having a predetermined size are arranged in a division unit different from the size;
A receiving apparatus comprising: a processing unit that performs a process of calculating a start position of the FEC block in the divided data from the size and the division unit.
The receiver further receives a transmission control signal including a code length and a modulation order of codewords constituting the FEC block;
The receiving apparatus according to claim 1, wherein the processing unit obtains the size from the code length and the modulation order.
The receiving device according to claim 1, wherein the processing unit calculates the next head position from the current head position, the size, and the division unit each time the divided data is received.
Further comprising a transmission path estimator for generating a demodulation result by performing orthogonal frequency division multiplex demodulation on the orthogonal frequency division multiplex modulated frame and estimating a transmission path using the demodulation result;
The frame includes the divided data,
The receiving apparatus according to claim 1, wherein the processing unit acquires the division unit from the demodulation result.
The receiving unit further receives a differentially modulated transmission control signal carrier;
The processor is
A differential demodulator for differentially demodulating the transmission control signal carrier to obtain an error correction code;
An error correction code decoding unit for decoding the error correction code to obtain a transmission control signal;
A calculation unit that calculates the head position by obtaining the size from the transmission control signal and the division unit;
An error correction encoding unit that generates an error correction code by performing error correction encoding on the transmission control signal including the calculated head position;
A differential modulation unit that differentially modulates the new error correction code to generate a new transmission control signal carrier,
The receiving apparatus according to claim 4, wherein the transmission path estimation unit performs transmission path estimation based on the new transmission control signal carrier.
The receiving apparatus according to claim 5, wherein the error correction code decoding unit performs soft decision decoding.
The receiving apparatus according to claim 5, wherein the error correction encoding unit divides the transmission control signal and performs error correction encoding.
The receiving apparatus according to claim 5, further comprising a demodulated data decoding unit that performs orthogonal frequency division multiplexing demodulation on the frame, extracts the FEC block from the divided data in the demodulation result, and decodes the FEC block.
A transmission apparatus that divides and transmits a sequence in which a predetermined number of FEC blocks each having a predetermined size are arranged, in a division unit different from the size;
A communication system comprising: a receiving unit that receives the divided data; and a processing unit that performs a process of calculating a head position of the FEC block in the divided data from the predetermined size and the division unit.
A reception procedure for receiving divided data generated by dividing a sequence in which a predetermined number of FEC blocks each having a predetermined size are arranged in division units different from the size;
And a processing procedure for performing a process of calculating the start position of the FEC block in the divided data from the size and the division unit.