WO2019237789A1 - 全双工自干扰抵消方法、设备以及计算机可读存储介质 - Google Patents
全双工自干扰抵消方法、设备以及计算机可读存储介质 Download PDFInfo
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- WO2019237789A1 WO2019237789A1 PCT/CN2019/079789 CN2019079789W WO2019237789A1 WO 2019237789 A1 WO2019237789 A1 WO 2019237789A1 CN 2019079789 W CN2019079789 W CN 2019079789W WO 2019237789 A1 WO2019237789 A1 WO 2019237789A1
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
- H04B1/40—Circuits
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
- H04B1/40—Circuits
- H04B1/50—Circuits using different frequencies for the two directions of communication
- H04B1/52—Hybrid arrangements, i.e. arrangements for transition from single-path two-direction transmission to single-direction transmission on each of two paths or vice versa
- H04B1/525—Hybrid arrangements, i.e. arrangements for transition from single-path two-direction transmission to single-direction transmission on each of two paths or vice versa with means for reducing leakage of transmitter signal into the receiver
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
- H04B1/40—Circuits
- H04B1/54—Circuits using the same frequency for two directions of communication
- H04B1/56—Circuits using the same frequency for two directions of communication with provision for simultaneous communication in two directions
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J11/00—Orthogonal multiplex systems, e.g. using WALSH codes
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J11/00—Orthogonal multiplex systems, e.g. using WALSH codes
- H04J11/0023—Interference mitigation or co-ordination
- H04J11/0026—Interference mitigation or co-ordination of multi-user interference
- H04J11/003—Interference mitigation or co-ordination of multi-user interference at the transmitter
- H04J11/0033—Interference mitigation or co-ordination of multi-user interference at the transmitter by pre-cancellation of known interference, e.g. using a matched filter, dirty paper coder or Thomlinson-Harashima precoder
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J11/00—Orthogonal multiplex systems, e.g. using WALSH codes
- H04J11/0023—Interference mitigation or co-ordination
- H04J11/0026—Interference mitigation or co-ordination of multi-user interference
- H04J11/0036—Interference mitigation or co-ordination of multi-user interference at the receiver
- H04J11/004—Interference mitigation or co-ordination of multi-user interference at the receiver using regenerative subtractive interference cancellation
Definitions
- the present invention relates to, but is not limited to, the field of communication technologies, and in particular, to a full-duplex self-interference cancellation method, device, and computer-readable storage medium.
- embodiments of the present invention are expected to provide a full-duplex self-interference cancellation method, device, and computer-readable storage medium, which can cancel self-interference signals and ensure full-duplex performance.
- An embodiment of the present invention provides a full-duplex self-interference cancellation method.
- the method includes:
- An embodiment of the present invention further provides a full-duplex self-interference cancellation device, where the device includes a memory, a processor, and a full-duplex self-interference cancellation program stored on the memory and operable on the processor, When the full-duplex self-interference cancellation program is executed by the processor, implement the steps of the full-duplex self-interference cancellation method described above.
- An embodiment of the present invention also provides a computer-readable storage medium.
- the computer-readable storage medium stores a full-duplex self-interference cancellation program, and the full-duplex self-interference cancellation program implements the foregoing when executed by a processor. Steps of the full-duplex self-interference cancellation method.
- the full-duplex self-interference cancellation method, device, and computer-readable storage medium according to the embodiments of the present invention, after performing analog-to-digital conversion and signal amplification processing on the generated self-interference cancellation signal, are coupled with a received signal containing the self-interference signal, Then the self-interference signal is cancelled out; the interference of the transmitter to the receiver in full duplex is eliminated, which not only realizes the full duplex transceiver, but also guarantees the performance of full duplex.
- FIG. 1 is a schematic flowchart of a full-duplex self-interference cancellation method according to an embodiment of the present invention
- FIG. 2 is a general block diagram of a full-duplex transceiver according to an embodiment of the present invention
- FIG. 3 is a general block diagram of a frame structure of a full-duplex transceiver according to an embodiment of the present invention
- FIG. 4 is a schematic diagram of a downlink frame structure of a full-duplex transceiver according to an embodiment of the present invention
- FIG. 5 is a schematic diagram of an uplink frame structure of a full-duplex transceiver according to an embodiment of the present invention
- FIG. 6 is a schematic structural diagram of a downlink self-interference cancellation frame of a full-duplex transceiver according to an embodiment of the present invention
- FIG. 7 is a schematic structural diagram of an uplink self-interference cancellation frame of a full-duplex transceiver according to an embodiment of the present invention.
- FIG. 8 is a schematic structural diagram of a full-duplex self-interference cancellation device according to an embodiment of the present invention.
- full-duplex technology is mainly focused on two aspects: one is to enhance the isolation of the radio frequency receiving and transmitting channels, and the other is to use radio frequency self-interference cancellation technology.
- the isolation of RF isolation technology is usually difficult to increase to more than 30db, and the implementation of RF self-interference cancellation technology is quite complicated and the delay processing is difficult.
- full-duplex self-interference cancellation can be achieved by: generating a self-interference cancellation signal according to a transmitted signal; processing the self-interference cancellation signal to obtain a processed self-interference cancellation signal; and processing the processing The subsequent self-interference cancellation signal is coupled with the received signal containing the self-interference signal, so that the self-interference signal is cancelled.
- FIG. 1 is a schematic flowchart of a full-duplex self-interference cancellation method according to an embodiment of the present invention. As shown in FIG. 1, the full-duplex self-interference cancellation method provided by an embodiment of the present invention includes:
- Step S11 Generate a self-interference cancellation signal according to the transmitted signal; and process the self-interference cancellation signal to obtain a processed self-interference cancellation signal.
- the generated self-interference cancellation signal is used for IF analog self-interference cancellation.
- the processing the self-interference cancellation signal includes:
- the self-interference cancellation signal generated according to the transmitted signal is a digital signal, an analog signal is obtained through digital-to-analog conversion processing, and then signal amplification processing is performed.
- Step S12 coupling the processed self-interference cancellation signal with a received signal containing the self-interference signal, so as to cancel the self-interference signal.
- the self-interference signal is cancelled, and sufficient dynamics is provided for subsequent circuits.
- the self-interference signal is the interference from the transmitter to the receiver in full duplex.
- the full-duplex transceiver includes a low noise amplifier (LNA) 211, down conversion 212, receiving IF 214, receiving analog to digital converter (ADC) 215, and baseband ( Baseband) 216, Digital to Analog Converter (DAC) 217, Intermediate Frequency (IF) 218, Upconverter 219, and Power Amplifier (PA) 220.
- LNA low noise amplifier
- ADC analog to digital converter
- Baseband Baseband
- DAC Digital to Analog Converter
- IF Intermediate Frequency
- Upconverter 219 Upconverter 219
- PA Power Amplifier
- baseband 216 After the baseband 216 generates the transmitted signal, it is transmitted through the transmitting DAC217, transmitting IF218, upconverting 219, and PA220, and a part of the energy will be coupled to the receiver signal to form interference.
- IF214, receiving ADC215 reaches baseband 216.
- a digital-to-analog conversion unit 221, an amplification unit 222, and a coupling unit 213 are added to the full-duplex transceiver.
- the baseband 216 can generate a self-interference cancellation signal according to the transmitted signal.
- the digital-to-analog conversion unit 221 is configured to convert the digital self-interference cancellation signal into an analog self-interference cancellation signal.
- the amplification unit 222 is configured to amplify the analog self-interference cancellation signal.
- the coupling unit 213 is configured to couple the amplified self-interference cancellation signal with a received signal containing the self-interference signal to cancel the self-interference signal.
- the processing the self-interference cancellation signal before obtaining the processed self-interference cancellation signal further includes:
- the self-interference cancellation circuit refers to a digital-to-analog conversion unit 221, an amplification unit 222, and a coupling unit 213.
- the determining a self-interfering channel response includes:
- the self-interference channel response is determined by detecting a pilot signal of a pilot signal monitoring bit or in a code division manner.
- Figure 3 is a general block diagram of the frame structure of a full-duplex transceiver.
- the full-duplex transceiver includes a Downlink-Reference Signal (D-RS) and a downlink pilot signal monitoring bit tD-RS.
- D-RS Downlink-Reference Signal
- tD-RS downlink pilot signal monitoring bit
- the transmitter of the industrial base station transmits the downlink pilot signal T DRS at the downlink pilot signal bit D-RS, and detects that the signal of the monitoring bit tD-RS of the downlink pilot signal is R tDRS , and the transmitter-to-receiver can be calculated.
- the code division method is suitable for a full-duplex base station transceiver with multiple transmitting antennas.
- the code division method can be used to transmit pilots, and the channel response of each transmitter's self-interference can be distinguished by the code division method.
- determining the channel response of the self-interference cancellation loop includes:
- the channel response of the self-interference cancellation loop is determined by detecting a pilot signal of the self-interference cancellation bit.
- the self-interference cancellation signal is T CRS
- the detected pilot signal of the self-interference cancellation bit dC-RS is R dCRS
- the adjusting the self-interference cancellation signal includes:
- coupling the processed self-interference cancellation signal with a received signal containing the self-interference signal so that after canceling the self-interference signal further includes:
- a residual self-interference signal is detected, and a digital self-interference cancellation process is performed on the received signal.
- the residual self-interference signal is detected through baseband to perform digital self-interference cancellation processing.
- performing digital self-interference cancellation processing on the received signal further includes;
- the received signal is demodulated to obtain normal received data.
- the full duplex of the base station transceiver, full duplex terminal transceiver, and multiple transmitting antennas is used in conjunction with Figures 3 to 7 below.
- the base transceiver station explains:
- FIGS. 3 to 7 are a general block diagram of a full-duplex transceiver frame structure.
- the full-duplex transceiver frame structure may include: a downlink pilot signal monitoring bit tD-RS, an uplink pilot signal monitoring bit tU-RS, and a downlink pilot signal bit.
- D-RS uplink pilot signal bit (Uplink-Reference Signal, U-RS), downlink self-interference cancellation bit dC-RS, uplink self-interference cancellation bit uC-RS, downlink data D-DATA, and uplink data U-DATA.
- FIG. 3 shows a schematic diagram of the downlink frame structure of a full-duplex transceiver.
- the downlink frame of a full-duplex transceiver includes a downlink pilot signal bit D-RS (including the downlink pilot signal monitoring bit tD-RS) and downlink data. D-DATA.
- Figure 5 is a schematic diagram of the uplink frame structure of a full-duplex transceiver.
- the uplink frame of a full-duplex transceiver includes the uplink pilot signal bit U-RS (including the uplink pilot signal monitoring bit tU-RS) and the uplink data U-DATA.
- FIG. 6 is a structure diagram of a downlink self-interference cancellation frame of a full-duplex transceiver.
- the downlink self-interference cancellation frame of a full-duplex transceiver includes a downlink pilot signal bit D-RS and a downlink self-interference cancellation bit dC-RS (that is, the figure C-RS) and downlink data D-DATA.
- FIG. 7 is a structure diagram of an uplink self-interference cancellation frame of a full-duplex transceiver.
- the uplink self-interference cancellation frame of a full-duplex transceiver includes an uplink pilot signal bit U-RS and an uplink self-interference cancellation bit uC-RS. As shown in the C-RS) and the uplink data U-DATA.
- the downlink pilot signal transmitted by the base station is T DRS
- the pilot signal of the detected downlink pilot signal monitoring bit tD-RS is R tDRS (the monitoring bit tD-RS can refer to FIG. 3).
- the adjustment coefficient ⁇ can be calculated as follows:
- the signal received by the receiver at the downlink pilot signal bit D-RS consists of two parts: the downlink interference pilot signal R DRS , the downlink self-interference cancellation pilot signal C DRS , the downlink interference pilot signal R DRS, and the downlink self-interference
- the sum of the cancellation pilot signals C DRS is the signal after self-interference cancellation coupling, and it is denoted as X DRS .
- X DRS looks like this:
- the signal received by the receiver in the data area consists of three parts: uplink data R UDATA , downlink interference data R DDATA , downlink self-interference cancellation data C DDATA , uplink data R UDATA , downlink interference data R DDATA, and downlink self-interference cancellation data C
- the sum of DDATA is the data after self-interference cancellation, and it is recorded as X DATA .
- X DATA looks like this:
- the data after the self-interference cancellation continues to perform digital self-interference cancellation processing. If the baseband detects that the residual pilot at the downlink pilot signal bit D-RS is X DRS , find the residual response x h ,
- x h X DRS / T DRS ;
- the uplink pilot signal transmitted by the terminal is T URS
- the detected pilot signal of the uplink pilot signal monitoring bit tU-RS is R tURS
- the channel from the transmitter to the receiver can be obtained.
- the adjustment coefficient ⁇ can be calculated as follows:
- the signal received by the receiver at the uplink pilot signal bit U-RS consists of two parts: the uplink interference pilot signal R URS , the uplink self-interference cancellation pilot signal C URS , the uplink interference pilot signal R URS, and the uplink self-interference.
- the sum of the cancellation pilot signal C URS is the signal after self-interference cancellation coupling, which is denoted as X URS .
- X URS looks like this:
- the signal received by the receiver in the data area consists of three parts: downlink data R DDATA , uplink interference data R UDATA , uplink self-interference cancellation data C UDATA , downlink data R DDATA , uplink interference data R UDATA, and uplink self-interference cancellation data C UDATA , the sum is the data after self-interference cancellation, recorded as X DATA .
- X DATA looks like this:
- the data after the self-interference cancellation continues to perform digital self-interference cancellation processing. If the residual pilot at the U-RS bit of the uplink pilot signal detected by the baseband is X URS , find the residual response x h ,
- the key is to distinguish the channel response from each transmit antenna to the receiver.
- the pilot can be transmitted by code division, and the channel response of each transmitter's self-interference can be distinguished by the code division.
- the transmission cycle is a cycle of 4 times:
- the transmitting antenna 1 transmit -T rs at time 4, let the transmitting antenna 2 transmit T rs at time 4, let the transmitting antenna 3 transmit T rs at time 4, and let the transmitting antenna 4 transmit T rs at time 4.
- the channel response from transmitting antenna 1 to the receiver be h 1
- the channel response from transmitting antenna 2 to the receiver be h 2
- the channel response from transmitting antenna 3 to the receiver be h 3
- transmitting antenna 4 to the receiver be The channel response is h 4 .
- the self-interference pilot R 1 received by the receiver at time 1 is:
- R 1 (h 1 + h 2 + h 3 -h 4 ) T rs
- the self-interference pilots R 2 , R 3 , and R 4 received by the receiver at time 2 , 3 , and 4 are:
- R 2 (h 1 + h 2 -h 3 + h 4 ) T rs
- R 3 (h 1 -h 2 + h 3 + h 4 ) T rs
- R 4 (-h 1 + h 2 + h 3 + h 4 ) T rs
- h 1 (R 1 + R 2 + R 3 -R 4 ) / 4T rs
- h 3 (R 1 -R 2 + R 3 + R 4 ) / 4T rs
- h 4 (-R 1 + R 2 + R 3 + R 4 ) / 4T rs
- ⁇ 1 h 1 / h c
- the full-duplex self-interference cancellation method of the embodiment of the present invention after performing analog-to-digital conversion and signal amplification processing on the generated self-interference cancellation signal, is coupled with a received signal containing the self-interference signal, thereby canceling the self-interference signal; It solves the problem of interference between the transmitter and the receiver in full duplex; both the full duplex transceiver and the full duplex performance are guaranteed.
- FIG. 8 is a schematic structural diagram of a full-duplex self-interference cancellation device according to an embodiment of the present invention.
- the full-duplex self-interference cancellation device provided by an embodiment of the present invention includes: And a full-duplex self-interference cancellation program stored in the memory 31 and operable on the processor 32.
- the full-duplex self-interference cancellation program is executed by the processor 32, it is used to implement The steps of the full-duplex self-interference cancellation method described below:
- the full-duplex self-interference cancellation program When executed by the processor 32, it is also used to implement the steps of the full-duplex self-interference cancellation method described below:
- the full-duplex self-interference cancellation program When executed by the processor 32, it is also used to implement the steps of the full-duplex self-interference cancellation method described below:
- the self-interference channel response is determined by detecting a pilot signal of a pilot signal monitoring bit or in a code division manner.
- the full-duplex self-interference cancellation program When executed by the processor 32, it is also used to implement the steps of the full-duplex self-interference cancellation method described below:
- the channel response of the self-interference cancellation loop is determined by detecting a pilot signal of the self-interference cancellation bit.
- the full-duplex self-interference cancellation program When executed by the processor 32, it is also used to implement the steps of the full-duplex self-interference cancellation method described below:
- the full-duplex self-interference cancellation program When executed by the processor 32, it is also used to implement the steps of the full-duplex self-interference cancellation method described below:
- the full-duplex self-interference cancellation program When executed by the processor 32, it is further configured to implement the steps of the full-duplex self-interference cancellation method described below:
- a residual self-interference signal is detected, and a digital self-interference cancellation process is performed on the received signal.
- the full-duplex self-interference cancellation program When executed by the processor 32, it is also used to implement the steps of the full-duplex self-interference cancellation method described below:
- the full-duplex self-interference cancellation device after performing analog-to-digital conversion and signal amplification processing on the generated self-interference cancellation signal, couples with the received signal containing the self-interference signal, thereby canceling the self-interference signal; It solves the problem of interference between the transmitter and the receiver in full duplex; both the full duplex transceiver and the full duplex performance are guaranteed.
- An embodiment of the present invention also provides a computer-readable storage medium.
- the computer-readable storage medium stores a full-duplex self-interference cancellation program, and the full-duplex self-interference cancellation program is used to implement the present invention when executed by a processor.
- the computer-readable storage medium provided by the embodiment of the present invention belongs to the same concept as the method provided by the embodiment of the present invention.
- the technical features in the method embodiment are implemented in some The examples are applicable correspondingly, and will not be repeated here.
- the computer-readable storage medium of the embodiment of the present invention after performing analog-to-digital conversion and signal amplification processing on the generated self-interference cancellation signal, is coupled with the received signal containing the self-interference signal, thereby canceling the self-interference signal;
- the problem of transmitter-to-receiver interference in duplex; both the full-duplex transceiver and the full-duplex performance are guaranteed.
- Such software may be distributed on computer-readable media, which may include computer storage media (or non-transitory media) and communication media (or transitory media).
- computer storage media or non-transitory media
- communication media or transitory media.
- computer storage medium includes both volatile and nonvolatile implementations in any method or technology used to store information such as computer-readable instructions, data structures, program modules or other data. Removable, removable and non-removable media.
- Computer storage media include, but are not limited to, Random Access Memory (RAM), Read-Only Memory (ROM), Electrically Erasable Programmable Read Only Memory (EEPROM), Flash memory or other memory technology, CD-ROM, digital versatile disk (DVD) or other optical disk storage, magnetic cartridge, magnetic tape, magnetic disk storage or other magnetic storage device, or any device that can be used to store desired information and can be accessed by a computer Other media.
- a communication medium typically contains computer-readable instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave or other transmission mechanism, and may include any information delivery medium .
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Abstract
本发明公开了一种全双工自干扰抵消方法、设备以及计算机可读存储介质,该方法包括:根据发射信号生成自干扰抵消信号;对所述自干扰抵消信号进行处理,得到处理后的自干扰抵消信号;将所述处理后的自干扰抵消信号与含有自干扰信号的接收信号进行耦合,以使得抵消掉所述自干扰信号。
Description
相关申请的交叉引用
本申请基于申请号为201810618022.2、申请日为2018年06月15日的中国专利申请提出,并要求该中国专利申请的优先权,该中国专利申请的全部内容在此引入本申请作为参考。
本发明涉及但不限于通信技术领域,尤其涉及一种全双工自干扰抵消方法、设备以及计算机可读存储介质。
移动通讯系统通常以频分双工或时分双工方式工作,这种双工方式相比全双工理论上约有1倍的频谱效率损失,然而,采用全双工方式不可避免的存在发射机对接收机的干扰。
发明内容
有鉴于此,本发明实施例期望提供一种全双工自干扰抵消方法、设备以及计算机可读存储介质,能够抵消掉自干扰信号,保证全双工的性能。
本发明实施例提供了一种全双工自干扰抵消方法,所述方法包括:
根据发射信号生成自干扰抵消信号;对所述自干扰抵消信号进行处理,得到处理后的自干扰抵消信号;
将所述处理后的自干扰抵消信号与含有自干扰信号的接收信号进行耦合,以使得抵消掉所述自干扰信号。
本发明实施例还提供了一种全双工自干扰抵消设备,所述设备包括存储器、处理器及存储在所述存储器上并可在所述处理器上运行的全双工自 干扰抵消程序,所述全双工自干扰抵消程序被所述处理器执行时实现上述的全双工自干扰抵消方法的步骤。
本发明实施例还提供了一种计算机可读存储介质,所述计算机可读存储介质上存储有全双工自干扰抵消程序,所述全双工自干扰抵消程序被处理器执行时实现上述的全双工自干扰抵消方法的步骤。
本发明实施例的全双工自干扰抵消方法、设备以及计算机可读存储介质,通过对生成的自干扰抵消信号进行模数转换和信号放大处理之后,与含有自干扰信号的接收信号进行耦合,进而抵消掉自干扰信号;消除了全双工中发射机对接收机的干扰,既实现了全双工收发信机,又保证了全双工的性能。
图1为本发明实施例提供的全双工自干扰抵消方法流程示意图;
图2为本发明实施例提供的全双工收发信机总体框图;
图3为本发明实施例提供的全双工收发信机帧结构总体框图;
图4为本发明实施例提供的全双工收发信机下行帧结构示意图;
图5为本发明实施例提供的全双工收发信机上行帧结构示意图;
图6为本发明实施例提供的全双工收发信机下行自干扰抵消帧结构示意图;
图7为本发明实施例提供的全双工收发信机上行自干扰抵消帧结构示意图;
图8为本发明实施例提供的全双工自干扰抵消设备结构示意图。
为了使本发明所要解决的技术问题、技术方案及有益效果更加清楚、明白,以下结合附图和实施例,对本发明进行进一步详细说明。应当理解, 此处所描述的具体实施例仅仅用以解释本发明,并不用于限定本发明。
发明人在研究过程中发现相关技术中,全双工技术主要集中于2个方面:一是增强射频收发信道的隔离,二是使用射频自干扰抵消技术。但射频隔离技术的隔离度通常很难提升到30db以上,而射频自干扰抵消技术的实现又相当复杂、时延处理较为困难。
在一些实施例中,可通过如下方式实现全双工自干扰抵消:根据发射信号生成自干扰抵消信号;对所述自干扰抵消信号进行处理,得到处理后的自干扰抵消信号;将所述处理后的自干扰抵消信号与含有自干扰信号的接收信号进行耦合,以使得抵消掉所述自干扰信号。接下来详细进行说明。
图1为本发明实施例提供的全双工自干扰抵消方法流程示意图,如图1所示,本发明实施例提供的全双工自干扰抵消方法包括:
步骤S11:根据发射信号生成自干扰抵消信号;对所述自干扰抵消信号进行处理,得到处理后的自干扰抵消信号。
在一些实施例中,生成的自干扰抵消信号用于中频模拟自干扰抵消。
在一些实施例中,所述对所述自干扰抵消信号进行处理包括:
对所述自干扰抵消信号进行数模转换和信号放大处理。
在一些实施例中,根据发射信号生成的自干扰抵消信号为数字信号,通过数模转换处理得到模拟信号,然后再进行信号放大处理。
步骤S12:将所述处理后的自干扰抵消信号与含有自干扰信号的接收信号进行耦合,以使得抵消掉所述自干扰信号。
在一些实施例中,通过将放大的自干扰抵消信号与含有自干扰信号的接收信号进行耦合,抵消掉自干扰信号,为后续回路提供足够的动态。自干扰信号即为全双工中发射机对接收机干扰。
为了更好地阐述自干扰信号的抵消过程,以下结合图2的全双工收发信机框图进行说明:
如图2所示,全双工收发信机包括低噪放放大器(Low Noise Amplifier,LNA)211、下变频212、接收IF214、接收模数转换器(Analog to Digital Converter,ADC)215、基带(Baseband)216、发射数模转换器(Digital to Analog Converter,DAC)217、发射中频(Intermediate Frequency,IF)218、上变频219、功率放大器(Power Amplifier,PA)220。各个模块的功能可参考相关技术的记载,在此不作赘述。
基带216生成发射信号后,经发射DAC217、发射IF218、上变频219、PA220发射出去,其中有一部分能量会耦合到接收机信号形成干扰,即与正常的接收信号一起经LNA211、下变频212、接收IF214、接收ADC215到达基带216。
为了对自干扰信号进行抵消,在全双工收发信机中增加数模转换单元221、放大单元222和耦合单元213。基带216可根据发射信号生成自干扰抵消信号,数模转换单元221,配置为将数字的自干扰抵消信号转换为模拟的自干扰抵消信号,放大单元222,配置为放大模拟的自干扰抵消信号,耦合单元213,配置为将放大的自干扰抵消信号与含有自干扰信号的接收信号进行耦合,抵消掉自干扰信号。
在一种实施方式中,所述对所述自干扰抵消信号进行处理,得到处理后的自干扰抵消信号之前还包括:
确定自干扰信道响应和自干扰抵消回路的信道响应;
根据所述自干扰信道响应和所述自干扰抵消回路的信道响应,对所述自干扰抵消信号进行调整。
以图2的全双工收发信机为例,自干扰抵消回路指的是数模转换单元221、放大单元222和耦合单元213。
在一些实施方式中,所述确定自干扰信道响应包括:
通过检测导频信号监控位的导频信号或者通过码分方式,确定所述自干扰信道响应。
作为示例,请参考图3所示。图3为全双工收发信机帧结构总体框图,全双工收发信机包括下行导频信号位(Downlink-Reference Signal,D-RS)和下行导频信号监控位tD-RS,假设全双工基站的发射机在下行导频信号位D-RS发射下行导频信号为T
DRS,检测到下行导频信号监控位tD-RS的信号为R
tDRS,即可计算出发射机到接收机的信道响应h
T,其中h
T=R
tDRS/T
DRS。
码分方式适用于多发射天线的全双工基站收发信机,可以采用码分方式来发射导频,再通过码分方式区分出每个发射机自干扰的信道响应。
在一些实施方式中,所述确定自干扰抵消回路的信道响应包括:
通过检测自干扰抵消位的导频信号,确定所述自干扰抵消回路的信道响应。
接上述示例地,请参考图3所示。假设自干扰抵消信号为T
CRS,检测到的自干扰抵消位dC-RS的导频信号为R
dCRS,进而可求得自干扰抵消回路的信道响应h
C,其中h
C=R
dCRS/T
CRS。
在一些实施方式中,所述对所述自干扰抵消信号进行调整包括:
对所述自干扰抵消信号的时延、相位以及幅度进行调整。
在另一种实施方式中,所述将所述处理后的自干扰抵消信号与含有自干扰信号的接收信号进行耦合,以使得抵消掉所述自干扰信号之后还包括:
检测残余的自干扰信号,对所述接收信号进行数字自干扰抵消处理。
在一些实施方式中,在将处理后的自干扰抵消信号与含有自干扰信号的接收信号进行耦合之后,通过基带检测残余的自干扰信号,以进行数字自干扰抵消处理。
在一些实施方式中,所述检测残余的自干扰信号,对所述接收信号进行数字自干扰抵消处理之后还包括;
对数字自干扰抵消处理后的接收信号进行解调。
在一些实施方式中,在将处理后的自干扰抵消信号与含有自干扰信号的接收信号进行耦合以及数字自干扰抵消处理之后,对接收信号进行解调, 即得到正常接收数据。
为了更好地阐述自干扰抵消信号的调整以及数字自干扰抵消处理,以下结合图3-图7并以全双工基站收发信机、全双工终端收发信机以及多发射天线的全双工基站收发信机进行说明:
首先对图3-图7中的帧结构进行说明。图3为全双工收发信机帧结构总体框图,全双工收发信机帧结构可包括:下行导频信号监控位tD-RS、上行导频信号监控位tU-RS、下行导频信号位D-RS、上行导频信号位(Uplink-Reference Signal,U-RS)、下行自干扰抵消位dC-RS、上行自干扰抵消位uC-RS、下行数据D-DATA以及上行数据U-DATA。
基于图3的全双工收发信机帧结构总体框图,可以很容易得到全双工收发信机在上行传输和下行传输时的帧结构。如图4所示为全双工收发信机下行帧结构示意图,全双工收发信机下行帧包括下行导频信号位D-RS(其中包括下行导频信号监控位tD-RS)以及下行数据D-DATA。图5为全双工收发信机上行帧结构示意图,全双工收发信机上行帧包括上行导频信号位U-RS(其中包括上行导频信号监控位tU-RS)以及上行数据U-DATA。图6为全双工收发信机下行自干扰抵消帧结构示意图,全双工收发信机下行自干扰抵消帧包括下行导频信号位D-RS、下行自干扰抵消位dC-RS(即图中的C-RS所示)以及下行数据D-DATA。图7为全双工收发信机上行自干扰抵消帧结构示意图,全双工收发信机上行自干扰抵消帧包括上行导频信号位U-RS、上行自干扰抵消位uC-RS(即图中的C-RS所示)以及上行数据U-DATA。
1)、全双工基站收发信机
如图3所示,假设基站发射的下行导频信号为T
DRS,检测到的下行导频信号监控位tD-RS的导频信号为R
tDRS(监控位tD-RS可参考图3所示),进而可求得发射机到接收机的信道响应h
T,其中h
T=R
tDRS/T
DRS;时延τ
T可通过同一时刻发射的导频信号,确定不同子载波的相位差和间隔频率,将 相位差除以间隔频率得到所述时延τ
T。
假设自干扰抵消导频信号为T
CRS,检测到的自干扰抵消位dC-RS的导频信号为R
dCRS,进而可求得自干扰抵消回路的信道响应h
C及时延τ
C(时延τ
C的计算方式与上述时延τ
T类似,在此不作赘述),其中h
C=R
dCRS/T
CRS;
根据τ调整自干扰抵消信号的时延,其中τ=τ
C-τ
T,此时自干扰抵消信号即与接收机耦合的发射信号对齐。
根据调整系数γ调整自干扰抵消信号的幅度和相位,调整系数γ可通过如下方式计算得到:
接收机在下行导频信号位D-RS处收到的信号由2部分组成:下行干扰导频信号R
DRS、下行自干扰抵消导频信号C
DRS,下行干扰导频信号R
DRS和下行自干扰抵消导频信号C
DRS之和即为经过自干扰抵消耦合后的信号,记为X
DRS。X
DRS如下所示:
X
DRS=R
DRS+C
DRS=h
T*T
DRS+h
C*γ*T
DRS=[h
T+h
C*γ]*T
DRS
记x
h=h
T+h
C*γ,x
h代表残余响应,上式可简写为:
X
DRS=x
h*T
DRS≈0
接收机在数据区收到的信号由3部分组成:上行数据R
UDATA、下行干扰数据R
DDATA、下行自干扰抵消数据C
DDATA,上行数据R
UDATA、下行干扰数据R
DDATA以及下行自干扰抵消数据C
DDATA之和为自干扰抵消后的数据,记为X
DATA。X
DATA如下所示:
X
DATA=R
UDATA+R
DDATA+C
DDATA=R
UDATA+h
T*T
DDATA+h
C*γ*T
DDATA
X
DATA=R
UDATA+[h
T+h
C*γ]*T
DDATA=R
UDATA+x
h*T
DDATA
≈R
UDATA
自干扰抵消后的数据继续进行数字自干扰抵消处理。若基带检测到下行导频信号位D-RS处的残余导频为X
DRS,求得残余响应x
h,
x
h=X
DRS/T
DRS;
对自干扰抵消后的数据X
DATA进行数字自干扰抵消,得到较纯的上行数据R
UDATA:
X
DATA-x
h*T
DDATA=R
UDATA。
2)、全双工终端收发信机
仍参考图3所示,假设终端发射的上行导频信号为T
URS,检测到的上行导频信号监控位tU-RS的导频信号为R
tURS,进而可求得发射机到接收机的信道响应h
T及时延τ
T(时延τ
T的计算方式与上述类似,在此不作赘述),其中h
T=R
tURS/T
URS;
假设自干扰抵消导频信号为T
CRS,检测到的自干扰抵消位uC-RS的导频信号为R
uCRS,进而可求得自干扰抵消回路的信道响应h
C及时延τ
C(时延τ
C的计算方式与上述类似,在此不作赘述),其中h
C=R
uCRS/T
CRS;
根据τ调整自干扰抵消信号的时延,其中τ=τ
C-τ
T,此时自干扰抵消信号即与接收机耦合的发射信号对齐。
根据调整系数γ调整自干扰抵消信号的幅度和相位,调整系数γ可通过如下方式计算得到:
接收机在上行导频信号位U-RS处收到的信号由2部分组成:上行干扰导频信号R
URS、上行自干扰抵消导频信号C
URS,上行干扰导频信号R
URS和上行自干扰抵消导频信号C
URS之和即为经过自干扰抵消耦合后的信号,记为X
URS。X
URS如下所示:
X
URS=R
URS+C
URS=h
T*T
URS+h
C*γ*T
URS=[h
T+h
C*γ]*T
URS
记x
h=h
T+h
C*γ,x
h代表残余响应,上式可简写为:
X
URS=x
h*T
URS≈0
接收机在数据区收到的信号由3部分组成:下行数据R
DDATA、上行干扰数据R
UDATA、上行自干扰抵消数据C
UDATA,下行数据R
DDATA、上行干扰 数据R
UDATA以及上行自干扰抵消数据C
UDATA,之和为自干扰抵消后的数据,记为X
DATA。X
DATA如下所示:
X
DATA=R
DDATA+R
UDATA+C
UDATA=R
DDATA+h
T*T
UDATA+h
C*γ*T
UDATA
X
DATA=R
DDATA+[h
T+h
C*γ]*T
UDATA=R
DDATA+x
h*T
UDATA
≈R
DDATA
自干扰抵消后的数据继续进行数字自干扰抵消处理。若基带检测的上行导频信号位U-RS处的残余导频为X
URS,求得残余响应x
h,
x
h=X
URS/T
URS
对自干扰抵消后的数据X
DATA进行数字自干扰抵消,得到较纯的下行数据R
DDATA:
X
DATA-x
h*T
UDATA=R
DDATA。
3)、多发射天线的全双工基站收发信机
对多发射天线的全双工基站收发信机,关键是要区分出每个发射天线到接收机的信道响应。可以采用码分的方法来发射导频,再通过码分的方法区分出每个发射机自干扰的信道响应。
以4天线为例,发射周期以4个时刻为一循环:
令发射天线1在时刻1发射T
rs,令发射天线2在时刻1发射T
rs,令发射天线3在时刻1发射T
rs,令发射天线4在时刻1发射-T
rs;
令发射天线1在时刻2发射T
rs,令发射天线2在时刻2发射T
rs,令发射天线3在时刻2发射-T
rs,令发射天线4在时刻2发射T
rs;
令发射天线1在时刻3发射T
rs,令发射天线2在时刻3发射-T
rs,令发射天线3在时刻3发射T
rs,令发射天线4在时刻3发射T
rs;
令发射天线1在时刻4发射-T
rs,令发射天线2在时刻4发射T
rs,令发射天线3在时刻4发射T
rs,令发射天线4在时刻4发射T
rs。
设发射天线1到接收机的信道响应为h
1,设发射天线2到接收机的信道响应为h
2,设发射天线3到接收机的信道响应为h
3,设发射天线4到接 收机的信道响应为h
4。则时刻1接收机收到的自干扰导频R
1为:
R
1=(h
1+h
2+h
3-h
4)T
rs
同样可写出时刻2、3、4接收机收到的自干扰导频R
2、R
3、R
4分别为:
R
2=(h
1+h
2-h
3+h
4)T
rs
R
3=(h
1-h
2+h
3+h
4)T
rs
R
4=(-h
1+h
2+h
3+h
4)T
rs
这样不难求出h
1、h
2、h
3、h
4分别为:
h
1=(R
1+R
2+R
3-R
4)/4T
rs
h
2=(R
1+R
2-R
3+R
4)/4T
rs
h
3=(R
1-R
2+R
3+R
4)/4T
rs
h
4=(-R
1+R
2+R
3+R
4)/4T
rs
仍记自干扰抵消回路的信道响应为h
C,则4路自干扰抵消信号的调整系数分别为:
γ
1=h
1/h
c
γ
2=h
2/h
c
γ
3=h
3/h
c
γ
4=h
4/h
c
在确定上述参数之后,后续的处理过程与1)、2)的类似,在此不作赘述。
本发明实施例的全双工自干扰抵消方法,通过对生成的自干扰抵消信号进行模数转换和信号放大处理之后,与含有自干扰信号的接收信号进行耦合,进而抵消掉自干扰信号;解决了全双工中发射机对接收机干扰的问题;既实现了全双工收发信机,又保证了全双工的性能。
在一些实施例中,图8为本发明实施例提供的全双工自干扰抵消设备结构示意图,如图8所示,本发明实施例提供的全双工自干扰抵消设备包括:存储器31、处理器32及存储在所述存储器31上并可在所述处理器32 上运行的全双工自干扰抵消程序,所述全双工自干扰抵消程序被所述处理器32执行时,用于实现以下所述的全双工自干扰抵消方法的步骤:
根据发射信号生成自干扰抵消信号;对所述自干扰抵消信号进行处理,得到处理后的自干扰抵消信号;
将所述处理后的自干扰抵消信号与含有自干扰信号的接收信号进行耦合,以使得抵消掉所述自干扰信号。
所述全双工自干扰抵消程序被所述处理器32执行时,还用于实现以下所述的全双工自干扰抵消方法的步骤:
确定自干扰信道响应和自干扰抵消回路的信道响应;
根据所述自干扰信道响应和所述自干扰抵消回路的信道响应,对所述自干扰抵消信号进行调整。
所述全双工自干扰抵消程序被所述处理器32执行时,还用于实现以下所述的全双工自干扰抵消方法的步骤:
通过检测导频信号监控位的导频信号或者通过码分方式,确定所述自干扰信道响应。
所述全双工自干扰抵消程序被所述处理器32执行时,还用于实现以下所述的全双工自干扰抵消方法的步骤:
通过检测自干扰抵消位的导频信号,确定所述自干扰抵消回路的信道响应。
所述全双工自干扰抵消程序被所述处理器32执行时,还用于实现以下所述的全双工自干扰抵消方法的步骤:
对所述自干扰抵消信号的时延、相位以及幅度进行调整。
所述全双工自干扰抵消程序被所述处理器32执行时,还用于实现以下所述的全双工自干扰抵消方法的步骤:
对所述自干扰抵消信号进行数模转换和信号放大处理。
所述全双工自干扰抵消程序被所述处理器32执行时,还用于实现以下 所述的全双工自干扰抵消方法的步骤:
检测残余的自干扰信号,对所述接收信号进行数字自干扰抵消处理。
所述全双工自干扰抵消程序被所述处理器32执行时,还用于实现以下所述的全双工自干扰抵消方法的步骤:
对数字自干扰抵消处理后的接收信号进行解调。
本发明实施例的全双工自干扰抵消设备,通过对生成的自干扰抵消信号进行模数转换和信号放大处理之后,与含有自干扰信号的接收信号进行耦合,进而抵消掉自干扰信号;解决了全双工中发射机对接收机干扰的问题;既实现了全双工收发信机,又保证了全双工的性能。
本发明实施例还提供一种计算机可读存储介质,所述计算机可读存储介质上存储有全双工自干扰抵消程序,所述全双工自干扰抵消程序被处理器执行时用于实现本发明实施例提供的全双工自干扰抵消方法的步骤。
需要说明的是,本发明实施例提供的计算机可读存储介质,与本发明实施例提供的方法属于同一构思,其具体实现过程详细见方法实施例,且方法实施例中的技术特征在一些实施例中均对应适用,这里不再赘述。
本发明实施例的计算机可读存储介质,通过对生成的自干扰抵消信号进行模数转换和信号放大处理之后,与含有自干扰信号的接收信号进行耦合,进而抵消掉自干扰信号;解决了全双工中发射机对接收机干扰的问题;既实现了全双工收发信机,又保证了全双工的性能。
本领域普通技术人员可以理解,上文中所公开方法中的全部或某些步骤、系统、装置中的功能模块/单元可以被实施为软件、固件、硬件及其适当的组合。在硬件实施方式中,在以上描述中提及的功能模块/单元之间的划分不一定对应于物理组件的划分;例如,一个物理组件可以具有多个功能,或者一个功能或步骤可以由若干物理组件合作执行。某些物理组件或所有物理组件可以被实施为由处理器,如中央处理器、数字信号处理器或 微处理器执行的软件,或者被实施为硬件,或者被实施为集成电路,如专用集成电路。这样的软件可以分布在计算机可读介质上,计算机可读介质可以包括计算机存储介质(或非暂时性介质)和通信介质(或暂时性介质)。如本领域普通技术人员公知的,术语计算机存储介质包括在用于存储信息(诸如计算机可读指令、数据结构、程序模块或其他数据)的任何方法或技术中实施的易失性和非易失性、可移除和不可移除介质。计算机存储介质包括但不限于随机存取存储器(Random Access Memory,RAM)、只读存储器(Read-Only Memory,ROM)、带电可擦可编程只读存储器(Electrically Erasable Programmable read only memory,EEPROM)、闪存或其他存储器技术、CD-ROM、数字多功能盘(DVD)或其他光盘存储、磁盒、磁带、磁盘存储或其他磁存储装置、或者可以用于存储期望的信息并且可以被计算机访问的任何其他的介质。此外,本领域普通技术人员公知的是,通信介质通常包含计算机可读指令、数据结构、程序模块或者诸如载波或其他传输机制之类的调制数据信号中的其他数据,并且可包括任何信息递送介质。
以上参照附图说明了本发明的优选实施例,并非因此局限本发明的权利范围。本领域技术人员不脱离本发明的范围和实质内所作的任何修改、等同替换和改进,均应在本发明的权利范围之内。
Claims (10)
- 一种全双工自干扰抵消方法,所述方法包括:根据发射信号生成自干扰抵消信号;对所述自干扰抵消信号进行处理,得到处理后的自干扰抵消信号;将所述处理后的自干扰抵消信号与含有自干扰信号的接收信号进行耦合,以抵消所述自干扰信号。
- 根据权利要求1所述的方法,其中,所述对所述自干扰抵消信号进行处理,得到处理后的自干扰抵消信号之前还包括:确定自干扰信道响应和自干扰抵消回路的信道响应;根据所述自干扰信道响应和所述自干扰抵消回路的信道响应,对所述自干扰抵消信号进行调整。
- 根据权利要求2所述的方法,其中,所述确定自干扰信道响应包括:通过检测导频信号监控位的导频信号,或者通过码分方式,确定所述自干扰信道响应。
- 根据权利要求2所述的方法,其中,所述确定自干扰抵消回路的信道响应包括:通过检测自干扰抵消位的导频信号,确定所述自干扰抵消回路的信道响应。
- 根据权利要求2所述的方法,其中,所述对所述自干扰抵消信号进行调整包括:对所述自干扰抵消信号的时延、相位以及幅度进行调整。
- 根据权利要求1所述的方法,其中,所述对所述自干扰抵消信号进行处理包括:对所述自干扰抵消信号进行数模转换和信号放大处理。
- 根据权利要求1所述的方法,其中,所述将所述处理后的自干扰抵 消信号与含有自干扰信号的接收信号进行耦合,以抵消所述自干扰信号之后还包括:检测残余的自干扰信号,对所述接收信号进行数字自干扰抵消处理。
- 根据权利要求7所述的方法,其中,所述检测残余的自干扰信号,对所述接收信号进行数字自干扰抵消处理之后还包括;对数字自干扰抵消处理后的接收信号进行解调。
- 一种全双工自干扰抵消设备,所述设备包括存储器、处理器及存储在所述存储器上并可在所述处理器上运行的全双工自干扰抵消程序,所述全双工自干扰抵消程序被所述处理器执行时实现如权利要求1至8中任一项所述的全双工自干扰抵消方法的步骤。
- 一种计算机可读存储介质,所述计算机可读存储介质上存储有全双工自干扰抵消程序,所述全双工自干扰抵消程序被处理器执行时实现如权利要求1至8中任一项所述的全双工自干扰抵消方法的步骤。
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