WO2019220782A1 - Procédé de diagnostic de défaillance, dispositif de conversion de courant, module moteur et dispositif de direction assistée électrique - Google Patents

Procédé de diagnostic de défaillance, dispositif de conversion de courant, module moteur et dispositif de direction assistée électrique Download PDF

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Publication number
WO2019220782A1
WO2019220782A1 PCT/JP2019/013062 JP2019013062W WO2019220782A1 WO 2019220782 A1 WO2019220782 A1 WO 2019220782A1 JP 2019013062 W JP2019013062 W JP 2019013062W WO 2019220782 A1 WO2019220782 A1 WO 2019220782A1
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Prior art keywords
switch element
failed
phase
failure
inverter
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PCT/JP2019/013062
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English (en)
Japanese (ja)
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アハマッド ガデリー
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日本電産株式会社
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Priority to JP2020519495A priority Critical patent/JPWO2019220782A1/ja
Publication of WO2019220782A1 publication Critical patent/WO2019220782A1/fr

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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B62—LAND VEHICLES FOR TRAVELLING OTHERWISE THAN ON RAILS
    • B62D—MOTOR VEHICLES; TRAILERS
    • B62D5/00—Power-assisted or power-driven steering
    • B62D5/04—Power-assisted or power-driven steering electrical, e.g. using an electric servo-motor connected to, or forming part of, the steering gear
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode

Definitions

  • the present disclosure relates to a failure diagnosis method, a power conversion device, a motor module, and an electric power steering device.
  • Patent Document 1 discloses a motor drive device having a first system and a second system.
  • the first system is connected to the first winding set of the motor and includes a first inverter unit, a power supply relay, a reverse connection protection relay, and the like.
  • the second system is connected to the second winding set of the motor and includes a second inverter unit, a power supply relay, a reverse connection protection relay, and the like.
  • the power relay is connected to the failed system or from the power source. The power supply to the system connected to the winding set is cut off. It is possible to continue motor driving using the other system that has not failed.
  • Patent Documents 2 and 3 also disclose a motor drive device having a first system and a second system. Even if one system or one winding set fails, motor drive can be continued by a system that does not fail.
  • Embodiment of this indication provides the failure diagnostic method which can diagnose appropriately the failure of the switch element with which a power converter is provided.
  • An exemplary failure diagnosis method of the present disclosure is a failure diagnosis method for diagnosing a failure in a power conversion device that converts electric power from a power source into electric power supplied to a motor having at least one phase winding, the electric power
  • the converter includes a first inverter connected to one end of the at least one phase winding, a second inverter connected to the other end of the at least one phase winding, each of which is a first high-side switch element, At least one H-bridge having a first low-side switch element, a second high-side switch element, and a second low-side switch element, and the failure diagnosis method determines whether there is a failed phase in the at least one phase Determining whether there is a failed part in the high side and low side of the at least one H-bridge; and And whether there is a faulty inverter in the data and the second inverter, a judgment result of whether there is a faulty phase, a judgment result of whether there is a faulty part, and whether there is a faulty in
  • An exemplary power conversion device of the present disclosure is a power conversion device that converts power from a power source into power supplied to a motor having at least one phase winding, the power conversion device including the at least one phase.
  • a first inverter connected to one end of the first winding, a second inverter connected to the other end of the at least one-phase winding, a first high-side switch element, a first low-side switch element, a second And at least one H-bridge having a high-side switch element and a second low-side switch element, and a control circuit for controlling operations of the first inverter and the second inverter, the control circuit comprising the at least one phase Determine if there is a faulty phase and determine if there is a faulty part in the high side and low side of the at least one H-bridge.
  • a failure diagnosis method capable of appropriately diagnosing a failure of a switch element included in a power conversion device, a power conversion device, a motor module including the power conversion device, and the motor module are provided.
  • An electric power steering apparatus is provided.
  • FIG. 1 is a block diagram schematically illustrating a motor module according to an embodiment.
  • FIG. 2 is a circuit diagram schematically showing the inverter unit according to the embodiment.
  • FIG. 3A is a schematic diagram showing an A-phase H-bridge.
  • FIG. 3B is a schematic diagram showing a B-phase H-bridge.
  • FIG. 3C is a schematic diagram showing a C-phase H-bridge.
  • FIG. 4 is a functional block diagram showing a controller that performs overall motor control.
  • FIG. 5 is a diagram illustrating functional blocks for performing fault diagnosis of the A phase, the B phase, and the C phase.
  • FIG. 6 is a diagram illustrating functional blocks for performing a phase A failure diagnosis.
  • FIG. 7 is a diagram illustrating functional blocks for performing a B-phase failure diagnosis.
  • FIG. 1 is a block diagram schematically illustrating a motor module according to an embodiment.
  • FIG. 2 is a circuit diagram schematically showing the inverter unit according to the embodiment.
  • FIG. 8 is a diagram illustrating functional blocks for performing a C-phase failure diagnosis.
  • FIG. 9 is a diagram illustrating functional blocks for performing failure diagnosis of the first inverter and the second inverter.
  • FIG. 10 is a diagram illustrating functional blocks for performing failure diagnosis of the first inverter.
  • FIG. 11 is a diagram illustrating functional blocks for performing failure diagnosis of the second inverter.
  • FIG. 12 is a diagram showing functional blocks for performing a fault diagnosis on the low side of the H-bridge.
  • FIG. 13 is a diagram illustrating functional blocks for performing failure diagnosis on the high side of the H bridge.
  • FIG. 14 is a diagram illustrating functional blocks for performing failure diagnosis of the switch element of the first inverter.
  • FIG. 15 is a diagram illustrating functional blocks for performing failure diagnosis of the switch element of the second inverter.
  • FIG. 16 is a schematic diagram showing a look-up table for determining the saturation voltage Vsat from the rotation speed ⁇ and the current amplitude value.
  • FIG. 17 is a graph illustrating a current waveform (sine wave) obtained by plotting the current values flowing through the windings of the A phase, B phase, and C phase of the motor when the power conversion device is controlled according to the three-phase energization control. It is.
  • FIG. 18 is a graph illustrating a current waveform obtained by plotting the current values flowing through the B-phase and C-phase windings of the motor when the A-phase has failed and the power converter is controlled according to the two-phase energization control. It is.
  • FIG. 19 is a graph exemplifying a current waveform obtained by plotting the current value flowing in each of the C-phase and A-phase windings of the motor when the B-phase has failed and the power conversion device is controlled according to the two-phase energization control. It is.
  • FIG. 19 is a graph exemplifying a current waveform obtained by plotting the current value flowing in each of the C-phase and A-phase windings of the motor when the B-phase has failed and the power conversion device is controlled according to the two-phase energization control. It is.
  • FIG. 19 is a graph exemplifying a current waveform obtained by plotting the current value flowing in each of the C-phase and A-phase winding
  • FIG. 20 is a graph illustrating a current waveform obtained by plotting the current values flowing through the windings of the A phase and B phase of the motor when the power conversion device is controlled according to the two-phase energization control when the C phase fails. It is.
  • FIG. 21 is a graph showing waveforms of simulation results of the actual voltage VA1 (upper side) and the actual voltage VA2 (lower side) when the low-side switch element SW_A1L has an open failure.
  • FIG. 22 is a graph showing waveforms of simulation results of the actual voltage VB1 (upper side) and the actual voltage VB2 (lower side) when the low-side switch element SW_A1L has an open failure.
  • FIG. 21 is a graph showing waveforms of simulation results of the actual voltage VA1 (upper side) and the actual voltage VA2 (lower side) when the low-side switch element SW_A1L has an open failure.
  • FIG. 22 is a graph showing waveforms of simulation results of the actual voltage VB1 (upper
  • FIG. 23 is a graph showing waveforms of simulation results of the actual voltage VC1 (upper side) and the actual voltage VC2 (lower side) when the low-side switch element SW_A1L has an open failure.
  • FIG. 24 is a graph showing waveforms of simulation results of the actual voltage VA1 (upper side) and the actual voltage VA2 (lower side) when the high-side switch element SW_A1H has an open failure.
  • FIG. 25 is a graph showing waveforms of simulation results of the actual voltage VB1 (upper side) and the actual voltage VB2 (lower side) when the high-side switch element SW_A1H has an open failure.
  • FIG. 24 is a graph showing waveforms of simulation results of the actual voltage VA1 (upper side) and the actual voltage VA2 (lower side) when the high-side switch element SW_A1H has an open failure.
  • FIG. 25 is a graph showing waveforms of simulation results of the actual voltage VB1 (upper side) and the actual voltage VB2 (low
  • FIG. 26 is a graph showing waveforms of simulation results of the actual voltage VC1 (upper side) and the actual voltage VC2 (lower side) when the high-side switch element SW_A1H has an open failure.
  • FIG. 27 is a schematic diagram illustrating an electric power steering apparatus according to an exemplary embodiment.
  • a power conversion device that converts power from a power source into power to be supplied to a three-phase motor having three-phase (A-phase, B-phase, and C-phase) windings.
  • a form is demonstrated.
  • a power conversion device that converts electric power from a power source into electric power to be supplied to an n-phase motor having an n-phase winding (n is an integer of 4 or more) such as four-phase or five-phase, and a switch used in the device
  • An element failure diagnosis method is also included in the scope of the present disclosure.
  • FIG. 1 schematically shows a typical block configuration of a motor module 2000 according to the present embodiment.
  • the motor module 2000 typically includes a power converter 1000 having the inverter unit 100 and a control circuit 300 and a motor 200.
  • the motor module 2000 is modularized and can be manufactured and sold as, for example, an electromechanically integrated motor having a motor, a sensor, a driver, and a controller.
  • the power conversion apparatus 1000 can convert power from the power source 101 (see FIG. 2) into power supplied to the motor 200.
  • the power conversion apparatus 1000 is connected to the motor 200.
  • the power conversion apparatus 1000 can convert DC power into three-phase AC power that is pseudo-sine waves of A phase, B phase, and C phase.
  • connection between components (components) mainly means electrical connection.
  • the motor 200 is, for example, a three-phase AC motor.
  • the motor 200 includes an A-phase winding M1, a B-phase winding M2, and a C-phase winding M3, and is connected to the first inverter 120 and the second inverter 130 of the inverter unit 100. More specifically, the first inverter 120 is connected to one end of each phase winding of the motor 200, and the second inverter 130 is connected to the other end of each phase winding.
  • the control circuit 300 includes, for example, a power supply circuit 310, an angle sensor 320, an input circuit 330, a controller 340, a drive circuit 350, and a ROM 360. Each component of the control circuit 300 is mounted on, for example, one circuit board (typically a printed board).
  • the control circuit 300 is connected to the inverter unit 100 and controls the inverter unit 100 based on input signals from the current sensor 150 and the angle sensor 320. Examples of the control method include vector control, pulse width modulation (PWM), and direct torque control (DTC). However, the angle sensor 320 may be unnecessary depending on the motor control method (for example, sensorless control).
  • the control circuit 300 can realize the closed loop control by controlling the target position, rotation speed, current, etc. of the rotor of the motor 200.
  • the control circuit 300 may include a torque sensor instead of the angle sensor 320. In this case, the control circuit 300 can control the target motor torque.
  • the power supply circuit 310 generates a power supply voltage (for example, 3V, 5V) necessary for each block in the circuit based on the voltage of the power supply 101, for example, 12V.
  • a power supply voltage for example, 3V, 5V
  • the angle sensor 320 is, for example, a resolver or a Hall IC. Alternatively, the angle sensor 320 is also realized by a combination of an MR sensor having a magnetoresistive (MR) element and a sensor magnet. The angle sensor 320 detects the rotation angle of the rotor (hereinafter referred to as “rotation signal”) and outputs the rotation signal to the controller 340.
  • rotation signal the rotation angle of the rotor
  • the input circuit 330 receives the phase current detected by the current sensor 150 (hereinafter sometimes referred to as “actual current value”), and changes the level of the actual current value to the input level of the controller 340 as necessary.
  • the actual current value is output to the controller 340.
  • the input circuit 330 is, for example, an analog / digital (AD) conversion circuit.
  • the controller 340 is an integrated circuit that controls the entire power conversion apparatus 1000, and is, for example, a microcontroller or an FPGA (Field Programmable Gate Array).
  • the controller 340 controls the switching operation (turn-on or turn-off) of each switch element (typically a semiconductor switch element) in the first and second inverters 120 and 130 of the inverter unit 100.
  • the controller 340 sets the target current value according to the actual current value and the rotation signal of the rotor, generates a PWM signal, and outputs it to the drive circuit 350.
  • the drive circuit 350 is typically a pre-driver (sometimes called a “gate driver”).
  • the drive circuit 350 generates a control signal (gate control signal) for controlling the switching operation of each switch element in the first and second inverters 120 and 130 of the inverter unit 100 according to the PWM signal, and supplies a control signal to the gate of each switch element.
  • the pre-driver may not be necessarily required. In that case, the function of the pre-driver can be implemented in the controller 340.
  • the ROM 360 is, for example, a writable memory (for example, PROM), a rewritable memory (for example, flash memory), or a read-only memory.
  • the ROM 360 stores a control program including a command group for causing the controller 340 to control the power conversion apparatus 1000.
  • the control program is temporarily expanded in a RAM (not shown) at the time of booting.
  • FIG. 2 schematically shows a circuit configuration of the inverter unit 100 according to the present embodiment.
  • the power supply 101 generates a predetermined power supply voltage (for example, 12V).
  • a DC power source is used as the power source 101.
  • the power source 101 may be an AC-DC converter, a DC-DC converter, or a battery (storage battery).
  • the power source 101 may be a single power source common to the first and second inverters 120 and 130 as shown in the figure, or may be a first power source (not shown) for the first inverter 120 and for the second inverter 130.
  • a second power source (not shown) may be provided.
  • coils are provided between the power source 101 and the first inverter 120 and between the power source 101 and the second inverter 130.
  • the coil functions as a noise filter, and smoothes the high frequency noise included in the voltage waveform supplied to each inverter or the high frequency noise generated by each inverter so as not to flow out to the power supply 101 side.
  • a capacitor is connected to the power supply terminal of each inverter.
  • the capacitor is a so-called bypass capacitor and suppresses voltage ripple.
  • the capacitor is, for example, an electrolytic capacitor, and the capacity and the number to be used are appropriately determined according to design specifications.
  • the first inverter 120 has a bridge circuit composed of three legs. Each leg has a high-side switch element, a low-side switch element, and a shunt resistor.
  • the A-phase leg includes a high-side switch element SW_A1H, a low-side switch element SW_A1L, and a first shunt resistor S_A1.
  • the B-phase leg has a high-side switch element SW_B1H, a low-side switch element SW_B1L, and a first shunt resistor S_B1.
  • the C-phase leg has a high-side switch element SW_C1H, a low-side switch element SW_C1L, and a first shunt resistor S_C1.
  • a field effect transistor typically MOSFET having a parasitic diode formed therein, or a combination of an insulated gate bipolar transistor (IGBT) and a free-wheeling diode connected in parallel thereto can be used.
  • MOSFET field effect transistor
  • IGBT insulated gate bipolar transistor
  • the first shunt resistor S_A1 is used to detect the A-phase current IA1 flowing through the A-phase winding M1, and is connected, for example, between the low-side switch element SW_A1L and the GND line GL.
  • the first shunt resistor S_B1 is used to detect the B-phase current IB1 flowing through the B-phase winding M2, and is connected between the low-side switch element SW_B1L and the GND line GL, for example.
  • the first shunt resistor S_C1 is used to detect the C-phase current IC1 flowing through the C-phase winding M3, and is connected between, for example, the low-side switch element SW_C1L and the GND line GL.
  • the three shunt resistors S_A1, S_B1, and S_C1 are connected in common with the GND line GL of the first inverter 120.
  • the second inverter 130 has a bridge circuit composed of three legs. Each leg has a high-side switch element, a low-side switch element, and a shunt resistor.
  • the A-phase leg has a high-side switch element SW_A2H, a low-side switch element SW_A2L, and a shunt resistor S_A2.
  • the B-phase leg has a high-side switch element SW_B2H, a low-side switch element SW_B2L, and a shunt resistor S_B2.
  • the C-phase leg has a high-side switch element SW_C2H, a low-side switch element SW_C2L, and a shunt resistor S_C2.
  • the shunt resistor S_A2 is used to detect the A-phase current IA2, and is connected, for example, between the low-side switch element SW_A2L and the GND line GL.
  • the shunt resistor S_B2 is used to detect the B-phase current IB2, and is connected between, for example, the low-side switch element SW_B2L and the GND line GL.
  • the shunt resistor S_C2 is used to detect the C-phase current IC2, and is connected, for example, between the low-side switch element SW_C2L and the GND line GL.
  • the three shunt resistors S_A2, S_B2, and S_C2 are connected in common with the GND line GL of the second inverter 130.
  • the current sensor 150 described above includes, for example, a shunt resistor S_A1, S_B1, S_C1, S_A2, S_B2, S_C2, and a current detection circuit (not shown) that detects a current flowing through each shunt resistor.
  • the A-phase leg of the first inverter 120 (specifically, a node between the high-side switch element SW_A1H and the low-side switch element SW_A1L) is connected to one end A1 of the A-phase winding M1 of the motor 200, and the second inverter The 130 A-phase leg is connected to the other end A2 of the A-phase winding M1.
  • the B-phase leg of the first inverter 120 is connected to one end B1 of the B-phase winding M2 of the motor 200, and the B-phase leg of the second inverter 130 is connected to the other end B2 of the winding M2.
  • the C-phase leg of the first inverter 120 is connected to one end C1 of the C-phase winding M3 of the motor 200, and the C-phase leg of the second inverter 130 is connected to the other end C2 of the winding M3.
  • FIG. 3A schematically shows the configuration of the A-phase H-bridge BA.
  • FIG. 3B schematically shows the configuration of a B-phase H-bridge BB.
  • FIG. 3C schematically shows the configuration of a C-phase H-bridge BC.
  • the inverter unit 100 includes A-phase, B-phase, and C-phase H-bridges BA, BB, and BC.
  • the A-phase H bridge BA includes a high-side switch element SW_A1H and a low-side switch element SW_A1L in the leg on the first inverter 120 side, a high-side switch element SW_A2H, a low-side switch element SW_A2L in the leg on the second inverter 130 side, and a winding Has M1.
  • the B-phase H-bridge BB includes a high-side switch element SW_B1H and a low-side switch element SW_B1L in the leg on the first inverter 120 side, a high-side switch element SW_B2H, a low-side switch element SW_B2L in the leg on the second inverter 130 side, and a winding Has M2.
  • the C-phase H-bridge BC includes a high-side switch element SW_C1H and a low-side switch element SW_C1L in the leg on the first inverter 120 side, a high-side switch element SW_C2H, a low-side switch element SW_C2L in the leg on the second inverter 130 side, and a winding M3.
  • the control circuit 300 (specifically, the controller 340) can specify a failed switch element in the power conversion apparatus 1000 by executing a failure diagnosis described below.
  • the control circuit 300 can switch to motor control in which a two-phase winding is energized using a two-phase H bridge other than the H bridge including the faulty switch element.
  • energizing the three-phase winding is referred to as “three-phase energization control”
  • energizing the two-phase winding is referred to as “two-phase energization control”. Details of the failure diagnosis will be described below.
  • failure diagnosis method for diagnosing the presence or absence of a failure of the switch element of the power conversion apparatus 1000 shown in FIG. 1
  • the failure diagnosis method of the present disclosure can be suitably used for a power conversion device including at least one H bridge, for example, a full bridge type power conversion device.
  • the failure of a switch element refers to the open failure of a switch element.
  • An open failure is a failure in which the switch element always has a high impedance.
  • a failure occurring in a switching element of an A-phase H-bridge may be referred to as an A-phase failure.
  • the outline of the failure diagnosis method of this embodiment is as follows.
  • failure diagnosis it is determined whether there is a failed phase in the A phase, the B phase, or the C phase. Further, it is determined whether there is a failed part in the high side and the low side of the H bridges BA, BB, and BC. Further, it is determined whether there is a failed inverter in the first inverter 120 and the second inverter 130. Based on these determination results, it is determined whether there is a failed switch element among the high-side switch element and the low-side switch element included in the power conversion device 1000.
  • the current and voltage expressed in the dq coordinate system the actual voltage indicating the voltage across the low-side switch element, and the rotational speed ⁇ of the motor are acquired.
  • the current and voltage expressed in the dq coordinate system include a d-axis voltage Vd, a q-axis voltage Vq, a d-axis current Id, and a q-axis current Iq.
  • the axis corresponding to the zero phase is represented as the z axis.
  • the rotation speed ⁇ is represented by a rotation speed (rpm) at which the rotor of the motor rotates per unit time (for example, 1 minute) or a rotation speed (rps) at which the rotor rotates at unit time (for example, 1 second).
  • a first actual voltage and a second actual voltage are defined for each of the A-phase, B-phase, and C-phase H-bridges BA, BB, and BC.
  • the first actual voltage indicates the voltage across the first low-side switch element in the leg on the first inverter 120 side in the H bridge of each phase. In other words, the first actual voltage corresponds to the node potential between the first high-side switch element and the first low-side switch element in the leg on the first inverter 120 side.
  • the second actual voltage indicates the voltage across the second low-side switch element in the leg on the second inverter 130 side. In other words, the second actual voltage corresponds to the node potential between the second high-side switch element and the second low-side switch element in the leg on the second inverter 130 side.
  • the voltage across the switch element is equal to the voltage Vds between the source and drain of the FET that is the switch element.
  • the first actual voltage indicates the voltage VA1 across the low-side switch element SW_A1L shown in FIG. 3A, and the second actual voltage points across the voltage VA2 across the low-side switch element SW_A2L shown in FIG. 3A.
  • the first actual voltage indicates the voltage VB1 across the low-side switch element SW_B1L shown in FIG. 3B
  • the second actual voltage indicates the voltage VB2 across the low-side switch element SW_B2L shown in FIG. 3B.
  • the first actual voltage indicates the voltage VC1 across the low-side switch element SW_C1L illustrated in FIG. 3C
  • the second actual voltage indicates the voltage VC2 across the low-side switch element SW_C2L illustrated in FIG. 3C. .
  • a failure is diagnosed based on the acquired current and voltage in the dq coordinate system, the first actual voltage, the second actual voltage, and the rotation speed.
  • a fault signal indicating a fault of the switch element is generated and output to a motor control unit described later.
  • a failure signal is a signal that is asserted when a failure occurs.
  • the above-described failure diagnosis is repeatedly executed in synchronization with, for example, a period in which each phase current is measured by the current sensor 150, that is, an AD conversion period.
  • the algorithm for realizing the fault diagnosis method according to the present embodiment can be realized only by hardware such as an application specific integrated circuit (ASIC) or FPGA, or can be realized by a combination of a microcontroller and software. Can do.
  • the operation subject of failure diagnosis is the controller 340 of the control circuit 300.
  • FIG. 4 exemplifies functional blocks of the controller 340 for performing overall motor control.
  • FIG. 5 exemplifies functional blocks for performing fault diagnosis of the A phase, the B phase, and the C phase.
  • each block in the functional block diagram is shown not in hardware units but in functional block units.
  • the software used for motor control and failure diagnosis may be a module constituting a computer program for executing specific processing corresponding to each functional block, for example.
  • Such a computer program is stored in the ROM 360, for example.
  • the controller 340 can read out commands from the ROM 360 and sequentially execute each process.
  • the controller 340 includes, for example, a failure diagnosis unit 800 and a motor control unit 900.
  • the failure diagnosis of the present disclosure can be suitably combined with motor control (for example, vector control), and can be incorporated into a series of processes of motor control.
  • Failure diagnosis unit 800 obtains d-axis current Id, q-axis current Iq, d-axis voltage Vd, q-axis voltage Vq, and rotation speed ⁇ of motor 200 in the dq coordinate system.
  • the fault diagnosis unit 800 further obtains the first actual voltages VA1, VB1, VC1, and the second actual voltages VA2, VB2, and VC2.
  • the failure diagnosis unit 800 may include a pre-computation unit (not shown) that acquires Vpeak.
  • the pre-computation unit uses the Clark transformation to convert the three-phase currents Ia, Ib and Ic obtained based on the measured value of the current sensor 150 into the currents I ⁇ and ⁇ on the ⁇ axis in the ⁇ fixed coordinate system.
  • To a current I ⁇ of The pre-computation unit converts the currents I ⁇ and I ⁇ into a d-axis current Id and a q-axis current Iq in the dq coordinate system by using park conversion (dq coordinate conversion).
  • the pre-calculation unit acquires the d-axis voltage Vd and the q-axis voltage Vq based on the currents Id and Iq, and calculates the voltage peak value Vpeak from the acquired Vd and Vq based on the following formula (1).
  • the pre-computation unit can also receive Vd and Vq necessary for calculating Vpeak from the motor control unit 900 that performs vector control.
  • the pre-computation unit acquires Vpeak in synchronization with the period in which each phase current is measured by the current sensor 150.
  • Vpeak (2/3) 1/2 (Vd 2 + Vq 2 ) 1/2 formula (1)
  • Failure diagnosis unit 800 refers to look-up table 940 (FIG. 16) and determines saturation voltage Vsat based on currents Id and Iq and rotation speed ⁇ .
  • FIG. 16 schematically shows a look-up table (LUT) 940 that determines the saturation voltage Vsat from the rotation speed ⁇ and the current amplitude value.
  • the LUT 940 associates the relationship between the saturation voltage Vsat and the input of the current amplitude value (Id 2 + Iq 2 ) 1/2 determined based on the d-axis current and the q-axis current and the rotational speed ⁇ of the motor 200.
  • the rotation speed ⁇ is calculated based on, for example, a rotation signal from the angle sensor 320.
  • the rotational speed ⁇ can be estimated using, for example, a known sensorless control method.
  • the actual voltage of each switch element is measured by a drive circuit (predriver) 350, for example.
  • Table 1 illustrates the configuration of the LUT 940 that can be used for failure diagnosis.
  • Id is generally treated as zero. Therefore, the current amplitude value is equal to Iq.
  • Table 1 lists Iq (A).
  • the saturation voltage Vsat is determined from the acquired current amplitude value Iq and the rotational speed ⁇ .
  • a value set in advance before driving may be used as the saturation voltage Vsat.
  • a constant value for example, about 0.1 V) depending on the system may be used as the saturation voltage Vsat.
  • the failure diagnosis unit 800 diagnoses the presence or absence of a switch element failure based on the above-described actual voltage, voltage peak value Vpeak, and saturation voltage Vsat.
  • the failure diagnosis unit 800 generates a failure signal indicating the failed switch element based on the diagnosis result, and outputs the failure signal to the motor control unit 900.
  • the motor control unit 900 generates a PWM signal that controls the overall switching operation of the switch elements of the first and second inverters 120 and 130 using, for example, vector control.
  • the motor control unit 900 outputs a PWM signal to the drive circuit 350. For example, when a failure signal is asserted, the motor control unit 900 can switch the motor control from the three-phase energization control to the two-phase energization control.
  • each functional block may be expressed as a unit. Naturally, these notations are not used with the intention of restricting each functional block to hardware or software.
  • the execution subject of the software may be the core of the controller 340, for example.
  • the controller 340 can be realized by an FPGA. In that case, all or some of the functional blocks may be realized by hardware.
  • the computing load of a specific computer can be distributed.
  • all or part of the functional blocks shown in FIGS. 4 to 16 may be distributed and implemented in a plurality of FPGAs.
  • the plurality of FPGAs can be connected to each other by, for example, an in-vehicle control area network (CAN), and can transmit and receive data.
  • CAN in-vehicle control area network
  • the failure diagnosis unit 800 includes a failure diagnosis unit 800A for diagnosing a failure of the A-phase H bridge BA, a failure diagnosis unit 800B for diagnosing a failure of the B-phase H bridge BB, and a C-phase H bridge shown in FIG.
  • a failure diagnosis unit 800C for diagnosing a failure of the bridge BC is included.
  • FIG. 6 is a block diagram illustrating a failure diagnosis unit 800A for diagnosing a failure of the A-phase H bridge BA.
  • FIG. 7 is a block diagram illustrating a failure diagnosis unit 800B for diagnosing a failure of the B-phase H-bridge BB.
  • FIG. 8 is a block diagram illustrating a failure diagnosis unit 800C for diagnosing a failure of the C-phase H-bridge BC.
  • Failure diagnosis units 800A, B, and C are constituted by substantially the same functional blocks. However, the input signals of the first actual voltage and the second actual voltage differ between the blocks.
  • the fault diagnosis of the H bridge will be described in detail with reference to FIG. 6, taking the fault diagnosis of the A-phase H bridge BA as an example.
  • the fault diagnosis unit 800A includes multipliers 810 and 811, adders 812, 813_1 and 813_2, signal generation units 814_1 and 814_2, multipliers 820 and 821, adders 822, 823_1 and 823_2, signal generation units 824_1 and 824_2, and a logic circuit. OR830.
  • Multipliers 810 and 811, adders 812, 813_1 and 813_2, and signal generation units 814_1 and 814_2 constitute a low-side fault diagnosis unit.
  • the multipliers 820 and 821, the adders 822, 823_1 and 823_2, and the signal generation units 824_1 and 824_2 constitute a high side failure diagnosis unit.
  • the low side failure diagnosis unit specifies an open failure of the low side switch elements SW_A1L and SW_A2L.
  • the high side failure diagnosis unit specifies an open failure of the high side switch elements SW_A1H and SW_A2H.
  • the high side failure diagnosis unit includes a first failure diagnosis for diagnosing an open failure of the high side switch element SW_A2H based on the voltage peak value Vpeak, the saturation voltage Vsat and the first actual voltage VA1, and the voltage peak value Vpeak, the saturation voltage Vsat and Based on the second actual voltage VA2, the second failure diagnosis for diagnosing an open failure of the high-side switch element SW_A1H is performed.
  • Multiplier 820 multiplies voltage peak value Vpeak by a constant “1/2”.
  • the voltage peak value Vpeak is calculated based on the above equation (1).
  • the multiplier 821 multiplies the saturation voltage Vsat by a constant “1”.
  • the adder 822 adds the output Vsat of the multiplier 821 to the output Vpeak / 2 of the multiplier 820.
  • the adder 823_1 calculates the first failure diagnosis voltage VA2H_FD by adding the first actual voltage VA1 to the output (Vpeak / 2) + Vsat from the adder 822 (formula (2)).
  • the adder 823_2 calculates the second failure diagnosis voltage VA1H_FD by adding the second actual voltage VA2 to the output (Vpeak / 2) + Vsat from the adder 822 (formula (3)).
  • the first actual voltage VA1 and the second actual voltage VA2 are measured by a drive circuit (predriver) 350, for example.
  • VA2H_FD VA1 + [(Vpeak / 2) + Vsat] Formula (2)
  • VA1H_FD VA2 + [(Vpeak / 2) + Vsat] Formula (3)
  • the signal generation unit 824_1 diagnoses an open failure of the high-side switch element SW_A2H based on the first failure diagnosis voltage VA2H_FD. Specifically, the signal generation unit 824_1 identifies an open failure of the high side switch element SW_A2H when the first failure diagnosis voltage VA2H_FD is less than zero (VA2H_FD ⁇ 0). When the first failure diagnosis voltage VA2H_FD is greater than or equal to zero (VA2H_FD ⁇ 0), the signal generation unit 824_1 determines that no open failure has occurred in the high-side switch element SW_A2H.
  • the signal generation unit 824_1 generates a first failure signal A2H_FD indicating an open failure of the high side switch element SW_A2H based on the diagnosis result in the first failure diagnosis.
  • the first failure signal A2H_FD can be assigned to a 1-bit signal.
  • the level of the first failure signal A2H_FD is Low.
  • the signal generation unit 824_1 identifies an open failure of the high-side switch element SW_A2H, the signal generation unit 824_1 asserts the first failure signal A2H_FD.
  • the signal generation unit 824_2 diagnoses an open failure of the high-side switch element SW_A1H based on the second failure diagnosis voltage VA1H_FD. Specifically, the signal generation unit 824_2 identifies an open failure of the high side switch element SW_A1H when the second failure diagnosis voltage VA1H_FD is less than zero (VA1H_FD ⁇ 0). When the second failure diagnosis voltage VA1H_FD is zero or more (VA1H_FD ⁇ 0), the signal generation unit 824_2 determines that no open failure has occurred in the high-side switch element SW_A1H.
  • the signal generation unit 824_2 generates a second failure signal A1H_FD indicating an open failure of the high-side switch element SW_A1H based on the diagnosis result in the second failure diagnosis.
  • the second failure signal A1H_FD can be assigned to a 1-bit signal.
  • the level of the second failure signal A1H_FD is Low.
  • the signal generation unit 824_2 specifies the open failure of the high-side switch element SW_A1H, the signal generation unit 824_2 asserts the second failure signal A1H_FD.
  • the low-side failure diagnosis unit performs third failure diagnosis for diagnosing an open failure of the low-side switch element SW_A2L based on the voltage peak value Vpeak, the saturation voltage Vsat, and the first actual voltage VA1, and the voltage peak value Vpeak, saturation voltage Vsat, and second Based on the actual voltage VA2, a fourth failure diagnosis for diagnosing an open failure of the low-side switch element SW_A1L is performed.
  • Multiplier 810 multiplies voltage peak value Vpeak by a constant “ ⁇ 1/2”.
  • the multiplier 811 multiplies the saturation voltage Vsat by a constant “ ⁇ 1”. Considering that the currents flowing between the low-side switch element and the high-side switch element are reversed, the low-side failure diagnosis unit has a sign opposite to that of the multipliers 820 and 821 of the high-side failure diagnosis unit. A constant is used.
  • the adder 812 adds the output ( ⁇ Vsat) of the multiplier 811 to the output ( ⁇ Vpeak / 2) of the multiplier 810.
  • the adder 813_1 calculates the third failure diagnosis voltage VA2L_FD by adding the first actual voltage VA1 to the output from the adder 812:-[(Vpeak / 2) + Vsat] (formula (4)).
  • the adder 813_2 calculates the fourth fault diagnosis voltage VA1L_FD by adding the second actual voltage VA2 to the output from the adder 812:-[(Vpeak / 2) + Vsat] (formula (5)).
  • VA2L_FD VA1-[(Vpeak / 2) + Vsat] Formula (4)
  • VA1L_FD VA2-[(Vpeak / 2) + Vsat] Formula (5)
  • the signal generation unit 814_1 diagnoses an open failure of the low-side switch element SW_A2L based on the third failure diagnosis voltage VA2L_FD. Specifically, the signal generation unit 814_1 identifies an open failure of the low-side switch element SW_A2L when the third failure diagnosis voltage VA2L_FD is greater than zero (VA2L_FD> 0). The signal generation unit 814_1 determines that an open failure has not occurred in the low-side switch element SW_A2L when the third failure diagnosis voltage VA2L_FD is equal to or less than zero (VA2L_FD ⁇ 0).
  • the signal generation unit 814_1 generates a third failure signal A2L_FD indicating an open failure of the low-side switch element SW_A2L based on the diagnosis result in the third failure diagnosis.
  • the third failure signal A2L_FD can be assigned to a 1-bit signal.
  • the level of the third failure signal A2L_FD is Low.
  • the signal generation unit 814_1 specifies the open failure of the low-side switch element SW_A2L, the signal generation unit 814_1 asserts the third failure signal A2L_FD.
  • the signal generation unit 814_2 diagnoses an open failure of the low-side switch element SW_A1L based on the fourth failure diagnosis voltage VA1L_FD. Specifically, the signal generation unit 814_2 specifies an open failure of the low-side switch element SW_A1L when the fourth failure diagnosis voltage VA1L_FD is greater than zero (VA1L_FD> 0). When the fourth failure diagnosis voltage VA1L_FD is equal to or lower than zero (VA1L_FD ⁇ 0), the signal generation unit 814_2 determines that an open failure has not occurred in the low-side switch element SW_A1L.
  • the signal generation unit 814_2 generates a fourth failure signal A1L_FD indicating an open failure of the low-side switch element SW_A1L based on the diagnosis result in the fourth failure diagnosis.
  • the fourth failure signal A1L_FD can be assigned to a 1-bit signal.
  • the level of the fourth failure signal A1L_FD is Low.
  • the signal generation unit 814_2 specifies the open failure of the low-side switch element SW_A1L, the signal generation unit 814_2 asserts the fourth failure signal A1L_FD.
  • the failure diagnosis unit 800A can identify a switch element that has an open failure among the high-side switch elements SW_A1H, SW_A2H, the low-side switch elements SW_A1L, and SW_A2L.
  • the logic circuit OR830 takes a logical sum of the first to fourth failure signals A2H_FD, A1H_FD, A2L_FD, and A1L_FD.
  • the logic circuit OR 830 outputs a failure signal A_FD indicating whether or not the A-phase H bridge BA has failed. For example, when all of the first to fourth failure signals A2H_FD, A1H_FD, A2L_FD, and A1L_FD are “0” indicating normality, the logic circuit OR830 outputs “0” indicating normality as the failure signal A_FD.
  • the logic circuit OR 830 When at least one of the first to fourth failure signals A2H_FD, A1H_FD, A2L_FD, and A1L_FD is “1” indicating abnormality, the logic circuit OR 830 outputs “1” indicating failure as the failure signal A_FD.
  • failure diagnosis unit 800B detects that an open failure has occurred in at least one of high-side switch elements SW_B1H, SW_B2H, low-side switch elements SW_B1L, and SW_B2L. Is output as a failure signal B_FD. When no open failure is detected, “0” indicating that the B-phase H-bridge BB is normal is output as the failure signal B_FD.
  • the failure diagnosis unit 800C When the failure diagnosis unit 800C detects that at least one of the high-side switch elements SW_C1H, SW_C2H, the low-side switch elements SW_C1L and SW_C2L has an open failure, the failure diagnosis unit 800C outputs “1” indicating a failure of the C-phase H-bridge BC as a failure signal. Output as C_FD. When an open failure is not detected, “0” indicating that the C-phase H-bridge BC is normal is output as a failure signal C_FD.
  • the failure diagnosis unit 800 includes a failure diagnosis unit 810A for diagnosing the presence or absence of a failure in the first inverter 120 and a failure diagnosis unit 810B for diagnosing the presence or absence of a failure in the second inverter 130 shown in FIG.
  • FIG. 10 shows functional blocks of the failure diagnosis unit 810A.
  • FIG. 11 shows functional blocks of the failure diagnosis unit 810B.
  • Fault diagnosis units 810A and 810B have substantially the same functional blocks, but input actual voltages are different from each other.
  • Each of failure diagnosis units 810A and 810B includes absolute value calculators 831, 834, 837, multipliers 832, 833, 835, 836, 838, 839, adders 841, 842, 843, and comparators 844, 845. , 846 and a logic circuit OR847.
  • the absolute value calculator 831 of the failure diagnosis unit 810A calculates the absolute value of the actual voltage VA2.
  • the multiplier 832 multiplies the voltage peak value Vpeak by a constant “ ⁇ 1/2”.
  • the multiplier 833 multiplies the saturation voltage Vsat by a constant “ ⁇ 1”.
  • the adder 841 adds the output values of the absolute value calculator 831 and the multipliers 832 and 833 to calculate the failure diagnosis voltage VA2_FD represented by the following formula (6).
  • VA2_FD
  • the comparator 844 compares “VA2_FD” with “zero”. When VA2_FD is equal to or less than zero (VA2_FD ⁇ 0), the comparator 844 outputs “0” indicating that the actual voltage VA2 is normal to the logic circuit OR847. When VA2_FD is larger than zero (VA2_FD> 0), the comparator 844 outputs “1” indicating that the actual voltage VA2 is abnormal to the logic circuit OR847.
  • the absolute value calculator 834 of the failure diagnosis unit 810A calculates the absolute value of the actual voltage VB2.
  • the multiplier 835 multiplies the voltage peak value Vpeak by a constant “ ⁇ 1/2”.
  • the multiplier 836 multiplies the saturation voltage Vsat by a constant “ ⁇ 1”.
  • the adder 842 adds the output values of the absolute value calculator 834 and the multipliers 835 and 836 to calculate a failure diagnosis voltage VB2_FD represented by the following formula (7).
  • VB2_FD
  • the comparator 845 compares “VB2_FD” with “zero”. When VB2_FD is equal to or smaller than zero, the comparator 845 outputs “0” indicating that the actual voltage VB2 is normal to the logic circuit OR847. When VB2_FD is greater than zero, the comparator 845 outputs “1” indicating that the actual voltage VB2 is abnormal to the logic circuit OR847.
  • the absolute value calculator 837 of the failure diagnosis unit 810A calculates the absolute value of the actual voltage VC2.
  • the multiplier 838 multiplies the voltage peak value Vpeak by a constant “ ⁇ 1/2”.
  • the multiplier 839 multiplies the saturation voltage Vsat by a constant “ ⁇ 1”.
  • the adder 843 adds the output values of the absolute value calculator 837 and the multipliers 838 and 839 to calculate a failure diagnosis voltage VC2_FD represented by the following formula (8).
  • VC2_FD
  • the comparator 846 compares “VC2_FD” with “zero”. When VC2_FD is equal to or smaller than zero, the comparator 846 outputs “0” indicating that the actual voltage VC2 is normal to the logic circuit OR847. When VC2_FD is greater than zero, the comparator 846 outputs “1” indicating that the actual voltage VC2 is abnormal to the logic circuit OR847.
  • the logic circuit OR 847 takes the logical sum of the output signals of the comparators 844, 845, 846.
  • the logic circuit OR847 outputs a logical sum as a failure signal 1_FD indicating whether or not the first inverter 120 has failed.
  • the logic circuit OR847 When the output signals of the comparators 844, 845, and 846 are all “0”, the logic circuit OR847 outputs “0” indicating that the first inverter 120 is normal as the failure signal 1_FD. When at least one of the output signals of the comparators 844, 845, and 846 is “1”, the logic circuit OR847 outputs “1” indicating that the first inverter 120 has failed as the failure signal 1_FD.
  • the failure diagnosis unit 810B shown in FIG. 11 performs the same processing as the failure diagnosis unit 810A, and diagnoses the presence or absence of a failure of the second inverter 130.
  • the actual voltages VA1, VB1, and VC1 are input to the failure diagnosis unit 810B instead of the actual voltages VA2, VB2, and VC2.
  • the logic circuit OR847 outputs a failure signal 2_FD indicating whether or not the second inverter 130 has failed. Since the other processing of the failure diagnosis unit 810B is the same as that of the failure diagnosis unit 810A, detailed description is omitted here.
  • H bridge high side and low side failure diagnosis Next, a process for determining whether there is a failed part on the high side and the low side of the H bridges BA, BB, and BC will be described.
  • FIG. 12 shows a failure diagnosis unit 820A for diagnosing the presence or absence of a low-side failure of the H bridges BA, BB, and BC.
  • FIG. 13 shows a failure diagnosis unit 820B for diagnosing the presence or absence of a high-side failure of the H bridges BA, BB, and BC.
  • the failure diagnosis unit 800 includes failure diagnosis units 820A and 820B shown in FIGS.
  • the fault diagnosis unit 820A includes multipliers 851, 852, adders 853, 854, 855, 856, 857, 858, 859, comparators 861, 862, 863, 864, 865, 866, and a logic circuit OR867. Have.
  • the multiplier 851 multiplies the voltage peak value Vpeak by a constant “ ⁇ 1/2”.
  • the multiplier 852 multiplies the saturation voltage Vsat by a constant “ ⁇ 1”.
  • Adder 853 adds the output values of multipliers 851 and 852.
  • the adder 854 adds the actual voltage VA1 and the output value of the adder 853 to calculate a failure diagnosis voltage VA1L_FD represented by the following equation (9). Equation (9) is the same as Equation (4) described above.
  • VA1L_FD VA1-[(Vpeak / 2) + Vsat] Formula (9)
  • the comparator 861 compares “VA1L_FD” with “zero”. When VA1L_FD is equal to or less than zero (VA1L_FD ⁇ 0), the comparator 861 outputs “0” indicating that the actual voltage VA1 is normal to the logic circuit OR867. When VA1L_FD is greater than zero (VA1L_FD> 0), the comparator 861 outputs “1” indicating that the actual voltage VA1 is abnormal to the logic circuit OR867.
  • the adder 855 adds the actual voltage VA2 and the output value of the adder 853 to calculate the failure diagnosis voltage VA2L_FD.
  • the comparator 862 compares “VA2L_FD” with “zero”. When VA2L_FD is equal to or less than zero (VA2L_FD ⁇ 0), the comparator 862 outputs “0” indicating that the actual voltage VA2 is normal to the logic circuit OR867. When VA2L_FD is larger than zero (VA2L_FD> 0), the comparator 862 outputs “1” indicating that the actual voltage VA2 is abnormal to the logic circuit OR867.
  • the adder 856 adds the actual voltage VB1 and the output value of the adder 853 to calculate the failure diagnosis voltage VB1L_FD.
  • the comparator 863 compares “VB1L_FD” with “zero”. When VB1L_FD is equal to or less than zero (VB1L_FD ⁇ 0), the comparator 863 outputs “0” indicating that the actual voltage VB1 is normal to the logic circuit OR867. When VB1L_FD is greater than zero (VB1L_FD> 0), the comparator 863 outputs “1” indicating that the actual voltage VB1 is abnormal to the logic circuit OR867.
  • the adder 857 adds the actual voltage VB2 and the output value of the adder 853 to calculate the failure diagnosis voltage VB2L_FD.
  • the comparator 864 compares “VB2L_FD” with “zero”. When VB2L_FD is equal to or smaller than zero (VB2L_FD ⁇ 0), the comparator 864 outputs “0” indicating that the actual voltage VB2 is normal to the logic circuit OR867. When VB2L_FD is greater than zero (VB2L_FD> 0), the comparator 864 outputs “1” indicating that the actual voltage VB2 is abnormal to the logic circuit OR867.
  • the adder 858 adds the actual voltage VC1 and the output value of the adder 853 to calculate the fault diagnosis voltage VC1L_FD.
  • the comparator 865 compares “VC1L_FD” with “zero”. When VC1L_FD is equal to or lower than zero (VC1L_FD ⁇ 0), the comparator 865 outputs “0” indicating that the actual voltage VC1 is normal to the logic circuit OR867. When VC1L_FD is greater than zero (VC1L_FD> 0), the comparator 865 outputs “1” indicating that the actual voltage VC1 is abnormal to the logic circuit OR867.
  • the adder 859 adds the actual voltage VC2 and the output value of the adder 853 to calculate the failure diagnosis voltage VC2L_FD.
  • the comparator 866 compares “VC2L_FD” with “zero”. When VC2L_FD is equal to or lower than zero (VC2L_FD ⁇ 0), the comparator 866 outputs “0” indicating that the actual voltage VC2 is normal to the logic circuit OR867. When VC2L_FD is greater than zero (VC2L_FD> 0), the comparator 866 outputs “1” indicating that the actual voltage VC2 is abnormal to the logic circuit OR867.
  • the logic circuit OR867 takes the logical sum of the output signals of the comparators 861, 862, 863, 864, 865, and 866.
  • the logic circuit OR867 outputs a failure signal L_FD indicating whether or not there is a failure on the low side of the H bridge.
  • the logic circuit OR867 When the output signals of the comparators 861, 862, 863, 864, 865, and 866 are all “0”, the logic circuit OR867 outputs “0” indicating normality as the failure signal L_FD. When at least one of the output signals of the comparators 861, 862, 863, 864, 865, and 866 is “1”, the logic circuit OR867 outputs “1” indicating a failure as the failure signal L_FD.
  • the fault diagnosis unit 820B shown in FIG. 13 includes multipliers 871, 872, adders 873, 874, 875, 876, 877, 878, 879, comparators 881, 882, 883, 884, 885, 886, logic Circuit OR887.
  • the multiplier 871 multiplies the voltage peak value Vpeak by a constant “1/2”.
  • the multiplier 872 multiplies the saturation voltage Vsat by a constant “1”.
  • Adder 873 adds the output values of multipliers 871 and 872.
  • the adder 874 adds the actual voltage VA1 and the output value of the adder 873 to calculate a failure diagnosis voltage VA1H_FD represented by the following equation (10).
  • Expression (10) is the same as Expression (2) described above.
  • VA1H_FD VA1 + [(Vpeak / 2) + Vsat] Formula (10)
  • the comparator 881 compares “VA1H_FD” with “zero”. When VA1H_FD is equal to or greater than zero (VA1H_FD ⁇ 0), the comparator 881 outputs “0” indicating that the actual voltage VA1 is normal to the logic circuit OR887. When VA1H_FD is less than zero (VA1H_FD ⁇ 0), the comparator 881 outputs “1” indicating that the actual voltage VA1 is abnormal to the logic circuit OR881.
  • the adder 875 adds the actual voltage VA2 and the output value of the adder 873 to calculate the failure diagnosis voltage VA2H_FD.
  • the comparator 882 compares “VA2H_FD” with “zero”. When VA2H_FD is equal to or larger than zero (VA2H_FD ⁇ 0), the comparator 882 outputs “0” indicating that the actual voltage VA2 is normal to the logic circuit OR887. When VA2H_FD is less than zero (VA2H_FD ⁇ 0), the comparator 882 outputs “1” indicating that the actual voltage VA2 is abnormal to the logic circuit OR887.
  • the adder 876 adds the actual voltage VB1 and the output value of the adder 873 to calculate the failure diagnosis voltage VB1H_FD.
  • the comparator 883 compares “VB1H_FD” with “zero”. When VB1H_FD is equal to or larger than zero (VB1H_FD ⁇ 0), the comparator 883 outputs “0” indicating that the actual voltage VB1 is normal to the logic circuit OR887. When VB1H_FD is less than zero (VB1H_FD ⁇ 0), the comparator 883 outputs “1” indicating that the actual voltage VB1 is abnormal to the logic circuit OR887.
  • the adder 877 adds the actual voltage VB2 and the output value of the adder 873 to calculate the failure diagnosis voltage VB2H_FD.
  • the comparator 884 compares “VB2H_FD” with “zero”. The comparator 884 outputs “0” indicating that the actual voltage VB2 is normal to the logic circuit OR887 when VB2H_FD is zero or more (VB2H_FD ⁇ 0). When VB2H_FD is less than zero (VB2H_FD ⁇ 0), the comparator 884 outputs “1” indicating that the actual voltage VB2 is abnormal to the logic circuit OR887.
  • the adder 878 calculates the failure diagnosis voltage VC1H_FD by adding the actual voltage VC1 and the output value of the adder 873.
  • the comparator 885 compares “VC1H_FD” with “zero”. When VC1H_FD is equal to or greater than zero (VC1H_FD ⁇ 0), the comparator 885 outputs “0” indicating that the actual voltage VC1 is normal to the logic circuit OR887. When VC1H_FD is less than zero (VC1H_FD ⁇ 0), the comparator 885 outputs “1” indicating that the actual voltage VC1 is abnormal to the logic circuit OR887.
  • the adder 879 adds the actual voltage VC2 and the output value of the adder 873 to calculate the failure diagnosis voltage VC2H_FD.
  • Comparator 886 compares “VC2H_FD” with “zero”. When VC2H_FD is equal to or greater than zero (VC2H_FD ⁇ 0), the comparator 886 outputs “0” indicating that the actual voltage VC2 is normal to the logic circuit OR887. When VC2H_FD is less than zero (VC2H_FD ⁇ 0), the comparator 886 outputs “1” indicating that the actual voltage VC2 is abnormal to the logic circuit OR887.
  • the logic circuit OR 887 takes the logical sum of the output signals of the comparators 881, 882, 883, 884, 885, 886.
  • the logic circuit OR887 outputs a failure signal H_FD indicating whether or not there is a failure on the high side of the H bridge.
  • the logic circuit OR 887 outputs “0” indicating normality as the failure signal H_FD.
  • the logic circuit OR887 outputs “1” indicating a failure as a failure signal H_FD.
  • FIG. 14 shows a failure diagnosis unit 830A for diagnosing the presence or absence of a failure of the switch element of the first inverter 120.
  • FIG. 15 shows a failure diagnosis unit 830B that diagnoses the presence or absence of a failure of the switch element of the second inverter 130.
  • Failure diagnosis units 830A and 830B have substantially the same functional blocks, but input signals are different from each other.
  • the failure diagnosis unit 800 includes failure diagnosis units 830A and 830B shown in FIGS.
  • Each of the failure diagnosis units 830A and 830B includes logic circuits AND891, 892, 893, 894, 895, 896, 901, 902, 903, 904, 905, and 906.
  • the logic circuit AND 891 receives a failure signal A_FD indicating the presence / absence of a failure of the A phase H bridge BA and a failure signal H_FD indicating the presence / absence of a failure of the high side of the H bridge.
  • the logic circuit AND 891 When both the failure signal A_FD and the failure signal H_FD are “1” indicating the failure, the logic circuit AND 891 outputs “1”. When at least one of the failure signal A_FD and the failure signal H_FD is “0” indicating normality, the logic circuit AND 891 outputs “0”.
  • a failure signal 1_FD indicating whether or not the first inverter 120 has failed and an output signal of the logic circuit AND891 are input to the logic circuit AND901.
  • the logic circuit AND901 outputs a failure signal A1H_FD indicating whether or not the A-phase high-side switch element SW_A1H in the first inverter 120 has failed to the motor control unit 900.
  • the logic circuit AND901 When both the failure signal 1_FD and the output signal of the logic circuit AND891 are “1”, the logic circuit AND901 outputs “1” indicating that the switch element SW_A1H has failed. When at least one of the failure signal 1_FD and the output signal of the logic circuit AND891 is “0” indicating normality, the logic circuit AND901 outputs “0” indicating that the switch element SW_A1H is normal.
  • the failure signal A1H_FD output from the logic circuit AND901 is “1”, it can be specified that the high-side switch element SW_A1H has failed.
  • the logic circuit AND 892 receives a failure signal A_FD indicating whether or not the A-phase H bridge BA has failed, and a failure signal L_FD indicating whether or not the H bridge has a low-side failure.
  • the logic circuit AND 892 When both the failure signal A_FD and the failure signal L_FD are “1” indicating failure, the logic circuit AND 892 outputs “1”. When at least one of the failure signal A_FD and the failure signal L_FD is “0” indicating normality, the logic circuit AND 892 outputs “0”.
  • the logic circuit AND902 outputs a failure signal A1L_FD indicating whether or not the A-phase low-side switch element SW_A1L in the first inverter 120 has failed to the motor control unit 900.
  • the logic circuit AND902 When both the failure signal 1_FD and the output signal of the logic circuit AND892 are “1”, the logic circuit AND902 outputs “1” indicating that the switch element SW_A1L has failed. When at least one of the failure signal 1_FD and the output signal of the logic circuit AND892 is “0” indicating normality, the logic circuit AND902 outputs “0” indicating that the switch element SW_A1L is normal.
  • the logic circuit AND 893 receives a failure signal B_FD indicating the presence / absence of a failure in the B-phase H bridge BB and a failure signal H_FD indicating the presence / absence of a failure on the high side of the H bridge.
  • the logic circuit AND 893 When both the failure signal B_FD and the failure signal H_FD are “1” indicating a failure, the logic circuit AND 893 outputs “1”. When at least one of the failure signal B_FD and the failure signal H_FD is “0” indicating normality, the logic circuit AND 893 outputs “0”.
  • a failure signal 1_FD indicating whether or not the first inverter 120 has failed and an output signal of the logic circuit AND893 are input to the logic circuit AND903.
  • the logic circuit AND903 outputs a failure signal B1H_FD indicating whether or not the B-phase high-side switch element SW_B1H in the first inverter 120 has failed to the motor control unit 900.
  • the logic circuit AND903 When both the failure signal 1_FD and the output signal of the logic circuit AND893 are “1”, the logic circuit AND903 outputs “1” indicating that the switch element SW_B1H has failed. When at least one of the failure signal 1_FD and the output signal of the logic circuit AND893 is “0” indicating normality, the logic circuit AND903 outputs “0” indicating that the switch element SW_B1H is normal.
  • the logic circuit AND 894 receives a failure signal B_FD indicating the presence / absence of a failure of the B-phase H bridge BB and a failure signal L_FD indicating the presence / absence of a low-side failure of the H bridge.
  • the logic circuit AND 894 When both the failure signal B_FD and the failure signal L_FD are “1” indicating failure, the logic circuit AND 894 outputs “1”. When at least one of the failure signal B_FD and the failure signal L_FD is “0” indicating normality, the logic circuit AND 894 outputs “0”.
  • a failure signal 1_FD indicating whether or not the first inverter 120 has failed and an output signal of the logic circuit AND894 are input to the logic circuit AND904.
  • the logic circuit AND904 outputs a failure signal B1L_FD indicating whether or not the B-phase low-side switch element SW_B1L in the first inverter 120 has failed to the motor control unit 900.
  • the logic circuit AND 904 When both the failure signal 1_FD and the output signal of the logic circuit AND 894 are “1”, the logic circuit AND 904 outputs “1” indicating that the switch element SW_B1L has failed. When at least one of the failure signal 1_FD and the output signal of the logic circuit AND 894 is “0” indicating normality, the logic circuit AND904 outputs “0” indicating that the switch element SW_B1L is normal.
  • the logic circuit AND 895 receives a failure signal C_FD indicating whether or not the C-phase H-bridge BC has failed and a failure signal H_FD indicating whether or not the H-bridge has a high-side failure.
  • the logic circuit AND895 When both the failure signal C_FD and the failure signal H_FD are “1” indicating a failure, the logic circuit AND895 outputs “1”. When at least one of the failure signal C_FD and the failure signal H_FD is “0” indicating normality, the logic circuit AND895 outputs “0”.
  • a failure signal 1_FD indicating whether or not the first inverter 120 has failed and an output signal of the logic circuit AND895 are input to the logic circuit AND905.
  • the logic circuit AND905 outputs to the motor control unit 900 a failure signal C1H_FD indicating whether or not the C-phase high-side switch element SW_C1H in the first inverter 120 has failed.
  • the logic circuit AND905 When both the failure signal 1_FD and the output signal of the logic circuit AND895 are “1”, the logic circuit AND905 outputs “1” indicating that the switch element SW_C1H has failed. When at least one of the failure signal 1_FD and the output signal of the logic circuit AND895 is “0” indicating normality, the logic circuit AND905 outputs “0” indicating that the switch element SW_C1H is normal.
  • a failure signal C_FD indicating whether or not the C-phase H-bridge BC has failed and a failure signal L_FD indicating whether or not the H-bridge has a low-side failure are input.
  • the logic circuit AND896 When both the failure signal C_FD and the failure signal L_FD are “1” indicating failure, the logic circuit AND896 outputs “1”. When at least one of the failure signal C_FD and the failure signal L_FD is “0” indicating normality, the logic circuit AND896 outputs “0”.
  • the logic circuit AND906 outputs a failure signal C1L_FD indicating whether or not the C-phase low-side switch element SW_C1L in the first inverter 120 has failed to the motor control unit 900.
  • the logic circuit AND906 When both the failure signal 1_FD and the output signal of the logic circuit AND896 are “1”, the logic circuit AND906 outputs “1” indicating that the switch element SW_C1L has failed. When at least one of the failure signal 1_FD and the output signal of the logic circuit AND896 is “0” indicating normality, the logic circuit AND906 outputs “0” indicating that the switch element SW_C1L is normal.
  • the process executed by the failure diagnosis unit 830B shown in FIG. 15 is the same as that of the failure diagnosis unit 830A, and thus detailed description thereof is omitted here.
  • the failure diagnosis unit 830B executes the same process as the failure diagnosis unit 830A, and executes a diagnosis process for the presence or absence of a failure of the switch element of the second inverter 130.
  • the failure diagnosis unit 830B outputs the failure signals A2H_FD, A2L_FD, B2H_FD, B2L_FD, C2H_FD, and C2L_FD that indicate whether or not the switch elements SW_A2H, SW_A2L, SW_B2H, SW_B2L, SW_C2H, and SW_C2L have failed.
  • a failure has occurred in the second inverter 130, it can be specified which switch element has failed.
  • the motor control unit 900 changes the motor control according to the failure signal output by the failure diagnosis unit 800. For example, the motor control is switched from three-phase energization control to two-phase energization control. For example, when a failed switch element is specified, two-phase energization control using the remaining two phases other than the phase including the failed switch element is performed. For example, when it is determined that a switch element of the A-phase H bridge BA has failed, the motor control unit 900 turns off all the switch elements of the A-phase H bridge BA. Then, two-phase energization control using the remaining B-phase and C-phase H bridges BB and BC is performed. Therefore, even if one of the three phases fails, the power conversion apparatus 1000 can continue to drive the motor.
  • FIG. 17 exemplifies a current waveform (sine wave) obtained by plotting the current values flowing in the A-phase, B-phase, and C-phase windings of the motor 200 when the power conversion apparatus 1000 is controlled according to the three-phase energization control.
  • FIG. 18 is obtained by plotting the values of current flowing through the B-phase and C-phase windings of the motor 200 when the power converter 1000 is controlled according to the two-phase energization control when the A-phase H-bridge BA fails.
  • the current waveform is illustrated.
  • the horizontal axis represents the motor electrical angle (deg), and the vertical axis represents the current value (A).
  • Ipk represents the maximum current value (peak current value) of each phase.
  • FIG. 19 plots the values of current flowing through the A-phase and C-phase windings of the motor 200 when the power converter 1000 is controlled according to the two-phase energization control when the B-phase H-bridge BB fails.
  • the current waveform obtained in this way is illustrated.
  • FIG. 20 when the C-phase H-bridge BC fails, it is obtained by plotting the values of currents flowing in the A-phase and B-phase windings of the motor 200 when the power converter 1000 is controlled according to the two-phase energization control.
  • the current waveform is illustrated.
  • the order of processing among the above-described failure diagnosis units 800A, 800B, 800C, 810A, 810B, 820A, and 820B is arbitrary. For example, after determining whether there is a failed phase, it may be determined whether there is a failed part on the high side and low side of the H-bridge, or vice versa. Further, for example, after determining whether there is a failed inverter, it may be determined whether there is a failed phase or vice versa. These determinations may be processed in parallel.
  • failure diagnosis units 800A, 800B, 800C, 810A, 810B, 820A, and 820B it is not necessary to execute all the processes of the failure diagnosis units 800A, 800B, 800C, 810A, 810B, 820A, and 820B.
  • the process of determining whether there is a faulty phase if it is determined that there is a faulty phase before determining the presence or absence of all three-phase faults, it is not necessary to determine whether there are faults in the remaining phases. Good.
  • the determination of the presence / absence of the failure of the B phase and the C phase may not be performed.
  • the faulty switch element can be identified even if the processing related to the B phase and the C phase is omitted.
  • the process of determining whether there is a failed part in the high side and low side of the H bridge it is determined that there is a failed part before determining whether there is a failure in both the high side and low side parts. In this case, it is not necessary to determine whether there is a failure in the remaining part. For example, if it is determined that the high side has failed before determining whether there is a failure on both the high side and the low side, it is not necessary to determine whether there is a failure on the low side. If it is determined that the high side has failed, it is possible to identify the failed switch element even if the processing related to the low side is omitted.
  • the remaining inverters It is not necessary to determine whether or not there is a failure. For example, if it is determined that the first inverter 120 has failed before determining whether both the first inverter 120 and the second inverter 130 have failed, the determination of whether the second inverter 130 has failed is not performed. May be. If it is determined that the first inverter 120 has failed, it is possible to identify the failed switch element even if the processing related to the second inverter 130 is omitted.
  • failure diagnosis is performed only for two phases. May be executed. For example, when it is determined that the A phase and the B phase have not failed, it is possible to specify that the C phase has failed without performing a failure diagnosis of the C phase.
  • Fault diagnosis may be performed. For example, if it is determined that the high side has not failed, it can be determined that the low side has failed without performing a low-side failure diagnosis.
  • the first inverter 120 and the second inverter Failure diagnosis may be executed for only one of the inverters 130. For example, if it is determined that the first inverter 120 has not failed, it can be determined that the second inverter 130 has failed without performing failure diagnosis of the second inverter 130.
  • failure diagnosis units 830A and 830B may be performed only for the inverter that is determined to have a failure.
  • the amount of calculation can be reduced by omitting some of the plurality of processes.
  • the amount of calculation can be reduced by omitting some of the plurality of processes.
  • FIG. 21 shows waveforms of the actual voltage VA1 (upper side) and the actual voltage VA2 (lower side) when the low-side switch element SW_A1L has an open failure.
  • FIG. 22 shows waveforms of the actual voltage VB1 (upper side) and the actual voltage VB2 (lower side) when the low-side switch element SW_A1L has an open failure.
  • FIG. 23 shows waveforms of the actual voltage VC1 (upper side) and the actual voltage VC2 (lower side) when the low-side switch element SW_A1L has an open failure.
  • the low-side switch element SW_A1L After the low-side switch element SW_A1L has an open failure at time 1.641s, it can be seen that the lower peak value of the actual voltage VA1 increases as shown in FIG. It can also be seen that the upper peak value of the actual voltage VA2 is increasing. That is, the absolute value of the upper peak value of the actual voltage VA2 increases. As shown in FIGS. 22 and 23, the actual voltages VB1, VB2, VC1, and VC2 have a small degree of change.
  • FIG. 24 shows waveforms of the first actual voltage VA1 (upper side) and the second actual voltage VA2 (lower side) of the A phase when the high-side switch element SW_A1H in the A-phase H bridge BA has an open failure.
  • FIG. 25 shows the waveforms of the B-phase first actual voltage VB1 (upper side) and the second actual voltage VB2 (lower side) when the high-side switch element SW_A1H has an open failure.
  • FIG. 26 shows waveforms of the first actual voltage VC1 (upper side) and the second actual voltage VC2 (lower side) of the C phase when the high-side switch element SW_A1H has an open failure.
  • the middle of the determination process whether there is a faulty phase in the middle of the determination process whether there is a faulty part in the high side and low side of the H-bridge, and the determination process whether there is a faulty inverter In the middle of this, a failure of the switch element is detected. However, the failure of the switch element is not determined at those times. In this embodiment, based on the determination result of whether there is a failed phase, the determination result of whether there is a failed part in the high side and low side of the H-bridge, and the determination result of whether there is a failed inverter Then, the failed switch element is determined. Therefore, the accuracy of failure diagnosis can be increased.
  • the failure diagnosis of the present disclosure can be realized by a simple algorithm. For this reason, for example, an advantage of reducing the circuit size or the memory size can be obtained in mounting 340 to the controller.
  • the failure diagnosis method of the present disclosure can be suitably used for a full bridge type power conversion device.
  • the full bridge includes a one-phase H-bridge structure, for example, the circuit structure shown in FIG. 3A.
  • the full-bridge type power converter controls the switching operation of the H-bridge BA having the high-side switch element SW_A1H, the high-side switch element SW_A2H, the low-side switch element SW_A1L, and the low-side switch element SW_A2L, and the switch element of the H-bridge BA.
  • a control circuit 300 acquires the current / voltage expressed in the dq coordinate system, and acquires the first actual voltage VA1 indicating the voltage across the low-side switch element SW_A1L and the second actual voltage VA2 indicating the voltage across the low-side switch element SW_A2L. Then, the rotational speed ⁇ of the motor is obtained.
  • the control circuit 300 Based on the acquired current and voltage in the dq coordinate system, the first actual voltage VA1, the second actual voltage VA2, and the rotational speed ⁇ , the control circuit 300 generates the high-side switch element SW_A1H, the high-side switch element SW_A2H, and the low-side switch element. An open failure of SW_A1L and low-side switch element SW_A2L is diagnosed.
  • the above-described failure diagnosis need not be performed for all three phases, and the failure diagnosis may be performed only for one phase or two phases.
  • the failure diagnosis may be performed only for one phase or two phases.
  • the process related to the A phase among the processes described with reference to FIGS. 5 to 15 is performed, and the processes related to the B phase and the C phase may not be performed.
  • FIG. 27 schematically shows a typical configuration of the electric power steering apparatus 3000 according to the present embodiment.
  • a vehicle such as an automobile generally has an electric power steering device.
  • the electric power steering apparatus 3000 includes a steering system 520 and an auxiliary torque mechanism 540 that generates auxiliary torque.
  • the electric power steering device 3000 generates auxiliary torque that assists the steering torque of the steering system that is generated when the driver operates the steering wheel. The burden on the driver's operation is reduced by the auxiliary torque.
  • the steering system 520 includes, for example, a steering handle 521, a steering shaft 522, universal shaft joints 523A and 523B, a rotating shaft 524, a rack and pinion mechanism 525, a rack shaft 526, left and right ball joints 552A and 552B, tie rods 527A and 527B, and a knuckle. 528A and 528B, and left and right steering wheels 529A and 529B.
  • the auxiliary torque mechanism 540 includes, for example, a steering torque sensor 541, an automotive electronic control unit (ECU) 542, a motor 543, a speed reduction mechanism 544, and the like.
  • the steering torque sensor 541 detects the steering torque in the steering system 520.
  • the ECU 542 generates a drive signal based on the detection signal of the steering torque sensor 541.
  • the motor 543 generates an auxiliary torque corresponding to the steering torque based on the drive signal.
  • the motor 543 transmits the generated auxiliary torque to the steering system 520 via the speed reduction mechanism 544.
  • the ECU 542 includes, for example, the controller 340 and the drive circuit 350 according to the first embodiment.
  • an electronic control system with an ECU as a core is constructed.
  • a motor drive unit is constructed by the ECU 542, the motor 543, and the inverter 545.
  • the motor module 2000 according to the first embodiment can be suitably used for the system.
  • an EPS that implements a fault diagnosis method according to an embodiment of the present disclosure is an autonomous driving vehicle that corresponds to levels 0 to 5 (standards for automation) defined by the Japanese government and the US Department of Transportation's Road Traffic Safety Administration (NHTSA). Can be mounted.
  • levels 0 to 5 standards for automation
  • NHTSA US Department of Transportation's Road Traffic Safety Administration
  • the embodiment of the present disclosure can be widely used in various devices including various motors such as a vacuum cleaner, a dryer, a ceiling fan, a washing machine, a refrigerator, and an electric power steering device.
  • various motors such as a vacuum cleaner, a dryer, a ceiling fan, a washing machine, a refrigerator, and an electric power steering device.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Combustion & Propulsion (AREA)
  • Transportation (AREA)
  • Mechanical Engineering (AREA)
  • Inverter Devices (AREA)
  • Control Of Ac Motors In General (AREA)
  • Power Steering Mechanism (AREA)
  • Power Conversion In General (AREA)

Abstract

Selon un mode de réalisation, la présente invention concerne un procédé de diagnostic de défaillance qui diagnostique une défaillance d'un dispositif de conversion de puissance 1000 qui convertit de la puissance provenant d'une source d'alimentation 101 en puissance à fournir à un moteur 200. Le procédé de diagnostic de défaillance comprend : une étape consistant à déterminer s'il existe une phase défaillante parmi une ou plusieurs phases ; une étape consistant à déterminer s'il existe une partie défaillante parmi le côté haut et le côté bas d'au moins un pont en H ; une étape consistant à déterminer s'il existe un onduleur défaillant parmi un premier onduleur et un second onduleur ; et une étape consistant à déterminer s'il existe un élément de commutation défaillant sur la base du résultat de détermination quant à l'existence d'une phase défaillante, du résultat de détermination quant à l'existence d'une partie défaillante et du résultat de détermination quant à l'existence d'un onduleur défaillant.
PCT/JP2019/013062 2018-05-15 2019-03-27 Procédé de diagnostic de défaillance, dispositif de conversion de courant, module moteur et dispositif de direction assistée électrique WO2019220782A1 (fr)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011025872A (ja) * 2009-07-28 2011-02-10 Jtekt Corp 電動パワーステアリング装置
JP2011078221A (ja) * 2009-09-30 2011-04-14 Denso Corp 多相回転機の制御装置、および、これを用いた電動パワーステアリング装置
JP2014192950A (ja) * 2013-03-26 2014-10-06 Denso Corp 電力変換装置
WO2017150638A1 (fr) * 2016-03-04 2017-09-08 日本電産株式会社 Dispositif de conversion de puissance, unité d'entraînement de moteur et dispositif de direction assistée électrique

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011025872A (ja) * 2009-07-28 2011-02-10 Jtekt Corp 電動パワーステアリング装置
JP2011078221A (ja) * 2009-09-30 2011-04-14 Denso Corp 多相回転機の制御装置、および、これを用いた電動パワーステアリング装置
JP2014192950A (ja) * 2013-03-26 2014-10-06 Denso Corp 電力変換装置
WO2017150638A1 (fr) * 2016-03-04 2017-09-08 日本電産株式会社 Dispositif de conversion de puissance, unité d'entraînement de moteur et dispositif de direction assistée électrique

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