WO2019196425A1 - Procédé et appareil d'évaluation de crédibilité de mesure de retard de paquet de réseau, et support de stockage - Google Patents

Procédé et appareil d'évaluation de crédibilité de mesure de retard de paquet de réseau, et support de stockage Download PDF

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Publication number
WO2019196425A1
WO2019196425A1 PCT/CN2018/118024 CN2018118024W WO2019196425A1 WO 2019196425 A1 WO2019196425 A1 WO 2019196425A1 CN 2018118024 W CN2018118024 W CN 2018118024W WO 2019196425 A1 WO2019196425 A1 WO 2019196425A1
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WO
WIPO (PCT)
Prior art keywords
delay
value
network packet
total link
packet
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PCT/CN2018/118024
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English (en)
Chinese (zh)
Inventor
周华良
郑玉平
徐建松
姜雷
王凯
李友军
Original Assignee
国电南瑞科技股份有限公司
国电南瑞南京控制系统有限公司
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Publication of WO2019196425A1 publication Critical patent/WO2019196425A1/fr

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L43/00—Arrangements for monitoring or testing data switching networks
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L43/00—Arrangements for monitoring or testing data switching networks
    • H04L43/08—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters
    • H04L43/0852—Delays
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/14—Monitoring arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L43/00—Arrangements for monitoring or testing data switching networks
    • H04L43/16—Threshold monitoring
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L67/00—Network arrangements or protocols for supporting network services or applications
    • H04L67/01—Protocols
    • H04L67/12—Protocols specially adapted for proprietary or special-purpose networking environments, e.g. medical networks, sensor networks, networks in vehicles or remote metering networks
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
    • H04J3/0658—Clock or time synchronisation among packet nodes
    • H04J3/0661—Clock or time synchronisation among packet nodes using timestamps

Definitions

  • the invention belongs to the field of power system automation, and relates to a method, a device and a storage medium for evaluating the reliability of network packet delay measurement.
  • Ethernet With the in-depth application of technical standards such as IEC61850 in substations, Ethernet is widely used for connection between power secondary devices.
  • the introduction of Ethernet communication greatly simplifies the interface of power secondary equipment, realizes the sharing of internal data of substation, and promotes Implementation of advanced application functions in substations.
  • Ethernet data transmission has the problem of uncertain network delay, which is unacceptable for the use of some power service data.
  • the sampling value (SV, Sampled Value) of the protection device must be based on the accurate time of sampling.
  • SV Sampled Value
  • the transmission delay of the Ethernet packet in the network node can be calculated by using the time difference between the packet receiving time and the sending time.
  • the transmission delay of the Ethernet packet between the network nodes can be mutually transmitted through the nodes and recorded simultaneously.
  • the time information of the round-trip message is calculated using a certain algorithm.
  • the method for real-time measurement of message delay is derived based on the basic principle of Ethernet communication, for example, real-time delay value in the bottom layer of data communication through Field Programmable Gate Array (FPGA) technology. Measurement and correction. Since the delay value modified by the FPGA needs to be forwarded with the same message frame, a delay correction domain needs to be added in the message protocol, which is different from the standard Ethernet protocol; the more device nodes the message passes through, The possibility that the delay correction value produces an error is also greater.
  • multiple service packets may be simultaneously sent and received in a multi-service co-port network such as an SV, a Generic Object Oriented Substation Event (GOOSE), or a Manufacturing Message Specification (MMS).
  • GOOSE Generic Object Oriented Substation Event
  • MMS Manufacturing Message Specification
  • the embodiment of the present invention is to provide a method, an apparatus, and a storage medium for evaluating the credibility of network packet delay measurement.
  • the embodiment of the present invention is intended to provide a method for evaluating the credibility of network packet delay measurement, including:
  • the relative error of the sum of the packet forwarding delay and the transmission path delay between nodes is taken as the median, and the packet delay error of all nodes is summed and the arithmetic mean is taken as the total link delay.
  • the credibility indicator of the packet delay measurement value can be evaluated online in real time.
  • Network packet delay measurement results can be measured by quantitative indicators.
  • Engineering threshold parameters can reflect the trend of network traffic.
  • the reasonable value of the total link delay in the network packet is calculated based on the local clock in real time, and is independent of the external clock.
  • the absolute delay value of the network packet transmission delay is measured based on the external GPS/Bei Dou (BD) clock and the relative difference of the reasonable value of the total link delay is calculated.
  • BD GPS/Bei Dou
  • the intelligent electronic device IED, Intelligent Electronic Device
  • ADC Analog-to-Digital Converter
  • the total link delay error value ⁇ all index formula is as follows:
  • the single-node delay relative error ⁇ i is the absolute error of the measured value t i between the single-node forwarding and the transmission link delay relative to the true delay value.
  • the extended engineering threshold coefficients ⁇ and ⁇ constitute a confidence interval of the total link delay [ ⁇ *M, ⁇ *M]; wherein the engineering threshold coefficient ⁇ reflects the influence of the network packet flow change on the packet delay measurement, that is, Perceive the traffic flow situation in the network through the threshold coefficient of the project;
  • the actual engineering threshold is ⁇ * ⁇ all ;
  • the reliability of the network SV packet delay measurement is evaluated online based on the engineering threshold of the reasonable value of the total link delay and the delay error value. If the relative error of the reasonable value of the total link delay is less than ⁇ * ⁇ all , Within the confidence interval [ ⁇ *M, ⁇ *M], the total link delay is considered to be trustworthy.
  • a high-performance packet receiving and transmitting control clock is provided to a dedicated media access controller (MAC) module having a packet time stamping and delay correction function through a global clock network in the FPGA chip.
  • the module records the time of receiving and sending network packets according to the local clock.
  • the local clock module has punctuality and anti-error functions to ensure the reliability of the timestamp generator function.
  • An embodiment of the present invention further provides a credibility evaluation apparatus for network packet delay measurement, including:
  • a memory configured to store a credibility evaluation of network packet delay measurements
  • the processor is configured to run the program, where the program is executed to perform the credibility evaluation method of the network packet delay measurement provided by the embodiment of the present invention.
  • the embodiment of the present invention further provides a storage medium, where the storage medium includes a stored program, wherein the program is executed to perform a credibility evaluation method for the network packet delay measurement provided by the embodiment of the present invention.
  • FIG. 1 is a network packet transmission system for a power secondary device with n nodes according to an embodiment of the present invention.
  • FIG. 2 is a network packet delay measurement system implemented by using an FPGA technology according to an embodiment of the present invention.
  • FIG. 3 is a partial enlarged view of a portion of the MAC module of FIG. 2 according to an embodiment of the present invention.
  • the invention realizes a real-time evaluation method for the reliability of message delay measurement on the power secondary device, and proposes two technical indexes for evaluating the reliability of the delay measurement of the message, and the method for determining the threshold value of the corresponding project.
  • the measurement and evaluation system is built by FPGA technology to reflect the credibility of the message delay in real time.
  • a power secondary equipment network message transmission system containing (n + 2) nodes is shown in FIG. Two indicators, the total link delay reasonable value and the total link delay error value, are proposed to measure the credibility of the packet delay measurement.
  • the total link delay reasonable value T all is defined as the sum of the fixed delay of the source node sampling, the reasonable value of the packet forwarding of the single node, and the reasonable delay of the packet transmission path.
  • n is an integer greater than or equal to 1.
  • the fixed delay of the sampling of the intelligent IED source node ADC is T 0
  • the reasonable delay of each single node adjacent forwarding is t i
  • t i is a reasonable value of the forwarding delay between the single nodes t i1 and the message transmission path.
  • the single-node delay relative error ⁇ i is the absolute error of the measured value t i between the single node and the transmission link delay relative to the true delay value.
  • the total link delay error value ⁇ all is defined as: the average of the arithmetic delays of all single-node message delay relative error values, wherein the delay relative error value ⁇ i of each single node, this application will Defined as the median of the delay vs. error statistics for cumulative messages between single nodes.
  • the total link delay error value ⁇ all index formula is as follows:
  • the total link delay reasonable value T all and the total link delay error value ⁇ all are calculated in real time based on the local clock of the device, and can reflect the real-time state of the network packet transmission delay.
  • the statistical value method first determines the value M of the total link delay measurement value T all of the network packet, and based on this, the engineering threshold of the total link delay is taken.
  • the coefficients ⁇ , ⁇ constitute a confidence interval [ ⁇ *M, ⁇ *M] of the total link delay.
  • the engineering threshold coefficient ⁇ reflects the influence of network packet traffic change on packet delay measurement. That is, the threshold coefficient of the project can sense the traffic trend of the packet in the network, and provides a reference for the state monitoring and alarm of the network itself. .
  • the actual engineering threshold is ⁇ * ⁇ all .
  • the reliability of the network SV packet delay measurement is evaluated online based on the engineering threshold of the reasonable value of the total link delay and the delay error value, which can improve the judgment of the data delay of the SV network.
  • the upper and lower bounds of the confidence intervals of the two evaluation indicators predicted by the engineering threshold coefficient are significantly wider than the theoretically obtained confidence interval values and the statistical distribution of the measured values of the system.
  • the practical significance lies in the higher Under the confidence level, the margin of the upper and lower bound prediction results is larger, and the actual engineering application reliability of the delay measurement is higher, that is, while ensuring the delay value within a certain measurement accuracy range, the actual network is avoided.
  • the network packet delay measurement system can be implemented by using an FPGA technology, or by using an application specific integrated circuit (ASIC) or a system on chip (SoC).
  • ASIC application specific integrated circuit
  • SoC system on chip
  • the network packet delay measurement system implemented by FPGA technology is shown in FIG. 2 and FIG. 3.
  • the system uses a high-precision crystal clock source to generate a synchronous clock signal, and provides a high-performance message receiving and transmitting control clock to the dedicated MAC module with message timestamp lock and delay correction function through the global clock network in the FPGA chip.
  • the module records the time of receiving and sending network packets based on the local clock.
  • the local clock module has punctuality and error protection to ensure the reliability of the time stamp generator function.
  • the system supports access to an external GPS/BD clock.
  • the SV packet is used as an example to describe the process of implementing packet delay measurement and evaluation.
  • the MAC address of the SV packet forwarding node is based on the local clock to record the time t rx of the SV message frame header and the time t tx at which the packet header is forwarded.
  • the reasonable delay value t i2 of the SV packet transmission path is determined by the physical path of the packet transmission.
  • the physical path includes the physical layer (PHY, Port Physical Layer), network transformer, twisted pair, optical transceiver, and optical fiber.
  • the delay of the transmission path can be calculated using the method recommended by the IEC61588 standard.
  • the SV packet forwarding node uses the Frame Transmit Correction Field (FTCF) to transmit the SV packet forwarding delay of the local node to the next node.
  • FTCF is a 4-byte length field in the header format of the SV message frame. This field is used to store the reasonable link delay of the SV packet.
  • PPS GPS/BD
  • the relative delay of the packet delay of a single node is [T abs -i-(t i1 +t i2 )]/T abs-i , taking the time delay relative error statistics of several times (such as 20,000 times) between single nodes. Sort by size, take the median in this data sequence as ⁇ i .
  • the highest frequency is selected as its mode M, and ⁇ and ⁇ can be determined according to the network condition.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Environmental & Geological Engineering (AREA)
  • Health & Medical Sciences (AREA)
  • Computing Systems (AREA)
  • General Health & Medical Sciences (AREA)
  • Medical Informatics (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

L'invention concerne un procédé et un appareil d'évaluation de crédibilité de mesure de retard de paquet de réseau, et un support de stockage. Le procédé fournit la mesure sur la base de deux indices d'un paquet, c'est-à-dire une valeur raisonnable de retard total de liaison et une valeur d'erreur relative de retard total de liaison, et un procédé de calcul, et fournit un procédé d'utilisation d'ingénierie et de détermination de seuil pour déterminer un intervalle de confiance d'une valeur de mesure de retard de paquet de réseau à l'aide d'un procédé statistique, fournissant ainsi une base de confiance pour l'évaluation de crédibilité d'un résultat de mesure de retard de paquet de réseau, garantissant l'utilisation efficace et fiable d'un paquet de service d'alimentation essentiel (un paquet de réseau SV ou similaire) d'une station de transformation intelligente, et améliorant la fiabilité de fonctionnement d'un dispositif d'alimentation secondaire.
PCT/CN2018/118024 2018-04-11 2018-11-28 Procédé et appareil d'évaluation de crédibilité de mesure de retard de paquet de réseau, et support de stockage WO2019196425A1 (fr)

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CN113629879A (zh) * 2021-09-15 2021-11-09 广东电网有限责任公司 一种便携式sv/goose共网检修隔离装置及方法
CN113992563A (zh) * 2021-09-26 2022-01-28 北京连山科技股份有限公司 一种多链路多模式智能切换发包的方法
CN114553716A (zh) * 2022-01-21 2022-05-27 广东工业大学 一种报文传输路径匹配度计算方法、电子设备和存储介质
CN114826934A (zh) * 2022-03-14 2022-07-29 中国人民解放军国防科技大学 一种面向加权网络的通信效能评估方法和系统
CN114884866A (zh) * 2022-06-09 2022-08-09 中国电信股份有限公司 一种路径确定方法、装置、系统、设备及存储介质
CN114978947A (zh) * 2022-05-20 2022-08-30 南方电网科学研究院有限责任公司 一种电力仿真通信时间计算方法、装置和设备

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CN113629879A (zh) * 2021-09-15 2021-11-09 广东电网有限责任公司 一种便携式sv/goose共网检修隔离装置及方法
CN113629879B (zh) * 2021-09-15 2024-03-19 广东电网有限责任公司 一种便携式sv/goose共网检修隔离装置及方法
CN113992563A (zh) * 2021-09-26 2022-01-28 北京连山科技股份有限公司 一种多链路多模式智能切换发包的方法
CN113992563B (zh) * 2021-09-26 2022-08-05 北京连山科技股份有限公司 一种多链路多模式智能切换发包的方法
CN114553716A (zh) * 2022-01-21 2022-05-27 广东工业大学 一种报文传输路径匹配度计算方法、电子设备和存储介质
CN114826934A (zh) * 2022-03-14 2022-07-29 中国人民解放军国防科技大学 一种面向加权网络的通信效能评估方法和系统
CN114826934B (zh) * 2022-03-14 2023-08-22 中国人民解放军国防科技大学 一种面向加权网络的通信效能评估方法和系统
CN114978947A (zh) * 2022-05-20 2022-08-30 南方电网科学研究院有限责任公司 一种电力仿真通信时间计算方法、装置和设备
CN114884866A (zh) * 2022-06-09 2022-08-09 中国电信股份有限公司 一种路径确定方法、装置、系统、设备及存储介质

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