WO2019184150A1 - 一种像素驱动电路及显示装置 - Google Patents

一种像素驱动电路及显示装置 Download PDF

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WO2019184150A1
WO2019184150A1 PCT/CN2018/096193 CN2018096193W WO2019184150A1 WO 2019184150 A1 WO2019184150 A1 WO 2019184150A1 CN 2018096193 W CN2018096193 W CN 2018096193W WO 2019184150 A1 WO2019184150 A1 WO 2019184150A1
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Prior art keywords
control signal
thin film
film transistor
voltage
drain
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PCT/CN2018/096193
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English (en)
French (fr)
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李骏
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武汉华星光电半导体显示技术有限公司
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Priority to US16/136,271 priority Critical patent/US10825387B2/en
Publication of WO2019184150A1 publication Critical patent/WO2019184150A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0238—Improving the black level
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing

Definitions

  • the present invention relates to the field of liquid crystal display, and in particular to a pixel driving circuit and a display device.
  • OLEDs Organic light-emitting diodes
  • AMOLED active matrix organic light emitting diode
  • FIG. 1 The basic driving circuit of the AMOLED is shown in FIG. 1. It is a 2T1C mode, that is, includes two thin film transistors and one storage capacitor, specifically, a switching thin film transistor A1, a driving thin film transistor A2, and a storage capacitor C1.
  • the technical problem to be solved by the present invention is to provide a pixel driving circuit and a display device capable of providing a threshold voltage compensation function, thereby improving display characteristics of the display device.
  • a technical solution adopted by the present invention is to provide a pixel driving circuit, the circuit comprising a reset module, a compensation module and a lighting module; and the reset module is configured to receive the first control signal and in the first control signal Controlling the reset voltage to the compensation module and the illumination module to reset the compensation module and the illumination module; the compensation module is configured to receive the second control signal and write the data signal under the control of the second control signal and perform threshold voltage compensation; And receiving the third control signal and the fourth control signal and emitting light under the control of the third control signal and the fourth control signal; wherein the reset module comprises a second thin film transistor, a fourth thin film transistor; and a gate of the second thin film transistor Receiving a first control signal, the source is connected to the drain of the fourth thin film transistor, and the drain is connected to the compensation module; the gate of the fourth thin film transistor receives the first control signal, the source receives the reset voltage, and the drain and the second film a source connection of the transistor; wherein the compensation module comprises:
  • I OLED k(VDD - (Vdata -
  • ) 2 k (VDD - Vdata) 2 ;
  • I OLED is a driving current
  • VDD is a first voltage
  • Vdata is a voltage of a data signal
  • K is a current amplification factor of the first thin film transistor
  • the working process of the circuit is divided into three phases, namely a first working phase, a second working phase and a third working phase; in the first working phase, the first control signal and the third control signal are valid, and the second control signal is The fourth control signal is invalid; in the second working phase, the first control signal and the second control signal are valid, and the third control signal and the fourth control signal are invalid; in the third working phase, the third control signal and the fourth control signal are Valid, the first control signal and the second control signal are invalid.
  • the present invention adopts another technical solution: providing a pixel driving circuit, the circuit comprising a reset module, a compensation module and a lighting module; and the reset module is configured to receive the first control signal and in the first control signal The reset voltage is transmitted to the compensation module and the light emitting module to reset the compensation module and the light emitting module; the compensation module is configured to receive the second control signal and write the data signal under the control of the second control signal and perform threshold voltage compensation; The module is configured to receive the third control signal, the fourth control signal, and emit light under the control of the third control signal and the fourth control signal.
  • a display device which includes a pixel driving circuit, the circuit includes a reset module, a compensation module, and a light emitting module; and the reset module is configured to receive the first control And transmitting a reset voltage to the compensation module and the light emitting module to reset the compensation module and the light emitting module under the control of the first control signal; the compensation module is configured to receive the second control signal and write the data signal under the control of the second control signal And performing threshold voltage compensation; the illuminating module is configured to receive the third control signal, the fourth control signal, and emit light under the control of the third control signal and the fourth control signal.
  • the pixel driving circuit and the display device of the present invention comprise a reset module, a compensation module and a lighting module;
  • the reset module is configured to receive the first control signal and transmit the reset voltage to the compensation under the control of the first control signal
  • the module and the light emitting module are configured to reset the compensation module and the light emitting module;
  • the compensation module is configured to receive the second control signal and write the data signal under the control of the second control signal and perform threshold voltage compensation;
  • the light emitting module is configured to receive the third control signal, The fourth control signal emits light under the control of the third control signal and the fourth control signal.
  • the present invention can provide a threshold voltage compensation function, thereby improving the display characteristics of the display device.
  • FIG. 1 is a circuit schematic diagram of a pixel driving circuit of the prior art
  • FIG. 2 is a schematic structural diagram of a pixel driving circuit according to an embodiment of the present invention.
  • FIG. 3 is a circuit schematic diagram of the pixel driving circuit shown in FIG. 2;
  • FIG. 4 is a timing chart of control signals of the pixel driving circuit shown in FIG. 3;
  • FIG. 5 is a schematic structural view of a display device according to an embodiment of the present invention.
  • the pixel driving circuit 10 includes a reset module 11, a compensation module 12, and a light emitting module 13.
  • the reset module 11 is connected to the compensation module 12 and the light-emitting module 13 respectively, and the compensation module 12 and the light-emitting module 13 are connected.
  • the reset module 11 is configured to receive the first control signal S1 and transmit the reset voltage VI to the compensation module 12 and the light emitting module 13 under the control of the first control signal S1 to reset the compensation module 12 and the light emitting module 13.
  • the compensation module 12 is configured to receive the second control signal S2 and write the data signal Date under the control of the second control signal S2 and perform threshold voltage compensation.
  • the light emitting module 13 is configured to receive the third control signal S3 and the fourth control signal S4 and emit light under the control of the third control signal S3 and the fourth control signal S4.
  • FIG. 3 is a circuit schematic diagram of the pixel driving circuit shown in FIG.
  • the reset module 11 includes a second thin film transistor T2 and a fourth thin film transistor T4;
  • the compensation module 12 includes a first thin film transistor T1, a third thin film transistor T3, and a storage capacitor Cst;
  • the light emitting module 13 includes a fifth thin film transistor. T5, sixth thin film transistor T6, and light-emitting element D1.
  • the gate of the second thin film transistor T2 receives the first control signal S1, and the source is connected to the drain of the fourth thin film transistor T4 through the fifth thin film transistor T5, and the gate of the first thin film transistor T1 in the drain and compensation module 12.
  • the gate of the fourth thin film transistor T4 receives the first control signal S1, the source receives the reset voltage VI, and the drain is connected to the source of the second thin film transistor T2 through the fifth thin film transistor T5.
  • the gate of the first thin film transistor T1 is respectively connected to one end of the storage capacitor Cst and the drain of the second thin film transistor T2, the drain is connected to the source of the second thin film transistor T2, and the source and the drain of the third thin film transistor T3.
  • the gate of the third thin film transistor T3 receives the second control signal S2, and the source receives the data signal Date; the other end of the storage capacitor Cst is connected to the first voltage VDD.
  • the gate of the fifth thin film transistor T5 receives the third control signal S3, and the source and the drain of the fifth thin film transistor T5 are connected in series between the source of the second thin film transistor T2 and the drain of the fourth thin film transistor T4.
  • the drain of the fifth thin film transistor T5 is connected to the source of the second thin film transistor T2
  • the source of the fifth thin film transistor T5 is connected to the drain of the fourth thin film transistor T4, and the gate of the sixth thin film transistor T6 is received.
  • the fourth control signal S4 the drain of the sixth thin film transistor T6 is connected to the first voltage VDD
  • the source of the sixth thin film transistor T6 is connected to the source of the first thin film transistor T1
  • the anode of the light emitting element D1 is respectively connected to the fifth thin film.
  • the source of the transistor T5 is connected to the drain of the fourth thin film transistor T4, and the cathode of the light-emitting element D1 is connected to the second voltage VSS.
  • the light emitting element D1 is an
  • the first voltage VDD is at a high level
  • the reset voltage VI and the second voltage VSS are at a low level.
  • the first thin film transistor T1 is a driving transistor
  • the second to sixth thin film transistors T2 to T6 are switching transistors.
  • the first to seventh thin film transistors T1 to T7 are all P-type thin film transistors, that is, when the control signal is low, the corresponding thin film transistors are turned on.
  • the thin film transistor used in the present invention may also adopt an N-type thin film transistor or a mixed mode of an N-type thin film transistor and a P-type thin film transistor, and the thin film transistor used as a switching transistor, the source and the drain
  • the functions are interchangeable and no specific distinction is made here.
  • FIG. 4 is a timing diagram of control signals of the pixel driving circuit shown in FIG.
  • the operation process of the pixel driving circuit 10 is divided into three stages, which are a first working stage B1, a second working stage B2, and a third working stage B3, respectively.
  • the first working phase B1 is the reset phase.
  • the first control signal S1 and the third control signal S3 are valid, and the second control signal S2 and the fourth control signal S4 are invalid.
  • the first control signal S1 and the third control signal S3 are set to a low level, and the second control signal S2 and the fourth control signal S4 are set to a high level.
  • the fourth thin film transistor T4 is turned on, and the reset voltage VI received from the source of the fourth thin film transistor T4 is output through the drain of the fourth thin film transistor T4, and the anode of the light emitting element D1 and the drain of the fourth thin film transistor T4.
  • the anode of the light-emitting element D1 is reset to the reset voltage VI.
  • the fifth thin film transistor T5 and the second thin film transistor T2 are turned on, and the gate of the first thin film transistor T1 is connected to the drains of the fourth thin film transistor T5 and the second thin film transistor T2 through the fifth thin film transistor T5, and therefore, The gate of a thin film transistor T1 is reset to the reset voltage VI.
  • the second working phase B2 is a data writing and threshold voltage compensation phase.
  • the first control signal S1 and the second control signal S2 are valid, and the third control signal S3 and the fourth control signal S4 are invalid.
  • the first control signal S1 and the second control signal S2 are set to a low level, and the third control signal S3 and the fourth control signal S4 are set to a high level.
  • the second thin film transistor T2 is turned on, so that the gate and the drain of the first thin film transistor T1 are short-circuited to form a diode connection structure.
  • the third thin film transistor T3 is turned on, and the data signal Data received from the source of the third thin film transistor T3 is written into the source of the first thin film transistor T1 through the drain of the third thin film transistor T3, and passes through the diode of the first thin film transistor T1.
  • the connect structure charges the gate of the first thin film transistor T1 to Vdata ⁇
  • the third working phase B3 is the lighting phase.
  • the third control signal S3 and the fourth control signal S4 are valid, and the first control signal S1 and the second control signal S2 are invalid.
  • the third control signal S3 and the fourth control signal S4 are set to a low level, and the first control signal S1 and the second control signal S2 are set to a high level.
  • I OLED k(VDD - (Vdata -
  • ) 2 k (VDD - Vdata) 2 ;
  • the I OLED is a driving current
  • VDD is a first voltage
  • Vdata is a voltage of the data signal Data
  • K is a current amplification factor of the first thin film transistor T1.
  • the driving current I OLED is independent of the threshold voltage Vth of the first thin film transistor T1, so that the problem that the threshold voltage Vth of the first thin film transistor T1 drifts causes the display of the screen to be defective can be eliminated.
  • FIG. 5 is a schematic illustration of a display device in accordance with an embodiment of the present invention. As shown in FIG. 5, the display device 1 includes the pixel drive circuit 10 described above.
  • the pixel driving circuit and the display device of the present invention comprise a reset module, a compensation module and a lighting module;
  • the reset module is configured to receive the first control signal and transmit the reset voltage to the compensation under the control of the first control signal
  • the module and the light emitting module are configured to reset the compensation module and the light emitting module;
  • the compensation module is configured to receive the second control signal and write the data signal under the control of the second control signal and perform threshold voltage compensation;
  • the light emitting module is configured to receive the third control signal, The fourth control signal emits light under the control of the third control signal and the fourth control signal.
  • the present invention can provide a threshold voltage compensation function, thereby improving the display characteristics of the display device.

Abstract

一种像素驱动电路（10）及显示装置（1），能够提供阈值电压补偿功能，从而改善显示装置（1）的显示特性。其中，像素驱动电路（10）包括复位模块（11）、补偿模块（12）和发光模块（13）；复位模块（11）用于接收第一控制信号（S1）并在第一控制信号（S1）的控制下将复位电压（VI）传输至补偿模块（12）和发光模块（13）以复位补偿模块（12）和发光模块（13）；补偿模块（12）用于接收第二控制信号（S2）并在第二控制信号（S2）的控制下写入数据信号（Data）并进行阈值电压补偿；发光模块（13）用于接收第三控制信号（S3）、第四控制信号（S4）并在第三控制信号（S3）、第四控制信号（S4）的控制下发光。

Description

一种像素驱动电路及显示装置 【技术领域】
本发明涉及液晶显示领域，特别是涉及一种像素驱动电路及显示装置。
【背景技术】
有机发光二极管(OLED)色域广、对比度高、节能、并具有可折叠性，因而在新世代显示器中具有强有力的竞争力。其中，有源矩阵有机发光二极管(AMOLED))技术是柔性显示重点发展方向之一。AMOLED的基本驱动电路如图1所示，其为2T1C模式，即包括两个薄膜晶体管和一个存储电容，具体地，包括一个开关薄膜晶体管A1、一个驱动薄膜晶体管A2和一个存储电容C1。OLED的驱动电流由驱动薄膜晶体管A2控制，其电流大小为：I OLED＝k(V gs-V th) 2；其中，k为驱动薄膜晶体管A2的电流放大系数，由驱动薄膜晶体管A2本身特性决定，Vth为驱动薄膜晶体管A2的阈值电压。由于长时间的操作，驱动薄膜晶体管A2的阈值电压Vth会发生漂移，从而导致驱动电流变化，使得OLED面板出现不良，影响画质。
【发明内容】
本发明主要解决的技术问题是提供一种像素驱动电路及显示装置，能够提供阈值电压补偿功能，从而改善显示装置的显示特性。
为解决上述技术问题，本发明采用的一个技术方案是：提供一种像素驱动电路，该电路包括复位模块、补偿模块和发光模块；复位模块用于接收第一控制信号并在第一控制信号的控制下将复位电压传输至补偿模块和发光模块以复位补偿模块和发光模块；补偿模块用于接收第二控制信号并在第二控制信号的控制下写入数据信号并进行阈值电压补偿；发光模块用于接收第三控制信号、第四控制信号并在第三控制信号、第四控制信号的控制下发光；其中，复位模块包括第二薄膜晶体管、第四薄膜晶体管；第二薄膜晶体管的栅极接收第一控 制信号，源极与第四薄膜晶体管的漏极连接，漏极与补偿模块连接；第四薄膜晶体管的栅极接收第一控制信号，源极接收复位电压，漏极与第二薄膜晶体管的源极连接；其中，补偿模块包括：第一薄膜晶体管、第三薄膜晶体管和存储电容；第一薄膜晶体管的栅极分别与存储电容的一端和第二薄膜晶体管的漏极连接，漏极与第二薄膜晶体管的源极连接，源极与第三薄膜晶体管的漏极连接；第三薄膜晶体管的栅极接收第二控制信号，源极接收数据信号；存储电容的另一端连接第一电压；其中，发光模块包括第五薄膜晶体管、第六薄膜晶体管和发光元件；第五薄膜晶体管的栅极接收第三控制信号，第五薄膜晶体管的源极和漏极串接在第二薄膜晶体管的源极和第四薄膜晶体管的漏极之间；第六薄膜晶体管的栅极接收第四控制信号，第六薄膜晶体管的漏极与第一电压连接，第六薄膜晶体管的源极与第一薄膜晶体管的源极连接；发光元件的阳极分别与第五薄膜晶体管的源极和第四薄膜晶体管的漏极连接，发光元件的阴极与第二电压连接；其中，当发光模块发光时，流经发光元件的驱动电流满足如下公式：
I OLED＝k(VDD-(Vdata-|Vth|)-|Vth|) 2＝k(VDD-Vdata) 2；
其中，I OLED为驱动电流，VDD为第一电压，Vdata为数据信号的电压，K为第一薄膜晶体管的电流放大系数；
其中，电路的工作过程分为三个阶段，分别为第一工作阶段、第二工作阶段和第三工作阶段；在第一工作阶段，第一控制信号、第三控制信号有效，第二控制信号、第四控制信号无效；在第二工作阶段，第一控制信号、第二控制信号有效，第三控制信号、第四控制信号无效；在第三工作阶段，第三控制信号、第四控制信号有效，第一控制信号、第二控制信号无效。
为解决上述技术问题，本发明采用另的一个技术方案是：提供一种像素驱动电路，该电路包括复位模块、补偿模块和发光模块；复位模块用于接收第一控制信号并在第一控制信号的控制下将复位电压传输至补偿模块和发光模块以复位补偿模块和发光模块；补偿模块用于接收第二控制信号并在第二控制信号的控制下写入数据信号并进行阈值电压补偿；发光模块用于接收第三控制信号、 第四控制信号并在第三控制信号、第四控制信号的控制下发光。
为解决上述技术问题，本发明采用的再一个技术方案是：提供一种显示装置，该显示装置包括像素驱动电路，该电路包括复位模块、补偿模块和发光模块；复位模块用于接收第一控制信号并在第一控制信号的控制下将复位电压传输至补偿模块和发光模块以复位补偿模块和发光模块；补偿模块用于接收第二控制信号并在第二控制信号的控制下写入数据信号并进行阈值电压补偿；发光模块用于接收第三控制信号、第四控制信号并在第三控制信号、第四控制信号的控制下发光。
本发明的有益效果是：本发明的像素驱动电路及显示装置包括复位模块、补偿模块和发光模块；复位模块用于接收第一控制信号并在第一控制信号的控制下将复位电压传输至补偿模块和发光模块以复位补偿模块和发光模块；补偿模块用于接收第二控制信号并在第二控制信号的控制下写入数据信号并进行阈值电压补偿；发光模块用于接收第三控制信号、第四控制信号并在第三控制信号、第四控制信号的控制下发光。通过上述方式，本发明能够提供阈值电压补偿功能，从而改善显示装置的显示特性。
【附图说明】
图1是现有技术的像素驱动电路的电路原理图；
图2是本发明实施例的像素驱动电路的结构示意图；
图3是图2所示像素驱动电路的电路原理图；
图4是图3所示像素驱动电路的控制信号时序图；
图5是本发明实施例的显示装置的结构示意图。
【具体实施方式】
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅是本发明的一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有作出创造 性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
图2是本发明实施例的像素驱动电路的结构示意图。如图2所示，像素驱动电路10包括复位模块11、补偿模块12和发光模块13。其中，复位模块11分别与补偿模块12和发光模块13连接，补偿模块12和发光模块13连接。
复位模块11用于接收第一控制信号S1并在第一控制信号S1的控制下将复位电压VI传输至补偿模块12和发光模块13以复位补偿模块12和发光模块13。
补偿模块12用于接收第二控制信号S2并在第二控制信号S2的控制下写入数据信号Date并进行阈值电压补偿。
发光模块13用于接收第三控制信号S3、第四控制信号S4并在第三控制信号S3、第四控制信号S4的控制下发光。
请一并参考图3，图3是图2所示像素驱动电路的电路原理图。如图3所示：复位模块11包括第二薄膜晶体管T2、第四薄膜晶体管T4；补偿模块12包括第一薄膜晶体管T1、第三薄膜晶体管T3和存储电容Cst；发光模块13包括第五薄膜晶体管T5、第六薄膜晶体管T6和发光元件D1。
第二薄膜晶体管T2的栅极接收第一控制信号S1，源极通过第五薄膜晶体管T5与第四薄膜晶体管T4的漏极连接，漏极与补偿模块12中的第一薄膜晶体管T1的栅极连接；第四薄膜晶体管T4的栅极接收第一控制信号S1，源极接收复位电压VI，漏极通过第五薄膜晶体管T5与第二薄膜晶体管T2的源极连接。
第一薄膜晶体管T1的栅极分别与存储电容Cst的一端和第二薄膜晶体管T2的漏极连接，漏极与第二薄膜晶体管T2的源极连接，源极与第三薄膜晶体管T3的漏极连接；第三薄膜晶体管T3的栅极接收第二控制信号S2，源极接收数据信号Date；存储电容Cst的另一端连接第一电压VDD。
第五薄膜晶体管T5的栅极接收第三控制信号S3，第五薄膜晶体管T5的源极和漏极串接在第二薄膜晶体管T2的源极和第四薄膜晶体管T4的漏极之间，具体来说，第五薄膜晶体管T5的漏极与第二薄膜晶体管T2的源极连接，第五薄膜晶体管T5的源极与第四薄膜晶体管T4的漏极连接；第六薄膜晶体管T6 的栅极接收第四控制信号S4，第六薄膜晶体管T6的漏极与第一电压VDD连接，第六薄膜晶体管T6的源极与第一薄膜晶体管T1的源极连接；发光元件D1的阳极分别与第五薄膜晶体管T5的源极和第四薄膜晶体管T4的漏极连接，发光元件D1的阴极与第二电压VSS连接。其中，发光元件D1为有机发光二极管。
在本实施例中，第一电压VDD为高电平，复位电压VI和第二电压VSS为低电平。
在本实施例中，第一薄膜晶体管T1为驱动晶体管，第二薄膜晶体管T2到第六薄膜晶体管T6为开关晶体管。其中第一薄膜晶体管T1到第七薄膜晶体管T7均为P型薄膜晶体管，也即当控制信号为低电平时相应的薄膜晶体管导通。当然，在实际电路设计中，本发明所用薄膜晶体管还可以采用N型薄膜晶体管或者N型薄膜晶体管与P型薄膜晶体管的混合方式，并且所用薄膜晶体管在作为开关晶体管时，源极和漏极的功能可以互换，在此不做具体的区分。
请一并参考图4，图4是图3所示像素驱动电路的控制信号时序图。如图4所示，像素驱动电路10的工作过程分为三个阶段，分别为第一工作阶段B1、第二工作阶段B2和第三工作阶段B3。
第一工作阶段B1为复位阶段。在第一工作阶段B1，第一控制信号S1、第三控制信号S3有效，第二控制信号S2、第四控制信号S4无效。换个角度来说，在第一工作阶段，将第一控制信号S1、第三控制信号S3置为低电平，第二控制信号S2、第四控制信号S4置为高电平。此时，第四薄膜晶体管T4导通，从第四薄膜晶体管T4的源极接收的复位电压VI经第四薄膜晶体管T4的漏极输出，发光元件D1的阳极与第四薄膜晶体管T4的漏极连接，因此，发光元件D1的阳极被复位到复位电压VI。另外，第五薄膜晶体管T5、第二薄膜晶体管T2导通，第一薄膜晶体管T1的栅极通过第五薄膜晶体管T5、第二薄膜晶体管T2与第四薄膜晶体管T4的漏极连接，因此，第一薄膜晶体管T1的栅极复位至复位电压VI。
第二工作阶段B2为数据写入和阈值电压补偿阶段。在第二工作阶段B2， 第一控制信号S1、第二控制信号S2有效，第三控制信号S3、第四控制信号S4无效。换个角度来说，在第二工作阶段B2，将第一控制信号S1、第二控制信号S2置为低电平，第三控制信号S3、第四控制信号S4置为高电平。此时，第二薄膜晶体管T2导通，使得第一薄膜晶体管T1的栅极和漏极短接形成了diode connect(二极管)结构。第三薄膜晶体管T3导通，从第三薄膜晶体管T3的源极接收的数据信号Data经第三薄膜晶体管T3的漏极写入第一薄膜晶体管T1的源极，经过第一薄膜晶体管T1的diode connect结构，将第一薄膜晶体管T1的栅极充电至Vdata-|Vth|，其中，Vth为第一薄膜晶体管T1的阈值电压，Vdata为数据信号Data的电压。
第三工作阶段B3为发光阶段。在第三工作阶段B3，第三控制信号S3、第四控制信号S4有效，第一控制信号S1、第二控制信号S2无效。换个角度来说，在第三工作阶段B3，将第三控制信号S3、第四控制信号S4置为低电平，第一控制信号S1、第二控制信号S2置为高电平。当第五薄膜晶体管T5、第六薄膜晶体管T6导通时，发光元件D1流经的驱动电流满足如下公式：
I OLED＝k(VDD-(Vdata-|Vth|)-|Vth|) 2＝k(VDD-Vdata) 2；
其中，I OLED为驱动电流，VDD为第一电压，Vdata为数据信号Data的电压，K为第一薄膜晶体管T1的电流放大系数。
从上述公式可以看出，驱动电流I OLED与第一薄膜晶体管T1的阈值电压Vth无关，从而可以消除第一薄膜晶体管T1的阈值电压Vth漂移引起画面显示不良的问题。
图5是本发明实施例的显示装置的示意图。如图5所示，显示装置1包括了上述的像素驱动电路10。
本发明的有益效果是：本发明的像素驱动电路及显示装置包括复位模块、补偿模块和发光模块；复位模块用于接收第一控制信号并在第一控制信号的控制下将复位电压传输至补偿模块和发光模块以复位补偿模块和发光模块；补偿模块用于接收第二控制信号并在第二控制信号的控制下写入数据信号并进行阈 值电压补偿；发光模块用于接收第三控制信号、第四控制信号并在第三控制信号、第四控制信号的控制下发光。通过上述方式，本发明能够提供阈值电压补偿功能，从而改善显示装置的显示特性。
以上所述仅为本发明的实施方式，并非因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本发明的专利保护范围内。

Claims (20)

  1. 一种像素驱动电路，其中，所述电路包括复位模块、补偿模块和发光模块；
    所述复位模块用于接收第一控制信号并在所述第一控制信号的控制下将复位电压传输至所述补偿模块和所述发光模块以复位所述补偿模块和所述发光模块；
    所述补偿模块用于接收第二控制信号并在所述第二控制信号的控制下写入数据信号并进行阈值电压补偿；
    所述发光模块用于接收第三控制信号、第四控制信号并在所述第三控制信号、所述第四控制信号的控制下发光；
    其中，所述复位模块包括第二薄膜晶体管、第四薄膜晶体管；所述第二薄膜晶体管的栅极接收所述第一控制信号，源极与所述第四薄膜晶体管的漏极连接，漏极与所述补偿模块连接；所述第四薄膜晶体管的栅极接收所述第一控制信号，源极接收所述复位电压，漏极与所述第二薄膜晶体管的源极连接；
    其中，所述补偿模块包括：第一薄膜晶体管、第三薄膜晶体管和存储电容；所述第一薄膜晶体管的栅极分别与所述存储电容的一端和所述第二薄膜晶体管的漏极连接，漏极与所述第二薄膜晶体管的源极连接，源极与所述第三薄膜晶体管的漏极连接；所述第三薄膜晶体管的栅极接收所述第二控制信号，源极接收所述数据信号；所述存储电容的另一端连接第一电压；
    其中，所述发光模块包括第五薄膜晶体管、第六薄膜晶体管和发光元件；所述第五薄膜晶体管的栅极接收所述第三控制信号，所述第五薄膜晶体管的源极和漏极串接在所述第二薄膜晶体管的源极和所述第四薄膜晶体管的漏极之间；所述第六薄膜晶体管的栅极接收所述第四控制信号，所述第六薄膜晶体管的漏极与所述第一电压连接，所述第六薄膜晶体管的源极与所述第一薄膜晶体管的源极连接；所述发光元件的阳极分别与所述第五薄膜晶体管的源极和所述第四 薄膜晶体管的漏极连接，所述发光元件的阴极与第二电压连接；
    其中，当所述发光模块发光时，流经所述发光元件的驱动电流满足如下公式：
    I OLED＝k(VDD-(Vdata-|Vth|)-|Vth|) 2＝k(VDD-Vdata) 2；
    其中，I OLED为所述驱动电流，VDD为所述第一电压，Vdata为所述数据信号的电压，K为所述第一薄膜晶体管的电流放大系数；
    其中，所述电路的工作过程分为三个阶段，分别为第一工作阶段、第二工作阶段和第三工作阶段；在所述第一工作阶段，所述第一控制信号、所述第三控制信号有效，所述第二控制信号、所述第四控制信号无效；在所述第二工作阶段，所述第一控制信号、所述第二控制信号有效，所述第三控制信号、所述第四控制信号无效；在所述第三工作阶段，所述第三控制信号、所述第四控制信号有效，所述第一控制信号、所述第二控制信号无效。
  2. 根据权利要求1所述的电路，其中，当所述电路中的薄膜晶体管为P型薄膜晶体管时：
    当所述第一控制信号、所述第二控制信号、所述第三控制信号、所述第四控制信号为低电平时，所述第一控制信号、所述第二控制信号、所述第三控制信号、所述第四控制信号有效；
    当所述第一控制信号、所述第二控制信号、所述第三控制信号、所述第四控制信号为高电平时，所述第一控制信号、所述第二控制信号、所述第三控制信号、所述第四控制信号无效。
  3. 一种像素驱动电路，其中，所述电路包括复位模块、补偿模块和发光模块；
    所述复位模块用于接收第一控制信号并在所述第一控制信号的控制下将复位电压传输至所述补偿模块和所述发光模块以复位所述补偿模块和所述发光模块；
    所述补偿模块用于接收第二控制信号并在所述第二控制信号的控制下写入 数据信号并进行阈值电压补偿；
    所述发光模块用于接收第三控制信号、第四控制信号并在所述第三控制信号、所述第四控制信号的控制下发光。
  4. 根据权利要求3所述的电路，其中，所述复位模块包括第二薄膜晶体管、第四薄膜晶体管；
    所述第二薄膜晶体管的栅极接收所述第一控制信号，源极与所述第四薄膜晶体管的漏极连接，漏极与所述补偿模块连接；
    所述第四薄膜晶体管的栅极接收所述第一控制信号，源极接收所述复位电压，漏极与所述第二薄膜晶体管的源极连接。
  5. 根据权利要求4所述的电路，其中，所述补偿模块包括：第一薄膜晶体管、第三薄膜晶体管和存储电容；
    所述第一薄膜晶体管的栅极分别与所述存储电容的一端和所述第二薄膜晶体管的漏极连接，漏极与所述第二薄膜晶体管的源极连接，源极与所述第三薄膜晶体管的漏极连接；
    所述第三薄膜晶体管的栅极接收所述第二控制信号，源极接收所述数据信号；
    所述存储电容的另一端连接第一电压。
  6. 根据权利要求5所述的电路，其中，所述发光模块包括第五薄膜晶体管、第六薄膜晶体管和发光元件；
    所述第五薄膜晶体管的栅极接收所述第三控制信号，所述第五薄膜晶体管的源极和漏极串接在所述第二薄膜晶体管的源极和所述第四薄膜晶体管的漏极之间；
    所述第六薄膜晶体管的栅极接收所述第四控制信号，所述第六薄膜晶体管的漏极与所述第一电压连接，所述第六薄膜晶体管的源极与所述第一薄膜晶体管的源极连接；
    所述发光元件的阳极分别与所述第五薄膜晶体管的源极和所述第四薄膜晶 体管的漏极连接，所述发光元件的阴极与第二电压连接。
  7. 根据权利要求6所述的电路，其中，当所述发光模块发光时，流经所述发光元件的驱动电流满足如下公式：
    I OLED＝k(VDD-(Vdata-|Vth|)-|Vth|) 2＝k(VDD-Vdata) 2；
    其中，I OLED为所述驱动电流，VDD为所述第一电压，Vdata为所述数据信号的电压，K为所述第一薄膜晶体管的电流放大系数。
  8. 根据权利要求6所述的电路，其中，所述电路的工作过程分为三个阶段，分别为第一工作阶段、第二工作阶段和第三工作阶段；
    在所述第一工作阶段，所述第一控制信号、所述第三控制信号有效，所述第二控制信号、所述第四控制信号无效；
    在所述第二工作阶段，所述第一控制信号、所述第二控制信号有效，所述第三控制信号、所述第四控制信号无效；
    在所述第三工作阶段，所述第三控制信号、所述第四控制信号有效，所述第一控制信号、所述第二控制信号无效。
  9. 根据权利要求8所述的电路，其中，当所述电路中的薄膜晶体管为P型薄膜晶体管时：
    当所述第一控制信号、所述第二控制信号、所述第三控制信号、所述第四控制信号为低电平时，所述第一控制信号、所述第二控制信号、所述第三控制信号、所述第四控制信号有效；
    当所述第一控制信号、所述第二控制信号、所述第三控制信号、所述第四控制信号为高电平时，所述第一控制信号、所述第二控制信号、所述第三控制信号、所述第四控制信号无效。
  10. 根据权利要求9所述的电路，其中，
    在所述第一工作阶段，所述第一薄膜晶体管的栅极的电压为复位电压；在所述第二工作阶段，所述第一薄膜晶体管的栅极的电压为所述数据信号的电压与所述第一薄膜晶体管的阈值电压的差值。
  11. 根据权利要求6所述的电路，其中，所述第一电压为高电平，所述复位电压和所述第二电压为低电平。
  12. 一种显示装置，其中，所述显示装置包括像素驱动电路，所述电路包括复位模块、补偿模块和发光模块；
    所述复位模块用于接收第一控制信号并在所述第一控制信号的控制下将复位电压传输至所述补偿模块和所述发光模块以复位所述补偿模块和所述发光模块；
    所述补偿模块用于接收第二控制信号并在所述第二控制信号的控制下写入数据信号并进行阈值电压补偿；
    所述发光模块用于接收第三控制信号、第四控制信号并在所述第三控制信号、所述第四控制信号的控制下发光。
  13. 根据权利要求12所述的显示装置，其中，所述复位模块包括第二薄膜晶体管、第四薄膜晶体管；
    所述第二薄膜晶体管的栅极接收所述第一控制信号，源极与所述第四薄膜晶体管的漏极连接，漏极与所述补偿模块连接；
    所述第四薄膜晶体管的栅极接收所述第一控制信号，源极接收所述复位电压，漏极与所述第二薄膜晶体管的源极连接。
  14. 根据权利要求13所述的显示装置，其中，所述补偿模块包括：第一薄膜晶体管、第三薄膜晶体管和存储电容；
    所述第一薄膜晶体管的栅极分别与所述存储电容的一端和所述第二薄膜晶体管的漏极连接，漏极与所述第二薄膜晶体管的源极连接，源极与所述第三薄膜晶体管的漏极连接；
    所述第三薄膜晶体管的栅极接收所述第二控制信号，源极接收所述数据信号；
    所述存储电容的另一端连接第一电压。
  15. 根据权利要求14所述的显示装置，其中，所述发光模块包括第五薄膜 晶体管、第六薄膜晶体管和发光元件；
    所述第五薄膜晶体管的栅极接收所述第三控制信号，所述第五薄膜晶体管的源极和漏极串接在所述第二薄膜晶体管的源极和所述第四薄膜晶体管的漏极之间；
    所述第六薄膜晶体管的栅极接收所述第四控制信号，所述第六薄膜晶体管的漏极与所述第一电压连接，所述第六薄膜晶体管的源极与所述第一薄膜晶体管的源极连接；
    所述发光元件的阳极分别与所述第五薄膜晶体管的源极和所述第四薄膜晶体管的漏极连接，所述发光元件的阴极与第二电压连接。
  16. 根据权利要求15所述的显示装置，其中，当所述发光模块发光时，流经所述发光元件的驱动电流满足如下公式：
    I OLED＝k(VDD-(Vdata-|Vth|)-|Vth|) 2＝k(VDD-Vdata) 2；
    其中，I OLED为所述驱动电流，VDD为所述第一电压，Vdata为所述数据信号的电压，K为所述第一薄膜晶体管的电流放大系数。
  17. 根据权利要求15所述的显示装置，其中，所述电路的工作过程分为三个阶段，分别为第一工作阶段、第二工作阶段和第三工作阶段；
    在所述第一工作阶段，所述第一控制信号、所述第三控制信号有效，所述第二控制信号、所述第四控制信号无效；
    在所述第二工作阶段，所述第一控制信号、所述第二控制信号有效，所述第三控制信号、所述第四控制信号无效；
    在所述第三工作阶段，所述第三控制信号、所述第四控制信号有效，所述第一控制信号、所述第二控制信号无效。
  18. 根据权利要求17所述的显示装置，其中，当所述电路中的薄膜晶体管为P型薄膜晶体管时：
    当所述第一控制信号、所述第二控制信号、所述第三控制信号、所述第四控制信号为低电平时，所述第一控制信号、所述第二控制信号、所述第三控制 信号、所述第四控制信号有效；
    当所述第一控制信号、所述第二控制信号、所述第三控制信号、所述第四控制信号为高电平时，所述第一控制信号、所述第二控制信号、所述第三控制信号、所述第四控制信号无效。
  19. 根据权利要求18所述的显示装置，其中，
    在所述第一工作阶段，所述第一薄膜晶体管的栅极的电压为复位电压；在所述第二工作阶段，所述第一薄膜晶体管的栅极的电压为所述数据信号的电压与所述第一薄膜晶体管的阈值电压的差值。
  20. 根据权利要求15所述的显示装置，其中，所述第一电压为高电平，所述复位电压和所述第二电压为低电平。
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