WO2019153152A1 - 充电检测电路、充电盒、耳机的通信装置和耳机 - Google Patents

充电检测电路、充电盒、耳机的通信装置和耳机 Download PDF

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Publication number
WO2019153152A1
WO2019153152A1 PCT/CN2018/075657 CN2018075657W WO2019153152A1 WO 2019153152 A1 WO2019153152 A1 WO 2019153152A1 CN 2018075657 W CN2018075657 W CN 2018075657W WO 2019153152 A1 WO2019153152 A1 WO 2019153152A1
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WO
WIPO (PCT)
Prior art keywords
circuit
contact
charging
mos transistor
charge
Prior art date
Application number
PCT/CN2018/075657
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English (en)
French (fr)
Inventor
程树青
阙滨城
杨明
Original Assignee
深圳市为通博科技有限责任公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 深圳市为通博科技有限责任公司 filed Critical 深圳市为通博科技有限责任公司
Priority to PCT/CN2018/075657 priority Critical patent/WO2019153152A1/zh
Priority to EP18903039.8A priority patent/EP3567694B1/en
Priority to CN201880000298.2A priority patent/CN108352718B/zh
Priority to US16/524,010 priority patent/US11349328B2/en
Publication of WO2019153152A1 publication Critical patent/WO2019153152A1/zh

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    • H02J7/0086—
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/0029—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits
    • H02J7/0036—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits using connection detecting circuits
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/36—Arrangements for testing, measuring or monitoring the electrical condition of accumulators or electric batteries, e.g. capacity or state of charge [SoC]
    • G01R31/382—Arrangements for monitoring battery or accumulator variables, e.g. SoC
    • G01R31/3828—Arrangements for monitoring battery or accumulator variables, e.g. SoC using current integration
    • G01R31/3832—Arrangements for monitoring battery or accumulator variables, e.g. SoC using current integration without measurement of battery voltage
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J50/00—Circuit arrangements or systems for wireless supply or distribution of electric power
    • H02J50/10—Circuit arrangements or systems for wireless supply or distribution of electric power using inductive coupling
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/00032—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries characterised by data exchange
    • H02J7/00034—Charger exchanging data with an electronic device, i.e. telephone, whose internal battery is under charge
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/0029—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits
    • H02J7/0031—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits using battery or load disconnect circuits
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/0047—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with monitoring or indicating devices or circuits
    • H02J7/0048—Detection of remaining charge capacity or state of charge [SOC]
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/007—Regulation of charging or discharging current or voltage
    • H02J7/00712—Regulation of charging or discharging current or voltage the cycle being controlled or terminated in response to electric parameters
    • H02J7/007182—Regulation of charging or discharging current or voltage the cycle being controlled or terminated in response to electric parameters in response to battery voltage
    • H02J7/007186—Regulation of charging or discharging current or voltage the cycle being controlled or terminated in response to electric parameters in response to battery voltage obtained with the battery disconnected from the charge or discharge circuit
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B3/00—Line transmission systems
    • H04B3/54—Systems for transmission via power distribution lines
    • H04B3/548—Systems for transmission via power distribution lines the power on the line being DC
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B3/00—Line transmission systems
    • H04B3/54—Systems for transmission via power distribution lines
    • H04B3/56—Circuits for coupling, blocking, or by-passing of signals
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B5/00—Near-field transmission systems, e.g. inductive or capacitive transmission systems
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/0029—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits
    • H02J7/00302—Overcharge protection
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
    • H04R1/00—Details of transducers, loudspeakers or microphones
    • H04R1/10—Earpieces; Attachments therefor ; Earphones; Monophonic headphones
    • H04R1/1025—Accumulators or arrangements for charging

Definitions

  • Embodiments of the present application relate to the field of electronic technologies, and more particularly, to a charging detection circuit, a charging box, a communication device for an earphone, and an earphone.
  • the no-load detecting circuit in the charging box is configured to detect whether the output of the charging box is suspended.
  • the charging current detecting circuit in the charging box detects the charging current of the charging box when the output of the charging box is connected to the device to be charged. the size of.
  • the sampling resistor 110 is as shown in FIG. It can be found that in the prior art, the charging current is calculated by converting the current into a voltage by the sampling resistor 110, which causes a fixed loss in the resistance and reduces the charging efficiency; in addition, since the sampling resistor 110 converts the current into a voltage, When charging into the constant voltage mode, the charging current is getting smaller and smaller, the voltage after the resistance conversion is getting weaker and weaker, and the dynamic range is smaller, which makes it difficult for the processor to distinguish such a signal.
  • a charging detection circuit, a charging box, a communication device for an earphone, and an earphone are provided.
  • the first communication circuit is built in the charging detection circuit, so that the charging detection circuit directly performs information interaction between the first communication circuit and the first device to be charged, so that the state of charge of the first device can be accurately grasped.
  • the first communication circuit can perform information interaction with the first device without changing the number of contact contacts, thereby further avoiding changes in user usage habits and improving user experience.
  • a charge detection circuit comprising:
  • a first contact a second contact, a switching circuit, a charging circuit, a detecting circuit, and a first communication circuit
  • the switching circuit is connected to the first contact, and the switching circuit is configured to switch a supply voltage of the first contact between a system voltage and a charging voltage according to a control signal;
  • the charging circuit is connected to the detecting circuit through the second contact;
  • the first communication circuit is coupled to the first contact and/or the second contact;
  • the detecting circuit triggers the first communication circuit to pass when the power supply voltage of the first contact is the system voltage, and the first contact and the second contact are both in contact with the first device Determining, by the first contact and/or the second contact, a state of charge of the first device;
  • the control signal controls the switching circuit to connect the first contact to the charging voltage when the state of charge is in a deficient state to cause the charging circuit to charge the first device.
  • the sampling resistor 110 for charging is avoided in the embodiment of the present application, and the first communication circuit is designed in the charging detection circuit, so that the charging detection circuit passes The first communication circuit directly exchanges information with the first device to be charged, so that the state of charge of the first device can be accurately grasped.
  • the first communication circuit can perform information interaction with the first device without changing the number of contact contacts, thereby further avoiding changes in user usage habits and improving user experience.
  • the control signal controls the switching circuit such that the power supply voltage of the first contact is the charging voltage, thereby charging the first device.
  • the control signal controls the switching circuit such that the supply voltage of the first contact is the system voltage, and controls the charging circuit to open.
  • the detection circuit detects the power supply voltage (ie, the system voltage) of the system, thereby effectively reducing the power consumption of the charge detection circuit.
  • the charging voltage provided by the switching circuit can effectively improve the charging efficiency of the first device.
  • a charging case comprising:
  • a first device that can be used in conjunction with the charging cartridge of any of the foregoing second aspect and the possible implementation of the second aspect.
  • a charging system comprising:
  • a fifth aspect provides a communication device for a headset, including:
  • the second communication circuit is connected to the third contact and/or the fourth contact;
  • the second communication circuit When the third contact and the fourth contact are both in contact with the charge detecting circuit, and the second communication circuit receives the charge detection circuit through the third contact or the fourth contact When the uplink modulation signal is sent, the second communication circuit sends a downlink modulation signal to the charging detection circuit through the third contact or the fourth contact,
  • the uplink signal generated after demodulating the uplink modulation signal is used to request the earphone to send the downlink modulation signal to the charging detection circuit, where the downlink modulation signal includes information about a state of charge of the earphone.
  • an earphone comprising:
  • a charging system comprising:
  • a charging detection circuit according to the first aspect, or a charging device according to the second aspect; and the communication device of the earphone according to the fifth aspect or the earphone according to the sixth aspect.
  • 1 is a schematic diagram of a conventional current calculation circuit.
  • FIG. 2 is a schematic diagram of a connection relationship between a first contact, a second contact, a switching circuit, a charging circuit, and a detecting circuit in the embodiment of the present application.
  • FIG. 3 is another schematic diagram of a connection relationship between a first contact, a second contact, a switching circuit, a charging circuit, and a detecting circuit in the embodiment of the present application.
  • FIG. 4 is a schematic diagram of a switching circuit, a charging circuit, and a detecting circuit in an embodiment of the present application.
  • FIG. 5 is a schematic diagram of the operation process of the charge detecting circuit of the embodiment of the present application.
  • FIG. 6 is a schematic block diagram of a first communication circuit of an embodiment of the present application.
  • FIG. 7 is a schematic diagram of a mixer of an embodiment of the present application.
  • FIG. 8 is a schematic structural diagram of a low pass filter according to an embodiment of the present application.
  • FIG. 9 is a schematic diagram of a charge detecting circuit of an embodiment of the present application.
  • FIG. 10 is a schematic structural diagram of a high-pass filter of an embodiment of the present application.
  • FIG. 11 is another schematic diagram of a charge detecting circuit of an embodiment of the present application.
  • FIG. 12 is still another schematic diagram of the charge detecting circuit of the embodiment of the present application.
  • FIG. 13 is a schematic circuit diagram of a first device of an embodiment of the present application.
  • a charging detection circuit is provided in the embodiment of the present application. It should be understood that the charge detecting circuit of the embodiment of the present application can be applied to any type of charging device; for example, a charging case, a mobile power source, and the like.
  • the charging detection circuit of the embodiment of the present application can also be applied to any first device that needs to be charged; for example, the first device used in conjunction with the above charging device; and, for example, an intelligent wearable device such as a headset or a wristband; For example, mobile phones, tablets, laptops, computers, MP3s, and MP4s.
  • the charging device is a charging box
  • the first device is an earphone as an example.
  • the charging detection circuit includes:
  • the first contact 803, the second contact 804, the switching circuit 200, the charging circuit 300, the detecting circuit 400, and the first communication circuit 500 are connected to The first contact 803, the second contact 804, the switching circuit 200, the charging circuit 300, the detecting circuit 400, and the first communication circuit 500.
  • the switching circuit 200 is connected to the first contact 803, and the switching circuit 200 is configured to switch the supply voltage of the first contact 803 between the system voltage (V_SYS) and the charging voltage (V_Charge) according to the control signal. .
  • the charging circuit 300 is connected to the detecting circuit 400 through the second contact 804.
  • the first communication circuit 500 is coupled to the first contact 803 and/or the second contact 804.
  • the detecting circuit 400 triggers the first by detecting a signal (CHECK).
  • the communication circuit 500 acquires the state of charge of the first device through the first contact 803 and/or the second contact 804.
  • the control signal (CTRL) controls the operating states of the switching circuit 200 and the charging circuit 300 according to the state of charge of the first device.
  • the control signal controls the switching circuit 200 to switch the supply voltage of the first contact 803 from the system voltage to the charging voltage, and controls the charging circuit 300 to the first device. Charge it. Further, when the state of charge is in a fully charged state, the control signal controls the switching circuit 200 to switch the supply voltage of the first contact 803 from the charging voltage to the system voltage, and controls the charging circuit 300 to open.
  • the sampling resistor 110 for charging is avoided in the embodiment of the present application, and the charging detecting circuit is configured by designing the first communication circuit 500 in the charging detecting circuit. The information is directly exchanged between the first communication circuit 500 and the first device to be charged, so that the state of charge of the first device can be accurately grasped.
  • the first communication circuit 500 can perform information interaction with the first device without changing the number of contact contacts, thereby further avoiding changes in user usage habits and improving user experience.
  • the control signal controls the switching circuit 200 such that the supply voltage of the first contact 803 is the charging voltage, thereby charging the first device.
  • the control signal controls the switching circuit 200 such that the supply voltage of the first contact 803 is the system voltage, and controls the charging circuit 300 to open.
  • the detection circuit 400 detects the power supply voltage (ie, the system voltage) of the system, thereby effectively reducing the work of the charge detection circuit. Consumption.
  • the charging voltage provided by the switching circuit 200 can effectively improve the charging efficiency of the first device.
  • the charging detection circuit may further include:
  • one end of the first inductor 801 is connected to the switching circuit 200 and connected to the ground through the first capacitor 802, and the other end of the first inductor 801 is connected to the first contact 803.
  • the first capacitor 802 (filtering capacitor) can be used to reduce the AC ripple ripple factor, thereby improving the efficient and smooth DC output.
  • an inductive component that is, the first inductor 801 may be used between the first capacitor 802 and the first contact 803.
  • FIG. 4 is a schematic diagram of the switching circuit 200, the charging circuit 300, and the detecting circuit 400 of the embodiment of the present application.
  • FIG. 5 is a schematic diagram of the operation process of the charge detecting circuit of the embodiment of the present application.
  • the circuit structure and working principle of the switching circuit 200, the charging circuit 300 and the detecting circuit 400 in the charging detecting circuit of the embodiment of the present application are exemplified in the following with reference to FIG. 4 and FIG. 5:
  • the switching circuit 200 can include:
  • the second MOS transistor 202 The second MOS transistor 202, the third MOS transistor 204, and the fourth MOS transistor 205.
  • the second MOS transistor 202 receives the charging voltage and is connected to the first contact 803.
  • the second MOS transistor 202 is connected to the ground through the fourth MOS transistor 205.
  • the third MOS transistor 204 receives the system voltage and is connected to the first contact 803.
  • the control signal controls the second MOS transistor 202 to be turned on or off, and controls the fourth MOS transistor 205 to control the third MOS transistor 204 to be turned off or turned on, so that the supply voltage of the first contact 803 is Switching between the system voltage and the charging voltage.
  • the switching circuit 200 may further include:
  • the first resistor 201 and the second resistor 203 are identical to each other.
  • the source of the second MOS transistor 202 receives the charging voltage, and the source of the second MOS transistor 202 is connected to the gate of the second MOS transistor 202 through the first resistor 201, and the second MOS transistor 202
  • the gate is connected to the ground through the fourth MOS transistor 205, the drain of the second MOS transistor 202 is connected to the first contact 803, and the gate of the fourth MOS transistor 205 receives the control signal.
  • the source of the third MOS transistor 204 receives the system voltage, the drain of the third MOS transistor 204 is connected to the first contact 803 through the second resistor 203, and the gate of the third MOS transistor 204 receives the control. signal.
  • control signal can control the fourth MOS transistor 205 to control the third MOS transistor 204 to be turned off or turned on, thereby enabling the supply voltage of the first contact 803 to be at the system voltage. Switching between this charging voltage.
  • the charging circuit 300 can include:
  • the fifth MOS transistor 301 The fifth MOS transistor 301.
  • the second contact 804 is connected to the ground through the fifth MOS transistor 301, and the gate of the fifth MOS transistor 301 receives the control signal.
  • the control signal controls the switching circuit 200 to set the voltage of the first contact 803 to a charging voltage, and when the control signal controls the fifth MOS transistor 301 to be turned on, the charging detecting circuit performs the first device. Charging.
  • the detection circuit 400 can include:
  • the second contact 804 is connected to the gate of the transistor 402 through the third resistor 401.
  • One end of the fourth resistor 403 receives the system voltage, and the other end of the fourth resistor 403 is connected to the ground through the transistor 402.
  • the transistor 402 is turned on, triggering the first communication circuit 500.
  • the state of charge of the first device is obtained by the first contact 803 and/or the second contact 804.
  • FIG. 5 is a schematic flowchart of an operation process of a charge detecting circuit according to an embodiment of the present application.
  • control signal (CTRL) is low (for example, the level is 0).
  • control signal (CTRL) involved in the embodiment of the present application defaults to a low level.
  • CTRL control signal
  • the third MOS transistor 204 is turned on, the fifth MOS transistor 301, the fourth MOS transistor 205, and the The second MOS transistor 202 is turned off.
  • control signal when the control signal (CTRL) is low by default, the transistor 402 is also turned off. Further, the voltage of the collector of the transistor 402 is the system voltage.
  • first contact 803 (charging contact contact TP+) and the second contact 804 (charging contact contact TP-) are loaded (ie, the first contact 803 and the second contact 804 are both
  • the first device is in contact, which causes the transistor 402 to be turned on, thereby triggering the first communication circuit 500 to acquire the state of charge of the first device through the first contact 803 and/or the second contact 804. .
  • the transistor 402 is turned on, further causing the voltage of the collector of the transistor 402 to decrease, that is, the detection signal (CHECK) is pulled low as shown in FIG. 4, thereby triggering the first communication circuit 500 to pass the first A contact 803 and/or the second contact 804 acquires a state of charge of the first device.
  • the detection signal CHECK
  • the first communication circuit 500 transmits an uplink modulation signal to the first device. If the first communication circuit 500 can receive the downlink modulated signal sent by the first device after transmitting the uplink modulated signal, it indicates that the load is valid. Thus, the system can further adjust the control signal (CTRL) based on the information of the state of charge of the first device in the downstream modulated signal.
  • CTRL control signal
  • the system may adjust the control signal (CTRL) according to the state of charge of the first device in the following manner:
  • control signal is high (eg, the level is 1).
  • control signal (CTRL) is kept low.
  • the level of the control signal (CTRL) is changed from a low level to a high level.
  • the third MOS transistor 204 and the transistor 402 are turned off, and the fifth MOS transistor 301, the fourth MOS transistor 205, and the second MOS transistor 202 are turned on.
  • the first device may be configured to send a downlink modulated signal to the first communications circuit when the first device is fully charged, so that the system sends the control signal (CTRL) according to the information about the state of the power in the downlink modulated signal.
  • CTRL control signal
  • the level is changed from high level to low level.
  • the first communications circuit 500 can include:
  • the first circuit 600 and the second circuit 700 are The first circuit 600 and the second circuit 700.
  • the first circuit 600 when the detecting circuit 400 triggers the first communication circuit 500 to acquire the state of charge of the first device, the first circuit 600 generates an uplink modulated signal according to the received uplink signal and the carrier signal, and passes the first contact. After the 803 or the second contact 804 sends the uplink modulation signal to the first device, the second circuit 700 receives the downlink modulated signal sent by the first device by using the first contact 803 or the second contact 804. .
  • the uplink signal is used to request the first device to send the downlink modulation signal to the second circuit 700, where the downlink modulation signal includes information about a state of charge of the first device.
  • first circuit 600 and the second circuit 700 are respectively connected to the first contact 803 and the second contact 804 is not specifically limited.
  • the first circuit 600 and the second circuit 700 can both be connected to the first contact 803.
  • the first circuit 600 transmits the uplink modulated signal through the first contact 803, and the second circuit 700 passes the The first contact 803 receives the downstream modulated signal.
  • the first circuit 600 can be connected to the first contact 803, and the second circuit 700 can be connected to the second contact 804.
  • the first circuit 600 transmits the uplink modulated signal through the first contact 803, and the second circuit 700 passes the The second contact 804 receives the downstream modulated signal.
  • the first circuit 600 includes:
  • the first mixer 510 the first low pass filter 520, and the second capacitor 530.
  • the first mixer 510 is connected to the second capacitor 530 through the first low pass filter 520.
  • the first mixer 510 receives the uplink signal and the carrier signal, and generates according to the uplink signal and the carrier signal.
  • the uplink modulated signal is sequentially sent to the first device via the first low pass filter 520 and the second capacitor 530.
  • the first mixer 510 can modulate the uplink signal of the system to the frequency of the carrier signal (CLK_L) to implement mixing of the serial low-speed signal and the high-speed clock carrier signal, so that a simple amplitude shift key can be realized.
  • the modulation mode is controlled such that information bits are transmitted through the amplitude of the carrier.
  • the modulation mode of the uplink signal in the embodiment of the present application is not limited to the amplitude shift keying modulation mode.
  • the uplink signal may be Transmit Data (TXD) on the transmit data port of the system.
  • TXD Transmit Data
  • the first mixer 510 can be implemented by a simple logical AND gate.
  • the embodiment of the present application is not limited thereto.
  • the first low pass filter 520 may also be constructed by a simple split transistor.
  • the first low pass filter (LPF) 520 in the embodiment of the present application may allow a signal lower than the cutoff frequency in the uplink modulated signal to pass, and suppress a signal higher than the cutoff frequency in the uplink modulated signal.
  • the first low pass filter 520 may be composed of a device such as a capacitor and an inductor.
  • the first low pass filter 520 may be composed of three inductors and a first capacitor.
  • the upstream modulated signal is coupled to the first contact 803 via the second capacitor 530 and transmitted to the first device via the first contact 803.
  • the second circuit 700 can be designed in combination with the circuit components of the first circuit 600.
  • the second circuit 700 can share the second capacitor 530 with the first circuit.
  • the second circuit 700 can include:
  • the second capacitor 530 The second capacitor 530, the first high pass filter 540, and the first detector 550.
  • the second capacitor 530 is coupled to the first detector 550 through the first high pass filter 540.
  • the first detector 550 detects the downlink modulation sent by the first device and sequentially passes through the second capacitor 530 and the first high pass filter 540. signal.
  • the first high pass filter (HPF) 540 involved in the embodiment of the present application may allow a signal higher than a certain cutoff frequency in the downlink modulated signal to pass, and suppress the signal component below the cutoff frequency. .
  • the first high pass filter 540 in the embodiment of the present application removes unnecessary low frequency components or removes low frequency interference in the downlink modulated signal.
  • the first high pass filter 540 can be composed of devices such as capacitors, inductors, and resistors. For example, as shown in Fig. 10, it may be composed of three capacitive devices and one inductive device.
  • the first low-pass filter 520 and the first high-pass filter 540 can form a full-time duplexer in the first communication circuit 500, and the uplink modulation can be performed.
  • the signal is separated from the downstream modulated signal to thereby suppress interference between the signals.
  • the first circuit 600 filters the uplink modulated signal by using the first low pass filter 520
  • the second circuit 700 filters the downlink modulated signal by using the first high pass filter 540.
  • the frequency of the uplink modulated signal is f_1 and the frequency of the downlink modulated signal is 2f_1
  • the first low-pass filter 520 can attenuate the signal with the frequency of 2f_1 and above in the uplink modulated signal, and reduce the downlink modulation.
  • Signal interference to the system
  • the first high-pass filter 540 can attenuate the signal with the frequency f_1 and below in the downlink modulated signal, so that the first detector 550 can detect the uplink modulated signal, thereby reducing the uplink modulated signal to the system. interference.
  • the interchange of the first low pass filter 520 in the first circuit 600 and the first high pass filter 540 in the second circuit 700 is also regarded as the first communication in the embodiment of the present application.
  • a variation of circuit 500 is also within the scope of the present application.
  • the function of the first detector 550 is to integrate the downlink modulated signal, filter out the carrier signal used for modulation, and detect the downlink signal, which may be the received data on the receiving data port of the system (Receive Data) , RXD).
  • the second circuit 700 can share the second capacitor 530 and the first low pass filter 520 with the first circuit.
  • the second circuit 700 can include:
  • the second capacitor 530 The second capacitor 530, the first low pass filter 520, and the analog to digital converter 560.
  • the second capacitor 530 is coupled to the analog to digital converter 560 through the first low pass filter 520.
  • the analog-to-digital converter 560 is configured to collect, by the first device, the second capacitor 530 and the first low-pass filter 520. The downstream modulated signal.
  • the first low pass filter 520 can suppress interference between signals in a time division duplex communication manner. Therefore, the uplink modulation signal and the downlink modulation signal use the same frequency, which not only saves the first high-pass filter, but also the downlink modulation signal can be directly transmitted to the analog-to-digital converter 560 of the main control chip without detection (Analog to Digital Converter, ADC) The analog modulation signal is directly sampled by the analog-to-digital converter 560.
  • ADC Analog to Digital Converter
  • the analog-to-digital converter 560 may have a sampling rate greater than 2 times the RXD communication baud rate. It should be understood, however, that the above-described number 2 is merely an exemplary description and is not intended to limit the embodiments of the present application. For example, it may be 5 times, 4.5 times, 3 times, and the like.
  • the second circuit 700 can be designed in combination with the circuit components of the first circuit 600.
  • the second circuit can also be designed without considering the circuit components of the first circuit 600.
  • the embodiment of the present application is not specifically limited.
  • the second circuit 700 can also be designed in combination with circuit elements other than the first circuit 600 in the charge detecting circuit.
  • the second circuit 700 can also be designed as a separate circuit.
  • the second circuit 700 can also be designed in conjunction with the circuit components of the charging circuit 300. Specifically, since the MOS transistor is also present in the charging circuit 300 in the embodiment of the present application, when the MOS transistor is designed in the second circuit 700, the MOS transistor can be shared with the charging circuit 300.
  • the second circuit 700 may also include:
  • a first metal oxide semiconductor MOS transistor a second pass filter 720, and a second detector 550.
  • the first MOS transistor is connected to the second detector 550 through the second pass filter 720.
  • the fifth MOS transistor 301 and the first MOS transistor in the charging circuit may be the same MOS transistor. That is, the second circuit 700 and the charging circuit 300 share the fifth MOS transistor 301.
  • the control signal controls the first MOS transistor to be turned on, and the second detector 550 detects that the first device sends the The downstream modulated signal of the first MOS transistor and the second pass filter 720.
  • the implementation of the embodiment of the present application is related to the circuit structure of the second circuit 700 shown in FIG. 9 , and the second circuit 700 is connected to the source of the fifth MOS transistor 301 while replacing the first high-pass filter with The same low pass filter is uplinked.
  • the Bill of Material (BOM) can be simplified, but the disadvantage is that the low-pass filter generally uses a large amount of inductance, which is slightly more expensive than the capacitor, and the fifth MOS transistor 301 is required to be a high-frequency tube.
  • the second circuit 700 can be designed as a single circuit. That is, the fifth MOS transistor 301 and the first MOS transistor in the charging circuit may not be the same MOS transistor.
  • the charging detection circuit mentioned in the embodiment of the present application can be applied to any type of charging device, that is, a charging device including the above-described charging detecting circuit is provided in the embodiment of the present application.
  • a charging device including the above-described charging detecting circuit is provided in the embodiment of the present application.
  • a charging box for example, a charging box, a mobile power source, and the like.
  • the charging detection circuit mentioned in the embodiment of the present application is also applicable to the first device involved in the embodiment of the present application, and the first device is any electronic device that needs to be charged.
  • the electronic device may be a smart wearable device such as a headset or a wristband; for example, the electronic device is a mobile phone, a tablet computer, a notebook computer, a computer, an MP3, an MP4, and the like.
  • a first device is also provided in the embodiment of the present application.
  • the first device can be used in conjunction with the charging device.
  • FIG. 13 is a schematic circuit diagram of a first device of an embodiment of the present application.
  • the charging device and the first device are used together, that is, two-way communication or time-division two-way communication can be realized.
  • the full-time duplex circuit differentiates the spectrum through high- and low-pass filters.
  • the embodiment of the present invention further provides a communication device for the earphone, which may include: a third contact, a fourth contact, and a second communication circuit; the second communication circuit and The third contact and/or the fourth contact are connected; when the third contact and the fourth contact are both in contact with the charge detecting circuit, and the second communication circuit passes the third contact or the fourth
  • the contact receives the uplink modulation signal sent by the charging detection circuit
  • the second communication circuit sends a downlink modulation signal to the charging detection circuit through the third contact or the fourth contact, wherein the uplink modulation signal is demodulated
  • the generated uplink signal is used to request the earphone to send the downlink modulation signal to the charging detection circuit, and the downlink modulation signal
  • the communication device of the earphone may include:
  • the second mixer 980 can transmit the uplink signal of the system to the frequency of the carrier signal (CLK_H), and the third detector 970 detects the received downlink signal. Since the circuit structure (the second communication circuit) and the working principle are similar to the first communication circuit in the charging detection circuit of the embodiment of the present application, in order to avoid repetition, details are not described herein again. It should be understood that although the above embodiment is exemplified by the first device used in conjunction with the charging device, in actual product applications, the application scenario should not be limited.
  • the circuit shown in FIG. 13 can also be separately fabricated as a communication device for installation in a terminal device that requires information interaction with a charging device, such as for communication in an earphone. Device.
  • a charging system is also provided in the embodiment of the present application. Specifically, the charging device described above and the first device used in conjunction with the charging device may be included, or may also include the charging detection circuit described above and the communication device including the second communication circuit referred to above.

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Abstract

提供了一种充电检测电路、充电盒、耳机的通信装置和耳机。该充电检测电路包括：第一触点、第二触点、切换电路、充电电路、检测电路和第一通信电路；该切换电路与该第一触点相连；该充电电路通过该第二触点与该检测电路相连；该第一通信电路与该第一触点和/或该第二触点相连；该第一触点的供电电压为该系统电压，且该第一触点和该第二触点均与第一设备接触时，该检测电路触发该第一通信电路获取该第一设备的电量状态；该电量状态为亏电状态时，该控制信号控制切换电路将该第一触点连接至该充电电压，以使该充电电路对该第一设备进行充电。本申请实施例中，通过该第一通信电路与第一设备之间的信息交互，能够准确地掌握该第一设备的电量状态。

Description

充电检测电路、充电盒、耳机的通信装置和耳机 技术领域
本申请实施例涉及电子技术领域，并且更具体地，涉及充电检测电路、充电盒、耳机的通信装置和耳机。
背景技术
目前，充电盒与无线耳机之间大部分是通过两个电源触点接触进行充电。其中，该充电盒中的空载检测电路用于检测该充电盒的输出是否悬空，该充电盒中的充电电流检测电路检测该充电盒的输出接有待充电设备时，检测该充电盒的充电电流的大小。
但是，该空载检测电路和该充电电流检测电路之间一般需要串联一个电阻在电路上。例如，如图1所示的采样电阻110。可以发现，现有技术中通过采样电阻110将电流转换成电压后进行充电电流的计算，这样会造成电阻上的固定损耗，降低充电效率；此外，由于采样电阻110将电流转换成电压，导致在进行充电进入恒压模式时，充电电流越来越小，通过电阻转换后的电压越来越微弱，动态范围较小，进而导致处理器难以分辨出这样的信号。
发明内容
提供了一种充电检测电路、充电盒、耳机的通信装置和耳机。通过在该充电检测电路中内置第一通信电路，使得该充电检测电路通过该第一通信电路与待充电的第一设备之间直接进行信息交互，进而能够准确掌握该第一设备的电量状态。此外，该第一通信电路能够在不改变接触触点的个数上，与该第一设备进行信息交互，进一步避免了用户使用习惯的改变，提高用户体验。
第一方面，提供了一种充电检测电路，所述充电检测电路包括：
第一触点、第二触点、切换电路、充电电路、检测电路和第一通信电路；
所述切换电路与所述第一触点相连，所述切换电路用于根据控制信号将所述第一触点的供电电压在系统电压和充电电压之间进行切换；
所述充电电路通过所述第二触点与所述检测电路相连；
所述第一通信电路与所述第一触点和/或所述第二触点相连；
所述第一触点的供电电压为所述系统电压，且所述第一触点和所述第二触点均与第一设备接触时，所述检测电路触发所述第一通信电路通过所述第一触点和/或所述第二触点获取所述第一设备的电量状态；
所述电量状态为亏电状态时，所述控制信号控制切换电路将所述第一触点连接至所述充电电压，以使所述充电电路对所述第一设备进行充电。
与传统的技术方案(如图1所示)相比，本申请实施例中避免使用用于充电的采样电阻110，通过在该充电检测电路中设计有第一通信电路，使得该充电检测电路通过该第一通信电路与待充电的第一设备之间直接进行信息交互，进而能够准确掌握该第一设备的电量状态。
此外，该第一通信电路能够在不改变接触触点的个数上，与该第一设备进行信息交互，进一步避免了用户使用习惯的改变，提高用户体验。
另外，本申请实施例中，该电量状态为亏电状态时，该控制信号控制该切换电路使得该第一触点的供电电压为该充电电压，进而对该第一设备进行充电。进一步地，该电量状态为充满电状态时，该控制信号控制该切换电路使得该第一触点的供电电压为该系统电压，并控制该充电电路开路。换句话说，如果该第一设备不需要充电时(例如，第一设备在工作时)，检测电路通过系统的供电电压(即，系统电压)进行检测，能够有效降低该充电检测电路的功耗。此外，切换电路提供的充电电压可有效提高该第一设备的充电效率。
第二方面，提供了一种充电盒，包括：
上述第一方面及第一方面中任一种可能的实现方式中所述的充电检测电路。
第三方面，提供了一种与前述第二方面及第二方面中任一种可能的实现方式中所述的充电盒可配套使用的第一设备。
第四方面，提供了一种充电系统，包括：
前述第二方面及第二方面中任一种可能的实现方式中所述的充电盒，以及前述第三方面提供的与所述充电盒可配套使用的第一设备。
第五方面，提供了一种耳机的通信装置，包括：
第三触点、第四触点和第二通信电路；
所述第二通信电路与所述第三触点和/或所述第四触点相连；
当所述第三触点和所述第四触点均与充电检测电路接触，且所述第二通 信电路通过所述第三触点或所述第四触点接收到所述充电检测电路发送的上行调制信号时，所述第二通信电路通过所述第三触点或所述第四触点向所述充电检测电路发送下行调制信号，
其中，解调所述上行调制信号后生成的上行信号用于请求所述耳机向所述充电检测电路发送所述下行调制信号，所述下行调制信号包括所述耳机的电量状态的信息。
第六方面，提供了一种耳机，包括：
前述第五方面以及第五方面中任一种可能的实现方式中所述的耳机的通信装置。
第七方面，提供了一种充电系统，包括：
第一方面所述的充电检测电路或第二方面所述的充电盒；以及第五方面所述的耳机的通信装置或第六方面所述的耳机。
附图说明
图1是现有的电流计算电路的示意图。
图2是本申请实施例的第一触点、第二触点、切换电路、充电电路和检测电路之间的连接关系的示意图。
图3是本申请实施例的第一触点、第二触点、切换电路、充电电路和检测电路之间的连接关系的另一示意图。
图4是本申请实施例的切换电路、充电电路和检测电路的示意图。
图5是本申请实施例的充电检测电路的工作过程的示意图。
图6是本申请实施例的第一通信电路的示意性框图。
图7是本申请实施例的混频器的示意图。
图8是本申请实施例的低通滤波器的示意性结构图。
图9是本申请实施例的充电检测电路的示意图。
图10是本申请实施例的高通滤波器的示意性结构图。
图11是本申请实施例的充电检测电路的另一示意图。
图12是本申请实施例的充电检测电路的又一示意图。
图13是本申请实施例的第一设备的示意性电路图。
具体实施方式
下面结合附图，对本申请实施例的技术方案进行描述。
本申请实施例中提供了一种充电检测电路。应理解，本申请实施例的充电检测电路可以适用于任一种充电设备；例如，充电盒，移动电源等等。本申请实施例的充电检测电路也可以适用于任一种需要进行充电的第一设备；例如，与上述充电设备配套使用的第一设备；又例如，耳机、手环等智能可穿戴设备；又例如，手机、平板电脑、笔记本电脑、电脑、MP3以及MP4等。为便于理解，本发明实施例以充电设备为充电盒，该第一设备为耳机为例。
具体地，如图2所示，该充电检测电路包括：
第一触点803、第二触点804、切换电路200、充电电路300、检测电路400和第一通信电路500。
其中，该切换电路200与该第一触点803相连，该切换电路200用于根据控制信号将该第一触点803的供电电压在系统电压(V_SYS)和充电电压(V_Charge)之间进行切换。该充电电路300通过该第二触点804与该检测电路400相连。该第一通信电路500与该第一触点803和/或该第二触点804相连。该第一触点803的供电电压为该系统电压，且该第一触点803和该第二触点804均与第一设备接触时，该检测电路400通过检测信号(CHECK)触发该第一通信电路500通过该第一触点803和/或该第二触点804获取该第一设备的电量状态。进而，控制信号(CTRL)根据该第一设备的电量状态控制该切换电路200和该充电电路300的工作状态。
具体地，该电量状态为亏电状态时，该控制信号控制切换电路200将该第一触点803的供电电压由该系统电压切换至该充电电压，并控制该充电电路300对该第一设备进行充电。进一步地，该电量状态为充满电状态时，该控制信号控制切换电路200将该第一触点803的供电电压由该充电电压切换至该系统电压，并控制该充电电路300开路。
与传统的技术方案(如图1所示)相比，本申请实施例中避免使用用于充电的采样电阻110，通过在该充电检测电路中设计有第一通信电路500，使得该充电检测电路通过该第一通信电路500与待充电的第一设备之间直接进行信息交互，进而能够准确掌握该第一设备的电量状态。
此外，该第一通信电路500能够在不改变接触触点的个数上，与该第一设备进行信息交互，进一步避免了用户使用习惯的改变，提高用户体验。
另外，本申请实施例中，该电量状态为亏电状态时，该控制信号控制该切换电路200使得该第一触点803的供电电压为该充电电压，进而对该第一设备进行充电。进一步地，该电量状态为充满电状态时，该控制信号控制该切换电路200使得该第一触点803的供电电压为该系统电压，并控制该充电电路300开路。换句话说，如果该第一设备不需要充电时(例如，第一设备在工作时)，检测电路400通过系统的供电电压(即，系统电压)进行检测，能够有效降低该充电检测电路的功耗。此外，切换电路200提供的充电电压可有效提高该第一设备的充电效率。
可选地，在一个实施例中，该充电检测电路还可以包括：
第一电感801和第一电容器802。
具体地，如图3所示，该第一电感801的一端与该切换电路200相连且通过该第一电容器802连接至地，该第一电感801的另一端连接至该第一触点803。
更具体地，该第一电容器802(滤波电容)可用以降低交流脉动波纹系数，进而提升高效平滑的直流输出。但是，为避免该上行调制信号被电源上的该第一电容器802(滤波电容)滤除。本申请实施例中，在该第一电容器802和该第一触点803之间可以使用一个电感元件进行扼流，即，该第一电感801。
图4是本申请实施例的切换电路200、充电电路300和检测电路400的示意图。图5是本申请实施例的充电检测电路的工作过程的示意图。为便于方案的理解，下面结合图4和图5对本申请实施例的充电检测电路中的切换电路200、充电电路300和检测电路400的电路结构以及工作原理进行示例性说明：
作为示例而非限定性地，如图4所示，该切换电路200可以包括：
第二MOS管202、第三MOS管204和第四MOS管205。
其中，该第二MOS管202接收该充电电压并与该第一触点803相连，该第二MOS管202通过该第四MOS管205连接至地。该第三MOS管204接收该系统电压并与该第一触点803相连。该控制信号控制该第二MOS管202导通或关断，并通过控制该第四MOS管205控制该第三MOS管204关断或导通，以使该第一触点803的供电电压在该系统电压和该充电电压之间进行切换。
更具体地，如图4所示，该切换电路200还可以包括：
第一电阻201和第二电阻203。
其中，该第二MOS管202的源极接收该充电电压，该第二MOS管202的源极通过该第一电阻201连接至该第二MOS管202的栅极，该第二MOS管202的栅极通过该第四MOS管205连接至地，该第二MOS管202的漏极与该第一触点803相连，该第四MOS管205的栅极接收该控制信号。该第三MOS管204的源极接收该系统电压，该第三MOS管204的漏极通过该第二电阻203连接至该第一触点803，该第三MOS管204的栅极接收该控制信号。
可以看出，本申请实施例中，控制信号通过控制该第四MOS管205能够控制该第三MOS管204关断或导通，进而能够使得该第一触点803的供电电压在该系统电压和该充电电压之间进行切换。
作为示例而非限定性地，如图4所示，该充电电路300可以包括：
第五MOS管301。
其中，该第二触点804通过该第五MOS管301连接至地，该第五MOS管301的栅极接收该控制信号。具体地，该控制信号控制上述切换电路中200将该第一触点803的电压为充电电压，且该控制信号控制该第五MOS管301导通时，该充电检测电路为该第一设备进行充电。
作为示例而非限定性地，如图4所示，该检测电路400可以包括：
第三电阻401、晶体三极管402和第四电阻403。
其中，该第二触点804通过该第三电阻401连接至该晶体三极管402的栅极。该第四电阻403的一端接收该系统电压，该第四电阻403的另一端通过该晶体三极管402连接至地。该第一触点803的供电电压为该系统电压，且该第一触点803和该第二触点804均与第一设备接触时，该晶体三极管402导通，触发该第一通信电路500通过该第一触点803和/或该第二触点804获取该第一设备的电量状态。
图5是本申请实施例的充电检测电路的工作过程的示意性流程图。
下面结合图5所示的流程，对本申请实施例的充电检测电路的工作过程进行具体说明：
实现电路以图4为例，该充电检测电路的具体工作过程如图5所示：
1010，控制信号(CTRL)为低电平(例如，电平为0)。
具体而言，本申请实施例中涉及的该控制信号(CTRL)默认为低电平，此时，该第三MOS管204导通，该第五MOS管301、该第四MOS管205以及该第二MOS管202关断。
1020，检测信号(CHECK)是否为0。
具体地，控制信号(CTRL)默认为低电平时，该晶体三极管402也关断，进而，该晶体三极管402集电极的电压为系统电压。
如果该第一触点803(充电接触触点TP+)和该第二触点804(充电接触触点TP-)均有负载(即该第一触点803和该第二触点804均与本文的第一设备进行接触)，则会导致该晶体三极管402导通，进而触发该第一通信电路500通过该第一触点803和/或该第二触点804获取该第一设备的电量状态。
更具体地，该晶体三极管402导通，进一步导致该晶体三极管402集电极的电压降低，即，如图4所示的检测信号(CHECK)拉低，进而触发该第一通信电路500通过该第一触点803和/或该第二触点804获取该第一设备的电量状态。
1030，接收下行调制信号，获取第一设备的电量状态。
具体地，检测信号(CHECK)触发该第一通信电路500获取该第一设备的电量状态时，该第一通信电路500向该第一设备发送上行调制信号。如果该第一通信电路500在发送完该上行调制信号后，能够接收到该第一设备发送的该下行调制信号，则表示负载有效。由此，系统可以进一步根据下行调制信号中的第一设备的电量状态的信息调整该控制信号(CTRL)。
例如，本申请实施例中，系统可以根据该第一设备的电量状态按照以下方式调整该控制信号(CTRL)：
1040，该控制信号(CTRL)为高电平(例如，电平为1)。
具体地，该电量状态为充满电状态时，继续保持该控制信号(CTRL)为低电平。
但是，该电量状态为亏电状态时，将该控制信号(CTRL)的电平由低电平改为高电平。由此，该第三MOS管204和该晶体三极管402关断，该第五MOS管301、该第四MOS管205以及该第二MOS管202导通。
此外，本申请实施例中，可以设置该第一设备充满电时再次向该第一通信电路发送下行调制信号，以便系统根据该下行调制信号中的电量状态的信 息将该控制信号(CTRL)的电平由高电平重新改为低电平。
下面对本申请实施例的第一通信电路500的电路设计方式进行详细说明：
可选地，如图6所示，该第一通信电路500可以包括：
第一电路600和第二电路700。
具体地，该检测电路400触发该第一通信电路500获取该第一设备的电量状态时，该第一电路600根据接收到的上行信号和载波信号生成上行调制信号，并通过该第一触点803或该第二触点804将该上行调制信号发送给该第一设备后，该第二电路700通过该第一触点803或该第二触点804接收该第一设备发送的下行调制信号。其中，该上行信号用于请求该第一设备向该第二电路700发送该下行调制信号，该下行调制信号包括该第一设备的电量状态的信息。
应理解，本申请实施例对该第一电路600与该第二电路700分别与该第一触点803和该第二触点804的连接方式不做具体限定。
例如，在一个实施例中，该第一电路600和该第二电路700可以均与该第一触点803相连。换句话说，该检测电路400触发该第一通信电路500获取该第一设备的电量状态时，该第一电路600通过该第一触点803发送该上行调制信号，该第二电路700通过该第一触点803接收该下行调制信号。
又例如，在另一个实施例中，该第一电路600可以与该第一触点803相连，该第二电路700可以与该第二触点804相连。换句话说，该检测电路400触发该第一通信电路500获取该第一设备的电量状态时，所第一电路600通过该第一触点803发送该上行调制信号，该第二电路700通过该第二触点804接收该下行调制信号。
下面结合附图对第一电路的具体结构进行示例性说明：
可选地，该第一电路600包括：
第一混频器510、第一低通滤波器520和第二电容器530。
其中，该第一混频器510通过该第一低通滤波器520与该第二电容器530相连。
具体地，该检测电路400触发该第一通信电路500获取该第一设备的电量状态时，该第一混频器510接收该上行信号和该载波信号，并根据该上行信号和该载波信号生成该上行调制信号，该上行调制信号依次经过该第一低 通滤波器520和该第二电容器530发送至该第一设备。
本申请实施例中，该第一混频器510可以将系统的上行信号调制到载波信号(CLK_L)的频率上，实现串口低速信号和高速时钟载波信号的混合，这样能够实现简单的幅移键控调制方式，使得信息比特通过载波的幅度来传递。应理解，本申请实施例中对上行信号的调制方式并不限定于幅移键控调制方式。还应理解，该上行信号可以是该系统的发送数据端口上的发送数据(Transmit Data，TXD)。如图7所示，该第一混频器510可以通过简单的逻辑与门实现。但本申请实施例不限于此，例如，该第一低通滤波器520也可以由简单的分离晶体管搭建。
此外，本申请实施例中的该第一低通滤波器(Low Pass Filter，LPF)520可以容许该上行调制信号中低于截止频率的信号通过，并抑制该上行调制信号中高于截止频率的信号通过。具体地，该第一低通滤波器520可以由电容和电感等器件的组成。例如，如图8所示，该第一低通滤波器520可以由三个电感和第一电容器组成。最后，该上行调制信号通过第二电容器530耦合到第一触点803上，并经过该第一触点803发送给该第一设备。
进一步地，本申请实施例中，基于该第一电路600具有第一低通滤波器520的情况下，该第二电路700可以结合该第一电路600的电路元件进行设计。
在一个实施例中，该第二电路700可以与该第一电路共用该第二电容器530。
例如，如图9所示，该第二电路700可以包括：
该第二电容器530、第一高通滤波器540和第一检波器550。
具体地，该第二电容器530通过该第一高通滤波器540连接至该第一检波器550。该第一电路600将该上行调制信号发送给该第一设备后，该第一检波器550检测该第一设备发送的依次经过该第二电容器530和该第一高通滤波器540的该下行调制信号。
应理解，本申请实施例中涉及的第一高通滤波器(High Pass Filter，HPF)540可以允许该下行调制信号中高于某一截止频率的信号通过，而对该截止频率以下的信号分量进行抑制。换句话说，本申请实施例中的第一高通滤波器540去掉了该下行调制信号中不必要的低频成分或者说去掉了低频干扰。具体地，该第一高通滤波器540可以由电容、电感与电阻等器件的组成。例 如，如图10所示，可以由三个电容器件和一个电感器件组成。
可以看出，在图9所示的电路结构中，第一通信电路500中通过该第一低通滤波器520和该第一高通滤波器540可以组成全时双工器，能够将该上行调制信号和该下行调制信号分离，进而抑制信号之间的干扰。
具体地，第一电路600采用第一低通滤波器520对上行调制信号进行滤波，第二电路700采用第一高通滤波器540对下行调制信号进行滤波。假设本申请实施例中上行调制信号的频率为f_1，下行调制信号的频率为2f_1，该第一低通滤波器520可对该上行调制信号中频率在2f_1及以上的信号产生衰减，降低下行调制信号对系统的干扰。同样地，该第一高通滤波器540可对该下行调制信号中频率在f_1及以下的信号产生衰减，使得该第一检波器550检测不到该上行调制信号，进而降低上行调制信号对系统的干扰。
应理解，本申请实施例中，第一电路600中的第一低通滤波器520和该第二电路700中的第一高通滤波器540的互换也视为本申请实施例的第一通信电路500的一种变形，也在本申请的保护范围内。
此外，该第一检波器550的作用是将下行调制信号进行积分，滤除用于调制的载波信号，检测出下行信号，该下行信号可以是该系统的接收数据端口上的接收数据(Receive Data，RXD)。
在另一个实施例中，该第二电路700可以与该第一电路共用该第二电容器530和该第一低通滤波器520。
例如，如图11所示，该第二电路700可以包括：
该第二电容器530、该第一低通滤波器520和模数转换器560。
具体地，该第二电容器530通过该第一低通滤波器520连接至该模数转换器560。该第一电路600将该上行调制信号发送给该第一设备后，该模数转换器560用于采集该第一设备发送的依次经过该第二电容器530和该第一低通滤波器520的该下行调制信号。
可以理解，如图11所示的该第二电路700的实现方式，该第一低通滤波器520可以分时双工的通讯方式抑制信号之间的干扰。由此，上行调制信号和下行调制信号采用相同的频率，不仅节省了第一高通滤波器，而且下行调制信号可以不用检波直接传输至主控芯片的模数转换器560(Analog to Digital Converter，ADC)，通过该模数转换器560对该下行调制信号进行直接采样，这种实现方式相对于如图9所示的第二电路700的电路结构，能够 简化电路，降低成本，但提高了软件的操作复杂性。
进一步地，为了提高采样的准确度，本申请实施例中，该模数转换器560采样率可以大于2倍的RXD通信波特率。但应理解，上述数字2倍仅为示例性的描述，并不用于限定本申请实施例。例如，也可以是5倍、4.5倍以及3倍等等。
需要注意的是，本申请实施例中，该第二电路700可以结合该第一电路600的电路元件进行设计。该第二电路也可以不考虑该第一电路600的电路元件的基础上进行设计。本申请实施例不做具体限定。例如，该第二电路700也可以结合该充电检测电路中除该第一电路600之外的电路元件进行设计。又例如，该第二电路700也可以作为一个单独的电路设计。
在一个实施例中，该第二电路700也可以结合该充电电路300的电路元件进行设计。具体地，由于本申请实施例中的充电电路300中也存在MOS管，因此，该第二电路700的设计存在MOS管时，可以和该充电电路300共用MOS管。
例如，如图12所示，该第二电路700也可以包括：
第一金属氧化物半导体MOS管、第二的通滤波器720和第二检波器550。
具体地，该第一MOS管通过该第二的通滤波器720连接至该第二检波器550。换句话说，该第五MOS管301和该充电电路中的该第一MOS管可以为同一MOS管。即，该第二电路700和该充电电路300共用该第五MOS管301。
更具体地，该第一电路600将该上行调制信号发送给该第一设备后，该控制信号控制该第一MOS管导通，该第二检波器550检测该第一设备发送的依次经过该第一MOS管和该第二的通滤波器720的该下行调制信号。
本申请实施例的实现方式相对于如图9所示的第二电路700的电路结构，将该第二电路700与该第五MOS管301的源极相连，同时将第一高通滤波器更换成上行相同的低通滤波器。能够简单化电子元件物料清单(Bill of Material,BOM)，但缺点是低通滤波器一般会用到大量的电感，其成本略比电容贵，同时需要该第五MOS管301为高频管。
应理解，该第二电路700可以作为一个电路单独设计。即，该第五MOS管301和该充电电路中的该第一MOS管也可以不是同一MOS管。
还应理解，上述实施例仅为本申请的示例性实施例，上述附图仅对本申 请实施例的电路结构的示例性附图。也就是说，上述实施例和上述附图描述不应限定本申请的实施例。
此外，本申请实施例中提及的充电检测电路可以适用于任一种充电设备，也就是说，本申请实施例中提供了包括上述充电检测电路的充电设备。例如，充电盒，移动电源等等。
另外，本申请实施例中提及的充电检测电路也可以适用于本申请实施例中涉及的第一设备，该第一设备为任一种需要进行充电的电子设备。例如，该电子设备可以为耳机、手环等智能可穿戴设备；又例如，该电子设备为手机、平板电脑、笔记本电脑、电脑、MP3以及MP4等。也就是说，本申请实施例中还提供了一种第一设备，具体地，该第一设备可以与上述充电设备配套使用。
图13是本申请实施例的第一设备的示意性电路图。
由于本申请实施例中，充电设备和第一设备是配套使用的，即能够实现双向通讯或者分时双向通信。具体而言，全时双工电路通过高低通滤波器将频谱区分。以该第一设备为耳机为例，本发明实施例中还提供了一种耳机的通信装置，其可以包括：第三触点、第四触点和第二通信电路；该第二通信电路与该第三触点和/或该第四触点相连；当该第三触点和该第四触点均与充电检测电路接触，且该第二通信电路通过该第三触点或该第四触点接收到该充电检测电路发送的上行调制信号时，该第二通信电路通过该第三触点或该第四触点向该充电检测电路发送下行调制信号，其中，解调该上行调制信号后生成的上行信号用于请求该耳机向该充电检测电路发送该下行调制信号，该下行调制信号包括该耳机的电量状态的信息。
例如，如图13所示，该耳机的通信装置可以包括：
第三触点910、第四触点920、第二电感930、第三电容器940、第四电容器950、第三低通滤波器960、第三检波器970、第二混频器980和第二高通滤波器990。具体地，该第二混频器980可以将系统的上行信号调制到载波信号(CLK_H)的频率上进行发送，该第三检波器970检测接收到的下行信号。由于其电路结构(第二通信电路)以及工作原理与本申请实施例的充电检测电路中的第一通信电路类似，因此，为避免重复，此处不再赘述。应当理解，虽然上述实施例以与充电设备配套使用的第一设备为例，但是，在实际产品应用中，不应当对其应用场景造成限制。比如，在其他可替代实施 例中，图13所示的电路也可以单独制成通信装置，用于安装在需要与充电设备进行信息交互的终端设备中，比如，用于安装在耳机中的通信装置。最后，结合上文所描述的充电设备，本申请实施例中还提供了一种充电系统。具体地，可以包括上文描述的充电设备和与该充电设备配套使用的第一设备，或者，也可以包括上文描述的充电检测电路和包括上文涉及的第二通信电路的通信装置。
最后需要说明的是，在本发明实施例和所附权利要求书中使用的术语是仅仅出于描述特定实施例的目的，而非旨在限制本发明实施例。
例如，在本发明实施例和所附权利要求书中所使用的单数形式的“一种”、“所述”和“该”也旨在包括多数形式，除非上下文清楚地表示其他含义。
本领域普通技术人员可以意识到，结合本文中所公开的实施例描述的各示例的部件，能够以电子硬件、或者计算机软件和电子硬件的结合来实现。为了清楚地说明硬件和软件的可互换性，在上述说明中已经按照功能一般性地描述了各示例的组成及步骤。这些功能究竟以硬件还是软件方式来执行，取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能，但是这种实现不应认为超出本申请的范围。
所属领域的技术人员可以清楚地了解到，为描述的方便和简洁，上述描述的装置和部件，可以是或者也可以不是物理上分开的。可以根据实际的需要选择其中的部分或者全部部件来实现本发明实施例的目的。另外，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口、装置或单元的间接耦合或通信连接，也可以是电的，机械的或其它的形式连接。
以上内容，仅为本发明实施例的具体实施方式，但本发明实施例的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本发明实施例揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本发明实施例的保护范围之内。因此，本发明实施例的保护范围应以权利要求的保护范围为准。

Claims (24)

  1. 一种充电检测电路，其特征在于，所述充电检测电路包括：
    第一触点、第二触点、切换电路、充电电路、检测电路和第一通信电路；
    所述切换电路与所述第一触点相连，所述切换电路用于根据控制信号将所述第一触点的供电电压在系统电压和充电电压之间进行切换；
    所述充电电路通过所述第二触点与所述检测电路相连；
    所述第一通信电路与所述第一触点和/或所述第二触点相连；
    所述第一触点的供电电压为所述系统电压，且所述第一触点和所述第二触点均与第一设备接触时，所述检测电路触发所述第一通信电路通过所述第一触点和/或所述第二触点获取所述第一设备的电量状态；
    所述电量状态为亏电状态时，所述控制信号控制切换电路将所述第一触点连接至所述充电电压，以使所述充电电路对所述第一设备进行充电。
  2. 根据权利要求1所述的充电检测电路，其特征在于，
    所述电量状态为充满电状态时，所述控制信号控制切换电路将所述第一触点连接至所述系统电压，并控制所述充电电路开路。
  3. 根据权利要求1或2所述的充电检测电路，其特征在于，所述充电检测电路还包括：
    第一电感和第一电容器；
    所述第一电感的一端与所述切换电路相连且通过所述第一电容器连接至地，所述第一电感的另一端连接至所述第一触点。
  4. 根据权利要求1至3中任一项所述的充电检测电路，其特征在于，所述第一通信电路包括：
    第一电路和第二电路；
    所述检测电路触发所述第一通信电路获取所述第一设备的电量状态时，所述第一电路根据接收到的上行信号和载波信号生成上行调制信号，并通过所述第一触点或所述第二触点将所述上行调制信号发送给所述第一设备后，所述第二电路通过所述第一触点或所述第二触点接收所述第一设备发送的下行调制信号；
    其中，所述上行信号用于请求所述第一设备向所述第二电路发送所述下行调制信号，所述下行调制信号包括所述第一设备的电量状态的信息。
  5. 根据权利要求4所述的充电检测电路，其特征在于，
    所述第一电路和所述第二电路均与所述第一触点相连；
    所述检测电路触发所述第一通信电路获取所述第一设备的电量状态时，所述第一电路通过所述第一触点发送所述上行调制信号，所述第二电路通过所述第一触点接收所述下行调制信号。
  6. 根据权利要求4所述的充电检测电路，其特征在于，
    所述第一电路与所述第一触点相连，所述第二电路与所述第二触点相连；
    所述检测电路触发所述第一通信电路获取所述第一设备的电量状态时，所第一电路通过所述第一触点发送所述上行调制信号，所述第二电路通过所述第二触点接收所述下行调制信号。
  7. 根据权利要求4至6中任一项所述的充电检测电路，其特征在于，所述第一电路包括：
    第一混频器、第一低通滤波器和第二电容器；
    所述第一混频器通过所述第一低通滤波器与所述第二电容器相连；
    所述检测电路触发所述第一通信电路获取所述第一设备的电量状态时，所述第一混频器接收所述上行信号和所述载波信号，并根据所述上行信号和所述载波信号生成所述上行调制信号，所述上行调制信号依次经过所述第一低通滤波器和所述第二电容器发送至所述第一设备。
  8. 根据权利要求7所述的充电检测电路，其特征在于，所述第二电路包括：
    所述第二电容器、第一高通滤波器和第一检波器；
    所述第二电容器通过所述第一高通滤波器连接至所述第一检波器；
    所述第一电路将所述上行调制信号发送给所述第一设备后，所述第一检波器检测所述第一设备发送的依次经过所述第二电容器和所述第一高通滤波器的所述下行调制信号。
  9. 根据权利要求7所述的充电检测电路，其特征在于，所述第二电路包括：
    所述第二电容器、所述第一低通滤波器和模数转换器；
    所述第二电容器通过所述第一低通滤波器连接至所述模数转换器；
    所述第一电路将所述上行调制信号发送给所述第一设备后，所述模数转 换器用于采集所述第一设备发送的依次经过所述第二电容器和所述第一低通滤波器的所述下行调制信号。
  10. 根据权利要求4至6中任一项所述的充电检测电路，其特征在于，所述第二电路包括：
    第一金属氧化物半导体MOS管、第二低通滤波器和第二检波器；
    所述第一MOS管通过所述第二低通滤波器连接至所述第二检波器；
    所述第一电路将所述上行调制信号发送给所述第一设备后，所述控制信号控制所述第一MOS管导通，所述第二检波器检测所述第一设备发送的依次经过所述第一MOS管和所述第二低通滤波器的所述下行调制信号。
  11. 根据权利要求1至10中任一项所述的充电检测电路，其特征在于，所述切换电路包括：
    第二MOS管、第三MOS管和第四MOS管；
    所述第二MOS管接收所述充电电压并与所述第一触点相连，所述第二MOS管通过所述第四MOS管连接至地；
    所述第三MOS管接收所述系统电压并与所述第一触点相连；
    所述控制信号控制所述第二MOS管导通或关断，并通过控制所述第四MOS管控制所述第三MOS管关断或导通，以使所述第一触点的供电电压在所述系统电压和所述充电电压之间进行切换。
  12. 根据权利要求11所述的充电检测电路，其特征在于，所述切换电路还包括：
    第一电阻和第二电阻；
    所述第二MOS管的源极接收所述充电电压，所述第二MOS管的源极通过所述第一电阻连接至所述第二MOS管的栅极，所述第二MOS管的栅极通过所述第四MOS管连接至地，所述第二MOS管的漏极与所述第一触点相连，所述第四MOS管的栅极接收所述控制信号；
    所述第三MOS管的源极接收所述系统电压，所述第三MOS管的漏极通过所述第二电阻连接至所述第一触点，所述第三MOS管的栅极接收所述控制信号。
  13. 根据权利要求1至12中任一项所述的充电检测电路，其特征在于，所述充电电路包括：
    第五MOS管，所述第二触点通过所述第五MOS管连接至地，所述第 五MOS管的栅极接收所述控制信号。
  14. 根据权利要求13所述的充电检测电路，其特征在于，所述第一MOS管和所述第五MOS管为同一MOS管。
  15. 根据权利要求1至14中任一项所述的充电检测电路，其特征在于，所述检测电路包括：
    第三电阻、晶体三极管和第四电阻；
    所述第二触点通过所述第三电阻连接至所述晶体三极管的栅极；
    所述第四电阻的一端接收所述系统电压，所述第四电阻的另一端通过所述晶体三极管连接至地；
    所述第一触点的供电电压为所述系统电压，且所述第一触点和所述第二触点均与第一设备接触时，所述晶体三极管导通，触发所述第一通信电路通过所述第一触点和/或所述第二触点获取所述第一设备的电量状态。
  16. 根据权利要求1至15中任一项所述的充电检测电路，其特征在于，所述第一设备为无线耳机。
  17. 一种充电盒，其特征在于，包括：
    权利要求1至16中任一项所述的充电检测电路。
  18. 一种耳机的通信装置，其特征在于，包括：
    第三触点、第四触点和第二通信电路；
    所述第二通信电路与所述第三触点和/或所述第四触点相连；
    当所述第三触点和所述第四触点均与充电检测电路接触，且所述第二通信电路通过所述第三触点或所述第四触点接收到所述充电检测电路发送的上行调制信号时，所述第二通信电路通过所述第三触点或所述第四触点向所述充电检测电路发送下行调制信号，
    其中，解调所述上行调制信号后生成的上行信号用于请求所述耳机向所述充电检测电路发送所述下行调制信号，所述下行调制信号包括所述耳机的电量状态的信息。
  19. 根据权利要求18所述的通信装置，其特征在于，所述第二通信电路包括：
    第三电路和第四电路；
    其中，所述第三电路和所述第四电路均与所述第三触点相连；
    所述第三电路接收到所述充电检测电路发送的所述上行调制信号时，所 述第四电路向所述充电检测电路发送所述下行调制信号。
  20. 根据权利要求19所述的通信装置，其特征在于，所述第三电路包括：
    第三电容器、第三低通滤波器和第三检波器；
    所述第三电容器通过所述第三低通滤波器连接至所述第三检波器；
    所述第三检波器检测所述充电检测电路发送的依次经过所述第三电容器和所述第三高通滤波器的所述上行调制信号。
  21. 根据权利要求19所述的通信装置，其特征在于，所述第四电路包括：
    第二混频器、第二高通滤波器和所述第三电容器；
    所述第二混频器通过所述第二高通滤波器与所述第三电容器相连；
    所述第二混频器接收所述下行信号和载波信号，并根据所述下行信号和所述载波信号生成所述下行调制信号，所述下行调制信号依次经过所述第二高通滤波器和所述第三电容器发送至所述充电检测电路。
  22. 根据权利要求18所述的通信装置，其特征在于，所述第二通信电路包括：
    第二电感和第四电容器；
    其中，所述第三触点通过所述第二电感连接至所述第四电容器的一端，所述第四电容器的所述一端还用于接收充电电压，所述第四电容器的另一端接地。
  23. 一种耳机，其特征在于，包括：
    权利要求18至22中任一项所述的耳机的通信装置。
  24. 一种充电系统，其特征在于，包括：
    权利要求1至16所述的充电检测电路或权利要求17所述的充电盒；以及权利要求18至22所述的耳机的通信装置或权利要求23所述的耳机。
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