WO2019114322A1 - 采样方法和装置、采样控制方法、装置和系统、以及显示装置 - Google Patents

采样方法和装置、采样控制方法、装置和系统、以及显示装置 Download PDF

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WO2019114322A1
WO2019114322A1 PCT/CN2018/102754 CN2018102754W WO2019114322A1 WO 2019114322 A1 WO2019114322 A1 WO 2019114322A1 CN 2018102754 W CN2018102754 W CN 2018102754W WO 2019114322 A1 WO2019114322 A1 WO 2019114322A1
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Prior art keywords
sampling
channel
module
controller
channels
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PCT/CN2018/102754
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English (en)
French (fr)
Inventor
宋琛
王糖祥
高展
孟松
杨栋芳
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京东方科技集团股份有限公司
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Priority to US16/348,315 priority Critical patent/US10916164B2/en
Publication of WO2019114322A1 publication Critical patent/WO2019114322A1/zh

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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/006Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0233Improving the luminance or brightness uniformity across the screen
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/029Improving the quality of display appearance by monitoring one or more pixels in the display panel, e.g. by monitoring a fixed reference pixel
    • G09G2320/0295Improving the quality of display appearance by monitoring one or more pixels in the display panel, e.g. by monitoring a fixed reference pixel by monitoring each display pixel
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/06Adjustment of display parameters
    • G09G2320/0693Calibration of display systems

Definitions

  • the present disclosure relates to the field of electrical engineering, and in particular, to a sampling method, a sampling control method, a sampling device, a sampling control device, a sampling control system, and a display device.
  • the brightness of each pixel unit in the display panel is inconsistent, resulting in uneven brightness of the display panel.
  • the brightness of each pixel unit is adjusted by electrical compensation techniques.
  • the electrical compensation technology is to sample each pixel unit by sampling module in the driving chip, obtain brightness information of the pixel unit, and then input the brightness information into a timing control module (T-CON) to adjust the brightness of the pixel unit.
  • the sampling speed requirement for the luminance information of the sampling chip unit of the driving chip is also higher and higher, and in some cases,
  • the sampling method in the driving chip sequentially samples each pixel unit, and the sampling time required is long.
  • the embodiment of the present disclosure provides a sampling method, a sampling control method, a sampling device, a sampling control device, a sampling control system, and a display device, which are used to shorten the time of sampling the brightness information of the pixel unit, thereby improving the brightness of the pixel unit.
  • the speed increases the brightness uniformity of the display panel.
  • An embodiment of the present disclosure provides a sampling method for sampling a pixel unit disposed on a display substrate, the method comprising: controlling, by the controller, a plurality of sampling modules to be simultaneously turned on, so that the plurality of sampling modules controlled by the controller can receive And storing brightness information of the pixel unit sampled by the sampling channel; wherein each sampling module is connected to multiple sampling channels, each sampling channel includes an input end and an output end, and the input end is used to sample and display a part of the substrate The brightness information of the pixel unit of the area, the output end is configured to transmit the sampled brightness information to a sampling module connected to the sampling channel; the sampling module is configured to receive and save brightness information input by the sampling channel; Controlling a set of sampling channels to be simultaneously turned on, so that the sampling channels simultaneously sample the luminance information, and transmit the sampled brightness information to the sampling modules connected to the group of sampling channels through the output ends of the group of sampling channels; Wherein, the sampling channel opened at the same time is a set of sampling channels, each group of sampling Each sampling channel
  • the sampling method by controlling a plurality of sampling modules to simultaneously sample the luminance information of the pixel units corresponding to the sampling modules, the time for sampling the luminance information of the pixel unit is shortened, thereby improving the adjustment pixel unit.
  • the brightness of the brightness increases the brightness uniformity of the display panel.
  • the controller when the controller receives the sampling mode selection signal sent by the processor, the step of controlling the plurality of sampling modules to be simultaneously turned on is performed.
  • the method further includes: when the controller receives the calibration mode selection signal sent by the processor, the controller controls the plurality of sampling modules to be sequentially turned on, so that the controller The plurality of sampling modules that are controlled are capable of receiving and storing an output signal of the output end of the sampling channel; wherein, after controlling each of the sampling modules to be turned on, the controller controls a plurality of sampling channels connected to the sampling module to be sequentially turned on, so that the The input end of the sampling channel sequentially receives the signal input by the calibration source, and samples the calibration source; wherein the calibration source is used to provide a standard for the input end of the sampling channel when the controller receives the calibration mode selection signal sent by the processor. signal.
  • the input signals of the input ends of the respective sampling channels are the same, and are the standard signals provided by the same calibration source.
  • the controller and the sampling module are disposed in the same sampling chip, and the method further includes: when the controller determines that the sampling chip to which the belonging sampling chip is completed, the control Transmitting a cascade control signal to a controller in a next sampling chip cascaded with a sampling chip to which the controller belongs, so that a controller in the next sampling chip controls a plurality of sampling modules in the next sampling chip in sequence Open.
  • the method further includes: when receiving an output instruction signal sent by the processor, the controller controls each of the sampling modules to send the saved signals from the respective sampling channels to The processor.
  • the method includes: the processor determines that the controller is required to operate in the sampling mode; the processor transmits a sampling mode selection signal to the controller to cause the controller to control
  • the sampling modules are simultaneously turned on, so that the plurality of sampling modules controlled by the controller can receive and save the brightness information of the pixel units sampled by the sampling channel; wherein each sampling module is connected to multiple sampling channels, and each sampling channel includes An input end and an output end, wherein the input end is configured to sample brightness information of a pixel unit of a portion of the display substrate, and the output end is configured to transmit the sampled brightness information to a sampling module connected to the sampling channel;
  • the sampling module is configured to receive and save the brightness information input by the sampling channel; and, so that the controller sequentially controls a group of sampling channels to be simultaneously turned on, so that the group of sampling channels simultaneously samples the brightness information, and passes the sampled brightness information
  • the output of the sampling module of the group is transmitted to the sampling channel connected to the group Each sampling module; wherein the
  • embodiments of the present disclosure provide a sampling control method, the method further comprising: the processor determining that the controller is required to operate in a calibration mode; the processor transmitting a calibration mode selection signal to the controller to cause the controller Controlling the plurality of sampling modules to be sequentially turned on, so that the plurality of sampling modules controlled by the controller can receive and save the output signals of the output ends of the sampling channels; wherein, after controlling each of the sampling modules to be turned on, the controller controls The sampling channels connected to the sampling module are sequentially turned on, so that the input end of the sampling channel sequentially receives the signal input by the calibration source, and samples the calibration source; wherein the calibration source is used when the controller receives the processor to send When the calibration mode selects a signal, it provides a standard signal to the input of the sampling channel.
  • the method further includes: the processor acquires sampling results from the respective sampling channels saved in the sampling module controlled by the controller after the first time period; the processor is directed to the controller And outputting an output command signal, so as to obtain an output signal of an output end of each of the sampling channels held by each of the sampling modules controlled by the controller; wherein the first duration is greater than or equal to all sampling modules controlled by the controller The length of time that the corresponding sampling channel completes sampling.
  • the method further includes: for a sampling result provided when the controller operates in a calibration mode, the processor performs a calibration step of sequentially receiving each of the plurality of sampling module inputs An output signal of the output end of the sampling channel; calculating a sampling mean value of the output signal according to the output signal; performing an output signal of an output end of each of the sampling channels connected to the sampling module and the sampling mean Comparing, and obtaining a calibration value of the sampling channel corresponding to the sampling module according to the comparison result; generating and storing a correspondence table between the calibration value and the sampling channel.
  • the method further includes: for the sampling result provided when the controller operates in the sampling mode, the processor performs the following processing steps: the correspondence between the calibration value and the sampling channel Finding a pre-acquired calibration value corresponding to the sampling channel in the table; and calibrating the sampling result of the sampling channel by using the pre-acquired calibration value.
  • the above sampling control method obtained by the embodiment of the present disclosure obtains the calibration value of the sampling channel by using the output signal of the output terminal input in the calibration mode by using a plurality of sampling channels, and the brightness of the pixel unit input in the sampling mode of the sampling channel.
  • the information is calibrated, eliminating the sampling error caused by the different parasitic parameters of the sampling channel and the sampling module, and improving the accuracy of the sampling result.
  • the sampling mean is an average value obtained by performing a normal distribution operation on the output signal.
  • the calibration value is a ratio of the output signal to the calibration mean.
  • an embodiment of the present disclosure provides a sampling device, configured to sample a pixel unit disposed on a display substrate, the device comprising: a first unit, configured to control a plurality of sampling modules to be simultaneously turned on, so that the plurality of samplings The module is capable of receiving and storing brightness information of the pixel unit sampled by the sampling channel; wherein each sampling module is connected to multiple sampling channels, each sampling channel includes an input end and an output end, and the input end is used for sampling display a brightness information of a pixel unit of a portion of the substrate, the output end is configured to transmit the sampled brightness information to a sampling module connected to the sampling channel; and the sampling module is configured to receive and save brightness information input by the sampling channel; a second unit is configured to sequentially control a group of sampling channels to be simultaneously turned on, so that the sampling channels simultaneously sample the luminance information, and transmit the sampled luminance information to the sampling group through the output end of the group of sampling channels.
  • Each sampling module connected to the channel; wherein the sampling channel opened at the
  • the step of controlling the plurality of sampling modules to be simultaneously turned on is performed.
  • the apparatus further includes: a calibration sampling unit; the calibration sampling unit is configured to: when the first unit receives the calibration mode selection signal sent by the processor, the plurality of The sampling module is sequentially turned on, so that the plurality of sampling modules can receive and save an output signal of the output end of the sampling channel; wherein the first unit controls a plurality of samplings connected to the sampling module after controlling each of the sampling modules to be turned on.
  • the channels are sequentially turned on, so that the input end of the sampling channel sequentially receives the signal input by the calibration source, and samples the calibration source; wherein the calibration source is used when the controller receives the calibration mode selection signal sent by the processor, A standard signal is provided at the input of the sampling channel.
  • the input signals of the input ends of the respective sampling channels are the same, and are the standard signals provided by the same calibration source.
  • the first unit and the sampling module are disposed in the same sampling chip, and the calibration sampling unit is further configured to: when the first unit determines that the sampling chip belongs to complete sampling Afterwards, the first unit sends a cascade control signal to a first unit in a next sampling chip cascaded with the sampling chip to which the first unit belongs, so that the first unit in the next sampling chip controls the lower unit A plurality of sampling modules in one sampling chip are sequentially turned on.
  • the apparatus further includes: an information output unit; the information output unit is configured to: when receiving an output instruction signal sent by the processor, the controller controls each of the sampling modules The saved signals from the various sampling channels are sent to the processor.
  • an embodiment of the present disclosure provides a sampling control apparatus, where the apparatus includes: a third unit, configured to determine a mode in which the controller needs to work; and a fourth unit, configured to: when the third unit determines that the controller needs to work In the sampling mode, the sampling mode selection signal is sent to the controller, so that the controller controls the plurality of sampling modules to be simultaneously turned on, so that the plurality of sampling modules controlled by the controller can receive and save the pixel unit sampled by the sampling channel.
  • each sampling module is connected to a plurality of sampling channels, each sampling channel includes an input end and an output end, and the input end is configured to sample brightness information of a pixel unit of a portion of the display substrate, the output The end is configured to transmit the sampled brightness information to a sampling module connected to the sampling channel; the sampling module is configured to receive and save brightness information input by the sampling channel; and, so that the controller sequentially controls a group of sampling channels to be simultaneously turned on, Having the set of sampling channels simultaneously sample the luminance information and the sampled brightness
  • the information is transmitted to the sampling modules connected to the sampling channel through the output end of the sampling module; wherein the sampling channels opened at the same time are a set of sampling channels, and each sampling channel in each sampling channel is different from the sampling channel.
  • the sampling modules are connected.
  • the fourth unit is further configured to: when the third unit determines that the controller is required to operate in the calibration mode, send a calibration mode selection signal to the controller, So that the controller controls the plurality of sampling modules to be sequentially turned on, so that the plurality of sampling modules controlled by the controller can receive and save an output signal of an output end of the sampling channel; wherein the controller controls each of the sampling After the module is turned on, the plurality of sampling channels connected to the sampling module are sequentially turned on, so that the input end of the sampling channel sequentially receives the signal input by the calibration source, and samples the calibration source; wherein the calibration source is used to control When receiving the calibration mode selection signal sent by the processor, it provides a standard signal to the input of the sampling channel.
  • the device further includes: a sending indication unit, configured to: after the first time period, acquire sampling results from the sampling channels saved in the sampling module controlled by the controller; Sending an output command signal to the controller, so as to obtain an output signal of an output end of each of the sampling channels held by each of the sampling modules controlled by the controller; wherein the first duration is greater than or equal to that controlled by the controller The sampling duration of the sampling channel corresponding to all sampling modules.
  • the apparatus further includes: a calculation unit; for the sampling result provided when the controller operates in the calibration mode, the calculation unit performs the following calibration step: sequentially receiving the plurality of sampling modules Inputting an output signal of an output end of each of the sampling channels; calculating a sampling mean value of the output signal according to the output signal; and outputting an output signal of an output end of each of the sampling channels connected to the sampling module
  • the sampling mean is compared, and the calibration value of the sampling channel corresponding to the sampling module is obtained according to the comparison result; and a correspondence table between the calibration value and the sampling channel is generated and stored.
  • the apparatus further includes: a calibration unit; for the sampling result provided when the driving chip operates in the sampling mode, the calibration unit performs the following processing steps: Finding a pre-determined calibration value corresponding to the sampling channel in the correspondence table of the sampling channel; and calibrating the sampling result of the sampling channel by using the pre-determined calibration value.
  • the sampling mean is an average value obtained by performing a normal distribution operation on the output signal.
  • the calibration value is a ratio of the output signal to the calibration mean.
  • an embodiment of the present disclosure provides a sampling control system including the sampling device of any of the above.
  • sampling control system according to an exemplary embodiment of the present disclosure, further comprising the sampling control device of any of the above.
  • an embodiment of the present disclosure provides a display device, including the sampling control system described in any of the above.
  • FIG. 1 is a schematic diagram of a sampling mode principle of a sampling method according to an embodiment of the present disclosure
  • FIG. 2 is a schematic flowchart of a sampling mode of a sampling method according to an embodiment of the present disclosure
  • FIG. 3 is a sampling timing diagram of a sampling method according to an embodiment of the present disclosure.
  • FIG. 4 is a schematic diagram of a sampling channel grouping of a sampling method according to an embodiment of the present disclosure
  • FIG. 5 is a schematic flowchart of a calibration mode of a sampling method according to an embodiment of the present disclosure
  • FIG. 6 is a schematic flowchart of a calibration mode of a sampling method according to an embodiment of the present disclosure
  • FIG. 7 is a timing chart of sampling mode sampling of a sampling method according to an embodiment of the present disclosure.
  • FIG. 8 is a timing diagram of a calibration mode transmission signal of a sampling method according to an embodiment of the present disclosure.
  • FIG. 9 is a sampling timing diagram of a single chip in a sampling method according to an embodiment of the present disclosure.
  • FIG. 10 is a schematic diagram of grouping of sampling channels in a single chip of a sampling method according to an embodiment of the present disclosure
  • FIG. 11 is a timing diagram of a transmission signal when a single chip is used in a sampling method according to an embodiment of the present disclosure
  • FIG. 12 is a sampling timing diagram of a multi-chip sampling method according to an embodiment of the present disclosure.
  • FIG. 13A is a schematic diagram of sampling grouping in a multi-chip sampling method according to an embodiment of the present disclosure
  • FIG. 13B is a second schematic diagram of sampling grouping in a multi-chip sampling method according to an embodiment of the present disclosure.
  • FIG. 14 is a timing diagram of a sampling mode transmission signal in a multi-chip sampling method according to an embodiment of the present disclosure
  • FIG. 15 is a schematic flowchart diagram of a sampling control method according to an embodiment of the present disclosure.
  • FIG. 16 is a schematic flowchart of a sampling control method according to an embodiment of the present disclosure.
  • FIG. 17 is a schematic structural diagram of a sampling device according to an embodiment of the present disclosure.
  • FIG. 18 is a schematic structural diagram of a sampling control apparatus according to an embodiment of the present disclosure.
  • a panel 102 is provided with a plurality of sampling channels (Channels, CH) 105, and the sampling channels 105 are respectively disposed on pixels on the display substrate.
  • the unit (not shown) is connected to sample the brightness information of the pixel unit;
  • the integrated circuit (IC) 103 is provided with a plurality of sampling modules (Sense) 106, each sampling module 106 and a plurality of sampling channels.
  • the driving chip 103 is further provided with a logic control circuit 107 for outputting a control signal to control the sampling module 106 and/or the sampling channel 105 to be turned on; when all the sampling modules 106
  • the driving chip 103 outputs the acquired luminance information of the pixel unit to the Timing Controller (T-CON) 104, and the T-CON 104 uses the algorithm preset in the T-CON 104 to receive the received information.
  • T-CON Timing Controller
  • the calibrated brightness information is output to a pixel driving circuit (not shown) for adjusting the brightness of the pixel unit.
  • the integrated circuit (IC) 103 described in the embodiment of the present disclosure may be understood as a sampling chip, and the logic control circuit 107 may be understood as a controller, and the controller may be each A device having a control sampling module and a sampling channel, the T-CON 104 can be understood as a processor, and the processor can be various devices having a computing and storage computing functional structure.
  • the controller is a logic circuit
  • the processor is a timing control module
  • the sampling device is a driving chip including a controller and a sampling module. It should be noted that the following is only to better explain the principle of the present disclosure. By way of example, devices that represent controllers, processors, and sampling devices do not limit the disclosure.
  • the embodiment of the present disclosure provides a sampling method, where the method includes:
  • the controller controls the plurality of sampling modules to be simultaneously turned on, so that the plurality of sampling modules controlled by the controller can receive and save the brightness information of the pixel unit sampled by the sampling channel;
  • Each sampling module is connected to a plurality of sampling channels, each sampling channel includes an input end for outputting brightness information of a pixel unit of a partial area on the display substrate, and an output end for sampling The brightness information is transmitted to a sampling module connected to the sampling channel; the sampling module is configured to receive and save brightness information input by the sampling channel;
  • the controller sequentially controls a group of sampling channels to be simultaneously turned on, so that the sampling channels simultaneously sample the brightness information, and transmit the sampled brightness information to the output of the group of sampling channels through the output end of the group of sampling channels.
  • Each sampling module ; among them,
  • sampling channels that are turned on at the same time are a set of sampling channels, and each sampling channel in each sampling channel is connected to a different sampling module.
  • the controller is a logic control circuit
  • the sampling device is a driving chip provided with a logic control circuit and a sampling module
  • the processor is a timing control module as an example.
  • the panel 102 is provided with M sampling channels 105 for transmitting luminance information of the pixel unit
  • the driving chip 103 is provided with N sampling modules 106 for Receiving luminance information of the pixel unit input by the sampling channel 105, where N ⁇ 1, M ⁇ 1, N ⁇ M; then each sampling module 106 can correspondingly sample
  • the sampling channel 105 that is, the first sampling module samples the first to the L sampling channels, and the second sampling module samples the L+1 to 2L sampling channels.
  • the Nth sampling module samples the M-L+1 ⁇ M sampling channels; a logic control circuit 107 is disposed in the driving chip 103, and the logic control circuit 107 can output a control signal for controlling the operation of the sampling module 106 and the sampling channel 105.
  • the signal of the sampling module 106 can be, for example, a module control signal SW1, N.
  • the sampling module 106 corresponds to the N module control signals SW1[0]-SW1[N-1]; the signal for controlling the sampling channel 105 can be, for example, the channel control signal SW2, and each sampling module 106 correspondingly controls the L sampling channels 105. That is, corresponding to L channel control signals SW2[0] to SW2[L-1].
  • the T-CON 104 outputs a system signal SMP to all the driving chips 103 to control all the driving chips 103 to start working, and the driving chip 103 is in the driving chip 103.
  • All of the logic control circuits 107 simultaneously output N module control signals SW1[0] to SW1[N-1], wherein SW1[0] is used to control the first sampling module 106 to be turned on, and SW1[1] is used to control the first The two sampling modules 106 are turned on, and so on.
  • SW1[N-1] is used to control the Nth sampling module 106 to be turned on, thereby controlling the N sampling modules 106 to simultaneously start sampling to obtain the luminance information of the pixel unit, that is, N
  • the sampling module 106 simultaneously starts sampling from the first rising edge timing of the module control signals SW1[0] to SW1[N-1] in FIG.
  • the logic control circuit 107 sequentially outputs L channel control signals SW2[0] ⁇ SW2[L-1], and controls the N sampling modules 106 to simultaneously sample one corresponding sampling channel, and finally causes each sampling module to complete L pairs.
  • the sampling of the sampling channel, and the N sampling modules simultaneously complete the sampling of the respective L sampling channels.
  • the first sampling module 106 corresponds to the sampling of the first to L sampling channels 105
  • the second sampling module 106 corresponds to the sampling of the L+1 to 2L sampling channels 105... and so on.
  • the N sampling modules 106 correspondingly sample the M-L+1 ⁇ M sampling channels 105; wherein the first sampling channel 105 of the sampling channels 105 corresponding to each sampling module 106 constitutes the first group sampling channel X1, each The second sampling channel 105 of the sampling channel 105 corresponding to the sampling module 106 constitutes the second group sampling channel X2... and so on, and the Lth sampling channel 105 of the sampling channel 105 corresponding to each sampling module 106 is composed.
  • the Lth group sampling channel XL sequentially outputs the channel control signals SW2[0] ⁇ SW2[L-1] to control each group of sampling channels 105 to be simultaneously turned on, that is, the logic control circuit 107 outputs the module control signal SW2[0] to
  • each sampling module 106 simultaneously samples the first sampling channel 105 corresponding to the sampling module 106
  • the logic control circuit 107 outputs the module control signal SW2[1] to the second group sampling channel X2.
  • Each sampling module 106 simultaneously samples the sampling mode The second sampling channel 105 corresponding to 106 is sampled, and so on.
  • each sampling module 106 When the logic control circuit 107 outputs the module control signal SW2[L-1] to the Lth group sampling channel XL, each sampling module 106 simultaneously samples the sampling module.
  • the corresponding Lth sampling channel 105 of 106 is sampled, so that the sampling module 106 completes one round of sampling on the last falling edge of the module control signals SW1[0] ⁇ SW1[N-1] in FIG. 3, that is, all sampling is completed.
  • the sampling of the channel in this way, by controlling all the sampling modules, the sampling channels corresponding to the sampling module are respectively started to be sampled, so that the sampling channels are sampled for the L sampling channels, and the sampling channels of the M sampling channels are completed.
  • the earth shortens the time for sampling the luminance information of each pixel unit, thereby improving the speed of adjusting the brightness of the pixel unit, and improving the brightness uniformity of the display panel.
  • each driving chip 103 correspondingly acquires brightness information of pixel units in different regions of the display panel
  • the sampling module 106 in each driving chip 103 corresponds to A row of pixel units in a region corresponding to the driving chip 103
  • a sampling channel 105 sampled by each sampling module 106 correspondingly acquire luminance information of each pixel unit in the row of pixel units. That is, after the logic control circuit 107 in the driving chip 103 outputs a set of channel control signals SW2, the sampling module 106 completes sampling of the luminance information of the pixel unit of the region corresponding to the driving chip 103. Specifically, how to divide the region according to the actual It is not necessary to limit it here.
  • the T-CON before the sampling module starts sampling, the T-CON simultaneously outputs the system signal SMP to all the driving chips, and controls the driving chip to start working.
  • the T-CON in the sampling mode, after sampling channels corresponding to all sampling modules are completed, the T-CON may output an output instruction to the logic control circuit in the driving chip.
  • the signal TX_STB1 the logic control circuit controls each sampling module to send the saved signals from the respective sampling channels to the T-CON, and the signal of the sampling channel is the brightness information of the pixel unit obtained by the sampling by the sampling module. Adjusting the brightness of each pixel unit corresponding to the sampling channel corresponding to the sampling module in the driving chip.
  • the first driving chip transmits the brightness information to the T-CON, and then goes to the second The driving chip outputs an output command signal TX_STB2, so that the second driving chip outputs the brightness information of the obtained pixel unit to the T-CON, and so on, until the last driving chip completes the brightness of the pixel unit acquired by the T-CON transmission.
  • Information specifically, the driver chip transmits the luminance information of the D0 to Dn bits through a plurality of pulse signals. To T-CON, how many bits to transmit data occupancy particular, it can be designed according to need, which is not defined.
  • the T-CON first outputs the SMP to control all the driving chips to start working, and then outputs the TX_STB1 to control the driving chip to transmit data to the T-CON, T-CON.
  • the time interval between the output TX_STB1 and the output SMP is greater than or equal to the sampling duration of all sampling modules from the start sampling to the completion sampling.
  • a sampling duration can be estimated according to the number of sampling channels, which is called the first duration, and T-CON outputs SMP to all chips.
  • the T-CON output TX_STB1 controls the luminance information of the pixel unit acquired in the driving chip to the sampling module in the T-CON transmission driving chip.
  • the driving chip 103 can work in two working modes, a sampling mode and a calibration mode, and each operating chip 103 can be provided with a working mode selection pin.
  • PIN PIN
  • the T-CON 104 inputs an operating mode selection signal SEN-EN to the operating mode selection pin on the driving chip 103 for controlling whether the driving chip 103 selects the sampling mode or the calibration.
  • Mode specifically, when the operating mode selection signal SEN-EN received by the PIN on the driving chip 103 is at a high level (or low level), that is, the driving chip 103 receives the sampling mode transmitted by the T-CON 104.
  • the driving chip 103 controls the sampling module 106 in the driving chip 103 to perform a sampling operation, that is, performs the above step S201, and controls the plurality of sampling modules 106 to be simultaneously turned on; when the PIN on the driving chip 103 is received
  • the operation mode selection signal SEN-EN is low level (or high level)
  • the driving chip 103 controls the sampling module 106 in the driving chip 103 to perform a calibration operation, and controls the plurality of sampling modules 106 to be sequentially turned on.
  • the manner of selecting the sampling mode and the calibration mode for the driving chip 103 is not limited to the above manner. It is feasible to design according to the requirements as long as it conforms to the principles of the present disclosure, and is not limited herein.
  • the parasitic parameters of each sampling channel and the sampling module are different, which may bring errors to the sampling result of the sampling module. That is, when the signals of the input sampling channels are the same, the same channel is sampled by different sampling modules, and different values may be returned. The same module samples different channels, and may return different values. Therefore, in order to eliminate the error, the sampling channel and the sampling module can be calibrated.
  • the driving chip 103 receives the calibration mode selection signal SEN-EN2 sent by the T-CON 104, the driving chip 103 performs the operation in the calibration mode.
  • the method further includes a calibration mode.
  • the panel 102 is provided with a plurality of sampling channels 105
  • the driving chip 103 is provided with a plurality of sampling modules 103 and
  • the printed circuit board (PCB) 101 is provided with a calibration source
  • the calibration source is a constant standard signal, for example, a constant current or a constant voltage
  • all the driving chips 103 and The PCB 101 is connected.
  • the calibration mode selection signal SEN-EN2 sent by the timing control module is received, the calibration source is input as a standard signal to the sampling channel 105 corresponding to each sampling module 106 in the driving chip 103, so that the sampling module 106 is respectively obtained.
  • the sampling module outputs a signal; after all the sampling modules 106 respectively perform sampling with the calibration source, the sampling module 106 sequentially transmits the collected output signals of the output ends of the respective sampling channels 105 to the T-CON 104.
  • the input signals of the input ends of the sampling channels are the same, and are all standard signals provided by the same calibration source.
  • the same calibration source is used as a standard signal to input each sampling module and a sampling channel corresponding to the sampling module.
  • the method further includes:
  • the controller when the controller receives the calibration mode selection signal sent by the processor, the controller controls the plurality of sampling modules to be sequentially turned on, so that the plurality of sampling modules controlled by the controller can receive and save the output of the sampling end of the sampling channel. signal.
  • the controller controls a plurality of sampling channels connected to the sampling module to be sequentially turned on, so that the input end of the sampling channel sequentially receives the signal input by the calibration source, and the calibration source is Sampling is performed; wherein the calibration source is used to provide a standard signal to the input of the sampling channel when the controller receives the calibration mode selection signal sent by the processor.
  • the controller is a logic control circuit
  • the sampling device is a driving chip provided with a logic control circuit and a sampling module
  • the processor is a timing control module as an example.
  • the M sampling channels are disposed on the panel for transmitting luminance information of the pixel unit
  • the N sampling modules are disposed on the driving chip for receiving sampling.
  • the Nth sampling module samples the M-L+1 ⁇ M sampling channels; the logic chip is set in the driving chip
  • the circuit and the logic control circuit can output a control signal for controlling the operation of the sampling module and the sampling channel, and the signal for controlling the sampling module can be, for example, a module control signal SW1, and the N sampling modules correspond to N module control signals SW1[0] ⁇ SW1[N -1];
  • the signal for controlling the sampling channel can be, for example, the channel control signal SW2, and each sampling module correspondingly controls L sampling channels, that is, corresponding to L channel control signals SW2[0] ⁇ SW2[L-1].
  • the driving chip IC1 is connected to the calibration source in the PCB, and the driving chip IC1 receives the T-CON.
  • the calibration mode selection signal SEN-EN2 is sent, T-CON outputs a cascade control signal calib1 to control the driving chip IC1 to start working, and the logic control circuit in the driving chip IC1 turns on the module control signal SW1[0] to control the first sampling module.
  • the logic control circuit sequentially turns on the L channel control signals SW2[0]-SW2[L-1], sequentially controls the L sampling channels corresponding to the sampling module to be turned on, and the calibration source sequentially inputs the sampling as a standard signal.
  • the channel obtains an output signal of the output end of the sampling channel.
  • the logic control circuit in the driving chip IC1 when the logic control circuit in the driving chip IC1 outputs the module control signal SW2[0], the calibration source is input as the standard signal and the first sampling module corresponds to the first a sampling channel, the output signal of the output end of the first sampling channel is obtained; when the logic control circuit outputs the module control signal SW2[1], the calibration source is used as a standard signal Inputting a second sampling channel corresponding to the first sampling module to obtain an output signal of an output end of the second sampling channel; and so on, when the logic control circuit outputs a module control signal SW2[L-1], the calibration source As the standard signal input, the Lth sampling channel corresponding to the first sampling module obtains an output signal of the output end of the Lth sampling channel; after the first sampling module completes sampling, the logic control circuit outputs a module control signal SW1[1 ], controlling the second sampling module to be turned on; the logic control circuit in the driving chip IC1 sequentially turns on the L channel control signals SW2[0] ⁇ SW2[L-1
  • the channel is turned on, and the calibration source is sequentially input as the standard signal to the sampling channel to obtain an output signal of the output end of the sampling channel, that is, when the logic control circuit issues the module control signal SW2[0], the calibration source is input as a standard signal.
  • the L+1 sampling channels corresponding to the two sampling modules obtain an output signal of the output end of the L+1th sampling channel; the logic control circuit outputs a module control signal SW2[1]
  • the calibration source is input as the standard signal to the L+2 sampling channels corresponding to the second sampling module, and the output signals of the output ends of the L+2 sampling channels are obtained, and so on, when the logic control circuit output module controls
  • the signal SW2[L-1] the calibration source is input as a standard signal to the 2Lth sampling channel corresponding to the 2nd sampling module, and the output signal of the output end of the 2Lth sampling channel is obtained; the second sampling module is completed.
  • the logic control circuit After sampling, the logic control circuit outputs a module control signal SW1[2], controls the third sampling module to start sampling the calibration information of the calibration source, and so on, correspondingly, after the N-1th sampling module completes sampling, the driving chip
  • the logic control circuit in IC1 outputs the module control signal SW1[N-1], and controls the Nth sampling module to be turned on; the logic control circuit sequentially turns on the L channel control signals SW2[0] ⁇ SW2[L-1], and sequentially controls The L sampling channels corresponding to the Nth sampling module are turned on, and the calibration source is sequentially input to the sampling channel as a standard signal, and an output signal of the output end of the sampling channel is obtained, that is, a logic control circuit
  • the module control signal SW2[0] is output, the calibration source is input as the standard signal to the M-L+1 sampling channels corresponding to the Nth sampling module, and the output ends of the M-L+1 sampling channels are obtained.
  • the calibration source is input as the standard signal to the M-L+2 sampling channels corresponding to the Nth sampling module, to obtain the M-L+2 The output signal of the output end of the sampling channel, and so on.
  • the logic control circuit issues the module control signal SW2[L-1]
  • the calibration source is input as the standard signal into the Mth sampling channel corresponding to the Nth sampling module, An output signal of an output end of the Mth sampling channel; after the Nth sampling module completes sampling, the output signal of the output end of each sampling channel is sent to the T-CON, so that the T-CON uses all sampling module inputs.
  • the output signal is calculated to obtain a sampling mean value of an output signal, and the output signal of the output end of each sampling channel corresponding to the sampling module is compared with the sampling mean value, and the sampling mode is obtained according to the comparison result.
  • the logic control circuit cascades with the driving chip to which the logic control circuit belongs.
  • the logic control circuit in the next driver chip sends the cascade control signal, so that the logic control circuit in the next driver chip controls the plurality of sampling modules in the next driver chip to be sequentially turned on.
  • the first driving chip can be started by the T-CON output cascade control signal calib1, and the logic circuit in the driving chip turns on the module control signal SW1, and the first driving chip is controlled by the T-CON to start the calibration operation.
  • the next driving chip cascading control signal calib2 cascaded with the driving chip controls the next driving chip to start the calibration operation.
  • the first driving is performed.
  • the driving chip IC1 sends a cascade control signal calib2 to the next driving chip IC2, and controls the next driving chip at the time of the first falling edge of the calib2 (the vertical dotted line and the cascading in FIG. 7)
  • the above steps are repeated at the intersection of the signals calib2, and the calibration operation is completed for all the sampling channels P to Q (P ⁇ 1, Q ⁇ 1) in the driving chip IC2.
  • the T-CON may output an output command signal to the logic circuit in the driving chip.
  • the logic control circuit controls each sampling module to send the saved signals from the respective sampling channels to the T-CON, and the signals of the sampling channels are the output signals of the output ends of the sampling channels held by the sampling module, and are used for Each sampling module and the sampling channel are calibrated to eliminate the error.
  • the driving chip inputs the output signals of the D0 to Dn bits through a plurality of pulse signals to the T-CON; if the display panel includes multiple driving chips, for example, see 8, in the calibration mode, after all the sampling modules in the driving chip IC1 and the driving chip IC2 collect the output signals of the output ends of the sampling channels, the T-CON outputs an output command signal TX_STB1 to the driving chip IC1 to control the driving chip IC1.
  • the output signals of the D0 ⁇ Dn bits are input to the T-CON through a plurality of pulse signals; the driving chip IC1 is transmitted to the T-CON After outputting the signal, the output command signal TX_STB2 is output to the driving chip IC2, so that the driving chip IC2 inputs the output signals of the D0 ⁇ Dn bits into the T-CON through a plurality of pulse signals, and specifically uses the number of bits to transmit data, which can be designed according to requirements. There is no limit here.
  • the logic control circuit in the driving chip continuously outputs a reset control signal START during the entire sampling period in which the driving chip operates in the sampling mode or the calibration mode.
  • the high and low levels of the reset control signal START are opposite to the high and low levels of the channel control signal SW2, and are used to reset the sampling module, that is, when START is low, SW2 is high, and the sampling module is at the falling edge of START, SW2
  • the rising edge time starts sampling the first sampling channel.
  • SW2 is the falling edge
  • the sampling module completes sampling of the sampling channel.
  • the rising edge of the START output resets the sampling module to prepare for the next sampling.
  • the plurality of sampling modules may be sampling modules in the same chip, or may be sampling modules in different chips.
  • a plurality of driving chips 103 may be included in the display panel.
  • Each of the driving chips 103 may be provided with a sampling module 106.
  • the sampling module 106 controlled by the module control signal SW1 may be disposed in the same driving chip 103. It is provided in the different driving chips 103, and can be specifically designed according to the needs of actual implementation, which is not limited herein.
  • the display panel includes a T-CON and a driving chip.
  • the driving chip is provided with 15 sampling modules and a panel.
  • the panel is provided with 240 sampling channels, that is, each sampling module samples 16 sampling channels.
  • T-CON selects the sampling mode selection signal SEN-EN1 for the working mode selection pin on the driver chip, selects the driving chip to perform the sampling operation; T-CON outputs the system signal SMP to the driving chip to control the driving chip to start working, and the logic in the driving chip
  • the control circuit turns on the module control signals SW1[0] ⁇ SW1[14] corresponding to each sampling module, wherein SW1[0] is used to control the opening of the first sampling module, and SW1[1] is used to control the second sampling.
  • the module is turned on, and so on.
  • SW1[14] is used to control the 15th sampling module to be turned on, thereby controlling the 1st to 15th sampling modules to start sampling at the same time; the logic control circuit sequentially outputs 16 channel control signals SW2[0] ⁇ SW2 [15], each channel control signal is used to control a group of sampling channels to be simultaneously turned on, thereby controlling 15 sampling modules and simultaneously sampling 16 sampling channels corresponding to the sampling module to obtain brightness information of the pixel unit, specifically As shown in FIG. 10, the white squares in FIG.
  • the sampling modules 10 indicate the sampling modules, and the numbers in the white squares indicate the numbers of the sampling modules among the first to fifteen sampling modules, and the black squares indicate The sampling channel, the number in the black square indicates the number of the sampling channel in the 1st to 240th sampling channels; the first sampling module corresponds to the sampling of the 1st to 16th sampling channels, and the second sampling module corresponds to the sampling of the 17th to 32th One sampling channel... and so on, the 15th sampling module corresponds to sampling the 225th to 240th sampling channels; wherein, the first sampling channel in the sampling channel corresponding to each sampling module constitutes the first group sampling channel Y1, each The second sampling channel in the sampling channel corresponding to the sampling module constitutes the second group sampling channel Y2...
  • the logic control circuit sequentially outputs the channel control signals SW2[0] ⁇ SW2[15] to control each group of sampling channels to be simultaneously turned on, that is, the logic control circuit outputs the module control signal SW2[0] to the first group of sampling channels Y1, each sampling The module simultaneously samples the first sampling channel corresponding to the sampling module, and when the logic control circuit outputs the module control signal SW2[1] to the second group sampling channel Y2, each sampling module simultaneously simultaneously The second sampling channel corresponding to the sample module is sampled, and so on.
  • each sampling module simultaneously corresponds to the 16th sampling module.
  • the sampling channels are sampled, so that the sampling modules of all the sampling channels are completed by the 15 sampling modules.
  • the sampling channels corresponding to the sampling modules are simultaneously sampled, so that 16 pairs of sampling modules are used.
  • the sampling channel is sampling, the sampling of 240 sampling channels is completed, which greatly shortens the sampling time of the luminance information of each pixel unit, thereby improving the brightness of adjusting the brightness of the pixel unit and improving the brightness of the display panel. Uniformity.
  • the T-CON outputs an output command signal TX_STB1 to the logic control circuit in the driving chip, and the logic control circuit controls the sampling module to transmit to the T-CON.
  • the luminance information of the pixel unit the driving chip inputs the luminance information of the D0 to Dn bits to the T-CON through a plurality of pulse signals, and adjusts the brightness of each pixel unit corresponding to the driving chip.
  • the time interval at which the T-CON outputs the SMP to the output TX_STB1 to the driver chip is greater than or equal to the sampling duration (or the first duration) of sampling of the 16 sampling channels.
  • the logic control circuit in the driving chip continuously outputs a reset control signal START, and the high and low levels of the reset control signal START are opposite to the high and low levels of the channel control signal SW2, and are used for resetting the sampling module, that is, When START is low, SW2 is high.
  • the sampling module starts sampling the first sampling channel at the falling edge of START and the rising edge of SW2.
  • SW2 is falling edge
  • the sampling module completes the sampling channel. Sampling, at this time the START output rising edge resets the sampling module to prepare for the next sampling.
  • each sampling module is disposed in a different driving chip.
  • the display panel includes a T-CON, two driving chips (drive chip IC1 and driver chip IC2), each of which is provided with 15 sampling modules and one panel, and the panel is provided with 480 sampling channels, that is, each sampling The module samples 16 sampling channels.
  • the T-CON outputs a sampling mode selection signal SEN-EN1 to the operation mode selection pin on the driving chip IC1 and the driving chip IC2, selects the driving chip IC1 and the driving chip IC2 to perform a sampling operation; T-CON outputs a system signal to the two driving chips.
  • the SMP controls two driving chips to start working, and the logic control circuit in the two driving chips turns on the module control signals SW1[0] ⁇ SW1[29] corresponding to each sampling module in the driving chip, wherein SW1[0] In controlling the first sampling module to be turned on, SW1[1] is used to control the second sampling module 106 to be turned on, and so on, and SW1 [14] is used to control the opening of the 15th sampling module, thereby controlling the control driving chip IC1.
  • Sampling modules 1 to 15 start sampling at the same time; SW1 [15] is used to control the opening of the 16th sampling module, SW1 [16] is used to control the opening of the 17th sampling module, and so on, SW1 [29] is used to control the 30th
  • the sampling module is turned on, thereby controlling the sampling modules 16 to 30 in the driving chip IC2 to start sampling at the same time; the logic control circuit in the driving chip IC1 sequentially outputs 16 channel control signals SW2[0] ⁇ SW2[15], each channel control Signal for control A sampling channel is simultaneously turned on, thereby controlling the sampling modules 1 to 15 in the driving chip IC1 to simultaneously sample the 16 sampling channels corresponding to the sampling module, and the logic control circuit in the driving chip IC2 sequentially outputs the channel control signal SW2 [16] ] ⁇ SW2[31], each channel control signal is used to control a group of sampling channels to be simultaneously turned on, thereby controlling the sampling modules 16 to 30 in the driving chip IC2 to simultaneously sample the 16 sampling channels corresponding to the sampling
  • the white squares in the figure represent the sampling modules
  • the numbers in the white squares indicate the numbers of the sampling modules in the sampling modules 1 to 15
  • the black squares indicate the sampling channels.
  • the number in the black square indicates the number of the sampling channel in the sampling channel 1 to 240.
  • the sampling module 1 in the driving chip IC1 corresponds to the sampling sampling channel 1 to 16
  • the sampling module 2 corresponds to the sampling sampling channel 17 to 32, and so on.
  • the sampling module 15 corresponds to the sampling sampling channels 225-240; wherein the first one of the sampling channels corresponding to each sampling module The sample channel constitutes the first group sampling channel A1, and the second sampling channel in the sampling channel corresponding to each sampling module constitutes the second group sampling channel A2...
  • the logic control circuit sequentially outputs channel control signals SW2[0] ⁇ SW2[15] to control each group of sampling channels to be simultaneously turned on, that is, the logic control circuit output module control signal SW2[0] gives
  • the logic control circuit output module control signal SW2[0] gives
  • the logic control circuit 107 outputs the module control signal SW2[15] to the 16th sampling channel A16, each sampling module simultaneously samples the sampling.
  • the 16th sampling channel corresponding to the module is sampled; similarly, as shown in FIG. 13b, the white squares in the figure indicate the sampling modules, and the numbers in the white squares are shown in the sampling module 16 ⁇
  • the number of the sampling module in the 30, the black square indicates each sampling channel, the number in the black square indicates the number of the sampling channel in the sampling channels 241 to 480, and the sampling module 16 in the driving chip IC2 corresponds to the sampling sampling channel 241-2256.
  • the sampling module 14 corresponds to the sampling sampling channels 257-272, and so on, and the sampling module 30 corresponds to the sampling sampling channels 465-480; wherein the first sampling channel in the sampling channel corresponding to each sampling module constitutes the first sampling channel.
  • the second sampling channel in the sampling channel corresponding to each sampling module constitutes the second group sampling channel B2... and so on, and the 16th sampling channel in the sampling channel corresponding to each sampling module constitutes the 16th group
  • the sampling channel B16; the logic control circuit sequentially outputs the channel control signals SW2[0] ⁇ SW2[15] to control each group of sampling channels to be simultaneously turned on, that is, when the logic control circuit outputs the module control signal SW2[0] to the first group sampling channel B1, Each sampling module simultaneously samples the first sampling channel corresponding to the sampling module, and the logic control circuit outputs a module control signal SW2[1] to sample the second group.
  • each sampling module simultaneously samples the second sampling channel corresponding to the sampling module, and so on.
  • each The sampling module simultaneously samples the 16th sampling channel corresponding to the sampling module; thus, by controlling all the sampling modules, the sampling channels corresponding to the sampling module are simultaneously sampled, so that the sampling module samples 16 sampling channels.
  • the sampling of 480 sampling channels is completed, which greatly shortens the sampling time of the luminance information of each pixel unit, thereby improving the speed of adjusting the brightness of the pixel unit and improving the brightness uniformity of the display panel.
  • the T-CON outputs an output command signal TX_STB1 to the logic control circuit in the driving chip IC1, and the logic control circuit controls the sampling module to transmit the saved pixel unit to the T-CON.
  • the brightness information the driving chip inputs the brightness information of the D0 ⁇ Dn bits to the T-CON through a plurality of pulse signals; after the driving chip IC1 transmits the brightness information to the T-CON, outputs the output command signal TX_STB2 to the driving chip IC2, so that the driving The chip IC2 transmits the brightness information of the obtained pixel unit to the T-CON, and the driving chip inputs the brightness information of the D0 to Dn bits to the T-CON through a plurality of pulse signals, for adjusting the brightness of each pixel unit, driving the chip IC1 and The driving chip IC2 corresponds to an area of a different pixel unit on the display panel.
  • the time interval at which the T-CON outputs the SMP to the output TX_STB1 to the two driving chips is greater than or equal to the sampling duration (or the first duration) of sampling of the 16 sampling channels.
  • the logic control circuit in the driving chip IC1 and the driving chip IC2 continuously outputs a reset control signal START, and the high and low levels of the reset control signal START are opposite to the high and low levels of the channel control signal SW2, and are used for sampling
  • the module resets that is, when START is low, SW2 is high, and the sampling module starts sampling the first sampling channel at the falling edge of START and the rising edge of SW2.
  • SW2 is falling edge
  • the sampling module is completed.
  • the sampling channel is sampled, and the START output rising edge resets the sampling module to prepare for the next sampling.
  • the embodiment of the present disclosure provides a sampling control method, as shown in FIG. 15, the method includes:
  • S1501 The processor determines that the controller needs to work in a sampling mode
  • the processor sends a sampling mode selection signal to the controller, so that the controller controls the plurality of sampling modules to be simultaneously turned on, so that the plurality of sampling modules controlled by the controller can receive and save the sampling channel sampling.
  • the brightness information of the pixel unit wherein each sampling module is connected to the plurality of sampling channels, each sampling channel includes an input end and an output end, wherein the input end is used for sampling brightness information of the pixel unit of a part of the area in the display substrate, The output end is configured to transmit the sampled brightness information to a sampling module connected to the sampling channel; the sampling module is configured to receive and save brightness information input by the sampling channel; and, to enable the controller to sequentially control a set of sampling channels simultaneously Turning on, the sampling channel simultaneously samples the brightness information, and transmits the sampled brightness information to the sampling modules connected to the group of sampling channels through the output end of the group of sampling modules; wherein, the sampling modules are opened at the same time;
  • the sampling channel is a set of sampling channels, each sampling channel in each sampling channel Do not connect with
  • the processor determines that the controller is required to operate in the calibration mode
  • the processor sends a calibration mode selection signal to the controller, so that the controller controls the plurality of sampling modules to be sequentially turned on, so that the plurality of sampling modules controlled by the controller can receive and save the output end of the sampling channel Outputting a signal; wherein, after controlling each of the sampling modules to be turned on, the controller controls a plurality of sampling channels connected to the sampling module to be sequentially turned on, so that the input end of the sampling channel sequentially receives the signal of the calibration source input, and the calibration is performed.
  • the source performs sampling; wherein the calibration source is used to provide a standard signal to the input of the sampling channel when the controller receives the calibration mode selection signal sent by the processor.
  • the method further includes:
  • the processor acquires sampling results from the sampling channels saved in the sampling module controlled by the controller after the first time period;
  • the processor sends an output instruction signal to the controller, so as to obtain an output signal of an output end of each of the sampling channels held by each of the sampling modules controlled by the controller;
  • the first duration is greater than or equal to the duration of sampling of the sampling channel corresponding to all the sampling modules controlled by the controller.
  • the processor performs the following calibration steps for the sampling result provided when the controller operates in the calibration mode:
  • S1601 sequentially receiving an output signal of an output end of each of the sampling channels input by the plurality of sampling modules
  • S1603 Compare an output signal of an output end of each sampling channel corresponding to the sampling module with the sampling mean value, and obtain a calibration value of the sampling channel corresponding to the sampling module according to the comparison result;
  • the controller is a logic control circuit
  • the sampling device is a driving chip provided with a logic control circuit and a sampling module
  • the processor is a timing control module as an example.
  • the timing control module inputs and outputs an instruction signal TX_STB1 to a driving chip to control the starting timing of the driving chip.
  • the control module transmits an output signal of an output end of each sampling module collected by each sampling module on the driving chip, and the T-CON receives the output signal of the output end of the sampling channel corresponding to all the sampling modules, and then sends the sampling signal to each sampling module and the An sampling address is set for each sampling channel corresponding to the sampling module.
  • the output TX_STB2 is given to the next driving chip cascaded by the driving chip, and the next driving chip is controlled to start to the timing control module. Transmitting the output signal of the sampling channel corresponding to the sampling module on the driving chip, and after receiving the output signal of the sampling channel corresponding to all sampling modules, the T-CON sets one sampling channel for each sampling module and each sampling channel corresponding to the sampling module. Address... and so on, all driver chips are completed to T-CON After transmitting the output signal, the T-CON establishes the corresponding relationship between the calibration values of the sampling channels and the sampling channels of all the sampling modules and the sampling channels corresponding to the sampling module, wherein SENSE represents the sampling module, and CH represents the sampling.
  • each SENSE corresponds to L CHs.
  • Each cell in the table corresponds to the calibration information of a sampling module or sampling channel input and its corresponding address.
  • T-CON saves this table in the T-CON.
  • the T-CON calculates a sampling mean value according to the output signal. Comparing the output signal of the sampling channel corresponding to each sampling module saved in Table 1 with the sampling mean value to obtain the calibration value of the sampling module, and storing the sampling channel calibration value corresponding to each sampling module in Table 1. The corresponding position of the sampling channel is used to calibrate the brightness information of the pixel unit input by the sampling module and the sampling channel in the sampling mode.
  • the sampling result of the sampling channel is calibrated using the previously obtained calibration value.
  • the sampling module inputs the brightness information of the pixel unit acquired by the sampling channel corresponding to the sampling module into the T-CON, and the T-CON adopts the addressing mode.
  • the correspondence between the calibration value and the sampling channel saved in the T-CON looks up the pre-acquired calibration value corresponding to the sampling channel, and uses the calibration value to calibrate the luminance information input to the sampling channel to obtain the calibrated luminance information. And inputting the brightness information into the pixel driving circuit to adjust the brightness of the pixel unit.
  • the sampling mean may be, for example, a normal distribution mean or an arithmetic mean obtained by a normal distribution algorithm, of course, not limited to these two.
  • the algorithm in particular, can be designed as needed, as long as the calculation method consistent with the principles of the present disclosure is feasible, and is not limited herein.
  • the calibration value may be, for example, a ratio of the sampling mean to an output signal of a sampling channel corresponding to the sampling module, and of course, a calibration value.
  • the calculation is not limited to the ratio, and can be designed as needed, and is not limited herein.
  • the T-CON calibrates the brightness information of the pixel unit input by the sampling channel corresponding to the sampling module, and specifically includes:
  • the brightness information input by the sampling module is reduced by using the calibration value
  • the brightness information input by the sampling module is increased by using the calibration value.
  • the sampling channel in the calibration mode, is obtained by inputting a unique calibration source as a standard signal to a sampling channel corresponding to each sampling module.
  • the output signal of the output terminal is input to the T-CON to calculate a sampling mean value, and then the output signal of each sampling channel corresponding to each sampling module is compared with the sampling mean value, according to the comparison result.
  • a calibration value is stored in the corresponding storage location of the sampling channel corresponding to the sampling module in the T-CON.
  • the sampling channel corresponding to the sampling module inputs the luminance information of the pixel unit acquired by the sampling channel to the T-CON.
  • the brightness information is calibrated by using the calibration value corresponding to the sample channel saved in the T-CON to eliminate the sampling error caused by the different sampling parameters of the sampling channel and the sampling module, so as to improve the accuracy of the sampling result. .
  • the driving chip before the sampling, can be operated in the calibration mode, and each sampling module and each sampling channel are calibrated to obtain the sampling module. Corresponding sampling channel calibration value, and then let the driver chip work in the sampling mode, the pixel unit is used to sample the brightness information; of course, the calibration chip can be directly used to allow the driver chip to start sampling, or the driver chip can be separately calibrated.
  • the sampling mode and the calibration mode are independent.
  • the driving chip can be operated independently in any mode, which is not limited herein.
  • the display panel includes a T-CON and a driving chip.
  • the driving chip is provided with 15 sampling modules and a panel, and the panel is provided with 240 sampling channels, that is, each sampling module correspondingly samples 16 sampling channels; That is, the first sampling module samples the first to the 16th sampling channels, the second sampling module samples the 17th to the 32th sampling channels, and so on, and the 15th sampling module samples the 225th to the 240th sampling channels;
  • the logic control circuit is provided, and the logic control circuit can output a control signal for controlling the sampling module and the sampling channel to work.
  • the signal of the control sampling module can be, for example, a module control signal SW1, and 15 sampling modules corresponding to 15 module control signals SW1[0] ⁇ SW1[14];
  • the signal for controlling the sampling channel can be, for example, the channel control signal SW2, and each sampling module correspondingly controls 16 sampling channels, that is, corresponding to 16 channel control signals SW2[0] ⁇ SW2[15].
  • a calibration source is disposed in the PCB.
  • the calibration source is a constant standard signal, for example, a constant current or a constant voltage, and all the driving chips and the PCB. Connected; the working mode pin on the driver chip selects the sampling mode when it receives a high level, and selects the calibration mode when it receives a low level.
  • the T-CON sends a low-level operating mode select signal SEN-EN to the operating mode select pin on the driver chip to cause the driver chip to begin the calibration operation.
  • T-CON outputs a cascade control signal calib1 to control the driver chip to start working.
  • the logic control circuit in the driver chip turns on the module control signal SW1[0] to control the first sampling module to be turned on; the logic control circuit will control the L channel control signals SW2. [0] ⁇ SW2[15] are sequentially turned on, and the L sampling channels corresponding to the sampling module are sequentially controlled to be turned on, and the calibration source is sequentially input as the standard signal to the sampling channel to obtain an output signal of the output end of the sampling channel, specifically When the logic control circuit in the driving chip outputs the module control signal SW2[0], the calibration source is input as a standard signal to the first sampling channel corresponding to the first sampling module, and the output end of the first sampling channel is obtained.
  • the 16th sampling channel obtains an output signal of the output end of the Lth sampling channel; after the first sampling module completes sampling, the logic control circuit outputs a module control signal SW1[1] to control the opening of the second sampling module; driving The logic control circuit in the chip sequentially turns on 16 channel control signals SW2[0] ⁇ SW2[15], and sequentially controls the second corresponding L sampling channels to be turned on, and the calibration source is sequentially input as the standard signal into the sampling channel.
  • the calibration source is input as a standard signal to the 17th sampling channel corresponding to the second sampling module, to obtain the first The output signal of the output of the 17 sampling channels; when the logic control circuit outputs the module control signal SW2[1], the calibration source is input as the standard signal to the 18th sampling channel corresponding to the second sampling module, and the 18th is obtained.
  • the output signal of the output end of the sampling channel and so on.
  • the logic control circuit outputs the module control signal SW2 [15]
  • the calibration source is input as a standard signal.
  • the 32nd sampling channel corresponding to the two sampling modules obtains the output signal of the output end of the 32nd sampling channel; after the second sampling module completes sampling, the logic control circuit outputs the module control signal SW1[2], and controls the third The sampling module is turned on... and so on. Accordingly, after the sampling of the 14th sampling module is completed, the logic control circuit in the driving chip outputs the module control signal SW1 [14], and the 15th sampling module is controlled to be turned on; the logic control circuit will be 16
  • the channel control signals SW2[0]-SW2[15] are sequentially turned on, and the 16 sampling channels corresponding to the 15th sampling module are sequentially turned on, and the calibration source is sequentially input as the standard signal to the sampling channel to obtain the output of the sampling channel.
  • the calibration source When the output signal of the terminal, that is, the logic control circuit outputs the module control signal SW2[0], the calibration source is input as the standard signal to the 225th sampling channel corresponding to the 15th sampling module, and the output of the output of the 225th sampling channel is obtained.
  • the signal and logic control circuit output module control signal SW2[1] the calibration source is input as the standard signal and the 226th corresponding to the 15th sampling module.
  • the sample channel obtains an output signal of the output end of the 226th sampling channel, and so on.
  • the logic control circuit issues the module control signal SW2[15]
  • the calibration source is input as the standard signal to the 15th sampling module.
  • 240 sampling channels the output signal of the output of the 240th sampling channel is obtained.
  • the T-CON After the sampling module completes the sampling, that is, after the sampling time of 240 sampling channels is completed, the T-CON outputs an output command signal TX_STB1 to the driving chip, and controls the driving chip to transmit all sampling modules in the driving chip to the T-CON.
  • the output signals of the output ends of the sampling channels are used to calibrate the sampling modules and the sampling channels to eliminate errors.
  • the driving chip inputs the output signals of the D0 to Dn bits into the T-CON through a plurality of pulse signals. The obtained output signals are sequentially input to the T-CON.
  • the T-CON After receiving the output signals of the sampling channels corresponding to all the sampling modules, the T-CON sets an address for each sampling module and each sampling channel corresponding to the sampling module, T-CON.
  • the output signals input by the sampling channels corresponding to all the sampling modules and the sampling module are established as follows in the correspondence table between the calibration values of the sampling table and the sampling channel, and are stored in the T-CON; wherein SENSE represents the sampling module, and CH represents the sampling channel.
  • the number is the number of each sampling module and sampling channel.
  • T-CON can use the received output signals to perform normal distribution calculation.
  • the highest distribution frequency in the normal distribution technique is worth a sample mean, and the sampling channel corresponding to each sampling module saved in Table 2
  • the output signal is compared with the sampling mean value, and the calibration value of the sampling channel corresponding to each sampling module is obtained, that is, the ratio of the output signal input by the sampling channel to the sampling mean value; and the calibration value is saved to the sampling channel in Table 2. Corresponding storage location.
  • the T-CON sends an active mode select signal SEN-EN to the operating mode select pin on the driver chip to enable the drive chip to select the sampling mode.
  • the logic control circuit sequentially outputs 16 channel control signals SW2[0] ⁇ SW2[15], and each channel control signal is used to control a group of sampling channels to be simultaneously turned on, thereby controlling 15 sampling modules simultaneously corresponding to 16 sampling modules.
  • the sampling channels are separately sampled to obtain the brightness information of the pixel unit.
  • the white squares in the figure represent the sampling modules, and the numbers in the white squares indicate the sampling modules among the first to the 15 sampling modules.
  • the number, the black square indicates each sampling channel, the number in the black square indicates the number of the sampling channel in the 1st to 240th sampling channels; the first sampling module corresponds to the sampling 1st to 16th sampling channels, the second sampling The module corresponds to sampling 17th to 32th sampling channels...
  • the 15th sampling module corresponds to sampling 225th to 240th sampling channels; wherein, the sampling channel corresponding to each sampling module forms the first sampling channel. 1 group sampling channel Y1, the second sampling channel in the sampling channel corresponding to each sampling module constitutes the second group sampling channel Y2...
  • each sampling The 16th sampling channel in the sampling channel corresponding to the block constitutes the 16th sampling channel Y16; the logic control circuit sequentially outputs the channel control signals SW2[0] ⁇ SW2[15] to control each sampling channel to be simultaneously turned on, that is, the logic control circuit
  • the logic control circuit When the output module control signal SW2[0] is given to the first group sampling channel Y1, each sampling module simultaneously samples the first sampling channel corresponding to the sampling module, and the logic control circuit outputs the module control signal SW2[1] to the second
  • the sampling channel Y2 is set, each sampling module simultaneously samples the second sampling channel corresponding to the sampling module...
  • each sampling module simultaneously samples the 16th sampling channel corresponding to the sampling module, so that 15 sampling modules complete sampling of all sampling channels, and thus, by controlling all sampling modules, the sampling module is simultaneously started.
  • the sampling channels are separately sampled, so that 240 sampling channels are sampled during the sampling of the sampling channels for the 16 sampling channels. Earth shortening the time of sampling the luminance information of each pixel unit, and to improve the speed of adjusting the brightness of the pixel unit, improving the uniformity of brightness of the display panel.
  • the T-CON After the sampling module in the driving chip completes sampling, the T-CON outputs an output command signal TX_STB1 to the driving chip, and controls the driving chip to transmit the brightness information of the obtained pixel unit to the T-CON, and the driving chip passes the brightness information of the D0 to Dn bits. Multiple pulse signals are input to the T-CON.
  • the T-CON uses the addressing mode to find the pre-acquired calibration value corresponding to the sampling channel in the correspondence table between the calibration value and the sampling channel that has been saved in the T-CON (Table 2).
  • the calibration information is used to calibrate the brightness information input by the sampling channel to obtain the calibrated brightness information, and the brightness information is input into the pixel driving circuit to adjust the brightness of the pixel unit to eliminate the sampling channel and the sampling module. Sampling errors caused by different parasitic parameters to improve the accuracy of the sampling results.
  • an embodiment of the present disclosure provides a sampling device. As shown in FIG. 17, the device includes:
  • the first unit 1201 is configured to control the plurality of sampling modules to be simultaneously turned on, so that the plurality of sampling modules can receive and save the brightness information of the pixel unit sampled by the sampling channel;
  • Each sampling module is connected to a plurality of sampling channels, each sampling channel includes an input end for outputting brightness information of a pixel unit of a partial area on the display substrate, and an output end for sampling The brightness information is transmitted to a sampling module connected to the sampling channel; the sampling module is configured to receive and save brightness information input by the sampling channel;
  • the second unit 1202 is configured to sequentially control a group of sampling channels to be simultaneously turned on, so that the group of sampling channels simultaneously samples the brightness information, and transmits the sampled brightness information to the group through the output end of the group of sampling channels.
  • Each sampling module connected to the sampling channel; wherein
  • sampling channels that are turned on at the same time are a set of sampling channels, and each sampling channel in each sampling channel is connected to a different sampling module.
  • the sampling apparatus performs the step of controlling the plurality of sampling modules to be simultaneously turned on when the first unit receives the sampling mode selection signal sent by the processor.
  • the foregoing sampling device provided by the embodiment of the present disclosure further includes: a calibration sampling unit;
  • the calibration sampling unit is used to:
  • the plurality of sampling modules are sequentially turned on, so that the plurality of sampling modules can receive and save the output signal of the output end of the sampling channel;
  • the plurality of sampling channels connected to the sampling module are sequentially turned on, so that the input end of the sampling channel sequentially receives the signal input by the calibration source, and performs the calibration source.
  • Sampling wherein the calibration source is used to provide a standard signal to the input of the sampling channel when the controller receives the calibration mode selection signal sent by the processor.
  • the sampling device provided by the embodiment of the present disclosure has the same input signals at the input ends of the sampling channels, and is a standard signal provided by the same calibration source.
  • the first unit and the sampling module are disposed in a same sampling chip, and the calibration sampling unit is further configured to:
  • the first unit After the first unit determines that the associated sampling chip completes sampling, the first unit sends a cascade control signal to a first unit of a next sampling chip that is cascaded with the sampling chip to which the first unit belongs, such that The first unit in the next sampling chip controls a plurality of sampling modules in the next sampling chip to be sequentially turned on.
  • the foregoing sampling device provided by the embodiment of the present disclosure further includes: an information output unit;
  • the information output unit is used to:
  • the controller controls each of the sampling modules to send the saved signals from the respective sampling channels to the processor.
  • an embodiment of the present disclosure provides a sampling control apparatus, where the apparatus includes:
  • a third unit 1801, configured to determine a mode in which the controller needs to work
  • a fourth unit 1802 configured to send, when the third unit determines that the controller needs to work in the sampling mode, send a sampling mode selection signal to the controller, so that the controller controls the multiple sampling modules to be simultaneously turned on, so that the The plurality of sampling modules controlled by the controller are capable of receiving and storing brightness information of the pixel units sampled by the sampling channel; wherein each sampling module is connected to the plurality of sampling channels, each sampling channel includes an input end and an output end, the input The end is configured to sample brightness information of a pixel unit in a portion of the display substrate, the output end is configured to transmit the sampled brightness information to a sampling module connected to the sampling channel; and the sampling module is configured to receive and save the sampling channel Input brightness information; and, causing the controller to sequentially control a group of sampling channels to be simultaneously turned on, so that the group of sampling channels simultaneously sample the brightness information, and transmit the sampled brightness information to the output end of the group of sampling modules to Each sampling module connected to the sampling channel of the group; wherein the sampling is opened at the same
  • the fourth unit is further configured to:
  • the third unit determines that the controller is required to operate in the calibration mode, sending a calibration mode selection signal to the controller, so that the controller controls the plurality of sampling modules to be sequentially turned on, so that the controller controls
  • the plurality of sampling modules are capable of receiving and storing an output signal of the output end of the sampling channel; wherein, after controlling each of the sampling modules to be turned on, the controller controls a plurality of sampling channels connected to the sampling module to be sequentially turned on, so that the sampling is performed.
  • the input end of the channel sequentially receives the signal input by the calibration source, and samples the calibration source; wherein the calibration source is used to provide a standard signal to the input end of the sampling channel when the controller receives the calibration mode selection signal sent by the processor.
  • the foregoing sampling control apparatus provided by the embodiment of the present disclosure further includes:
  • the first duration is greater than or equal to the duration of sampling of the sampling channel corresponding to all the sampling modules controlled by the controller.
  • the foregoing sampling control apparatus further includes: a calculating unit;
  • the calculation unit performs the following calibration steps:
  • a table of correspondence between the calibration value and the sampling channel is generated and stored.
  • the foregoing sampling control apparatus provided by the embodiment of the present disclosure further includes: a calibration unit;
  • the calibration unit For the sampling result provided when the driving chip operates in the sampling mode, the calibration unit performs the following processing steps:
  • the sampling result of the sampling channel is calibrated using the previously obtained calibration value.
  • the sampling mean is an average value obtained by performing a normal distribution operation on the output signal.
  • the calibration value is a ratio of the output signal to the calibration average.
  • an embodiment of the present disclosure provides a sampling control system, including the sampling device of any of the above.
  • the foregoing sampling control system provided by the embodiment of the present disclosure further includes the sampling control device described in any of the above.
  • an embodiment of the present disclosure provides a display device including the above-described sampling control system provided by an embodiment of the present disclosure.
  • the display device can be any product or component having a display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, and the like.
  • Other indispensable components of the display device are understood by those skilled in the art, and are not described herein, nor should they be construed as limiting the disclosure.
  • the foregoing solution provided by the embodiment of the present disclosure performs the sampling of the brightness information of the pixel unit corresponding to each sampling module by simultaneously controlling a plurality of sampling modules, so that each sampling module is completed in the entire display panel in one sampling period.
  • the sampling of the brightness information of the pixel unit is used to shorten the time of sampling the brightness information of the pixel unit, thereby improving the speed of adjusting the brightness of the pixel unit, and improving the brightness uniformity of the display screen of the display panel; before the sampling module starts sampling
  • Each sampling module is controlled to sample the pixel unit corresponding to the sampling module, and then compared with the preset standard brightness information to perform calibration, thereby eliminating the sampling error and improving the accuracy of the sampling result.
  • embodiments of the present disclosure can be provided as a method, system, or computer program product. Accordingly, the present disclosure may take the form of an entirely hardware embodiment, an entirely software embodiment, or a combination of software and hardware aspects. Moreover, the present disclosure may take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage and optical storage, etc.) including computer usable program code.
  • the computer program instructions can also be stored in a computer readable memory that can direct a computer or other programmable data processing device to operate in a particular manner, such that the instructions stored in the computer readable memory produce an article of manufacture comprising the instruction device.
  • the apparatus implements the functions specified in one or more blocks of a flow or a flow and/or block diagram of the flowchart.
  • These computer program instructions can also be loaded onto a computer or other programmable data processing device such that a series of operational steps are performed on a computer or other programmable device to produce computer-implemented processing for execution on a computer or other programmable device.
  • the instructions provide steps for implementing the functions specified in one or more of the flow or in a block or blocks of a flow diagram.

Abstract

本公开公开了一种采样方法、采样控制方法、采样装置、采样控制装置、采样控制系统及显示装置。本公开提供的一种采样方法,用于对显示基板上设置的像素单元进行采样,该方法包括:控制器控制多个采样模块同时开启,使得所述控制器控制的多个采样模块能够接收并保存采样通道采样得到的所述像素单元的亮度信息(S201);控制器依次控制一组采样通道同时开启,使得该组采样通道同时进行亮度信息的采样,并将采样到的所述亮度信息通过该组采样通道的输出端传输给与该组采样通道相连的各采样模块(S202)。

Description

采样方法和装置、采样控制方法、装置和系统、以及显示装置 技术领域
本公开涉及电学领域,尤其涉及一种采样方法、采样控制方法、采样装置、采样控制装置、采样控制系统、和显示装置。
背景技术
当前,显示面板技术,例如有机电致发光面板(Organic Light-Emitting Diode,OLED)技术面临的一大问题是显示面板中各个像素单元的亮度不一致,导致显示面板亮度不均匀,在一些情形下,通过电学补偿技术对各个像素单元的亮度进行调整。电学补偿技术是通过驱动芯片中的采样模块对各个像素单元进行采样,获取像素单元的亮度信息,再将亮度信息输入到时序控制模块(Timing Controller,T-CON)对像素单元进行亮度调整。而随着驱动芯片集成度越来越高,显示面板的解析度也越来越高,相应地,对驱动芯片采样像素单元的亮度信息的采样速度要求也越来越高,在一些情形下,采用驱动芯片中的采样模块依次对每个像素单元进行采样的方式,需要的采样时间较长。
发明内容
本公开实施例提供了一种采样方法、采样控制方法、采样装置、采样控制装置、采样控制系统、和显示装置,用以缩短采样像素单元的亮度信息的时间,进而提高了调整像素单元的亮度的速度,提高了显示面板的亮度均一性。
本公开实施例提供一种采样方法,用于对显示基板上设置的像素单元进行采样,该方法包括:控制器控制多个采样模块同时开启,使得所述控制器控制的多个采样模块能够接收并保存采样通道采样得到的所述像素单元的亮度信息;其中,每一采样模块与多个采样通道相连,每一采样通道包括输入端和输出端,所述输入端用于采样显示基板上一部分区域的像素单元的亮度信息,所述输出端用于将采样得到的所述亮度信息传输给与该采样通道相连的采样模块;采样模块用于接收并保存采样通道输入的亮度信息;控制器依 次控制一组采样通道同时开启,使得该组采样通道同时进行亮度信息的采样,并将采样到的所述亮度信息通过该组采样通道的输出端传输给与该组采样通道相连的各采样模块;其中,在同一时刻打开的采样通道为一组采样通道,每组采样通道中的各采样通道分别与不同的采样模块相连。
根据本公开实施例提供的上述采样方法,通过控制多个采样模块同时对各采样模块对应的像素单元进行亮度信息的采样,用以缩短采样像素单元的亮度信息的时间,进而提高了调整像素单元的亮度的速度,提高了显示面板的亮度均一性。
根据本公开示例性实施例提供的上述采样方法,当控制器收到处理器发送的采样模式选择信号时,执行控制多个采样模块同时开启的步骤。
根据本公开示例性实施例提供的上述采样方法,该方法还包括:当控制器收到处理器发送的校准模式选择信号时,控制器控制所述多个采样模块依次开启,使得所述控制器控制的多个采样模块能够接收并保存采样通道的输出端的输出信号;其中,控制器在控制每一所述采样模块开启后,控制与该采样模块相连的多个采样通道依次开启,使得所述采样通道的输入端依次接收校准源输入的信号,对校准源进行采样;其中,所述校准源用于当控制器收到处理器发送的校准模式选择信号时,给采样通道的输入端提供标准信号。
根据本公开示例性实施例提供的上述采样方法,各个所述采样通道的输入端的输入信号相同,均为同一校准源提供的标准信号。
根据本公开示例性实施例提供的上述采样方法,所述控制器、采样模块设置在同一采样芯片中,该方法还包括:当所述控制器确定所属的采样芯片完成采样后,该所述控制器向与该控制器所属的采样芯片级联的下一个采样芯片中的控制器发送级联控制信号,使得下一个采样芯片中的控制器控制所述下一个采样芯片中的多个采样模块依次开启。
根据本公开示例性实施例提供的上述采样方法,该方法还包括:当收到处理器发送的输出指令信号时,控制器控制各个所述采样模块将保存的、来自各个采样通道的信号发送给所述处理器。
根据本公开示例性实施例提供的上述采样方法,该方法包括:处理器确定需要控制器工作在采样模式;处理器向所述控制器发送采样模式选择信号,用以使得所述控制器控制多个采样模块同时开启,使得所述控制器控制的多个采样模块能够接收并保存采样通道采样得到的像素单元的亮度信息;其中, 每一采样模块与多个采样通道相连,每一采样通道包括输入端和输出端,所述输入端用于采样显示基板中一部分区域的像素单元的亮度信息,所述输出端用于将采样得到的所述亮度信息传输给与该采样通道相连的采样模块;采样模块用于接收并保存采样通道输入的亮度信息;以及,使得控制器依次控制一组采样通道同时开启,使得该组采样通道同时进行亮度信息的采样,并将采样到的所述亮度信息通过该组采样模块的输出端传输给与该组采样通道相连的各采样模块;其中,在同一时刻打开的采样通道为一组采样通道,每组采样通道中的各采样通道分别与不同的采样模块相连。
相应地,本公开实施例提供一种采样控制方法,该方法还包括:处理器确定需要控制器工作在校准模式;处理器向所述控制器发送校准模式选择信号,用以使得所述控制器控制所述多个采样模块依次开启,使得所述控制器控制的多个采样模块能够接收并保存采样通道的输出端的输出信号;其中,控制器在控制每一所述采样模块开启后,控制与该采样模块相连的多个采样通道依次开启,使得所述采样通道的输入端依次接收校准源输入的信号,对校准源进行采样;其中,所述校准源用于当控制器收到处理器发送的校准模式选择信号时,给采样通道的输入端提供标准信号。
根据本公开示例性实施例提供的上述采样控制方法,该方法还包括:处理器在第一时长后获取控制器控制的采样模块中保存的、来自各个采样通道的采样结果;处理器向控制器发送输出指令信号,从而获取所述控制器控制的各个所述采样模块保存的各个所述采样通道的输出端的输出信号;其中,所述第一时长大于或等于所述控制器控制的所有采样模块对应的采样通道完成采样的时长。
根据本公开示例性实施例提供的上述采样控制方法,该方法还包括:对于所述控制器工作在校准模式时提供的采样结果,处理器进行如下校准步骤:依次接收多个采样模块输入的各个所述采样通道的输出端的输出信号;根据所述输出信号计算得出所述输出信号的采样均值;将所述与采样模块相连的各个所述采样通道的输出端的输出信号与所述采样均值进行比较,并根据比较结果得出该采样模块对应的所述采样通道的校准值;生成并存储所述校准值与所述采样通道的对应关系表。
根据本公开示例性实施例提供的上述采样控制方法,该方法还包括:对于所述控制器工作在采样模式时提供的采样结果,处理器进行如下处理步骤: 在校准值与采样通道的对应关系表中查找所述采样通道对应的预先得到的校准值;利用所述预先得到的校准值对所述采样通道的采样结果进行校准。
本公开实施例提供的上述采样控制方法,通过利用多个采样通道在校准模式下输入的输出端的输出信号得出该采样通道的校准值,对该采样通道在采样模式下输入的像素单元的亮度信息进行校准,消除了因采样通道和采样模块的寄生参数不同造成的采样误差,提高了采样结果的精准度。
根据本公开示例性实施例提供的上述采样控制方法,所述采样均值为对所述输出信号进行正态分布运算得出的均值。
根据本公开示例性实施例提供的上述采样控制方法,所述校准值为所述输出信号与所述校准均值的比值。
相应地,本公开实施例提供一种采样装置,用于对显示基板上设置的像素单元进行采样,该装置包括:第一单元,用于控制多个采样模块同时开启,使得所述多个采样模块能够接收并保存采样通道采样得到的所述像素单元的亮度信息;其中,每一采样模块与多个采样通道相连,每一采样通道包括输入端和输出端,所述输入端用于采样显示基板上一部分区域的像素单元的亮度信息,所述输出端用于将采样得到的所述亮度信息传输给与该采样通道相连的采样模块;采样模块用于接收并保存采样通道输入的亮度信息;第二单元,用于依次控制一组采样通道同时开启,使得该组采样通道同时进行亮度信息的采样,并将采样到的所述亮度信息通过该组采样通道的输出端传输给与该组采样通道相连的各采样模块;其中,在同一时刻打开的采样通道为一组采样通道,每组采样通道中的各采样通道分别与不同的采样模块相连。
根据本公开示例性实施例提供的上述采样装置,当所述第一单元收到处理器发送的采样模式选择信号时,执行控制多个采样模块同时开启的步骤。
根据本公开示例性实施例提供的上述采样装置,该装置还包括:校准采样单元;所述校准采样单元用于:当第一单元收到处理器发送的校准模式选择信号时,所述多个采样模块依次开启,使得所述多个采样模块能够接收并保存采样通道的输出端的输出信号;其中,第一单元在控制每一所述采样模块开启后,控制与该采样模块相连的多个采样通道依次开启,使得所述采样通道的输入端依次接收校准源输入的信号,对校准源进行采样;其中,所述校准源用于当控制器收到处理器发送的校准模式选择信号时,给采样通道的输入端提供标准信号。
根据本公开示例性实施例提供的上述采样装置,各个所述采样通道的输入端的输入信号相同,均为同一校准源提供的标准信号。
根据本公开示例性实施例提供的上述采样装置,所述第一单元、采样模块设置在同一采样芯片中,所述校准采样单元还用于:当所述第一单元确定所属的采样芯片完成采样后,该所述第一单元向与该第一单元所属的采样芯片级联的下一个采样芯片中的第一单元发送级联控制信号,使得下一个采样芯片中的第一单元控制所述下一个采样芯片中的多个采样模块依次开启。
根据本公开示例性实施例提供的上述采样装置,该装置还包括:信息输出单元;所述信息输出单元用于:当收到处理器发送的输出指令信号时,控制器控制各个所述采样模块将保存的、来自各个采样通道的信号发送给所述处理器。
相应地,本公开实施例提供一种采样控制装置,该装置包括:第三单元,用于判断控制器需要工作的模式;第四单元,用于当所述第三单元确定需要控制器工作在采样模式时,向所述控制器发送采样模式选择信号,使得所述控制器控制多个采样模块同时开启,使得所述控制器控制的多个采样模块能够接收并保存采样通道采样得到的像素单元的亮度信息;其中,每一采样模块与多个采样通道相连,每一采样通道包括输入端和输出端,所述输入端用于采样显示基板中一部分区域的像素单元的亮度信息,所述输出端用于将采样得到的所述亮度信息传输给与该采样通道相连的采样模块;采样模块用于接收并保存采样通道输入的亮度信息;以及,使得控制器依次控制一组采样通道同时开启,使得该组采样通道同时进行亮度信息的采样,并将采样到的所述亮度信息通过该组采样模块的输出端传输给与该组采样通道相连的各采样模块;其中,在同一时刻打开的采样通道为一组采样通道,每组采样通道中的各采样通道分别与不同的采样模块相连。
本公开示例性实施例提供的上述采样控制装置,所述第四单元还用于:当所述第三单元确定需要控制器工作在校准模式时,向所述控制器发送校准模式选择信号,用以使得所述控制器控制所述多个采样模块依次开启,使得所述控制器控制的多个采样模块能够接收并保存采样通道的输出端的输出信号;其中,控制器在控制每一所述采样模块开启后,控制与该采样模块相连的多个采样通道依次开启,使得所述采样通道的输入端依次接收校准源输入的信号,对校准源进行采样;其中,所述校准源用于当控制器收到处理器发 送的校准模式选择信号时,给采样通道的输入端提供标准信号。
根据本公开示例性实施例提供的上述采样控制装置,该装置还包括:发送指示单元,用于:在第一时长后获取控制器控制的采样模块中保存的、来自各个采样通道的采样结果;向控制器发送输出指令信号,从而获取所述控制器控制的各个所述采样模块保存的各个所述采样通道的输出端的输出信号;其中,所述第一时长大于或等于所述控制器控制的所有采样模块对应的采样通道完成采样的时长。
根据本公开示例性实施例提供的上述采样控制装置,该装置还包括:计算单元;对于所述控制器工作在校准模式时提供的采样结果,计算单元进行如下校准步骤:依次接收多个采样模块输入的各个所述采样通道的输出端的输出信号;根据所述输出信号计算得出所述输出信号的采样均值;将所述与采样模块相连的各个所述采样通道的输出端的输出信号与所述采样均值进行比较,并根据比较结果得出该采样模块对应的所述采样通道的校准值;生成并存储所述校准值与所述采样通道的对应关系表。
根据本公开示例性实施例提供的上述采样控制装置,该装置还包括:校准单元;对于所述驱动芯片工作在采样模式时提供的采样结果,所述校准单元进行如下处理步骤:在校准值与采样通道的对应关系表中查找所述采样通道对应的预先得到的校准值;利用所述预先得到的校准值对所述采样通道的采样结果进行校准。
根据本公开示例性实施例提供的上述采样控制装置,所述采样均值为对所述输出信号进行正态分布运算得出的均值。
根据本公开示例性实施例提供的上述采样控制装置,所述校准值为所述输出信号与所述校准均值的比值。
相应地,本公开实施例提供一种采样控制系统,包括上述任一所述的采样装置。
根据本公开示例性实施例提供的上述采样控制系统,还包括上述任一所述的采样控制装置。
相应地,本公开实施例提供一种显示装置,包括上述任一所述的采样控制系统。
附图说明
图1为本公开实施例提供的一种采样方法的采样模式原理示意图;
图2为本公开实施例提供的一种采样方法的采样模式流程示意图;
图3为本公开实施例提供的一种采样方法的采样时序图;
图4为本公开实施例提供的一种采样方法的采样通道分组示意图;
图5为本公开实施例提供的一种采样方法的校准模式流程示意图;
图6为本公开实施例提供的一种采样方法的校准模式流程示意图;
图7为本公开实施例提供的一种采样方法的校准模式采样时序图;
图8为本公开实施例提供的一种采样方法的校准模式传输信号时序图;
图9为本公开实施例提供的一种采样方法的单芯片时的采样时序图;
图10为本公开实施例提供的一种采样方法的单芯片时的采样通道分组示意图;
图11为本公开实施例提供的一种采样方法的单芯片时的传输信号时序图;
图12为本公开实施例提供的一种采样方法的多芯片时的采样时序图;
图13A为本公开实施例提供的一种采样方法的多芯片时的采样分组示意图之一;
图13B为本公开实施例提供的一种采样方法的多芯片时的采样分组示意图之二;
图14为本公开实施例提供的一种采样方法的多芯片时的采样模式传输信号时序图;
图15为本公开实施例提供的一种采样控制方法的流程示意图;
图16为本公开实施例提供的一种采样控制方法的计算流程示意图;
图17为本公开实施例提供的一种采样装置的结构示意图;
图18为本公开实施例提供的一种采样控制装置的结构示意图。
具体实施方式
为了使本公开的目的、技术方案和优点更加清楚,下面将结合附图对本公开作进一步地详细描述,显然,所描述的实施例仅是本公开一部分实施例,而不是全部的实施例。基于本公开中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其它实施例,都属于本公开保护的范围。
如图1所示,在本公开实施例提供的一种采样方法中,面板(panel)102 上设置有多个采样通道(Channel,CH)105,采样通道105分别与设置在显示基板上的像素单元(图中未示出)相连,用以采样像素单元的亮度信息;驱动芯片(Integrated Circuit,IC)103上设置有多个采样模块(Sense)106,每个采样模块106与多个采样通道105相连,用于获取采样通道105输入的像素单元的亮度信息;驱动芯片103还设置有逻辑控制电路107,用于输出控制信号控制采样模块106和/或采样通道105开启;当所有采样模块106完成采样后,驱动芯片103将获取的像素单元的亮度信息输出给时序控制模块(Timing Controller;T-CON)104,T-CON 104利用预设在T-CON 104中的算法对接收到的所述像素单元的亮度信息进行校准后,将校准后的亮度信息输出给像素驱动电路(图中未示出),用以调整像素单元的亮度。
需要说明的是,在本公开实施例中所述的驱动芯片(Integrated Circuit,IC)103可以理解为一种采样芯片,所述逻辑控制电路107可以理解为一种控制器,控制器可以是各种具有控制采样模块及采样通道的器件,T-CON 104可以理解为一种处理器,处理器可以是各种具有计算及存储计算功能结构的器件。
以下以控制器为逻辑电路,处理器为时序控制模块,采样装置为包括控制器、采样模块的驱动芯片为例进行说明,需要说明是的,以下仅为更好地解释本公开原理给出的示例,其中表示控制器、处理器及采样装置的器件不对本公开做出限制。
在控制器侧(即逻辑控制电路侧),如图2所示,本公开实施例提供一种采样方法,该方法包括:
S201、控制器控制多个采样模块同时开启,使得所述控制器控制的多个采样模块能够接收并保存采样通道采样得到的所述像素单元的亮度信息;其中,
每一采样模块与多个采样通道相连,每一采样通道包括输入端和输出端,所述输入端用于采样显示基板上一部分区域的像素单元的亮度信息,所述输出端用于将采样得到的所述亮度信息传输给与该采样通道相连的采样模块;采样模块用于接收并保存采样通道输入的亮度信息;
S202、控制器依次控制一组采样通道同时开启,使得该组采样通道同时进行亮度信息的采样,并将采样到的所述亮度信息通过该组采样通道的输出端传输给与该组采样通道相连的各采样模块;其中,
在同一时刻打开的采样通道为一组采样通道,每组采样通道中的各采样通道分别与不同的采样模块相连。
以下以控制器为逻辑控制电路,采样装置为设置有逻辑控制电路及采样模块的驱动芯片,处理器为时序控制模块为例进行说明。具体地,例如,在本公开实施例提供的采样方法中,面板102上设置有M个采样通道105,用于传输像素单元的亮度信息,驱动芯片103上设置有N个采样模块106,用于接收采样通道105输入的像素单元的亮度信息,其中,N≥1,M≥1,N≤M;则每个采样模块106可以对应采样
Figure PCTCN2018102754-appb-000001
个采样通道105,即第一个采样模块采样第1~L个采样通道,第二个采样模块采样第L+1~2L个采样通道……第N个采样模块采样第M-L+1~M个采样通道;驱动芯片103中设置有逻辑控制电路107,逻辑控制电路107可以输出控制采样模块106及采样通道105工作的控制信号,控制采样模块106的信号例如可以为模块控制信号SW1,N个采样模块106即对应N个模块控制信号SW1[0]~SW1[N-1];控制采样通道105的信号例如可以为通道控制信号SW2,每个采样模块106对应控制L个采样通道105,即对应L个通道控制信号SW2[0]~SW2[L-1]。
进一步地,在具体实施时,在本公开实施例提供的采样方法中,如图3所示,T-CON 104向所有驱动芯片103输出系统信号SMP控制所有驱动芯片103开始工作,驱动芯片103中的所有逻辑控制电路107同时输出N个模块控制信号SW1[0]~SW1[N-1],其中,SW1[0]用于控制第1个采样模块106开启,SW1[1]用于控制第2个采样模块106开启,以此类推,SW1[N-1]用于控制第N个采样模块106开启,从而控制N个采样模块106同时开始采样,以获取像素单元的亮度信息,即N个采样模块106从图3中模块控制信号SW1[0]~SW1[N-1]的第一个上升沿时刻同时开始采样。
逻辑控制电路107依次输出L个通道控制信号SW2[0]~SW2[L-1],控制N个采样模块106同时对各自对应的一个采样通道进行采样,最后使得每一采样模块完成对L个采样通道的采样,并且这N个采样模块是同时完成各自对L个采样通道的采样。具体地,如图4所示,第1个采样模块106对应采样第1~L个采样通道105,第2个采样模块106对应采样第L+1~2L个采样通道105……依次类推,第N个采样模块106对应采样第M-L+1~M个采样通道105;其中,每个采样模块106所对应的采样通道105中的第1个采样通道105组成第1组采样通道X1,每个采样模块106所对应的采样通道105中的第2个采样通道105组成第 2组采样通道X2……依次类推,每个采样模块106所对应的采样通道105中的第L个采样通道105组成第L组采样通道XL;逻辑控制电路107依次输出通道控制信号SW2[0]~SW2[L-1]控制每组采样通道105同时开启,即逻辑控制电路107输出模块控制信号SW2[0]给第1组采样通道X1时,每个采样模块106同时对该采样模块106对应的第1个采样通道105进行采样,逻辑控制电路107输出模块控制信号SW2[1]给第2组采样通道X2时,每个采样模块106同时对该采样模块106对应的第2个采样通道105进行采样……依次类推,当逻辑控制电路107输出模块控制信号SW2[L-1]给第L组采样通道XL时,每个采样模块106同时对该采样模块106对应的第L个采样通道105进行采样,这样,采样模块106在图3中模块控制信号SW1[0]~SW1[N-1]的最后一个下降沿完成一回合采样,即完成了所有采样通道的采样,如此,通过控制所有采样模块同时开始对该采样模块对应的采样通道分别进行采样,使得在采样模块对L个采样通道进行采样的时间内,完成对M个采样通道进行采样,极大地缩短了对各像素单元的亮度信息进行采样的时间,进而提高了调整像素单元的亮度的速度,提高了显示面板的亮度均一性。
进一步地,在具体实施时,在本公开实施例提供的采样方法中,每个驱动芯片103对应获取显示面板中不同区域的像素单元的亮度信息,每个驱动芯片103中的采样模块106对应该驱动芯片103所对应的区域中的一行像素单元,每个采样模块106采样的一组采样通道105,对应获取该行像素单元中的每一个像素单元的亮度信息。即在驱动芯片103中的逻辑控制电路107输出一组通道控制信号SW2后,采样模块106完成对该驱动芯片103对应的区域的像素单元的亮度信息的采样,具体地,怎么划分区域可以根据实际需要而定,在此不做限定。
进一步地,在具体实施时,在本公开实施例提供的采样方法中,在采样模块开始采样之前,T-CON向所有驱动芯片同时输出系统信号SMP,控制驱动芯片开始工作。
进一步地,在具体实施时,在本公开实施例提供的采样方法中,在采样模式下,所有采样模块对应的采样通道完成采样后,T-CON可以向驱动芯片中的逻辑控制电路输出输出指令信号TX_STB1,逻辑控制电路控制各个采样模块将保存的、来自各个采样通道的信号发送给T-CON,所述采样通道的信号即采样模块保存的由采用通道采样获得的像素单元的亮度信息,用于调整 该驱动芯片中的采样模块所对应的采样通道对应的各像素单元的亮度,若显示面板中包括多个驱动芯片,第一个驱动芯片向T-CON传输完亮度信息后,向第二个驱动芯片输出输出指令信号TX_STB2,使得第二个驱动芯片向T-CON输出获取到的像素单元的亮度信息,依次类推,直到最后一个驱动芯片完成向T-CON传输获取到的像素单元的亮度信息,具体地,驱动芯片将D0~Dn位的亮度信息通过多个脉冲信号输入到T-CON,具体占用多少位来传输数据,可以根据需要设计,在此不做限定。
进一步地,在具体实施时,在本公开实施例提供的采样方法中,T-CON先输出SMP控制所有驱动芯片开始工作,再输出TX_STB1控制所述驱动芯片向T-CON传输数据,T-CON输出TX_STB1与输出SMP的时间间隔大于或等于所有采样模块从开始采样到完成采样的采样时长,例如可以根据采样通道的数量估算一个采样时长,称作第一时长,T-CON向所有芯片输出SMP后开始计时,在计时的第一时长大于或等于所述采样时长后,T-CON输出TX_STB1控制驱动芯片中向T-CON传输驱动芯片中的采样模块获取到的像素单元的亮度信息。
进一步地,在具体实施时,在本公开实施例提供的采样方法中,驱动芯片103可以工作在采样模式和校准模式两个工作模式下,每个驱动芯片103上可以设置一个工作模式选择管脚(PIN),在驱动芯片103开始工作前,T-CON104给所述驱动芯片103上的工作模式选择管脚输入一个工作模式选择信号SEN-EN,用于控制该驱动芯片103选择采样模式还是校准模式;具体地,当该驱动芯片103上的PIN接收到的工作模式选择信号SEN-EN为高电平(或低电平)时,即该驱动芯片103接收到T-CON 104发送的采样模式选择信号SEN-EN1时,该驱动芯片103控制该驱动芯片103中的采样模块106进行采样动作,即执行上述步骤S201,控制多个采样模块106同时开启;当该驱动芯片103上的PIN接收到的工作模式选择信号SEN-EN为低电平(或高电平)时,即该驱动芯片103接收到T-CON 104发送的校准模式选择信号SEN-EN2时,该驱动芯片103控制该驱动芯片103中的采样模块106进行校准动作,控制多个采样模块106依次开启,当然,对驱动芯片103进行采样模式及校准模式的选择的方式不止上述这一种方式,可以根据需要设计,只要符合本公开原理都是可行的,在此不作限定。
由于实际应用中,各个采样通道和采样模块的电路元件存在微小的差异, 从而导致各个采样通道和采样模块的寄生参数不同,会给采样模块的采样结果带来误差。即在输入采样通道的信号相同的情况下,同一通道被不同的采样模块采样,可能返回不同的值,同一模块采样不同的通道,也可能返回不同的值。因此为了消除误差,可以对采样通道及采样模块进行校准,当驱动芯片103收到T-CON 104发送的校准模式选择信号SEN-EN2,驱动芯片103执行校准模式下的动作。
进一步地,在本公开实施例提供的采样方法中,该方法还包括校准模式,如图5所示,面板102上设置有多个采样通道105,驱动芯片103上设置有多个采样模块103及逻辑控制电路107,印制电路板(Printed Circuit Board,PCB)101中设置有一个校准源,所述校准源为一个恒定的标准信号,例如可以为一个恒定电流或恒定电压,所有驱动芯片103与PCB 101相连。当收到时序控制模块发送的校准模式选择信号SEN-EN2时,所述校准源作为标准信号,分别输入驱动芯片103中的各采样模块106对应的采样通道105,使得所述采样模块106分别得到该采样模块输出信号;当所有采样模块106分别与校准源完成采样后,采样模块106依次将采集到的各个采样通道105的输出端的输出信号发送给T-CON 104。
进一步地,在具体实施时,在本公开实施例提供的采样方法中,各个所述采样通道的输入端的输入信号相同,均为同一校准源提供的标准信号。具体地,显示面板中只设置一个校准源,即用同一个校准源作为标准信号输入每一所述采样模块及该采样模块所对应的采样通道。通过使每一采样通道的输入端的输入信号相同,保证了校准源的唯一性,排除了由于输入采样通道的信号不同而造成的采样结果的误差,从而进一步提高了采样结果的可靠性。
进一步地,如图6所示,在具体实施时,在本公开实施例提供的采样方法中,该方法还包括:
S1001、当控制器收到处理器发送的校准模式选择信号时,控制器控制所述多个采样模块依次开启,使得所述控制器控制的多个采样模块能够接收并保存采样通道的输出端的输出信号。
S1002、其中,控制器在控制每一所述采样模块开启后,控制与该采样模块相连的多个采样通道依次开启,使得所述采样通道的输入端依次接收校准源输入的信号,对校准源进行采样;其中,所述校准源用于当控制器收到处理器发送的校准模式选择信号时,给采样通道的输入端提供标准信号。
以下以控制器为逻辑控制电路,采样装置为设置有逻辑控制电路及采样模块的驱动芯片,处理器为时序控制模块为例进行说明。
具体地,在本公开实施例提供的采样方法中,同上所述,面板上设置有M个采样通道,用于传输像素单元的亮度信息,驱动芯片上设置有N个采样模块,用于接收采样通道输入的像素单元的亮度信息,其中,N≥1,M≥1,N≤M;则每个采样模块可以对应采样L(L=M/N)个采样通道,即第一个采样模块采样第1~L个采样通道,第二个采样模块采样第L+1~2L个采样通道……第N个采样模块采样第M-L+1~M个采样通道;驱动芯片中设置有逻辑控制电路,逻辑控制电路可以输出控制采样模块及采样通道工作的控制信号,控制采样模块的信号例如可以为模块控制信号SW1,N个采样模块即对应N个模块控制信号SW1[0]~SW1[N-1];控制采样通道的信号例如可以为通道控制信号SW2,每个采样模块对应控制L个采样通道,即对应L个通道控制信号SW2[0]~SW2[L-1]。
进一步地,在具体实施时,在本公开实施例提供的采样方法中,如图7中的驱动芯片IC1部分所示,驱动芯片IC1与PCB中的校准源相连,驱动芯片IC1收到T-CON发送的校准模式选择信号SEN-EN2,T-CON输出一个级联控制信号calib1控制驱动芯片IC1开始工作,驱动芯片IC1中的逻辑控制电路开启模块控制信号SW1[0],控制第1个采样模块开启;逻辑控制电路将L个通道控制信号SW2[0]~SW2[L-1]依次打开,依次控制该采样模块对应的L个采样通道开启,所述校准源作为标准信号依次输入所述采样通道,得到该采样通道的输出端的输出信号,具体地,驱动芯片IC1中的逻辑控制电路输出模块控制信号SW2[0]时,所述校准源作为标准信号输入第1个采样模块对应的第1个采样通道,得到所述第1个采样通道的输出端的输出信号;逻辑控制电路输出模块控制信号SW2[1]时,所述校准源作为标准信号输入第1个采样模块对应的第2个采样通道,得到所述第2个采样通道的输出端的输出信号;依次类推,逻辑控制电路输出模块控制信号SW2[L-1]时,所述校准源作为标准信号输入第1个采样模块对应的第L个采样通道,得到所述第L个采样通道的输出端的输出信号;第1个采样模块完成采样后,逻辑控制电路输出模块控制信号SW1[1],控制第2个采样模块开启;驱动芯片IC1中的逻辑控制电路将L个通道控制信号SW2[0]~SW2[L-1]依次打开,依次控制第2个采样模块对应的L个采样通道开启,所述校准源作为标准信号依次输入所述采样通道,得到该采样通道的输 出端的输出信号,即逻辑控制电路发出模块控制信号SW2[0]时,所述校准源作为标准信号输入第2个采样模块对应的第L+1个采样通道,得到所述第L+1个采样通道的输出端的输出信号;逻辑控制电路输出模块控制信号SW2[1]时,所述校准源作为标准信号输入第2个采样模块对应的第L+2个采样通道,得到所述第L+2个采样通道的输出端的输出信号,依次类推,当逻辑控制电路输出模块控制信号SW2[L-1]时,所述校准源作为标准信号输入第2个采样模块对应的第2L个采样通道,得到所述第2L个采样通道的输出端的输出信号;第2个采样模块完成采样后,逻辑控制电路输出模块控制信号SW1[2],控制第3个采样模块开始对校准源进行校准信息的采样……依次类推,相应地,第N-1采样模块完成采样后,驱动芯片IC1中的逻辑控制电路输出模块控制信号SW1[N-1],控制第N个采样模块开启;逻辑控制电路将L个通道控制信号SW2[0]~SW2[L-1]依次打开,依次控制第N个采样模块对应的L个采样通道开启,所述校准源作为标准信号依次输入所述采样通道,得到该采样通道的输出端的输出信号,即逻辑控制电路输出模块控制信号SW2[0]时,所述校准源作为标准信号输入第N个采样模块对应的第M-L+1个采样通道,得到所述第M-L+1个采样通道的输出端的输出信号,逻辑控制电路输出模块控制信号SW2[1]时,所述校准源作为标准信号输入第N个采样模块对应的第M-L+2个采样通道,得到所述第M-L+2个采样通道的输出端的输出信号,依次类推,当逻辑控制电路发出模块控制信号SW2[L-1]时,所述校准源作为标准信号输入第N个采样模块对应的第M个采样通道,得到所述第M个采样通道的输出端的输出信号;第N个采样模块完成采样后,将采集到的各个采样通道的输出端的输出信号发送给T-CON,使得T-CON利用所有采样模块输入的输出信号进行计算,得出一个输出信号的采样均值,将采样模块对应的各个所述采样通道的输出端的输出信号与采样均值进行比较,并根据比较结果得出该采样模块对应的采样通道的校准值,并将该校准值存储在T-CON中。
进一步地,在具体实施时,在本公开实施例提供的采样方法中,当逻辑控制电路确定所属的驱动芯片完成采样后,该所述逻辑控制电路向与该逻辑控制电路所属的驱动芯片级联的下一个驱动芯片中的逻辑控制电路发送级联控制信号,使得下一个驱动芯片中的逻辑控制电路控制所述下一个驱动芯片中的多个采样模块依次开启。具体地,可以由T-CON输出级联控制信号calib1控制第一个驱动芯片开始工作,驱动芯片中的逻辑电路开启模块控制信号 SW1,第一个驱动芯片由T-CON控制其开始校准动作,之后的驱动芯片由上一个驱动芯片完成校准动作后,向下一个与该驱动芯片级联的驱动芯片输出级联控制信号calib2控制下一个驱动芯片开始校准动作。进一步地,在具体实施时,在本公开实施例提供的采样方法中,如图7所示,若显示面板包括多个驱动芯片(例如驱动芯片IC1和驱动芯片IC2),则在第一个驱动芯片IC1完成校准信息的采样后,该驱动芯片IC1向下一驱动芯片IC2发送级联控制信号calib2,控制下一个驱动芯片在calib2第一个下降沿的时刻(图7中竖向虚线与级联信号calib2的相交处)重复上述步骤,对该驱动芯片IC2中的所有采样通道P~Q(P≥1,Q≥1)完成校准动作。
进一步地,在具体实施时,在本公开实施例提供的采样方法中,在校准模式下所有的采样模块对应的采样通道完成采样后,T-CON可以向驱动芯片中的逻辑电路输出输出指令信号TX_STB1,逻辑控制电路控制各个采样模块将保存的、来自各个采样通道的信号发送给T-CON,所述采样通道的信号即采样模块保存的各个所述采样通道的输出端的输出信号,用于对各采样模块及采样通道的进行校准,消除误差,具体地,驱动芯片将D0~Dn位的输出信号通过多个脉冲信号输入到T-CON;若显示面板中包括多个驱动芯片,例如,参见图8,在校准模式下驱动芯片IC1及驱动芯片IC2中的所有采样模块采集完各个所述采样通道的输出端的输出信号后,T-CON向驱动芯片IC1输出输出指令信号TX_STB1控制驱动芯片IC1将D0~Dn位的输出信号通过多个脉冲信号输入到T-CON;驱动芯片IC1向T-CON传输完输出信号后,向驱动芯片IC2输出输出指令信号TX_STB2,使得驱动芯片IC2将D0~Dn位的输出信号通过多个脉冲信号输入到T-CON,具体占用多少位来传输数据,可以根据需要设计,在此不做限定。
进一步地,在具体实施时,在本公开实施例提供的采样方法中,在驱动芯片工作在采样模式或校准模式下的整个采样期间,驱动芯片中的逻辑控制电路持续输出一个复位控制信号START,复位控制信号START的高低电平与通道控制信号SW2的高低电平相反,用于对采样模块进行复位,即START为低电平时,SW2为高电平,采样模块在START的下降沿、SW2的上升沿时刻开始对第一个采样通道进行采样,在SW2为下降沿时,采样模块完成对该采样通道的采样,此时START输出上升沿对采样模块进行复位,为下一次采样做准备。
进一步地,在具体实施时,在本公开实施例提供的采样方法中,所述多个采样模块可以为同一芯片中的采样模块,也可以为不同芯片中的采样模块。如图1所示,显示面板中可以包括多个驱动芯片103,每个驱动芯片103中都可以设置采样模块106,模块控制信号SW1控制的采样模块106可以设置在同一驱动芯片103中,也可以设置在不同驱动芯片103中,具体地可根据实际实施时的需要而设计,在此不做限定。
下面举例说明。
实施例1、
如图9所示,所有采样模块设置在同一驱动芯片中。
例如,显示面板包括一个T-CON、一个驱动芯片,驱动芯片上设置有15个采样模块、一个面板,面板上设置有240个采样通道,即每个采样模块对应对16个采样通道进行采样。
T-CON向驱动芯片上的工作模式选择管脚输出采样模式选择信号SEN-EN1,选择驱动芯片进行采样动作;T-CON向驱动芯片输出系统信号SMP控制驱动芯片开始工作,驱动芯片中的逻辑控制电路开启每个采样模块所对应的模块控制信号SW1[0]~SW1[14],其中,SW1[0]用于控制第1个采样模块开启,SW1[1]用于控制第2个采样模块开启,以此类推,SW1[14]用于控制第15个采样模块开启,从而控制第1~15个采样模块同时开始采样;逻辑控制电路依次输出16个通道控制信号SW2[0]~SW2[15],每一个通道控制信号用于控制一组采样通道同时开启,从而控制15个采样模块同时对该采样模块对应的16个采样通道分别进行采样,以获取像素单元的亮度信息,具体地,如图10所示,图10中白色方块表示各采样模块,白色方块中的数字表示在第1~15个采样模块当中该采样模块的编号,黑色方块表示各采样通道,黑色方块中的数字表示在第1~240个采样通道中该采样通道的编号;第1个采样模块对应采样第1~16个采样通道,第2个采样模块对应采样第17~32个采样通道……依次类推,第15个采样模块对应采样第225~240个采样通道;其中,每个采样模块所对应的采样通道中的第1个采样通道组成第1组采样通道Y1,每个采样模块所对应的采样通道中的第2个采样通道组成第2组采样通道Y2……依次类推,每个采样模块所对应的采样通道中的第16个采样通道组成第16组采样通道Y16;逻辑控制电路依次输出通道控制信号SW2[0]~SW2[15]控制每组采样通道同时开启,即逻辑控制电路输出模块控制信号SW2[0]给第1组采样通道Y1 时,每个采样模块同时对该采样模块对应的第1个采样通道进行采样,逻辑控制电路输出模块控制信号SW2[1]给第2组采样通道Y2时,每个采样模块同时对该采样模块对应的第2个采样通道进行采样……依次类推,当逻辑控制电路输出模块控制信号SW2[15]给第16组采样通道Y16时,每个采样模块同时对该采样模块对应的第16个采样通道进行采样,这样,15个采样模块即完成了对所有采样通道的采样,如此,通过控制所有采样模块同时开始对该采样模块对应的采样通道分别进行采样,使得在采样模块对16个采样通道进行采样的时间内,完成对240个采样通道进行采样,极大地缩短了对各像素单元的亮度信息进行采样的时间,进而提高了调整像素单元的亮度的速度,提高了显示面板的亮度均一性。
如图11所示,驱动芯片中的采样模块对应的采样通道完成采样后,T-CON向驱动芯片中的逻辑控制电路输出输出指令信号TX_STB1,逻辑控制电路控制采样模块向T-CON传输保存的像素单元的亮度信息,驱动芯片将D0~Dn位的亮度信息通过多个脉冲信号输入到T-CON,用于调整该驱动芯片对应的各像素单元的亮度。
T-CON向驱动芯片输出SMP与输出TX_STB1的时间间隔大于或等于16个采样通道完成采样的采样时长(或称第一时长)。
其中,在整个采样期间,驱动芯片中的逻辑控制电路持续输出一个复位控制信号START,复位控制信号START的高低电平与通道控制信号SW2的高低电平相反,用于对采样模块进行复位,即START为低电平时,SW2为高电平,采样模块在START的下降沿、SW2的上升沿时刻开始对第一个采样通道进行采样,在SW2为下降沿时,采样模块完成对该采样通道的采样,此时START输出上升沿对采样模块进行复位,为下一次采样做准备。
实施例2、
如图12所示,各采样模块设置在不同的驱动芯片中。
这里以包括两个驱动芯片的显示面板为例:
显示面板包括一个T-CON、两个驱动芯片(驱动芯片IC1和驱动芯片IC2),每个驱动芯片上设置有15个采样模块、一个面板,面板上设置有480个采样通道,即每个采样模块对应对16个采样通道进行采样。
T-CON向驱动芯片IC1及驱动芯片IC2上的工作模式选择管脚输出采样模式选择信号SEN-EN1,选择驱动芯片IC1及驱动芯片IC2进行采样动作;T-CON 向两个驱动芯片输出系统信号SMP控制两个驱动芯片开始工作,两个驱动芯片中的逻辑控制电路开启该驱动芯片中每个采样模块所对应的模块控制信号SW1[0]~SW1[29],其中,SW1[0]用于控制第1个采样模块开启,SW1[1]用于控制第2个采样模块106开启,以此类推,SW1[14]用于控制第15个采样模块开启,从而控制控制驱动芯片IC1中的采样模块1~15同时开始采样;SW1[15]用于控制第16个采样模块开启,SW1[16]用于控制第17个采样模块开启,以此类推,SW1[29]用于控制第30个采样模块开启,从而控制驱动芯片IC2中的采样模块16~30同时开始采样;驱动芯片IC1中的逻辑控制电路依次输出16个通道控制信号SW2[0]~SW2[15],每一个通道控制信号用于控制一组采样通道同时开启,从而控制驱动芯片IC1中的采样模块1~15同时对该采样模块对应的16个采样通道分别进行采样,驱动芯片IC2中的逻辑控制电路依次输出通道控制信号SW2[16]~SW2[31],每一个通道控制信号用于控制一组采样通道同时开启,从而控制驱动芯片IC2中的采样模块16~30同时对该采样模块对应的16个采样通道分别进行采样,以获取像素单元的亮度信息,具体地,如图13a所示,图中白色方块表示各采样模块,白色方块中的数字表示在采样模块1~15当中该采样模块的编号,黑色方块表示各采样通道,黑色方块中的数字表示在采样通道1~240中该采样通道的编号,驱动芯片IC1中的采样模块1对应采样采样通道1~16,采样模块2对应采样采样通道17~32……依次类推,采样模块15对应采样采样通道225~240;其中,每个采样模块所对应的采样通道中的第1个采样通道组成第1组采样通道A1,每个采样模块所对应的采样通道中的第2个采样通道组成第2组采样通道A2……依次类推,每个采样模块所对应的采样通道中的第16个采样通道组成第16组采样通道A16;逻辑控制电路依次输出通道控制信号SW2[0]~SW2[15]控制每组采样通道同时开启,即逻辑控制电路输出模块控制信号SW2[0]给第1组采样通道A1时,每个采样模块同时对该采样模块对应的第1个采样通道进行采样,逻辑控制电路输出模块控制信号SW2[1]给第2组采样通道A2时,每个采样模块同时对该采样模块对应的第2个采样通道进行采样……依次类推,当逻辑控制电路107输出模块控制信号SW2[15]给第16组采样通道A16时,每个采样模块同时对该采样模块对应的第16个采样通道进行采样;类似地,如图13b所示,图中白色方块表示各采样模块,白色方块中的数字表示在采样模块16~30当中该采样模块的编号,黑色方块表示各采样通道,黑色方块中的数字表示在采样通道241~480中该采样通道 的编号,驱动芯片IC2中的采样模块16对应采样采样通道241~256,采样模块14对应采样采样通道257~272……依次类推,采样模块30对应采样采样通道465~480;其中,每个采样模块所对应的采样通道中的第1个采样通道组成第1组采样通道B1,每个采样模块所对应的采样通道中的第2个采样通道组成第2组采样通道B2……依次类推,每个采样模块所对应的采样通道中的第16个采样通道组成第16组采样通道B16;逻辑控制电路依次输出通道控制信号SW2[0]~SW2[15]控制每组采样通道同时开启,即逻辑控制电路输出模块控制信号SW2[0]给第1组采样通道B1时,每个采样模块同时对该采样模块对应的第1个采样通道进行采样,逻辑控制电路输出模块控制信号SW2[1]给第2组采样通道B2时,每个采样模块同时对该采样模块对应的第2个采样通道进行采样……依次类推,当逻辑控制电路输出模块控制信号SW2[15]给第16组采样通道B16时,每个采样模块同时对该采样模块对应的第16个采样通道进行采样;如此,通过控制所有采样模块同时开始对该采样模块对应的采样通道分别进行采样,使得在采样模块对16个采样通道进行采样的时间内,完成对480个采样通道进行采样,极大地缩短了对各像素单元的亮度信息进行采样的时间,进而提高了调整像素单元的亮度的速度,提高了显示面板的亮度均一性。
如图14所示,所有采样模块对应的采样通道完成采样后,T-CON向驱动芯片IC1中的逻辑控制电路输出输出指令信号TX_STB1,逻辑控制电路控制采样模块向T-CON传输保存的像素单元的亮度信息,驱动芯片将D0~Dn位的亮度信息通过多个脉冲信号输入到T-CON;驱动芯片IC1向T-CON传输完亮度信息后,向驱动芯片IC2输出输出指令信号TX_STB2,使得驱动芯片IC2向T-CON传输获取到的像素单元的亮度信息,驱动芯片将D0~Dn位的亮度信息通过多个脉冲信号输入到T-CON,用于调整各像素单元的亮度,驱动芯片IC1及驱动芯片IC2对应显示面板上不同的像素单元的区域。
T-CON向两个驱动芯片输出SMP与输出TX_STB1的时间间隔大于或等于16个采样通道完成采样的采样时长(或称第一时长)。
其中,在整个采样期间,驱动芯片IC1和驱动芯片IC2中的逻辑控制电路持续输出一个复位控制信号START,复位控制信号START的高低电平与通道控制信号SW2的高低电平相反,用于对采样模块进行复位,即START为低电平时,SW2为高电平,采样模块在START的下降沿、SW2的上升沿时刻开始对第一个采样通道进行采样,在SW2为下降沿时,采样模块完成对该采样通 道的采样,此时START输出上升沿对采样模块进行复位,为下一次采样做准备。
相应地,在处理器侧(即时序控制模块侧),本公开实施例提供一种采样控制方法,如图15所示,该方法包括:
S1501、处理器确定需要控制器工作在采样模式;
S1502、处理器向所述控制器发送采样模式选择信号,用以使得所述控制器控制多个采样模块同时开启,使得所述控制器控制的多个采样模块能够接收并保存采样通道采样得到的像素单元的亮度信息;其中,每一采样模块与多个采样通道相连,每一采样通道包括输入端和输出端,所述输入端用于采样显示基板中一部分区域的像素单元的亮度信息,所述输出端用于将采样得到的所述亮度信息传输给与该采样通道相连的采样模块;采样模块用于接收并保存采样通道输入的亮度信息;以及,使得控制器依次控制一组采样通道同时开启,使得该组采样通道同时进行亮度信息的采样,并将采样到的所述亮度信息通过该组采样模块的输出端传输给与该组采样通道相连的各采样模块;其中,在同一时刻打开的采样通道为一组采样通道,每组采样通道中的各采样通道分别与不同的采样模块相连。进一步地,在具体实施时,在本公开实施例提供的采样控制方法中,该方法还包括:
处理器确定需要控制器工作在校准模式;
处理器向所述控制器发送校准模式选择信号,用以使得所述控制器控制所述多个采样模块依次开启,使得所述控制器控制的多个采样模块能够接收并保存采样通道的输出端的输出信号;其中,控制器在控制每一所述采样模块开启后,控制与该采样模块相连的多个采样通道依次开启,使得所述采样通道的输入端依次接收校准源输入的信号,对校准源进行采样;其中,所述校准源用于当控制器收到处理器发送的校准模式选择信号时,给采样通道的输入端提供标准信号。
进一步地,在具体实施时,在本公开实施例提供的采样控制方法中,该方法还包括:
处理器在第一时长后获取控制器控制的采样模块中保存的、来自各个采样通道的采样结果;
处理器向控制器发送输出指令信号,从而获取所述控制器控制的各个所述采样模块保存的各个所述采样通道的输出端的输出信号;
其中,所述第一时长大于或等于所述控制器控制的所有采样模块对应的采样通道完成采样的时长。
进一步地,在具体实施时,如图16所示,在本公开实施例提供的采样控制方法中,对于所述控制器工作在校准模式时提供的采样结果,处理器进行如下校准步骤:
S1601、依次接收多个采样模块输入的各个所述采样通道的输出端的输出信号;
S1602、根据所述输出信号计算得出所述输出信号的采样均值;
S1603、将所述采样模块对应的各个所述采样通道的输出端的输出信号与所述采样均值进行比较,并根据比较结果得出该采样模块对应的所述采样通道的校准值;
S1604、生成并存储所述校准值与所述采样通道的对应关系表。
以下以控制器为逻辑控制电路,采样装置为设置有逻辑控制电路及采样模块的驱动芯片,处理器为时序控制模块为例进行说明。
具体地,在具体实施时,在本公开实施例提供的采样控制方法中,所有驱动芯片中的采样模块完成采样后,时序控制模块向一个驱动芯片输入输出指令信号TX_STB1控制该驱动芯片开始向时序控制模块传输该驱动芯片上的每一采样模块采集到的各采样模块的输出端的输出信号,T-CON接收到所有采样模块对应的采样通道的输出端的输出信号后,给每一采样模块及该采样模块对应的每一个采样通道设置一个地址,该驱动芯片完成向T-CON传输输出信号后,输出TX_STB2给与该驱动芯片级联的下一个驱动芯片,控制下一驱动芯片开始向时序控制模块传输该驱动芯片上的采样模块对应的采样通道的输出信号,T-CON接收到所有采样模块对应的采样通道的输出信号后,给每一采样模块及该采样模块对应的每一个采样通道设置一个地址……依次类推,所有驱动芯片完成向T-CON传输输出信号后,T-CON将所有采样模块及该采样模块对应的采样通道输入的输出信号建立如下表1的校准值与所述采样通道的对应关系表,其中SENSE代表采样模块,CH代表采样通道,假设有N个SENSE,M个CH,则每一SENSE对应L个CH。表格中的每一格对应一个采样模块或采样通道输入的校准信息及其对应的地址,T-CON将此表格保存在T-CON中。
Figure PCTCN2018102754-appb-000002
表1
进一步地,在具体实施时,在本公开实施例提供的采样控制方法中,T-CON接收到所有采样模块对应的采样通道输入的输出信号后,根据所述输出信号计算得出一个采样均值,将表1中保存的每一个采样模块对应的采样通道的输出信号与所述采样均值进行比较得出该采样模块的校准值,并将每一采样模块对应的采样通道校准值保存在表1中该采样通道对应的位置,用以对采样模块及采样通道在采样模式下输入的像素单元的亮度信息进行校准。
进一步地,在具体实施时,在本公开实施例提供的采样控制方法中,对于所述驱动芯片工作在采样模式时提供的采样结果,进行如下处理步骤:
在校准值与采样通道的对应关系表中查找所述采样通道对应的预先得到的校准值;
利用所述预先得到的校准值对所述采样通道的采样结果进行校准。
具体地,在本公开实施例提供的采样控制方法中,在采样模式下,采样模块将该采样模块对应的采样通道获取的像素单元的亮度信息输入T-CON,T-CON采用寻址方式在已保存在T-CON中的校准值与采样通道的对应关系表查找该采样通道对应的预先得到的校准值,利用该校准值对该采样通道输入的亮度信息进行校准,得到校准后的亮度信息,并将该亮度信息输入像素驱动电路对像素单元的亮度进行调整。
进一步地,在具体实施时,在本公开实施例提供的采样控制方法中,所述采样均值例如可以为利用正态分布算法得出的正态分布均值或算术平均值,当然,不限于这两种算法,具体地,可以根据需要设计计算方式,只要符合本公开原理的计算方式都是可行的,在此不做限定。
进一步地,在具体实施时,本公开请实施例提供的采样控制方法中,所述校准值例如可以为所述采样均值与该采样模块对应的采样通道的输出信号的比值,当然,对校准值的计算不限于比值这一种方式,可以根据需要设计,在此不做限定。
具体地,在本公开实施例提供的采样控制方法中,T-CON对采样模块对应的采样通道输入的像素单元的亮度信息进行校准,具体包括:
若该采样模块获取的输出信号比所述采样均值大,则利用校准值减小该采样模块输入的亮度信息;
若该采样模块获取的输出信号比所述采样均值小,则利用校准值增大该采样模块输入的亮度信息。
进一步地,在具体实施时,在本公开实施例提供的采样控制方法中,在校准模式中,通过将唯一的校准源作为标准信号输入每一个采样模块所对应的采样通道,得到该采样通道的输出端的输出信号,将所述输出信号输入T-CON,用以计算得出一个采样均值,再将每一个采样模块对应的每一采样通道的输出信号与所述采样均值进行比较,根据比较结果得出一个校准值保存在T-CON中该采样模块对应的采样通道相应的存储位置中,在采样模式下,采样模块对应的采样通道向T-CON输入该采样通道获取的像素单元的亮度信息时,利用T-CON中已保存的该采样通道对应的校准值对所述亮度信息进行校准,以达到消除因采样通道和采样模块的寄生参数不同造成的采样误差,以提高采样结果的精准度。
需要说明的是,在本公开实施例提供的采样方法中,可以在进行采样之前,先让驱动芯片工作在校准模式下,对每一采样模块及每一采样通道进行校准,得到所述采样模块对应的采样通道的校准值,再让驱动芯片工作在采样模式下,对像素单元进行亮度信息的采样;当然,也可以不进行校准,直接让驱动芯片开始采样,或单独让驱动芯片进行校准动作;所述采样模式与校准模式是独立的关系,在本公开实施例提供的采样方法中,可以让驱动芯片单独工作在任一模式之下,在此不做限定。
下面结合具体实施例进行详细说明。需要说明的是,本实施例是为了更好的解释本公开提供的采样方法及采样控制方法,但不限制本公开提供的采样方法及采样控制方法。
让驱动芯片先工作在校准模式下,再工作在采样模式下。
例如,显示面板包括一个T-CON、一个驱动芯片,驱动芯片上设置有15个采样模块、一个面板,面板上设置有240个采样通道,即每个采样模块对应对16个采样通道进行采样;即第1个采样模块采样第1~16个采样通道,第2个采样模块采样第17~32个采样通道……依次类推,第15个采样模块采样第225~240个采样通道;驱动芯片中设置有逻辑控制电路,逻辑控制电路可以输出控制采样模块及采样通道工作的控制信号,控制采样模块的信号例如可以为模块控制信号SW1,15个采样模块即对应15个模块控制信号SW1[0]~SW1[14];控制采样通道的信号例如可以为通道控制信号SW2,每个采样模块对应控制16个采样通道,即对应16个通道控制信号SW2[0]~SW2[15]。
同时,PCB中设置有一个校准源,具体地,在本公开实施例提供的采样控制中,所述校准源为一个恒定的标准信号,例如可以为一个恒定电流或恒定电压,所有驱动芯片与PCB相连;驱动芯片上的工作模式管脚接收到高电平时选择采样模式,接收到低电平时选择校准模式。
T-CON向驱动芯片上的工作模式选择管脚发送为低电平的工作模式选择信号SEN-EN,使驱动芯片开始校准动作。
T-CON输出一个级联控制信号calib1控制驱动芯片开始工作,驱动芯片中的逻辑控制电路开启模块控制信号SW1[0],控制第1个采样模块开启;逻辑控制电路将L个通道控制信号SW2[0]~SW2[15]依次打开,依次控制该采样模块对应的L个采样通道开启,所述校准源作为标准信号依次输入所述采样通道,得到该采样通道的输出端的输出信号,具体地,驱动芯片中的逻辑控制电路输出模块控制信号SW2[0]时,所述校准源作为标准信号输入第1个采样模块对应的第1个采样通道,得到所述第1个采样通道的输出端的输出信号;逻辑控制电路输出模块控制信号SW2[1]时所述校准源作为标准信号输入第1个采样模块对应的第2个采样通道,得到所述第2个采样通道的输出端的输出信号;依次类推,逻辑控制电路输出模块控制信号SW2[15]时,所述校准源作为标准信号输入第1个采样模块对应的第16个采样通道,得到所述第L个采样通道的输出端的输出信号;第1个采样模块完成采样后,逻辑控制电路输出模块控制信号SW1[1],控制第2个采样模块开启;驱动芯片中的逻辑控制电路将16个通道控制信号SW2[0]~SW2[15]依次打开,依次控制第2个对应的L个采样通道开启,所述校准源作为标准信号依次输入所述采样通道,得到该采样通道的输 出端的输出信号,即逻辑控制电路发出模块控制信号SW2[0]时,所述校准源作为标准信号输入第2个采样模块对应的第17个采样通道,得到所述第17个采样通道的输出端的输出信号;逻辑控制电路输出模块控制信号SW2[1]时,所述校准源作为标准信号输入第2个采样模块对应的第18个采样通道,得到所述第18个采样通道的输出端的输出信号,依次类推,当逻辑控制电路输出模块控制信号SW2[15]时,所述校准源作为标准信号输入第2个采样模块对应的第32个采样通道,得到所述第32个采样通道的输出端的输出信号;第2个采样模块完成采样后,逻辑控制电路输出模块控制信号SW1[2],控制第3个采样模块开启……依次类推,相应地,第14采样模块完成采样后,驱动芯片中的逻辑控制电路输出模块控制信号SW1[14],控制第15个采样模块开启;逻辑控制电路将16个通道控制信号SW2[0]~SW2[15]依次打开,依次控制第15个采样模块对应的16个采样通道开启,所述校准源作为标准信号依次输入所述采样通道,得到该采样通道的输出端的输出信号,即逻辑控制电路输出模块控制信号SW2[0]时,述校准源作为标准信号输入第15个采样模块对应的第225个采样通道,得到所述第225个采样通道的输出端的输出信号,逻辑控制电路输出模块控制信号SW2[1]时,述校准源作为标准信号输入第15个采样模块对应的第226个采样通道,得到所述第226个采样通道的输出端的输出信号,依次类推,当逻辑控制电路发出模块控制信号SW2[15]时,所述校准源作为标准信号输入第15个采样模块对应的第240个采样通道,得到所述第240个采样通道的输出端的输出信号。
15个采样模块完成采样后,即大于等于240个采样通道完成采样的时间后,T-CON向驱动芯片输出输出指令信号TX_STB1,控制驱动芯片向T-CON传输该驱动芯片中所有采样模块采集到的各采样通道的输出端的输出信号,用于对各采样模块及采样通道的进行校准,消除误差,具体地,驱动芯片将D0~Dn位的输出信号通过多个脉冲信号输入到T-CON,将获取的输出信号依次输入T-CON,T-CON接收到所有采样模块对应的采样通道的输出信号后,给每一采样模块及该采样模块对应的每一个采样通道设置一个地址,T-CON将所有采样模块及该采样模块对应的采样通道输入的输出信号建立如下表2的校准值与所述采样通道的对应关系表,保存在T-CON中;其中SENSE代表采样模块,CH代表采样通道,数字为每一采样模块及采样通道的编号。
Figure PCTCN2018102754-appb-000003
表2
同时,T-CON可以利用接收到的所有输出信号进行正态分布计算,取正态分布技术中分布频率最高的值得出一个采样均值,并将表2中保存的每一采样模块对应的采样通道的输出信号与该采样均值进行比较,得出每一采样模块对应的采样通道的校准值,即该采样通道输入的输出信号与采样均值的比值;并将校准值保存至表2中该采样通道对应的存储位置中。
T-CON向驱动芯片上的工作模式选择管脚发送为高电平的工作模式选择信号SEN-EN,使驱动芯片选择采样模式。
逻辑控制电路依次输出16个通道控制信号SW2[0]~SW2[15],每一个通道控制信号用于控制一组采样通道同时开启,从而控制15个采样模块同时对该采样模块对应的16个采样通道分别进行采样,以获取像素单元的亮度信息,具体地,如图10所示,图中白色方块表示各采样模块,白色方块中的数字表示在第1~15个采样模块当中该采样模块的编号,黑色方块表示各采样通道,黑色方块中的数字表示在第1~240个采样通道中该采样通道的编号;第1个采样模块对应采样第1~16个采样通道,第2个采样模块对应采样第17~32个采样通道……依次类推,第15个采样模块对应采样第225~240个采样通道;其中,每个采样模块所对应的采样通道中的第1个采样通道组成第1组采样通道Y1,每个采样模块所对应的采样通道中的第2个采样通道组成第2组采样通道Y2……依次类推,每个采样模块所对应的采样通道中的第16个采样通道组成第16组采样通道Y16;逻辑控制电路依次输出通道控制信号SW2[0]~SW2[15]控制每组采样通道同时开启,即逻辑控制电路输出模块控制信号SW2[0]给第1组采样通道Y1时,每个采样模块同时对该采样模块对应的第1个采样通道进 行采样,逻辑控制电路输出模块控制信号SW2[1]给第2组采样通道Y2时,每个采样模块同时对该采样模块对应的第2个采样通道进行采样……依次类推,当逻辑控制电路输出模块控制信号SW2[15]给第16组采样通道Y16时,每个采样模块同时对该采样模块对应的第16个采样通道进行采样,这样,15个采样模块即完成了对所有采样通道的采样,如此,通过控制所有采样模块同时开始对该采样模块对应的采样通道分别进行采样,使得在采样模块对16个采样通道进行采样的时间内,完成对240个采样通道进行采样,极大地缩短了对各像素单元的亮度信息进行采样的时间,进而提高了调整像素单元的亮度的速度,提高了显示面板的亮度均一性。
驱动芯片中的采样模块完成采样后,T-CON向驱动芯片输出输出指令信号TX_STB1,控制驱动芯片向T-CON传输获取到的像素单元的亮度信息,驱动芯片将D0~Dn位的亮度信息通过多个脉冲信号输入到T-CON,T-CON采用寻址方式在已保存在T-CON中的校准值与采样通道的对应关系表(表2)查找该采样通道对应的预先得到的校准值,利用该校准值对该采样通道输入的亮度信息进行校准,得到校准后的亮度信息,并将该亮度信息输入像素驱动电路对像素单元的亮度进行调整,以达到消除因采样通道和采样模块的寄生参数不同造成的采样误差,以提高采样结果的精准度。
基于同一发明构思,本公开实施例提供一种采样装置,如图17所示,该装置包括:
第一单元1201,用于控制多个采样模块同时开启,使得所述多个采样模块能够接收并保存采样通道采样得到的所述像素单元的亮度信息;其中,
每一采样模块与多个采样通道相连,每一采样通道包括输入端和输出端,所述输入端用于采样显示基板上一部分区域的像素单元的亮度信息,所述输出端用于将采样得到的所述亮度信息传输给与该采样通道相连的采样模块;采样模块用于接收并保存采样通道输入的亮度信息;
第二单元1202,用于依次控制一组采样通道同时开启,使得该组采样通道同时进行亮度信息的采样,并将采样到的所述亮度信息通过该组采样通道的输出端传输给与该组采样通道相连的各采样模块;其中,
在同一时刻打开的采样通道为一组采样通道,每组采样通道中的各采样通道分别与不同的采样模块相连。
可选地,本公开实施例提供的上述采样装置,当所述第一单元收到处理 器发送的采样模式选择信号时,执行控制多个采样模块同时开启的步骤。
可选地,本公开实施例提供的上述采样装置,该装置还包括:校准采样单元;
所述校准采样单元用于:
当第一单元收到处理器发送的校准模式选择信号时,所述多个采样模块依次开启,使得所述多个采样模块能够接收并保存采样通道的输出端的输出信号;
其中,第一单元在控制每一所述采样模块开启后,控制与该采样模块相连的多个采样通道依次开启,使得所述采样通道的输入端依次接收校准源输入的信号,对校准源进行采样;其中,所述校准源用于当控制器收到处理器发送的校准模式选择信号时,给采样通道的输入端提供标准信号。
可选地,本公开实施例提供的上述采样装置,各个所述采样通道的输入端的输入信号相同,均为同一校准源提供的标准信号。
可选地,本公开实施例提供的上述采样装置,所述第一单元、采样模块设置在同一采样芯片中,所述校准采样单元还用于:
当所述第一单元确定所属的采样芯片完成采样后,该所述第一单元向与该第一单元所属的采样芯片级联的下一个采样芯片中的第一单元发送级联控制信号,使得下一个采样芯片中的第一单元控制所述下一个采样芯片中的多个采样模块依次开启。
可选地,本公开实施例提供的上述采样装置,该装置还包括:信息输出单元;
所述信息输出单元用于:
当收到处理器发送的输出指令信号时,控制器控制各个所述采样模块将保存的、来自各个采样通道的信号发送给所述处理器。
基于同一发明构思,如图18所示,本公开实施例提供一种采样控制装置,该装置包括:
第三单元1801,用于判断控制器需要工作的模式;
第四单元1802,用于当所述第三单元确定需要控制器工作在采样模式时,向所述控制器发送采样模式选择信号,使得所述控制器控制多个采样模块同时开启,使得所述控制器控制的多个采样模块能够接收并保存采样通道采样得到的像素单元的亮度信息;其中,每一采样模块与多个采样通道相连,每 一采样通道包括输入端和输出端,所述输入端用于采样显示基板中一部分区域的像素单元的亮度信息,所述输出端用于将采样得到的所述亮度信息传输给与该采样通道相连的采样模块;采样模块用于接收并保存采样通道输入的亮度信息;以及,使得控制器依次控制一组采样通道同时开启,使得该组采样通道同时进行亮度信息的采样,并将采样到的所述亮度信息通过该组采样模块的输出端传输给与该组采样通道相连的各采样模块;其中,在同一时刻打开的采样通道为一组采样通道,每组采样通道中的各采样通道分别与不同的采样模块相连。
可选地,本公开实施例提供的上述采样控制装置,所述第四单元还用于:
当所述第三单元确定需要控制器工作在校准模式时,向所述控制器发送校准模式选择信号,用以使得所述控制器控制所述多个采样模块依次开启,使得所述控制器控制的多个采样模块能够接收并保存采样通道的输出端的输出信号;其中,控制器在控制每一所述采样模块开启后,控制与该采样模块相连的多个采样通道依次开启,使得所述采样通道的输入端依次接收校准源输入的信号,对校准源进行采样;其中,所述校准源用于当控制器收到处理器发送的校准模式选择信号时,给采样通道的输入端提供标准信号。
可选地,本公开实施例提供的上述采样控制装置,该装置还包括:
发送指示单元,用于:
在第一时长后获取控制器控制的采样模块中保存的、来自各个采样通道的采样结果;
向控制器发送输出指令信号,从而获取所述控制器控制的各个所述采样模块保存的各个所述采样通道的输出端的输出信号;
其中,所述第一时长大于或等于所述控制器控制的所有采样模块对应的采样通道完成采样的时长。
可选地,本公开实施例提供的上述采样控制装置,该装置还包括:计算单元;
对于所述控制器工作在校准模式时提供的采样结果,计算单元进行如下校准步骤:
依次接收多个采样模块输入的各个所述采样通道的输出端的输出信号;
根据所述输出信号计算得出所述输出信号的采样均值;
将所述与采样模块相连的各个所述采样通道的输出端的输出信号与所述 采样均值进行比较,并根据比较结果得出该采样模块对应的所述采样通道的校准值;
生成并存储所述校准值与所述采样通道的对应关系表。
可选地,本公开实施例提供的上述采样控制装置,该装置还包括:校准单元;
对于所述驱动芯片工作在采样模式时提供的采样结果,所述校准单元进行如下处理步骤:
在校准值与采样通道的对应关系表中查找所述采样通道对应的预先得到的校准值;
利用所述预先得到的校准值对所述采样通道的采样结果进行校准。
可选地,本公开实施例提供的上述采样控制装置,所述采样均值为对所述输出信号进行正态分布运算得出的均值。
可选地,本公开实施例提供的上述采样控制装置,所述校准值为所述输出信号与所述校准均值的比值。
基于同一发明构思,本公开实施例提供一种采样控制系统,包括上述任一所述的采样装置。
可选地,本公开实施例提供的上述采样控制系统,还包括上述任一所述的采样控制装置。
基于同一发明构思,本公开实施例提供一种显示装置,包括本公开实施例提供的上述的采样控制系统。该显示装置可以为:手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。对于该显示装置的其它必不可少的组成部分均为本领域的普通技术人员应该理解具有的,在此不做赘述,也不应作为对本公开的限制。该显示装置的实施可以参见上述封装结构的实施例,重复之处不再赘述。
综上所述,本公开实施例提供的上述方案,通过同时控制多个采样模块对各采样模块对应的像素单元进行亮度信息的采样,使得在一个采样周期内各采样模块完成对整个显示面板中的像素单元的亮度信息的采样,用以缩短采样像素单元的亮度信息的时间,进而提高了调整像素单元的亮度的速度,提高了显示面板显示画面的亮度均一性;通过在采样模块开始采样之前,控制每一采样模块对该采样模块对应的像素单元进行采样,再与预先设置的标准亮度信息进行比较后进行校准,从而消除采样的误差,提高了采样结果的 精准度。
本领域内的技术人员应明白,本公开的实施例可提供为方法、系统、或计算机程序产品。因此,本公开可采用完全硬件实施例、完全软件实施例、或结合软件和硬件方面的实施例的形式。而且,本公开可采用在一个或多个其中包含有计算机可用程序代码的计算机可用存储介质(包括但不限于磁盘存储器和光学存储器等)上实施的计算机程序产品的形式。
本公开是参照根据本公开实施例的方法、设备(系统)、和计算机程序产品的流程图和/或方框图来描述的。应理解可由计算机程序指令实现流程图和/或方框图中的每一流程和/或方框、以及流程图和/或方框图中的流程和/或方框的结合。可提供这些计算机程序指令到通用计算机、专用计算机、嵌入式处理机或其他可编程数据处理设备的处理器以产生一个机器,使得通过计算机或其他可编程数据处理设备的处理器执行的指令产生用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的装置。
这些计算机程序指令也可存储在能引导计算机或其他可编程数据处理设备以特定方式工作的计算机可读存储器中,使得存储在该计算机可读存储器中的指令产生包括指令装置的制造品,该指令装置实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能。
这些计算机程序指令也可装载到计算机或其他可编程数据处理设备上,使得在计算机或其他可编程设备上执行一系列操作步骤以产生计算机实现的处理,从而在计算机或其他可编程设备上执行的指令提供用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的步骤。
显然,本领域的技术人员可以对本公开进行各种改动和变型而不脱离本公开的精神和范围。这样,倘若本公开的这些改动和变型属于本公开权利要求及其等同技术的范围之内,则本公开也意图包含这些改动和变型在内。
本公开要求于2017年12月15日递交的中国专利申请第201711350617.6号的优先权,在此全文引用上述中国专利申请公开的内容以作为本公开的一部分。

Claims (20)

  1. 一种采样方法,用于对显示基板上设置的像素单元进行采样,该方法包括:
    控制器控制多个采样模块同时开启,使得所述控制器控制的多个采样模块能够接收并保存采样通道采样得到的所述像素单元的亮度信息;和
    控制器依次控制一组采样通道同时开启,使得该组采样通道同时进行亮度信息的采样,并将采样到的所述亮度信息通过该组采样通道的输出端传输给与该组采样通道相连的各采样模块,
    其中,
    每一采样模块与多个采样通道相连,每一采样通道包括输入端和输出端,所述输入端用于采样显示基板上一部分区域的像素单元的亮度信息,所述输出端用于将采样得到的所述亮度信息传输给与该采样通道相连的采样模块,采样模块用于接收并保存采样通道输入的亮度信息,并且
    在同一时刻开启的采样通道为一组采样通道,每组采样通道中的各采样通道分别与不同的采样模块相连。
  2. 根据权利要求1所述的方法,其中,当控制器收到处理器发送的采样模式选择信号时,执行控制多个采样模块同时开启的步骤。
  3. 根据权利要求1或2所述的方法,其中,该方法还包括:
    当控制器收到处理器发送的校准模式选择信号时,控制器控制所述多个采样模块依次开启,使得所述控制器控制的多个采样模块能够接收并保存采样通道的输出端的输出信号;
    其中,控制器在控制每一所述采样模块开启后,控制与该采样模块相连的多个采样通道依次开启,使得所述采样通道的输入端依次接收校准源输入的信号,对校准源进行采样;其中,所述校准源用于当控制器收到处理器发送的校准模式选择信号时,给采样通道的输入端提供标准信号。
  4. 根据权利要求1至3中的任一项所述的方法,其中,所述控制器、采样模块设置在同一采样芯片中,该方法还包括:
    当所述控制器确定所属的采样芯片完成采样后,该所述控制器向与该控制器所属的采样芯片级联的下一个采样芯片中的控制器发送级联控制信号,使得下一个采样芯片中的控制器控制所述下一个采样芯片中的多个采样模块 依次开启。
  5. 一种采样控制方法,该方法包括:
    处理器确定需要控制器工作在采样模式;
    处理器向所述控制器发送采样模式选择信号,用以使得所述控制器控制多个采样模块同时开启,使得所述控制器控制的多个采样模块能够接收并保存采样通道采样得到的像素单元的亮度信息;以及,使得控制器依次控制一组采样通道同时开启,使得该组采样通道同时进行亮度信息的采样,并将采样到的所述亮度信息通过该组采样模块的输出端传输给与该组采样通道相连的各采样模块,
    其中,每一采样模块与多个采样通道相连,每一采样通道包括输入端和输出端,所述输入端用于采样显示基板中一部分区域的像素单元的亮度信息,所述输出端用于将采样得到的所述亮度信息传输给与该采样通道相连的采样模块;采样模块用于接收并保存采样通道输入的亮度信息,并且
    在同一时刻开启的采样通道为一组采样通道,每组采样通道中的各采样通道分别与不同的采样模块相连。
  6. 根据权利要求5所述的方法,其中,该方法还包括:
    处理器确定需要控制器工作在校准模式;
    处理器向所述控制器发送校准模式选择信号,用以使得所述控制器控制所述多个采样模块依次开启,使得所述控制器控制的多个采样模块能够接收并保存采样通道的输出端的输出信号;其中,控制器在控制每一所述采样模块开启后,控制与该采样模块相连的多个采样通道依次开启,使得所述采样通道的输入端依次接收校准源输入的信号,对校准源进行采样;其中,所述校准源用于当控制器收到处理器发送的校准模式选择信号时,给采样通道的输入端提供标准信号。
  7. 根据权利要求5或6所述的方法,其中,该方法还包括:
    处理器在第一时长后获取控制器控制的采样模块中保存的、来自各个采样通道的采样结果;
    处理器向控制器发送输出指令信号,从而获取所述控制器控制的各个所述采样模块保存的各个所述采样通道的输出端的输出信号;
    其中,所述第一时长大于或等于所述控制器控制的所有采样模块对应的采样通道完成采样的时长。
  8. 根据权利要求5至7中的任一项所述的方法,其中,该方法还包括:
    对于所述控制器工作在校准模式时提供的采样结果,处理器进行如下校准步骤:
    依次接收多个采样模块输入的各个所述采样通道的输出端的输出信号;
    根据所述输出信号计算得出所述输出信号的采样均值;
    将所述与采样模块相连的各个所述采样通道的输出端的输出信号与所述采样均值进行比较,并根据比较结果得出该采样模块对应的所述采样通道的校准值;
    生成并存储所述校准值与所述采样通道的对应关系表。
  9. 根据权利要求5至8中的任一项所述的方法,其中,该方法还包括:
    对于所述控制器工作在采样模式时提供的采样结果,处理器进行如下处理步骤:
    在校准值与采样通道的对应关系表中查找所述采样通道对应的预先得到的校准值;
    利用所述预先得到的校准值对所述采样通道的采样结果进行校准。
  10. 一种采样装置,用于对显示基板上设置的像素单元进行采样,该装置包括:
    第一单元,用于控制多个采样模块同时开启,使得所述多个采样模块能够接收并保存采样通道采样得到的所述像素单元的亮度信息;和
    第二单元,用于依次控制一组采样通道同时开启,使得该组采样通道同时进行亮度信息的采样,并将采样到的所述亮度信息通过该组采样通道的输出端传输给与该组采样通道相连的各采样模块,
    其中,
    每一采样模块与多个采样通道相连,每一采样通道包括输入端和输出端,所述输入端用于采样显示基板上一部分区域的像素单元的亮度信息,所述输出端用于将采样得到的所述亮度信息传输给与该采样通道相连的采样模块;采样模块用于接收并保存采样通道输入的亮度信息;并且
    在同一时刻开启的采样通道为一组采样通道,每组采样通道中的各采样通道分别与不同的采样模块相连。
  11. 根据权利要求10所述的装置,其中,当所述第一单元收到处理器发送的采样模式选择信号时,执行控制多个采样模块同时开启的步骤。
  12. 根据权利要求10或11所述的装置,其中,该装置还包括:校准采样单元;
    所述校准采样单元用于:
    当第一单元收到处理器发送的校准模式选择信号时,所述多个采样模块依次开启,使得所述多个采样模块能够接收并保存采样通道的输出端的输出信号;
    其中,第一单元在控制每一所述采样模块开启后,控制与该采样模块相连的多个采样通道依次开启,使得所述采样通道的输入端依次接收校准源输入的信号,对校准源进行采样;其中,所述校准源用于当控制器收到处理器发送的校准模式选择信号时,给采样通道的输入端提供标准信号。
  13. 根据权利要求10至12中的任一项所述的装置,其中,所述第一单元、采样模块设置在同一采样芯片中,所述校准采样单元还用于:
    当所述第一单元确定所属的采样芯片完成采样后,该所述第一单元向与该第一单元所属的采样芯片级联的下一个采样芯片中的第一单元发送级联控制信号,使得下一个采样芯片中的第一单元控制所述下一个采样芯片中的多个采样模块依次开启。
  14. 一种采样控制装置,该装置包括:
    第三单元,用于判断控制器需要工作的模式;
    第四单元,用于当所述第三单元确定需要控制器工作在采样模式时,向所述控制器发送采样模式选择信号,使得所述控制器控制多个采样模块同时开启,使得所述控制器控制的多个采样模块能够接收并保存采样通道采样得到的像素单元的亮度信息;以及
    使得控制器依次控制一组采样通道同时开启,使得该组采样通道同时进行亮度信息的采样,并将采样到的所述亮度信息通过该组采样模块的输出端传输给与该组采样通道相连的各采样模块,
    其中,
    每一采样模块与多个采样通道相连,每一采样通道包括输入端和输出端,所述输入端用于采样显示基板中一部分区域的像素单元的亮度信息,所述输出端用于将采样得到的所述亮度信息传输给与该采样通道相连的采样模块;采样模块用于接收并保存采样通道输入的亮度信息;并且
    在同一时刻开启的采样通道为一组采样通道,每组采样通道中的各采样 通道分别与不同的采样模块相连。
  15. 根据权利要求14所述的装置,其中,所述第四单元还用于:
    当所述第三单元确定需要控制器工作在校准模式时,向所述控制器发送校准模式选择信号,用以使得所述控制器控制所述多个采样模块依次开启,使得所述控制器控制的多个采样模块能够接收并保存采样通道的输出端的输出信号;其中,控制器在控制每一所述采样模块开启后,控制与该采样模块相连的多个采样通道依次开启,使得所述采样通道的输入端依次接收校准源输入的信号,对校准源进行采样;其中,所述校准源用于当控制器收到处理器发送的校准模式选择信号时,给采样通道的输入端提供标准信号。
  16. 根据权利要求14或15所述的装置,其中,该装置还包括:
    发送指示单元,用于:
    在第一时长后获取控制器控制的采样模块中保存的、来自各个采样通道的采样结果;
    向控制器发送输出指令信号,从而获取所述控制器控制的各个所述采样模块保存的各个所述采样通道的输出端的输出信号;
    其中,所述第一时长大于或等于所述控制器控制的所有采样模块对应的采样通道完成采样的时长。
  17. 根据权利要求14至16中的任一项所述的装置,其中,该装置还包括:计算单元;
    对于所述控制器工作在校准模式时提供的采样结果,计算单元进行如下校准步骤:
    依次接收多个采样模块输入的各个所述采样通道的输出端的输出信号;
    根据所述输出信号计算得出所述输出信号的采样均值;
    将所述与采样模块相连的各个所述采样通道的输出端的输出信号与所述采样均值进行比较,并根据比较结果得出该采样模块对应的所述采样通道的校准值;
    生成并存储所述校准值与所述采样通道的对应关系表。
  18. 根据权利要求14至17中的任一项所述的装置,其中,该装置还包括:校准单元;
    对于所述驱动芯片工作在采样模式时提供的采样结果,所述校准单元进行如下处理步骤:
    在校准值与采样通道的对应关系表中查找所述采样通道对应的预先得到的校准值;
    利用所述预先得到的校准值对所述采样通道的采样结果进行校准。
  19. 一种采样控制系统,包括根据权利要求10~13任一所述的采样装置和/或根据权利要求14~18任一所述的采样控制装置。
  20. 一种显示装置,包括根据权利要求19所述的采样控制系统。
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US11233096B2 (en) 2016-02-18 2022-01-25 Boe Technology Group Co., Ltd. Pixel arrangement structure and driving method thereof, display substrate and display device
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KR20210068329A (ko) * 2019-11-29 2021-06-09 선전 구딕스 테크놀로지 컴퍼니, 리미티드 생물특징 데이터 추출 방법, 추출 관리 장치, 생물특징 데이터 검출 장치 및 그의 전자장치

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101266753A (zh) * 2007-03-15 2008-09-17 索尼株式会社 显示装置、其驱动方法、和电子系统
KR20120063049A (ko) * 2010-12-07 2012-06-15 엘지디스플레이 주식회사 유기발광다이오드 표시장치와 그 구동방법
CN104036722A (zh) * 2014-05-16 2014-09-10 京东方科技集团股份有限公司 像素单元驱动电路及其驱动方法、显示装置
CN106297659A (zh) * 2015-06-26 2017-01-04 乐金显示有限公司 有机发光二极管显示器及其驱动方法以及像素单元
CN107016964A (zh) * 2017-04-25 2017-08-04 京东方科技集团股份有限公司 像素电路、其驱动方法和显示装置
CN108198527A (zh) * 2017-12-15 2018-06-22 京东方科技集团股份有限公司 采样方法、采样控制方法、采样装置及采样控制系统

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101859045B (zh) * 2009-04-07 2012-05-09 瀚宇彩晶股份有限公司 输入式显示装置的驱动方法
KR101493226B1 (ko) * 2011-12-26 2015-02-17 엘지디스플레이 주식회사 유기 발광 다이오드 표시 장치의 화소 구동 회로의 특성 파라미터 측정 방법 및 장치
CN103582263B (zh) * 2013-11-14 2015-08-12 上海莱托思电子科技有限公司 一种线性多通道led恒流驱动电路
KR102102251B1 (ko) * 2013-12-24 2020-04-20 엘지디스플레이 주식회사 유기 발광 표시 장치
KR101529005B1 (ko) * 2014-06-27 2015-06-16 엘지디스플레이 주식회사 구동소자의 전기적 특성을 센싱할 수 있는 유기발광 표시장치
KR102334407B1 (ko) * 2014-12-04 2021-12-03 삼성디스플레이 주식회사 유기 발광 표시 장치 및 그 구동 방법
KR102339649B1 (ko) * 2015-08-31 2021-12-16 엘지디스플레이 주식회사 유기 발광 표시장치와 그 구동 방법
KR102465354B1 (ko) * 2015-11-11 2022-11-11 엘지디스플레이 주식회사 유기 발광 표시장치와 그 구동 방법
KR102427553B1 (ko) * 2015-12-01 2022-08-02 엘지디스플레이 주식회사 전류 적분기와 이를 포함하는 유기발광 표시장치
KR102318090B1 (ko) * 2017-08-09 2021-10-26 주식회사 디비하이텍 중첩시간을 이용한 소면적 센싱장치 및 센싱방법
KR102489595B1 (ko) * 2017-12-15 2023-01-17 엘지디스플레이 주식회사 칩 온 필름 및 그를 포함하는 디스플레이 장치

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101266753A (zh) * 2007-03-15 2008-09-17 索尼株式会社 显示装置、其驱动方法、和电子系统
KR20120063049A (ko) * 2010-12-07 2012-06-15 엘지디스플레이 주식회사 유기발광다이오드 표시장치와 그 구동방법
CN104036722A (zh) * 2014-05-16 2014-09-10 京东方科技集团股份有限公司 像素单元驱动电路及其驱动方法、显示装置
CN106297659A (zh) * 2015-06-26 2017-01-04 乐金显示有限公司 有机发光二极管显示器及其驱动方法以及像素单元
CN107016964A (zh) * 2017-04-25 2017-08-04 京东方科技集团股份有限公司 像素电路、其驱动方法和显示装置
CN108198527A (zh) * 2017-12-15 2018-06-22 京东方科技集团股份有限公司 采样方法、采样控制方法、采样装置及采样控制系统

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