WO2019104710A1 - 芯片测试治具、系统以及方法 - Google Patents

芯片测试治具、系统以及方法 Download PDF

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Publication number
WO2019104710A1
WO2019104710A1 PCT/CN2017/114209 CN2017114209W WO2019104710A1 WO 2019104710 A1 WO2019104710 A1 WO 2019104710A1 CN 2017114209 W CN2017114209 W CN 2017114209W WO 2019104710 A1 WO2019104710 A1 WO 2019104710A1
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WIPO (PCT)
Prior art keywords
chip
test
stroke
tested
stage
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Application number
PCT/CN2017/114209
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English (en)
French (fr)
Inventor
袁杰雄
宋海宏
沈丹禹
Original Assignee
深圳市汇顶科技股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 深圳市汇顶科技股份有限公司 filed Critical 深圳市汇顶科技股份有限公司
Priority to PCT/CN2017/114209 priority Critical patent/WO2019104710A1/zh
Publication of WO2019104710A1 publication Critical patent/WO2019104710A1/zh

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26—Testing of individual semiconductor devices

Definitions

  • the present application relates to the field of chip testing technologies, and in particular, to a chip test fixture, system, and method.
  • two sets of hard limit devices are installed on both sides of the clamp in the vertical stroke direction of the test, and the hard limit is used when the substrate with the chip and the base with multiple probes are about to collide.
  • the device first resists the stage to prevent the chip from being crushed.
  • the hard limit device may have a slight error in the stroke or measurement, which may crush the chip. In addition, it will continue to press during overpressure, and the hard limit device will damage the fixture and cause damage to the stage after it has been held against the stage for a long time.
  • the purpose of some embodiments of the present application is to provide a chip test fixture, system and method, which can effectively prevent the chip from being crushed during the test process; at the same time, damage to the test fixture can be avoided.
  • the embodiment of the present application provides a chip test fixture, including a relatively movable stage and a test component, the stage is used for placing at least one chip to be tested, and the test component is used for pressing the chip to be tested for testing;
  • the device further includes at least one of a pressure detecting device and a stroke detecting device; when the chip test fixture includes a pressure detecting device, the pressure detecting device is disposed on the stage corresponding to the position of the chip to be tested, and the pressure detecting device is configured to output the tested
  • the chip is subjected to a pressure value pressed by the test component for the control device to trigger a protection mechanism when determining that the pressure value is abnormal; when the chip test fixture includes a stroke detecting device, the stroke detecting device is fixed on the test component or the stage, and is used for The travel information between the test component and the stage is outputted, so that the control device triggers the protection mechanism when it is determined that the travel information is abnormal.
  • the embodiment of the present application further provides a chip test system, a control device, and the above-mentioned chip test fixture; the control device is connected to the chip test fixture.
  • the embodiment of the present application further provides a chip testing method, which is applied to the above chip testing system.
  • the chip testing method includes: the control device controls the relative movement of the test component and the carrier according to the preset control parameter; and the control device receives the output of the pressure detecting device.
  • the chip to be tested is subjected to a pressure value pressed by the test component, and triggers a protection mechanism when it is determined that the pressure value is abnormal; and/or; the control device receives the travel information between the test component and the stage output by the stroke detecting device, and determines The protection mechanism is triggered when the trip information is abnormal.
  • At least one of the pressure detecting device and the stroke detecting device is added to the chip test fixture according to the prior art; when the pressure detecting device is disposed on the stage corresponding to the position of the chip to be tested, Obtaining a pressure value of the chip to be tested pressed by the test component, if the control device determines If the pressure value is abnormal, the protection mechanism is triggered; when the stroke detecting device is set in the test fixture, the travel information between the test component and the stage can be acquired, and if the control device determines that the travel information is abnormal, the protection mechanism is triggered. Therefore, during the test, the chip can be effectively prevented from being crushed; at the same time, damage to the test fixture can be avoided.
  • the pressure detecting device when the chip test fixture includes a pressure detecting device and a stroke detecting device, the pressure detecting device outputs a pressure value and the stroke detecting device outputs the stroke information, so that the control device triggers protection when it is determined that the correspondence between the pressure value and the stroke information is abnormal.
  • the control device triggers protection when it is determined that the correspondence between the pressure value and the stroke information is abnormal.
  • the chip test fixture when the chip test fixture includes both the pressure detecting device and the stroke detecting device, the pressure value and the stroke information are within the normal range, but the pressure value is relative to the case where only the pressure detecting device or the stroke detecting device is included.
  • the protection mechanism is triggered to further reduce the probability that the chip to be tested is crushed.
  • the pressure detecting device includes a plurality of pressure detecting units; the number of the pressure detecting units is equal to the number of sides of the chip to be tested, and each of the pressure detecting units is respectively disposed on the stage corresponding to the waiting Test the position of each side of the chip.
  • This embodiment provides a specific implementation of the pressure detecting device to facilitate obtaining a more accurate pressure value.
  • the stroke detecting device is a distance sensor. This embodiment provides a specific implementation manner of the stroke detecting device.
  • the stroke detecting device when the chip test fixture includes a stroke detecting device, the stroke detecting device includes a first stroke switch and a second stroke switch; when the stroke detecting device is fixed to the test component, the first stroke switch is in contact When the stage is triggered, the second stroke switch is triggered when contacting the stage; when the stroke detection device is fixed to the stage, the first stroke switch is triggered when it contacts the test assembly, and the second stroke switch is triggered when it contacts the test assembly During the relative movement of the test component and the stage, the first travel switch is triggered first than the second travel switch; the first travel switch is triggered and the second travel switch is not When triggered, the stroke detecting means outputs information characterizing that the stroke state is normal.
  • This embodiment provides a specific implementation of another stroke detecting device.
  • the surface of the stage is covered with a first buffer layer, and the chip to be tested is placed on the first buffer layer.
  • the surface of the stage is covered with a buffer layer to buffer the pressing force of the test component to be tested when an abnormality (at least one of the stroke information and the pressure value) occurs.
  • the test component includes a clamp, a test board fixed to the clamp, and at least one elastic test head, the number of the elastic test heads is equal to the number of chips to be tested; the elastic test head is mounted on the test board, and The chip to be tested is contacted with the chip to be tested for testing.
  • This embodiment provides a specific implementation manner of a test component.
  • the test component further includes at least one limit block mounted on the fixture and facing the stage, the stroke detecting device is mounted on the limit block and facing the stage, or the stroke detecting device is installed at On the stage and facing the limit block, the travel information is the travel information between the limit block and the stage.
  • the stroke detecting device is installed in the limiting block, and the distance detecting block can obtain more accurate travel information under the same precision condition, because the distance between the limiting block and the loading table is relatively close;
  • the stroke detecting device is combined with the limiting block to provide signal monitoring and physical structure protection for the chip to be tested, further preventing it from being crushed.
  • the elastic test head is mounted on the test board through the second buffer layer.
  • a second buffer layer is disposed between the elastic test head and the test board to buffer the pressing force of the elastic test head to be tested when an abnormality occurs.
  • the elastic test head includes a socket fixed to the test board and a plurality of elastic probes; the first ends of the elastic probes are respectively fixed to the socket, and the second end of each elastic probe protrudes from the socket And used to contact the chip to be tested.
  • This embodiment provides a specific implementation manner of an elastic test head.
  • the surface of the socket facing the stage is provided with a receiving groove, and the third buffer layer is fixed in the receiving groove, and the first end of each elastic probe is fixed by the third buffer layer. socket.
  • the first end of each elastic probe is fixed to the socket through the third buffer layer to buffer the pressing force of the elastic probe to be tested when the elastic probe fails to expand and contract.
  • the surface of the socket facing the stage is covered with a fourth buffer layer.
  • the squeezing force of the socket to be tested is buffered.
  • the limit block and the fixture are installed in a spiral progressive manner.
  • the vertical expansion and contraction amount of the limiting block is converted into a rotating scale, and the length of the limiting block can be adjusted at any time without changing the fixture to meet the testing requirements of different types of chips.
  • the chip test fixture further includes a support frame and a first driving device, the first driving device is fixed to the support frame and connected to the test component; and the first driving device is configured to drive the test component to move toward the stage .
  • the chip test fixture further includes a device for driving the strip chip. a transmission mechanism and a second driving device connected to the transmission mechanism, wherein the second driving device is configured to drive the movement of the transmission mechanism and drive the strip chip to move relative to the testing component; wherein, the plurality of groups of the chips to be tested in the strip chip are sequentially tested .
  • This embodiment provides a specific type of the chip to be tested and a specific driving manner of the chip to be tested.
  • the protection mechanism includes: the brake chip test fixture or the control chip test fixture returns to the initial position; and/or the alarm device in the control chip test system performs an alarm.
  • This embodiment provides a specific implementation manner of the protection mechanism.
  • the correspondence between the pressure value and the stroke information is abnormal, which is a finger pressure.
  • the correspondence between the force value and the travel information and the preset relationship between the pressure value and the travel information do not match; when the chip test fixture is the above-mentioned chip test fixture, the preset relationship between the pressure value and the preset relationship of the travel information is preset.
  • the method includes: the control device controls the test component to move relative to the stage; and when the control device determines that the pressure value output by the pressure detecting device matches the preset pressure value, determines whether the stroke information output by the stroke detecting device meets the preset condition; If the preset condition is not met, the control device generates an adjustment prompt signal to remind the tester to adjust the length of the limit block to extend the clamp; and determine again whether the travel information output by the stroke detection device satisfies the preset condition; if the travel information satisfies the preset condition And establishing a correspondence between the pressure value and the travel information to generate a preset correspondence relationship; and recording the current control parameter of the control device as the preset control parameter.
  • This embodiment provides a setting manner of a preset correspondence relationship.
  • FIG. 1 is a schematic cross-sectional view of a chip test fixture according to a first embodiment of the present application
  • FIG. 2 is a schematic view of a test assembly and a stage in a first embodiment according to the present application
  • FIG. 3 is a schematic cross-sectional view of a chip test fixture according to a second embodiment of the present application.
  • FIG. 4 is a cross-sectional view of a chip test fixture in a third embodiment of the present application.
  • 5a is a schematic view of covering a surface of a stage with a first buffer layer according to a fourth embodiment of the present application.
  • FIG. 5b is a schematic diagram of the elastic test head installed on the test board through the second buffer layer according to the fourth embodiment of the present application;
  • 5c is a schematic diagram of fixing a third buffer layer in a receiving groove of a socket according to a fourth embodiment of the present application.
  • 5d is a schematic diagram of the surface of the socket facing the stage covered with the fourth buffer layer according to the fourth embodiment of the present application;
  • FIG. 6 is a block schematic diagram of a chip test system in accordance with a fifth embodiment of the present application.
  • FIG. 7 is a specific flowchart of a chip testing method in a sixth embodiment of the present application.
  • FIG. 8 is a specific flowchart of a preset manner of a preset correspondence relationship according to a seventh embodiment of the present application.
  • the first embodiment of the present application relates to a chip test fixture for testing a chip to be tested
  • the chip test fixture includes a relatively movable stage and a test component, and the stage is used for placing at least one chip to be tested, and the test component For pressing the chip to be tested for testing
  • the chip test fixture further includes at least one of a pressure detecting device and a stroke detecting device; when the chip testing fixture includes a pressure detecting device, the pressure detecting device is disposed on the stage corresponding to The position of the chip to be tested is used for outputting the pressure value of the chip to be tested pressed by the test component, so that the control device triggers the protection mechanism when determining that the pressure value is abnormal; when the chip test fixture includes the stroke detecting device, the stroke detection
  • the device is fixed on the test component or the stage, and is used for outputting the travel information between the test component and the stage, so that the control device triggers the protection mechanism when it is determined that the travel information is abnormal.
  • At least one of the pressure detecting device and the stroke detecting device is added to the chip test fixture according to the prior art; when the pressure detecting device is disposed on the stage corresponding to the position of the chip to be tested, the method can be obtained.
  • the chip to be tested is subjected to the pressure value pressed by the test component, and if the control device determines that the pressure value is abnormal, the protection mechanism is triggered; when the stroke detecting device is set in the test fixture, the travel information between the test component and the stage can be obtained, if When the control device determines that the travel information is abnormal, the protection mechanism is triggered. Therefore, during the test, the chip can be effectively prevented from being crushed; at the same time, damage to the test fixture can be avoided.
  • the chip test fixture in this embodiment is used for testing the chip to be tested 2, and the chip 2 to be tested in this embodiment is each chip in the strip chip;
  • the strip chip includes a plurality of sets of chips to be tested, and each set of chips to be tested includes a plurality of chips 2 to be tested, wherein a plurality of chips 2 to be tested in the same group of chips to be tested are simultaneously tested.
  • the chip test fixture in this embodiment is applied to the test of the strip chip, and the following description is taken as an example; however, the type of the chip to be tested in this embodiment is not limited.
  • the chip test fixture includes a relatively moving stage 1 and a test assembly. Specifically, the strip chip is placed on the stage 1.
  • the strip chip includes a substrate 3 and six sets of chips to be tested disposed on the substrate 3. Each set of chips to be tested includes three chips 2 to be tested. It should be noted that, in FIG. 1 and FIG. 2, only the number of chipsets to be tested included in the strip chip and the number of chips to be tested in each group of chips to be tested are schematically illustrated. However, this embodiment does not impose any limitation.
  • the test assembly includes a clamp 4, a test board 5 fixed to the clamp 4, and at least one elastic test head.
  • the number of elastic test heads is equal to the number of the chips 2 to be tested; in this embodiment, the number of elastic test heads is The number of chips 2 to be tested in a group of chips to be tested is equal, that is, the number of elastic test heads is also three.
  • the elastic test head is mounted on the test board 5 and is used to contact the chip 2 to be tested to test the chip 2 to be tested.
  • the elastic test head includes a socket 61 fixed to the test board 5 and a plurality of elastic probes 62. The first ends of the elastic probes 62 are respectively fixed to the socket 61, and the second ends of the elastic probes 62 protrude from the socket 61. And used for contacting the chip to be tested 2, and testing the chip 2 to be tested.
  • the test assembly further includes at least one stop block 7 mounted on the clamp 4 and facing the stage 1.
  • the chip test fixture further includes a support frame and a first driving device (not shown), the first driving device is fixed to the support frame and connected to the test component; the first driving device is, for example, a stepping motor for driving the test component toward the stage 1 Move, press the chip 2 to be tested for testing.
  • the first driving device is connected to the clamp 4 of the test assembly, and the driving fixture 4 is moved to drive the elastic test head to move toward the stage 1.
  • the elastic test head presses the chip 2 to be tested for testing.
  • the first drive can also be coupled to the stage 1 to drive the stage toward the test assembly.
  • the first driving device is connected to the test component as an example for description.
  • the chip test fixture further includes a transmission mechanism (not shown), the strip chip is placed on the stage; the transmission mechanism is used to drive the strip chip to move, so that each group of the chips to be tested in the strip chip can be sequentially transmitted to The test position is tested; wherein the test position is the position of the stage 1 corresponding to the elastic test head (as shown in FIG. 2, the position of the set of chips to be tested corresponding to the elastic test head).
  • the chip test fixture further includes a second driving device (not shown) connected to the transmission mechanism, and the second driving device is configured to drive the movement of the transmission mechanism, that is, drive the transmission mechanism to drive the strip chip on the conveyor belt relative to the test The component moves.
  • the second driving device drives the transmission mechanism to move the strip chip to move in a preset direction, and the next group of chips to be tested is moved to the test position and is performed. In the test, a plurality of sets of chips to be tested of the strip chip are tested in turn until all the chips to be tested are tested.
  • the chip test fixture further includes at least one of the pressure detecting device 8 and the stroke detecting device 9, which can be specifically classified into the following three cases:
  • the chip test fixture includes a pressure detecting device 8 disposed on the stage 1 corresponding to the position of the chip 2 to be tested. Specifically, a groove is formed on the stage 1 corresponding to the position of the chip 2 to be tested to fix the pressure detecting device 8 in the groove, and the surface of the pressure detecting device 8 is not lower than the surface of the stage.
  • the pressure detecting device 8 is configured to output a pressure value of the chip to be tested pressed by the test component, so that the control device triggers the protection mechanism when it is determined that the pressure value is abnormal. Wherein, the pressure value is abnormally that the pressure value is greater than the preset pressure value. At this time, if the pressing is continued, the chip 2 to be tested may be crushed.
  • the pressure detecting device 8 includes a plurality of pressure detecting units 81, for example, pressure sensors, the number of the pressure detecting units 81 being equal to the number of sides of the chip 2 to be tested, and the respective pressure detecting units 81 are respectively disposed at
  • the position of each side of the stage 1 corresponding to the chip 2 to be tested is, for example, the chip to be tested 2 is rectangular, and there are 4 sides, and the number of the pressure detecting units 81 is 4 (due to the overlap, only 3 in the figure are visible)
  • the elastic probe 62 of the test head presses the pin of the chip 2 to be tested, and the pin of the chip to be tested 2 extends outward from the four sides thereof, so the pressure detecting unit 81 is disposed on the chip to be tested 2
  • the position of each side can obtain a more accurate pressure value.
  • the pressure value may be an average value of the pressure values detected by the four pressure detecting units 81.
  • the present invention is not limited thereto, and may be the median value of the pressure values detected by the four pressure detecting units 81. This is not subject to any restrictions.
  • the number of the pressure detecting units 81 of the pressure detecting device 8 and the position of the pressure detecting unit 81 are not limited, and the pressure detecting unit 81 may be one, and the setting on the stage 1 corresponds to The position of the center point of the chip 2 to be tested.
  • the chip test fixture includes at least one stroke detecting device 9, and the stroke detecting device 9 Mounted on the limiting block 7 and facing the stage 1, or the stroke detecting device 9 is mounted on the stage 1 and facing the limiting block 7, the stroke detecting device 9 is used for outputting the stroke between the test assembly and the stage 1.
  • the trip information is the travel information between the limit block 7 and the stage 5 .
  • the stroke detecting device 9 is a distance sensor which is mounted on the surface of the limiting block 7 facing the stage 1 (this is taken as an example, but not limited thereto), or the loading table 1 corresponds to the upper limit block 7
  • the surface and the travel information are the distance values between the stage 1 and the limit block 7 acquired by the distance sensor.
  • the control device determines that the travel information is abnormal, and triggers the protection mechanism.
  • the control device determines to acquire a set of pressure values and stroke information (That is, the pressure value and the travel information at the same time) trigger the protection mechanism when it is determined that the correspondence between the pressure value and the travel information is abnormal.
  • the stroke detecting device 9 is mounted on the limiting block 7 as an example for description. However, not limited thereto, if the limiting block 7 is not included in the testing component, the stroke detecting device 9 is fixed. On the clamp 4 and facing the stage 1, or fixed on the stage 1 and facing the clamp 4.
  • the stroke detecting device 9 is mounted on the limiting block 7, since the distance between the limiting block 7 and the stage 1 is much larger than the distance between the limiting block 7 and the stage 1, the stroke is under the same precision condition. The distance value obtained by the detecting device 9 is relatively more accurate.
  • the stroke detecting device 9 and the limiting block 7 are combined to provide two kinds of protections, namely information monitoring and physical protection, for the chip to be tested 2 to further prevent it from being crushed.
  • the contact state between the elastic test head and the chip 2 to be tested is as follows:
  • H1 represents the height of the limiting block 7
  • H2 is the thickness of the test board 5
  • H3 is the thickness of the socket 61
  • H4 is the length of the elastic probe 62
  • H0 is the distance between the elastic probe 62 and the substrate 3
  • H5 It is the thickness of the substrate 3 (ie, the chip 2 to be tested).
  • the second embodiment of the present application relates to a chip test fixture.
  • the embodiment is substantially the same as the first embodiment.
  • the main difference is that, referring to FIG. 3, the stroke detecting device 9 in this embodiment includes the first A trip switch 91 and a second trip switch 92.
  • the stroke detecting device 9 includes a first stroke switch 91 and a second stroke switch 92; when the stroke detecting device 9 is fixed to the test assembly, the first stroke switch 91 is triggered when contacting the stage 1, and the second stroke switch 92 is in contact with The stage is triggered; when the stroke detecting device 9 is fixed to the stage 1, the first stroke switch 91 is triggered when it contacts the test assembly, and the second stroke switch 92 is triggered when it contacts the test assembly.
  • the first travel switch 91 is triggered first than the second travel switch 92; when the first travel switch 91 is triggered and the second travel switch 92 is not triggered, the travel information is The information indicating that the stroke state is normal output by the stroke detecting device 9; when the first stroke switch 91 is triggered and the second stroke switch 92 is triggered, the stroke information is information indicating that the stroke state is abnormal by the stroke detecting device 9.
  • the stroke detecting device 9 is mounted on the surface of the limiting block 7 facing the stage 1 (this is exemplified in the figure, but not limited thereto), or the stage 1 corresponds to The upper surface of the limiting block 7.
  • the stroke detecting device 9 includes the first stroke switch 91 and the second stroke switch 92
  • the first stroke switch 91 and the second stroke switch 92 each include a probe and a trigger circuit; and the stroke detecting device 9 is mounted on the limit block. 7 and facing the stage 1 as an example, the length of the probe extension limit block 7 of the first stroke switch 91 is greater than the length of the probe extension limit block 7 of the second stroke switch 92.
  • the first driving device is configured to drive the test component to move toward the stage 1 , that is, during the movement of the limiting block 7 toward the stage 1 , the probe of the first stroke switch 91 first contacts the stage 1 ,
  • the trigger circuit of the one-stroke switch 91 is turned on and the trigger circuit of the second-stroke switch 92 is not turned on, and the stroke detecting device 9 outputs information indicating that the stroke state is normal, and can indicate that the elastic test head is in good contact with the chip to be tested 2;
  • the assembly continues to move toward the stage 1 and the probe and load of the second limit switch 92
  • the stage 1 is in contact with each other.
  • the trigger circuit of the first stroke switch 91 is turned on and the trigger circuit of the second stroke switch 92 is turned on, and the stroke detecting device 9 outputs information indicating the abnormality of the stroke state, which can represent the elastic test head and the test to be tested.
  • the chip 2 is in an overvoltage contact state, and the control device triggers a protection mechanism.
  • first trip switch 91 and the second trip switch 92 both include a probe and a trigger circuit as an example.
  • first trip switch 91 and the second stroke are used in this embodiment.
  • the specific type of switch 92 is not limited in any way.
  • This embodiment provides another implementation of the stroke detecting device with respect to the first embodiment.
  • the third embodiment of the present application relates to a chip test fixture.
  • the embodiment is an improvement on the basis of the first embodiment.
  • the main improvement is that: referring to FIG. 4, in this embodiment, the limit block 7 and the fixture
  • the installation method of 4 is spiral progressive.
  • the chip test fixture needs to be recalibrated, that is, the height of the limit block 7 needs to be adjusted to meet the test requirements.
  • the vertical expansion and contraction amount of the limiting block is converted into a rotating scale, and the length of the limiting block can be adjusted at any time without changing the clamp to meet the testing requirements of different types of chips. It should be noted that the present embodiment can also be refined on the basis of the second embodiment, and the same technical effects can be achieved.
  • the fourth embodiment of the present application relates to a chip test fixture, which is an improvement on the basis of the first embodiment, and the main improvement is that a buffer layer is added on the stage and/or on the elastic test head. .
  • the first buffer layer 11 is covered on the surface of the stage 1, the first slow The punch layer 11 is disposed between the substrate 3 and the stage 1.
  • the first buffer layer 11 may be composed of an elastic material (such as a spring, a spring piece, etc.) or a soft material (such as rubber) to cause an abnormality, that is, when the socket 61 is in contact with the chip 2 to be tested, the first buffer layer 11 Compressed, the buffer socket 61 compresses the chip 2 to be tested to avoid crushing the chip 2 to be tested.
  • the elastic test head is mounted on the test board 7 through the second buffer layer 12, that is, the second buffer layer 12 is disposed between the socket 61 of the elastic test head and the test board 5.
  • the second buffer layer 12 is made of an elastic material, so that when an abnormality occurs, that is, when the socket 61 is in contact with the chip 2 to be tested, the second buffer layer 12 is compressed, and the pressing force of the socket 61 to be tested can be buffered. Avoid crushing the chip 2 to be tested.
  • the socket 61 of the test head 8 is provided with a receiving groove facing the surface of the stage, and a third buffer layer 13 is fixed in the receiving groove, and the first end of each elastic probe 62 is provided. Both are fixed to the socket 61 through the third buffer layer 13.
  • the third buffer layer 13 is made of an elastic material. When the elastic probe 62 fails to expand and contract, the elastic probe 62 compresses the third buffer layer 13 and can buffer the pressing force of the elastic probe 62 to the chip 2 to be tested.
  • the surface of the socket 61 of the test head 8 facing the stage 1 is covered with a fourth buffer layer 14, and each elastic probe 62 passes through the fourth buffer layer 14.
  • the fourth buffer layer 14 is made of a soft material, so that when an abnormality occurs, that is, when the socket 61 is in contact with the chip 2 to be tested, the fourth buffer layer 14 is compressed, and the buffer socket 61 compresses the chip 2 to be tested.
  • the chip test fixture may include any one or any combination of the first buffer layer 11, the second buffer layer 12, the third buffer layer 13, and the second buffer layer 14, but this embodiment does not do any limit.
  • a buffer layer is disposed in the chip test fixture relative to the first embodiment.
  • the stroke is abnormal or the elastic probe fails to expand and contract, the probability of the chip to be tested being crushed is further reduced.
  • the present embodiment can also be used as an improvement on the basis of the second embodiment or the third embodiment, and the same technical effects can be achieved.
  • the fifth embodiment of the present application relates to a chip test system for testing a chip to be tested.
  • the chip test system includes a control device and a chip test fixture in any of the first to fourth embodiments, and the control device is connected to the chip test fixture.
  • the control device packs the first host 110, the second host 120, and the test machine 130.
  • the first host 110 is connected to at least one of the first driving device 140, the second driving device 150, and the pressure detecting device 8 and the stroke detecting device 9.
  • the second host 120 is connected to the test board 5 through the test machine 130, and the first host 110 is communicatively coupled to the second host 120.
  • the first host 110 and the second host 120 may each be a personal computer; the test machine 130 is a circuit module including a plurality of test functions.
  • the control device may also be a host, that is, the functions of the first host 110, the second host 120, and the test machine 130 may be integrated into one device.
  • test process is described in detail below, wherein the number of chips to be tested is multiple and the plurality of chips to be tested 2 are a group of chips to be tested in a strip chip, as follows:
  • the first host 110 controls the first driving device 140 to drive the test component to move toward the stage 1 according to the preset control parameter, that is, the elastic test head is moved toward the stage 1 so that the elastic test head moves the preset distance, and the press is in the test.
  • the control parameter is the stroke parameter of the stepping motor.
  • the first host 110 receives the pressure value of the test chip 2 output by the pressure detecting device 8 subjected to the test component (ie, the elastic probe 62 of the elastic test head), and determines The protection mechanism is triggered when the pressure value is abnormal.
  • the first host 110 receives the test component output from the stroke detecting device 9 and the stage 1 (the stroke detecting device 9 is mounted on the limiting block 7 as an example, but The travel information between the limits) and triggers the protection mechanism when it is determined that the travel information is abnormal.
  • the first host 110 When the chip test fixture includes both the pressure detecting device 8 and the stroke detecting device 9, the first host 110 simultaneously receives the pressure value output by the pressure detecting device 8 and the stroke information output by the stroke detecting device 9, and determines the pressure value of the group.
  • the protection mechanism is triggered when the correspondence with the trip information is abnormal.
  • the protection mechanism includes: braking the test fixture or controlling the chip test fixture to return to the initial position; and/or controlling the alarm device in the chip test system to perform an alarm.
  • the protection mechanism specifically includes the following five situations:
  • control chip test fixture returns to the initial position.
  • the alarm device in the control chip test system is alerted.
  • the brake chip test fixture and control the alarm device in the chip test system to alarm
  • control chip test fixture returns to the initial position and controls the alarm device in the chip test system to perform an alarm.
  • the alarm device can be installed on the chip test fixture.
  • the first host 110 determines that the elastic test head is in good contact with the chip under test 2, the first host 110 sends a signal to the second host 120 to notify the second host 120.
  • the test can be started by the second host 120 controlling the test machine 130 to test a set of chips to be tested, including but not limited to voltage, current, power consumption, and the like.
  • the second host 120 sends a signal to the first host 110, and the first host 110 controls the first driving device 140 to drive the test component back to the initial position, and controls the first
  • the second driving device 150 drives the movement of the transmission mechanism to drive the strip chip to move in a predetermined direction, so that the next group of chips to be tested is moved to the test position and tested; the above process is repeated until the plurality of groups of chips to be tested of the strip chip are The test is complete.
  • At least one of the pressure detecting device and the stroke detecting device is added to the chip test fixture according to the prior art; when the pressure detecting device is disposed on the stage corresponding to the position of the chip to be tested, the method can be obtained.
  • the chip to be tested is subjected to the pressure value pressed by the test component, and if the control device determines that the pressure value is abnormal, the protection mechanism is triggered; when the stroke detecting device is set in the test fixture, the travel information between the test component and the stage can be obtained, if When the control device determines that the travel information is abnormal, the protection mechanism is triggered. Therefore, during the test, the chip can be effectively prevented from being crushed; at the same time, damage to the test fixture can be avoided.
  • a sixth embodiment of the present application relates to a chip test method applied to the chip test system of the fifth embodiment.
  • the specific process of the chip test method of this embodiment is shown in FIG. 7.
  • Step 101 The control device controls the relative movement of the test component and the stage according to the preset control parameter.
  • the first host 110 in the control device controls the first driving device 140 to drive the test component to move toward the stage 1 according to the preset control parameter, that is, to drive the elastic test head to move toward the stage 1 so that the elastic test head moves in advance.
  • the preset control parameter is that the control device controls the operating parameters of the first driving device 140.
  • Step 102 The control device receives the pressure value of the chip to be tested outputted by the pressure detecting device and is pressed by the test component, and triggers a protection mechanism when it is determined that the pressure value is abnormal; and/or; the control device receives the test component outputted by the stroke detecting device Trip information between the stations, and when it is determined that the trip information is abnormal Trigger protection mechanism.
  • the first host 110 in the control device receives the test component of the chip under test 2 outputted by the pressure detecting device 8 (ie, the elastic probe 62 of the elastic test head) The pressure value pressed, and triggers the protection mechanism when it is determined that the pressure value is abnormal.
  • the first host 110 in the control device receives the test component output from the stroke detecting device 9 and the stage 1 (for example, the stroke detecting device 9 is mounted on the limiting block 7 as an example,
  • the travel information between the limits is not limited to this, and the protection mechanism is triggered when it is determined that the travel information is abnormal.
  • the first host 110 in the control device simultaneously receives the pressure value output by the pressure detecting device 8 and the stroke information output by the stroke detecting device 9, and determines The protection mechanism is triggered when the correspondence between the pressure value and the travel information is abnormal.
  • At least one of the pressure detecting device and the stroke detecting device is added to the chip test fixture according to the prior art; when the pressure detecting device is disposed on the stage corresponding to the position of the chip to be tested, the method can be obtained.
  • the chip to be tested is subjected to the pressure value pressed by the test component, and if the control device determines that the pressure value is abnormal, the protection mechanism is triggered; when the stroke detecting device is set in the test fixture, the travel information between the test component and the stage can be obtained, if When the control device determines that the travel information is abnormal, the protection mechanism is triggered. Therefore, during the test, the chip can be effectively prevented from being crushed; at the same time, damage to the test fixture can be avoided.
  • the seventh embodiment of the present application relates to a chip testing method.
  • the embodiment is a refinement based on the sixth embodiment.
  • the main refinement is that a preset corresponding to the preset relationship between the pressure value and the travel information is provided. the way.
  • the correspondence between the pressure value and the stroke information is abnormal, which refers to the correspondence between the pressure value and the stroke information, and the pressure value and the stroke information.
  • the preset correspondence does not match.
  • the specific flow of the preset manner of the preset relationship between the pressure value and the travel information in this embodiment is as shown in FIG. 6 , and is applied to the chip test fixture in the third embodiment, and the installation manner of the limit block 7 and the clamp 4 .
  • step 201 the control device controls the relative movement of the test component and the stage.
  • control device controls the first driving device 140 to drive the test assembly to move toward the stage 1, that is, to move the elastic test head toward the stage 1 to press the chip 2 to be tested.
  • Step 202 Determine whether the pressure value output by the pressure detecting device matches the preset pressure value. If yes, go to step 203; if no, go to step 201.
  • the control device determines whether the pressure value output by the pressure detecting device 8 is matched with the preset pressure value; the preset pressure value is the chip to be tested 2 and the elastic probe 62. The amount of pressure that is exposed to good contact. If it is determined that the pressure value outputted by the pressure detecting device 8 matches the preset pressure value, then the process proceeds to step 203; otherwise, the control device controls the first driving device 140 to drive the test component to continue moving toward the stage 1 until the output of the pressure detecting device 8 The pressure value matches the preset pressure value.
  • the pressure value is gradually increased.
  • the judgment of step 202 is negative, it indicates that the pressure value has not reached the preset pressure value, so it is also controlled.
  • the first drive unit 140 drives the test assembly to continue moving toward the stage 1 such that the pressure value gradually increases until it matches the preset pressure value.
  • Step 203 Determine whether the travel information output by the travel detecting device meets the preset condition. If If yes, go to step 204; if no, go to step 205.
  • the trip information output by the stroke detecting device 9 satisfies a preset condition, that is, whether the elastic test head and the chip under test 2 are in good contact state according to the distance value.
  • the stroke information is a distance value between the stage 1 and the limit block 7 acquired by the distance sensor.
  • the distance value obtained by the distance sensor is x
  • the length of the compressed elastic probe 62 is Y.
  • the stroke detecting device 9 When the stroke detecting device 9 includes the first stroke switch 91 and the second stroke switch 92, if the first stroke switch 91 is triggered and the second stroke switch 92 is not triggered, the stroke detecting device 9 outputs information indicating that the stroke state is normal. At this time, it is determined that the stroke information outputted by the stroke detecting device 9 satisfies the preset condition.
  • Step 204 Establish a correspondence between the pressure value and the travel information to generate a preset correspondence relationship; and record that the current control parameter of the control device is a preset control parameter.
  • the preset condition should be understood as the travel information is information indicating that the travel state is normal.
  • a preset correspondence relationship is generated.
  • the elastic test head is in good contact with the chip to be tested 2
  • the current control parameter of the recording control device is pre-
  • the control parameter is set to control the first driving device 140 to drive the test component to move toward the stage 1 according to the preset control parameter during the test, so that the elastic test head is in good contact with the chip 2 to be tested.
  • the stroke detecting device 9 is a distance sensor
  • the pressure value corresponds to the preset of the stroke information at this time.
  • the relationship is a curve.
  • the control device arbitrarily obtains a set of pressure value and distance value data (can be understood as a point coordinate, the pressure value is a traverse coordinate, the distance value is the vertical axis coordinate), and the acquired set of data and presets The points in the corresponding relationship are matched.
  • the two do not match, it is determined that the correspondence between the acquired pressure value and the travel information is abnormal.
  • the difference between the distance value corresponding to the pressure value and the distance value corresponding to the pressure value found in the preset correspondence relationship is obtained by finding the same pressure value in the preset correspondence relationship according to the acquired pressure value.
  • the value is outside the preset range, it is determined that the correspondence between the acquired pressure value and the travel information is abnormal.
  • the preset correspondence relationship between the pressure value and the stroke information at this time may be: the pressure value indicating the good contact state corresponds to the stroke information indicating the normal stroke state. (ie, the first travel switch 91 is triggered and the second travel switch 92 is not triggered); the pressure value characterizing the overvoltage contact state corresponds to the travel information characterizing the travel state abnormality (ie, the first travel switch 91 is triggered and the second travel Switch 92 is triggered).
  • the acquired pressure value does not match the travel information and the preset correspondence, it is determined that the correspondence between the acquired pressure value and the travel information is abnormal.
  • Step 205 the control device generates an adjustment prompt signal to remind the tester to adjust the length of the limit block extending from the clamp.
  • the control device when it is determined whether the travel information output by the stroke detecting device 9 does not match the preset travel information, the control device generates an adjustment prompt signal, and the tester mediates the length of the spiral progressive limit block 7 extending out of the clamp 4, the tester After the adjustment, the process proceeds to step 203, and it is determined again whether the trip information output by the stroke detecting device 9 matches the preset trip information until a preset correspondence relationship is generated; and the current control parameter of the recording control device is the preset control parameter.
  • this embodiment provides a setting manner of a preset correspondence relationship.

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Abstract

一种芯片测试治具、系统以及方法。芯片测试治具包括能够相对移动的载台（1）与测试组件，载台（1）用于放置至少一待测芯片（2），芯片测试治具还包括压力检测装置（8）和行程检测装置（9）的至少其中之一；当芯片测试治具包括压力检测装置（8）时，压力检测装置（8）设置于载台（1）上对应于待测芯片（2）位置，压力检测装置（8）用于输出待测芯片（2）受测试组件按压的压力值，以供控制装置在判定出压力值异常时触发保护机制；当芯片测试治具包括行程检测装置（9）时，行程检测装置（9）固定在测试组件或载台（2）上，且用于输出测试组件与载台（2）之间的行程信息，以供控制装置在判定出行程信息异常时触发保护机制。可以有效避免芯片被压坏；同时，可以避免对测试治具造成损伤。

Description

芯片测试治具、系统以及方法 技术领域
本申请涉及芯片测试技术领域，特别涉及一种芯片测试治具、系统以及方法。
背景技术
随着以手机为代表的电子设备的飞速发展，大幅提升了对指纹、触控、物联网等芯片的需求。为了追求外观的个性化，各大厂商不断将电子设备设计的更加轻薄，条状芯片也随之越做越薄，单颗芯片也越做越小，这也导致条状芯片在物理特性上比较脆弱。因此，在对条状芯片进行测试时，若测试设备的运动行程异常，很容易损坏芯片。
现有的芯片测试治具，在测试的垂直行程方向上，于夹具两边加装两组硬限位装置，在设有芯片的基板与装有多个探针的底座即将碰撞时，硬限位装置先抵住载台，从而防止芯片被压坏。
发明人发现现有技术至少存在以下问题：现有的芯片测试治具中，硬限位装置在行程上或测量上出现细微误差，都可能会压坏芯片。另外，在过压时仍会持续按压，硬限位装置长期与载台抵持后，会损坏夹具并造成载台损伤。
发明内容
本申请部分实施例的目的在于提供一种芯片测试治具、系统以及方法，在测试过程中，可以有效避免芯片被压坏；同时，可以避免对测试治具造成损伤。
本申请实施例提供了一种芯片测试治具，包括能够相对移动的载台与测试组件，载台用于放置至少一待测芯片，测试组件用于按压待测芯片以进行测试；芯片测试治具还包括压力检测装置和行程检测装置的至少其中之一；当芯片测试治具包括压力检测装置时，压力检测装置设置于载台上对应于待测芯片位置，压力检测装置用于输出待测芯片受测试组件按压的压力值，以供控制装置在判定出压力值异常时触发保护机制；当芯片测试治具包括行程检测装置时，行程检测装置固定在测试组件或载台上，且用于输出测试组件与载台之间的行程信息，以供控制装置在判定出行程信息异常时触发保护机制。
本申请实施例还提供了一种芯片测试系统，控制装置、以及上述的芯片测试治具；控制装置连接于芯片测试治具。
本申请实施例还提供了一种芯片测试方法，应用于上述的芯片测试系统，芯片测试方法包括：控制装置根据预设控制参数控制测试组件与载台相对移动；控制装置接收压力检测装置输出的待测芯片受测试组件按压的压力值，并在判定出压力值异常时触发保护机制；和/或；控制装置接收行程检测装置输出的测试组件与载台之间的行程信息，并在判定出行程信息异常时触发保护机制。
本申请实施例相对于现有技术而言，在芯片测试治具中加入压力检测装置和行程检测装置的至少其中之一；当在载台上对应于待测芯片位置设置压力检测装置时，能够获取待测芯片受到测试组件按压的压力值，若控制装置判定 压力值异常，则触发保护机制；当在测试治具中设置行程检测装置时，能够获取测试组件与载台之间的行程信息，若控制装置判定行程信息异常，则触发保护机制。因此，在测试过程中，可以有效避免芯片被压坏；同时，可以避免对测试治具造成损伤。
另外，当芯片测试治具包括压力检测装置和行程检测装置时，压力检测装置输出压力值且行程检测装置输出行程信息，以供控制装置在判断出压力值与行程信息的对应关系异常时触发保护机制。本实施例中，当芯片测试治具同时包括压力检测装置和行程检测装置时，相对于仅包括压力检测装置或行程检测装置的情况，在压力值以及行程信息处于正常范围内时，但压力值与行程信息的对应关系异常时触发保护机制，进一步减小待测芯片被压坏的机率。
另外，当芯片测试治具包括压力检测装置时，压力检测装置包括多个压力检测单元；压力检测单元的数目与待测芯片的边数相等，各压力检测单元分别设置在载台上对应于待测芯片的各边的位置。本实施例提供了一种压力检测装置的具体实现方式，以便于获取更为准确的压力值。
另外，在芯片测试治具中，当芯片测试治具包括行程检测装置时，行程检测装置为距离传感器。本实施例提供了一种行程检测装置的具体实现方式。
另外，在芯片测试治具中，当芯片测试治具包括行程检测装置时，行程检测装置包括第一行程开关和第二行程开关；当行程检测装置固定于测试组件时，第一行程开关在接触载台时被触发，第二行程开关在接触载台时被触发；当行程检测装置固定于载台时，第一行程开关接触测试组件时被触发，第二行程开关在接触测试组件时被触发；在测试组件与载台相对移动的过程中，第一行程开关较第二行程开关先被触发；第一行程开关被触发且第二行程开关未被 触发时，行程检测装置输出表征行程状态正常的信息。本实施例提供了另一种行程检测装置的具体实现方式。
另外，在芯片测试治具中，载台的表面覆盖有第一缓冲层，待测芯片放置在第一缓冲层上。本实施例中，在载台的表面覆盖缓冲层，以在出现异常(行程信息和压力值的至少其中之一)时，缓冲测试组件对待测芯片的挤压力。
另外，在芯片测试治具中，测试组件包括夹具、固定于夹具的测试板以及至少一弹性测试头，弹性测试头的数目与待测芯片数目相等；弹性测试头安装在测试板上，且用于与待测芯片接触以对待测芯片进行测试。本实施例提供了一种测试组件的具体实现方式。
另外，在芯片测试治具中，测试组件还包括安装在夹具上且面对载台的至少一限位块，行程检测装置安装在限位块上且面对载台、或者行程检测装置安装在载台上且面对限位块，行程信息为限位块与载台之间的行程信息。本实施例中，将行程检测装置安装在限位块中，由于限位块与载台之间的距离较近，从而在相同精度条件下，行程检测装置可以获取更精确的行程信息；另外，将行程检测装置与限位块相结合，从而为待测芯片提供了信号监测和物理结构两种防护，进一步防止其被压坏。
另外，在芯片测试治具中，弹性测试头通过第二缓冲层安装在测试板上。本实施例于弹性测试头与测试板之间设置第二缓冲层，以在出现异常时，缓冲弹性测试头对待测芯片的挤压力。
另外，在芯片测试治具中，弹性测试头包括固定于测试板的插座以及多根弹性探针；各弹性探针的第一端分别固定于插座，各弹性探针的第二端伸出插座且用于与待测芯片接触。本实施例提供了一种弹性测试头的具体实现方式。
另外，在芯片测试治具中，插座面对载台的表面开设有容置槽，且容置槽内固定有第三缓冲层，各弹性探针的第一端均通过第三缓冲层固定于插座。本实施例中，将各弹性探针的第一端均通过第三缓冲层固定于插座，以在弹性探针失灵无法伸缩时，缓冲弹性探针对待测芯片的挤压力。
另外，在芯片测试治具中，插座面对载台的表面覆盖有第四缓冲层。本实施例中，以在出现异常时，缓冲插座对待测芯片的挤压力。
另外，在芯片测试治具中，限位块与夹具的安装方式为螺旋渐进式。本实施例中，将限位块的垂直伸缩量转化为旋转的刻度，无需更换夹具便能够随时调节限位块的长度，以满足不同型号芯片的测试需求。
另外，在芯片测试治具中，芯片测试治具还包括支撑架与第一驱动装置，第一驱动装置固定于支撑架且连接于测试组件；第一驱动装置用于驱动测试组件朝向载台移动。
另外，在芯片测试治具中，待测芯片的数目为多个，且多个待测芯片为条状芯片中的一组待测芯片；芯片测试治具还包括用于带动条状芯片运动的传输机构以及连接于传输机构的第二驱动装置，第二驱动装置用于驱动传输机构运动，并带动条状芯片相对于测试组件移动；其中，条状芯片中的多组待测芯片被依次测试。本实施例提供了待测芯片的具体种类以及待测芯片的具体驱动方式。
另外，在芯片测试系统中，保护机制包括：制动芯片测试治具或控制芯片测试治具返回初始位置；和/或，控制芯片测试系统中的报警装置进行报警。本实施例提供了保护机制的具体实现方式。
另外，在芯片测试方法中，压力值与行程信息的对应关系异常，是指压 力值与行程信息的对应关系和压力值与行程信息的预设对应关系不匹配；当芯片测试治具为上述的芯片测试治具时，压力值与行程信息的预设对应关系的预设方式包括：控制装置控制测试组件与载台相对移动；控制装置在判断出压力检测装置输出的压力值与预设压力值匹配时，判断行程检测装置输出的行程信息是否满足预设条件；若行程信息不满足预设条件，控制装置生成调节提示信号，以提醒测试人员调节限位块伸出夹具的长度；并再次判断行程检测装置输出的行程信息是否满足预设条件；若行程信息满足预设条件，建立压力值与行程信息的对应关系，以生成预设对应关系；并记录控制装置的当前控制参数为预设控制参数。本实施例提供了一种预设对应关系的设定方式。
附图说明
一个或多个实施例通过与之对应的附图中的图片进行示例性说明，这些示例性说明并不构成对实施例的限定，附图中具有相同参考数字标号的元件表示为类似的元件，除非有特别申明，附图中的图不构成比例限制。
图1是根据本申请第一实施例中的芯片测试治具的剖面示意图；
图2是根据本申请第一实施例中的测试组件与载台的示意图；
图3是根据本申请第二实施例中的芯片测试治具的剖面示意图；
图4是根据本申请第三实施例中的芯片测试治具的剖面示意图
图5a是根据本申请第四实施例中的在载台的表面覆盖第一缓冲层的示意图；
图5b是根据本申请第四实施例中的弹性测试头通过第二缓冲层安装在测试板上的示意图；
图5c是根据本申请第四实施例中的在插座的容置槽固定第三缓冲层的示意图；
图5d是根据本申请第四实施例中的插座面对载台的表面覆盖有第四缓冲层的示意图；
图6是根据本申请第五实施例中的芯片测试系统的方框示意图；
图7是根据本申请第六实施例中的芯片测试方法的具体流程图；
图8是根据本申请第七实施例中的预设对应关系的预设方式的具体流程图。
具体实施方式
为了使本申请的目的、技术方案及优点更加清楚明白，以下结合附图及实施例，对本申请部分实施例进行进一步详细说明。应当理解，此处所描述的具体实施例仅仅用以解释本申请，并不用于限定本申请。
本申请第一实施例涉及一种芯片测试治具，用于对待测芯片进行测试，芯片测试治具包括能够相对移动的载台与测试组件，载台用于放置至少一待测芯片，测试组件用于按压待测芯片以进行测试；芯片测试治具还包括压力检测装置和行程检测装置的至少其中之一；当芯片测试治具包括压力检测装置时，压力检测装置设置于载台上对应于待测芯片位置，压力检测装置用于输出待测芯片受测试组件按压的压力值，以供控制装置在判定出压力值异常时触发保护机制；当芯片测试治具包括行程检测装置时，行程检测装置固定在测试组件或载台上，且用于输出测试组件与载台之间的行程信息，以供控制装置在判定出行程信息异常时触发保护机制。
本实施例相对于现有技术而言，在芯片测试治具中加入压力检测装置和行程检测装置的至少其中之一；当在载台上对应于待测芯片位置设置压力检测装置时，能够获取待测芯片受到测试组件按压的压力值，若控制装置判定压力值异常，则触发保护机制；当在测试治具中设置行程检测装置时，能够获取测试组件与载台之间的行程信息，若控制装置判定行程信息异常，则触发保护机制。因此，在测试过程中，可以有效避免芯片被压坏；同时，可以避免对测试治具造成损伤。
下面对本实施例的芯片测试治具的实现细节进行具体的说明，以下内容仅为方便理解提供的实现细节，并非实施本方案的必须。
本实施例中的芯片测试治具，请同时参考图1和图2，芯片测试治具用于对待测芯片2进行测试，本实施例中的待测芯片2为条状芯片中的各芯片；条状芯片包括多组待测芯片，每组待测芯片中包含多个待测芯片2，其中，同一组待测芯片中的多个待测芯片2被同时进行测试。本实施例中的芯片测试治具应用于对条状芯片的测试，以下均以此为例进行说明；然本实施例对待测芯片的种类不作任何限制。
芯片测试治具包括相对移动的载台1与测试组件。具体而言，条状芯片放置于载台1上，条状芯片包括基板3以及设置在基板3上的6组待测芯片，每组待测芯片包括3个待测芯片2。需要说明的是，图1、图2中仅示意性描述条状芯片包括的待测芯片组的数目以及每组待测芯片中待测芯片2的数目，然本实施例对此不作任何限制。
测试组件包括夹具4、固定于夹具4的测试板5以及至少一弹性测试头，弹性测试头的数目与待测芯片2数目相等；本实施例中，弹性测试头的数目与 条状芯片的一组待测芯片中的待测芯片2的数目相等，即弹性测试头的数目也为3个。弹性测试头安装在测试板5上，且用于与待测芯片2接触，以对待测芯片2进行测试。其中，弹性测试头包括固定于测试板5的插座61以及多根弹性探针62；各弹性探针62的第一端分别固定于插座61，各弹性探针62的第二端伸出插座61且用于与待测芯片2接触，以对待测芯片2进行测试。
较佳的，测试组件还包括安装在夹具4上且面对载台1的至少一限位块7。
芯片测试治具还包括支撑架与第一驱动装置(图未示)，第一驱动装置固定于支撑架且连接于测试组件；第一驱动装置例如为步进电机用于驱动测试组件朝向载台1移动，按压待测芯片2以进行测试。具体而言，第一驱动装置连接于测试组件的夹具4，驱动夹具4移动，从而带动弹性测试头朝向载台1移动，弹性测试头按压待测芯片2以进行测试。或者，第一驱动装置也可以连接于载台1，以驱动载台朝向测试组件移动。本实施例中以第一驱动装置连接于测试组件为例进行说明。
芯片测试治具还包括传输机构(图未示意)，条状芯片放置于载台上；传输机构用于带动条状芯片运动，以使得条状芯片中的每组待测芯片可以被依次传输至测试位置进行测试；其中，测试位置为载台1对应于弹性测试头的位置(如图2中示意的与弹性测试头对应的一组待测芯片所在的位置)。芯片测试治具还包括连接于传输机构的第二驱动装置(图未示意)，第二驱动装置用于驱动传输机构运动，即，驱动传输机构以带动位于传输带上的条状芯片相对于测试组件移动，在一组待测芯片测试完毕后，第二驱动装置驱动传输机构运动以带动条状芯片按预设方向移动，下一组待测芯片被移动到测试位置并进行 测试，条状芯片的多组待测芯片被依次测试，直至多组待测芯片均测试完毕。
本实施例中，芯片测试治具还包括压力检测装置8和行程检测装置9的至少其中之一，具体可分为以下三种情况：
第一种情况，芯片测试治具包括压力检测装置8，压力检测装置8设置于载台1上对应于待测芯片2的位置。具体来说，在载台1上对应于待测芯片2的位置形成一凹槽，以将压力检测装置8固定在凹槽中，且压力检测装置8的表面不低于载台的表面。压力检测装置8用于输出待测芯片2受测试组件按压的压力值，以供控制装置在判定出压力值异常时触发保护机制。其中，压力值异常为压力值大于预设压力值，此时，若继续按压，则可能压坏待测芯片2。
在一个例子中，压力检测装置8包括多个压力检测单元81，压力检测单元81例如为压力传感器，压力检测单元81的数目与待测芯片2的边数相等，各压力检测单元81分别设置在载台1上对应于待测芯片2的各边的位置，例如，待测芯片2为矩形，有4条边，则压力检测单元81的数目为4个(由于重叠，图中仅可见3个)；测试时，测试头的弹性探针62按压待测芯片2的接脚，而待测芯片2的接脚是从其四条边往外延伸的，因此将压力检测单元81设置在待测芯片2的各边的位置可以获得较为准确的压力值。此时，压力值可以为4个压力检测单元81检测得到的压力值的平均值，然不限于此，也可以是4个压力检测单元81检测得到的压力值的中值，然本实施例对此不作任何限制。
需要说明的是，本实施例对压力检测装置8的压力检测单元81的数量及设置在载台1中的位置不作任何限制，压力检测单元81也可以为一个，设置在载台1上对应于待测芯片2的中心点的位置。
第二种情况，芯片测试治具包括至少一行程检测装置9，行程检测装置9 安装在限位块7上且面对载台1、或者行程检测装置9安装在载台1上且面对限位块7，行程检测装置9用于输出测试组件与载台1之间的行程信息，以供控制装置在判定出行程信息异常时触发保护机制。其中，行程信息为限位块7与载台5之间的行程信息。
行程检测装置9为距离传感器，其安装在限位块7朝向载台1的表面(图中以此为例，然不以此为限)，或者载台1上对应于限位块7的上表面，行程信息为距离传感器获取的载台1与限位块7间的距离值。当该距离值大于预设的距离值时，控制装置判定行程信息异常，触发保护机制。
需要说明的是，本实施例以及之后的实施例中，当芯片测试治具包括行程检测装置9时，均以一个行程检测装置9为例，然本实施例对行程检测装置9的具体数量不作任何限制。
第三种情况，芯片测试治具同时包括压力检测装置8和行程检测装置9时，压力检测装置8输出压力值且行程检测装置9输出行程信息，控制装置判定获取一组压力值以及行程信息(即同一时刻的压力值与行程信息)，在判断出该组压力值与行程信息的对应关系异常时触发保护机制。
需要说明的是，本实施例中以行程检测装置9安装在限位块7上为例进行说明，然不以此为限，若测试组件中不包括限位块7，则行程检测装置9固定在夹具4上且面对载台1、或者固定在载台1上且面对夹具4。当行程检测装置9安装在限位块7上时，由于限位块7与载台1之间的距离远大于限位块7与载台1之间的距离，从而在相同精度条件下，行程检测装置9获取的距离值相对来说更精确。同时，结合行程检测装置9与限位块7，从而为待测芯片2提供了信息监测和物理防护两种防护，进一步防止其被压坏。
在测试过程中，请参考图1，第一驱动装置驱动夹具4从而带动弹性测试头朝向载台1移动时，弹性测试头与待测芯片2的接触状态，具体如下：
1、未压状态，此时弹性测试头的弹性探针62与待测芯片2未接触，无法对待测芯片2进行测试；公式：H1＜H0+H2+H3+H4+H5(弹性探针62未被压缩)，H0＞0。其中，H1表示限位块7的高度、H2为测试板5的厚度、H3为插座61的厚度、H4为弹性探针62的长度、H0为弹性探针62与基板3之间的距离、H5为基板3(即待测芯片2)的厚度。
2、欠压状态：此时弹性测试头的弹性探针62与待测芯片2接触，但若对待测芯片2进行测试，测试误判率偏高；公式：H1＜H2+H3+H6+H5，0.5×H4≤H6≤H4(弹性探针62的压缩长度大于0且小于弹性探针62的长度的一半)，H0＝0。其中，H6表示压缩后的弹性探针62的长度。
3、良好状态：此时弹性测试头的弹性探针62与待测芯片2接触良好，可以对待测芯片2进行测试，测试结果较为准确；公式：H1＜H2+H3+H7+H5，0.1×H4≤H7≤0.5×H4(弹性探针62的压缩长度大于0.1倍的弹性探针62的长度且小于0.9倍的弹性探针62的长度)，H0＝0。其中，H7表示压缩后的弹性探针62的长度。
4、过压状态：此时弹性测试头的弹性探针62与待测芯片2接触过压，可能会损坏芯片，公式：H1＝H2+H3+H8+H5，0≤H8≤0.1×H4(弹性探针62的压缩长度大于0.9倍的弹性探针62的长度且小于弹性探针62的长度)，H0＝0。其中，H8表示压缩后的弹性探针62的长度。
本申请第二实施例涉及一种芯片测试治具，本实施例与第一实施例大致相同，主要不同之处在于：请参考图3，本实施例中的行程检测装置9包括第 一行程开关91和第二行程开关92。
行程检测装置9包括第一行程开关91和第二行程开关92；当行程检测装置9固定于测试组件时，第一行程开关91在接触载台1时被触发，第二行程开关92在接触载台时被触发；当行程检测装置9固定于载台1时，第一行程开关91接触测试组件时被触发，第二行程开关92在接触测试组件时被触发。
在测试组件与载台1相对移动的过程中，第一行程开关91较第二行程开关92先被触发；第一行程开关91被触发且第二行程开关92未被触发时，行程信息则为行程检测装置9输出的表征行程状态正常的信息；第一行程开关91被触发且第二行程开关92被触发时，行程信息则为行程检测装置9输出的表征行程状态异常的信息。
当测试组件中包括限位块7时，行程检测装置9安装在限位块7朝向载台1的表面(图中以此为例，然不以此为限)，或者载台1上对应于限位块7的上表面。
当行程检测装置9包括第一行程开关91和第二行程开关92时，第一行程开关91和第二行程开关92均包括一探针和一触发电路；以行程检测装置9安装在限位块7上且面对载台1为例，第一行程开关91的探针伸出限位块7的长度大于第二行程开关92的探针伸出限位块7的长度。
其中，第一驱动装置用于驱动测试组件朝向载台1移动，即，带动限位块7朝向载台1移动的过程中，第一行程开关91的探针先与载台1相接触，第一行程开关91的触发电路导通且第二行程开关92的触发电路未导通，行程检测装置9输出表征行程状态正常的信息，可以表征弹性测试头与待测芯片2处于良好接触状态；测试组件继续朝向载台1移动，第二行程开关92的探针与载 台1相接触，此时，第一行程开关91的触发电路导通且第二行程开关92的触发电路导通，行程检测装置9输出表征行程状态异常的信息，可以表征弹性测试头与待测芯片2处于过压接触状态，控制装置触发保护机制。
需要说明的是，本实施例中是以第一行程开关91和第二行程开关92均包括一探针和一触发电路为例进行说明，然本实施例对第一行程开关91和第二行程开关92的具体类型不作任何限制。
本实施例相对于第一实施例而言，提供了行程检测装置的另外一种实现方式。
本申请第三实施例涉及一种芯片测试治具，本实施例是在第一实施例基础上的改进，主要改进之处在于：请参考图4，本实施例中，限位块7与夹具4的安装方式为螺旋渐进式。
在对不同厚度的待测芯片2进行测试、更换测试头或更换测试板5时，需要重新对芯片测试治具进行校准，即，需要对限位块7的高度进行调节，以满足测试需求。
本实施例相对于第一实施例而言，将限位块的垂直伸缩量转化为旋转的刻度，无需更换夹具便能够随时调节限位块的长度，以满足不同型号芯片的测试需求。需要说明的是，本实施例也可以作为在第二实施例基础上的细化，可以达到相同的技术效果。
本申请第四实施例涉及一种芯片测试治具，本实施例是在第一实施例基础上的改进，主要改进之处在于：在载台上和/或在弹性测试头上添加了缓冲层。
本实施例中提供了四个例子说明缓冲层的具体设置位置。
第一个例子，请参考图5a，在载台1的表面覆盖第一缓冲层11，第一缓 冲层11设置在基板3与载台1之间。其中，第一缓冲层11可以由弹性材料(比如弹簧、弹片等)或软性材料(比如橡胶)构成，以在出现异常，即，插座61与待测芯片2接触时，第一缓冲层11被压缩，缓冲插座61对待测芯片2的挤压力，避免压坏待测芯片2。
第二个例子，请参考图5b，弹性测试头通过第二缓冲层12安装在测试板7上，即，第二缓冲层12设置在弹性测试头的插座61与测试板5之间。其中，第二缓冲层12由弹性材料构成，以在出现异常，即，插座61与待测芯片2接触时，第二缓冲层12被压缩，能够缓冲插座61对待测芯片2的挤压力，避免压坏待测芯片2。
第三个例子，请参考图5c，测试头8的插座61面对载台的表面开设有容置槽，且容置槽内固定有第三缓冲层13，各弹性探针62的第一端均通过第三缓冲层13固定于插座61。其中，第三缓冲层13由弹性材料构成，在弹性探针62失灵无法伸缩时，弹性探针62压缩第三缓冲层13，能够缓冲弹性探针62对待测芯片2的挤压力。
第四个例子，请参考图5d，测试头8的插座61面对载台1的表面覆盖有第四缓冲层14，各弹性探针62穿过第四缓冲层14。其中，第四缓冲层14由软性材料构成，以在出现异常，即，插座61与待测芯片2接触时，第四缓冲层14被压缩，缓冲插座61对待测芯片2的挤压力。
需要说明的是，芯片测试治具可以包括第一缓冲层11、第二缓冲层12、第三缓冲层13、第二缓冲层14的任意之一或任意组合，然本实施例对此不作任何限制。
本实施例相对于第一实施例而言，于芯片测试治具中设置缓冲层，以在 行程出现异常或弹性探针失灵无法伸缩时，进一步减小待测芯片被压坏的机率。需要说明的是，本实施例也可以作为在第二实施例或第三实施例基础上的改进，可以达到同样的技术效果。
本申请第五实施例涉及一种芯片测试系统，用于对待测芯片进行测试。请参考图6，芯片测试系统包括控制装置以及第一实施例至第四实施例任一实施例中的芯片测试治具，控制装置连接于芯片测试治具。
控制装置包第一主机110、第二主机120以及测试机130。第一主机110连接于第一驱动装置140、第二驱动装置150，以及压力检测装置8和行程检测装置9的至少其中之一。第二主机120通过测试机130连接于测试板5，第一主机110与第二主机120通信连接。其中，第一主机110与第二主机120均可以是个人电脑；测试机130为包含多种测试功能的电路模块。另外，在其他实施例中，控制装置也可以是一个主机，即可以将第一主机110、第二主机120及测试机130的功能集成在一个设备中。
下面对测试过程进行详细介绍，其中，以待测芯片2的数目为多个且多个待测芯片2为条状芯片中的一组待测芯片，具体如下：
1、第一主机110根据预设控制参数控制第一驱动装置140驱动测试组件朝向载台1移动，即，带动弹性测试头朝向载台1移动，使得弹性测试头运动预设距离，按压处于测试位置的一组待测芯片2。例如第一驱动装置140为步进电机，则控制参数为步进电机的行程参数。
当芯片测试治具包括压力检测装置8时，第一主机110接收压力检测装置8输出的待测芯片2受测试组件(即，弹性测试头的弹性探针62)按压的压力值，并在判定出压力值异常时触发保护机制。
当芯片测试治具包括行程检测装置9时，第一主机110接收行程检测装置9输出的测试组件与载台1(以行程检测装置9安装在限位块7上为例，然不以此为限)之间的行程信息，并在判定出行程信息异常时触发保护机制。
当芯片测试治具同时包括压力检测装置8和行程检测装置9时，第一主机110同时接收压力检测装置8输出的压力值且行程检测装置9输出的行程信息，并在判断出该组压力值与行程信息的对应关系异常时触发保护机制。
保护机制包括：制动芯片测试治具或控制芯片测试治具返回初始位置；和/或，控制芯片测试系统中的报警装置进行报警。保护机制具体包括以下五种情况：
第一种情况，制动芯片测试治具。
第二种情况，控制芯片测试治具返回初始位置。
第三种情况，控制芯片测试系统中的报警装置进行报警。
第四种情况，制动芯片测试治具并并控制芯片测试系统中的报警装置进行报警
第五种情况，控制芯片测试治具返回初始位置并控制芯片测试系统中的报警装置进行报警。
其中，当芯片测试系统中包括报警装置时，报警装置可以安装在芯片测试治具上。
2、当弹性测试头运动到预设距离时，第一主机110判定弹性测试头与待测芯片2处于良好接触状态时，第一主机110发送信号到第二主机120，以告知第二主机120可以开始测试；第二主机120控制测试机130对一组待测芯片进行测试，测试项目包括但不限于电压、电流、功耗等。
3、当测试机130完成对该组待测芯片的测试后，第二主机120发送信号到第一主机110，第一主机110控制第一驱动装置140驱动测试组件回到初始位置，并控制第二驱动装置150驱动传输机构运动以带动条状芯片按预设方向移动，使得下一组待测芯片被移动到测试位置，并进行测试；重复上述过程直至条状芯片的多组待测芯片均测试完毕。
本实施例相对于现有技术而言，在芯片测试治具中加入压力检测装置和行程检测装置的至少其中之一；当在载台上对应于待测芯片位置设置压力检测装置时，能够获取待测芯片受到测试组件按压的压力值，若控制装置判定压力值异常，则触发保护机制；当在测试治具中设置行程检测装置时，能够获取测试组件与载台之间的行程信息，若控制装置判定行程信息异常，则触发保护机制。因此，在测试过程中，可以有效避免芯片被压坏；同时，可以避免对测试治具造成损伤。
本申请第六实施例涉及一种芯片测试方法，应用于第五实施例的芯片测试系统。本实施例的芯片测试方法的具体流程如图7所示。
步骤101，控制装置根据预设控制参数控制测试组件与载台相对移动。
具体而言，控制装置中的第一主机110根据预设控制参数控制第一驱动装置140驱动测试组件朝向载台1移动，即，带动弹性测试头朝向载台1移动，使得弹性测试头运动预设距离，按压处于测试位置的待测芯片2。其中，预设控制参数为控制装置控制第一驱动装置140的运行参数。
步骤102，控制装置接收压力检测装置输出的待测芯片受测试组件按压的压力值，并在判定出压力值异常时触发保护机制；和/或；控制装置接收行程检测装置输出的测试组件与载台之间的行程信息，并在判定出行程信息异常时 触发保护机制。
具体而言，当芯片测试治具包括压力检测装置8时，控制装置中的第一主机110接收压力检测装置8输出的待测芯片2受测试组件(即，弹性测试头的弹性探针62)按压的压力值，并在判定出压力值异常时触发保护机制。
当芯片测试治具包括行程检测装置9时，控制装置中的第一主机110接收行程检测装置9输出的测试组件与载台1(以行程检测装置9安装在限位块7上为例，然不以此为限)之间的行程信息，并在判定出行程信息异常时触发保护机制。
当芯片测试治具同时包括压力检测装置8和行程检测装置9时，控制装置中的第一主机110同时接收压力检测装置8输出的压力值且行程检测装置9输出的行程信息，并在判断出该组压力值与行程信息的对应关系异常时触发保护机制。
本实施例相对于现有技术而言，在芯片测试治具中加入压力检测装置和行程检测装置的至少其中之一；当在载台上对应于待测芯片位置设置压力检测装置时，能够获取待测芯片受到测试组件按压的压力值，若控制装置判定压力值异常，则触发保护机制；当在测试治具中设置行程检测装置时，能够获取测试组件与载台之间的行程信息，若控制装置判定行程信息异常，则触发保护机制。因此，在测试过程中，可以有效避免芯片被压坏；同时，可以避免对测试治具造成损伤。
本申请第七实施例涉及一种芯片测试方法，本实施例是在第六实施例基础上的细化，主要细化之处在于：提供了压力值与行程信息的预设对应关系的预设方式。
本实施例中，当芯片测试治具同时包括压力检测装置8和行程检测装置9时，压力值与行程信息的对应关系异常，是指压力值与行程信息的对应关系和压力值与行程信息的预设对应关系不匹配。
本实施例的压力值与行程信息的预设对应关系的预设方式的具体流程如图6所示，应用于第三实施例中的芯片测试治具，限位块7与夹具4的安装方式为螺旋渐进式。
步骤201，控制装置控制测试组件与载台相对移动。
具体而言，控制装置控制第一驱动装置140驱动测试组件朝向载台1移动，即，带动弹性测试头朝向载台1移动，以按压待测芯片2。
步骤202，判断压力检测装置输出的压力值与预设压力值是否匹配。若是，则进入步骤203；若否，则进入步骤201。
具体而言，当弹性测试头按压待测芯片2时，控制装置判断接收到压力检测装置8输出的压力值与预设压力值是否匹配；预设压力值为待测芯片2与弹性探针62处于良好接触状态所受的压力大小。若判断出压力检测装置8输出的压力值与预设压力值匹配，则进入步骤203；否则，控制装置控制第一驱动装置140驱动测试组件继续朝向载台1移动，直至压力检测装置8输出的压力值与预设压力值匹配。
需要说明的是，在弹性测试头按压待测芯片2的过程中，压力值是逐渐增大的，当步骤202的判断为否时，说明压力值还未到达预设压力值，因此还要控制第一驱动装置140驱动测试组件继续朝向载台1移动，使得压力值逐渐增大，直至与预设压力值匹配。
步骤203，判断行程检测装置输出的行程信息是否与满足预设条件。若 是，则进入步骤204；若否，则进入步骤205。
具体而言，判断行程检测装置9输出的行程信息是否满足预设条件，即，根据该距离值判断弹性测试头与待测芯片2是否处于良好接触状态。
当行程检测装置9为距离传感器时，行程信息为距离传感器获取的载台1与限位块7间的距离值。请参考图1，设距离传感器获取的距离值为x，压缩后的弹性探针62的长度为Y，当弹性测试头与待测芯片2接触时，H0＝0，此时，H1+x＝H1+H2+H3+Y+H5，根据该等式可以计算出压缩后的弹性探针62的长度为Y的值，继而，当0.1×H4≤Y≤0.5×H4时，判定行程检测装置9输出的行程信息满足预设条件。此时，该预设条件应当理解为，行程信息为压缩后的弹性探针62的长度Y符合预设长度，该预设长度为0.1×H4≤Y≤0.5×H4。
当行程检测装置9包括第一行程开关91和第二行程开关92时，若第一行程开关91被触发且第二行程开关92未被触发时，行程检测装置9输出的表征行程状态正常的信息时，判定行程检测装置9输出的行程信息满足预设条件。
步骤204，建立压力值与行程信息的对应关系，以生成预设对应关系；并记录控制装置的当前控制参数为预设控制参数。此时，该预设条件应当理解为，行程信息为表征行程状态正常的信息。
具体而言，当判定行程检测装置9输出的行程信息满足预设条件时，生成预设对应关系，此时弹性测试头与待测芯片2处于良好接触状态，记录控制装置的当前控制参数为预设控制参数，以在测试中控制第一驱动装置140按预设控制参数驱动测试组件朝向载台1移动，使得弹性测试头与待测芯片2处于良好接触状态。
当行程检测装置9为距离传感器时，此时压力值与行程信息的预设对应 关系为一条曲线。在测试过程中，控制装置任意获取一组压力值与距离值的数据(可以理解为一个点坐标，压力值为横着坐标，距离值为纵轴坐标)，并将获取的一组数据与预设对应关系中的点进行匹配，当二者不匹配时，判定获取的压力值与行程信息的对应关系异常。举例来说，按照获取压力值在预设对应关系中找出相同压力值的点，当获取的压力值对应的距离值与预设对应关系中找出的该压力值对应的距离值的差值在预设范围外时，判定获取的压力值与行程信息的对应关系异常。
当行程检测装置9包括第一行程开关91和第二行程开关92时，此时压力值与行程信息的预设对应关系可以为：表征良好接触状态的压力值对应于表征行程状态正常的行程信息(即第一行程开关91被触发且第二行程开关92未被触发)；表征过压接触状态的压力值对应于表征行程状态异常的行程信息(即第一行程开关91被触发且第二行程开关92被触发)。当获取的压力值与行程信息与预设对应关系不匹配时，判定获取的压力值与行程信息的对应关系异常。
步骤205，控制装置生成调节提示信号，以提醒测试人员调节限位块伸出夹具的长度。
具体而言，当判定行程检测装置9输出的行程信息是否与预设行程信息不匹配时，控制装置生成调节提示信号，测试人员调解螺旋渐进式限位块7伸出夹具4的长度，测试人员在调节后，进入步骤203，再次判断行程检测装置9输出的行程信息是否与预设行程信息匹配，直至生成预设对应关系；并记录控制装置的当前控制参数为预设控制参数。
本实施例相对于第六实施例而言，提供了一种预设对应关系的设定方式。
本领域的普通技术人员可以理解，上述各实施例是实现本申请的具体实 施例，而在实际应用中，可以在形式上和细节上对其作各种改变，而不偏离本申请的精神和范围。

Claims (20)

  1. 一种芯片测试治具，包括能够相对移动的载台与测试组件，所述载台用于放置至少一待测芯片，所述测试组件用于按压所述待测芯片以进行测试；其特征在于，所述芯片测试治具还包括压力检测装置和行程检测装置的至少其中之一；
    当所述芯片测试治具包括所述压力检测装置时，所述压力检测装置设置于所述载台上对应于所述待测芯片位置，所述压力检测装置用于输出所述待测芯片受所述测试组件按压的压力值，以供控制装置在判定出所述压力值异常时触发保护机制；
    当所述芯片测试治具包括所述行程检测装置时，所述行程检测装置固定在所述测试组件或所述载台上，且用于输出所述测试组件与所述载台之间的行程信息，以供控制装置在判定出所述行程信息异常时触发保护机制。
  2. 如权利要求1所述的芯片测试治具，其特征在于，当所述芯片测试治具包括所述压力检测装置和所述行程检测装置时，所述压力检测装置输出所述压力值且所述行程检测装置输出所述行程信息，以供所述控制装置在判断出所述压力值与所述行程信息的对应关系异常时触发所述保护机制。
  3. 如权利要求1所述的芯片测试治具，其特征在于，当所述芯片测试治具包括所述压力检测装置时，所述压力检测装置包括多个压力检测单元；所述压力检测单元的数目与所述待测芯片的边数相等，各所述压力检测单元分别设置在所述载台上对应于所述待测芯片的各边的位置。
  4. 如权利要求1或2所述的芯片测试治具，其特征在于，当所述芯片测试治具包括所述行程检测装置时，所述行程检测装置为距离传感器。
  5. 如权利要求1或2所述的芯片测试治具，其特征在于，当所述芯片测试治具包括所述行程检测装置时，所述行程检测装置包括第一行程开关和第二行程开关；
    当所述行程检测装置固定于所述测试组件时，所述第一行程开关在接触所述载台时被触发，所述第二行程开关在接触所述载台时被触发；当所述行程检测装置固定于所述载台时，所述第一行程开关接触所述测试组件时被触发，所述第二行程开关在接触所述测试组件时被触发；
    在所述测试组件与所述载台相对移动的过程中，所述第一行程开关较所述第二行程开关先被触发；所述第一行程开关被触发且所述第二行程开关未被触发时，所述行程检测装置输出表征行程状态正常的信息。
  6. 如权利要求1所述的芯片测试治具，其特征在于，所述载台的表面覆盖有第一缓冲层，所述待测芯片放置在所述第一缓冲层上。
  7. 如权利要求1所述的芯片测试治具，其特征在于，所述测试组件包括夹具、固定于所述夹具的测试板以及弹性测试头，所述弹性测试头的数目与所述待测芯片数目相等；所述弹性测试头安装在所述测试板上，且用于与所述待测芯片接触。
  8. 如权利要求7所述的芯片测试治具，其特征在于，所述测试组件还包括安装在所述夹具上且面对所述载台的至少一限位块，所述行程检测装置安装在所述限位块上且面对所述载台、或者所述行程检测装置安装在所述载台上且面对所述限位块，所述行程信息为所述限位块与所述载台之间的行程信息。
  9. 如权利要求7所述的芯片测试治具，其特征在于，所述弹性测试头通过第二缓冲层安装在所述测试板上。
  10. 如权利要求7所述的芯片测试治具，其特征在于，所述弹性测试头包括固定于所述测试板的插座以及多根弹性探针；各所述弹性探针的第一端分别固定于所述插座，各所述弹性探针的第二端伸出所述插座且用于与所述待测芯片接触。
  11. 如权利要求10所述的芯片测试治具，其特征在于，所述插座面对所述载台的表面开设有容置槽，且所述容置槽内固定有第三缓冲层，各所述弹性探针的第一端均通过所述第三缓冲层固定于所述插座。
  12. 如权利要求10所述的芯片测试治具，其特征在于，所述插座面对所述载台的表面覆盖有第四缓冲层。
  13. 如权利要求12所述的芯片测试治具，其特征在于，所述限位块与所述夹具的安装方式为螺旋渐进式。
  14. 如权利要求1所述的芯片测试治具，其特征在于，所述芯片测试治具还包括支撑架与第一驱动装置，所述第一驱动装置固定于所述支撑架且连接于所述测试组件；所述第一驱动装置用于驱动所述测试组件朝向所述载台移动。
  15. 如权利要求14所述的芯片测试治具，其特征在于，所述待测芯片的数目为多个，且多个所述待测芯片为条状芯片中的一组待测芯片；
    所述芯片测试治具还包括用于带动所述条状芯片运动的传输机构以及连接于所述传输机构的第二驱动装置，所述第二驱动装置用于驱动所述传输机构运动，并带动所述条状芯片相对于所述测试组件移动；其中，所述条状芯片中的多组待测芯片被依次测试。
  16. 一种芯片测试系统，其特征在于，包括：控制装置以及如权利要求1至15中任一项所述的芯片测试治具；所述控制装置连接于所述芯片测试治具。
  17. 如权利要求16所述的芯片测试系统，其特征在于，所述保护机制包括：
    制动所述芯片测试治具或控制所述芯片测试治具返回初始位置；
    和/或，控制所述芯片测试系统中的报警装置进行报警。
  18. 一种芯片测试方法，其特征在于，应用于权利要求16或17所述的芯片测试系统，所述芯片测试方法包括：
    所述控制装置根据预设控制参数控制所述测试组件与所述载台相对移动；
    所述控制装置接收所述压力检测装置输出的所述待测芯片受所述测试组件按压的压力值，并在判定出所述压力值异常时触发保护机制；和/或；所述控制装置接收所述行程检测装置输出的所述测试组件与所述载台之间的行程信息，并在判定出所述行程信息异常时触发所述保护机制。
  19. 如权利要求18所述的芯片测试方法，其特征在于，当所述芯片测试治具为如权利要求2所述的芯片测试治具时，所述控制装置接收所述压力检测装置输出的所述压力值与所述行程检测装输出的所述行程信息，并在判断出所述压力值与所述行程信息的对应关系异常时触发所述保护机制。
  20. 如权利要求18所述的芯片测试方法，其特征在于，所述压力值与所述行程信息的对应关系异常，是指所述压力值与所述行程信息的对应关系和压力值与行程信息的预设对应关系不匹配；
    当所述芯片测试治具为如权利要求13所述的芯片测试治具时，压力值与行程信息的所述预设对应关系的预设方式包括：
    所述控制装置控制所述测试组件与所述载台相对移动；
    所述控制装置在判断出所述压力检测装置输出的所述压力值与预设压力值匹配时，判断所述行程检测装置输出的所述行程信息是否满足预设条件；
    若所述行程信息不满足所述预设条件，所述控制装置生成调节提示信号，以提醒测试人员调节所述限位块伸出所述夹具的长度；并再次判断所述行程检测装置输出的行程信息是否满足预设条件；
    若所述行程信息满足所述预设条件，建立所述压力值与所述行程信息的对应关系，以生成所述预设对应关系；并记录所述控制装置的当前控制参数为所述预设控制参数。
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US5574668A (en) * 1995-02-22 1996-11-12 Beaty; Elwin M. Apparatus and method for measuring ball grid arrays
TWI398650B (zh) * 2009-04-20 2013-06-11 Chroma Ate Inc 用以控制點測機之檢測電流導通的裝置及方法
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US5574668A (en) * 1995-02-22 1996-11-12 Beaty; Elwin M. Apparatus and method for measuring ball grid arrays
TWI398650B (zh) * 2009-04-20 2013-06-11 Chroma Ate Inc 用以控制點測機之檢測電流導通的裝置及方法
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