WO2019100800A1

WO2019100800A1 - Method for adjusting uplink rx parameters based on purley platform

Info

Publication number: WO2019100800A1
Application number: PCT/CN2018/103438
Authority: WO
Inventors: 王鹏
Original assignee: 郑州云海信息技术有限公司
Priority date: 2017-11-24
Filing date: 2018-08-31
Publication date: 2019-05-31
Also published as: CN108108275A

Abstract

Provided is a method for adjusting Uplink Rx parameters based on a Purley platform. The method comprises the following steps: stopping the other operations of a CPU, and only responding to a command to modify Rx Eq parameters, and determining a prefix for executing the command to modify the Rx Eq parameters (S1); acquiring states of all the lanes of a current CPU uniPhy part, and confirming a PCIe port number to be adjusted (S2); and acquiring an Rx parameter modification command group and invoking a command in the command group to modify values of corresponding Rx parameters of a PCH end (S3). According to the method, a BIOS needn't be re-written during each modification, and after Rx parameters are modified, a corresponding test of a mainboard can be directly conducted, without re-starting a system, thus improving the work efficiency.

Description

Method for adjusting Uplink Rx parameters based on Purley platform

This application claims the priority of the Chinese Patent Application filed on November 24, 2017, the Chinese Patent Office, the application No. 201711192725.5, and the application of the "Purley Platform-based method for adjusting the Uplink Rx parameters", the entire contents of which are incorporated herein by reference. In the application.

Technical field

The invention relates to the field of computer technology, in particular to a method for adjusting Uplink Rx parameters based on the Purley platform.

Background technique

Intel introduced a new bus in the Purley platform, Uplink, for communication between the CPU and PCH (Platform Controller Hub) to support QAT (Quick Assist Technology) and integrated in PCH. Network features. Uplink works like PCIe Gen3.

At present, the adaptive mechanism of the link from the PCH to the CPU direction is perfect, and the adaptive mechanism on the link from the CPU to the PCH has a problem, and the adaptively derived parameter is not necessarily the optimal parameter of the link, resulting in There is a signal integrity risk on the Uplink link.

The existing solution is to modify the Rx parameters (receiver equalizer parameters) such as CTLE (Continuous Time Linear Equalizer), VGA, TSM (Trust Service Manager) in the BIOS code, and then This version of the BIOS is written to the flash of the machine for testing.

In the prior art solution, each time a set of values is verified, the BIOS needs to be recompiled and flashed once, and the process takes a long time. When the test needs to adjust a plurality of parameter combinations, the test engineer takes more time and checks the efficiency. Very low.

Summary of the invention

The purpose of the present invention is to provide a method for adjusting the Uplink Rx parameters based on the Purley platform, which is used to solve the problem of re-writing the BIOS multiple times when adjusting the Uplink Rx parameters of the PCH terminal.

The technical solution adopted by the present invention to solve the technical problem thereof is: a method for adjusting an Uplink Rx parameter based on the Purley platform, comprising the following steps:

Stop other operations of the CPU, only respond to the command to modify the Rx Eq parameter, and determine the prefix to execute the command to modify the Rx Eq parameter;

Obtain the status of all LANs in the current CPU uniPhy part, and confirm the PCIe port number to be adjusted.

Obtain the Rx parameter modification command group, invoke the command in the command group, and modify the value of the corresponding Rx parameter on the PCH end.

Further, before the step, the method further includes: configuring a motherboard to be tested, connecting an XDP interface of the motherboard to be tested to the PC, and opening a process of the Rx parameter adjustment script on the PC,

Further, the specific process of configuring the motherboard to be tested, connecting the XDP interface of the motherboard to be tested to the PC, and opening the Rx parameter adjustment script on the PC side is:

Install the CPU, memory, and server power on the motherboard to be tested.

Turn on the AC power, and boot into the BIOS setup interface, set the EV DFX feature option to enable, and restart the operating system;

Use the ITP tool to connect the XDP interface of the motherboard to the PC, and open the parameter adjustment script Cscripts on the PC.

Further, after the modifying the corresponding Rx parameter value of the PCH end, the step of ensuring that the Rx parameter modification is valid is further included.

Further, the specific process for ensuring that the Rx parameter modification is effective is:

Get the rate of the Uplink link;

If the uplink link rate is Gen3, the parameter modification is valid.

If the link rate of the uplink is decreased, the corresponding PCIe port is re-enable, and the link rate is re-trained back to Gen3 to make the parameter modification take effect.

Further, the corresponding Rx parameter value of the PCH end includes a CTLE value, a TSM value, and a VGA value of the PCH end.

Further, the CTLE value of the PCH terminal ranges from 0 to 15, the TSM value ranges from 20 to 44, and the VGA value ranges from 0 to 15.

Further, the PTLE end of the Uplink link under the x8 broadband has a CTLE value of 6, a TSM value of 28, and a VGA value of 13.

The effects provided in the Summary of the Invention are merely the effects of the embodiments, and not all of the effects of the invention. One of the above technical solutions has the following advantages or benefits:

1. By calling the command in the command group to modify the corresponding Rx parameter, the corresponding Rx parameter value of the PCH end can be modified. The BIOS can be rewritten without each modification, and after the Rx parameter is modified, the corresponding test of the motherboard can be directly performed. Restart the system to improve work efficiency.

2. After the Rx parameters are modified, check and re-adjust the rate of the uplink link to ensure that the modification of the Rx parameters takes effect, and the reliability of the Rx parameter modification result is guaranteed.

DRAWINGS

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the embodiments or the description of the prior art will be briefly described below. Obviously, the drawings in the following description are only It is an embodiment of the present invention, and those skilled in the art can obtain other drawings according to the provided drawings without any creative work.

1 is a flow chart of a method according to Embodiment 1 of the present invention;

2 is a flow chart of a method according to Embodiment 2 of the present invention;

3 is a flow chart of a method according to Embodiment 3 of the present invention.

Detailed ways

In order to clearly illustrate the technical features of the present solution, the present invention will be described in detail below through the specific embodiments and the accompanying drawings. The following disclosure provides many different embodiments or examples for implementing different structures of the present invention. In order to simplify the disclosure of the present invention, the components and arrangements of the specific examples are described below. Furthermore, the present invention may repeat reference numerals and/or letters in different examples. This repetition is for the purpose of simplicity and clarity, and is not in the nature of the description of the various embodiments and/or arrangements discussed. It is noted that the components illustrated in the drawings are not necessarily drawn to scale. The description of the known components and processing techniques and processes is omitted to avoid unnecessarily limiting the present invention.

As shown in FIG. 1, the process of Embodiment 1 of the method of the present invention includes the following steps:

S1, stop other operations of the CPU, only respond to the command to modify the Rx Eq parameter, and determine the prefix to execute the command to modify the Rx Eq parameter;

S2, obtaining the state of all lanes of the current CPU uniPhy part, and confirming the PCIe port number to be adjusted;

S3: Acquire an Rx parameter modification command group, invoke a command in the command group, and modify a value of a corresponding Rx parameter of the PCH end.

In step S1, by executing the command halt(), the CPU is stopped, so that the CPU only responds to the command to modify the Rx Eq (the Rx parameter is the receiver equalizer parameter, Eq is the abbreviation of Equaliser, meaning the equalizer) parameter, and does not Other calculation operations. Enter the command unistart() to make the command prefixed with uni.

In step S2, the uni.showStatus() command is executed to obtain the status of all lanes of the current CPU uniPhy part and confirm that the uplink link is at the corresponding bandwidth rate, such as the Gen3 rate of the x8 bandwidth, and the PCIe port to be adjusted. (Port) Whether it is in the L0 state (full line operation status), and confirm the status of all lanes of the port, 1 means that the lane is connected, and 0 means that the lane is not connected. Run the pcie.port_map() command to obtain the port number of the port to be adjusted.

In the step S3, the Import LbgUplink command is executed, and the LbgUplink command group is loaded. The command group includes the value of the Rx parameter of the PCH end in the corresponding bandwidth. Therefore, when the Rx parameter adjustment is performed, only the corresponding in the LbgUplink command group is called. The command can be used to modify the Rx parameters and improve work efficiency. The value of the corresponding Rx parameter on the PCH terminal includes the CTLE value, the TSM value, and the VGA value of the PCH terminal. The CTLE value ranges from 0 to 15, the TSM value ranges from 20 to 44, and the VGA value ranges from 0 to 0. ~15. Take the Uplink link under the x8 bandwidth as an example. The CTLE value is 6, the TSM value is 28, and the VGA value is 13.

As shown in FIG. 2, based on the foregoing embodiment, the method embodiment of the present invention includes the following steps:

S0, configure the motherboard to be tested, connect the XDP interface of the motherboard to be tested to the PC, and open the Rx parameter adjustment script on the PC;

The specific implementation process of step S0 is:

S01, installing CPU, memory, and server power on the motherboard to be tested;

S02, turn on the AC power, and boot into the BIOS (Basic Input Output System) setting interface, and EV (Exposure Value) DFX (Design for X is designed for each part of the product life cycle, where X The feature option can be set to enable on behalf of the product life cycle or one of the links, and the operating system is restarted;

S03, use the ITP tool to connect the XDP interface of the motherboard to the PC, and open the parameter adjustment script Cscripts on the PC side.

The process of steps S01-S03 is a process of setting up a parameter modification environment and acquiring an Rx parameter adjustment script Cscripts. In step S03, an Intel ITP (Integration Test Platform) tool is used to connect the XDP interface of the motherboard to the PC.

In step S3, taking the x8 bandwidth as an example, the command LbgUplink.WrCtle(8,6) is called to change the Uplink CTLE value of the x8 bandwidth to 6; the command LbgUplink.WrTsm(8,28) is called, and the Uplink TSM of the x8 bandwidth is used. Change the value to 28; call the command LbgUplink.WrVga(8,13) to change the Uplink VGA value of the x8 bandwidth to 13.

As shown in FIG. 3, the method embodiment 3 of the present invention includes the following steps:

S3, obtaining an Rx parameter modification command group, calling a command in the command group, and modifying a value of a corresponding Rx parameter of the PCH end;

S4, to ensure that the Rx parameter modification is valid.

Step S4 is added to the second embodiment to ensure that the Rx parameter modification is effective. The specific process of implementing step S4 is:

S41. Obtain a rate of an uplink link.

S42. If the uplink link rate is Gen3, the parameter modification is valid.

S43. If the link rate of the uplink is decreased, the corresponding PCIe port is re-enable, and the link rate is re-trained back to Gen3, so that the parameter modification takes effect.

The speed of the Uplink link is obtained by calling the command LbgUplink.RdAll(). If the link rate of the Uplink link is Gen3, the parameter modification is valid and the related test can be directly performed. If the link link rate decreases, the following is reduced to Gen1. Call the commands pcie.linkdisable(0,2) and pcie.linkenable(0,2) to reactivate the corresponding PCIe port and retrain the link rate back to Gen3. Run the LbgUplink.RdAll() command again to confirm that the parameters take effect, and ensure that the modification of the parameters takes effect in step S3, so that the subsequent corresponding test process proceeds smoothly.

The above description is only a preferred embodiment of the present invention, and those skilled in the art can also make several improvements and retouchings without departing from the principles of the present invention. These improvements and retouchings are also considered as The scope of protection of the invention.

Claims

A method for adjusting an Uplink Rx parameter based on the Purley platform, which is characterized by the following steps:

Stop other operations of the CPU, only respond to the command to modify the Rx Eq parameter, and determine the prefix to execute the command to modify the Rx Eq parameter;

Obtain the status of all LANs in the current CPU uniPhy part, and confirm the PCIe port number to be adjusted.

Obtain the Rx parameter modification command group, invoke the command in the command group, and modify the value of the corresponding Rx parameter on the PCH end.
The method of claim 1, further comprising: configuring the motherboard to be tested, connecting the XDP interface of the motherboard to be tested to the PC, and opening the Rx parameter adjustment script on the PC side.
The method according to claim 2, wherein the configuring the motherboard to be tested, connecting the XDP interface of the motherboard to be tested to the PC, and opening the Rx parameter adjustment script on the PC side is:

Install the CPU, memory, and server power on the motherboard to be tested.

Turn on the AC power, and boot into the BIOS setup interface, set the EV DFX feature option to enable, and restart the operating system;

Use the ITP tool to connect the XDP interface of the motherboard to the PC, and open the parameter adjustment script Cscripts on the PC.
The method according to claim 1 or 2, further comprising the step of ensuring that the modification of the Rx parameter is valid after modifying the corresponding Rx parameter value of the PCH terminal.
The method according to claim 4, wherein the specific process of ensuring that the modification of the Rx parameter is valid is:

Get the rate of the Uplink link;

If the uplink link rate is Gen3, the parameter modification is valid.

If the link rate of the uplink is decreased, the corresponding PCIe port is re-enable, and the link rate is re-trained back to Gen3 to make the parameter modification take effect.
The method according to claim 1 or 2 or 5, wherein the corresponding Rx parameter value of the PCH terminal comprises a CTLE value, a TSM value and a VGA value at the PCH end.
The method according to claim 6, wherein the CTLE value of the PCH terminal ranges from 0 to 15, the TSM value ranges from 20 to 44, and the VGA value ranges from 0 to 15.
The method according to claim 7, wherein the PLINK end of the Uplink link under the x8 broadband has a CTLE value of 6, a TSM value of 28, and a VGA value of 13.