CN110069370B - PCH Uplink parameter optimization method and system - Google Patents

PCH Uplink parameter optimization method and system Download PDF

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CN110069370B
CN110069370B CN201910287421.XA CN201910287421A CN110069370B CN 110069370 B CN110069370 B CN 110069370B CN 201910287421 A CN201910287421 A CN 201910287421A CN 110069370 B CN110069370 B CN 110069370B
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margin
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pch
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CN110069370A (en
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吴忠良
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Suzhou Inspur Intelligent Technology Co Ltd
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    • G06—COMPUTING; CALCULATING OR COUNTING
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    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • G06F11/221—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test buses, lines or interfaces, e.g. stuck-at or open line faults
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2273—Test methods

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Abstract

The invention relates to the technical field of communication, and provides a method and a system for optimizing a PCH Uplink parameter, wherein the method comprises the following steps: calling and executing a preconfigured margin test program tool; when the margin test program tool runs, performing corresponding parameter adjustment on a PCH receiving end or/and a CPU signal sending end of the Uplink link; and changing the eye width and the eye height of a margin eye diagram according to the obtained corresponding parameters after the adjustment of the PCH receiving end or/and the CPU signal transmitting end of the Uplink link, thereby realizing the parameter optimization of the PCH receiving end or/and the CPU signal transmitting end of the Uplink link, improving the quality of Uplink link signals and further improving the running stability and performance of the server.

Description

PCH Uplink parameter optimization method and system
Technical Field
The invention belongs to the technical field of communication, and particularly relates to a method and a system for optimizing a PCH Uplink parameter.
Background
The Uplink is a link connection for communication between the PCH and the CPU chip, and what goes by PCIe Gen3 (8 Gbps) signals. Therefore, a signal integrity test is necessary between them, and the existing test method is to perform a PCIe Gen3 signal eye diagram Uplink mark (margin) test at the PCH receiving end. However, in the process of testing the Uplink mark of the server, the phenomenon of low mark is often repeated, which means that the quality of the signal is poor, and related parameters need to be optimized to improve the eye diagram quality of the signal and ensure the integrity of the Uplink PCIe signal.
At present, parameters of a PCH Uplink PCIe Gen3 signal are not adjusted in a margin test, only default parameters initialized in bios are used, the parameters are not adjusted and optimized according to actual conditions of a board card, and the parameters need to be manually adjusted and optimized according to a specific server product. Therefore, at present, the default parameters of the system are directly used in the margin test, and since the default parameters are not optimized parameters, it cannot be guaranteed that the default parameters of the system are optimized parameters of the server Uplink, and the non-optimized parameters may bring negative effects on the stable operation of the server.
Disclosure of Invention
Aiming at the defects in the prior art, the invention provides a PCH Uplink parameter optimization method, aiming at solving the problem that the default parameters of the system are directly used in the margin test in the prior art, and the default parameters of the system cannot be ensured to be the optimized parameters of the Uplink of the server because the default parameters are not the optimized parameters, and the non-optimized parameters can bring negative influence on the stable operation of the server.
The technical scheme provided by the invention is as follows: a PCH Uplink parameter optimization method comprises the following steps:
calling and executing a preconfigured margin test program tool;
when the margin test program tool runs, performing corresponding parameter adjustment on a PCH receiving end or/and a CPU signal sending end of the Uplink link;
and changing the eye width and the eye height of a margin eye diagram according to the obtained corresponding parameters after the PCH receiving end or/and the CPU signal sending end of the Uplink link are/is adjusted.
As a refinement, the method further comprises the following steps:
and a margin test program tool is configured in advance, and the margin test program tool comprises a corresponding parameter of a PCH receiving end of the Uplink link and an adjustment strategy of the corresponding parameter of the CPU signal sending end.
As an improved scheme, the step of performing corresponding parameter adjustment on the PCH receiving end or/and the CPU signal transmitting end of the Uplink link specifically includes the following steps:
selecting a first adjusting parameter of a PCH receiving end, wherein the first adjusting parameter comprises a continuous time linear equalization parameter, a variable gain amplifier parameter and a target signal level;
and freely combining the selected first adjustment parameters of the PCH receiving terminal, and searching to obtain an optimal first parameter combination and a parameter value corresponding to each combination parameter in the first parameter combination.
As an improved scheme, the step of freely combining the selected first adjustment parameters of the PCH receiving end, and searching for an optimal first parameter combination and a parameter value corresponding to each combination parameter in the first parameter combination specifically includes the following steps:
selecting a land with the worst margin from an Uplink PCIe Low margin image;
selecting a preset fixed numerical value corresponding to the first adjustment parameter corresponding to various link wires on the Uplink link;
and taking the selected corresponding fixed numerical value as a test parameter, running the margin test program tool, finding out an optimal first parameter combination, and recording a parameter value corresponding to each combination parameter in the first parameter combination.
As an improved scheme, the step of performing corresponding parameter adjustment on the PCH receiving end or/and the CPU signal transmitting end of the Uplink link specifically includes the following steps:
at a CPU signal transmitting end, closing a transmitting end equalization parameter self-adaptive adjustment mode, wherein the transmitting end equalization parameter comprises a precursor parameter, a curror parameter and a postcuror parameter;
according to the operation result of the margin test program tool, adjusting the combination of the presersor parameter, the cursor parameter and the postcursor parameter, and finding out a transmitting end balance parameter with the largest margin preview;
and determining the sender equalization parameter with the maximum margin preview as a second parameter combination.
Another object of the present invention is to provide a PCH Uplink parameter optimization system, including:
the margin test program tool calling module is used for calling a preconfigured margin test program tool;
the margin test program tool running module is used for running a preconfigured margin test program tool called by the margin test program tool calling module;
the parameter adjusting module is used for carrying out corresponding parameter adjustment on a PCH receiving end or/and a CPU signal sending end of the Uplink link when the margin test program tool runs;
and the eye pattern changing module is used for changing the eye width and the eye height of the margin eye pattern according to the obtained corresponding parameters after the PCH receiving end or/and the CPU signal sending end of the Uplink link are/is adjusted.
As an improvement, the system further comprises:
and the pre-configuration module is used for pre-configuring a margin test program tool, and the margin test program tool comprises a corresponding parameter of a PCH receiving end of the Uplink link and an adjustment strategy of the corresponding parameter of the CPU signal sending end.
As an improved scheme, the parameter adjusting module specifically includes:
the first adjustment parameter selection module is used for selecting a first adjustment parameter of the PCH receiving end, wherein the first adjustment parameter comprises a continuous time linear equalization parameter, a variable gain amplifier parameter and a target signal stage number;
and the free combination module is used for carrying out free combination on the selected first adjustment parameters of the PCH receiving end, and searching to obtain an optimal first parameter combination and a parameter value corresponding to each combination parameter in the first parameter combination.
As an improved scheme, the freely-combined module specifically includes:
the Lane selection module is used for selecting a Lane with the worst margin from an Uplink PCIe Low margin image;
the fixed value selecting module is used for selecting a preset fixed value corresponding to the first adjusting parameter corresponding to each link routing on the Uplink link;
the first parameter combination finding module is used for taking the selected corresponding fixed numerical value as a test parameter, running the margin test program tool and finding out the optimal first parameter combination;
and the parameter value recording module is used for recording the parameter value corresponding to each combination parameter in the first parameter combination.
As an improved scheme, the parameter adjusting module specifically includes:
the self-adaptive adjusting mode closing module is used for closing the self-adaptive adjusting mode of the equalizing parameters of the sending end at the CPU signal sending end, wherein the equalizing parameters of the sending end comprise a precursor parameter, a cursor parameter and a postcursor parameter;
the sending end balance parameter searching module is used for adjusting the combination of the precursor parameter, the cursor parameter and the postcursor parameter according to the operation result of the margin test program tool and finding out the sending end balance parameter with the maximum margin preview;
and the determining module is used for determining the transmitting end equalization parameter with the maximum margin preview as the second parameter combination.
In the embodiment of the invention, a preconfigured margin test program tool is called and executed; when the margin test program tool runs, performing corresponding parameter adjustment on a PCH receiving end or/and a CPU signal sending end of the Uplink link; and changing the eye width and the eye height of a margin eye diagram according to the obtained corresponding parameters after the adjustment of the PCH receiving end or/and the CPU signal transmitting end of the Uplink link, thereby realizing the parameter optimization of the PCH receiving end or/and the CPU signal transmitting end of the Uplink link, improving the quality of Uplink link signals and further improving the running stability and performance of the server.
Drawings
In order to more clearly illustrate the detailed description of the invention or the technical solutions in the prior art, the drawings used in the detailed description or the prior art description will be briefly described below. Throughout the drawings, like elements or portions are generally identified by like reference numerals. In the drawings, elements or portions are not necessarily drawn to scale.
Fig. 1 is a flowchart of an implementation of the PCH Uplink parameter optimization method provided in the present invention;
fig. 2 is a flowchart illustrating an implementation of adjusting parameters of a PCH receiving end or/and a CPU signal transmitting end of an Uplink link according to an embodiment of the present invention;
fig. 3 is a flowchart illustrating an implementation of freely combining the first adjustment parameters of the selected PCH receiving end, searching for an optimal first parameter combination, and obtaining a parameter value corresponding to each combination parameter in the first parameter combination according to the present invention;
fig. 4 is a flowchart illustrating implementation of performing corresponding parameter adjustment on a PCH receiving end or/and a CPU signal transmitting end of an Uplink link according to a second embodiment of the present invention;
fig. 5 is a structural block diagram of a PCH Uplink parameter optimization system provided in the present invention;
fig. 6 is a structural block diagram of a freely combined module provided by the present invention.
Detailed Description
Embodiments of the present invention will be described in detail below with reference to the accompanying drawings. The following examples are merely for illustrating the technical solutions of the present invention more clearly, and therefore are only examples, and the protection scope of the present invention is not limited thereby.
Fig. 1 is a flowchart of an implementation of the PCH Uplink parameter optimization method provided in the present invention, which specifically includes the following steps:
in step S101, a preconfigured margin test program tool is invoked and executed.
In step S102, when the margin test program tool runs, corresponding parameter adjustment is performed on the PCH receiving terminal of the Uplink link or/and the CPU signal transmitting terminal.
In step S103, the eye width and the eye height of the margin eye diagram are changed according to the obtained corresponding parameters adjusted by the PCH receiving end or/and the CPU signal transmitting end of the Uplink link.
In this embodiment, before executing the step S101, the following steps are further included:
and a margin test program tool is configured in advance, and the margin test program tool comprises a corresponding parameter of a PCH receiving end of the Uplink link and an adjustment strategy of the corresponding parameter of the CPU signal sending end.
As shown in fig. 2, the step of performing corresponding parameter adjustment on the PCH receiving end or/and the CPU signal transmitting end of the Uplink link specifically includes the following steps:
in step S201, a first adjustment parameter of the PCH receiving end is selected, where the first adjustment parameter includes a continuous time linear equalization parameter, a variable gain amplifier parameter, and a target signal stage number;
in step S202, the selected first adjustment parameters of the PCH receiving end are freely combined, and an optimal first parameter combination and a parameter value corresponding to each combination parameter in the first parameter combination are obtained by searching.
In this embodiment, the process shown in fig. 2 is a parameter adjustment process of a PCH receiving end of an Uplink link, and the following also includes a parameter adjustment process of a CPU signal transmitting end, which is not described herein again.
In this embodiment, as shown in fig. 3, the step of performing free combination on the first adjustment parameters of the selected PCH receiving end, and searching for an optimal first parameter combination and a parameter value corresponding to each combination parameter in the first parameter combination specifically includes the following steps:
in step S301, selecting a lane with the worst margin from an Uplink PCIe Low margin image;
and finding the land with the worst margin, wherein the land with the worst margin can be selected as the worst land according to the conditions of the test points fail, and the fail points of the land are relatively more.
In step S302, for each link trace on the Uplink link, a pre-configured fixed value corresponding to the first adjustment parameter corresponding thereto is selected;
in this step, after the worst lane is selected, the continuous-time linear equalization parameter CTLE, the variable gain amplifier parameter VGA, and the target signal stage number TSM are adjusted, but in the adjustment process, all of the three parameters need to be tried to find out the optimal parameter, but in order to save time, one lane may be used, and after adjustment, tests are performed on all lanes, specifically:
a) For the Uplink link with short wiring on a PCB (circuit board), the reference recommended value is CTLE:4, VGA;
b) For medium and long chain routing, the reference recommendations are CTLE:5, vga:13, tsm;
c) To reduce time and avoid testing all parameter combinations, one can test the following empirical values:
CTLE:4 VGA:6 TSM:32
CTLE:6 VGA:10 TSM:32
CTLE:6 VGA:6 TSM:32
CTLE:8 VGA:10 TSM:32
CTLE:8 VGA:10 TSM:28。
in step S303, the margin test program tool is operated to find an optimal first parameter combination by using the selected corresponding fixed value as a test parameter, and a parameter value corresponding to each combination parameter in the first parameter combination is recorded.
In this embodiment, a group of parameter combinations with the largest margin is found after the above adjustment, and is imported into bios system software (bios, which may be used to store parameter configurations of the system, the same applies below) to enable the optimized parameters to take effect.
In the embodiment of the present invention, as shown in fig. 4, the step of performing corresponding parameter adjustment on the PCH receiving end or/and the CPU signal transmitting end of the Uplink link specifically includes the following steps:
in step S401, at a CPU signal transmitting end, closing a transmitting end equalization parameter adaptive adjustment mode, where the transmitting end equalization parameter includes a precursor parameter, a cursor parameter, and a postcursor parameter;
in step S402, according to the operation result of the margin test program tool, adjusting the combination of the precursor parameter, cursor parameter, and postcursor parameter, and finding out the sender equalization parameter with the largest margin preview;
in step S403, the sender-side equalization parameter with the largest margin preview is determined as the second parameter combination.
Wherein the found second parameter combinations are imported into the bios system to validate the optimized parameters.
The parameter adjustment process of the CPU signal sending end is given above, and is not described herein again.
Fig. 5 shows a structural block diagram of a PCH Uplink parameter optimization system provided in the present invention, and for convenience of description, only the parts related to the embodiment of the present invention are shown in the diagram.
The PCH Uplink parameter optimization system comprises:
a margin test program tool calling module 11, configured to call a margin test program tool configured in advance;
a margin test program tool running module 12, configured to run a preconfigured margin test program tool called by the margin test program tool calling module;
a parameter adjusting module 13, configured to perform corresponding parameter adjustment on a PCH receiving end or/and a CPU signal transmitting end of the Uplink link when the margin test program tool runs;
and the eye pattern changing module 14 is configured to change the eye width and the eye height of the margin eye pattern according to the obtained corresponding parameters adjusted by the PCH receiving end or/and the CPU signal transmitting end of the Uplink link.
In this embodiment, the system further comprises:
the pre-configuration module 15 is configured to pre-configure a margin test program tool, where the margin test program tool includes an adjustment policy for a corresponding parameter of the PCH receiving end of the Uplink link and a corresponding parameter of the CPU signal transmitting end.
The parameter adjusting module 13 specifically includes:
a first adjustment parameter selection module 16, configured to select a first adjustment parameter of the PCH receiving end, where the first adjustment parameter includes a continuous time linear equalization parameter, a variable gain amplifier parameter, and a target signal stage number;
and the free combination module 17 is configured to perform free combination on the first adjustment parameters of the selected PCH receiving end, and search for an optimal first parameter combination and a parameter value corresponding to each combination parameter in the first parameter combination.
In this embodiment, as shown in fig. 6, the freely-combined module 17 specifically includes:
the Lane selecting module 18 is used for selecting a Lane with the worst margin from an Uplink PCIe Low margin image;
a fixed value selecting module 19, configured to select, for each link trace on the Uplink link, a pre-configured fixed value corresponding to the first adjustment parameter corresponding to the link trace;
a first parameter combination finding module 20, configured to use the selected corresponding fixed value as a test parameter, run the margin test program tool, and find an optimal first parameter combination;
the parameter value recording module 21 is configured to record a parameter value corresponding to each combination parameter in the first parameter combination.
As shown in fig. 5, the parameter adjusting module 13 further specifically includes:
the adaptive adjustment mode closing module 22 is configured to close the adaptive adjustment mode for the transmit end equalization parameter at the transmit end of the CPU signal, where the transmit end equalization parameter includes a precursor parameter, a cursor parameter, and a postcursor parameter;
the sending end equalization parameter searching module 23 is configured to adjust a combination of the precursor parameter, the cursor parameter, and the postcursor parameter according to an operation result of the margin test program tool, and find a sending end equalization parameter with the largest margin preview;
and a determining module 24, configured to determine the sender-side equalization parameter with the largest margin preview as the second parameter combination.
The functions of the modules are described in the above embodiments, and are not described herein again.
In the embodiment of the invention, the quality of an Uplink PCIe signal receiving end is optimized by adjusting RX CTLE, VGA and TSM, and the margin of a margin of an eye diagram is maximized, so that the optimization of signal parameter configuration received by PCH is ensured;
meanwhile, the driving capability of the Uplink PCIe signal sent from the CPU is optimized by using a method for adjusting the parameters of the sending end, the combination parameters of the precursor, the cursor and the postcursor are reasonably adjusted, and the quality of the sent signal is ensured to have no problem. Therefore, the integrity of Uplink link signals is guaranteed on the premise that the whole link is ensured from sending to receiving.
The above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the present invention, and they should be construed as being included in the following claims and description.

Claims (4)

  1. A PCH Uplink parameter optimization method is characterized by comprising the following steps:
    calling and executing a preconfigured margin test program tool;
    when the margin test program tool runs, performing corresponding parameter adjustment on a PCH receiving end or/and a CPU signal sending end of the Uplink link;
    changing the eye width and the eye height of a margin eye diagram according to the obtained corresponding parameters after the PCH receiving end or/and the CPU signal sending end of the Uplink link are adjusted;
    the step of adjusting corresponding parameters of the PCH receiving end or/and the CPU signal transmitting end of the Uplink link specifically includes the following steps:
    selecting a first adjusting parameter of a PCH receiving end, wherein the first adjusting parameter comprises a continuous time linear equalization parameter, a variable gain amplifier parameter and a target signal level;
    freely combining the selected first adjustment parameters of the PCH receiving terminal, and searching to obtain an optimal first parameter combination and a parameter value corresponding to each combination parameter in the first parameter combination;
    the step of freely combining the selected first adjustment parameters of the PCH receiving terminal, and searching for an optimal first parameter combination and a parameter value corresponding to each combination parameter in the first parameter combination specifically includes the following steps:
    selecting a lane with worst margin from an Uplink PCIe Low margin image;
    selecting a preset fixed numerical value corresponding to the first adjustment parameter corresponding to various link wires on the Uplink link;
    taking the selected corresponding fixed numerical value as a test parameter, running the margin test program tool, finding out an optimal first parameter combination, and recording a parameter value corresponding to each combination parameter in the first parameter combination;
    the step of adjusting the corresponding parameters of the PCH receiving terminal or/and the CPU signal transmitting terminal of the Uplink link specifically includes the following steps:
    at a CPU signal transmitting end, closing a transmitting end balance parameter self-adaptive adjustment mode, wherein the transmitting end balance parameters comprise a precursor parameter, a cursor parameter and a postcursor parameter;
    adjusting the combination of the precursor parameter, the cursor parameter and the postcursor parameter according to the operation result of the margin test program tool, and finding out the transmitting terminal balance parameter with the maximum margin preview;
    and determining the sender equalization parameter with the maximum margin preview as a second parameter combination.
  2. 2. The PCH Uplink parameter optimization method according to claim 1, further comprising the steps of:
    and a margin test program tool is configured in advance, and the margin test program tool comprises a corresponding parameter of a PCH receiving end of the Uplink link and an adjustment strategy of the corresponding parameter of the CPU signal sending end.
  3. 3. A PCH Uplink parameter optimization system, comprising:
    the margin test program tool calling module is used for calling a preconfigured margin test program tool;
    the margin test program tool running module is used for running a preconfigured margin test program tool called by the margin test program tool calling module;
    the parameter adjusting module is used for carrying out corresponding parameter adjustment on a PCH receiving end or/and a CPU signal sending end of the Uplink link when the margin test program tool runs;
    the eye diagram changing module is used for changing the eye width and the eye height of the margin eye diagram according to the obtained corresponding parameters after the PCH receiving end or/and the CPU signal sending end of the Uplink link are adjusted;
    the parameter adjusting module specifically comprises:
    the first adjustment parameter selection module is used for selecting a first adjustment parameter of the PCH receiving end, wherein the first adjustment parameter comprises a continuous time linear equalization parameter, a variable gain amplifier parameter and a target signal stage number;
    the free combination module is used for carrying out free combination on the selected first adjustment parameters of the PCH receiving terminal, and searching to obtain an optimal first parameter combination and a parameter value corresponding to each combination parameter in the first parameter combination;
    the freely combined module specifically comprises:
    the Lane selection module is used for selecting a Lane with the worst margin from an Uplink PCIe Low margin image;
    the fixed value selecting module is used for selecting a preset fixed value corresponding to the first adjusting parameter corresponding to each link routing on the Uplink link;
    the first parameter combination finding module is used for taking the selected corresponding fixed numerical value as a test parameter, running the margin test program tool and finding out the optimal first parameter combination;
    the parameter value recording module is used for recording the parameter value corresponding to each combination parameter in the first parameter combination;
    the parameter adjustment module further comprises:
    the self-adaptive adjustment mode closing module is used for closing a self-adaptive adjustment mode of a sending end equalization parameter at a CPU signal sending end, wherein the sending end equalization parameter comprises a precursor parameter, a cursor parameter and a postcursor parameter;
    the sending end balance parameter searching module is used for adjusting the combination of the precursor parameter, the cursor parameter and the postcursor parameter according to the operation result of the margin test program tool and finding out the sending end balance parameter with the maximum margin preview;
    and the determining module is used for determining the transmitting end equalization parameter with the maximum margin preview as the second parameter combination.
  4. 4. The PCH Uplink parameter optimization system according to claim 3, wherein the system further comprises:
    and the pre-configuration module is used for pre-configuring a margin test program tool, and the margin test program tool comprises a corresponding parameter of a PCH receiving end of the Uplink link and an adjustment strategy of the corresponding parameter of the CPU signal sending end.
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