WO2019090839A1 - Oled像素驱动电路、阵列基板及显示装置 - Google Patents

Oled像素驱动电路、阵列基板及显示装置 Download PDF

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Publication number
WO2019090839A1
WO2019090839A1 PCT/CN2017/112595 CN2017112595W WO2019090839A1 WO 2019090839 A1 WO2019090839 A1 WO 2019090839A1 CN 2017112595 W CN2017112595 W CN 2017112595W WO 2019090839 A1 WO2019090839 A1 WO 2019090839A1
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WIPO (PCT)
Prior art keywords
switch
light emitting
drain
emitting diode
source
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PCT/CN2017/112595
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English (en)
French (fr)
Inventor
常勃彪
陈小龙
温亦谦
Original Assignee
深圳市华星光电半导体显示技术有限公司
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Application filed by 深圳市华星光电半导体显示技术有限公司 filed Critical 深圳市华星光电半导体显示技术有限公司
Priority to KR1020207015963A priority Critical patent/KR102316175B1/ko
Priority to US16/755,585 priority patent/US11176884B2/en
Priority to JP2020517491A priority patent/JP6875600B2/ja
Priority to EP17931780.5A priority patent/EP3709365A4/en
Publication of WO2019090839A1 publication Critical patent/WO2019090839A1/zh

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    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G09G3/3241—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element the current through the light-emitting element being set using a data current provided by the data driver, e.g. by using a two-transistor current mirror
    • G09G3/325—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element the current through the light-emitting element being set using a data current provided by the data driver, e.g. by using a two-transistor current mirror the data current flowing through the driving transistor during a setting phase, e.g. by using a switch for connecting the driving transistor to the data driver
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    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
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    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3266—Details of drivers for scan electrodes
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    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
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Definitions

  • the present invention relates to the field of display technologies, and in particular, to an OLED pixel driving circuit, an array substrate, and a display device.
  • OLEDs Organic electroluminescent devices
  • OLEDs have many excellent characteristics such as wide color gamut, high contrast ratio, solid state devices, etc., and thus are becoming more and more competitive in the field of display technology.
  • an array of pixels composed of electronic pixels is provided in a display area of an organic light emitting display, and each pixel unit includes a pixel driving circuit.
  • the conventional 2T1C architecture circuit includes two thin film transistors and one storage capacitor in the circuit, wherein the thin film transistor functioning as a switch connects the data voltage to the gate of the driving thin film transistor in the on state, and stores the data voltage in the circuit.
  • the storage capacitor is such that the driving thin film transistor is always in a conducting state, and when the OLED is in a DC bias state for a long time, the internal ion is polarized to form a built-in electric field, which causes the threshold voltage of the OLED to continuously increase, and the OLED brightness Constantly decreasing, and long-term illumination will shorten the life of the OLED and accelerate the aging of the OLED.
  • the OLED can be in a reverse bias state in a display frame that does not emit light, thereby reducing the built-in electric field strength.
  • each OLED device needs to correspond to one data line, so that the trace of the data line in the OLED panel is doubled, resulting in a decrease in panel aperture ratio.
  • each OLED corresponds to one driving thin film transistor and one storage capacitor, so that the number of storage capacitors in the panel is doubled, resulting in an increase in parasitic capacitance of the panel.
  • the technical problem to be solved by the present invention is to provide an OLED pixel driving circuit, an array substrate and a display device, which can reduce the number of parasitic capacitances and data lines in the panel and improve the aperture ratio of the OLED device.
  • an OLED pixel driving circuit comprising: a driving control unit, a first lighting unit, and a second lighting unit;
  • the driving control unit includes a first switch, a second switch and a storage capacitor; a control end of the second switch is connected to the scan line, a drain of the second switch is connected to the data line, and a source of the second switch is respectively connected to the storage capacitor One end is connected to the control end of the first switch, and the other end of the storage capacitor and the drain of the first switch are connected to the first power source;
  • a source of the first switch is respectively connected to the first light emitting unit and the second light emitting unit, the first light emitting unit and the second light emitting unit are respectively connected to the second power source, and the control end of the first light emitting unit is connected to the first control signal, The control end of the two lighting unit is connected to the second control signal, and the driving control unit, the first control signal and the second control signal control the first lighting unit and the second lighting unit to alternately emit light.
  • the second technical solution adopted by the present invention is to provide an OLED array substrate, the OLED array substrate includes a pixel driving circuit, and the pixel driving circuit includes a driving control unit, a first lighting unit, and a second lighting unit;
  • the driving control unit includes a first switch, a second switch and a storage capacitor; a control end of the second switch is connected to the scan line, a drain of the second switch is connected to the data line, and a source of the second switch is respectively connected to the storage capacitor One end is connected to the control end of the first switch, and the other end of the storage capacitor and the drain of the first switch are connected to the first power source;
  • a source of the first switch is respectively connected to the first light emitting unit and the second light emitting unit, the first light emitting unit and the second light emitting unit are respectively connected to the second power source, and the control end of the first light emitting unit is connected to the first control signal, The control end of the two lighting unit is connected to the second control signal, and the driving control unit, the first control signal and the second control signal control the first lighting unit and the second lighting unit to alternately emit light.
  • the third technical solution adopted by the present invention is to provide an OLED display device, the OLED display device is provided with an OLED array substrate, the OLED array substrate includes a pixel driving circuit, and the pixel driving circuit includes a driving control unit, a light emitting unit and a second light emitting unit;
  • the driving control unit includes a first switch, a second switch and a storage capacitor; a control end of the second switch is connected to the scan line, a drain of the second switch is connected to the data line, and a source of the second switch is respectively connected to the storage capacitor One end is connected to the control end of the first switch, and the other end of the storage capacitor and the drain of the first switch are connected to the first power source;
  • a source of the first switch is respectively connected to the first light emitting unit and the second light emitting unit, the first light emitting unit and the second light emitting unit are respectively connected to the second power source, and the control end of the first light emitting unit is connected to the first control signal, The control end of the two lighting unit is connected to the second control signal, and the driving control unit, the first control signal and the second control signal control the first lighting unit and the second lighting unit to alternately emit light.
  • the present invention enables two OLEDs to alternately emit light by sharing one driving thin film transistor, a storage capacitor and a data line, thereby reducing the OLED lighting time and reducing the panel.
  • the number of parasitic capacitances and data lines increases the aperture ratio of the OLED device and reduces the aging of the OLED device by allowing the OLED to be reverse biased in a display frame that does not emit light, so that the OLED does not need to be in a DC bias state for a long time.
  • the present invention does not externally connect other reverse bias voltages, which reduces the difficulty of the pixel circuit routing and the crosstalk of the bias voltage lines to other signal lines.
  • FIG. 1 is a schematic structural diagram of an OLED pixel driving circuit according to an embodiment of the present invention.
  • FIG. 2 is a circuit timing diagram of an OLED pixel driving circuit according to an embodiment of the present invention.
  • FIG. 3 is a schematic structural diagram of an OLED array substrate according to an embodiment of the present invention.
  • FIG. 1 is a schematic diagram of a specific structure of an OLED pixel driving circuit according to an embodiment of the present invention.
  • the pixel driving circuit provided in this embodiment includes a driving control unit M3, a first lighting unit M1, and a second lighting unit M2.
  • the driving control unit M3 includes a first switch T1, a second switch T2 and a storage capacitor Cst.
  • the control terminal of the second switch T2 is connected to the scan line Vscan, the drain of the second switch T2 is connected to the data line Vdata, and the second switch T2 is connected.
  • the source is connected to one end of the storage capacitor Cst and the control terminal of the first switch T1, and the other end of the storage capacitor Cst and the drain of the first switch T1 are connected to the first power source OVDD.
  • the first switch T1 is a driving thin film transistor in the embodiment, the second switch T2 is for transmitting the data signal Vdata to the source thereof under the control of the scan signal Vscan, and the storage capacitor Cst is for storing the second switch T2.
  • the source of the first switch T1 is connected to the first light emitting unit M1 and the second light emitting unit M2, respectively, and the first light emitting unit M1 and the second light emitting unit M2 are respectively connected to the second power source OVSS, and the control end of the first light emitting unit M1 is connected.
  • the control terminal of the second lighting unit is connected to the second control signal Ctr2.
  • the first light emitting unit M1 in this embodiment specifically includes a third switch T3, a fifth switch T5, a seventh switch T7, a ninth switch T9, and a first light emitting diode OLED1, and an anode connection of the first light emitting diode OLED1 a drain of the third switch T3 and a drain of the seventh switch T7, a cathode of the first light emitting diode OLED1 is connected to a source of the ninth switch T9 and a source of the fifth switch T5, and a drain of the fifth switch T5 is connected to the first power source OVDD, the source of the seventh switch T7 and the drain of the ninth switch T9 are connected to the second power source OVSS.
  • the second light emitting unit M2 specifically includes a fourth switch T4, a sixth switch T6, an eighth switch T8, a tenth switch T10, and a second light emitting diode OLED2.
  • the anode of the second light emitting diode OLED2 is connected to the drain and the fourth of the fourth switch T4.
  • the drain of the eighth switch T8, the cathode of the second light emitting diode OLED2 is connected to the source of the tenth switch T10 and the source of the sixth switch T6, and the drain of the sixth switch T6 is connected to the first power source OVDD, the source of the eighth switch T8
  • the drain of the pole and the tenth switch T10 is connected to the second power source OVSS.
  • the switches mentioned in the above embodiments include P-type and N-type transistor switches.
  • the first switch T1, the second switch T2, the fifth switch T5, the sixth switch T6, the seventh switch T7, and the eighth switch T8 are N-type
  • the tenth switch T10 is P type.
  • the P-type transistor switch is turned on when the control terminal is at a low level, and is turned off when the control terminal is at a high level
  • the N-type transistor switch is turned off when the control terminal is at a low level, and is turned on when the control terminal is at a high level.
  • FIG. 2 is a circuit timing diagram of an OLED pixel driving circuit according to an embodiment of the present invention, which shows changes in level of the scan signal Vscan, the first control signal Ctr1, and the second control signal Ctr2 with time.
  • the level is relative.
  • the operation process of the pixel driving circuit of this embodiment is divided into four phases: a first storage phase A, a first illumination display phase B, a second storage phase C, and a second illumination display phase D.
  • the first storage phase A and the first illumination display phase B constitute a first frame picture
  • the second storage phase C and the second illumination display phase D constitute a second frame picture.
  • the driving control unit, the first control signal and the second control signal of the embodiment jointly control the first lighting unit and the second lighting unit to alternately emit light.
  • the polarity of the level signal output by the first control signal Ctr1 and the second control signal Ctr2 at the same time is opposite, that is, when the first control signal Ctr1 is at a high level, the second control signal Ctr2 is at a low level; When the first control signal Ctr1 is at a low level, the second control signal Ctr2 is at a high level.
  • the timing period of the first control signal Ctr1 and the second control signal Ctr2 is the display time of the adjacent two frames of images.
  • the polarity of the level signal outputted by the first control signal Ctr1 and the second control signal Ctr2 at the same time is only a specific implementation scenario of the present invention.
  • the level signal may also be in other relationships as long as the first illumination unit and the second illumination unit can be alternately illuminated within the scope of the present invention.
  • the voltage value of the first power source OVDD is higher than the voltage value of the second power source OVSS.
  • the voltage value of the first power source OVDD may be set to be a positive voltage
  • the voltage value of the second power source OVSS may be a negative voltage
  • the first power source OVDD may be set.
  • the voltage value is a positive voltage
  • the voltage value of the second power source OVSS is 0V.
  • the scan signal Vscan and the second control signal Ctr2 are at a high level, and the first control signal Ctr1 is at a low level. Since the second switch T2 is N-type, the second switch T2 is turned on at this time, and the data signal Vdata is output to the node S1 under the control of the scan signal Vscan.
  • the storage capacitor Cst is in a charging state, and the first switch T1 is In the off state, the storage capacitor Cst is used to store the level between the node S1 and the first power source OVDD.
  • the third switch T3 and the ninth switch T9 are P-type, the third switch T3 and the ninth switch T9 are turned on, and the fifth switch T5 and the seventh switch T7 are N-type, so the fifth switch T5 and the seventh switch T7 is disconnected. At this time, the first light-emitting diode OLED1 cannot be driven to emit light because the first switch T1 is turned off. Since the fourth switch T4 and the tenth switch T10 are P-type, the fourth switch T4 and the tenth switch T10 are turned off. Since the sixth switch T6 and the eighth switch T8 are of the N type, the sixth switch T6 and the eighth switch T8 are turned on.
  • the eighth switch T8 transmits the level at the node S4 to the anode of the second light emitting diode OLED2
  • the sixth switch T6 transmits the level at the node S2 to the cathode of the second light emitting diode OLED2, so that the second light emitting diode OLED2 is in a reverse biased state.
  • the storage of the level between the node S1 and the first power source OVDD is completed mainly by the storage capacitor Cst, that is, the storage phase of the first light-emitting diode OLED1 data signal Vdata.
  • the scan signal Vscan and the first control signal Ctr1 are at a low level, and the second control signal Ctr2 is at a high level.
  • the second switch T2 is turned off, and the first switch T1 is turned on.
  • the third switch T3 and the ninth switch T9 are P-type, the third switch T3 and the ninth switch T9 are turned on, and the fifth switch T5 and the seventh switch T7 are N-type, so the fifth switch T5 and the seventh switch T7 is disconnected.
  • the first power source OVDD, the first switch T1, the third switch T3, the first LED OLED1, the ninth switch T9, and the second power source OVSS form a path, and the first LED OLED1 emits light. Since the fourth switch T4 and the tenth switch T10 are P-type, the fourth switch T4 and the tenth switch T10 are turned off. Since the sixth switch T6 and the eighth switch T8 are of the N type, the sixth switch T6 and the eighth switch T8 are turned on. At this time, the second light emitting diode OLED2 continues to be in a reverse bias state as in the first storage phase A. That is, this stage is the light-emitting display phase of the first light-emitting diode OLED1.
  • the scan signal Vscan and the first control signal Ctr1 are at a high level, and the second control signal Ctr2 is at a low level. Since the second switch T2 is N-type, the second switch T2 is turned on at this time, and the data signal Vdata is output to the node S1 under the control of the scan signal Vscan.
  • the storage capacitor Cst is in a charging state, and the first switch T1 is In the off state, the storage capacitor Cst is used to store the level between the node S1 and the first power source OVDD.
  • the fourth switch T4 and the tenth switch T10 are P-type, the fourth switch T4 and the tenth switch T10 are turned on, and the sixth switch T6 and the eighth switch T8 are N-type, so the sixth switch T6 and the eighth switch T8 is disconnected.
  • the second light-emitting diode OLED2 cannot be driven to emit light because the first switch T1 is turned off.
  • the third switch T3 and the ninth switch T9 are of the P type, the third switch T3 and the ninth switch T9 are turned off. Since the fifth switch T5 and the seventh switch T7 are of the N type, the fifth switch T5 and the seventh switch T7 are turned on.
  • the seventh switch T7 transmits the level at the node S3 to the anode of the first light emitting diode OLED1
  • the fifth switch T5 transmits the level at the node S2 to the cathode of the first light emitting diode OLED1, so that the first light emitting diode OLED1 is in a reverse biased state.
  • this stage mainly stores the level between the node S1 and the first power source OVDD through the storage capacitor Cst, that is, the storage phase of the second light-emitting diode OLED2 data signal Vdata.
  • the scan signal Vscan and the second control signal Ctr2 are at a low level, and the first control signal Ctr1 is at a high level.
  • the second switch T2 is turned off, and the first switch T1 is turned on. Since the fourth switch T4 and the tenth switch T10 are P-type, the fourth switch T4 and the tenth switch T10 are turned on, and the sixth switch T6 and the eighth switch T8 are N-type, so the sixth switch T6 and the eighth switch T8 is disconnected.
  • the first power source OVDD, the first switch T1, the fourth switch T4, the second light emitting diode OLED2, the tenth switch T10, and the second power source OVSS form a path, and the second light emitting diode OLED2 emits light. Since the third switch T3 and the ninth switch T9 are of the P type, the third switch T3 and the ninth switch T9 are turned off. Since the fifth switch T5 and the seventh switch T7 are of the N type, the fifth switch T5 and the seventh switch T7 are turned on. At this time, the first light emitting diode OLED1 continues to be in a reverse bias state as in the second storage phase C. That is, this stage is the light-emitting display phase of the second light-emitting diode OLED2.
  • the present invention allows two OLEDs to alternately emit light by sharing one driving thin film transistor, a storage capacitor and a data line, thereby reducing the OLED lighting time and reducing the number of parasitic capacitances and data lines in the panel. , improving the aperture ratio of the OLED device, and by allowing the OLED to be reverse biased in the display frame that does not emit light, so that the OLED does not need to be in a DC bias state for a long time, thereby slowing down the aging of the OLED device, and further, the present invention is not externally attached.
  • the reverse bias voltage reduces the difficulty of the traces of the pixel circuits and the crosstalk of the bias voltage lines to other signal lines.
  • FIG. 3 is a schematic structural diagram of an OLED array substrate according to an embodiment of the present invention.
  • the array substrate 300 includes a plurality of OLED pixel units 301 arranged in an array, wherein each OLED pixel unit 301 includes a pixel driving circuit as described above.
  • the embodiment of the present invention further provides an OLED display device, wherein the display device is provided with the OLED array substrate, and the array substrate comprises a plurality of OLED pixel units arranged in an array, wherein each OLED pixel unit includes the pixels as described above Drive circuit.
  • the OLED display device may specifically be a product having a display function such as a mobile phone, a tablet computer, a television, a display, a digital camera, or the like.
  • the present invention enables two OLEDs to alternately emit light by sharing two driving OLEDs, a storage capacitor and a data line, thereby reducing the OLED lighting time and reducing the number of parasitic capacitances and data lines in the panel. , improving the aperture ratio of the OLED device, and by allowing the OLED to be reverse biased in the display frame that does not emit light, so that the OLED does not need to be in a DC bias state for a long time, thereby slowing down the aging of the OLED device, and further, the present invention is not externally attached.
  • the reverse bias voltage reduces the difficulty of the traces of the pixel circuits and the crosstalk of the bias voltage lines to other signal lines.

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Abstract

本发明公开了一种OLED像素驱动电路、阵列基板及显示装置，该像素驱动电路包括驱动控制单元、第一发光单元和第二发光单元。本发明通过让两个OLED共用一个驱动控制单元，使两个OLED交替发光，减少OLED的发光时间，减少了面板中寄生电容和数据线的数量，提高OLED器件的开口率，并通过让OLED在不发光的显示帧中处于反向偏置，使得OLED不用长时间处于直流偏置状态，从而减缓OLED器件的衰老，此外，本发明未外接其它反向偏置电压，减少了像素电路走线的难度及偏置电压线对其它信号线的串扰。

Description

OLED像素驱动电路、阵列基板及显示装置
【技术领域】
本发明涉及显示技术领域，特别是涉及一种OLED像素驱动电路、阵列基板及显示装置。
【背景技术】
有机电致发光器件（OLED）具有色域广、对比度高、固态器件等诸多优秀的特性，因此在显示技术领域越来越具有竞争力。通常，有机发光显示器的显示区内设有由电子像素构成的像素阵列，每个像素单元包括一个像素驱动电路。
传统的2T1C架构电路是指电路中包括2个薄膜晶体管和1个存储电容，其中起开关作用的薄膜晶体管在开启状态时将数据电压接入到驱动薄膜晶体管的栅极，并将数据电压存储在存储电容上，使得驱动薄膜晶体管一直处于导通状态，而当OLED长时间处于直流偏置状态时，内部的离子极性化形成内建电场，导致OLED的阈值电压不断增大，OLED的发光亮度不断降低，并且长时间发光会缩短OLED的寿命，加速OLED的老化。
针对上述缺陷，已有的改进方案中，可使OLED在不发光的显示帧中处于反向偏置状态，降低内建电场强度。但此方案中，每个OLED器件需要对应一条数据线，使得OLED面板中数据线的走线加倍，导致面板开口率降低。而且，每个OLED对应一个驱动薄膜晶体管和一个存储电容，使得面板中存储电容的数量加倍，导致面板的寄生电容增加。
【发明内容】
本发明主要解决的技术问题是提供一种OLED像素驱动电路、阵列基板及显示装置，能够减少面板中寄生电容和数据线的数量，提高OLED器件的开口率。
为解决上述技术问题，本发明采用的第一个技术方案是：一种OLED像素驱动电路，包括：驱动控制单元、第一发光单元和第二发光单元；
其中，驱动控制单元包括第一开关、第二开关和存储电容；第二开关的控制端与扫描线连接，第二开关的漏极与数据线连接，第二开关的源极分别与存储电容的一端以及第一开关的控制端连接，存储电容的另一端以及第一开关的漏极与第一电源连接；
第一开关的源极分别与第一发光单元和第二发光单元连接，第一发光单元和第二发光单元分别连接至第二电源，第一发光单元的控制端连接至第一控制信号，第二发光单元的控制端连接至第二控制信号，驱动控制单元、第一控制信号和第二控制信号控制第一发光单元和第二发光单元交替发光。
为解决上述技术问题，本发明采用的第二个技术方案是：提供一种OLED阵列基板，OLED阵列基板包括像素驱动电路，像素驱动电路包括驱动控制单元、第一发光单元和第二发光单元；
其中，驱动控制单元包括第一开关、第二开关和存储电容；第二开关的控制端与扫描线连接，第二开关的漏极与数据线连接，第二开关的源极分别与存储电容的一端以及第一开关的控制端连接，存储电容的另一端以及第一开关的漏极与第一电源连接；
第一开关的源极分别与第一发光单元和第二发光单元连接，第一发光单元和第二发光单元分别连接至第二电源，第一发光单元的控制端连接至第一控制信号，第二发光单元的控制端连接至第二控制信号，驱动控制单元、第一控制信号和第二控制信号控制第一发光单元和第二发光单元交替发光。
为解决上述技术问题，本发明采用的第三个技术方案是：提供一种OLED显示装置，OLED显示装置设有OLED阵列基板，OLED阵列基板包括像素驱动电路，像素驱动电路包括驱动控制单元、第一发光单元和第二发光单元；
其中，驱动控制单元包括第一开关、第二开关和存储电容；第二开关的控制端与扫描线连接，第二开关的漏极与数据线连接，第二开关的源极分别与存储电容的一端以及第一开关的控制端连接，存储电容的另一端以及第一开关的漏极与第一电源连接；
第一开关的源极分别与第一发光单元和第二发光单元连接，第一发光单元和第二发光单元分别连接至第二电源，第一发光单元的控制端连接至第一控制信号，第二发光单元的控制端连接至第二控制信号，驱动控制单元、第一控制信号和第二控制信号控制第一发光单元和第二发光单元交替发光。
本发明的有益效果是：区别于现有技术的情况，本发明通过让两个OLED共用一个驱动薄膜晶体管、存储电容和数据线，使两个OLED交替发光，减少OLED的发光时间，减少了面板中寄生电容和数据线的数量，提高OLED器件的开口率，并通过让OLED在不发光的显示帧中处于反向偏置，使得OLED不用长时间处于直流偏置状态，从而减缓OLED器件的衰老，此外，本发明未外接其它反向偏置电压，减少了像素电路走线的难度及偏置电压线对其它信号线的串扰。
【附图说明】
图1是本发明实施例提供的OLED像素驱动电路的具体结构示意图；
图2是本发明实施例提供的OLED像素驱动电路的电路时序示意图；
图3是本发明实施例提供的OLED阵列基板的结构示意图。
【具体实施方式】
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，均属于本发明保护的范围。
图1是本发明实施例提供的OLED像素驱动电路的具体结构示意图。本实施方式提供的像素驱动电路，包括：驱动控制单元M3、第一发光单元M1和第二发光单元M2。驱动控制单元M3包括第一开关T1、第二开关T2和存储电容Cst，第二开关T2的控制端与扫描线Vscan连接，第二开关T2的漏极与数据线Vdata连接，第二开关T2的源极分别与存储电容Cst的一端以及第一开关T1的控制端连接，存储电容Cst的另一端以及第一开关T1的漏极与第一电源OVDD连接。其中，第一开关T1在本实施例中为驱动薄膜晶体管，第二开关T2用于在扫描信号Vscan的控制下将数据信号Vdata传输至其源极，存储电容Cst用于存储第二开关T2的源极与第一电源OVDD之间的电平。第一开关T1的源极分别与第一发光单元M1和第二发光单元M2连接，第一发光单元M1和第二发光单元M2分别连接至第二电源OVSS，第一发光单元M1的控制端连接至第一控制信号Ctr1，第二发光单元的控制端连接至第二控制信号Ctr2。
进一步的，本实施方式中的第一发光单元M1具体包括第三开关T3、第五开关T5、第七开关T7、第九开关T9和第一发光二极管OLED1，第一发光二极管OLED1的阳极连接第三开关T3的漏极和第七开关T7的漏极，第一发光二极管OLED1的阴极连接第九开关T9的源极和第五开关T5的源极，第五开关T5的漏极连接第一电源OVDD，第七开关T7的源极和第九开关T9的漏极连接第二电源OVSS。第二发光单元M2具体包括第四开关T4、第六开关T6、第八开关T8、第十开关T10和第二发光二极管OLED2，第二发光二极管OLED2的阳极连接第四开关T4的漏极和第八开关T8的漏极，第二发光二极管OLED2的阴极连接第十开关T10的源极和第六开关T6的源极，第六开关T6的漏极连接第一电源OVDD，第八开关T8的源极和第十开关T10的漏极连接第二电源OVSS。
上述实施例中提到的开关包括P型和N型的晶体管开关。具体地，第一开关T1、第二开关T2、第五开关T5、第六开关T6、第七开关T7和第八开关T8为N型，第三开关T3、第四开关T4、第九开关T9和第十开关T10为P型。其中，P型晶体管开关在控制端为低电平时导通，在控制端为高电平时断开；N型晶体管开关在控制端为低电平时断开，在控制端为高电平时导通。
图2是本发明实施例提供的OLED像素驱动电路的电路时序示意图，其给出了扫描信号Vscan、第一控制信号Ctr1和第二控制信号Ctr2的电平高低随时间的变化情况。此处，电平高低是相对的。本实施例像素驱动电路的工作过程分为四个阶段：第一存储阶段A、第一发光显示阶段B、第二存储阶段C和第二发光显示阶段D。第一存储阶段A和第一发光显示阶段B构成第一帧画面，第二存储阶段C和第二发光显示阶段D构成第二帧画面。在第一帧中，第一发光二极管OLED1发光，第二发光二极管OLED2反向偏置；在第二帧中，第二发光二极管OLED2发光，第一发光二极管OLED1反向偏置。本实施例的驱动控制单元、第一控制信号和第二控制信号共同控制第一发光单元和第二发光单元交替发光。以下，结合图1和图2进行详细说明。
本实施场景中，第一控制信号Ctr1与第二控制信号Ctr2在同一时刻输出的电平信号极性相反，即当第一控制信号Ctr1为高电平时，第二控制信号Ctr2为低电平；当第一控制信号Ctr1为低电平时，第二控制信号Ctr2为高电平。第一控制信号Ctr1与第二控制信号Ctr2的时序周期均为相邻两帧图像的显示时间。第一控制信号Ctr1与第二控制信号Ctr2在同一时刻输出的电平信号极性相反只是本发明的一个具体的实施场景，在其他实施场景中，第一控制信号Ctr1与第二控制信号Ctr2的电平信号还可以是其他关系，只要能实现第一发光单元和第二发光单元交替发光均在本发明的保护范围内。第一电源OVDD的电压值高于第二电源OVSS的电压值，例如，可以设置第一电源OVDD的电压值为正电压，第二电源OVSS的电压值为负电压，或者设置第一电源OVDD的电压值为正电压，第二电源OVSS的电压值为0V。
在第一存储阶段A，扫描信号Vscan和第二控制信号Ctr2为高电平，第一控制信号Ctr1为低电平。由于第二开关T2为N型，所以此时第二开关T2导通，并在扫描信号Vscan的控制下将数据信号Vdata输出至节点S1，此阶段存储电容Cst处于充电状态，第一开关T1为断开状态，存储电容Cst用于存储节点S1和第一电源OVDD之间的电平。由于第三开关T3和第九开关T9为P型，所以第三开关T3和第九开关T9导通，而第五开关T5和第七开关T7为N型，所以第五开关T5和第七开关T7断开。此时，因第一开关T1断开而无法驱动第一发光二极管OLED1发光。由于第四开关T4和第十开关T10为P型，所以第四开关T4和第十开关T10断开。由于第六开关T6和第八开关T8为N型，所以第六开关T6和第八开关T8导通。此时，第八开关T8将节点S4处的电平传输到第二发光二极管OLED2的阳极，第六开关T6将节点S2处的电平传输到第二发光二极管OLED2的阴极，从而第二发光二极管OLED2处于反向偏置状态。此阶段主要通过存储电容Cst完成对节点S1和第一电源OVDD之间电平的存储，即为第一发光二极管OLED1数据信号Vdata的存储阶段。
在第一发光显示阶段B，扫描信号Vscan和第一控制信号Ctr1为低电平，第二控制信号Ctr2为高电平。此时，第二开关T2断开，第一开关T1导通。由于第三开关T3和第九开关T9为P型，所以第三开关T3和第九开关T9导通，而第五开关T5和第七开关T7为N型，所以第五开关T5和第七开关T7断开。此时，第一电源OVDD、第一开关T1、第三开关T3、第一发光二极管OLED1、第九开关T9及第二电源OVSS形成通路，第一发光二极管OLED1发光。由于第四开关T4和第十开关T10为P型，所以第四开关T4和第十开关T10断开。由于第六开关T6和第八开关T8为N型，所以第六开关T6和第八开关T8导通。此时，第二发光二极管OLED2同第一存储阶段A一样，继续处于反向偏置状态。即，此阶段为第一发光二极管OLED1的发光显示阶段。
在第二存储阶段C，扫描信号Vscan和第一控制信号Ctr1为高电平，第二控制信号Ctr2为低电平。由于第二开关T2为N型，所以此时第二开关T2导通，并在扫描信号Vscan的控制下将数据信号Vdata输出至节点S1，此阶段存储电容Cst处于充电状态，第一开关T1为断开状态，存储电容Cst用于存储节点S1和第一电源OVDD之间的电平。由于第四开关T4和第十开关T10为P型，所以第四开关T4和第十开关T10导通，而第六开关T6和第八开关T8为N型，所以第六开关T6和第八开关T8断开。此时，因第一开关T1断开而无法驱动第二发光二极管OLED2发光。由于第三开关T3和第九开关T9为P型，所以第三开关T3和第九开关T9断开。由于第五开关T5和第七开关T7为N型，所以第五开关T5和第七开关T7导通。此时，第七开关T7将节点S3处的电平传输到第一发光二极管OLED1的阳极，第五开关T5将节点S2处的电平传输到第一发光二极管OLED1的阴极，从而第一发光二极管OLED1处于反向偏置状态。同第一存储阶段A一样，此阶段主要通过存储电容Cst完成对节点S1和第一电源OVDD之间电平的存储，即为第二发光二极管OLED2数据信号Vdata的存储阶段。
在第二发光显示阶段D，扫描信号Vscan和第二控制信号Ctr2为低电平，第一控制信号Ctr1为高电平。此时，第二开关T2断开，第一开关T1导通。由于第四开关T4和第十开关T10为P型，所以第四开关T4和第十开关T10导通，而第六开关T6和第八开关T8为N型，所以第六开关T6和第八开关T8断开。此时，第一电源OVDD、第一开关T1、第四开关T4、第二发光二极管OLED2、第十开关T10及第二电源OVSS形成通路，第二发光二极管OLED2发光。由于第三开关T3和第九开关T9为P型，所以第三开关T3和第九开关T9断开。由于第五开关T5和第七开关T7为N型，所以第五开关T5和第七开关T7导通。此时，第一发光二极管OLED1同第二存储阶段C一样，继续处于反向偏置状态。即，此阶段为第二发光二极管OLED2的发光显示阶段。
从以上四个阶段可知，本发明通过让两个OLED共用一个驱动薄膜晶体管、存储电容和数据线，使两个OLED交替发光，减少OLED的发光时间，减少了面板中寄生电容和数据线的数量，提高OLED器件的开口率，并通过让OLED在不发光的显示帧中处于反向偏置，使得OLED不用长时间处于直流偏置状态，从而减缓OLED器件的衰老，此外，本发明未外接其它反向偏置电压，减少了像素电路走线的难度及偏置电压线对其它信号线的串扰。
图3为本发明实施例提供的OLED阵列基板的结构示意图，该阵列基板300包括多个呈阵列排列的OLED像素单元301，其中，每个OLED像素单元301均包括如上所述的像素驱动电路。
本发明实施例还提供了一种OLED显示装置，该显示装置设有上述OLED阵列基板，阵列基板包括多个呈阵列排列的OLED像素单元，其中，每个OLED像素单元均包括如上所述的像素驱动电路。该OLED显示装置具体可以为手机、平板电脑、电视机、显示器、数码相机等具有显示功能的产品。
区别于现有技术的情况，本发明通过让两个OLED共用一个驱动薄膜晶体管、存储电容和数据线使两个OLED交替发光，减少OLED的发光时间，减少了面板中寄生电容和数据线的数量，提高OLED器件的开口率，并通过让OLED在不发光的显示帧中处于反向偏置，使得OLED不用长时间处于直流偏置状态，从而减缓OLED器件的衰老，此外，本发明未外接其它反向偏置电压，减少了像素电路走线的难度及偏置电压线对其它信号线的串扰。
显然，本领域的技术人员可以对本发明进行各种改动和变型而不脱离本发明的精神和范围。这样，倘若本发明的这些修改和变型属于本发明权利要求及其等同技术的范围之内，则本发明也意图包含这些改动和变型在内。

Claims (20)

  1. 一种OLED像素驱动电路，其中，包括驱动控制单元、第一发光单元和第二发光单元；
    其中，所述驱动控制单元包括第一开关、第二开关和存储电容；所述第二开关的控制端与扫描线连接，所述第二开关的漏极与数据线连接，所述第二开关的源极分别与所述存储电容的一端以及所述第一开关的控制端连接，所述存储电容的另一端以及所述第一开关的漏极与第一电源连接；
    所述第一开关的源极分别与所述第一发光单元和所述第二发光单元连接，所述第一发光单元和所述第二发光单元分别连接至第二电源，所述第一发光单元的控制端连接至第一控制信号，所述第二发光单元的控制端连接至第二控制信号，所述驱动控制单元、所述第一控制信号和所述第二控制信号控制所述第一发光单元和所述第二发光单元交替发光。
  2. 根据权利要求1所述的OLED像素驱动电路，其中，所述第一控制信号与所述第二控制信号在同一时刻输出的电平信号极性相反。
  3. 根据权利要求1所述的OLED像素驱动电路，其中，所述第一发光单元包括第三开关、第五开关、第七开关、第九开关和第一发光二极管，所述第一发光二极管的阳极连接所述第三开关的漏极和所述第七开关的漏极，所述第一发光二极管的阴极连接所述第九开关的源极和所述第五开关的源极，所述第五开关的漏极连接所述第一电源，所述第七开关的源极和所述第九开关的漏极连接所述第二电源。
  4. 根据权利要求3所述的OLED像素驱动电路，其中，所述第二发光单元包括第四开关、第六开关、第八开关、第十开关和第二发光二极管，所述第二发光二极管的阳极连接所述第四开关的漏极和所述第八开关的漏极，所述第二发光二极管的阴极连接所述第十开关的源极和所述第六开关的源极，所述第六开关的漏极连接所述第一电源，所述第八开关的源极和所述第十开关的漏极连接所述第二电源。
  5. 根据权利要求4所述的OLED像素驱动电路，其中，所述第一开关、第二开关、第五开关、第六开关、第七开关和第八开关为N型晶体管开关，所述第三开关、第四开关、第九开关和第十开关为P型晶体管开关。
  6. 根据权利要求4所述的OLED像素驱动电路，其中，所述第一发光二极管发光时，所述第二发光二极管反向偏置；所述第二发光二极管发光时，所述第一发光二极管反向偏置。
  7. 根据权利要求1所述的OLED像素驱动电路，其中，所述第一电源的电压值高于所述第二电源的电压值。
  8. 根据权利要求1所述的OLED像素驱动电路，其中，所述第一控制信号与所述第二控制信号的时序周期均为相邻两帧图像的显示时间。
  9. 一种OLED阵列基板，其中，所述OLED阵列基板包括像素驱动电路，所述像素驱动电路包括驱动控制单元、第一发光单元和第二发光单元；
    其中，所述驱动控制单元包括第一开关、第二开关和存储电容；所述第二开关的控制端与扫描线连接，所述第二开关的漏极与数据线连接，所述第二开关的源极分别与所述存储电容的一端以及所述第一开关的控制端连接，所述存储电容的另一端以及所述第一开关的漏极与第一电源连接；
    所述第一开关的源极分别与所述第一发光单元和所述第二发光单元连接，所述第一发光单元和所述第二发光单元分别连接至第二电源，所述第一发光单元的控制端连接至第一控制信号，所述第二发光单元的控制端连接至第二控制信号，所述驱动控制单元、所述第一控制信号和所述第二控制信号控制所述第一发光单元和所述第二发光单元交替发光。
  10. 根据权利要求9所述的OLED阵列基板，其中，所述第一控制信号与所述第二控制信号在同一时刻输出的电平信号极性相反。
  11. 根据权利要求9所述的OLED阵列基板，其中，所述第一发光单元包括第三开关、第五开关、第七开关、第九开关和第一发光二极管，所述第一发光二极管的阳极连接所述第三开关的漏极和所述第七开关的漏极，所述第一发光二极管的阴极连接所述第九开关的源极和所述第五开关的源极，所述第五开关的漏极连接所述第一电源，所述第七开关的源极和所述第九开关的漏极连接所述第二电源。
  12. 根据权利要求11所述的OLED阵列基板，其中，所述第二发光单元包括第四开关、第六开关、第八开关、第十开关和第二发光二极管，所述第二发光二极管的阳极连接所述第四开关的漏极和所述第八开关的漏极，所述第二发光二极管的阴极连接所述第十开关的源极和所述第六开关的源极，所述第六开关的漏极连接所述第一电源，所述第八开关的源极和所述第十开关的漏极连接所述第二电源。
  13. 根据权利要求12所述的OLED阵列基板，其中，所述第一开关、第二开关、第五开关、第六开关、第七开关和第八开关为N型晶体管开关，所述第三开关、第四开关、第九开关和第十开关为P型晶体管开关。
  14. 根据权利要求12所述的OLED阵列基板，其中，所述第一发光二极管发光时，所述第二发光二极管反向偏置；所述第二发光二极管发光时，
  15. 一种OLED显示装置，其中，所述OLED显示装置设有OLED阵列基板，所述OLED阵列基板包括像素驱动电路，所述像素驱动电路包括驱动控制单元、第一发光单元和第二发光单元；
    其中，所述驱动控制单元包括第一开关、第二开关和存储电容；所述第二开关的控制端与扫描线连接，所述第二开关的漏极与数据线连接，所述第二开关的源极分别与所述存储电容的一端以及所述第一开关的控制端连接，所述存储电容的另一端以及所述第一开关的漏极与第一电源连接；
    所述第一开关的源极分别与所述第一发光单元和所述第二发光单元连接，所述第一发光单元和所述第二发光单元分别连接至第二电源，所述第一发光单元的控制端连接至第一控制信号，所述第二发光单元的控制端连接至第二控制信号，所述驱动控制单元、所述第一控制信号和所述第二控制信号控制所述第一发光单元和所述第二发光单元交替发光。
  16. 根据权利要求15所述的OLED显示装置，其中，所述第一控制信号与所述第二控制信号在同一时刻输出的电平信号极性相反。
  17. 根据权利要求15所述的OLED显示装置，其中，所述第一发光单元包括第三开关、第五开关、第七开关、第九开关和第一发光二极管，所述第一发光二极管的阳极连接所述第三开关的漏极和所述第七开关的漏极，所述第一发光二极管的阴极连接所述第九开关的源极和所述第五开关的源极，所述第五开关的漏极连接所述第一电源，所述第七开关的源极和所述第九开关的漏极连接所述第二电源。
  18. 根据权利要求17所述的OLED显示装置，其中，所述第二发光单元包括第四开关、第六开关、第八开关、第十开关和第二发光二极管，所述第二发光二极管的阳极连接所述第四开关的漏极和所述第八开关的漏极，所述第二发光二极管的阴极连接所述第十开关的源极和所述第六开关的源极，所述第六开关的漏极连接所述第一电源，所述第八开关的源极和所述第十开关的漏极连接所述第二电源。
  19. 根据权利要求18所述的OLED显示装置，其中，所述第一开关、第二开关、第五开关、第六开关、第七开关和第八开关为N型晶体管开关，所述第三开关、第四开关、第九开关和第十开关为P型晶体管开关。
  20. 根据权利要求18所述的OLED显示装置，其中，所述第一发光二极管发光时，所述第二发光二极管反向偏置；所述第二发光二极管发光时，所述第一发光二极管反向偏置。
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