WO2019061652A1 - 一种阵列基板及液晶显示面板 - Google Patents

一种阵列基板及液晶显示面板 Download PDF

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WO2019061652A1
WO2019061652A1 PCT/CN2017/108686 CN2017108686W WO2019061652A1 WO 2019061652 A1 WO2019061652 A1 WO 2019061652A1 CN 2017108686 W CN2017108686 W CN 2017108686W WO 2019061652 A1 WO2019061652 A1 WO 2019061652A1
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array substrate
electrode layer
liquid crystal
transparent
pixel electrodes
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PCT/CN2017/108686
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English (en)
French (fr)
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张超
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武汉华星光电技术有限公司
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Priority to US15/577,849 priority Critical patent/US20190094635A1/en
Publication of WO2019061652A1 publication Critical patent/WO2019061652A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes

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  • the present invention relates to the field of liquid crystal display technologies, and in particular, to an array substrate and a liquid crystal display panel.
  • liquid crystal display (LCD) technology has rapidly gained popularity due to its unique advantages of low power consumption, low radiation, light weight and convenience.
  • the display mode of the liquid crystal display panel mainly includes VA (Virtical Alignment) and FFS (Fringe Field Switching) modes, and the liquid crystal display panel of the FFS display mode has a wide viewing angle and a high aperture ratio. Widely used.
  • the FFS mode is a fringe electric field generated between the top pixel electrode 11 and the bottom common electrode 12 on the array substrate, so that liquid crystal molecules between the electrodes and above the electrodes can rotate in a plane parallel to the array substrate.
  • the liquid crystal molecules are subjected to an electric field component Ez from the horizontal y-direction electric field component Ey and the z direction (the direction of the vertical common electrode plane), as shown in FIG.
  • Ez electric field component
  • the liquid crystal molecules are subjected to a strong electric field Ez, which causes the liquid crystal molecules to receive a large vertical force in addition to the horizontal rotation.
  • a strong electric field Ez which causes the liquid crystal molecules to receive a large vertical force in addition to the horizontal rotation.
  • the present invention provides an array substrate and a liquid crystal display panel for reducing the force of the vertical common electrode plane direction of the liquid crystal molecules in the FFS mode liquid crystal panel to improve the contrast of the panel.
  • the present invention provides an array substrate including a substrate, a common electrode layer covering the substrate, an insulating layer laminated on the common electrode layer, and a pixel electrode layer on the insulating layer.
  • the pixel electrode layer includes a plurality of pixel electrodes arranged in a matrix, wherein a transparent tapered stopper is disposed between adjacent pixel electrodes, and an axial cross section of the transparent tapered stopper in a direction perpendicular to the common electrode layer It is a triangle.
  • the present invention provides a tapered transparent stopper between adjacent pixel electrodes.
  • the transparent tapered stopper can restrict liquid crystal molecules located in the edge of the pixel electrode to be vertical.
  • the direction of the common electrode layer is biased so that the liquid crystal molecules are placed in a flat state as much as possible so that the light transmittance of the region is not reduced.
  • the bottom angle of the triangle of the axial section is 30-60°. More preferably, it is 45 degrees.
  • the transparent tapered stopper with the bottom angle in this range can exert the most efficient stress on the liquid crystal molecules, and largely suppress the direction of the liquid crystal molecules toward the vertical common electrode layer.
  • the apex of the transparent tapered stopper is equal to the distance between the adjacent pixel electrodes.
  • the shaft section is an isosceles triangle.
  • the height of the transparent tapered stopper is (8-12) times the thickness of the pixel electrode layer.
  • the height of the transparent cone-shaped stopper is 0.8-1.2 ⁇ m. It is preferably 0.9 to 1.1 ⁇ m.
  • the length of the bottom side of the triangle of the axial section is 0.5-0.6 of the pitch of the pixel electrode.
  • the transparent cone-shaped stopper is made of a photosensitive negative photoresist. It can be exposed by coating a transparent film of a certain thickness between the pixel electrodes, and then using a mask of a predetermined shape (the shape of the light-transmissive region of the mask matches the shape of the tapered stopper). Finally, the transparent tapered stopper is formed between the pixel electrodes by development.
  • the pixel electrode layer and the common electrode layer are each composed of a transparent conductive material selected from the group consisting of indium tin oxide, indium zinc oxide, aluminum-doped zinc oxide, fluorine-doped tin dioxide, and phosphorus-doped dioxide.
  • a transparent conductive material selected from the group consisting of indium tin oxide, indium zinc oxide, aluminum-doped zinc oxide, fluorine-doped tin dioxide, and phosphorus-doped dioxide.
  • the present invention further provides a liquid crystal display panel comprising a color filter substrate and an array substrate according to the first aspect of the present invention, wherein the color filter substrate and the array substrate are oppositely disposed on the color filter substrate and A liquid crystal layer is sandwiched between the array substrates.
  • a tapered transparent stopper is disposed between adjacent pixel electrodes on the array substrate, and when a voltage is applied between the pixel electrode and the common electrode, the transparent cone is blocked.
  • the block can limit the liquid crystal molecules located in the edge of the pixel electrode to be perpendicular to the direction of the common electrode layer, and the liquid crystal molecules are placed in a lying state as much as possible, so that the light transmittance of the region is not reduced, and the liquid crystal display panel is further improved. Contrast.
  • 1 is a schematic diagram of an electric field driven liquid crystal of an FFS display mode panel in the prior art; 11 is a pixel electrode, 12 is a common electrode, 13 is an insulating layer, and a broken line represents an electric field line;
  • FIG. 2 is a cross-sectional view of a liquid crystal display panel in an embodiment of the present invention, and a broken line represents an electric field line;
  • FIG 3 is a top plan view of a pixel electrode layer 24 on the insulating layer 23 in accordance with an embodiment of the present invention.
  • the liquid crystal display panel includes a color filter substrate 100, an array substrate 200, and a liquid crystal layer 300.
  • the color filter substrate 100 is disposed opposite to the array substrate 200, and the liquid crystal layer 300 is sandwiched between the color filter substrate 100 and the array substrate 200.
  • the liquid crystal layer 300 includes a plurality of liquid crystal molecules aligned in a certain direction.
  • the array substrate 200 used in the liquid crystal display panel will be specifically described below.
  • the array substrate 200 is particularly suitable for a liquid crystal display panel of an FFS display mode.
  • the array substrate 200 includes a substrate 21, a common electrode layer 22 covering the substrate 21, an insulating layer 23 over the common electrode layer 22, a pixel electrode layer 24 on the insulating layer 23, and a pixel electrode.
  • the layer 24 includes spaced apart pixel electrodes 241, wherein a transparent tapered block 25 is disposed between the adjacent pixel electrodes 241, and the transparent tapered block 25 is in the direction of the vertical common electrode layer 22 (ie, parallel to the z direction).
  • the axis of the shaft is triangular.
  • a tapered transparent stopper 25 is disposed between adjacent pixel electrodes 241.
  • the transparent tapered stopper 25 can be restricted to be located within the edge of the pixel electrode 241.
  • the liquid crystal molecules are biased toward the direction of the vertical common electrode layer 22 (i.e., the z direction in Fig. 2), so that the liquid crystal molecules are placed in a flat state as much as possible so that the light transmittance of the region is not reduced.
  • the axial section of the transparent tapered stopper 25 is a triangle whose base angle ⁇ is 30-60°.
  • the transparent tapered stopper 25 having the bottom angle ⁇ within this range can exert a relatively high-efficiency stress on the liquid crystal molecules, and largely suppress the direction in which the liquid crystal molecules are deflected toward the vertical common electrode layer 22.
  • the base angle ⁇ is preferably 45°.
  • the shape of the transparent cone-shaped stopper 25 may be a cone or a pyramid (such as a triangular pyramid, a quadrangular pyramid, etc.).
  • the apex of the transparent tapered block 25 is equal to the distance between the adjacent two pixel electrodes 241, that is, the axial cross section of the transparent tapered block 25 is an isosceles triangle.
  • the transparent pyramid-shaped stoppers 25 are disposed between the adjacent pixel electrodes 241, it is obvious that the length d of the bottom side of the axial cross-section of the transparent tapered stopper 25 is smaller than the pitch of the pixel electrodes 241. ⁇ d. Further, the base length d of the axial cross section of the transparent tapered stopper 25 is 0.5 to 0.6 of the pitch ⁇ d of the pixel electrode 241.
  • the tapered transparent stopper 25 has a tapered shape along the direction of the substrate 21 toward the insulating layer 23 (i.e., the z direction in Fig. 2), the cross section of the tapered transparent stopper 25 (the cross section in the vertical z direction)
  • the size of the transparent tapered block 25 is also smaller than the pitch ⁇ d of the pixel electrode 241.
  • the maximum width of the cross section of the transparent tapered stopper 25 is 0.5 to 0.6 of the pitch ⁇ d of the pixel electrode 241.
  • the height of the transparent tapered stopper 25 is (8-12) times the thickness of the pixel electrode layer 24. Further, the height of the transparent tapered stopper 25 is 0.8 to 1.2 ⁇ m. It is preferably 0.9 to 1.1 ⁇ m. This can better suppress the deflection of the liquid crystal molecules in the z direction.
  • the pixel electrode layer 24 includes a plurality of pixel electrodes 241 arranged in a matrix, and the pixel electrodes 241 are strip-shaped.
  • the pitch ⁇ d of the adjacent pixel electrodes 241 is 3.6 to 4.2 ⁇ m.
  • the width w of the pixel electrode 241 is 2.8 to 3.4 ⁇ m.
  • the pitch ⁇ d of the adjacent pixel electrodes 241 is 3.9 ⁇ m. Pixel electricity The width of the pole 241 is 3.1 ⁇ m. The maximum width d of the transparent tapered stopper 25 is 2.0 ⁇ m, and the distance between the two adjacent pixel electrodes 241 from the left and the right is 0.95 ⁇ m.
  • the material of the transparent cone-shaped stopper 25 is a photosensitive negative photoresist. It can be exposed by coating a transparent film of a certain thickness between the pixel electrodes 241 and then using a mask of a predetermined shape (the shape of the light-transmissive region of the mask matches the shape of the transparent tapered stopper 25). Finally, a transparent tapered stopper 25 is formed between the pixel electrodes 241 by development.
  • the pixel electrode layer 24 and the common electrode layer 22 are both made of a transparent conductive material selected from the group consisting of indium tin oxide (ITO), indium zinc oxide (IZO), aluminum-doped zinc oxide (AZO), and fluorine-doped tin dioxide (FTO). And one of phosphorus-doped tin dioxide (PTO).
  • ITO indium tin oxide
  • IZO indium zinc oxide
  • AZO aluminum-doped zinc oxide
  • FTO fluorine-doped tin dioxide
  • PTO phosphorus-doped tin dioxide
  • the common electrode layer 22 is a planar electrode, and the entire surface is covered on the substrate 21.
  • a tapered transparent stopper 25 is disposed between adjacent pixel electrodes 241.
  • the transparent cone is formed.
  • the stopper 25 can restrict the liquid crystal molecules located in the edge of the pixel electrode 241 from being deflected in the z direction, and the liquid crystal molecules are placed in a flat state as much as possible so that the liquid crystal molecules rotate parallel to the plane (xy plane) of the array substrate 200. This prevents the transmittance of light in the edge region of the pixel electrode 241 from being reduced.
  • the CF substrate 100 is a substrate commonly used in the field of liquid crystal display technology.
  • the specific structure of the CF substrate 100 is prior art, and the description thereof will not be repeated here.
  • the array substrate 200 in addition to the structure shown in FIG. 2, other conventional structures may be included, such as a flat layer on the pixel electrode 241, a liquid crystal alignment film on the flat layer, etc., which will constitute a liquid crystal layer.
  • a liquid crystal material of 300 may be applied to the liquid crystal alignment film region on the array substrate.
  • the liquid crystal molecules in the liquid crystal layer 300 may be a positive nematic liquid crystal having dielectric anisotropy.
  • a positive nematic liquid crystal having dielectric anisotropy for example, dicyanobenzene liquid crystal, azine liquid crystal, Schiff base liquid crystal, oxidized azo liquid crystal, biphenyl liquid crystal, phenylcyclohexane liquid crystal, pyrimidine liquid crystal, dioxane liquid crystal, Bicyclooctane liquid crystal, cubic liquid crystal liquid crystal, etc., but is not limited thereto.
  • a tapered transparent stopper 25 is disposed between adjacent pixel electrodes 241 on the array substrate 200, when a voltage is applied between the pixel electrode 241 and the common electrode layer 25.
  • the transparent cone-shaped stopper 25 can restrict the liquid crystal molecules located in the edge of the pixel electrode 241 from being deflected in the z direction, and the liquid crystal molecules are placed in a lying state as much as possible so that the liquid crystal molecules are parallel to the plane of the array substrate 200 (xy plane). The rotation occurred. This avoids the light transmittance of the edge region of the pixel electrode 241 from being reduced, and also reduces the brightness of the white screen, thereby improving the contrast of the liquid crystal display panel. Among them, the contrast is the ratio of the brightness of the all-white picture to the brightness of the all-black picture.

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  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
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Abstract

一种阵列基板（200），包括：衬底（21），覆盖该衬底（21）的公共电极层（22），位于该公共电极层（22）之上的绝缘层（23），位于该绝缘层（23）上的像素电极层（24）；该像素电极层（24）包括间隔设置的像素电极（241），相邻的像素电极（241）之间设有透明锥状挡块（25），该透明锥状挡块（25）在垂直该公共电极层（22）方向上的轴截面为三角形。通过在相邻像素电极（241）之间设置透明锥状挡块（25），在给像素电极（241）、公共电极之间施加电压时，它可以限制位于像素电极（241）边缘范围内的液晶分子向垂直公共电极层（22）的方向偏向，尽量使液晶分子处于平躺状态，使得该区域的光穿透率不致减少。还提供了包含该阵列基板（200）的液晶显示面板。

Description

一种阵列基板及液晶显示面板
本申请要求于2017年09月26日提交中国专利局、申请号为201710883547.4、发明名称为“一种阵列基板及液晶显示面板”的中国专利申请的优先权，上述在先申请的内容以引入的方式并入本文本中。
技术领域
本发明涉及液晶显示技术领域，尤其涉及一种阵列基板及液晶显示面板。
背景技术
近年来，液晶显示(Liquid Crystal Display，LCD)技术以其低功耗、低辐射、轻巧便捷的独特优势迅速得到普及。液晶显示面板的显示模式主要有VA(Virtical Alignment，垂直取向)、FFS(Fringe Field Switching，边缘场开关技术)模式等，其中FFS显示模式的液晶显示面板以其观看视角广及开口率高等特性，得到广泛应用。
FFS模式是通过阵列基板上的顶层像素电极11和底层公共电极12之间产生的边缘电场，使电极之间及电极上方的液晶分子能在平行于阵列基板的平面上发生转动。在像素电极11和公共电极12上施加电压后，液晶分子会受到来自水平y方向的电场分量Ey和z方向(垂直公共电极平面的方向)的电场分量Ez，(如图1所示)但在像素电极11的边缘位置，液晶分子受到的电场Ez较强，这会导致液晶分子除了水平旋转外，会受到较大的垂直方向的力。以正型液晶为例，液晶分子容易在边缘电场Ez的作用下站立起来，从而导致该区 域的光损失，白画面的亮度降低，进而降低LCD面板的对比度。
发明内容
鉴于此，本发明提供了一种阵列基板及液晶显示面板，用于减小液晶分子在FFS模式液晶面板中所受到的垂直公共电极平面方向的力，以提高面板的对比度。
第一方面，本发明提供了一种阵列基板，包括衬底，覆盖所述衬底的公共电极层，层叠于所述公共电极层上的绝缘层，位于所述绝缘层上的像素电极层，所述像素电极层包括矩阵排列的数个像素电极，其中，相邻的像素电极之间设有透明锥状挡块，所述透明锥状挡块在垂直所述公共电极层方向上的轴截面为三角形。
本发明在相邻像素电极之间设置锥状透明挡块，当给所述像素电极、公共电极之间施加电压时，该透明锥状挡块可以限制位于像素电极边缘范围内的液晶分子向垂直所述公共电极层的方向偏向，尽量使液晶分子处于平躺状态，使得该区域的光穿透率不致减少。
其中，所述轴截面三角形的底角为30-60°。进一步优选为45°。底角在此范围内的透明锥状挡块，可以给液晶分子最高效的应力作用，较大地抑制液晶分子向垂直公共电极层的方向偏向。
其中，所述透明锥状挡块的顶点距相邻的所述像素电极之间的距离相等。此时，该轴截面为一等腰三角形。
其中，所述透明锥状挡块的高度为所述像素电极层的厚度的(8-12)倍。
其中，所述透明锥状挡块的高度为0.8-1.2μm。优选为0.9-1.1μm。
其中，所述轴截面三角形的底边长度为所述像素电极的间距的0.5-0.6。
其中，所述透明锥状挡块的材质为感光型负性光阻。它可以通过在所述像素电极之间涂布形成一定厚度的透明薄膜，然后采用预定形状的掩膜板(掩膜板的透光区的形状与锥状挡块的形状相匹配)进行曝光，最后经显影，在像素电极之间形成所述透明锥状挡块。
其中，所述像素电极层和所述公共电极层均由透明导电材料构成，所述透明导电材料选自氧化铟锡、氧化铟锌、掺铝氧化锌、掺氟二氧化锡和掺磷二氧化锡中的一种。
第二方面，本发明还提供了一种液晶显示面板，包括彩膜基板和如本发明第一方面所述的阵列基板，所述彩膜基板和阵列基板相对设置，在所述彩膜基板和阵列基板之间夹持有液晶层。
本发明第二方面提供的液晶显示面板中，阵列基板上的相邻像素电极之间设有锥状透明挡块，当给所述像素电极、公共电极之间施加电压时，该透明锥状挡块可以限制位于像素电极边缘范围内的液晶分子向垂直所述公共电极层的方向偏向，尽量使液晶分子处于平躺状态，使得该区域的光穿透率不致减少，进一步提高了该液晶显示面板的对比度。
附图说明
图1为现有技术中FFS显示模式面板的电场驱动液晶的示意图；11为像素电极，12为公共电极，13为绝缘层，虚线代表电场线；
图2是本发明实施例中液晶显示面板的截面图，虚线代表电场线；
图3为本发明实施例中位于绝缘层23上的像素电极层24的俯视图。
具体实施方式
下面结合附图及实施例，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动的前提下所获得的所有其他实施例，都属于本发明保护的范围。应当指出，此处所描述的具体实施例仅仅用以解释本发明，并不用于限定本发明。
图2为发明实施例中提供的液晶显示面板的结构示意图。该液晶显示面板包括彩膜基板100、阵列基板200、液晶层300，彩膜基板100与阵列基板200相对设置，液晶层300被夹持于所述彩膜基板100与阵列基板200之间。液晶层300包括多个按一定方向配向的液晶分子。
下面先具体介绍该液晶显示面板中所使用到的阵列基板200，该阵列基板200尤其适用于FFS显示模式的液晶显示面板。
如图2所示，该阵列基板200包括衬底21，覆盖衬底21的公共电极层22，位于公共电极层22之上的绝缘层23，位于绝缘层23上的像素电极层24，像素电极层24包括间隔设置的像素电极241，其中，相邻的像素电极241之间设有透明锥状挡块25，透明锥状挡块25在垂直公共电极层22方向(即平行于z方向)上的轴截面为三角形。
本发明在相邻像素电极241之间设置锥状透明挡块25，当给像素电极241、公共电极层22之间施加电压时，该透明锥状挡块25可以限制位于像素电极241边缘范围内的液晶分子向垂直公共电极层22的方向(即图2中的z方向)偏向，尽量使液晶分子处于平躺状态，使得该区域的光穿透率不致减少。
透明锥状挡块25的轴截面为三角形，该三角形的底角θ为30-60°。底角θ在此范围内的透明锥状挡块25，可以给液晶分子较高效的应力作用，较大地抑制液晶分子向垂直公共电极层22的方向偏向。进一步地，底角θ优选为45°。
本发明实施例中，透明锥状挡块25的形状可以为圆锥、棱锥(如三棱锥、四棱锥等)。其中，透明锥状挡块25的顶点距相邻的两像素电极241之间的距离相等，即，所述透明锥状挡块25的轴截面为一等腰三角形。
本发明实施例中，由于相邻的像素电极241之间均设置有透明锥状挡块25，显然地，透明锥状挡块25的轴截面三角形的底边长度d要小于像素电极241的间距Δd。进一步地，透明锥状挡块25的轴截面三角形的底边长度d为像素电极241的间距Δd的0.5-0.6。
此外，锥状透明挡块25为锥状，沿衬底21向绝缘层23的方向(即，图2中的z方向)，该锥状透明挡块25的横截面(垂直z方向的截面)的大小逐渐减小，该透明锥状挡块25的横截面的最大宽度也要小于像素电极241的间距Δd。进一步地，透明锥状挡块25的横截面的最大宽度为像素电极241的间距Δd的0.5-0.6。
可选地，透明锥状挡块25的高度为像素电极层24的厚度的(8-12)倍。进一步地，透明锥状挡块25的高度为0.8-1.2μm。优选为0.9-1.1μm。这样可以更好地抑制液晶分子朝z方向偏转。
图3为本发明中像素电极层24的俯视图，如图3所示，像素电极层24包括矩阵排列的数个像素电极241，像素电极241为条状。相邻像素电极241的间距Δd为3.6-4.2μm。像素电极241的宽度w为2.8-3.4μm。
在本发明一实施方式中，相邻像素电极241的间距Δd为3.9μm。像素电 极241的宽度3.1μm。透明锥状挡块25的最大宽度d为2.0μm，其距左、右两个相邻的像素电极241之间的距离均为0.95μm。
透明锥状挡块25的材质为感光型负性光阻。它可以通过在像素电极241之间涂布形成一定厚度的透明薄膜，然后采用预定形状的掩膜板(掩膜板的透光区的形状与透明锥状挡块25的形状相匹配)进行曝光，最后经显影，在像素电极241之间形成透明锥状挡块25。
像素电极层24和公共电极层22均由透明导电材料构成，透明导电材料选自氧化铟锡(ITO)、氧化铟锌(IZO)、掺铝氧化锌(AZO)、掺氟二氧化锡(FTO)和掺磷二氧化锡(PTO)中的一种。
其中，公共电极层22为面状电极，整面覆盖在衬底21上。
本发明实施例提供的阵列基板200中，相邻像素电极241之间设有锥状透明挡块25，当在给所述像素电极241、公共电极层25之间施加电压时，该透明锥状挡块25能限制位于像素电极241的边缘范围内的液晶分子向z方向偏转，尽量使液晶分子处于平躺状态，使液晶分子平行于阵列基板200的平面(xy平面)上发生转动。这就避免了像素电极241的边缘区域的光的穿透率不致减少。
图2提供的液晶显示面板中，CF基板100为液晶显示技术领域常用的基板，CF基板100的具体结构为现有技术，这里不再展开描述。
此外，至于阵列基板200，除了具有图2所示出的结构外，还可包括其他常规结构，例如位于像素电极241上的平坦层，位于平坦层之上的液晶配向膜等，将构成液晶层300的液晶材料可以涂覆到阵列基板上液晶配向膜区域。
该液晶层300中的液晶分子可以为具有介电各向异性的正性向列型液晶， 例如为二氰基苯类液晶、哒嗪类液晶、席夫碱类液晶、氧化偶氮类液晶、联苯类液晶、苯基环己烷类液晶、嘧啶类液晶、二氧六环类液晶、双环辛烷类液晶、立方烷类液晶等，但不限于此。
图2的FFS显示模式的液晶显示面板中，阵列基板200上的相邻像素电极241之间设有锥状透明挡块25，当在给所述像素电极241、公共电极层25之间施加电压时，该透明锥状挡块25能限制位于像素电极241的边缘范围内的液晶分子向z方向偏转，尽量使液晶分子处于平躺状态，使液晶分子平行于阵列基板200的平面(xy平面)上发生转动。这就避免了像素电极241的边缘区域的光的穿透率不致减少，也避免了白画面的亮度降低，进而提高了该液晶显示面板的对比度。其中，对比为全白画面的亮度与全黑画面的亮度的比值。
需要说明的是，根据上述说明书的揭示和和阐述，本发明所属领域的技术人员还可以对上述实施方式进行变更和修改。因此，本发明并不局限于上面揭示和描述的具体实施方式，对本发明的一些等同修改和变更也应当在本发明的权利要求的保护范围之内。此外，尽管本说明书中使用了一些特定的术语，但这些术语只是为了方便说明，并不对本发明构成任何限制。

Claims (20)

  1. 一种阵列基板，其中，所述阵列基板包括：
    衬底，
    覆盖所述衬底的公共电极层，
    层叠于所述公共电极层上的绝缘层，
    位于所述绝缘层上的像素电极层；所述像素电极层包括矩阵排列的数个像素电极，相邻的像素电极之间设有透明锥状挡块，所述透明锥状挡块在垂直所述公共电极层方向上的轴截面为三角形。
  2. 如权利要求1所述的阵列基板，其中，所述轴截面的三角形的底角为30-60°。
  3. 如权利要求2所述的阵列基板，其中，所述轴截面的三角形的底角为45°。
  4. 如权利要求1所述的阵列基板，其中，所述透明锥状挡块的顶点距相邻的所述像素电极之间的距离相等。
  5. 如权利要求1所述的阵列基板，其中，所述透明锥状挡块的高度为所述像素电极层的厚度的(8-12)倍。
  6. 如权利要求5所述的阵列基板，其中，所述透明锥状挡块的高度为 0.8-1.2μm。
  7. 如权利要求5所述的阵列基板，其中，透明锥状挡块的高度为0.9-1.1μm。
  8. 如权利要求1所述的阵列基板，其中，所述轴截面的三角形的底边长度为相邻的所述像素电极的间距的0.5-0.6。
  9. 如权利要求1所述的阵列基板，其中，沿所述衬底向所述绝缘层的厚度方向，所述锥状透明挡块的横截面的大小逐渐减小。
  10. 如权利要求9所述的阵列基板，其中，所述透明锥状挡块的横截面的最大宽度为相邻的所述像素电极的间距的0.5-0.6。
  11. 如权利要求4所述的阵列基板，其中，所述相邻的像素电极的间距为3.6-4.2μm。
  12. 如权利要求8所述的阵列基板，其中，所述相邻的像素电极的间距为3.6-4.2μm。
  13. 如权利要求1所述的阵列基板，其中，所述像素电极的宽度为2.8-3.4μm。
  14. 如权利要求1所述的阵列基板，其中，所述透明锥状挡块的材质为感光型负性光阻。
  15. 如权利要求1所述的阵列基板，其中，所述像素电极层由透明导电材料构成，所述透明导电材料选自氧化铟锡、氧化铟锌、掺铝氧化锌、掺氟二氧化锡和掺磷二氧化锡中的至少一种。
  16. 如权利要求1所述的阵列基板，其中，所述公共电极层由透明导电材料构成；所述透明导电材料选自氧化铟锡、氧化铟锌、掺铝氧化锌、掺氟二氧化锡和掺磷二氧化锡中的至少一种。
  17. 一种液晶显示面板，包括相对设置的彩膜基板和阵列基板，以及夹持在所述彩膜基板和阵列基板之间的液晶层；其中，所述阵列基板包括：衬底，
    覆盖所述衬底的公共电极层，
    层叠于所述公共电极层上的绝缘层，
    位于所述绝缘层上的像素电极层；所述像素电极层包括矩阵排列的数个像素电极，相邻的像素电极之间设有透明锥状挡块，所述透明锥状挡块在垂直所述公共电极层方向上的轴截面为三角形。
  18. 如权利要求1所述的液晶显示面板，其中，所述轴截面的三角形的底角为30-60°。
  19. 如权利要求1所述的液晶显示面板，其中，所述透明锥状挡块的高度为所述像素电极层的厚度的(8-12)倍。
  20. 如权利要求1所述的液晶显示面板，其中，所述透明锥状挡块的材质为感光型负性光阻。
PCT/CN2017/108686 2017-09-26 2017-10-31 一种阵列基板及液晶显示面板 WO2019061652A1 (zh)

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