WO2019047339A1 - 显示面板的修复方法及显示面板 - Google Patents

显示面板的修复方法及显示面板 Download PDF

Info

Publication number
WO2019047339A1
WO2019047339A1 PCT/CN2017/107024 CN2017107024W WO2019047339A1 WO 2019047339 A1 WO2019047339 A1 WO 2019047339A1 CN 2017107024 W CN2017107024 W CN 2017107024W WO 2019047339 A1 WO2019047339 A1 WO 2019047339A1
Authority
WO
WIPO (PCT)
Prior art keywords
repair
segment
display panel
line
operational amplifier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2017/107024
Other languages
English (en)
French (fr)
Inventor
何怀亮
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HKC Co Ltd
Original Assignee
HKC Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by HKC Co Ltd filed Critical HKC Co Ltd
Priority to US15/738,718 priority Critical patent/US10718984B2/en
Publication of WO2019047339A1 publication Critical patent/WO2019047339A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells

Definitions

  • the present application relates to the field of display technologies, and in particular, to a repair method of a display panel and a display panel.
  • TFT-LCD Thin Film Transistor Liquid Crystal Display is one of the main types of flat panel display, and has become an important display platform in modern IT and video products.
  • the main driving principle of the thin film transistor liquid crystal display is that the system motherboard connects the R/G/B compression signal, the control signal and the power through the wire to the connector on the printed circuit board (PCB), and the data passes through the printed circuit.
  • the on-board timing controller (TCON Timing Controller) chip After the on-board timing controller (TCON Timing Controller) chip is processed, the printed circuit board passes through the S-COF Source-Chip on Film and the gate drive chip (G-COF Gate-Chip on Film). ) is connected to the display area so that the display obtains the required power and signal.
  • line defects may occur due to process defects, such as breakpoints in the middle of the data line.
  • the existing repair method transmits data to the breakpoint through the repair line set in the non-display area, because the repair line has a longer impedance than the normal transmission path, in order to avoid the influence of the resistance and capacitance during the repair line trace.
  • the voltage that is output to the breakpoint is lower than the target voltage.
  • the data line needs to be connected to a printed circuit board (PCB), and an operational amplifier (OP Operational Amplifier) that adds a large driving capability on the printed circuit board is used to increase the repair line.
  • the output thrust is used to increase the repair line.
  • the present application provides a repair method and a display panel for a display panel that reduces the impedance of a repair line.
  • a method for repairing a display panel includes a display area, a non-display area, and a target data line, the target data line including a first end, a second end, and the display area on both sides of the display area
  • the display panel further includes a plurality of gate driving chips, and the gate driving chip is provided with an operational amplifier
  • the repairing method includes:
  • An output terminal of the operational amplifier is connected to an output end of the gate driving chip for amplifying a repair signal transmitted by the repair line; and an output end of the gate driving chip and a next gate are used by the first portion
  • the input end of the driver chip is connected;
  • the method further includes: sequentially connecting the plurality of gate driving chips by using the first portion.
  • the method further includes:
  • An operational amplifier within the plurality of gate drive chips is coupled in series with the second portion of the second segment for cascading conduction amplification of the repair signal.
  • the method further includes:
  • the target data line includes a plurality of target sub data lines
  • the repair line is provided with a plurality of sub-repair lines corresponding to the plurality of target sub-data lines;
  • the second portions of the plurality of sub-repair lines are respectively connected to different operational amplifiers in the gate drive chip.
  • the method further includes:
  • the target data line includes a plurality of target sub data lines
  • the repair line is provided with a plurality of sub-repair lines corresponding to the plurality of target sub-data lines;
  • the first portion of the plurality of sub-repair lines is connected to different gate drive chips.
  • a display panel comprising:
  • the gate driving chip is provided with an operational amplifier
  • a target data line including a first end on the two sides of the display area, a second end, and a break point located in the display area; a repair line disposed in the non-display area for transmitting a repair signal to the target data
  • the breakpoint of the line, the repair line includes a first segment, a second segment, and a third segment connected in sequence;
  • An operational amplifier connected to the repair line for amplifying the repair signal transmitted by the repair line;
  • the first segment is configured to connect a first end of the target data line and an input end of a gate driving chip
  • the second segment is divided into a first portion and a second portion, the second portion is disposed in the gate driving chip, and the second portion inputs an input end of the gate driving chip and an input of the operational amplifier End connection, the second part also magnifies the operation
  • the output end of the device is connected to the output end of the gate driving chip for amplifying the repair signal transmitted by the repair line; the first portion is to output the output end of one gate driving chip and the next gate driving chip
  • the input terminal is connected; the third segment is configured to connect an output end of the last gate driving chip connected to the second segment and a second end of the target data line.
  • the second portion of the second segment is connected in series with an operational amplifier within the plurality of gate drive chips for cascading conduction to amplify the repair signal.
  • the target data line includes a plurality of target sub-data lines
  • the repair line is provided with a plurality of sub-repair lines corresponding to the plurality of target sub-data lines;
  • the second portions of the plurality of sub-repair lines are respectively connected to different operational amplifiers in the gate drive chip.
  • the target data line includes a plurality of target sub-data lines
  • the repair line is provided with a plurality of sub-repair lines corresponding to the plurality of target sub-data lines;
  • the first portion of the plurality of sub-repair lines is connected to different gate drive chips.
  • the second section of the repair line is divided into the first part and the second part, the second part is disposed in the gate driving chip, and the second part of the gate driving chip is processed by the wiring
  • the tracking process of the non-display area of the display panel is higher, and the impedance of the second part of the second section of the repair line in the gate drive chip is negligible, and the impedance and uniformity are superior to those of the non-display area.
  • the impedance of the repair line of the present application is lower than that of the conventional repair line trace, and the operational capability of the operational amplifier is reduced, the cost is reduced, and the implementation is easy.
  • the repair line that passes through the non-display area traces in the conventional design is changed to be transmitted through the non-display area and the gate drive chip, and the internal drive amplifier of the gate drive chip is used to increase the drive capability of the data on the repair line.
  • the repair line in this embodiment has a short transmission path in the non-display area, and the requirement for the output capacity of the operational amplifier is also reduced correspondingly after the impedance is lowered.
  • the operational amplifier output capability of the gate driver chip is lower than that of the conventional external operational amplifier, the drive requirement can be satisfied because the repair line impedance is lowered.
  • the op amp that increases the push line push capability is the op amp for the gate drive chip, eliminating the need for op amps on the printed circuit board to optimize routing.
  • the original operational amplifier of the gate driver chip can be used to increase the push capability, no additional operational amplifier is needed, the circuit is optimized, the components of the external operational amplifier and the cost of the injection can be saved, the product cost can be reduced, and the cost can be reduced.
  • the power of the repair line is reduced, and the influence on peripheral components is reduced.
  • FIG. 1 is a schematic diagram of a repair method of a display panel according to an example
  • FIG. 2 is a flow chart of a method for repairing a display panel in an embodiment
  • FIG. 3 is a schematic view of a display panel in an embodiment
  • FIG. 4 is a schematic diagram of the interior of a gate driving chip in an embodiment
  • FIG. 5 is a schematic diagram of a gate drive chip connection in an embodiment.
  • FIG. 1 is a schematic diagram of a method for repairing a display panel in which an A point on a data line is a break point, and the display is not displayed from the A point to the ground side, and is represented as a broken line.
  • the repair line (Repair Line) 410 and the overlap point B, C of the data line are laser-welded, the data of the AB segment is transmitted through the original data line, and the data of the AC segment is transmitted through the repair line 410.
  • the final line fix is achieved.
  • the display panel includes a display area (Display Area), a non-display area (Fan Out Area), and a target data line, and the undisplayed area is disposed around an edge of the display area.
  • the target data line includes a first end on the two sides of the display area, a second end, and a break point located in the display area. The first end and the second end are located in the non-display area, and the display panel further includes a plurality of gate driving chips.
  • An operational amplifier is provided in the pole drive chip, and the repair method includes steps S110-S150.
  • S140 dividing the second segment into the first portion and the second portion, the second portion is disposed in the gate driving chip, and the second portion is used to connect the input end of the gate driving chip and the input end of the operational amplifier, and further utilize the second portion Connecting the output end of the operational amplifier to the output end of the gate driving chip for amplifying the repair signal transmitted by the repair line; using the first part to drive a gate driving chip The output end is connected to the input end of the next gate driving chip;
  • S150 connecting, by using the third segment, the output end of the gate driving chip connected to the second segment and the second end of the target data line, and transmitting the repair signal amplified by the operational amplifier to the second end of the target data line point.
  • the second section of the repair line is divided into a first part and a second part, the second part is disposed in the gate driving chip, and the process of the second part of the wiring inside the gate driving chip is larger than the routing process of the non-display area of the display panel Advanced, the second part of the second section of the repair line in the gate drive chip has negligible impedance, and its impedance and uniformity are superior to those of the non-display area.
  • the impedance of the repair line trace of this embodiment It is lower than the impedance of the traditional repair line trace, which reduces the drive capability of the operational amplifier, reduces the cost, and is easy to implement.
  • the second part is used to connect the input end and the output end of the gate driving chip, and the second part is used to connect an operational amplifier in the gate driving chip between the input end and the output end of the gate driving chip for transmitting the repair line.
  • the repair signal is amplified.
  • the repair line that passes through the non-display area traces in the conventional design is changed to be transmitted through the non-display area and the gate drive chip, and the internal drive amplifier of the gate drive chip is used to increase the drive capability of the data on the repair line.
  • the repair line in this embodiment has a short transmission path in the non-display area, and the requirement for the output capacity of the operational amplifier is also reduced correspondingly after the impedance is lowered.
  • the operational amplifier output capability of the gate driver chip is lower than that of the conventional external operational amplifier, the drive requirement can be satisfied because the repair line impedance is lowered.
  • the op amp that increases the push line push capability is the op amp for the gate drive chip, eliminating the need for op amps on the printed circuit board to optimize routing.
  • the original operational amplifier of the gate driver chip can be used to increase the push capability, no additional operational amplifier is needed, the circuit is optimized, the components of the external operational amplifier and the cost of the injection can be saved, the product cost can be reduced, and the cost can be reduced.
  • the power of the repair line is reduced, and the influence on peripheral components is reduced.
  • the operational capability of the operational amplifier is reduced. It is also possible to add a new operational amplifier with a small driving capability externally, or to find a suitable operational amplifier or a plurality of combined operational amplifiers in the existing circuit as needed.
  • a plurality of gate driving chips are sequentially connected by using the first portion. Using the first part of the repair line to connect all of the gate drive chips in sequence, the impedance can be minimized.
  • the method further includes: using the second portion of the second segment to serially connect the operational amplifiers in the plurality of gate drive chips for cascading conduction to amplify the repair signal. Reducing the drive capability requirements for repairing on-line drive op amps, and also using multiple op amps with low drive capability inside the gate drive chip to increase drive capability. It can be realized that an operational amplifier in a gate driving chip cannot satisfy the driving capability, and the effect of driving a large load by a plurality of small thrust operational amplifiers is achieved by cascade conduction of the operational amplifiers in the plurality of gate driving chips. A breakpoint can be driven by an operational amplifier inside the gate drive chip. Driven in combination with an internal operational amplifier that is driven by multiple gate drive chips.
  • the output of the source driver chip is driven by an operational amplifier inside the first gate driving chip, and then input to an operational amplifier inside the second gate driving chip, and then amplified by thrust and output to the third gate.
  • the driving chip, and so on achieves the effect of driving a large load by a plurality of small thrust operational amplifiers by means of cascade conduction.
  • the target data line includes a plurality of target sub-data lines; the repair line sets a plurality of sub-repair lines corresponding to the plurality of target sub-data lines; and the second portion of the plurality of sub-repair lines are respectively connected to different operational amplifiers in the gate driving chip.
  • the operational amplifier is used to amplify the repair signals of the plurality of sub-repair lines.
  • a plurality of data lines appear on the display panel, and a plurality of sub-repair lines are corresponding to the data lines corresponding to the plurality of break points.
  • the plurality of sub-repair lines adopt the scheme in the above embodiment, and the plurality of sub-repair lines pass through the non-display area.
  • the operational amplifier is different from the gate drive chip, and the repair signal is amplified by an operational amplifier in the gate drive chip. For example, if there are two data lines with breakpoints, then two sub-repair lines are set, two operational amplifiers are provided in the gate drive chip, and two sub-repair lines are respectively passed through two operational amplifiers of the gate drive chip, so that the conventional repair is compared.
  • the line reduces the traces in the non-display area, reduces the impedance, and reduces the driving capability of the operational amplifier.
  • the driving is performed by an operational amplifier in the gate driving chip, if the operational amplifier in one gate driving chip cannot satisfy the driving capability.
  • the effect of driving a large load by a plurality of small thrust operational amplifiers is achieved by cascade conduction through an operational amplifier in a plurality of gate drive chips.
  • the target data line includes a plurality of target sub-data lines; the repair line sets a plurality of sub-repair lines corresponding to the plurality of target sub-data lines; and the first portion of the plurality of sub-repair lines is connected to different gate driving chips.
  • the repair signal can be amplified by an operational amplifier within the gate drive chip.
  • the repair signal can also be amplified by an external operational amplifier.
  • a plurality of data lines appear on the display panel, and a plurality of sub-repair lines are corresponding to the data lines corresponding to the plurality of break points.
  • the plurality of sub-repair lines adopt the scheme in the above embodiment, and the plurality of sub-repair lines pass through the non-display area.
  • different gate drive chips and the repair signal is amplified by an operational amplifier within the gate drive chip. For example, if there are two data lines with breakpoints, then two sub-repair lines are set, and the two sub-repair lines respectively drive the chips through half of the gates.
  • the traces in the non-display area are reduced, and the impedance is reduced.
  • the driving capability of the operational amplifier is also reduced, and the driving is completed by an operational amplifier in the gate driving chip. If an operational amplifier in a gate driving chip cannot satisfy the driving capability, it is cascaded through an operational amplifier in a plurality of gate driving chips. The way of conduction achieves the effect of multiple small thrust op amps driving large loads.
  • FIG. 3 is a schematic diagram of a display panel in an example
  • FIG. 4 is a schematic diagram of the interior of the gate driving chip.
  • the display panel includes a display area 110 , a non-display area 120 , and a plurality of gate driving chips 220 .
  • target data line 230, target The data line 230 includes a first end B, a second end C, and a break point A located within the display area on either side of the display area.
  • An operational amplifier 221 is provided in the plurality of gate drive chips 220.
  • the display panel further includes a repair line 510; wherein the repair line 510 is disposed in the non-display area 120 for transmitting a repair signal to a breakpoint of the target data line, and the repair line 510 includes first, second, and third portions connected in sequence
  • An operational amplifier (not shown) is coupled to the repair line 510 for amplifying the repair signal transmitted by the repair line 510.
  • the first segment of the repair line 510 is used to connect the first end B of the target data line 230 with the input end of one gate drive chip 220; the second segment is divided into the first portion 240 and the second portion (not shown in the figure)
  • the second part is disposed in the gate driving chip 220, the second part connects the input end of the gate driving chip 220 and the input end of the operational amplifier, and the second part also outputs the output end of the operational amplifier and the gate driving chip.
  • the output terminal is connected to amplify the repair signal transmitted by the repair line; the first portion 240 connects the output end of one gate drive chip 220 to the input end of the next gate drive chip 220; the third segment is used to connect the second segment
  • the output terminal E of the last gate drive chip 220 connected is connected to the second terminal C of the target data line 230.
  • the overlapping points B and C of the repairing line 510 and the target data line 230 are laser-welded, the data of the AB segment is transmitted through the original data line, and the data of the AC segment is transmitted through the repairing line 510, and finally realized. Line repair.
  • the second segment of the repair line 510 passes through the plurality of gate driving chips 220, and the routing of the second portion of the second portion of the repair line 510 inside the gate driving chip 220 is smaller than that of the non-display region 120 of the display panel.
  • the impedance of the second portion of the second segment of the repair line 510 inside the gate drive chip 220 is negligible, and its impedance and uniformity are superior to those of the non-display region 120.
  • the impedance on the trace is lower than the impedance of the conventional repair line trace, which reduces the drive capability of the operational amplifier, reduces the cost, and is easy to implement.
  • the operational amplifier's drive capability requirements can be reduced by externally adding a new operational amplifier with a small drive capability, or a suitable operational amplifier or multiple combined operational amplifiers can be found in existing circuits as needed.
  • the operational amplifier 221 is disposed in the gate driving chip 220, and the second portion includes a front end wiring portion 251 connecting the input end of the gate driving chip 220 and the input terminal of the operational amplifier 221, and the output terminal of the operational amplifier 221 and the gate driving chip.
  • the repair line that passes through the non-display area traces in the conventional design is changed to be transmitted through the non-display area and the gate drive chip, and the internal operational amplifier 221 of the gate drive chip 220 is used to increase the drive capability of the data on the repair line.
  • the repair line in this embodiment has a short transmission path in the non-display area, and the requirement for the output capacity of the operational amplifier is also reduced correspondingly after the impedance is lowered.
  • the op amp output capability inside the gate driver chip is lower than that of the conventional external op amp, the repair line impedance is reduced. After that, the drive requirements can be met.
  • the operational amplifier that increases the repair line push capability is the operational amplifier 221 of the gate drive chip, eliminating the need for an op amp on the printed circuit board to optimize routing.
  • the original operational amplifier 221 of the gate driving chip 220 can be used to increase the pushing capability, no additional operational amplifier is needed, the circuit is optimized, the components of the external operational amplifier and the cost of the driving can be saved, and the product cost can be reduced.
  • the power of the repair line is reduced, and the influence on peripheral components is reduced.
  • the first portion 240 sequentially connects the plurality of gate driving chips 220. By sequentially connecting all of the gate drive chips 220 with the first portion 240 of the repair line 510, the impedance can be minimized.
  • the second portion of the second segment of the repair line 510 is connected in series with an operational amplifier within the plurality of gate drive chips for cascading conduction amplification of the repair signal. Reducing the drive capability requirements for repairing on-line drive op amps, and also using multiple op amps with low drive capability inside the gate drive chip to increase drive capability. It can be realized that an operational amplifier in a gate driving chip cannot satisfy the driving capability, and the effect of driving a large load by a plurality of small thrust operational amplifiers is achieved by cascade conduction of the operational amplifiers in the plurality of gate driving chips.
  • a breakpoint can be driven by an operational amplifier inside the gate drive chip or by an internal operational amplifier combination of multiple gate drive ICs.
  • the output of the source driver chip is driven by an operational amplifier inside the first gate driving chip, and then input to an operational amplifier inside the second gate driving chip, and then amplified by thrust and output to the third gate.
  • the driving chip, and so on achieves the effect of driving a large load by a plurality of small thrust operational amplifiers by means of cascade conduction.
  • the target data line includes a plurality of target sub-data lines; the repair line sets a plurality of sub-repair lines corresponding to the plurality of target sub-data lines; and the second part of the plurality of sub-repair lines are respectively connected to different operations in the gate drive chip Amplifier.
  • a plurality of data lines appear on the display panel, and a plurality of sub-repair lines are corresponding to the data lines corresponding to the plurality of break points.
  • the plurality of sub-repair lines adopt the scheme in the above embodiment, and the plurality of sub-repair lines pass through the non-display area.
  • the operational amplifier is different from the gate drive chip, and the repair signal is amplified by an operational amplifier in the gate drive chip. For example, if there are two data lines with breakpoints, then two sub-repair lines are set, two operational amplifiers are provided in the gate drive chip, and two sub-repair lines are respectively passed through two operational amplifiers of the gate drive chip, so that the conventional repair is compared.
  • the line reduces the traces in the non-display area, reduces the impedance, and reduces the driving capability of the operational amplifier.
  • the driving is performed by an operational amplifier in the gate driving chip, if the operational amplifier in one gate driving chip cannot satisfy the driving capability.
  • the effect of driving a large load by a plurality of small thrust operational amplifiers is achieved by cascade conduction through an operational amplifier in a plurality of gate drive chips.
  • the target data line includes a plurality of target sub-data lines; the repair line is provided with a plurality of sub-repair lines corresponding to the plurality of target sub-data lines; and the first portion of the plurality of sub-repair lines is connected to different gate driving chips.
  • a plurality of data lines appear on the display panel, and a plurality of sub-repair lines are corresponding to the data lines corresponding to the plurality of break points.
  • the plurality of sub-repair lines adopt the scheme in the above embodiment, and the plurality of sub-repair lines pass through the non-display area.
  • different gate drive chips and the repair signal is amplified by an operational amplifier within the gate drive chip. For example, if there are two data lines with breakpoints, then two sub-repair lines are set, and the two sub-repair lines respectively drive the chips through half of the gates.
  • the traces in the non-display area are reduced, and the impedance is reduced.
  • the driving capability of the operational amplifier is also reduced, and the driving is completed by an operational amplifier in the gate driving chip. If an operational amplifier in a gate driving chip cannot satisfy the driving capability, it is cascaded through an operational amplifier in a plurality of gate driving chips. The way of conduction achieves the effect of multiple small thrust op amps driving large loads.
  • FIG. 5 is a schematic diagram of a gate driving chip connection, wherein the I point of the repair line is connected to the input end of the operational amplifier 221 on the gate driving chip, and the O point of the repair line is connected to the output end of the operational amplifier 221 on the gate driving chip.
  • the M point of the scan line is connected to the first output of the gate drive signal of the gate drive chip control panel thin film transistor (TFT), and the N point of the scan line is connected to the gate of the control panel of the gate drive chip. The last one is output.
  • TFT gate drive chip control panel thin film transistor
  • the signal required to repair the line does not conflict with the line scan signal of the scan line itself.
  • the gate drive chip itself is a function of conducting high voltage (such as 30V) signals, and adding internal traces will not affect its existing functions.
  • each operational amplifier has an enhanced driving capability and can be single-amplified.
  • the function of the operational amplifier can be to equalize its output signal, the output voltage is constant, and the output current capability is enhanced. Waveform distortion caused by the effects of the end load.
  • Each operational amplifier can also be set to a corresponding multiple amplification as needed.
  • the display panel may be a TN (Twisted Nematic), an OCB (Optically Compensated Birefringence), or a VA (Vertical Alignment) liquid crystal display panel, but is not limited thereto.
  • the display panel may be an RGB three primary color panel, an RGBW four color panel, or an RGBY four color panel, but is not limited thereto.
  • the drive panel can be a curved panel.
  • the display panel may also be, for example, an OLED display panel, a QLED display panel, a curved display panel, or other display panel.

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Mathematical Physics (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

本申请涉及一种显示面板的修复方法及显示面板，目标数据线包括位于显示区域两边的第一端、第二端和位于显示区域内的断点，该修复方法包括：在非显示区域设置修复线；将修复线分成第一段、第二段和第三段；将目标数据线第一端和栅极驱动芯片输入端通过第一段连接；将第二段分成第一部分和第二部分，利用第二部分连接栅极驱动芯片内的运算放大器，用于将修复线传输的修复信号放大；利用第一部分将两个栅极驱动芯片连接；利用第三段将第二段连接的最后一个栅极驱动芯片输出端和目标数据线第二端连接，用于将运算放大器放大的修复信号经目标数据线第二端传输至断点。降低修复线的阻抗，利用栅极驱动芯片内的运算放大器放大修复信号。

Description

显示面板的修复方法及显示面板 技术领域
本申请涉及显示技术领域，特别是涉及一种显示面板的修复方法及显示面板。
背景技术
薄膜晶体管液晶显示器(TFT-LCD Thin Film Transistor Liquid Crystal Display)是当前平板显示的主要品种之一，已经成为了现代IT、视讯产品中重要的显示平台。薄膜晶体管液晶显示器主要驱动原理是，系统主板将R/G/B压缩信号、控制信号及动力通过线材与印制电路板(PCB板)上的连接器(connector)相连接，数据经过印制电路板上的时序控制器(TCON Timing Controller)芯片处理后，经印制电路板，通过源极驱动芯片(S-COF Source-Chip on Film)和栅极驱动芯片(G-COF Gate-Chip on Film)与显示区连接，从而使得显示器获得所需的电源、信号。
实际的使用中，因为制程缺陷，可能会造成线缺陷，如数据线中间出现断点。现有的修复方式通过设置在非显示区域的修复线(Repair Line)将数据传输至断点，因修复线比正常传输路径要长阻抗高，为避免修复线走线过程中的电阻电容的影响，导致输出至断点的电压较目标电压低，需要将数据线连接在印刷电路板(PCB)上，并在印刷电路板上增加较大驱动能力的运算放大器(OP Operational Amplifier)增大修复线的输出推力。
发明内容
本申请提供一种降低修复线阻抗的显示面板的修复方法及显示面板。
一种显示面板的修复方法，所述显示面板包括显示区域、非显示区域和目标数据线，所述目标数据线包括位于所述显示区域两边的第一端、第二端和位于所述显示区域内的断点，所述显示面板还包括多个栅极驱动芯片，所述栅极驱动芯片内设有运算放大器，所述修复方法包括：
在所述非显示区域设置修复线，用于将修复信号传送至所述目标数据线的所述断点；
将所述修复线分成依次相连的第一段、第二段和第三段；
将所述目标数据线的第一端和一个栅极驱动芯片的输入端通过所述第一段连接；
将所述第二段分成第一部分和第二部分，所述第二部分设置在所述栅极驱动芯片内，利用所述第二部分将所述栅极驱动芯片的输入端和所述运算放大器的输入端连接，还利用所述第二部分将所 述运算放大器的输出端与所述栅极驱动芯片的输出端连接，用于将所述修复线传输的修复信号放大；利用所述第一部分将一个栅极驱动芯片的输出端与下一个栅极驱动芯片的输入端连接；
利用所述第三段将所述第二段连接的最后一个栅极驱动芯片的输出端和所述目标数据线的第二端连接，用于将所述运算放大器放大的修复信号经所述目标数据线第二端传输至所述断点。
在其中一个实施例中，还包括：利用所述第一部分将所述多个栅极驱动芯片依次连接。
在其中一个实施例中，还包括：
利用所述第二段的第二部分串联所述多个栅极驱动芯片内的运算放大器，用于级联传导放大所述修复信号。
在其中一个实施例中，还包括：
所述目标数据线包括多条目标子数据线；
所述修复线对应所述多条目标子数据线设置多条子修复线；
所述多条子修复线的第二部分分别连接栅极驱动芯片内不同的运算放大器。
在其中一个实施例中，还包括：
所述目标数据线包括多条目标子数据线；
所述修复线对应所述多条目标子数据线设置多条子修复线；
所述多条子修复线的第一部分连接不同的栅极驱动芯片。
一种显示面板，包括：
显示区域；
非显示区域；
多个栅极驱动芯片，所述栅极驱动芯片内设有运算放大器；
目标数据线，包括位于所述显示区域两边的第一端、第二端和位于显示区域内的断点；修复线，设置在所述非显示区域，用于将修复信号传送至所述目标数据线的所述断点，所述修复线包括依次相连的第一段、第二段和第三段；
运算放大器，与所述修复线连接，用于将所述修复线传输的修复信号放大；其中，
所述第一段用于将所述目标数据线的第一端和一个栅极驱动芯片的输入端连接；
所述第二段分成第一部分和第二部分，所述第二部分设置在所述栅极驱动芯片内，所述第二部分将所述栅极驱动芯片的输入端和所述运算放大器的输入端连接，所述第二部分还将所述运算放大 器的输出端与所述栅极驱动芯片的输出端连接，用于将所述修复线传输的修复信号放大；所述第一部分将一个栅极驱动芯片的输出端与下一个栅极驱动芯片的输入端连接；所述第三段用于将所述第二段连接的最后一个栅极驱动芯片的输出端和目标数据线的第二端连接。
在其中一个实施例中，所述第二段的第二部分串联多个栅极驱动芯片内的运算放大器，用于级联传导放大所述修复信号。
在其中一个实施例中，所述目标数据线包括多条目标子数据线；
所述修复线对应所述多条目标子数据线设置多条子修复线；
所述多条子修复线的第二部分分别连接栅极驱动芯片内不同的运算放大器。
在其中一个实施例中，所述目标数据线包括多条目标子数据线；
所述修复线对应所述多条目标子数据线设置多条子修复线；
所述多条子修复线的第一部分连接不同的栅极驱动芯片。
上述显示面板的修复方法和显示面板中，修复线的第二段部分分成第一部分和第二部分，第二部分设置在栅极驱动芯片内，栅极驱动芯片内部的第二部分走线的制程比显示面板的非显示区域的走线制程要高级，栅极驱动芯片内的修复线第二段的第二部分的阻抗可以忽略，且其阻抗和均一性都要优于非显示区域的走线，本申请的修复线走线上的阻抗，要低于传统的修复线走线的阻抗，对运算放大器的驱动能力要求降低，降低成本，易于实现。将传统设计中全部通过非显示区域走线的修复线变更为通过非显示区域和栅极驱动芯片进行传输，并利用栅极驱动芯片内部运算放大器，增大修复线上数据的驱动能力。本实施例中的修复线在非显示区域传输路径变短，阻抗降低后对运算放大器输出能力的要求也相应降低。虽然栅极驱动芯片内部的运算放大器输出能力要低于传统的外置运算放大器，但是因为修复线阻抗降低后则可以满足驱动要求。增大修复线推送能力的运算放大器为栅极驱动芯片的运算放大器，不再需要通过印刷电路板上的运算放大器，优化了走线。可以利用栅极驱动芯片原有的运算放大器进行增大推送能力，不需要额外增加运算放大器，优化了电路，还可以节省掉外置运算放大器的元件和打件费用，降低产品成本，同时减小了修复线的功率，减少了对周边元件的影响。
附图说明
为了更清楚地说明本申请实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对 于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他实施例的附图。
图1为范例的一种显示面板的修复方法示意图；
图2为一实施例中的显示面板的修复方法的流程图；
图3为一实施例中的一种显示面板的示意图；
图4为一实施例中的栅极驱动芯片内部示意图；
图5为一实施例中的栅极驱动芯片连线的示意图。
具体实施方式
为了使本申请的目的、技术方案及优点更加清楚明白，以下结合附图及实施例，对本申请进行进一步详细说明。应当理解，此处所描述的具体实施例仅仅用以解释本申请，并不用于限定本申请。
图1为范例的一种显示面板的修复方法的示意图，其中，一条数据线上的A点为断点，造成从A点至地侧无法显示，表现为断线。为修复此断线，将修复线(Repair Line)410和该数据线的交叠点B、C通过镭射熔接，AB段的数据通过原有数据线传输，AC段的数据通过修复线410传输，最终实现线修复。因为通过修复线410将数据传输至A点的传输比正常传输路径要长，为避免修复线410走线过程中的电阻电容的影响，导致输出至A点的电压较目标电压低，需要将修复线410连接至印刷电路板上，通过运算放大器(OP Operational Amplifier)增大其输出推力。
图2为一实施例中显示面板的修复方法的流程图，其中显示面板包括显示区域(Display Area)、非显示区域(Fan Out Area)和目标数据线，未显示区域围绕显示区域的边缘设置，目标数据线包括位于显示区域两边的第一端、第二端和位于显示区域内的断点，第一端和第二端位于非显示区域内，显示面板还包括多个栅极驱动芯片，栅极驱动芯片内设有运算放大器，该修复方法包括步骤S110-S150。
S110：在非显示区域设置修复线，用于将修复信号传送至目标数据线的断点；
S120：将修复线分成依次相连的第一段、第二段和第三段；
S130：将目标数据线的第一端和一个栅极驱动芯片的输入端通过第一段连接；
S140：将第二段分成第一部分和第二部分，第二部分设置在栅极驱动芯片内，利用第二部分将栅极驱动芯片的输入端和运算放大器的输入端连接，还利用第二部分将运算放大器的输出端与栅极驱动芯片的输出端连接，用于将修复线传输的修复信号放大；利用第一部分将一个栅极驱动芯片 的输出端与下一个栅极驱动芯片的输入端连接；
S150：利用第三段将第二段通过的连接一个栅极驱动芯片的输出端和目标数据线的第二端连接，用于将运算放大器放大的修复信号经目标数据线第二端传输至断点。
修复线的第二段分成第一部分和第二部分，第二部分设置在栅极驱动芯片内，栅极驱动芯片内部的第二部分走线的制程比显示面板的非显示区域的走线制程要高级，栅极驱动芯片内的修复线第二段的第二部分的阻抗可以忽略，且其阻抗和均一性都要优于非显示区域的走线，本实施例的修复线走线上的阻抗，要低于传统的修复线走线的阻抗，对运算放大器的驱动能力要求降低，降低成本，易于实现。
其中利用第二部分将栅极驱动芯片输入端和输出端连接包括：利用第二部分将栅极驱动芯片输入端和输出端之间串联栅极驱动芯片内的运算放大器，用于将修复线传输的修复信号放大。将传统设计中全部通过非显示区域走线的修复线变更为通过非显示区域和栅极驱动芯片进行传输，并利用栅极驱动芯片内部运算放大器，增大修复线上数据的驱动能力。本实施例中的修复线在非显示区域传输路径变短，阻抗降低后对运算放大器输出能力的要求也相应降低。虽然栅极驱动芯片内部的运算放大器输出能力要低于传统的外置运算放大器，但是因为修复线阻抗降低后则可以满足驱动要求。增大修复线推送能力的运算放大器为栅极驱动芯片的运算放大器，不再需要通过印刷电路板上的运算放大器，优化了走线。可以利用栅极驱动芯片原有的运算放大器进行增大推送能力，不需要额外增加运算放大器，优化了电路，还可以节省掉外置运算放大器的元件和打件费用，降低产品成本，同时减小了修复线的功率，减少了对周边元件的影响。
当然运算放大器的驱动能力要求降低还可以通过外部增加新的驱动能力较小的运算放大器，也可以根据需要在现有电路中找一个合适的运算放大器、或多个组合运算放大器。
进一步地，利用第一部分将多个栅极驱动芯片依次连接。利用修复线的第一部分将所有的栅极驱动芯片依次连接起来，可以最大限度的降低阻抗。
进一步的，该方法还包括：利用第二段的第二部分串联多个栅极驱动芯片内的运算放大器，用于级联传导放大所述修复信号。降低对修复线上驱动运算放大器的驱动能力需求，还利用多个栅极驱动芯片内部低驱动能力的运算放大器增大驱动能力。可以实现一个栅极驱动芯片内的运算放大器不能满足驱动能力，则通过多个栅极驱动芯片内的运算放大器通过级联传导的方式达到多个小推力运算放大器驱动大负载的效果。一个断点可以通过一个栅极驱动芯片内部的运算放大器驱动，也可 以通过多个栅极驱动芯片的内部运算放大器组合驱动。即源极驱动芯片的输出，经过第一个栅极驱动芯片内部的运算放大器驱动后，再输入至第二个栅极驱动芯片内部的运算放大器，经过推力放大后再输出至第三个栅极驱动芯片，依次类推，通过级联传导的方式达到多个小推力运算放大器驱动大负载的效果。
可选地，目标数据线包括多条目标子数据线；修复线对应多条目标子数据线设置多条子修复线；多条子修复线的第二部分分别连接栅极驱动芯片内不同的运算放大器。利用运算放大器将多条子修复线的修复信号放大。
针对显示面板上有多条数据线出现断点，对应多条出现断点的数据线对应设置多条子修复线，多条子修复线都采用上述实施方式中的方案，多条子修复线经过非显示区域和栅极驱动芯片不同的运算放大器，并通过栅极驱动芯片内的运算放大器将修复信号放大。例如有两条数据线出现断点，则设置两条子修复线，栅极驱动芯片内设有两个运算放大器，两条子修复线分别通过栅极驱动芯片的两个运算放大器，如此对比传统的修复线减少了在非显示区域的走线，降低了阻抗，对运算放大器的驱动能力也降低，通过栅极驱动芯片内的运算放大器完成驱动，如果一个栅极驱动芯片内的运算放大器不能满足驱动能力则通过多个栅极驱动芯片内的运算放大器通过级联传导的方式达到多个小推力运算放大器驱动大负载的效果。
还可选地，目标数据线包括多条目标子数据线；修复线对应多条目标子数据线设置多条子修复线；多条子修复线的第一部分连接不同的栅极驱动芯片。可以栅极驱动芯片内的运算放大器将修复信号放大。还可以通过外部的运算放大器将修复信号放大。
针对显示面板上有多条数据线出现断点，对应多条出现断点的数据线对应设置多条子修复线，多条子修复线都采用上述实施方式中的方案，多条子修复线经过非显示区域和不同的栅极驱动芯片，并通过栅极驱动芯片内的运算放大器将修复信号放大。例如有两条数据线出现断点，则设置两条子修复线，两条子修复线分别通过一半的栅极驱动芯片，如此对比传统的修复线减少了在非显示区域的走线，降低了阻抗，对运算放大器的驱动能力也降低，通过栅极驱动芯片内的运算放大器完成驱动，如果一个栅极驱动芯片内的运算放大器不能满足驱动能力则通过多个栅极驱动芯片内的运算放大器通过级联传导的方式达到多个小推力运算放大器驱动大负载的效果。
图3为一实例中一种显示面板的示意图，图4为栅极驱动芯片内部示意图，结合图3和图4，该显示面板包括显示区域110、非显示区域120、多个栅极驱动芯片220和目标数据线230，目标 数据线230包括位于显示区域两边的第一端B、第二端C和位于显示区域内的断点A。多个栅极驱动芯片220内设有运算放大221。显示面板还包括修复线510；其中修复线510设置在非显示区域120，用于将修复信号传送至目标数据线的断点，修复线510包括依次相连的第一段、第二段和第三段；运算放大器(图中未示出)与修复线510连接，用于将修复线510传输的修复信号放大。具体的，修复线510第一段用于将目标数据线230的第一端B和一个栅极驱动芯片220的输入端连接；第二段分成第一部分240和第二部分(图中未示出)，第二部分设置在栅极驱动芯片220内，第二部分将栅极驱动芯片220的输入端和运算放大器的输入端连接，第二部分还将运算放大器的输出端与栅极驱动芯片的输出端连接，用于将修复线传输的修复信号放大；第一部分240将一个栅极驱动芯片220的输出端与下一个栅极驱动芯片220的输入端连接；第三段用于将第二段连接的最后一个栅极驱动芯片220的输出端E和目标数据线230的第二端C连接。其中为修复此断线，将修复线510和目标数据线230的交叠点B、C通过镭射熔接，AB段的数据通过原有数据线传输，AC段的数据通过修复线510传输，最终实现线修复。
修复线510的第二段经过多个栅极驱动芯片220，栅极驱动芯片220内部的修复线510第二段的第二部分的走线的制程比显示面板的非显示区域120的走线制程要高级，栅极驱动芯片220内部的修复线510第二段的第二部分的阻抗可以忽略，且其阻抗和均一性都要优于非显示区域120的走线，本实施例的修复线510走线上的阻抗，要低于传统的修复线走线的阻抗，对运算放大器的驱动能力要求降低，降低成本，易于实现。运算放大器的驱动能力要求降低可以通过外部增加新的驱动能力较小的运算放大器，也可以根据需要在现有电路中找一个合适的运算放大器、或多个组合运算放大器。
运算放大器221设置在栅极驱动芯片220内，第二部分包括将栅极驱动芯片220输入端和运算放大器221输入端连接的前端走线部分251，和将运算放大器221输出端和栅极驱动芯片220输出端连接的后端走线部分252。如果为最后一个栅极驱动芯片220，则其输入端D连接修复线510，输出端E连接目标数据线的第二端C。
将传统设计中全部通过非显示区域走线的修复线变更为通过非显示区域和栅极驱动芯片进行传输，并利用栅极驱动芯片220内部运算放大器221，增大修复线上数据的驱动能力。本实施例中的修复线在非显示区域传输路径变短，阻抗降低后对运算放大器输出能力的要求也相应降低。虽然栅极驱动芯片内部的运算放大器输出能力要低于传统的外置运算放大器，但是因为修复线阻抗降低 后则可以满足驱动要求。增大修复线推送能力的运算放大器为栅极驱动芯片的运算放大器221，不再需要通过印刷电路板上的运算放大器，优化了走线。可以利用栅极驱动芯片220原有的运算放大器221进行增大推送能力，不需要额外增加运算放大器，优化了电路，还可以节省掉外置运算放大器的元件和打件费用，降低产品成本，同时减小了修复线的功率，减少了对周边元件的影响。
进一步地，第一部分240将多个栅极驱动芯片220依次连接。利用修复线510的第一部分240将所有的栅极驱动芯片220依次连接起来，可以最大限度的降低阻抗。
进一步的，修复线510第二段的第二部分串联多个栅极驱动芯片内的运算放大器，用于级联传导放大所述修复信号。降低对修复线上驱动运算放大器的驱动能力需求，还利用多个栅极驱动芯片内部低驱动能力的运算放大器增大驱动能力。可以实现一个栅极驱动芯片内的运算放大器不能满足驱动能力，则通过多个栅极驱动芯片内的运算放大器通过级联传导的方式达到多个小推力运算放大器驱动大负载的效果。一个断点可以通过一个栅极驱动芯片内部的运算放大器驱动，也可以通过多个栅极驱动芯片的内部运算放大器组合驱动。即源极驱动芯片的输出，经过第一个栅极驱动芯片内部的运算放大器驱动后，再输入至第二个栅极驱动芯片内部的运算放大器，经过推力放大后再输出至第三个栅极驱动芯片，依次类推，通过级联传导的方式达到多个小推力运算放大器驱动大负载的效果。
可选地，目标数据线包括多条目标子数据线；修复线对应所述多条目标子数据线设置多条子修复线；多条子修复线的第二部分分别连接栅极驱动芯片内不同的运算放大器。
针对显示面板上有多条数据线出现断点，对应多条出现断点的数据线对应设置多条子修复线，多条子修复线都采用上述实施方式中的方案，多条子修复线经过非显示区域和栅极驱动芯片不同的运算放大器，并通过栅极驱动芯片内的运算放大器将修复信号放大。例如有两条数据线出现断点，则设置两条子修复线，栅极驱动芯片内设有两个运算放大器，两条子修复线分别通过栅极驱动芯片的两个运算放大器，如此对比传统的修复线减少了在非显示区域的走线，降低了阻抗，对运算放大器的驱动能力也降低，通过栅极驱动芯片内的运算放大器完成驱动，如果一个栅极驱动芯片内的运算放大器不能满足驱动能力则通过多个栅极驱动芯片内的运算放大器通过级联传导的方式达到多个小推力运算放大器驱动大负载的效果。
还可选地，目标数据线包括多条目标子数据线；修复线对应所述多条目标子数据线设置多条子修复线；多条子修复线的第一部分连接不同的栅极驱动芯片。
针对显示面板上有多条数据线出现断点，对应多条出现断点的数据线对应设置多条子修复线，多条子修复线都采用上述实施方式中的方案，多条子修复线经过非显示区域和不同的栅极驱动芯片，并通过栅极驱动芯片内的运算放大器将修复信号放大。例如有两条数据线出现断点，则设置两条子修复线，两条子修复线分别通过一半的栅极驱动芯片，如此对比传统的修复线减少了在非显示区域的走线，降低了阻抗，对运算放大器的驱动能力也降低，通过栅极驱动芯片内的运算放大器完成驱动，如果一个栅极驱动芯片内的运算放大器不能满足驱动能力则通过多个栅极驱动芯片内的运算放大器通过级联传导的方式达到多个小推力运算放大器驱动大负载的效果。
图5为栅极驱动芯片连线的示意图，其中修复线的I点连接至栅极驱动芯片上运算放大器221的输入端，修复线的O点连接至栅极驱动芯片上运算放大器221的输出端，扫描线的M点连接至栅极驱动芯片控制面板薄膜晶体管(TFT)栅极开启讯号的第一路输出，扫描线的N点连接至栅极驱动芯片的控制面板薄膜晶体管栅极开启讯号的最后一路输出。修复线所需的讯号不会与扫描线本身的行扫描讯号发生冲突。并且栅极驱动芯片本身就是传导高压(如30V)讯号的功能，新增内部走线不会对其现有功能产生影响。
上述实施方式中，每个运算放大器的作用均为增强驱动能力，可以为单倍放大，其作用可以是将其输出讯号等于其输入讯号，输出电压不变，输出电流能力增强，减小因后端负载的影响造成的波形失真。每个运算放大器也可以根据需要设为对应倍数放大。
上述显示面板可以为TN(Twisted Nematic，扭曲向列)、OCB(Optically Compensated Birefringence，光学补偿弯曲排列)、VA(Vertical Alignment，垂直配向)型液晶显示面板，但并不限于此。该显示面板可以为RGB三原色面板、RGBW四色面板或者RGBY四色面板，但并不限于此。该驱动面板可以为曲面面板。
其中，显示面板还可例如为OLED显示面板、QLED显示面板、曲面显示面板或其他显示面板。
以上所述实施例的各技术特征可以进行任意的组合，为使描述简洁，未对上述实施例中的各个技术特征所有可能的组合都进行描述，然而，只要这些技术特征的组合不存在矛盾，都应当认为是本说明书记载的范围。
以上所述实施例仅表达了本申请的几种实施方式，其描述较为具体和详细，但并不能因此而理解为对申请专利范围的限制。应当指出的是，对于本领域的普通技术人员来说，在不脱离本申请构思的前提下，还可以做出若干变形和改进，这些都属于本申请的保护范围。因此，本申请专利的保 护范围应以所附权利要求为准。

Claims (20)

  1. 一种显示面板的修复方法，所述显示面板包括显示区域、非显示区域和目标信号线，所述目标数据线包括位于所述显示区域两边的第一端、第二端和位于所述显示区域内的断点，所述显示面板还包括多个驱动芯片，所述驱动芯片内设有运算放大器，所述修复方法包括：
    在所述非显示区域设置修复线，用于将修复信号传送至所述目标数据线的所述断点；
    将所述修复线分成依次相连的第一段、第二段和第三段；
    将所述目标数据线的第一端和一个驱动芯片的输入端通过所述第一段连接；
    将所述第二段分成第一部分和第二部分；
    其中，所述第二部分设置在所述驱动芯片内，利用所述第二部分将所述驱动芯片的输入端和所述运算放大器的输入端连接，还利用所述第二部分将所述运算放大器的输出端与所述驱动芯片的输出端连接，用于将所述修复线传输的修复信号放大；
    利用所述第一部分将一个驱动芯片的输出端与下一个驱动芯片的输入端连接；
    利用所述第三段将所述第二段连接的最后一个驱动芯片的输出端和所述目标数据线的第二端连接，用于将所述运算放大器放大的修复信号经所述目标数据线第二端传输至所述断点。
  2. 根据权利要求1所述的显示面板的修复方法，还包括：利用所述第一部分将所述多个驱动芯片依次连接。
  3. 根据权利要求1所述的显示面板的修复方法，还包括：利用所述第二段的第二部分串联所述多个驱动芯片内的运算放大器。
  4. 根据权利要求3所述的显示面板的修复方法，其中，所述第二段的第二部分与所述运算放大器，用于级联传导放大所述修复信号。
  5. 根据权利要求1所述的显示面板的修复方法，其中，所述目标数据线包括多条目标子数据线。
  6. 根据权利要求5所述的显示面板的修复方法，其中，所述修复线对应所述多条目标子数据线设置多条子修复线。
  7. 根据权利要求6所述的显示面板的修复方法，其中，所述多条子修复线的第二部分分别连接驱动芯片内不同的运算放大器。
  8. 根据权利要求1所述的显示面板的修复方法，其中，所述目标数据线包括多条目标子数据线。
  9. 根据权利要求8所述的显示面板的修复方法，其中，所述修复线对应所述多条目标子数据线设 置多条子修复线。
  10. 根据权利要求9所述的显示面板的修复方法，其中，所述多条子修复线的第一部分连接不同的驱动芯片。
  11. 一种显示面板，包括：
    显示区域；
    非显示区域；
    多个驱动芯片，所述驱动芯片内设有运算放大器；
    目标数据线，包括位于所述显示区域两边的第一端、第二端和位于所述显示区域内的断点；
    修复线，设置在所述非显示区域，用于将修复信号传送至所述目标数据线的所述断点，所述修复线包括依次相连的第一段、第二段和第三段；
    所述第一段用于将所述目标数据线的第一端和一个栅极驱动芯片的输入端连接；
    所述第二段分成第一部分和第二部分，所述第二部分设置在所述栅极驱动芯片内，所述第二部分将所述栅极驱动芯片的输入端和所述运算放大器的输入端连接，所述第二部分还将所述运算放大器的输出端与所述栅极驱动芯片的输出端连接，用于将所述修复线传输的修复信号放大；
    所述第一部分将一个栅极驱动芯片的输出端与下一个栅极驱动芯片的输入端连接；
    所述第三段用于将所述第二段连接的最后一个栅极驱动芯片的输出端和目标数据线的第二端连接。
  12. 根据权利要求11所述的显示面板，还包括：利用所述第一部分将所述多个驱动芯片依次连接。
  13. 根据权利要求11所述的显示面板，其中，所述第二段的第二部分串联多个栅极驱动芯片内的运算放大器，用于级联传导放大所述修复信号。
  14. 根据权利要求11所述的显示面板，其中，所述目标数据线包括多条目标子数据线。
  15. 根据权利要求14所述的显示面板，其中，所述修复线对应所述多条目标子数据线设置多条子修复线。
  16. 根据权利要求15所述的显示面板，其中，所述多条子修复线的第二部分分别连接栅极驱动芯片内不同的运算放大器。
  17. 根据权利要求11所述的显示面板，其中，所述目标数据线包括多条目标子数据线。
  18. 根据权利要求17所述的显示面板，其中，所述修复线对应所述多条目标数据线设置多条子修复 线。
  19. 根据权利要求18所述的显示面板，其中，所述多条子修复线的第一部分连接不同的栅极驱动芯片。
  20. 一种显示面板，包括：
    显示区域；
    非显示区域；
    多个栅极驱动芯片；
    目标数据线，包括位于所述显示区域两边的第一端、第二端和位于所述显示区域内的断点；
    多个栅极驱动芯片，所述栅极驱动芯片内设有运算放大器；
    修复线，设置在所述非显示区域，用于将修复信号传送至所述目标数据线的所述断点，所述修复线包括依次相连的第一段、第二段和第三段；
    运算放大器，与所述修复线连接，用于将所述修复线传输的修复信号放大；
    所述第一段用于将所述目标数据线的第一端和一个栅极驱动芯片的输入端连接；
    所述第二段分成第一部分和第二部分，所述第二部分设置在所述栅极驱动芯片内，所述第二部分将所述栅极驱动芯片的输入端和所述运算放大器的输入端连接，所述第二部分还将所述运算放大器的输出端与所述栅极驱动芯片的输出端连接，用于将所述修复线传输的修复信号放大；
    所述第二部分还串联多个栅极驱动芯片内的运算放大器，用于级联传导放大所述修复信号；所述第一部分将多个栅极驱动芯片依次连接；
    所述第三段用于将所述第二段连接的最后一个栅极驱动芯片的输出端和目标数据线的第二端连接。
PCT/CN2017/107024 2017-09-11 2017-10-20 显示面板的修复方法及显示面板 Ceased WO2019047339A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US15/738,718 US10718984B2 (en) 2017-09-11 2017-10-20 Display panel and repair method thereof

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201710813633.8 2017-09-11
CN201710813633.8A CN107544187A (zh) 2017-09-11 2017-09-11 显示面板的修复方法及显示面板

Publications (1)

Publication Number Publication Date
WO2019047339A1 true WO2019047339A1 (zh) 2019-03-14

Family

ID=60963424

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2017/107024 Ceased WO2019047339A1 (zh) 2017-09-11 2017-10-20 显示面板的修复方法及显示面板

Country Status (2)

Country Link
CN (1) CN107544187A (zh)
WO (1) WO2019047339A1 (zh)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108267878B (zh) * 2018-01-31 2022-09-23 昆山龙腾光电股份有限公司 液晶显示装置
US10859884B2 (en) 2018-09-13 2020-12-08 HKC Corporation Limited Liquid crystal display panel and liquid crystal display apparatus
CN109061974A (zh) * 2018-09-13 2018-12-21 惠科股份有限公司 液晶显示面板和液晶显示装置
CN112242123A (zh) * 2019-07-16 2021-01-19 陕西坤同半导体科技有限公司 有源矩阵有机发光显示面板断线修复的补偿电路及补偿方法
CN112242124A (zh) * 2019-07-16 2021-01-19 陕西坤同半导体科技有限公司 用于修复断线的有源矩阵有机发光显示面板及断线修复方法
CN116430612B (zh) * 2023-04-26 2025-08-22 惠科股份有限公司 显示面板修复方法、显示面板及显示器

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101211020A (zh) * 2006-12-29 2008-07-02 群康科技(深圳)有限公司 液晶显示面板
CN102945647A (zh) * 2012-10-17 2013-02-27 京东方科技集团股份有限公司 显示面板及其检测方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20070020778A (ko) * 2005-08-17 2007-02-22 삼성전자주식회사 액정 표시 장치와 이의 검사 방법 및 이의 리페어 방법
CN101587247A (zh) * 2008-05-23 2009-11-25 上海广电Nec液晶显示器有限公司 液晶显示装置及其修复方法
CN101592830A (zh) * 2008-05-27 2009-12-02 上海广电Nec液晶显示器有限公司 液晶显示装置及其修复方法
CN104460075B (zh) * 2014-12-22 2017-12-05 南京中电熊猫液晶显示科技有限公司 显示装置及其驱动芯片和断线修复方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101211020A (zh) * 2006-12-29 2008-07-02 群康科技(深圳)有限公司 液晶显示面板
CN102945647A (zh) * 2012-10-17 2013-02-27 京东方科技集团股份有限公司 显示面板及其检测方法

Also Published As

Publication number Publication date
CN107544187A (zh) 2018-01-05

Similar Documents

Publication Publication Date Title
WO2019047339A1 (zh) 显示面板的修复方法及显示面板
US10403218B2 (en) Mura compensation circuit and method, driving circuit and display device
US10885865B2 (en) Drive circuit, display device, and drive method
KR101376044B1 (ko) 표시장치 및 이의 구동방법
US20180182339A1 (en) Goa driver circuit and liquid crystal display
US20070085809A1 (en) Backup shift register module for a gateline driving circuit
US11004380B2 (en) Gate driver on array circuit
WO2019051928A1 (zh) 显示装置及其修复方法
US10319282B2 (en) Gate driving circuit, an array substrate and a method for recovering the same
US20150042550A1 (en) Display panel having repairing structure
CN206848661U (zh) 阵列基板和显示装置
US10446094B2 (en) Gate driver on array circuit and LCD panel having GOA protecting circuit
US20070109235A1 (en) Liquid crystal display and repair lines structure thereof
CN113920946B (zh) 栅极驱动器及其驱动方法、显示装置
CN105513518B (zh) 一种栅极驱动电路及其测试方法、显示装置
CN105489178A (zh) 栅极驱动结构、显示面板及显示装置
US9311874B2 (en) Power connection structure of driver IC chip
US11210974B2 (en) Driving circuit of display apparatus
US9395564B2 (en) Liquid crystal display device and method for repairing the same
TWI417864B (zh) 源極驅動器之輸出放大器
CN112242123A (zh) 有源矩阵有机发光显示面板断线修复的补偿电路及补偿方法
US10718984B2 (en) Display panel and repair method thereof
US9159259B2 (en) Testing circuits of liquid crystal display and the testing method thereof
CN112331114A (zh) 液晶面板和液晶面板扫描线电压检测方法
US9542057B2 (en) Wiring structure and display panel having the same

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 17924132

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 17924132

Country of ref document: EP

Kind code of ref document: A1