WO2019044243A1 - Power semiconductor module - Google Patents

Power semiconductor module Download PDF

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Publication number
WO2019044243A1
WO2019044243A1 PCT/JP2018/027040 JP2018027040W WO2019044243A1 WO 2019044243 A1 WO2019044243 A1 WO 2019044243A1 JP 2018027040 W JP2018027040 W JP 2018027040W WO 2019044243 A1 WO2019044243 A1 WO 2019044243A1
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Prior art keywords
insulating substrate
electrode
power semiconductor
insulating
semiconductor module
Prior art date
Application number
PCT/JP2018/027040
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French (fr)
Japanese (ja)
Inventor
大地 川村
徹 増田
順平 楠川
Original Assignee
株式会社 日立パワーデバイス
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Filing date
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Application filed by 株式会社 日立パワーデバイス filed Critical 株式会社 日立パワーデバイス
Priority to DE112018003636.7T priority Critical patent/DE112018003636B4/en
Priority to CN201880050808.7A priority patent/CN111033723B/en
Publication of WO2019044243A1 publication Critical patent/WO2019044243A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
    • H01L23/18—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
    • H01L23/24—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel at the normal operating temperature of the device
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    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3135—Double encapsulation or coating and encapsulation
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    • H01L23/60—Protection against electrostatic charges or discharges, e.g. Faraday shields
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    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
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    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
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    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
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    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/293—Organic, e.g. plastic
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    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
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Definitions

  • the present invention relates to a high withstand voltage power semiconductor module that requires high insulation reliability.
  • Power converters (converters or inverters) equipped with power semiconductor modules are widely used in various fields such as railways, automobiles, industries, and power and social infrastructures.
  • an inorganic substrate (insulating substrate) joined on a base metal plate and an inorganic substrate so as to expose the peripheral portion of the inorganic substrate
  • the conductive foil (electrode) formed on the conductive foil and the semiconductor element mounted on the conductive foil are sealed with silicone gel, and the outer peripheral side surface portion of the conductive foil and the peripheral portion of the inorganic substrate are broken higher than the silicone gel.
  • the inverter module By forming the inverter module by covering it with a thermosetting resin coating having a voltage, the electric field can be relaxed even if the creeping distance from the end of the inorganic substrate to the conductor foil is short, thereby insulating the inverter module.
  • a technique for improving reliability, downsizing, and increasing capacity see, for example, Patent Document 2.
  • the outer peripheral portion of the power semiconductor module is insulated by the creeping surface of air / insulator, and the spatial distance and the creeping distance are determined by a standard (for example, IEC60664) so that short circuit or discharge does not occur in a predetermined environment.
  • a standard for example, IEC60664
  • the periphery of the internal mounting member Is sealed with an insulating resin to achieve insulation between the respective members.
  • an insulation resin material which seals the inside of a module it roughly divides into two, hard resin such as epoxy resin, and soft resin such as silicone gel.
  • a hard resin is generally used as the insulating sealing resin, and for example, the insulating sealing resin described in Patent Document 1 is It is thought that it corresponds to it.
  • Hard resin-sealed power semiconductor modules are generally small in size, so even if distortion / stress is generated between members inside the module due to hard resin encapsulation, the distortion / stress is small scale In most cases, it is considered that the problem is extremely rare.
  • soft resins such as silicone gel are used as insulating sealing resins in power semiconductor modules with large capacity (the rated current is over 100 amperes) and large module size. It is generally considered that, for example, the insulating sealing resin described in Patent Document 2 corresponds thereto. If the inside of a module where a power semiconductor chip, insulating substrate, bonding wire, etc. is joined is sealed with a rigid hard resin, a large strain and stress will be generated between members, resulting in mechanical damage to internal members. In order to avoid the possibility of cracking and interfacial peeling with hard resin, soft resin is used that is soft and absorbs and relieves strain and stress between members. Ru.
  • FIG. 5 shows the structure of a general power semiconductor module insulated and sealed with a soft resin.
  • the power semiconductor module 500 includes a power semiconductor chip 1 such as an IGBT (Insulated Gate Bipolar Transistor) or a MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) such as a metal-oxide-semiconductor field effect transistor 1, an insulating substrate 2.
  • the front surface electrode 7-1 and the back surface electrode 7-2 are brazed to one surface (for example, the front surface) and the other surface (for example, the rear surface), respectively.
  • the power semiconductor chip 1 and the surface electrode 7-1 on the insulating substrate 2 are electrically connected to each other by a bonding wire 4.
  • the insulating case 5 is fixed to the peripheral portion of the metal base 3 by an adhesive, and the silicone gel 6 is stored in the space formed by the metal base 3 and the insulating case 5, whereby the front electrode 7-1 and the back surface are formed.
  • the insulating substrate 2 and the power semiconductor chip 1 with the electrodes 7-2 are sealed in the space.
  • the dielectric breakdown strength of silicone gel is relatively small, and if the electric field strength higher than that is applied to silicone gel 6, the dielectric breakdown may occur and cause failure of the power semiconductor module and the equipment using it, Measures are taken to avoid it.
  • the place where the electric field is concentrated is the end of the insulating substrate 2, and if the electric field strength of the place exceeds the dielectric breakdown electric field strength of the silicone gel 6, first, inside the silicone gel 6 near the electrode end. Local dielectric breakdown occurs to generate heat and gas, and voids are formed in the soft silicone gel 6.
  • the dielectric breakdown strength of the void is smaller than that of the insulating resin such as silicone gel 6, and the local dielectric breakdown further occurs in the void portion, and a void is newly generated.
  • the power semiconductor module 500 is required to have a large capacity as well as a high withstand voltage.
  • the size of the insulating substrate 2 on which the power semiconductor chip 1 is mounted also needs to be increased.
  • the package size of the power semiconductor module 500 is It is desirable to reduce the size as much as possible (or maintain the general current size without increasing the size). Therefore, the enlarged power semiconductor chip 1 can be mounted by enlarging only the area of the electrodes 7-1 and 7-2 on the insulating substrate 2 without increasing the size of the insulating substrate 2. Is required.
  • Patent Document 2 applies a hard resin (resin coating 10) having a higher dielectric breakdown strength than the silicone gel 8 to the end of the surface electrode 1 where the electric field is concentrated.
  • a hard resin resin coating 10
  • the technique of Patent Document 2 can prevent dielectric breakdown of the silicone gel 8 at the lower end of the end of the electrode 1, the upper end of the end of the electrode 1 is in contact with the silicone gel 8.
  • the gel 8 may cause dielectric breakdown, which may result in short circuit breakdown due to creeping discharge.
  • the main features of the power semiconductor module of the present invention are as follows.
  • the power semiconductor module comprises: at least one insulating substrate; and a first surface of the insulating substrate and a first surface fixed to a second surface opposite to the first surface. Electrode and second electrode, a power semiconductor chip joined to the first electrode of the insulating substrate, a metal base joined to the second electrode of the insulating substrate, the insulating substrate, and An insulating case that accommodates the first electrode, the second electrode, and the power semiconductor chip together, a space formed by the metal base and the insulating case, and the insulating substrate and the first substrate It is a power semiconductor module which has a silicone gel which seals an electrode, said 2nd electrode, and said power semiconductor chip together, Comprising: Between the mutually opposing side surfaces of said insulated substrate, and front At least one of the side surface of the insulating case facing the insulating substrate and the side surface of the insulating substrate is bonded to each other with a hard resin, and the hard resin is the first surface of the insulating substrate and the hard resin is
  • the present invention in order to secure high insulation reliability while realizing a large capacity of the power semiconductor module, even when the area of the surface electrode on the insulating substrate is expanded to reduce the creepage distance, a short circuit by creeping discharge A power semiconductor module capable of preventing destruction can be provided.
  • FIG. 1 shows the configuration of a power semiconductor module according to a first embodiment (Example 1) of the present invention.
  • the power semiconductor module 100 of this embodiment is a silicone gel which is a soft resin which is a power semiconductor chip 1, an insulating substrate 2, a metal base 3, a bonding wire 4, an insulating case 5, an insulating sealing material. 6 and the hard resin 8.
  • the power semiconductor module 100 is fixed to, for example, at least one insulating substrate 2 and a first surface of the insulating substrate 2 and a second surface opposite to the first surface.
  • the first semiconductor electrode 7-1 and the second electrode 7-2, the power semiconductor chip 1 joined to the first electrode 7-1 of the insulating substrate 2, and the second electrode 7-2 of the insulating substrate 2 A metal base 3 joined to each other, an insulating case 5 accommodating the insulating substrate 2, the first electrode 7-1, the second electrode 7-2 and the power semiconductor chip 1 together, a metal base 3 and an insulating case 5 And a silicone gel which seals the insulating substrate 2, the first electrode 7-1, the second electrode 7-2 and the power semiconductor chip 1 together. Be done. At least one of the side surfaces of the insulating substrate 2 facing each other and the side surface of the insulating case 5 facing the insulating substrate 2 and the side surface of the insulating substrate 2 are bonded to each other by a hard resin.
  • the hard resin is a part of a portion of the first surface (for example, the front surface) of the insulating substrate 2 exposed from the first electrode 7-1, or a second surface (for example, the back surface) of the insulating substrate 2. And covers one of a portion of the portion exposed from the second electrode 7-2 and a portion of the side surface of the insulating substrate 2.
  • a front surface electrode 7-1 and a back surface electrode 7-2 are brazed to the first surface and the second surface, respectively, on the insulating substrate 2, and the power semiconductor chip 1 is soldered onto the front surface electrode 7-1.
  • the back electrode 7-2 and the metal base 3 are soldered together.
  • the power semiconductor chip 1 and the front surface electrode 7-1 of the insulating substrate 2 are electrically connected to each other by the bonding wire 4.
  • An insulating case 5 is fixed to the peripheral edge of the metal base 3 by an adhesive, and a silicone gel 6 is disposed in the space formed by the metal base 3 and the insulating case 5 and stored in the space. Then, the insulating substrate 2 and the power semiconductor chip 1 accompanied with the front electrode 7-1 and the back electrode 7-2 are sealed in the space.
  • the side surface of the insulating substrate 2 and the side surface (inner wall surface) of the insulating case 5 are bonded to each other by the hard resin 8.
  • the hard resin 8 is filled with silicone gel 6.
  • the dielectric breakdown strength of the void is lower than that of the insulating resin, in the case of the prior art, dielectric breakdown further occurs in the generated void, and these dielectric breakdowns are chained to pass through the insulating substrate surface and further to the side surface, The discharge in the silicone gel will proceed. Then, when the discharge reaches the metal base 3, short circuit breakdown occurs.
  • the hard resin 8 is always present on the surface of the surface discharge path between the end of the surface electrode 7-1 and the metal base 3, and the dielectric breakdown of the silicone gel 6 is observed.
  • the discharge proceeding in a chain while the void is generated does not occur in the hard resin 8, if the hard resin 8 such as a solid resin having a predetermined thickness is present, the discharge is stopped there, thereby preventing the short circuit failure. be able to.
  • a predetermined thickness for example, a voltage of 10 kVrms is applied between the surface electrode (high potential portion) of the power semiconductor module 100 and the metal base 3 (low potential portion), and a solid having a dielectric breakdown strength of 40 kVrms / mm
  • the thickness is at least about 0.25 mm (10 kVrms / 40 kVrms / mm).
  • the area of the surface electrode 7-1 on the insulating substrate 2 is enlarged to reduce the creepage distance.
  • the power semiconductor module 200 of this embodiment is different from that of the first embodiment in that the silicone gel 6 is disposed above and below the hard resin 8 such as solid resin, The other configuration except for that point is common to the first embodiment.
  • Example 1 When sealing between the insulating substrate 2 and the metal base 3 with the hard resin 8 having high viscosity as in the first embodiment, a gap is likely to occur.
  • Example 1 is effective under such conditions that local dielectric breakdown (partial discharge) does not occur even if such air gaps exist, and the insulation reliability does not decrease, such conditions are effective. If not, another embodiment may be required.
  • the configuration of the present embodiment is proposed on the assumption of such a case, and a silicone gel 6 having low viscosity and high fluidity is disposed in the gap between the insulating substrate 2 and the metal base 3. In order to seal a portion, it is possible to fill the insulating resin without creating a void in the portion.
  • FIG. 3 shows a manufacturing process flow chart (flow chart) 300 corresponding to the manufacturing method of the power semiconductor module 200 in the present embodiment.
  • flow chart 300 After bonding the power semiconductor chip 1 to the collector electrode on the surface electrode 7-1 of the insulating substrate 2 by soldering, bonding wires between the power semiconductor chip 1 and the emitter electrode / gate electrode on the surface electrode 7-1 of the insulating substrate 2
  • the back electrode 7-2 of the insulating substrate 2 and the metal base 3 are electrically connected to each other by solder.
  • the amount of silicone gel 6 filling the space between the insulating substrate 2 and the metal base 3 is injected and cured, and then the side surface of the insulating substrate 2 and the insulating case A hard resin (thermosetting resin) 8 is injected between the two and cured.
  • a hard resin (thermosetting resin) 8 is injected and cured between the side surfaces facing each other.
  • the capacity increase of the power semiconductor module 200 is realized even under the condition that local dielectric breakdown (partial discharge) is easily generated when the air gap exists between the insulating substrate 2 and the metal base 3.
  • a power semiconductor module capable of preventing short circuit breakage due to creeping discharge even when the creepage distance is reduced by enlarging the area of the surface electrode 7-1 on the insulating substrate 2 in order to secure high insulation reliability while 200 can be provided.
  • the power semiconductor module 400 of this embodiment has a protrusion 9 on a part of the inner wall surface of the insulating case 5 as compared with the second embodiment, and the protrusion 9 and a part of the insulating substrate 2
  • the second embodiment differs from the second embodiment in that it is bonded to each other by the hard resin 8, but the other configuration except this point is the same as the second embodiment.
  • the silicone gel 6 is injected and cured.
  • the projection 2 may be provided with a slit penetrating between the upper side and the lower side of the projection 2.
  • the silicone gel 6 can be injected and disposed below the insulating substrate 2 through the slit.
  • Example 2 before applying and curing the hard resin 8, the silicone gel 6 is injected and cured below the insulating substrate 2, and after applying and curing the hard resin 8, the silicone gel 6 is injected throughout the module interior Two injection and curing processes of silicone gel 6 were required, such as curing.
  • the injection and curing process of the silicone gel 6 can be reduced to one, the fabrication of the power semiconductor module 400 becomes easier.
  • the area of the surface electrode 7-1 on the insulating substrate 2 is enlarged to reduce the creepage distance in order to secure high insulation reliability while realizing a large capacity of the power semiconductor module 400.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Dispersion Chemistry (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

The present invention provides a power semiconductor module capable of preventing short-circuit breakdown due to creeping discharge even when the area of a surface electrode on an insulating substrate is enlarged and the creepage distance is reduced in order to ensure high insulation reliability of the power semiconductor module while realizing a large capacity thereof. This power semiconductor module 100 is characterized by being provided with: an insulating substrate 2 in which a first electrode 7-1 and a second electrode 7-2 are provided on front and back surfaces thereof; a power semiconductor chip 1 bonded to the first electrode 7-1; a metal base 3 bonded to the second electrode 7-2; an insulating case 5; and a silicone gel 6 that is disposed in a space formed by the metal base 3 and the insulating case 5 and seals the insulating substrate 2 and the power semiconductor chip 1, wherein side surfaces of the insulating substrate 2 facing each other, or a side surface of the insulating case 5 facing the insulating substrate 2 and a side surface of the insulating substrate 2 are bonded with a hard resin 8, and the hard resin 8 covers a portion of a portion at which the insulating substrate 2 is exposed from the first electrode 7-1 and a portion of the side surface of the insulating substrate 2.

Description

パワー半導体モジュールPower semiconductor module
　本発明は、高い絶縁信頼性が要求される高耐電圧のパワー半導体モジュールに関するものである。 The present invention relates to a high withstand voltage power semiconductor module that requires high insulation reliability.
　パワー半導体モジュールを搭載する電力変換器（コンバータまたはインバータ）は鉄道・自動車・産業および電力・社会インフラなどの各分野に幅広く使用されている。 Power converters (converters or inverters) equipped with power semiconductor modules are widely used in various fields such as railways, automobiles, industries, and power and social infrastructures.
　従来、特に高温で動作する半導体装置に係る樹脂封止の信頼性向上のための技術として、表面電極パターン・裏面電極パターンが形成された絶縁基板と、表面電極パターンに接合された半導体素子とを、エポキシ樹脂等を含む第一の封止樹脂によって封止すると共に、表面電極パターンまたは裏面電極パターンが形成されていない絶縁基板の部分と第一の封止樹脂とを、第一の封止樹脂より弾性率が小さいシリコーン樹脂等を含む第二の封止樹脂で覆って半導体装置を構成することで、高温動作時に、弾性率が小さい第二の封止樹脂で応力を緩和するとともに、第一の封止樹脂の端部での応力集中を緩和しようとする技術があった（例えば、特許文献１参照）。 Conventionally, as a technique for improving the reliability of resin sealing related to a semiconductor device operating particularly at high temperature, an insulating substrate on which a surface electrode pattern and a back surface electrode pattern are formed, and a semiconductor element joined to the surface electrode pattern A portion of the insulating substrate which is sealed with a first sealing resin containing an epoxy resin or the like and in which the front surface electrode pattern or the rear surface electrode pattern is not formed, and the first sealing resin By covering the semiconductor device with a second sealing resin containing a silicone resin or the like having a smaller elastic modulus to configure the semiconductor device, stress is relaxed with the second sealing resin having a small elastic modulus during high temperature operation, and There has been a technique for reducing stress concentration at the end of the sealing resin (see, for example, Patent Document 1).
　また、従来、樹脂封止型インバーターモジュールの絶縁信頼性を向上させる技術として、ベース金属板上に接合された無機基板（絶縁基板）と、この無機基板の周縁部を露出させるように無機基板上に形成された導体箔（電極）と、この導体箔上に搭載された半導体素子とをシリコーンゲルで封止すると共に、導体箔の外周側面部および無機基板の周縁部を、シリコーンゲルより高い破壊電圧を有する加熱硬化型の樹脂被覆物で被覆してインバーターモジュールを構成することで、無機基板の端から導体箔までの沿面距離が短くても電界緩和を可能ならしめ、以てインバーターモジュールの絶縁信頼性向上と小型化・大容量化とを図ろうとする技術があった（例えば、特許文献２参照）。 Also, conventionally, as a technique for improving the insulation reliability of a resin-sealed inverter module, an inorganic substrate (insulating substrate) joined on a base metal plate and an inorganic substrate so as to expose the peripheral portion of the inorganic substrate The conductive foil (electrode) formed on the conductive foil and the semiconductor element mounted on the conductive foil are sealed with silicone gel, and the outer peripheral side surface portion of the conductive foil and the peripheral portion of the inorganic substrate are broken higher than the silicone gel. By forming the inverter module by covering it with a thermosetting resin coating having a voltage, the electric field can be relaxed even if the creeping distance from the end of the inorganic substrate to the conductor foil is short, thereby insulating the inverter module There has been a technique for improving reliability, downsizing, and increasing capacity (see, for example, Patent Document 2).
特開２０１３－１６６８４号公報JP, 2013-16684, A 特開２００４－１４９１９号公報JP 2004-14919 A
　高電圧を扱うパワー半導体モジュールには高い絶縁信頼性が要求される。パワー半導体モジュールの外周部は空気／絶縁物の沿面によって絶縁され、所定の環境において短絡や放電が発生しないように空間距離や沿面距離が規格(例えばIEC60664)によって定められている。また、パワー半導体チップ、絶縁基板、ボンディングワイヤ等が高密度に実装されるモジュール内部は、空間距離や沿面距離を大きくすることで絶縁性を確保することが困難であるため、内部実装部材の周囲を絶縁樹脂で封止し各部材間の絶縁を図っている。 High insulation reliability is required for power semiconductor modules that handle high voltages. The outer peripheral portion of the power semiconductor module is insulated by the creeping surface of air / insulator, and the spatial distance and the creeping distance are determined by a standard (for example, IEC60664) so that short circuit or discharge does not occur in a predetermined environment. In addition, because it is difficult to secure insulation by increasing the spatial distance and creeping distance inside the module where power semiconductor chips, insulating substrates, bonding wires, etc. are mounted at high density, the periphery of the internal mounting member Is sealed with an insulating resin to achieve insulation between the respective members.
　モジュール内部を封止する絶縁樹脂材としては、エポキシ樹脂等の硬質樹脂と、シリコーンゲル等の軟質樹脂との２つに大別される。例えば、定格電流が数十アンペア程度の低容量・小型のパワー半導体モジュールでは、絶縁封止樹脂として硬質樹脂が用いられるのが一般的であり、例えば、特許文献１に記載の絶縁封止樹脂がそれに該当すると考えられる。硬質樹脂封止型のパワー半導体モジュールは一般的にサイズが小さいため、仮に硬質樹脂封止によってモジュール内部の部材間に歪・応力が発生したとしても、その歪・応力は小規模のものであることがほとんどであって、それが問題となることは極めて少ないと考えられる。 As an insulation resin material which seals the inside of a module, it roughly divides into two, hard resin such as epoxy resin, and soft resin such as silicone gel. For example, in a low-capacity, small-sized power semiconductor module having a rated current of several tens of amperes, a hard resin is generally used as the insulating sealing resin, and for example, the insulating sealing resin described in Patent Document 1 is It is thought that it corresponds to it. Hard resin-sealed power semiconductor modules are generally small in size, so even if distortion / stress is generated between members inside the module due to hard resin encapsulation, the distortion / stress is small scale In most cases, it is considered that the problem is extremely rare.
　一方、このような硬質樹脂封止型のパワー半導体モジュールに対し、大容量(定格電流が百アンペア以上)でモジュールサイズの大きなパワー半導体モジュールでは、絶縁封止樹脂としてシリコーンゲル等の軟質樹脂が用いられるのが一般的であり、例えば、特許文献２に記載の絶縁封止樹脂がそれに該当すると考えられる。パワー半導体チップ、絶縁基板、ボンディングワイヤ等が接合されているモジュール内部を剛性の高い硬質樹脂で封止してしまうと、部材間に大きな歪・応力を発生させ、内部部材へ機械的ダメージを与えてクラックを発生させたり、硬質樹脂との間に界面剥離を引き起こしたりする可能性があるため、これを回避するために、柔らかく、部材間の歪・応力を吸収・緩和する軟質樹脂が使用される。 On the other hand, in contrast to such hard resin-sealed power semiconductor modules, soft resins such as silicone gel are used as insulating sealing resins in power semiconductor modules with large capacity (the rated current is over 100 amperes) and large module size. It is generally considered that, for example, the insulating sealing resin described in Patent Document 2 corresponds thereto. If the inside of a module where a power semiconductor chip, insulating substrate, bonding wire, etc. is joined is sealed with a rigid hard resin, a large strain and stress will be generated between members, resulting in mechanical damage to internal members. In order to avoid the possibility of cracking and interfacial peeling with hard resin, soft resin is used that is soft and absorbs and relieves strain and stress between members. Ru.
　図５に軟質樹脂で絶縁封止する一般的なパワー半導体モジュールの構造を示す。パワー半導体モジュール５００は、ＩＧＢＴ（Insulated Gate Bipolar Transistor：絶縁ゲート型バイポーラトランジスタ）やＭＯＳＦＥＴ（Metal-Oxide-Semiconductor Field Effect Transistor：金属－酸化物－半導体電界効果トランジスタ）等のパワー半導体チップ１、絶縁基板２、金属ベース３、ボンディングワイヤ４、絶縁ケース５、絶縁封止材であって軟質樹脂であるシリコーンゲル６等を有して構成される。絶縁基板２は、表面電極７－１および裏面電極７－２がそれぞれ一方の面（例えば表面）および他方の面（例えば裏面）にろう付けされており、表面電極７－１にパワー半導体チップ１が半田接合され、裏面電極７－２と金属ベース３とが互いに半田接合されている。パワー半導体チップ１と絶縁基板２上の表面電極７－１とはボンディングワイヤ４によって互いに電気的に接続されている。金属ベース３の周縁部には絶縁ケース５が接着剤により固定され、金属ベース３と絶縁ケース５とによって形成される空間の内部にシリコーンゲル６が貯留することで、表面電極７－１および裏面電極７－２を伴った絶縁基板２およびパワー半導体チップ１が当該空間の内部に封止されている。硬質樹脂と比べシリコーンゲルの絶縁破壊強度は比較的小さく、それを上回る電界強度がシリコーンゲル６に加わると絶縁破壊が生じてパワー半導体モジュール及びそれを用いた機器の故障を引き起こす虞があるため、それを回避する対策が施される。 FIG. 5 shows the structure of a general power semiconductor module insulated and sealed with a soft resin. The power semiconductor module 500 includes a power semiconductor chip 1 such as an IGBT (Insulated Gate Bipolar Transistor) or a MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) such as a metal-oxide-semiconductor field effect transistor 1, an insulating substrate 2. Metal base 3, bonding wire 4, insulating case 5, silicone gel 6 or the like which is an insulating sealing material and is a soft resin. In the insulating substrate 2, the front surface electrode 7-1 and the back surface electrode 7-2 are brazed to one surface (for example, the front surface) and the other surface (for example, the rear surface), respectively. Are soldered together, and the back electrode 7-2 and the metal base 3 are soldered together. The power semiconductor chip 1 and the surface electrode 7-1 on the insulating substrate 2 are electrically connected to each other by a bonding wire 4. The insulating case 5 is fixed to the peripheral portion of the metal base 3 by an adhesive, and the silicone gel 6 is stored in the space formed by the metal base 3 and the insulating case 5, whereby the front electrode 7-1 and the back surface are formed. The insulating substrate 2 and the power semiconductor chip 1 with the electrodes 7-2 are sealed in the space. Compared with hard resin, the dielectric breakdown strength of silicone gel is relatively small, and if the electric field strength higher than that is applied to silicone gel 6, the dielectric breakdown may occur and cause failure of the power semiconductor module and the equipment using it, Measures are taken to avoid it.
　パワー半導体モジュール５００の中で電界が集中する箇所は絶縁基板２の端部であり、当該箇所の電界強度がシリコーンゲル６の絶縁破壊電界強度を上回ると、はじめに電極端部近傍のシリコーンゲル６内で局所絶縁破壊が発生して熱やガスが生じ、柔らかいシリコーンゲル６中にボイドが形成される。シリコーンゲル６等の絶縁樹脂と比べてボイドの絶縁破壊強度は小さく、ボイド部分でさらに局所絶縁破壊が生じ、新たにボイドが発生する。これらの局所絶縁破壊が連鎖的に進展していき、シリコーンゲル中の絶縁破壊による放電は絶縁基板２上の電極端部から絶縁基板２の表面・側面に沿って金属ベース３（低電位部）まで沿面放電し、最終的にパワー半導体モジュール５００の短絡破壊に至る。それを回避するために、従来は、絶縁基板２の端部と表面電極７－１の端部との間の沿面距離を長めに確保（例えば１ｍｍ～２ｍｍ程度確保）することで、上記沿面放電を抑制する態様にしていた。 In the power semiconductor module 500, the place where the electric field is concentrated is the end of the insulating substrate 2, and if the electric field strength of the place exceeds the dielectric breakdown electric field strength of the silicone gel 6, first, inside the silicone gel 6 near the electrode end. Local dielectric breakdown occurs to generate heat and gas, and voids are formed in the soft silicone gel 6. The dielectric breakdown strength of the void is smaller than that of the insulating resin such as silicone gel 6, and the local dielectric breakdown further occurs in the void portion, and a void is newly generated. These local dielectric breakdown develops in a chained manner, and the discharge due to the dielectric breakdown in the silicone gel is metal base 3 (low potential part) along the surface and side of insulating substrate 2 from the electrode end on insulating substrate 2 The creeping discharge up to the end results in the short circuit breakdown of the power semiconductor module 500. In order to avoid that, conventionally, the creeping discharge is secured by securing a long creeping distance between the end of the insulating substrate 2 and the end of the surface electrode 7-1 (for example, about 1 mm to 2 mm). Was in a mode to suppress
　しかし、パワー半導体モジュール５００には高耐電圧化とともに大容量化が要求される。大容量化にともないパワー半導体チップ１のサイズを大型化するため、パワー半導体チップ１を搭載する絶縁基板２のサイズも大型化する必要があるが、その一方で、パワー半導体モジュール５００のパッケージサイズはできるだけ小型化（もしくはサイズを大きくすることなく汎用現行サイズを維持）することが望まれる。そのため、絶縁基板２のサイズを大きくすることなく、絶縁基板２上の電極７－１・７－２の面積のみを拡大化することで、大型化したパワー半導体チップ１を搭載できるようにすることが必要となる。しかしながら、絶縁基板２のサイズを変更せずに電極７－１・７－２の面積を拡大化すると、絶縁基板２の端部と電極７－１・７－２の端部との間の沿面距離が短くなり、絶縁信頼性が低下するという問題があった。 However, the power semiconductor module 500 is required to have a large capacity as well as a high withstand voltage. In order to increase the size of the power semiconductor chip 1 as the capacity increases, the size of the insulating substrate 2 on which the power semiconductor chip 1 is mounted also needs to be increased. However, the package size of the power semiconductor module 500 is It is desirable to reduce the size as much as possible (or maintain the general current size without increasing the size). Therefore, the enlarged power semiconductor chip 1 can be mounted by enlarging only the area of the electrodes 7-1 and 7-2 on the insulating substrate 2 without increasing the size of the insulating substrate 2. Is required. However, when the area of the electrodes 7-1 and 7-2 is enlarged without changing the size of the insulating substrate 2, the creepage between the end of the insulating substrate 2 and the end of the electrodes 7-1 and 7-2 There is a problem that the distance is shortened and the insulation reliability is lowered.
　この問題に対し、特許文献２に記載の技術は、電界が集中する表面電極１の端部にシリコーンゲル８より絶縁破壊強度の高い硬質樹脂（樹脂被覆物１０）をコーティングすることで、シリコーンゲル８中での局所絶縁破壊を防止し、沿面距離が短くても沿面放電による短絡破壊を抑制して絶縁信頼性を担保する態様にしている。しかしながら、特許文献２の技術では、電極１端部の下端でのシリコーンゲル８の絶縁破壊は防止できたとしても、電極１端部の上端はシリコーンゲル８と接しているため、当該箇所でシリコーンゲル８が絶縁破壊し、以て沿面放電により短絡破壊に至る虞があるという問題があった。 In order to address this problem, the technology described in Patent Document 2 applies a hard resin (resin coating 10) having a higher dielectric breakdown strength than the silicone gel 8 to the end of the surface electrode 1 where the electric field is concentrated. In this embodiment, local dielectric breakdown in 8 is prevented, and short-circuit breakdown due to creeping discharge is suppressed even if the creepage distance is short to secure insulation reliability. However, even if the technique of Patent Document 2 can prevent dielectric breakdown of the silicone gel 8 at the lower end of the end of the electrode 1, the upper end of the end of the electrode 1 is in contact with the silicone gel 8. There is a problem that the gel 8 may cause dielectric breakdown, which may result in short circuit breakdown due to creeping discharge.
　したがって、パワー半導体モジュールの大容量化を実現しながら高絶縁信頼性を担保するため、絶縁基板上の表面電極の面積を拡大して沿面距離を縮小した場合でも、沿面放電による短絡破壊を防ぐことを可能とするパワー半導体モジュールを提供することが課題となる。 Therefore, in order to secure high insulation reliability while realizing a large capacity of the power semiconductor module, even when the creeping distance is reduced by enlarging the area of the surface electrode on the insulating substrate, short circuit breakdown due to creeping discharge is prevented. It is an object to provide a power semiconductor module that makes it possible.
　上記課題を解決するために、本発明のパワー半導体モジュールの主な特徴は、以下の通りである。 In order to solve the above-mentioned subject, the main features of the power semiconductor module of the present invention are as follows.
　すなわち、本発明のパワー半導体モジュールは、少なくとも１枚の絶縁基板と、前記絶縁基板の第１の面および前記第１の面の反対側の面である第２の面にそれぞれ固定された第１の電極および第２の電極と、前記絶縁基板の前記第１の電極に接合されたパワー半導体チップと、前記絶縁基板の前記第２の電極に接合された金属ベースと、前記絶縁基板と前記第１の電極と前記第２の電極と前記パワー半導体チップとを共に収容する絶縁ケースと、前記金属ベースと前記絶縁ケースとによって形成される空間の内部に配置され、前記絶縁基板と前記第１の電極と前記第２の電極と前記パワー半導体チップとを共に封止するシリコーンゲルとを有するパワー半導体モジュールであって、前記絶縁基板の互いに対向する側面同士の間、および前記絶縁基板に対向する前記絶縁ケースの側面と前記絶縁基板の側面との間の少なくともいずれか一方が硬質樹脂で互いに接合され、前記硬質樹脂は、前記絶縁基板の前記第１の面であって前記第１の電極から露出している部分の一部または前記絶縁基板の前記第２の面であって前記第２の電極から露出している部分の一部のいずれか一方および前記絶縁基板の側面の一部を覆っていることを特徴とする。 That is, the power semiconductor module according to the present invention comprises: at least one insulating substrate; and a first surface of the insulating substrate and a first surface fixed to a second surface opposite to the first surface. Electrode and second electrode, a power semiconductor chip joined to the first electrode of the insulating substrate, a metal base joined to the second electrode of the insulating substrate, the insulating substrate, and An insulating case that accommodates the first electrode, the second electrode, and the power semiconductor chip together, a space formed by the metal base and the insulating case, and the insulating substrate and the first substrate It is a power semiconductor module which has a silicone gel which seals an electrode, said 2nd electrode, and said power semiconductor chip together, Comprising: Between the mutually opposing side surfaces of said insulated substrate, and front At least one of the side surface of the insulating case facing the insulating substrate and the side surface of the insulating substrate is bonded to each other with a hard resin, and the hard resin is the first surface of the insulating substrate and the hard resin is the first surface. One of a portion of a portion exposed from a first electrode or a portion of a portion of the second surface of the insulating substrate exposed from the second electrode and a side surface of the insulating substrate It is characterized in that it covers a part of the
　本発明によれば、パワー半導体モジュールの大容量化を実現しながら高絶縁信頼性を担保するため、絶縁基板上の表面電極の面積を拡大して沿面距離を縮小した場合でも、沿面放電による短絡破壊を防ぐことを可能とするパワー半導体モジュールを提供することができる。 According to the present invention, in order to secure high insulation reliability while realizing a large capacity of the power semiconductor module, even when the area of the surface electrode on the insulating substrate is expanded to reduce the creepage distance, a short circuit by creeping discharge A power semiconductor module capable of preventing destruction can be provided.
本発明の第１の実施形態（実施例１）に係るパワー半導体モジュールの構成を示す図である。It is a figure showing composition of a power semiconductor module concerning a 1st embodiment (example 1) of the present invention. 本発明の第２の実施形態（実施例２）に係るパワー半導体モジュールの構成を示す図である。It is a figure which shows the structure of the power semiconductor module which concerns on the 2nd Embodiment (Example 2) of this invention. 本発明の第２の実施形態（実施例２）に係るパワー半導体モジュールの作製方法を示す作製工程流れ図（フローチャート）である。It is a preparation process flow chart (flow chart) which shows the manufacturing method of the power semiconductor module concerning a 2nd embodiment (example 2) of the present invention. 本発明の第３の実施形態（実施例３）に係るパワー半導体モジュールの構成を示す図である。It is a figure which shows the structure of the power semiconductor module which concerns on the 3rd Embodiment (Example 3) of this invention. 従来のパワー半導体モジュールの構成を示す図である。It is a figure which shows the structure of the conventional power semiconductor module.
　以下、本発明のパワー半導体モジュールの実施形態の例を、各実施例として図面に基づいて説明する。なお、各実施例において、同一構成部品には同符号を使用する。 Hereinafter, the example of the embodiment of the power semiconductor module of the present invention is explained as each example based on a drawing. In each embodiment, the same reference numeral is used for the same component.
　図１に本発明の第１の実施形態（実施例１）に係るパワー半導体モジュールの構成を示す。 FIG. 1 shows the configuration of a power semiconductor module according to a first embodiment (Example 1) of the present invention.
　該図に示す如く、本実施例のパワー半導体モジュール１００は、パワー半導体チップ１、絶縁基板２、金属ベース３、ボンディングワイヤ４、絶縁ケース５、絶縁封止材であって軟質樹脂であるシリコーンゲル６、および硬質樹脂８を有して構成される。具体的には、パワー半導体モジュール１００は、例えば、少なくとも１枚の絶縁基板２と、絶縁基板２の第１の面および第１の面の反対側の面である第２の面にそれぞれ固定された第１の電極７－１および第２の電極７－２と、絶縁基板２の第１の電極７－１に接合されたパワー半導体チップ１と、絶縁基板２の第２の電極７－２に接合された金属ベース３と、絶縁基板２と第１の電極７－１と第２の電極７－２とパワー半導体チップ１とを共に収容する絶縁ケース５と、金属ベース３と絶縁ケース５とによって形成される空間の内部に配置され、絶縁基板２と第１の電極７－１と第２の電極７－２とパワー半導体チップ１とを共に封止するシリコーンゲルとを有して構成される。絶縁基板２の互いに対向する側面同士の間、および絶縁基板２に対向する絶縁ケース５の側面と絶縁基板２の側面との間の少なくともいずれか一方は硬質樹脂で互いに接合される。硬質樹脂は、絶縁基板２の第１の面（例えば表面）であって第１の電極７－１から露出している部分の一部、または、絶縁基板２の第２の面（例えば裏面）であって第２の電極７－２から露出している部分の一部のいずれか一方と、絶縁基板２の側面の一部とを覆っている。 As shown in the figure, the power semiconductor module 100 of this embodiment is a silicone gel which is a soft resin which is a power semiconductor chip 1, an insulating substrate 2, a metal base 3, a bonding wire 4, an insulating case 5, an insulating sealing material. 6 and the hard resin 8. Specifically, the power semiconductor module 100 is fixed to, for example, at least one insulating substrate 2 and a first surface of the insulating substrate 2 and a second surface opposite to the first surface. The first semiconductor electrode 7-1 and the second electrode 7-2, the power semiconductor chip 1 joined to the first electrode 7-1 of the insulating substrate 2, and the second electrode 7-2 of the insulating substrate 2 A metal base 3 joined to each other, an insulating case 5 accommodating the insulating substrate 2, the first electrode 7-1, the second electrode 7-2 and the power semiconductor chip 1 together, a metal base 3 and an insulating case 5 And a silicone gel which seals the insulating substrate 2, the first electrode 7-1, the second electrode 7-2 and the power semiconductor chip 1 together. Be done. At least one of the side surfaces of the insulating substrate 2 facing each other and the side surface of the insulating case 5 facing the insulating substrate 2 and the side surface of the insulating substrate 2 are bonded to each other by a hard resin. The hard resin is a part of a portion of the first surface (for example, the front surface) of the insulating substrate 2 exposed from the first electrode 7-1, or a second surface (for example, the back surface) of the insulating substrate 2. And covers one of a portion of the portion exposed from the second electrode 7-2 and a portion of the side surface of the insulating substrate 2.
　絶縁基板２には表面電極７－１および裏面電極７－２がそれぞれ第１の面および第２の面にろう付けされており、表面電極７－１上にパワー半導体チップ１が半田接合され、裏面電極７－２と金属ベース３とが半田接合される。パワー半導体チップ１と絶縁基板２の表面電極７－１とはボンディングワイヤ４により互いに電気的に接続される。金属ベース３の周縁部には絶縁ケース５が接着剤により固定され、金属ベース３と絶縁ケース５とによって形成される空間の内部にはシリコーンゲル６が配置され、これが当該空間内に貯留することで、表面電極７－１および裏面電極７－２を伴った絶縁基板２およびパワー半導体チップ１が当該空間の内部に封止される。絶縁基板２の側面と絶縁ケース５の側面（内壁面）との間は硬質樹脂８で互いに接合されており、例えば絶縁基板２が２枚設けられる場合は、当該２枚の絶縁基板２が互いに対向する側面同士が硬質樹脂８で互いに接合される。硬質樹脂の上側がシリコーンゲル６で充填されている。絶縁基板２の表面電極７－１の端部近傍のシリコーンゲル６で絶縁破壊が生じるとシリコーンゲル中に熱・ガスが発生し、軟質樹脂であるシリコーンゲル６の中には状況に応じてボイドが発生する。絶縁樹脂と比べてボイドの絶縁破壊強度は低いことから、従来技術であれば、発生したボイドでさらに絶縁破壊が生じ、これらの絶縁破壊が連鎖して絶縁基板表面、更にはその側面を通り、シリコーンゲル中の放電は進んでいくこととなる。そして、この放電が金属ベース３まで到達すると短絡破壊が生じる。しかし、本発明においては、表面電極７－１の端部と金属ベース３との間の沿面放電経路上に必ず硬質樹脂８が介在する構造であり、また、シリコーンゲル６の絶縁破壊では見られた、ボイドが発生しながら連鎖して進む放電は、硬質樹脂８では起こらないことから、所定の厚さの固体樹脂等の硬質樹脂８があればそこで放電が止まり、以て短絡破壊を防止することができる。ここで、所定の厚さとは、例えばパワー半導体モジュール１００の表面電極（高電位部）と金属ベース３（低電位部）との間に10kVrmsの電圧が印加され、絶縁破壊強度40kVrms/mmの固体樹脂を適用する場合には、最低でも0.25mm（10kVrms/40kVrms/mm）程度の厚さである。 A front surface electrode 7-1 and a back surface electrode 7-2 are brazed to the first surface and the second surface, respectively, on the insulating substrate 2, and the power semiconductor chip 1 is soldered onto the front surface electrode 7-1. The back electrode 7-2 and the metal base 3 are soldered together. The power semiconductor chip 1 and the front surface electrode 7-1 of the insulating substrate 2 are electrically connected to each other by the bonding wire 4. An insulating case 5 is fixed to the peripheral edge of the metal base 3 by an adhesive, and a silicone gel 6 is disposed in the space formed by the metal base 3 and the insulating case 5 and stored in the space. Then, the insulating substrate 2 and the power semiconductor chip 1 accompanied with the front electrode 7-1 and the back electrode 7-2 are sealed in the space. The side surface of the insulating substrate 2 and the side surface (inner wall surface) of the insulating case 5 are bonded to each other by the hard resin 8. For example, when two insulating substrates 2 are provided, the two insulating substrates 2 are mutually The opposite side surfaces are bonded to each other by the hard resin 8. The upper side of the hard resin is filled with silicone gel 6. When dielectric breakdown occurs in the silicone gel 6 in the vicinity of the end of the surface electrode 7-1 of the insulating substrate 2, heat and gas are generated in the silicone gel, and voids are generated in the silicone resin 6 which is a soft resin depending on the situation. Occurs. Since the dielectric breakdown strength of the void is lower than that of the insulating resin, in the case of the prior art, dielectric breakdown further occurs in the generated void, and these dielectric breakdowns are chained to pass through the insulating substrate surface and further to the side surface, The discharge in the silicone gel will proceed. Then, when the discharge reaches the metal base 3, short circuit breakdown occurs. However, in the present invention, the hard resin 8 is always present on the surface of the surface discharge path between the end of the surface electrode 7-1 and the metal base 3, and the dielectric breakdown of the silicone gel 6 is observed. Further, since the discharge proceeding in a chain while the void is generated does not occur in the hard resin 8, if the hard resin 8 such as a solid resin having a predetermined thickness is present, the discharge is stopped there, thereby preventing the short circuit failure. be able to. Here, with a predetermined thickness, for example, a voltage of 10 kVrms is applied between the surface electrode (high potential portion) of the power semiconductor module 100 and the metal base 3 (low potential portion), and a solid having a dielectric breakdown strength of 40 kVrms / mm When a resin is applied, the thickness is at least about 0.25 mm (10 kVrms / 40 kVrms / mm).
　本実施例によれば、パワー半導体モジュール１００の大容量化を実現しながら高絶縁信頼性を担保するため、絶縁基板２上の表面電極７－１の面積を拡大して沿面距離を縮小した場合でも、沿面放電による短絡破壊を防ぐことを可能とするパワー半導体モジュール１００を提供することができる。 According to the present embodiment, in order to secure high insulation reliability while realizing a large capacity of the power semiconductor module 100, the area of the surface electrode 7-1 on the insulating substrate 2 is enlarged to reduce the creepage distance. However, it is possible to provide a power semiconductor module 100 capable of preventing short circuit breakage due to creeping discharge.
　図２に本発明の第２の実施形態（実施例２）に係るパワー半導体モジュールの構成を示す。 The structure of the power semiconductor module which concerns on FIG. 2 at 2nd Embodiment (Example 2) of this invention is shown.
　該図に示す如く、本実施例のパワー半導体モジュール２００は、実施例１と比較すると、固体樹脂等の硬質樹脂８の上方および下方にシリコーンゲル６を配置する点で実施例１と異なるが、その点を除いた他の構成は実施例１と共通である。 As shown in this figure, the power semiconductor module 200 of this embodiment is different from that of the first embodiment in that the silicone gel 6 is disposed above and below the hard resin 8 such as solid resin, The other configuration except for that point is common to the first embodiment.
　実施例１のように絶縁基板２と金属ベース３との間を粘性の高い硬質樹脂８で封止する場合には空隙が生じやすい。かかる空隙が存在しても局所的な絶縁破壊（部分放電）が発生せず、絶縁信頼性が低下することのない条件下では、実施例１の構成は有効であるが、そのような条件下に無い場合は別の実施形態が必要となる可能性がある。本実施例の構成は、そのような場合を想定して提案したものであり、絶縁基板２と金属ベース３との隙間には粘性が低く流動性の高いシリコーンゲル６が配置され、これで当該箇所を封止するため、当該箇所に空隙をつくることなく絶縁樹脂を充填することが可能である。 When sealing between the insulating substrate 2 and the metal base 3 with the hard resin 8 having high viscosity as in the first embodiment, a gap is likely to occur. Although the configuration of Example 1 is effective under such conditions that local dielectric breakdown (partial discharge) does not occur even if such air gaps exist, and the insulation reliability does not decrease, such conditions are effective. If not, another embodiment may be required. The configuration of the present embodiment is proposed on the assumption of such a case, and a silicone gel 6 having low viscosity and high fluidity is disposed in the gap between the insulating substrate 2 and the metal base 3. In order to seal a portion, it is possible to fill the insulating resin without creating a void in the portion.
　図３は本実施例におけるパワー半導体モジュール２００の作製方法に対応する作製工程流れ図（フローチャート）３００を示す。絶縁基板２の表面電極７－１上のコレクタ電極にパワー半導体チップ１を半田で接合した後、パワー半導体チップ１と絶縁基板２の表面電極７－１上のエミッタ電極・ゲート電極とをボンディングワイヤ４によるワイヤボンディングで互いに電気的に接続し、絶縁基板２の裏面電極７－２と金属ベース３とを半田で互いに電気的に接続する。金属ベース３と絶縁ケース５とを接着剤で互いに接続した後、絶縁基板２と金属ベース３との間を充填する量のシリコーンゲル６を注入して硬化した後に絶縁基板２の側面と絶縁ケース５との間に硬質樹脂（熱硬化樹脂）８を注入し硬化する。絶縁基板２を複数枚使用する場合には、各絶縁基板２同士が対向する側面との間に硬質樹脂（熱硬化樹脂）８を注入し硬化する。モジュール外部への引き出し配線である主端子（図示せず）と絶縁基板２の表面電極７－１とを半田で互いに接合し、更に絶縁ケース５の蓋を絶縁ケース５の側面部材に接着して金属ベース３と絶縁ケース５とによって空間が形成されるようにする。最後に、当該空間の内部へシリコーンゲル６を注入して硬化させる。 FIG. 3 shows a manufacturing process flow chart (flow chart) 300 corresponding to the manufacturing method of the power semiconductor module 200 in the present embodiment. After bonding the power semiconductor chip 1 to the collector electrode on the surface electrode 7-1 of the insulating substrate 2 by soldering, bonding wires between the power semiconductor chip 1 and the emitter electrode / gate electrode on the surface electrode 7-1 of the insulating substrate 2 The back electrode 7-2 of the insulating substrate 2 and the metal base 3 are electrically connected to each other by solder. After the metal base 3 and the insulating case 5 are connected to each other with an adhesive, the amount of silicone gel 6 filling the space between the insulating substrate 2 and the metal base 3 is injected and cured, and then the side surface of the insulating substrate 2 and the insulating case A hard resin (thermosetting resin) 8 is injected between the two and cured. When a plurality of insulating substrates 2 are used, a hard resin (thermosetting resin) 8 is injected and cured between the side surfaces facing each other. Bond the main terminal (not shown), which is a lead wire to the outside of the module, to the surface electrode 7-1 of the insulating substrate 2 with solder, and further adhere the lid of the insulating case 5 to the side member of the insulating case 5 A space is formed by the metal base 3 and the insulating case 5. Finally, silicone gel 6 is injected into the space and cured.
　本実施例によれば、絶縁基板２と金属ベース３との間に空隙が存在すると局所的な絶縁破壊（部分放電）が発生しやすくなる条件下においてもパワー半導体モジュール２００の大容量化を実現しながら高絶縁信頼性を担保するため、絶縁基板２上の表面電極７－１の面積を拡大して沿面距離を縮小した場合でも、沿面放電による短絡破壊を防ぐことを可能とするパワー半導体モジュール２００を提供することができる。 According to this embodiment, the capacity increase of the power semiconductor module 200 is realized even under the condition that local dielectric breakdown (partial discharge) is easily generated when the air gap exists between the insulating substrate 2 and the metal base 3. A power semiconductor module capable of preventing short circuit breakage due to creeping discharge even when the creepage distance is reduced by enlarging the area of the surface electrode 7-1 on the insulating substrate 2 in order to secure high insulation reliability while 200 can be provided.
　図４に本発明の第３の実施形態（実施例３）に係るパワー半導体モジュールの構成を示す。 The structure of the power semiconductor module which concerns on FIG. 4 at the 3rd Embodiment (Example 3) of this invention is shown.
　該図に示す如く、本実施例のパワー半導体モジュール４００は、実施例２と比較すると、絶縁ケース５の内壁面上の一部に突起９があり、突起９と絶縁基板２の一部とが硬質樹脂８で互いに接合される点で実施例２と異なるが、その点を除いた他の構成は実施例２と共通である。突起９と硬質樹脂８とを互いに接合した後に、シリコーンゲル６を注入・硬化する。ここで、突起２には突起２の上方と下方との間を貫通するスリットを設けてもよい。その場合、スリットがあるため、スリットを通して絶縁基板２の下方へもシリコーンゲル６を注入・配置することができる。また、実施例２では、硬質樹脂８を塗布・硬化する前に絶縁基板２の下方へシリコーンゲル６を注入・硬化し、硬質樹脂８を塗布・硬化した後にモジュール内部全体へシリコーンゲル６を注入・硬化するといった、シリコーンゲル６の注入・硬化プロセスが２回必要であった。これに対し、本実施例ではシリコーンゲル６の注入・硬化プロセスを１回に減らすことができるため、パワー半導体モジュール４００の作製がより簡易になる。 As shown in the figure, the power semiconductor module 400 of this embodiment has a protrusion 9 on a part of the inner wall surface of the insulating case 5 as compared with the second embodiment, and the protrusion 9 and a part of the insulating substrate 2 The second embodiment differs from the second embodiment in that it is bonded to each other by the hard resin 8, but the other configuration except this point is the same as the second embodiment. After the protrusions 9 and the hard resin 8 are bonded to each other, the silicone gel 6 is injected and cured. Here, the projection 2 may be provided with a slit penetrating between the upper side and the lower side of the projection 2. In that case, since there is a slit, the silicone gel 6 can be injected and disposed below the insulating substrate 2 through the slit. In Example 2, before applying and curing the hard resin 8, the silicone gel 6 is injected and cured below the insulating substrate 2, and after applying and curing the hard resin 8, the silicone gel 6 is injected throughout the module interior Two injection and curing processes of silicone gel 6 were required, such as curing. On the other hand, in the present embodiment, since the injection and curing process of the silicone gel 6 can be reduced to one, the fabrication of the power semiconductor module 400 becomes easier.
　本実施例によれば、パワー半導体モジュール４００の大容量化を実現しながら高絶縁信頼性を担保するため、絶縁基板２上の表面電極７－１の面積を拡大して沿面距離を縮小した場合でも、沿面放電による短絡破壊を防ぐことを可能とするパワー半導体モジュール４００をより簡易な作製プロセスで提供することができる。 According to the present embodiment, the area of the surface electrode 7-1 on the insulating substrate 2 is enlarged to reduce the creepage distance in order to secure high insulation reliability while realizing a large capacity of the power semiconductor module 400. However, it is possible to provide the power semiconductor module 400 capable of preventing short circuit breakage due to creeping discharge by a simpler manufacturing process.
　１　パワー半導体チップ
　２　絶縁基板
　３　金属ベース板
　４　ボンディングワイヤ
　５　絶縁ケース
　６　シリコーンゲル
　７－１　絶縁基板電極（表面電極）
　７－２　絶縁基板電極（裏面電極）
　８　硬質樹脂
　９　ケース突起 1 power semiconductor chip 2 insulating substrate 3 metal base plate 4 bonding wire 5 insulating case 6 silicone gel 7-1 insulating substrate electrode (surface electrode)
7-2 Insulating substrate electrode (back electrode)
8 Hard resin 9 Case projection

Claims (6)

  1. 　少なくとも１枚の絶縁基板と、
    　前記絶縁基板の第１の面および前記第１の面の反対側の面である第２の面にそれぞれ固定された第１の電極および第２の電極と、
    　前記絶縁基板の前記第１の電極に接合されたパワー半導体チップと、
    　前記絶縁基板の前記第２の電極に接合された金属ベースと、
    　前記絶縁基板と前記第１の電極と前記第２の電極と前記パワー半導体チップとを共に収容する絶縁ケースと、
    　前記金属ベースと前記絶縁ケースとによって形成される空間の内部に配置され、前記絶縁基板と前記第１の電極と前記第２の電極と前記パワー半導体チップとを共に封止するシリコーンゲルと
    を有するパワー半導体モジュールであって、
    　前記絶縁基板の互いに対向する側面同士の間、および前記絶縁基板に対向する前記絶縁ケースの側面と前記絶縁基板の側面との間の少なくともいずれか一方が硬質樹脂で互いに接合され、
    　前記硬質樹脂は、前記絶縁基板の前記第１の面であって前記第１の電極から露出している部分の一部または前記絶縁基板の前記第２の面であって前記第２の電極から露出している部分の一部のいずれか一方および前記絶縁基板の側面の一部を覆っている
    ことを特徴とするパワー半導体モジュール。     At least one insulating substrate,
    A first electrode and a second electrode fixed respectively to a first surface of the insulating substrate and a second surface opposite to the first surface;
    A power semiconductor chip bonded to the first electrode of the insulating substrate;
    A metal base bonded to the second electrode of the insulating substrate;
    An insulating case for accommodating the insulating substrate, the first electrode, the second electrode, and the power semiconductor chip together;
    It has a silicone gel which is disposed in the space formed by the metal base and the insulating case and seals the insulating substrate, the first electrode, the second electrode and the power semiconductor chip together. A power semiconductor module,
    At least one of the side surfaces of the insulating substrate facing each other and the side surface of the insulating case opposite to the insulating substrate and the side surface of the insulating substrate are mutually bonded with a hard resin.
    The hard resin is a part of a portion of the first surface of the insulating substrate exposed from the first electrode or a second surface of the insulating substrate from the second electrode A power semiconductor module characterized by covering any one of a part of an exposed portion and a part of a side surface of the insulating substrate.
  2. 　請求項１に記載のパワー半導体モジュールにおいて、
    　前記絶縁基板の前記第１の面であって前記第１の電極から露出している部分および前記絶縁基板の側面の一部は前記シリコーンゲルで覆われ、
    　前記絶縁基板の前記第２の面であって前記第２の電極から露出している部分および前記絶縁基板の側面の他の一部は前記硬質樹脂で覆われ、
    　前記絶縁基板の前記第１の面を上方、前記第２の面を下方とした場合に、前記硬質樹脂の上方が前記シリコーンゲルと接し、前記硬質樹脂の下方が前記金属ベースと接していることを特徴とするパワー半導体モジュール。     In the power semiconductor module according to claim 1,
    A portion of the first surface of the insulating substrate exposed from the first electrode and a part of the side surface of the insulating substrate are covered with the silicone gel;
    A portion of the second surface of the insulating substrate which is exposed from the second electrode and another part of the side surface of the insulating substrate are covered with the hard resin.
    When the first surface of the insulating substrate is upward and the second surface is downward, the upper side of the hard resin is in contact with the silicone gel, and the lower side of the hard resin is in contact with the metal base. Power semiconductor module characterized by
  3. 　請求項１に記載のパワー半導体モジュールにおいて、
    　前記絶縁基板の互いに対向する側面同士の間は前記硬質樹脂で互いに接合され、
    　前記絶縁基板の互いに対向する側面同士の間は、
    　前記絶縁基板の前記第１の面であって前記第１の電極から露出している部分の一部および前記絶縁基板の側面の一部が前記硬質樹脂で覆われ、
    　前記絶縁基板の前記第２の面であって前記第２の電極から露出している部分および前記絶縁基板の側面の他の一部が前記シリコーンゲルで覆われ、
    　前記絶縁基板の前記第１の面を上方、前記第２の面を下方とした場合に、前記硬質樹脂の上方および下方が前記シリコーンゲルと接している
    ことを特徴とするパワー半導体モジュール。     In the power semiconductor module according to claim 1,
    The mutually opposing side surfaces of the insulating substrate are bonded to each other by the hard resin,
    Between the mutually facing side surfaces of the insulating substrate,
    A part of the first surface of the insulating substrate which is exposed from the first electrode and a part of the side surface of the insulating substrate are covered with the hard resin;
    A portion of the second surface of the insulating substrate which is exposed from the second electrode and another part of the side surface of the insulating substrate are covered with the silicone gel;
    A power semiconductor module characterized in that the upper side and the lower side of the hard resin are in contact with the silicone gel when the first surface of the insulating substrate is upper and the second surface is lower.
  4. 　請求項３に記載のパワー半導体モジュールにおいて、
    　前記絶縁基板に対向する前記絶縁ケースの側面と前記絶縁基板の側面との間は前記硬質樹脂で互いに接合され、
    　前記絶縁基板に対向する前記絶縁ケースの側面と前記絶縁基板の側面との間は、
    　前記絶縁基板の前記第１の面であって前記第１の電極から露出している部分の一部および前記絶縁基板の側面の一部が前記硬質樹脂で覆われ、
    　前記絶縁基板の前記第２の面であって前記第２の電極から露出している部分および前記絶縁基板の側面の他の一部が前記シリコーンゲルで覆われ、
    　前記絶縁基板の前記第１の面を上方、前記第２の面を下方とした場合に、前記硬質樹脂の上方および下方が前記シリコーンゲルと接し、
    　前記硬質樹脂は更に前記絶縁ケースの内壁面と接している
    ことを特徴とするパワー半導体モジュール。     In the power semiconductor module according to claim 3,
    The side surface of the insulating case facing the insulating substrate and the side surface of the insulating substrate are mutually bonded by the hard resin,
    Between the side surface of the insulating case facing the insulating substrate and the side surface of the insulating substrate,
    A part of the first surface of the insulating substrate which is exposed from the first electrode and a part of the side surface of the insulating substrate are covered with the hard resin;
    A portion of the second surface of the insulating substrate which is exposed from the second electrode and another part of the side surface of the insulating substrate are covered with the silicone gel;
    When the first surface of the insulating substrate is upward and the second surface is downward, the upper side and the lower side of the hard resin are in contact with the silicone gel,
    The said hard resin is further in contact with the inner wall face of the said insulation case, The power semiconductor module characterized by the above-mentioned.
  5. 　請求項３に記載のパワー半導体モジュールにおいて、
    　前記絶縁基板に対向する前記絶縁ケースの側面と前記絶縁基板の側面との間は前記硬質樹脂で互いに間接的に接合され、
    　前記絶縁ケースの内壁面上には突起が形成されており、前記突起と、前記絶縁基板の前記第１の面であって前記第１の電極から露出している部分の一部とが、前記硬質樹脂で互いに接合されることにより、前記絶縁基板に対向する前記絶縁ケースの側面と前記絶縁基板の側面とが互いに接合される
    ことを特徴とするパワー半導体モジュール。     In the power semiconductor module according to claim 3,
    The side surface of the insulating case facing the insulating substrate and the side surface of the insulating substrate are indirectly joined to each other by the hard resin,
    A protrusion is formed on the inner wall surface of the insulating case, and the protrusion and a part of the first surface of the insulating substrate exposed from the first electrode are the protrusion. A power semiconductor module characterized in that a side surface of the insulating case facing the insulating substrate and a side surface of the insulating substrate are bonded to each other by being bonded to each other by a hard resin.
  6. 　請求項５に記載のパワー半導体モジュールにおいて、
    　前記突起は、前記絶縁基板の前記第１の面を上方、前記第２の面を下方とした場合に、前記突起の上方と下方との間を貫通するスリットを有する
    ことを特徴とするパワー半導体モジュール。     In the power semiconductor module according to claim 5,
    The power semiconductor is characterized in that the protrusion has a slit penetrating between the upper side and the lower side of the protrusion, when the first surface of the insulating substrate is above and the second surface is below. module.
PCT/JP2018/027040 2017-08-30 2018-07-19 Power semiconductor module WO2019044243A1 (en)

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JP2012084835A (en) * 2010-09-14 2012-04-26 Hitachi Ltd Power module and manufacturing method of the same

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