WO2019034505A1

WO2019034505A1 - Circuit for actuating a power semiconductor transistor

Info

Publication number: WO2019034505A1
Application number: PCT/EP2018/071579
Authority: WO
Inventors: Falko Friese; Peter Sinn
Original assignee: Robert Bosch Gmbh
Priority date: 2017-08-15
Filing date: 2018-08-09
Publication date: 2019-02-21
Also published as: DE102017214211A1

Abstract

A circuit (1) for actuating a power semiconductor transistor (2) having an actuation stage (3), which is configured to actuate the gate (4) of the power semiconductor transistor (2) using a control voltage (12) and, for this purpose, is connected to the gate (4) and the emitter (5) of the power semiconductor transistor (2), further having a protective circuit (6), which is likewise configured to actuate the gate (4) and, for this purpose, is connected to the gate (4) and the emitter (5), and also a current sensor (7) connected to the emitter (5) of the power semiconductor transistor (2) to determine a load current, wherein an output (8) of the current sensor (7) is made available to the protective circuit (6) and the protective circuit (6) is configured to decrease the control voltage at the gate (4) when a load current is greater than a threshold value current.

Description

title

Circuit for driving a power semiconductor transistor prior art

For controlling power semiconductor transistors with capacitive

Gate drive (in particular so-called insulated gate bipolar transistors [IGBTs] and metal oxide semiconductor field effect transistors [MOSFETs] and other corresponding transistors) are commonly called gate drivers with integrated or external push-pull output (also called push-pull stage) ) is used to drive the gate of the power semiconductor transistor. Such push-pull output stages are usually connected to the control electrodes of the power semiconductor transistor. The control electrodes are the gate and the emitter (also called source).

The Gegentaktendstufe usually forms a circuit which is connected between a driver for driving the power semiconductor transistor and the

Power semiconductor transistor itself is arranged to be made of a

Driving signal of the driver to form a control voltage for driving the gate of the power semiconductor transistor.

By means of the push-pull output stage, externally applied voltages are applied to the control electrodes, usually between an upper input voltage (eg +15 volts for switching on) and a lower one

Input voltage (eg -8 volts to turn off) can be switched.

In order to be able to control short-circuits (that is to say switch off safely), the load current of the power semiconductor transistor can be measured and taken into account by the driver for driving the power semiconductor transistor.

Usually, the driver is set up so that it detects a short circuit based on the measured load current and a suitable one

Short-circuit shutdown initiates, if the load current exceeds a previously selected fixed threshold. To avoid false tripping of the short-circuit detection, the load current is frequently set to a threshold which is twice to three times the highest expected regular operating current. With the

Operating current is here meant a current that can occur during normal operation of the power semiconductor transistor maximum.

At lower load current thresholds, false tripping of the short circuit detection due to transient currents, e.g. at

Compensation processes occur. Such transient currents may exceed the highest expected regular operating current.

For the operation of a power semiconductor transistor and a suitable control voltage is set.

The choice of the control voltage of the power semiconductor in the on state is subject to a conflict of goals. The higher the control voltage is selected, the lower the collector-emitter voltage (between the collector and the emitter of the power semiconductor transistor). This collector-emitter voltage leads to a power loss in the power semiconductor transistor in the on state. Accordingly, power losses in the power semiconductor transistor (also called forward losses) can be reduced during normal operation of the power semiconductor transistor due to a high control voltage. This is desirable. On the other hand, increases by a higher control voltage of the desaturation of the power semiconductor transistor. This increases the maximum short-circuit current that can occur. Ultimately, this leads to an increased load of the power semiconductor in the event of a short circuit. This is undesirable because the short-circuit protection should be designed so that the power semiconductor transistor should not be damaged by a short-circuit current occurring.

Disclosure of the invention

Described here are a circuit and an operating method for such a circuit with which the short-circuit current is limited, without increasing the forward losses of the power semiconductor during normal operation. This is achieved by a circuit for controlling a

Power semiconductor transistor comprising a drive stage, which for driving the gate of the power semiconductor transistor with a

Control voltage is set up and is connected to the gate and the emitter of the power semiconductor transistor, further comprising a

Protection circuit, which is also adapted to drive the gate and is connected to the gate and the emitter of the power semiconductor transistor, and connected to the emitter of the power semiconductor transistor current sensor for determining a load current through the power semiconductor transistor, wherein an output of the current sensor of

Protection circuit is provided and the protection circuit is adapted to lower the control voltage at the gate when a load current through the power semiconductor transistor is greater than one

Threshold current.

In particular, the circuit forms an intermediate assembly between a driver for operating a power semiconductor transistor and the

Power semiconductor transistor itself. For this purpose, the circuit preferably has signal inputs to the input of signals from the driver and outputs for connecting the circuit to the power semiconductor transistor. Below is the circuit individually but also together with the

Power semiconductor transistor described.

The power semiconductor transistor has a conventional structure with a gate (for applying a control voltage with which the power semiconductor transistor can be switched), an emitter and a collector. The emitter is usually connected to a ground potential. The emitter and the collector together also form the connections for the drive stage. The drive stage and the protection circuit are connected in parallel between the emitter and the gate and thus can equally (both) influence the control voltage applied to the gate. The protection circuit is configured to adapt the control voltage applied to the gate on the basis of the control voltage predetermined by the drive stage so as to influence the permeability of the power semiconductor transistor. In

Series with the power semiconductor transistor is arranged (preferably between the emitter and the reference potential, a current sensor, which by the Power semiconductor transistor can completely monitor current flowing. The current sensor has an output. At this output, a signal is available which includes information about the load current flowing through the power semiconductor transistor. This output or the signal available at this output is provided to the protection circuit. The

Protection circuitry is configured to lower the control voltage at the gate when a load current is greater than a threshold current.

Through the protection circuit thus finds a reduction (or

Down control) of the control voltage takes place when a large load current occurs.

By the described circuit, the conflicting goals in the determination of the control voltage can be at least partially resolved. The control voltage can be largely independent of the requirements for the

Define short-circuit protection. The short-circuit current limit is now independent of the choice of control voltage through the additional

Protection circuit realized.

The protection circuit may also be referred to as a "clamping circuit." The protection circuit is the crucial element of the solution described here.

The current sensor serves the purpose of determining a load current applied to the power semiconductor transistor. The current sensor can use any principle for determining a load current.

If a load current of the power semiconductor transistor is measured greater than the highest expected regular operating current, the voltage at the control electrodes of the power semiconductor is lowered, whereby the

Desaturation is lowered. In the case of a short circuit, the load on the

Power semiconductor significantly reduced.

Whether a circuit described here between a (usual) driver for a power semiconductor transistor and the power semiconductor transistor itself is provided, for example, by measuring the reactions of

Power semiconductor transistor and the driver to certain input signals are detected. In particular, this can be voltages to the Control electrodes are measured with increasing load current of the power semiconductor.

It is particularly advantageous if the protective circuit is set up so that it has no effects on the emitter and the gate of the power semiconductor transistor, provided that a load current measured by the current sensor is smaller than one

Threshold current.

The protection circuit behaves at load currents below the threshold current preferred as a very high resistance, the behavior of the

Power semiconductor transistor not affected in connection with the drive stage.

Moreover, it is particularly advantageous if the protective circuit has a transistor with which the control voltage at the gate can be reduced in dependence on a current measured by the current sensor.

A transistor in the protection circuit is preferably configured to establish a connection to a reference potential, via which the control voltage at the gate can be reduced. The gate of this transistor is preferably via a circuit or via a logic with the current sensor or the output of

Current sensors connected.

Moreover, it is particularly advantageous if the power semiconductor transistor is an insulated gate bipolar transistor (IGBT).

Insulated gate bipolar transistors are particularly suitable for switching high currents and are used, for example, in B-6 bridges in a motor vehicle with an electric drive to supply direct currents from an accumulator in

To convert alternating currents (in particular polyphase alternating currents) for a drive or, conversely, alternating currents (in particular

Polyphase AC currents) from a charging infrastructure or a generator into DC currents for an accumulator. However, the circuit described herein is also applicable when the power semiconductor transistor is a metal oxide field effect transistor (MOFSET) or any other voltage controlled transistor. Also particularly advantageous is when the drive stage in the manner of a

Push-pull output stage is designed, with which a control voltage between an upper input voltage and a lower input voltage for driving the gate can be provided. A push-pull output stage makes it possible to

Input signal efficiently into an output voltage in a given one

To convert voltage range between a (predetermined) upper input voltage and a (predetermined) lower input voltage. A

Push-pull output is often referred to as a "push-pull stage." A push-pull output is characterized in particular by the fact that they are low

Has lost power.

Preferably, the circuit also has a signal input, to which a driver module for driving the power semiconductor transistor can be connected via the circuit.

In addition, the circuit preferably has a signal output to which a

Driver module for driving the power semiconductor transistor can be connected via the circuit. The signal input and the signal output can each transitions or

Connecting lines between the driver and the circuit described here. It is also possible for the signal input and the signal output respectively to comprise changeable connection points (for example plug-in connections) with which a connection of the circuit to different drivers is possible.

In addition, the protection circuit is preferably configured to determine whether there is a transient transient current or an increased load current and to trigger a lowering of the control voltage at the gate only when there is an increased load current. In general, any conceivable logic can be provided in the protection circuit which takes into account not only the magnitude of the current (measured by the current sensor) by the power semiconductor transistor, but additionally information from the course of the current (in particular from the course of the current increase, angle of the rising edge etc.). In the protection circuit, any logic serving the purpose can be implemented from the available information with regard to the current through the power semiconductor transistor available at the output of the current sensor, to initiate appropriate measures for influencing the control voltage. The protection circuit or the logic implemented in the protection circuit can also take into account further information or signal inputs in influencing the control voltage.

The circuit described can be used to control various

Power semiconductors are used. The described circuit can, for. B.

can also be used with inverters, DCDC converters, solid state relays, etc.

The circuit described will be explained in more detail with reference to the figures. The figures explain the technical environment and show individual ones

Embodiments of the circuit, to which the disclosure is however not limited. Show it:

1 shows a typical characteristic field of a power semiconductor transistor,

FIG. 2: a circuit described, and FIG. 3: a time profile of gate voltage and load current of a

Power semiconductor transistor

Fig. 1 shows a typical characteristic diagram of a power semiconductor transistor of the type of insulated gate bipolar transistor (IGBT). To

the current through the transistor 1c (plotted on the current axis) can be seen

19), which is plotted here via the voltage applied between the collector and emitter UCE (plotted on the voltage axis 18) for different gate voltages UGE (voltages between gate and emitter) in the form of

various characteristics 20 is plotted.

The product of Ic and UCE represents the power loss experienced by the load current transmitted by the power semiconductor transistor. To

It can be seen that with increasing gate voltage UGE at the same voltage between the collector and emitter UCE a higher current Ic by the

Power semiconductor transistor can flow. The power loss of

Power semiconductor transistor in operation is thus by increasing the

Gate voltage UGE lower. Marked in the characteristic field are a desaturated region 22 and a saturated region 23, which are separated from a boundary line 21.

In the saturated region, the current Ic is independent of a current IB flowing through the gate to the emitter, which is also called a base current. In the desaturated region, the current Ic is proportional to the current IB flowing to the emitter via the gate. In the desaturated area is the

Power semiconductor transistor turned on and there flows a working current lc. However, the desaturated region will only perform during turn-on or turn-off of the power semiconductor transistor. In the desaturated region, the power semiconductor transistor has high losses. Therefore, the desaturated region is not used in the static operation of the power semiconductor transistor. The saturated region is used in the static operation of the power semiconductor transistor. It can be seen in the diagram that lc (and UCE) are lower at lower UGE, which also reduces the desaturation region current at lower UGE.

FIG. 2 schematically shows a circuit 1 described here, which is arranged between a driver module 14 for driving a power semiconductor transistor 2 and the power semiconductor transistor 2. The circuit 2 comprises the drive circuit 3, which is designed here as a push-pull output stage and from a passing via a signal input 13 in the circuit 1

Input signal generates a control voltage 12 for the gate 4, which is between an upper input voltage 10 and a lower input voltage 11. The power semiconductor transistor 2 has a gate 4, an emitter 5, and a collector 9. The output of the drive stage 3 is connected to the gate 4 and configured to provide a voltage across the emitter 5 at the gate 4. The emitter 5 is connected here to a ground potential 30. Parallel to the drive stage 3, the protection circuit 6 is connected between the gate 4 and the emitter 5, which is set up to influence the control voltage 12 at the gate 4. In series with the

Power semiconductor transistor 2 is a current sensor 7 is connected, which has an output 8, to which a signal is available, which is representative of the current flowing through the power semiconductor transistor 2 current. The

Protection circuit is adapted to take into account when influencing the control voltage 12, this signal from the current sensor 7. The circuit 1 preferably has a signal input 13 via which the driver module 14 can pass signals for driving the power semiconductor transistor 2 to the circuit 1. In addition, the driver module 14 preferably also has a signal input 15, via which signals from the circuit 1 can be transmitted back to the driver module 14. Such signals may be representative of the operating state of the power semiconductor transistor 2. Here is shown by way of example that a signal from the current sensor 7 (with a

Information about the working current flowing through the power semiconductor transistor 2) is available at the signal input 15 for the driver module 14.

FIG. 3 shows a time profile of currents and voltages in a described circuit 1 with a power semiconductor transistor 2. On the one hand, a gate voltage curve and a load current profile are shown as they are in the control of a power semiconductor transistor with the here

set described circuit 1. For comparison, a gate voltage waveform and a load current waveform are shown, as they set in a drive of a power semiconductor transistor without such a circuit. The upper diagram shows, over the time axis 16 common to the two diagrams, 16 current curves 17. The lower diagram shows 16 voltage curves 24 over the time axis.

As a temporal event, a short circuit 25 is noted on the time axis. In the upper diagram, it can be seen that the current profile with protection circuit 27 is reduced by the current reduction 31 compared with the current profile without protection circuit 26. To the current reduction 31, the short-circuit current is reduced here. This is achieved by the voltage curve with

Protective circuit 29 against the voltage curve without protection circuit 28 is reduced by the voltage reduction 32 in the event of a short circuit. As a result, a lower saturation current is established in the diagram according to FIG. 1 and the short-circuit current is reduced (see upper diagram in FIG. 3).

Claims

claims

Circuit (1) for driving a power semiconductor transistor

(2) having a drive stage

(3) which for driving the gate (4) of

Power semiconductor transistor (2) is arranged with a control voltage (12) and to the gate (4) and the emitter (5) of the power semiconductor transistor (2) is connected, further comprising a protection circuit (6), which also for driving the gate (4 ) is arranged and to the gate (4) and the emitter (5) of the power semiconductor transistor (2) is connected, and to the emitter (5) of the power semiconductor transistor (2) connected current sensor (7) for determining a load current through the

Power semiconductor transistor (2), wherein an output (8) of the current sensor (7) of the protection circuit (6) is provided and the protection circuit (6) is adapted to the control voltage at the gate

(4) when a load current through the power semiconductor transistor (2) is greater than one

Threshold current.

A circuit (1) according to claim 1, wherein the protection circuit (6) is arranged to have no effect on the emitter

(5) and the gate (4) of the

Power semiconductor transistor (2), provided that a load current measured by the current sensor (7) is smaller than a threshold current.

Circuit (1) according to one of the preceding claims, wherein the

Protective circuit (6) comprises a transistor with which the control voltage (12) at the gate (4) in response to a current from the current sensor (7) measured current can be reduced.

Circuit (1) according to one of the preceding claims, wherein the

Power semiconductor transistor (2) is an insulated gate bipolar transistor (IG BT).

Circuit (1) according to one of the preceding claims, wherein the

Control stage (3) is designed in the manner of a push-pull output stage, with which a control voltage (12) between an upper input voltage (10) and a lower input voltage (11) for driving the gate (4) can be provided.

6. Circuit (1) according to one of the preceding claims comprising a signal input (13) to which a driver module (14) for driving the power semiconductor transistor (2) via the circuit (1) can be connected.

7. Circuit (1) according to one of the preceding claims comprising a signal output (15) to which a driver module (14) for driving the power semiconductor transistor (2) via the circuit (1) can be connected.

8. The circuit (1) according to any one of the preceding claims, wherein the

Protective circuit (6) is adapted to determine whether a transient transient current or an increased load current is present and to trigger a lowering of the control voltage at the gate (4) only when there is an increased load current.