WO2019015353A1

WO2019015353A1 - Film layer patterning method, and array substrate and fabrication method therefor

Info

Publication number: WO2019015353A1
Application number: PCT/CN2018/080465
Authority: WO
Inventors: 汪军; 袁广才; 王东方; 方冲; 李广耀
Original assignee: 京东方科技集团股份有限公司; 合肥鑫晟光电科技有限公司
Priority date: 2017-07-18
Filing date: 2018-03-26
Publication date: 2019-01-24
Also published as: US20210223694A1; CN107275195B; US11307498B2; CN107275195A

Abstract

A film layer patterning method, and an array substrate and a fabrication method therefor. The film layer patterning method comprises: applying a photoresist (120) on a film layer (110) to be patterned; exposing and developing the photoresist (120), a region corresponding to a portion of the photoresist (120) that is completely removed after the exposure and development being a first region (121); post-baking the photoresist (120), the photoresist (120) being melted and collapsed at a high temperature to transform the region corresponding to the completely removed portion into a second region (122), and a mask pattern being formed on the post-baked photoresist (120); and patterning the film layer (110) by using the mask pattern as a mask.

Description

Film layer patterning method, array substrate and manufacturing method thereof

Cross-reference to related applications

The present application claims priority to Chinese Patent Application No. JP-A No. No. No. No. No. No. No. No. No. No.

Technical field

At least one embodiment of the present disclosure is directed to a film layer patterning method, an array substrate, and a method of fabricating the same.

Background technique

In the fabrication process of the array substrate, the process of patterning the film layer generally uses the photoresist as a mask to pattern the patterned film layer. Therefore, the precision of the photoresist mask to be formed is to be formed on the film layer. Small size patterns have a big impact.

Summary of the invention

At least one embodiment of the present disclosure provides a film layer patterning method, an array substrate, and a method of fabricating the same.

At least one embodiment of the present disclosure provides a film layer patterning method, comprising: coating a photoresist on a film layer to be patterned; exposing and developing the photoresist, and the photoresist is exposed and developed; The corresponding region of the completely removed portion is the first region; after the photoresist is post-baked, the photoresist is melted at a high temperature to change the corresponding region of the completely removed portion to the second region, and the post-baked photoresist Forming a mask pattern; patterning the film layer with the mask pattern as a mask.

For example, in some examples, a minimum dimension of the first region in a direction parallel to a plane of the film layer is a first dimension, a minimum dimension of the second region in a direction parallel to a plane of the film layer is a second dimension, and a second The size is smaller than the first size.

For example, in some examples, the photoresist is a positive photoresist.

For example, in some examples, the planar shape of the second region includes at least one or a combination of a circle and a line.

For example, in some examples, during the post-baking process, the post-baking temperature is from 150 ° C to 300 ° C to cause the photoresist to collapse at a high temperature.

For example, in some examples, the post-baking time is 10 s-500 s during post-baking.

For example, in some examples, the post-bake time is 10 s to 50 s during post-baking.

For example, in some examples, the second dimension is between 1 μm and 2.9 μm.

For example, in some examples, the first size is no less than 3 [mu]m.

For example, in some examples, the photoresist has a thickness in a direction perpendicular to the film layer of from 0.5 μm to 10 μm.

For example, in some examples, the thickness of the photoresist in a direction perpendicular to the film layer is from 1.5 μm to 2.2 μm.

For example, in some examples, the illumination intensity employed during exposure is 10 J/cm ³ -500 J/cm ³ .

At least one embodiment of the present disclosure provides a method of fabricating an array substrate, comprising: providing a substrate; forming a film layer to be patterned on the substrate; and using the film layer provided by any of the above embodiments The patterning method is patterned.

At least one embodiment of the present disclosure provides an array substrate fabricated by the above-described method of fabricating an array substrate.

For example, in some examples, the array substrate includes a film layer having a film layer pattern having the same planar shape as the second region.

DRAWINGS

In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings of the embodiments will be briefly described below. It is obvious that the drawings in the following description relate only to some embodiments of the present disclosure, and are not to limit the disclosure. .

FIG. 1 is a schematic flowchart of a film layer patterning method according to an embodiment of the present disclosure;

2A-2D are schematic diagrams showing a manufacturing process of the film layer patterning method illustrated in FIG. 1;

3A is a partial plan view of a film layer provided by an example of an embodiment of the present disclosure;

3B is a partial plan view of a film layer provided by another example of an embodiment of the present disclosure;

FIG. 4 is a schematic flow chart of a method for fabricating an array substrate according to an embodiment of the present disclosure.

Detailed ways

The technical solutions of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings of the embodiments of the present disclosure. It is apparent that the described embodiments are part of the embodiments of the present disclosure, and not all of the embodiments. All other embodiments obtained by a person of ordinary skill in the art based on the described embodiments of the present disclosure without departing from the scope of the invention are intended to be within the scope of the disclosure.

Unless otherwise defined, technical terms or scientific terms used in the present disclosure are intended to be understood in the ordinary meaning of the ordinary skill of the art. The words "first," "second," and similar terms used in the present disclosure do not denote any order, quantity, or importance, but are used to distinguish different components. The word "comprising" or "comprises" or the like means that the element or item preceding the word is intended to be in the "Upper", "lower", "left", "right", etc. are only used to indicate the relative positional relationship, and when the absolute position of the object to be described is changed, the relative positional relationship may also change accordingly.

In the study, the inventors of the present application found that the critical dimension (DICD) required to develop the openings in the photoresist mask is very high in the fabrication process of the array substrate. Exposure equipment used to make small-sized aperture patterns in photoresist masks generally has a limit accuracy. If it is necessary to prepare apertures below the limit accuracy, the normal mask method cannot meet the requirements, and a higher precision exposure can be purchased. Equipment and the preparation of high-precision masks can greatly increase production costs.

Embodiments of the present disclosure provide a film layer patterning method, an array substrate, and a method of fabricating the same. The film layering method comprises: coating a photoresist on the film layer to be patterned; exposing and developing the photoresist; the corresponding portion of the portion where the photoresist is completely removed after exposure and development is the first a region; after the photoresist is post-baked, the photoresist is melted at a high temperature to change a corresponding portion of the completely removed portion to a second region, and a post-baking photoresist is used to form a mask pattern; The mask patterns the film layer. The film layering method utilizes the characteristics of high-temperature collapse of the hot-melt photoresist after development and post-baking, and provides a possibility to form a small-sized pattern below the exposure machine precision of the film layer to be patterned, and the method is simple in process. ,low cost.

The film layer patterning method, the array substrate and the manufacturing method thereof provided by the embodiments of the present disclosure are described below with reference to the accompanying drawings.

An embodiment of the present disclosure provides a film layer patterning method, FIG. 1 is a schematic flowchart of a film layer patterning method according to an embodiment of the present disclosure, and FIGS. 2A-2D are a film layer patterning method illustrated in FIG. Schematic diagram of the production process. As shown in FIG. 1 and FIG. 2A-2D, the steps and manufacturing process of the film layer patterning method provided by an embodiment of the present disclosure include:

S101: Applying a photoresist on the film layer to be patterned.

For example, as shown in FIG. 2A, the film layer 110 to be patterned may be formed on the base substrate 100 by deposition or magnetron sputtering or the like. Fig. 2A is a schematic view, for example, a film layer may not be disposed on a base substrate.

For example, the base substrate 100 may be made of glass, polyimide, polycarbonate, polyacrylate, polyetherimide, polyethersulfone, polyethylene terephthalate, and polyethylene naphthalate. Made of one or more materials in the ester, this embodiment includes but is not limited thereto.

For example, the film layer 110 may be an insulating layer. For example, the film layer 110 may be a gate insulating layer, an interlayer insulating layer, a passivation layer, or an etch barrier layer, and the like, which is not limited in this embodiment.

For example, the film layer 110 may include an inorganic material such as an oxide, a sulfide, or a nitride, which is not limited in this embodiment.

For example, the oxide may include calcium oxide, zinc oxide, copper oxide, titanium dioxide, tin dioxide, etc.; the sulfide may include iron sulfide, copper sulfide, zinc sulfide, tin disulfide, sulfur dioxide, etc.; the nitride may include silicon nitride, Aluminum nitride, etc., this embodiment includes but is not limited thereto.

For example, the film layer 110 may also be an organic material, and may include, for example, one or a combination of polyimide, polyamide, polycarbonate, epoxy resin, etc., and the embodiment is not limited thereto.

For example, the film layer 110 may also be a metal layer. For example, the material of the film layer 110 may be one or more selected from the group consisting of aluminum, silver, molybdenum, titanium, platinum, gold, chromium, etc., which is not limited in this embodiment. The film layer 110 may also be another film layer.

For example, as shown in FIG. 2A, applying a photoresist on the film layer 110 to be patterned includes: applying a thin, uniform, and defect-free photoresist layer on the film layer 110 by spin coating. 120, the embodiment is not limited thereto, and other coating methods may also be employed.

For example, the coating temperature of the photoresist is generally the same as the room temperature to minimize the temperature fluctuation of the photoresist, thereby reducing process fluctuations.

S102: exposing and developing the photoresist, and the corresponding region of the portion where the photoresist is completely removed after exposure and development is the first region.

For example, a mask (not shown) is overlaid on the photoresist layer 120, and the photoresist layer 120 covered with the mask is exposed.

For example, the photoresist layer 120 may be irradiated with an electron beam, an ion beam, an X-ray, an ultraviolet ray, or the like. The embodiment is not limited thereto. For example, the ultraviolet ray may be an ordinary ultraviolet ray having a wavelength range of 200 nm to 400 nm, or may have a wavelength. The extreme ultraviolet rays in the range of 10 nm to 14 nm are not limited in this embodiment.

In this embodiment, the photoresist layer 120 is exposed by ultraviolet light to expose the photoresist layer 120 as an example. For example, the photoresist layer 120 uses an illumination intensity of 10 J/cm ³ during exposure. -500J/cm ³ .

For example, 120 employed in the light intensity during exposure of the photoresist layer may be 50J / cm ^³ -80J / cm ³ to cause sufficient exposure of the photoresist layer 120, the present embodiment is not limited thereto.

For example, 120 employed in the light intensity during exposure of the photoresist layer may also be ^{^{80J / cm 3 -200J / cm 3}} , 250J / cm 3 -500J / cm 3 or 10J / cm ^³ -40J / cm ³ and the like, The intensity of the light in the actual process may depend on the thickness of the photoresist layer 120.

For example, the photoresist is composed of a resin, a sensitizer, a solvent, and an additive. Before the exposure, the photoresist layer 120 is pre-baked, and the solvent in the photoresist layer 120 is sufficiently evaporated to dry the photoresist layer 120. To enhance its adhesion to the surface of the film layer 110, etc., and to improve the line resolution after exposure. Generally, the pre-baking temperature can be set to about 90 ° C - 120 ° C, and the embodiment is not limited thereto, but the pre-baking temperature cannot be too high to prevent the high-temperature collapse of the photoresist layer 120. Therefore, in the embodiment, The pre-bake temperature does not exceed 140 °C. The pre-baked photoresist layer 120 can be more strongly bonded to the film layer 110.

For example, a positive photoresist can be pre-baked in air, while a negative photoresist needs to be pre-baked in a nitrogen atmosphere.

For example, the photoresist layer 120 provided in this embodiment includes a photoresist which is a positive photoresist, and the positive photoresist includes, for example, a novolac resin. When no dissolution inhibitor is present, the novolac resin dissolves in the photoresist. In the developer, the sensitizer in the positive photoresist includes a photoactive compound (PAC). For example, the photosensitive compound may include diazonaphthoquinone (DNQ) or the like, which is not limited in this embodiment. Prior to exposure, diazonaphthoquinone is a strong dissolution inhibitor that reduces the rate of dissolution of the resin.

For example, in an ultraviolet exposure process, a photosensitive compound such as diazonaphthoquinone is chemically decomposed by a photochemical reaction in a positive photoresist to cut off the relationship between the main chain of the resin polymer and the chain, thereby weakening the polymer. The purpose is to become a solubility enhancer. The diazonaphthoquinone produces carboxylic acid in this exposure reaction, and its solubility in the developer is high, so the solubility of the exposed photoresist after the subsequent development treatment is increased, and the positive photoresist after exposure is exposed. The dissolution rate is almost 10 times that of the unexposed photoresist. Therefore, after the positive photoresist layer 120 is exposed, the positive photoresist layer 120 on the exposed region is completely removed to form a blank region (first region 121), and the photoresist on the unexposed region Layer 120 remains on film layer 110 as a subsequent protective film layer, and the pattern replicated onto the surface of film layer 110 is the same as the pattern on the mask layer on photoresist layer 120.

For example, insufficient development time may cause the photoresist layer 120 on the exposed region to be completely dissolved during development; if the development time is too long, the photoresist layer 120 on the unexposed region during development may also be removed from the photoresist layer 120. The edge is drilled to make the edge of the pattern deteriorate, and the like. Therefore, the time for developing the photoresist layer 120 in this embodiment may be 10s-500s, and the embodiment includes but is not limited thereto.

For example, the developer provided in this embodiment may be a medium-sized alkali solution. For example, the developer may include potassium hydroxide, tetramethylammonium hydroxide, ketone or acetazolamide, and the like, which is not limited in this embodiment.

For example, as shown in FIG. 2B, a portion corresponding to a portion of the photoresist layer 120 that is completely removed after exposure and development is a first region 121, which is a positive photoresist on the exposed region. The layer 120 is removed by the developer to remove the blank area left behind.

For example, as shown in FIG. 2B, the minimum dimension of the first region 121 in a direction parallel to the plane of the film layer 110 is the first dimension L1. It should be noted that, in the present embodiment, the minimum dimension L1 of the planar pattern of the first region 121 is taken as an example of the minimum dimension L1 of the first region 121 and the contact surface of the film layer 110.

For example, the first size L1 is not less than 3 μm. It should be noted that the size of the first size L1 is also not too large, generally on the order of micrometers. For example, the first size L1 may be 6-10 μm, and the embodiment includes but is not limited thereto.

For example, the shape of the orthographic projection of the plane of the first region 121 having the first dimension L1 on the film layer 110 may include at least one or a combination of a circle and a line, etc., that is, the plane pattern of the first region 121 may include a circle. At least one or a combination of the lines and the like, the embodiment includes but is not limited thereto.

S103: post-baking the photoresist, the photoresist is melted at a high temperature to change a corresponding region of the completely removed portion to a second region, and the post-baking photoresist forms a mask pattern.

In this embodiment, the photoresist coated on the patterned film layer is a hot-melt photoresist, and the heat-resistant composition of the hot-melt photoresist is lower than that of the conventional photoresist, so that the post-baking is performed. High temperature collapse occurs, but does not affect the performance of the photoresist.

For example, as shown in FIGS. 2B and 2C, the photoresist layer 120 having the first region 121 is post-baked, and the post-baking process is performed at a temperature of 150 ° C to 300 ° C to cause the photoresist layer 120 to collapse at a high temperature. That is, the photoresist layer 120 located around the first region 121 is collapsed during post-baking to cause one side of the contact film layer 110 of the photoresist layer 120 to be gathered toward the first region 121, and the photoresist layer 120 is away from the photoresist layer 120. One side of the film layer 110 collapses and collapses. Therefore, the photoresist around the first region 121 flows into the first region 121 after being melted at a high temperature to change the region corresponding to the completely removed photoresist portion. Two areas 122.

For example, the photoresist layer 120 having the first region 121 is post-baked, and the temperature used in the post-baking process may be 150 ° C - 200 ° C, or 250 ° C - 300 ° C, etc., which is not limited in this embodiment.

For example, as shown in FIG. 2C, the minimum dimension of the second region 122 in a direction parallel to the plane of the film layer 110 is the second dimension L2, that is, the smallest dimension of the side where the second region 122 is in contact with the film layer 110 is The second size L2 is smaller than the first size L1.

For example, as shown in FIG. 2C, the second region 122 has a second dimension L2 of 1 μm to 2.9 μm which is smaller than the first dimension L1 of the first region 121 shown in FIG. 2B.

For example, the second size 122 of the second region 122 may be 1 μm to 2.5 μm, or may be 1.5 μm to 2 μm, which is not limited in this embodiment.

For example, the shape of the plane of the second region 122 having the second dimension L2 may include at least one or a combination of a circle and a line, etc., that is, the planar shape of the second region 122 may include at least one or a combination of a circle and a line. Wait. It should be noted that the circular shape here is approximately circular, and for example, the shape of the plane of the second region 122 having the second dimension L2 may also be an ellipse or the like.

For example, as shown in FIG. 2C, the photoresist layer 120 has a thickness in the direction perpendicular to the film layer 110, that is, in the X direction of 0.5 μm to 10 μm.

For example, the thickness of the photoresist layer 120 in a direction perpendicular to the film layer 110 may be 1.5 μm - 2.2 μm to cause the photoresist layer 120 to collapse around the first region 121 of the first region 121. A second region 122 having a desired second dimension L2 is then formed.

For example, the thickness of the photoresist layer 120 in the X direction may be 3 μm to 5 μm, or the thickness of the photoresist layer 120 in the X direction may be 7 μm to 10 μm, which is not limited in this embodiment.

For example, the time for post-baking the photoresist layer 120 in this embodiment is 10 s to 500 s.

For example, the photoresist layer 120 is post-baked for 10 s to 50 s to cause the photoresist layer 120 around the first region 121 to collapse and collapse to form a second region 122 having a desired second dimension L2.

For example, the time for the post-baking of the photoresist layer 120 in this embodiment may be 100s-200s or 300s-500s, which is not limited in this embodiment.

For example, an example of the present embodiment is described by taking an example of patterning the film layer 110 to form an opening pattern, which is used for exposure before the pattern having a hole diameter of 1 μm to 2.9 μm is formed on the film layer 110 in this embodiment. The limit accuracy of the exposure machine of the photoresist layer 120 is generally 3 μm, and the partial step of forming the photoresist layer 120 having the second region 122 includes using a mask having a pore size of 5 μm as a thickness of 0.5 μm to 10 μm (for example, a mask of the photoresist layer 120 having a thickness of 1.5 μm to 2.2 μm, and exposing the photoresist layer 120, and the light intensity during the exposure may be 10 J/cm ^{3 to} 500 J/cm ³ , for example, exposure. The light intensity during the process can be selected from 50 J/cm ^{3 to} 80 J/cm ³ . After the exposure, the photoresist layer 120 is developed, and the time during the development may be selected from 10 s to 500 s. The developed photoresist layer 120 is post-baked, and the temperature during the post-baking process may be 150 ° C - 300 ° C, and the post-baking time may be 10 s - 500 s. For example, the post-baking time is 10 s - 50 s. After the above exposure, development, and post-baking, a second region 122 having a second dimension L2 of 1 μm to 2.9 μm is formed on the photoresist layer 120. Therefore, the film layer patterning method utilizes the characteristics of high temperature collapse of the hot melt photoresist after development and post-baking, and provides a possibility to form a small-sized pattern below the exposure machine precision of the film layer to be patterned, and the method The process is simple and the cost is low.

S104: pattern the film layer with the mask pattern as a mask.

For example, as shown in FIG. 2D, the film layer 110 is patterned using the photoresist layer 120 having the second region 122 as a mask to form a small-sized pattern 111/112.

For example, patterning the film layer 110 may form the opening 111 having the second dimension L2, that is, the opening 111 has a diameter of 1 μm to 2.9 μm. This embodiment includes but is not limited thereto.

For example, patterning the film layer 110 may also form a line shape 112 having a minimum size of the second dimension L2, that is, a short side dimension of the line shape 112 (a side length extending in the Y direction) is 1 μm - 2.9 μm, and this embodiment includes Not limited to this. It should be noted that FIGS. 2A-2D schematically illustrate the formation of a small-sized pattern 111/112. The embodiment is not limited thereto, and may also be a plurality of small-sized patterns 111/112.

For example, FIG. 3A is a partial plan view of a film layer provided by an example of an embodiment of the present disclosure, and FIG. 3B is a partial plan view of a film layer provided by another example of an embodiment of the present disclosure. As shown in FIG. 3A, the pattern formed on the film layer 110 using the mask pattern having the second region 122 as a mask is an opening 111.

For example, the planar shape of the opening 111 in the YZ plane may be a standard circular shape or an approximately circular shape, and the embodiment includes but is not limited thereto.

For example, the planar shape of the opening 111 in the YZ plane may also be an irregular shape or the like. It should be noted that FIG. 3A schematically shows an opening 111. The embodiment is not limited thereto, and may also be a plurality of openings 111.

For example, when the film layer 110 is a gate insulating layer and/or an interlayer insulating layer, the source and the drain for connecting the thin film transistor can be formed by using the photoresist layer 120 having the second region 122, that is, the mask pattern as a mask. The contact hole of the pole and the active layer (ie, the opening 111). The thin film transistor here is of a top gate type.

For example, when the film layer 110 is an etch barrier layer, a contact hole for connecting the source and the drain of the thin film transistor to the active layer may be formed by using the photoresist layer 120 having the second region 122 as a mask (ie, opening) Hole 111).

For example, when the film layer 110 is a passivation layer, a via hole (ie, an opening 111) is formed by using the photoresist layer 120 having the second region 122 as a mask to expose the drain and common electrode lines of the thin film transistor, and the exposed drain The pole electrode may be electrically connected to the subsequently formed pixel electrode through the via hole, and the exposed common electrode line may be electrically connected to the subsequently formed common electrode through the via hole, and the embodiment includes but is not limited thereto.

For example, the film layer 110 may also be other insulating layers or metal layers, etc., which is not limited in this embodiment.

For example, as shown in FIG. 3B, the planar pattern formed on the film layer 110 by using the photoresist layer 120 having the second region 122 as a mask may also be a line shape 112, that is, a trench or the like may be formed on the film layer 110. It should be noted that FIG. 3B schematically shows a line shape 112. The embodiment is not limited thereto, and may also be a plurality of line shapes 112.

An embodiment of the present disclosure provides a method for fabricating an array substrate. FIG. 4 is a schematic flow chart of a method for fabricating an array substrate according to an embodiment of the present disclosure. As shown in FIG.

S201: providing a substrate.

For example, the base substrate may be made of glass, polyimide, polycarbonate, polyacrylate, polyetherimide, polyethersulfone, polyethylene terephthalate, and polyethylene naphthalate. One or more materials are made, and the embodiment includes but is not limited thereto.

S202: forming a film layer to be patterned on the base substrate.

For example, a film layer to be patterned may be formed on a base substrate by deposition or magnetron sputtering or the like.

For example, the film layer may be an insulating layer. For example, the film layer may be a gate insulating layer, an interlayer insulating layer, a passivation layer or an etch barrier layer, and the like, which is not limited in this embodiment.

For example, the film layer may include an inorganic material such as a metal oxide, a metal sulfide, or a metal nitride, which is not limited in this embodiment.

For example, the film layer may also be an organic material, and may include, for example, one or a combination of polyimide, polyamide, polycarbonate, epoxy resin, etc., and the embodiment is not limited thereto.

For example, the film layer may also be a metal layer. For example, the material of the film layer may be one or more of materials such as aluminum, silver, molybdenum, titanium, platinum, gold, chromium, etc., which is not limited in this embodiment, for example. The film layer may also be other film layers.

S203: Patterning the film layer by a film layer patterning method.

In this embodiment, the film layer is patterned by any of the film layer patterning methods provided in the above embodiments, and the specific patterning step and the shape and size of the obtained small-sized pattern after patterning the film layer are not Let me repeat.

The method for fabricating the array substrate utilizes the characteristics of high-temperature collapse of the hot-melt photoresist after development and post-baking, and provides a possibility to form a small-sized pattern below the exposure machine precision of the film layer to be patterned, and the method is simple. ,low cost.

An embodiment of the present disclosure provides an array substrate fabricated by the method for fabricating the array substrate provided in the above embodiments.

For example, the array substrate includes a film layer having a film layer pattern substantially the same as a planar shape of the second region of the photoresist layer, and the film layer pattern has a minimum dimension in a direction parallel to the plane of the film layer. The second dimension, that is, the smallest dimension of the second region in a direction parallel to the plane of the film layer.

For example, the minimum dimension of the film pattern in a direction parallel to the plane of the film layer is from 1 μm to 2.9 μm.

For example, the minimum dimension of the film pattern in a direction parallel to the plane of the film layer may be from 1 μm to 2.5 μm, or may also be from 1.5 μm to 2 μm, which is not limited in this embodiment.

For example, the array substrate can be applied to display devices such as liquid crystal display devices, organic light-emitting diode (OLED) display devices, and televisions, digital cameras, mobile phones, watches, tablets, and notebook computers including the display devices. The present embodiment is not limited to any product or component having a display function such as a navigator.

There are a few points to note:

(1) Unless otherwise defined, the same reference numerals are used to refer to the same meaning

(2) In the drawings of the embodiments of the present disclosure, only the structures related to the embodiments of the present disclosure are referred to, and other structures may be referred to the general design.

(3) For the sake of clarity, layers or regions are enlarged in the drawings for describing embodiments of the present disclosure. It will be understood that when an element such as a layer, a film, a region or a substrate is referred to as being "on" or "lower" Or there may be intermediate elements.

The above is only the specific embodiment of the present disclosure, but the scope of the present disclosure is not limited thereto, and any person skilled in the art can easily think of changes or substitutions within the technical scope of the disclosure. It should be covered within the scope of protection of the present disclosure. Therefore, the scope of protection of the present disclosure should be determined by the scope of the claims.

Claims

A film layering method comprising:

Applying a photoresist on the film layer to be patterned;

Exposing and developing the photoresist, the corresponding region of the portion of the photoresist that is completely removed after exposure and development is a first region;

After the photoresist is post-baked, the photoresist is melted at a high temperature to change a corresponding portion of the completely removed portion to a second region, and the photoresist is post-baked to form a mask pattern;

The film layer is patterned using the mask pattern as a mask.
The film layer patterning method according to claim 1, wherein a minimum size of the first region in a direction parallel to a plane of the film layer is a first size, and the second region is parallel to the film The smallest dimension of the direction in which the layer is in the plane is the second dimension, and the second dimension is smaller than the first dimension.
The film layer patterning method according to claim 1 or 2, wherein the photoresist is a positive photoresist.
The film layer patterning method according to any one of claims 1 to 3, wherein the planar shape of the second region comprises at least one or a combination of a circle and a line.
The film layer patterning method according to any one of claims 1 to 4, wherein, in the post-baking process, the post-baking temperature is from 150 ° C to 300 ° C to cause the photoresist to collapse at a high temperature.
The film layer patterning method according to claim 5, wherein during the post-baking, the post-baking time is from 10 s to 500 s.
The film layer patterning method according to claim 6, wherein the post-baking time is 10 s to 50 s during the post-baking.
The film layer patterning method according to any one of claims 1 to 7, wherein the second size is from 1 μm to 2.9 μm.
The film layer patterning method according to claim 8, wherein the first size is not less than 3 μm.
The film layer patterning method according to any one of claims 1 to 9, wherein the photoresist has a thickness in a direction perpendicular to the film layer of from 0.5 μm to 10 μm.
The film layer patterning method according to claim 10, wherein the thickness of the photoresist in a direction perpendicular to the film layer is from 1.5 μm to 2.2 μm.
The film layer patterning method according to any one of claims 1 to 11, wherein the light intensity used in the exposure is 10 J/cm 3 to 500 J/cm 3 .
A method for fabricating an array substrate, comprising:

Providing a substrate;

Forming a film layer to be patterned on the base substrate;

The film layer is patterned by the film layer patterning method according to any one of claims 1 to 12.
An array substrate produced by the method for fabricating the array substrate according to claim 13.
The array substrate according to claim 14, wherein the film layer included in the array substrate has a film layer pattern having the same planar shape as that of the second region.