WO2019014875A1 - 电源产生电路、电容式阵列传感装置和终端设备 - Google Patents

电源产生电路、电容式阵列传感装置和终端设备 Download PDF

Info

Publication number
WO2019014875A1
WO2019014875A1 PCT/CN2017/093541 CN2017093541W WO2019014875A1 WO 2019014875 A1 WO2019014875 A1 WO 2019014875A1 CN 2017093541 W CN2017093541 W CN 2017093541W WO 2019014875 A1 WO2019014875 A1 WO 2019014875A1
Authority
WO
WIPO (PCT)
Prior art keywords
switch
output
signal
generating circuit
phase
Prior art date
Application number
PCT/CN2017/093541
Other languages
English (en)
French (fr)
Inventor
王程左
Original Assignee
深圳市汇顶科技股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 深圳市汇顶科技股份有限公司 filed Critical 深圳市汇顶科技股份有限公司
Priority to PCT/CN2017/093541 priority Critical patent/WO2019014875A1/zh
Priority to CN201780000653.1A priority patent/CN107454993B/zh
Priority to EP17898346.6A priority patent/EP3457570B1/en
Priority to US16/125,403 priority patent/US10921158B2/en
Publication of WO2019014875A1 publication Critical patent/WO2019014875A1/zh

Links

Images

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/01—Shaping pulses
    • H03K5/04—Shaping pulses by increasing duration; by decreasing duration
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01D—MEASURING NOT SPECIALLY ADAPTED FOR A SPECIFIC VARIABLE; ARRANGEMENTS FOR MEASURING TWO OR MORE VARIABLES NOT COVERED IN A SINGLE OTHER SUBCLASS; TARIFF METERING APPARATUS; MEASURING OR TESTING NOT OTHERWISE PROVIDED FOR
    • G01D5/00—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable
    • G01D5/12—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means
    • G01D5/14—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage
    • G01D5/24—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage by varying capacitance
    • G01D5/2405—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage by varying capacitance by varying dielectric
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/94—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the way in which the control signals are generated
    • H03K17/96—Touch switches
    • H03K17/962—Capacitive touch switches
    • H03K17/9622—Capacitive touch switches using a plurality of detectors, e.g. keyboard
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/01—Details
    • H03K3/012—Modifications of generator to improve response time or to decrease power consumption
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
    • H03K2217/0036—Means reducing energy consumption
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
    • H03K2217/0081—Power supply means, e.g. to the switch driver
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
    • H03K2217/94—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00 characterised by the way in which the control signal is generated
    • H03K2217/94042—Means for reducing energy consumption
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
    • H03K2217/94—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00 characterised by the way in which the control signal is generated
    • H03K2217/96—Touch switches
    • H03K2217/9607—Capacitive touch switches
    • H03K2217/96071—Capacitive touch switches characterised by the detection principle
    • H03K2217/960725—Charge-transfer

Definitions

  • Embodiments of the present invention relate to the field of capacitive array sensing technologies, and in particular, to a power generation circuit, a capacitive array sensing device, and a terminal device.
  • Capacitive array sensors are widely used in a variety of consumer terminal electronic devices. For example, a capacitive array sensor for touch control on a display screen of a terminal device, and, for example, a capacitive array sensor for identity information authentication (human limb/biological information recognition) in a terminal device.
  • a capacitive array sensor for touch control on a display screen of a terminal device and, for example, a capacitive array sensor for identity information authentication (human limb/biological information recognition) in a terminal device.
  • identity information authentication human limb/biological information recognition
  • a power generation circuit, a capacitive array sensing device and a terminal device are provided, which can improve the utilization of the output charge of the power generation circuit.
  • a power generation circuit including:
  • a driving voltage generating circuit for generating a driving voltage signal
  • a pulse generating circuit comprising a first input terminal, a second input terminal, a first output terminal and an energy storage terminal, wherein the pulse generating circuit receives the driving voltage signal through the first input terminal and passes the second input Receiving, at a positive phase of the communication signal, the pulse generating circuit outputs the driving voltage signal from the first output terminal, the first output terminal in a negative phase of the communication signal The driving voltage signal is not output, and the pulse generating circuit outputs the electric charge input from the first output terminal to the energy storage terminal.
  • the embodiment of the invention provides a power generation circuit, by embedding a pulse generation circuit in the power generation circuit, so that the pulse generation circuit can recover when the TX is in the positive phase stage when the TX is in the positive phase stage.
  • the charge of the aforementioned parasitic capacitance thereby effectively improving the utilization of the output charge of the power generating circuit.
  • the pulse generating circuit includes: a control unit, a first branch and a second branch, wherein the control unit controls the first branch during a positive phase of the communication signal
  • the circuit outputs the driving voltage signal from the first output terminal, and in a negative phase phase of the communication signal, the control unit controls the first branch such that the first output terminal does not output the driving voltage signal
  • controlling the second branch to output the charge input from the first output to the energy storage end.
  • control unit is configured to generate, according to the communication signal, a plurality of control signals, the plurality of control signals being used to control a switch and the second branch in the first branch The switch in the middle.
  • the first branch includes a first switch
  • the driving voltage generating circuit is connected to the first output by the first switch
  • the plurality of control signals include a first control a signal, the first control signal being operative to turn on the first switch during a positive phase of the communication signal and to disconnect the first switch during a negative phase phase of the communication signal.
  • the second branch includes an inductor, a second switch, and a third switch
  • the first output is connected to the energy storage end by the inductor and the second switch
  • a first port is disposed between the inductor and the second switch
  • the first port is connected to the device ground by the third switch
  • the plurality of control signals comprise a second control signal and a third control signal
  • the second control signal is configured to turn off the second switch at an initial timing of a negative phase phase of the communication signal until the voltage of the first output terminal drops to a voltage of the device ground a second switch
  • the third control signal is configured to turn on the third switch at an initial time of a negative phase phase of the communication signal until a voltage of the first output terminal drops to a voltage of the device ground Open the third open.
  • the second branch further includes a fourth switch
  • the first output is connected to the device ground by the fourth switch
  • the plurality of control signals include a fourth control signal
  • the fourth control signal is configured to turn on the fourth switch when a voltage of the first output terminal is less than or equal to a voltage of the device ground.
  • the voltage of the first output terminal when the voltage of the first output terminal is equal to the voltage of the device ground, the voltage of the first output terminal can be ensured to be locked at the device ground, thereby effectively improving the recovery rate of the charge stored in the parasitic capacitance.
  • the second branch further includes a fifth switch, the fifth switch is parallel to both ends of the inductor, and the plurality of control signals include a fifth control signal, the fifth The control signal is operative to turn on the fifth switch during a positive phase of the communication signal and to disconnect the fifth switch during a negative phase of the communication signal.
  • the fifth switch in the embodiment of the present invention can ensure that the inductance is in the reset state in the positive phase phase of the communication signal TX_VCC until the initial timing of the negative phase phase of the TX_VCC, thereby effectively improving the recovery rate of the charge stored in the parasitic capacitance.
  • the third switch, the fourth switch, and the fifth switch are turned on when the received control signal is in a positive phase, the first switch and the second switch It is turned on when the phase phase of the received control signal is in the negative phase phase.
  • control unit includes a first comparator and a second comparator
  • first comparator is configured to compare a potential difference between the first output and a device ground and output a first signal
  • the second comparator is configured to compare a potential difference between the energy storage end and the first port and output a second signal, where the first signal or the second signal is used to control the control unit to generate the Multiple control signals.
  • a non-inverting input terminal of the first comparator is connected to the device ground, and a negative phase input terminal of the first comparator is connected to the first output terminal, the second A non-inverting input of the comparator is coupled to the energy storage terminal, and a negative phase input of the second comparator is coupled to the first port.
  • the power generating circuit further includes a power diode and a first capacitor
  • the pulse generating circuit further includes a second output
  • the driving voltage generating circuit is connected to the first through the power diode And a second output connected to the second output by the first capacitor.
  • the energy storage end is connected to a system power supply, or the energy storage end is connected to at least one module in the terminal device through a clamp circuit, and an output voltage of the clamp circuit is used as the at least one The supply voltage of a module.
  • a capacitive array sensing device comprising: a capacitive array sensor, the power generating circuit of any one of the first aspects, wherein the power generating circuit is used for the capacitive array sensor powered by.
  • the capacitive array sensing device of the embodiment of the present invention recovers and reuses the charge in the parasitic capacitance between the sensor ground (that is, the floating ground) and the device ground by the power generating circuit, thereby not only improving the power generating circuit
  • the utilization of the output charge can also reduce the power consumption of the capacitive array sensor.
  • the capacitive array sensor includes a sensor ground of the capacitive array sensor, a power terminal of the capacitive array sensor, and a communication interface, the first output end and the sensor ground Connected, the second output is connected to the power terminal, and the second input is connected to the communication interface.
  • the charge input from the first output is the charge stored in the parasitic capacitance between the sensor ground and the device ground.
  • the capacitive array sensor includes a metal plate, a multiplexer, a scanning module, and a capacitance detecting circuit
  • the scanning module is connected to the second input through the communication interface
  • a scanning module is further connected to the capacitance detecting circuit by the multiplexer and the metal plate
  • the capacitive array sensor is configured to generate a second capacitance between the metal plate and the human body through the
  • the scan module controls the multiplexer to deliver the charge in the second capacitor to the capacitance detecting circuit, and the capacitance detecting circuit detects the capacitance value of the second capacitor.
  • a terminal device comprising the capacitive array sensing device of any of the second aspects.
  • the terminal device in the embodiment of the present invention can improve the usage time of the terminal device, thereby improving the user experience.
  • FIG. 1 is a structural diagram of a prior art capacitive array sensor circuit
  • FIG. 2 is a schematic diagram of signal waveforms in accordance with an embodiment of the present invention.
  • FIG. 3 is a schematic diagram of a power generation circuit in accordance with an embodiment of the present invention.
  • FIG. 4 is a schematic diagram of another power generating circuit in accordance with an embodiment of the present invention.
  • FIG. 5 is a schematic diagram of another power generating circuit in accordance with an embodiment of the present invention.
  • FIG. 6 is a schematic structural view of a capacitive array sensor device according to an embodiment of the present invention.
  • FIG. 7 is a schematic diagram of an operation timing of a power generation circuit according to an embodiment of the present invention.
  • FIG. 8 is a schematic block diagram of a terminal device according to an embodiment of the present invention.
  • the circuit structure includes a capacitive array sensor 120 and a power generation circuit 110.
  • the capacitive array sensor 120 includes a communication interface 121, a scanning module 122, a multiplexer 123, and a plurality of top metal electrode plates.
  • the metal electrode plate 124a is exemplarily shown in FIG. 1), the dielectric layer 125, the capacitance detecting circuit 126, and the like.
  • the scanning module 122 is connected to the capacitance detecting circuit 126 through a multiplexer 123 and a metal electrode plate 124a.
  • the metal electrode plate 124a is used to form a capacitance between the body limb (for example, a finger) at a contact point of the human body, and the multiplexer 123 selects at least one capacitor by controlling the detection signal CTRL such that the at least one capacitor is strobed.
  • the capacitance detecting circuit 126 is configured to detect the size of the gated at least one capacitor, so that human body contact information (including position information or distance information) can be obtained.
  • the CTRL is a control detection signal sent by the scanning module 122 to the multiplexer 123, and is used to change the opening and closing of the module by changing the voltage of the pin according to the actual use requirement and the data manual provided by the power supply manufacturer. Broken to achieve the purpose of the control system.
  • the scanning module 122 can control the multiplexer 123 to select a capacitor C X(n) by CTRL and deliver the capacitor C X(n) to the capacitance detecting circuit 126.
  • the capacitance is also referred to as “capacity” and refers to the amount of charge storage under a given potential difference; that is, the capacitance C X(n) in the embodiment of the present invention can be understood as: the capacitive array sensor 120 The metal electrode plate in the dielectric capacity generated by the dielectric layer and the human body.
  • the scanning module 122 is also connected to the power generating circuit 110 through the communication interface 121.
  • the power generating circuit 110 serves as a power source for the capacitive array sensor 120, and specifically, may include a driving voltage (V CCL ) generator 111 , a power diode 112 , a capacitor 113 , a switch 115 , and a switch 114 .
  • V CCL driving voltage
  • the V CCL generator 111 is connected to the sensor ground (Sensor GND, SGND) of the capacitive array sensor 120 through a switch 114.
  • the switch 114 On the side close to the sensor ground, the switch 114 is connected to the device ground through the switch 115, the V CCL generator 111 is also coupled to the power supply terminal (Sensor VDD, SVDD) of the capacitive array sensor 120 via a power diode 112, which is coupled to the power supply terminal SVDD via a capacitor 113.
  • device ground GND may also be referred to as “common ground” or “ground” or “device common ground” or the like, such as a common line in three-wire communications commonly used in serial communications.
  • the sensor ground SGND is the ground of the capacitive array sensor 120, the sensor ground SGND may also be referred to as “floating ground”, and the power supply terminal SVDD is the port of the power supply source (power generating circuit 110) of the capacitive array sensor 120.
  • the scanning module 122 sends a detection signal TX to the communication interface 121, the TX is an excitation signal for detecting C X(n) ; and the communication interface 121 receives the detection signal TX. Thereafter, it is converted into a signal having a signal amplitude of VCC, that is, a communication signal TX_VCC, and is sent to the power generation circuit 110.
  • the power generation circuit 110 generates a first pulse signal VL and a second pulse signal VH according to the driving voltage generated by the V CCL generator 111 and the received TX_VCC, and the power supply terminal SVDD and the sensor ground SGND of the capacitive array sensor 120 are respectively used for The second pulse signal VH and the first pulse signal VL are received.
  • the V CCL generator 111 is used to generate a driving voltage signal having an amplitude of VCCL.
  • the detection signal TX controls the on and off of the switch 144, so that the power generation circuit 110 generates the first pulse signal VL and the second pulse signal VH according to the driving voltage generated by the V CCL generator 111 and the received TX_VCC. .
  • the switch 114 is turned on, and the V CCL generator 111 pulls the VL up to the VCCL level, since the output end of the first pulse signal VL is connected to the second pulse signal through the capacitor 113.
  • the voltage across the capacitor 113 can not be abrupt, that is, the amplitude of VH is also synchronously raised to VCCL + VCC, at this time, the power diode 112 is reverse biased, and then in the off state; in TX In the negative phase phase, the switch 114 is turned off and the sensor ground SGND is pulled back to the same potential as the device ground GND, thereby providing a "floating" voltage to the capacitive array sensor 120.
  • the VL is a pulse signal whose amplitude is VCCL and is in phase with the same frequency as TX. Therefore, the sensor ground SGND of the capacitive array sensor 120 is also a pulse of the same frequency as the TX signal with respect to the device ground GND.
  • the VH is a pulse signal having an amplitude of VCCL+VCC and being in phase with the same frequency as TX.
  • C X(n) for characterizing human body contact information is a signal approximately GND with respect to the device ground, it is assumed that the parasitic capacitance 131 of the finger to the device ground GND is sufficiently large, and the scanning module obtains an amplitude of VCCL+.
  • the amplitude of the TX(n) signal which is the detection signal TX of VCC and then applied to the capacitor C X(n) , is also VCCL+VCC.
  • the VL is a pulse signal having the same amplitude as the VCCL and the same frequency as the TX
  • the VH is a pulse signal having the amplitude VCCL+VCC and the same frequency as the TX
  • the amplitude of the TX is also VCCL+. VCC.
  • the capacitance detection if the amplitude of the TX signal becomes large, a smaller C X(n) can be detected or the amount of detection signals that can be obtained in the case of the same C X(n) becomes larger, so the capacitance can be increased by using "floating technology".
  • the performance of array sensors is widely used.
  • the voltage of the power supply terminal SVDD and the sensor ground SGND voltage are floating, and the potential difference always maintains a difference of about VCC, thus causing the sensor to obtain a detection signal having a larger amplitude than the system power supply VCC. TX, which improves sensor performance.
  • the capacitor 130 is a parasitic capacitance C PAR of SGND to GND, the C PAR is equal to the sum of the capacitor 131, the capacitor 132 and the capacitor 133, the capacitor 132 is the parasitic capacitance C S of the device ground GND to the earth, and the capacitor 131 is the finger-to-device ground.
  • the C PAR has a magnitude of several hundred picofarads (pF), generally ranging from 200 pF to 800 pF, depending on the implementation of the capacitive array sensor 120 and the number of sensing units it contains. factor.
  • the first pulse signal VL of the sensor ground SGND directly charges and discharges C PAR , which will cause a large loss.
  • the loss of C PAR during the operation of the sensor can be calculated by the following formula. power:
  • P Cpar.Loss is the power loss of C PAR during sensor operation
  • I Cpar.Loss is the equivalent loss current
  • V CCL is the same as VCCL
  • f TX is the frequency of the TX signal.
  • the power loss of the C PAR is 11.2% to 571.4% of the power of the sensor array.
  • the C PAR loss will be very large, thus making The overall power consumption of the sensor becomes very large, resulting in a shortened use time of the terminal device battery and a reduced user experience.
  • the power supply generating circuit can be applied to power the capacitive array sensor.
  • a pulse generating circuit is embedded in the power generating circuit, so that the pulse generating circuit can perform charge on the parasitic capacitance between the sensor ground (that is, floating) and the device ground when the TX is in a negative phase step. Recycling not only improves the utilization of the output charge of the power generating circuit, but also reduces the power consumption of the capacitive array sensor.
  • the technical solution of the embodiments of the present invention can also support a higher floating voltage, a faster TX frequency, and a larger array area, thereby realizing a low power consumption, high performance capacitive array sensor.
  • FIG. 3 is a schematic configuration diagram of a power generation circuit 400 according to an embodiment of the present invention.
  • the power generating circuit 400 includes a driving voltage generating circuit 410 for generating a driving voltage signal, and a pulse generating circuit 460 including a first input terminal 461, a second input terminal 462, a first output terminal 463, and The energy storage terminal 464 is configured to receive the driving voltage signal VCCL through the first input terminal 461, and receive the communication signal TX_VCC through the second input terminal 462.
  • the first output terminal 463 outputs the driving voltage signal VCCL.
  • the driving voltage signal VCCL is not output from the first output terminal 463, and the electric charge input from the first output terminal 463 is input.
  • V ER the charge output from the first output terminal 463 to the energy storage terminal 464 is referred to as V ER .
  • the pulse generating circuit 460 includes: a control unit 469, a first branch 481, and a second branch 482 for controlling a positive phase of the communication signal TX_VCC. Controlling the first branch 481 to output the driving voltage signal from the first output end The VCCL, in the negative phase phase of the communication signal TX_VCC, controls the first branch 481 not to output the driving voltage signal VCCL from the first output terminal, and controls the second branch 482 to be input from the first output terminal 463. The charge is output to the energy storage terminal 464.
  • control unit 469 is configured to generate a plurality of control signals according to the communication signal TX_VCC, and the plurality of control signals are used to control the switches in the first branch 481 and the switches in the second branch 482.
  • the first control signal for controlling the first switch 471 is denoted by E
  • the second control signal for controlling the second switch 472 is denoted by C for controlling the third switch 473
  • the three control signals are indicated by A
  • the fourth control signal for controlling the fourth switch 474 is indicated by B
  • the fifth control signal for controlling the fifth switch 475 is indicated by D.
  • the first branch 481 can include a first switch 471, and the driving voltage generating circuit 410 is connected to the first output end 463 through the first switch 471, the plurality of control signals.
  • a first control signal E is provided for turning on the first switch 471 in a positive phase phase of the communication signal TX_VCC, and disconnecting the first switch 471 in a negative phase phase of the communication signal TX_VCC.
  • the first switch 471 when the TX_VCC is in the positive phase phase, the first switch 471 is turned on, and the driving voltage generating circuit 410 pulls the level of the first output terminal 463 to VCCL, and when the TX_VCC is in the negative phase phase, the first switch is turned off. With a switch 471, the drive voltage generating circuit 410 does not pull the level of the first output 463 high to VCCL.
  • the second branch 482 may include an inductor 477, a second switch 472, and a third switch 473.
  • the first output is connected to the second switch 472 through the inductor 477 and the second switch 472.
  • the energy storage end 464 is provided with a first port 476 between the inductor 477 and the second switch 472.
  • the first port 476 is connected to the device ground GND through the third switch 473.
  • the plurality of control signals include a second control.
  • a signal C and a third control signal A for disconnecting the second switch 472 at an initial timing of the negative phase of the communication signal TX_VCC until the voltage of the first output 463 drops to
  • the voltage of the device ground GND is turned on by the second switch 472, and the third control signal A is used to turn on the third switch 473 at an initial timing of the negative phase phase of the communication signal TX_VCC until the first output terminal 463
  • the third opening 473 is turned off when the voltage drops to the voltage of the device ground GND.
  • the first switch 471 when TX is in the negative phase phase, the first switch 471 is turned off, and the driving voltage generating circuit 410 does not raise the level of the first output terminal 463 to VCCL.
  • the second switch 472 is turned on and the third switch 473 is turned off, and the charge stored in the positive phase phase of the TX_VCC is transferred to the inductor 477; until the first output
  • the charge in inductor 477 is transferred to energy storage terminal 464 by turning off second switch 472 and turning on third switch 473. Further, recycling and storage of the stored charge in the capacitor 300 is achieved.
  • the technical solution of the embodiment of the present invention is that at the initial moment when the TX_VCC is in the negative phase phase, the on period of the second branch 482 starts, and the charge stored in the capacitor 300 is transferred to the inductor 477, when the sensor ground is SGND. After the voltage level drops to the voltage level of the device ground GND, the on period of the second branch 482 ends, then the turn-off period of the second branch 482 begins, transferring the energy stored in the inductor 477 to the energy storage terminal 464. Thereby, recycling and recycling of the charge stored in the capacitor 300 is achieved.
  • the on period T ON of the second branch 482 is equal to one quarter of the LC resonance period, namely:
  • T ON depends on capacitor 300 and inductor 477, and the charge in capacitor 300 can generally be obtained by testing.
  • the constraint condition of T ON is generally less than 1/20 of the TX period, then the required inductance 477 can be calculated according to equation (2).
  • the larger the inductor 477 is selected the longer the T ON is, the lower the response time requirement for other circuits is, but the falling edge time of the first pulse signal VL becomes longer; and the smaller the inductor 477 is selected, the smaller the T The shorter the ON, the closer the first pulse signal VL becomes to the ideal pulse signal, but the response time requirements for other circuits increase.
  • the peak current from inductor 477 is:
  • the Boost freewheeling time T OFF' is obtained as:
  • DCM Discontinuous Current Mode
  • the highest "floating" voltage VCCL that can be used in the embodiment of the present invention can be at least the system power supply VCC.
  • the loss caused by the parasitic capacitance under the same conditions in the prior art is extremely great, and therefore, the present invention has a large low power consumption advantage compared with the prior art.
  • the control unit 469 may include a first comparator 465 and a second comparator 466, and the first comparator 465 is configured to compare the first output end 463. a potential difference from the device ground GND and outputting a first signal, that is, a first signal is output by comparing VL and GND, the second comparator 466 is for comparing a potential difference between the energy storage terminal 464 and the first port 476 and The second signal is output, that is, the second signal is output by comparing V ER and SW, and the first signal or the second signal is used to control the control unit 469 to generate the plurality of control signals.
  • the non-inverting input terminal of the first comparator 465 is connected to the device ground GND
  • the negative phase input terminal of the first comparator 465 is connected to the first output terminal 463
  • the positive phase input of the second comparator 466 is The terminal is connected to the energy storage terminal 464
  • the negative phase input terminal of the second comparator 466 is connected to the first port 476.
  • the charge stored in the positive phase of the TX_VCC is transferred to the inductor 477;
  • the first comparator 465 determines that the voltage of the first output terminal 463 drops to the voltage of the GND, turns on the second switch 472 and turns off the third switch 473 to transfer the charge in the inductor 477 to the energy storage end 464;
  • the second comparator 466 determines that the voltage of the first port 476 drops to the voltage of the energy storage terminal 464, the charge in the inductor 477 is transferred to the energy storage terminal 464 by turning off the second switch 472, and finally the capacitor is realized.
  • the storage charge in 300 is recycled and reused.
  • the substrate bias voltage of the second switch 472 can be provided by the output of the substrate bias selection circuit (DBB), and the DBB selects the highest one of the source voltage and the drain voltage of the second switch 472 as the bias of the substrate. Set the voltage.
  • DBB substrate bias selection circuit
  • the first control signal E may be determined by the control unit 469 according to the phase phase of the communication signal TX_VCC. For example, assume that the first switch 471 is active low, that is, the switch is closed when the control signal is low. When TX_VCC is in the negative phase phase, the first switch 471 is turned off, and when TX_VCC is in the positive phase phase, the first switch 471 is turned on.
  • the second control signal C and the third control signal A may be determined by the control unit 469 according to the phase phase of the communication signal TX_VCC and the comparison result of the first comparator 465 or the second comparator 466.
  • the third switch 473 is turned on at the initial timing of the negative phase phase of the communication signal TX_VCC until the first comparator 465 compares that VL is less than or equal to GND.
  • control signal for driving the switch in embodiments of the present invention may be a high current signal that is amplified by the driver to a weak electrical signal that is capable of driving the switch.
  • the control unit may further include a control logic module 467 and a buffer drive circuit 468.
  • the control logic module 467 obtains the control signals A to E according to the input TX_VCC, the comparison result of the first comparator 465, and the comparison result of the second comparator 466, wherein A to E are enhanced driving by the buffer driving circuit 468. Output.
  • the second branch 482 may further include a fourth switch 474.
  • the first output end 463 is connected to the device GND through the fourth switch 474.
  • the plurality of control signals include The fourth control signal B is used to turn on the fourth switch 474 when the voltage of the first output terminal 463 is less than or equal to the voltage of the device ground GND.
  • the second branch 482 may further include a fifth switch 475.
  • the fifth switch 475 is connected in parallel to the two ends of the inductor, and the plurality of control signals include a fifth control signal D.
  • the fifth control signal D is for turning on the fifth switch 475 in the positive phase phase of the communication signal TX_VCC, and turning off the fifth switch 475 in the negative phase phase of the communication signal TX_VCC.
  • the fifth switch 475 in the embodiment of the present invention has a relatively wide voltage range and a high on-resistance requirement, a complementary switch design can be adopted, which can prevent the fifth switch 475 from occupying a large amount in the chip. Area.
  • the power generating circuit 400 further includes a power diode 480 and a first capacitor 490.
  • the pulse generating circuit 460 further includes a second output terminal 470 through which the driving voltage generating circuit 410 passes. Connected to the second output 470, the first output 463 is coupled to the second output 470 via the first capacitor 490.
  • the power diode 480 in the embodiment of the present invention may also be in the form of a synchronous switch tube.
  • the power diode 480 and the first capacitor 490 in the embodiment of the present invention may be the same as the power diode 112 and the first capacitor 113 shown in FIG. 1 , and may be different, and are not specifically limited in the embodiment of the present invention.
  • FIG. 4 is improved with respect to the circuit configuration shown in FIG. 1 in that the power generating circuit 110 of FIG. 1 is replaced with a power generating circuit 400, that is, the power generating circuit 400 includes a driving voltage generating circuit 410 and pulse generation. Circuit 460.
  • the driving voltage generating circuit 410 shown in FIG. 4 and the VCCL generator 110 shown in FIG. 1 may be the same, and the output voltage value may be any value, including but not limited to: a low dropout linear regulator. (low dropout regulator, LDO), boost converter circuit (Boost), charge pump (Charge Pump).
  • Boost boost converter circuit
  • Charge Pump Charge pump
  • the energy storage end 464 can be coupled to a system power source or other independent storage capacitor.
  • the energy storage end 464 can also be connected to at least one module in the terminal device, the output voltage of the energy storage terminal 464 being the supply voltage of the at least one module. It should be understood that the energy storage end 464 in the embodiment of the present invention may be connected to any module, circuit or unit that needs to be powered, and is not specifically limited in the embodiment of the present invention.
  • the energy storage terminal 464 can be connected to the "clamp circuit” 810, the VERC is obtained through the “clamp circuit” 810, and the VERC is re-outputted to the multi-channel low-dropout linear regulator 820 (low).
  • the dropout regulator (LDO) is used as a power source for a plurality of output voltage supply systems, wherein the storage capacitor 800 is used to store energy. This makes it possible to avoid the storage voltage VER from interfering with VH, thereby improving the performance of the sensor device.
  • FIG. 6 is a schematic circuit diagram of a capacitive array sensing device 910 in accordance with an embodiment of the present invention.
  • the capacitive array sensing device 910 includes: a power generating circuit 400 and a capacitive array sensor 200, wherein the capacitive array sensor 200 includes the capacitive array a sensor ground SGND of the sensor, a power supply terminal SVDD of the capacitive array sensor 400, and a communication interface 210, the first output terminal 463 is connected to the sensor ground SGND, and the second output terminal 470 is connected to the power supply terminal SVDD, the second The input terminal 462 is coupled to the communication interface 210, and the power generation circuit 400 is configured to supply power to the capacitive array sensor 200.
  • the capacitive array sensor 200 includes a metal electrode plate 241a, a multiplexer 230, a scanning module 220, a dielectric layer 250, and a capacitance detecting circuit 260.
  • the scanning module is connected to the second input through the communication interface, and the scanning module The 220 is connected to the capacitance detecting circuit 260 through the multiplexer 230 and the metal electrode plate 141a.
  • the scan module 220 is also coupled to the power generation circuit 100 via a communication interface 210.
  • the capacitive array sensor 200 is configured to generate a second capacitor 241b between the metal plate 241a and the human body, and the multiplexer 230 is controlled by the scanning module 220 to deliver the charge in the second capacitor 241b to the capacitor.
  • the detection circuit 260 detects the charge in the second capacitor 241b through the capacitance detecting circuit 260. That is, in the negative phase phase of the communication signal TX_VCC, the charge input from the first output terminal 464 is the charge stored in the capacitor 300 between the sensor ground SGND and the device ground GND.
  • the communication signal TX_VCC in the embodiment of the present invention is a signal after passing through the communication interface, and is a signal of the same frequency and phase as the detection signal TX.
  • the signal amplitude of the communication signal TX_VCC is between GND and VCC
  • the signal amplitude of the detection signal TX is between GND and VCC+VCCL.
  • the capacitive array sensor 200 in the embodiment of the present invention has the same principle as the capacitive array sensor 200 shown in FIG. 1 . To avoid repetition, details are not described herein again.
  • the third switch 473, the fourth switch 474, and the fifth switch 475 as shown in FIG. 4 or FIG. 5 are active high, that is, the switch is turned on when the control signal is at a high level; the first switch 471 and the second switch 472 is active low, that is, the switch is turned on when the control signal is low.
  • 0 is used to indicate a low level
  • 1 is used to indicate a high level.
  • the voltage at the first output 463 is thus pulled high to VCCL (ie, capacitor 300 is synchronously charged to the VCCL voltage) to form a positive phase phase of the first pulse signal VL. Due to the first An output terminal 463 is connected to the second output terminal 470 through the capacitor 490, so that the voltage across the capacitor 490 cannot be abruptly changed, that is, the voltage of the second output terminal 470 is also synchronously raised to VCCL+VCC to form a second pulse signal.
  • the positive phase phase of VH at this time, power diode 480 is turned off. It can be understood that in the positive phase phase of TX_VCC, the load of VH is the capacitive array sensor 200, and specifically, the capacitive array sensor 200 is powered by the capacitor 490.
  • the first pulse signal VL needs to be pulled back to the device ground GND.
  • it is directly pulled back to the GND through the switch, which results in being stored in the capacitor 300.
  • the charge is directly discharged to the device ground GND, which greatly increases the power consumption of the sensor.
  • the second branch 482 in the pulse generating circuit 460 starts to operate, and the charge stored in the capacitor 300 in the positive phase phase of TX_VCC is transferred to The energy storage end 464, which is reused, greatly reduces the power consumption of the sensor.
  • the first switch 471 and the second switch 472 are turned off.
  • the fourth switch 474 and the fifth switch 475 turn on the third switch 473.
  • the capacitor 300 and the inductor 477 are in a parallel resonant state, and the charge in the capacitor 300 is transferred to the inductor 477.
  • the current of the inductor 477 rises in a "sinusoidal shape", and the resonance point (the first output terminal 463) The "cosine shape” is lowered, thereby causing the charge in the capacitor 300 to be transferred into the inductor 477.
  • the fifth switch 475 is turned off to release the reset state of the inductor 477.
  • the inductor 477 continues to charge the energy storage terminal 464.
  • the source-drain voltage of the second switch 472 is reversed, and the second comparator 466 outputs 1, control logic.
  • the module 467 responds accordingly, C becomes 1, and the second switch 472 is turned off to prevent the current reverse current of the energy storage terminal 464 from flowing to the device ground GND; further, D becomes 1, turning on the fifth switch 475, That is, the inductor 477 is reset to prevent the parasitic capacitance of the inductor 477 and the first port 476 from being LC. resonance.
  • TX_VCC repeatedly switches the phase at a certain frequency, and the first pulse signal VL and the second pulse signal VH can output a "floating power" signal of the same frequency to the capacitive array sensor 200.
  • the capacitive array sensing device in the embodiment of the present invention can be applied to any type of terminal device, for example, in the terminal device 900 shown in FIG. 8, thereby effectively improving the usage time of the terminal device 900, and further Improve the user experience.
  • the terminal device 900 includes a capacitive array sensing device 910, and the capacitive array sensing device 910 may be a sensing device as shown in FIG. 6. To avoid repetition, details are not described herein again.
  • circuits, branches, and units may be implemented in other manners.
  • the branch described above is schematic.
  • the division of the unit is only a logical function division, and the actual implementation may have another division manner, for example, multiple units or components may be combined or may be integrated into A branch, or some features can be ignored, or not executed.
  • the integrated unit if implemented in the form of a software functional unit and sold or used as a standalone product, may be stored in a computer readable storage medium.
  • the technical solution of the present application which is essential or contributes to the prior art, or a part of the technical solution, may be embodied in the form of a software product, which is stored in a storage medium, including
  • the instructions are used to cause a computer device (which may be a personal computer, server, or network device, etc.) to perform all or part of the steps of the methods described in various embodiments of the present application.
  • the foregoing storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk, and the like. .

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • General Physics & Mathematics (AREA)
  • Near-Field Transmission Systems (AREA)
  • Electronic Switches (AREA)
  • Ultra Sonic Daignosis Equipment (AREA)
  • Electrotherapy Devices (AREA)

Abstract

提供了一种电源产生电路、电容式阵列传感装置和终端设备，该电源产生电路包括：驱动电压产生电路，用于产生驱动电压信号；脉冲产生电路，包括第一输入端、第二输入端、第一输出端和储能端，所述脉冲产生电路通过所述第一输入端接收所述驱动电压信号，并通过所述第二输入端接收通信信号，在所述通信信号的正相位阶段，所述脉冲产生电路从所述第一输出端输出所述驱动电压信号，在所述通信信号的负相位阶段，所述第一输出端不输出所述驱动电压信号，并且所述脉冲产生电路将从所述第一输出端输入的电荷输出到所述储能端。能够有效提高该电源产生电路的输出电荷的利用率。

Description

电源产生电路、电容式阵列传感装置和终端设备 技术领域
本发明实施例涉及电容式阵列传感技术领域，尤其是涉及一种电源产生电路、电容式阵列传感装置和终端设备。
背景技术
电容式阵列传感器被广泛地应用在各种消费类终端电子设备上。例如，终端设备显示屏上用于触摸控制的电容阵列传感器，又例如，终端设备中的用于身份信息认证(人体肢体/生物信息识别)的电容式阵列传感器。如今，为了增加用户体验且或为了提高传感器性能，越来越多的电容式阵列传感器采用了“浮地技术”。
具体来说，在计算电路时先指定某点电位为零，即这一点为“地”。但在某些电路中，为了更方便计算，可能指定另一点电位为零，这点对先前那个“地”称为“浮地”。在电容式阵列传感装置领域，假设人体肢体接触点与电路的介质层产生的电容为CX，TX信号是检测该CX的激励信号。如果使得TX信号幅度变大，可以检测到更小的CX或者在相同CX情况下可以得到的检测信号量变大。也就是说，使用“浮地”可以提高电容式阵列传感器的性能。
然而，采用“浮地”时，电容式阵列传感器的“浮地”和“公共地”(也称为“实地”或“设备公共地”或“设备地”)之间会存在较大的寄生电容。现有技术中，一种常用的方案是在“浮地”和“公共地”之间跨接一个泄放开关，用以释放所积累的电荷。但是，将寄生电容存储的电荷直接泄放到“公共地”，会造成很大的电荷损耗，进而会导致终端设备的电池的输出电荷的利用率过低。
发明内容
提供了一种电源产生电路、电容式阵列传感装置和终端设备，能够提高该电源产生电路的输出电荷的利用率。
第一方面，提供了一种电源产生电路，包括：
驱动电压产生电路，用于产生驱动电压信号；
脉冲产生电路，包括第一输入端、第二输入端、第一输出端和储能端，所述脉冲产生电路通过所述第一输入端接收所述驱动电压信号，并通过所述第二输入端接收通信信号，在所述通信信号的正相位阶段，所述脉冲产生电路从所述第一输出端输出所述驱动电压信号，在所述通信信号的负相位阶段，所述第一输出端不输出所述驱动电压信号，并且所述脉冲产生电路将从所述第一输出端输入的电荷输出到所述储能端。
本发明实施例给出了一种电源产生电路，通过在电源产生电路中内嵌一个脉冲产生电路，使得该脉冲产生电路能够在TX处于负相位阶时，能够回收在TX处于正相位阶段时存储在前述寄生电容的电荷，从而有效提高该电源产生电路的输出电荷的利用率。
在一些可能的实现方式中，所述脉冲产生电路包括：控制单元、第一支路和第二支路，其中，在所述通信信号的正相位阶段，所述控制单元控制所述第一支路从所述第一输出端输出所述驱动电压信号，在所述通信信号的负相位阶段，所述控制单元控制所述第一支路使得所述第一输出端不输出所述驱动电压信号，并控制所述第二支路将从所述第一输出端输入的电荷输出到所述储能端。
在一些可能的实现方式中，所述控制单元用于根据所述通信信号生成多个控制信号，所述多个控制信号用于控制所述第一支路中的开关和所述第二支路中的开关。
在一些可能的实现方式中，所述第一支路包括第一开关，所述驱动电压产生电路通过所述第一开关连接至所述第一输出端，所述多个控制信号包括第一控制信号，所述第一控制信号用于，在所述通信信号的正相位阶段导通所述第一开关，在所述通信信号的负相位阶段断开所述第一开关。
在一些可能的实现方式中，所述第二支路包括电感、第二开关和第三开关，所述第一输出端通过所述电感和所述第二开关连接至所述储能端，所述电感和所述第二开关之间设置有第一端口，所述第一端口通过所述第三开关连接至设备地，所述多个控制信号包括第二控制信号和第三控制信号，所述第二控制信号用于，在所述通信信号的负相位阶段的初始时刻断开所述第二开关，直到所述第一输出端的电压下降至所述设备地的电压时导通所述第二开关，所述第三控制信号用于，在所述通信信号的负相位阶段的初始时刻导通所述第三开关，直到所述第一输出端的电压下降至所述设备地的电压时断 开所述第三开。
在一些可能的实现方式中，所述第二支路还包括第四开关，所述第一输出端通过所述第四开关连接至所述设备地，所述多个控制信号包括第四控制信号，所述第四控制信号用于，在所述第一输出端的电压小于或等于所述设备地的电压时导通所述第四开关。
由此，在所述第一输出端的电压等于所述设备地的电压时，可以确保该第一输出端的电压锁定在设备地，进而能够有效提高对寄生电容中存储的电荷的回收率。
在一些可能的实现方式中，所述第二支路还包括第五开关，所述第五开关并联于所述电感的两端，所述多个控制信号包括第五控制信号，所述第五控制信号用于，在所述通信信号的正相位阶段导通所述第五开关，在所述通信信号的负相位阶段断开所述第五开关。
本发明实施例中的第五开关，能够确保电感在通信信号TX_VCC的正相位阶段处于复位态，直到TX_VCC的负相位阶段的初始时刻，进而能够有效提高对寄生电容中存储的电荷的回收率。
在一些可能的实现方式中，所述第三开关、所述第四开关和所述第五开关在接收到的控制信号为正相位阶段时导通，所述第一开关和所述第二开关在接收到的控制信号的相位阶段为负相位阶段时导通。
在一些可能的实现方式中，所述控制单元包括第一比较器和第二比较器，所述第一比较器用于比较所述第一输出端与设备地之间的电势差并输出第一信号，所述第二比较器用于比较所述储能端与所述第一端口之间的电势差并输出第二信号，所述第一信号或所述第二信号用于控制所述控制单元生成所述多个控制信号。
在一些可能的实现方式中，所述第一比较器的正相输入端与所述设备地相连，所述第一比较器的负相输入端与所述第一输出端相连，所述第二比较器的正相输入端与所述储能端相连，所述第二比较器的负相输入端与所述第一端口相连。
在一些可能的实现方式中，所述电源产生电路还包括功率二极管和第一电容，所述脉冲产生电路还包括第二输出端，所述驱动电压产生电路通过所述功率二极管连接至所述第二输出端，所述第一输出端通过所述第一电容连接至所述第二输出端。
在一些可能的实现方式中，所述储能端与系统电源相连，或者所述储能端通过钳位电路连接至终端设备中的至少一个模块，所述钳位电路的输出电压作为所述至少一个模块的供给电压。
第二方面，提供了一种电容式阵列传感装置，包括：电容式阵列传感器，第一方面中任一种所述的电源产生电路，所述电源产生电路用于为所述电容式阵列传感器供电。
本发明实施例的电容式阵列传感装置，通过该电源产生电路对传感器地(也就是浮地)和设备地之间的寄生电容中的电荷进行回收再利用，不仅能够提高该电源产生电路的输出电荷的利用率，还能够降低该电容式阵列传感器的功耗。
在一些可能的实现方式中，所述电容式阵列传感器，包括所述电容式阵列传感器的传感器地、所述电容式阵列传感器的电源端和通信接口，所述第一输出端与所述传感器地相连，所述第二输出端与所述电源端相连，所述第二输入端与所述通信接口相连，
在一些可能的实现方式中，在所述通信信号的负相位阶段，从所述第一输出端输入的电荷为所述传感器地与设备地之间的寄生电容中存储的电荷。
在一些可能的实现方式中，所述电容式阵列传感器包括金属板、多路选择器、扫描模块和电容检测电路，所述扫描模块通过所述通信接口连接至所述第二输入端，所述扫描模块还通过所述多路选择器和所述金属板连接至所述电容检测电路，所述电容式阵列传感器用于，通过所述金属板与人体肢体之间产生第二电容，通过所述扫描模块控制所述多路选择器将所述第二电容中的电荷输送至所述电容检测电路，通过所述电容检测电路检测所述第二电容的电容值。
第三方面，提供了一种终端设备，其特征在于，包括第二方面中任一项所述的电容式阵列传感装置。
本发明实施例的终端设备，能够提高终端设备的使用时长，进而提高用户体验。
附图说明
图1是现有技术的电容式阵列传感器电路的结构图；
图2是根据本发明实施例的信号波形的示意图；
图3是根据本发明实施例的电源产生电路的原理图；
图4是根据本发明实施例的另一电源产生电路的原理图；
图5是根据本发明实施例的另一电源产生电路的原理图；
图6是根据本发明实施例的电容式阵列传感器装置的示意性结构图；
图7是根据本发明实施例的电源产生电路的工作时序的示意图；
图8是根据本发明实施例的终端设备的示意性框图。
具体实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚地描述。
为了便于理解，下面结合图1描述现有技术中使用“浮地技术”的电容式阵列传感器的电路的结构。
如图1所示，该电路结构包括电容式阵列传感器120及电源产生电路110，其中，电容式阵列传感器120包括：通信接口121、扫描模块122、多路选择器123、多个顶层金属电极板(图1中示例性示出了金属电极板124a)、介质层125及电容检测电路126等。
在图1所示的电路中，扫描模块122通过多路选择器123和金属电极板124a连接至电容检测电路126。其中，金属电极板124a用于与人体肢体(例如，手指)在人体肢体接触点之间形成电容，多路选择器123通过控制检测信号CTRL选择至少一个电容，使得上述至少一个电容被选通连接至电容检测电路126，该电容检测电路126用于检测被选通的至少一个电容的大小，从而可以得到人体肢体接触信息(包含位置信息或距离信息)。
其中，CTRL是扫描模块122向多路选择器123发送的控制检测信号，用于根据实际使用需求情况及电源生产商提供的数据手册，通过对引脚的电压进行改变从而改变模块的开启及关断，达到控制系统的目的。例如，在多路选择器123为一个时，扫描模块122可以通过CTRL控制多路选择器123选择出一个电容CX(n)，并将该电容CX(n)输送至电容检测电路126。可以理解，电容亦称作“电容量”，是指在给定电位差下的电荷储藏量；也就是说，本发明实施例中的电容CX(n)可以理解为：电容式阵列传感器120中的金属电极板，通过介质层与人体肢体产生的电容量。
此外，扫描模块122还通过通信接口121连接至所述电源产生电路110。 电源产生电路110作为电容式阵列传感器120的供电源，具体地，可以包括驱动电压(VCCL)产生器111、功率二极管112、电容113、开关115和开关114。其中，VCCL产生器111通过开关114连接至电容式阵列传感器120的传感器地(Sensor GND，SGND)，在靠近该传感器地的一侧，开关114通过开关115连接至设备地，VCCL产生器111还通过功率二极管112连接至电容式阵列传感器120的电源端(Sensor VDD，SVDD)，该传感器地SGND通过电容113连接至该电源端SVDD。
应理解，在一些实现中，设备地GND也可以称为“公共地”或“实地”或“设备公共地”等，例如，串行通信中常用的三线通信中的公共线。传感器地SGND为电容式阵列传感器120的地，传感器地SGND也可以称为“浮地”，电源端SVDD为电容式阵列传感器120的供电电源(电源产生电路110)的端口。
具体地，电源产生电路110为电容式阵列传感器120供电过程中，扫描模块122向通信接口121发送检测信号TX，该TX是检测CX(n)的激励信号；通信接口121接收到检测信号TX后，将其转换为信号幅度为VCC的信号，即通信信号TX_VCC，并发送给电源产生电路110。电源产生电路110根据VCCL产生器111生成的驱动电压和接收到的TX_VCC，生成第一脉冲信号VL和第二脉冲信号VH，该电容式阵列传感器120的电源端SVDD及传感器地SGND分别用于接收该第二脉冲信号VH及该第一脉冲信号VL。其中，VCCL产生器111用于产生幅度为VCCL的驱动电压信号。
进一步地，通过检测信号TX控制开关144的导通和关断，使得电源产生电路110根据VCCL产生器111生成的驱动电压和接收到的TX_VCC，生成第一脉冲信号VL和第二脉冲信号VH。具体地，在TX为正相位阶段时，导通开关114，VCCL产生器111会将VL拉高至VCCL电平，由于该第一脉冲信号VL的输出端通过电容113连接至第二脉冲信号VH的输出端，因此，电容113的两端电压不能突变，即，VH的幅度也会同步被抬高至VCCL+VCC，此时，功率二极管112反向偏置，进而处于截止状态；在TX为负相位阶段时，关断开关114，传感器地SGND会被下拉回与设备地GND相等的电位，以此为电容式阵列传感器120提供“浮地”电压。
通过以上分析可以看出，该VL是幅度为VCCL且与TX同频同相位的脉冲信号，因此，电容式阵列传感器120的传感器地SGND相对于设备地 GND也是与TX信号同频同相位的脉冲信号，该VH是幅度为VCCL+VCC且与TX同频同相位的脉冲信号。此外，由于用于表征人体肢体接触信息的CX(n)是近似相对设备地GND的信号，因此，假设，手指对设备地GND的寄生电容131足够大，则扫描模块会得到幅度为VCCL+VCC的检测信号TX，继而作用到电容CX(n)的TX(n)信号的幅度也为VCCL+VCC。
即，如图2所示，该VL是幅度为VCCL且与TX同频同相位的脉冲信号，VH是幅度为VCCL+VCC且与TX同频同相位的脉冲信号，TX的幅度也为VCCL+VCC。
由电容检测原理可知，TX信号幅度变大可以检测到更小的CX(n)或者在相同CX(n)情况下可以得到的检测信号量变大，所以使用“浮地技术”可以提高电容式阵列传感器的性能而被广泛应用。
换句话说，在电容式阵列传感器120的工作期间，电源端SVDD的电压与传感器地SGND电压是浮动的，且电势差始终保持约VCC的差值，因此使得传感器得到幅度大于系统电源VCC的检测信号TX，从而提高传感器的性能。
然而，值得注意的是，针对图1所示的电源产生电路110，当TX为正相位阶段时，开关114导通，这时电容130也会被充电至VCCL，当TX为负相位阶段时，简单地关断开关114，将传感器地SGND下拉回与设备地GND相等的电位，会将电容130的电压也释放到设备地GND。
其中，电容130为SGND对GND的寄生电容CPAR，该CPAR等于电容131、电容132以及电容133的总和，电容132是设备地GND对大地的寄生电容CS，电容131是手指对设备地GND的寄生电容CH，电容133是手指对大地的寄生电容CM，电容124b是人体肢体(例如，手指)在人体肢体接触点与金属电极板124a之间的电容。
在实际工程中，该CPAR有几百皮法(pF)量级，一般在200pF～800pF之间不等，具体取决于电容式阵列传感器120的实现方式及其所包含的传感单元数量等因素。在图1所示的电路结构中，传感器地SGND的第一脉冲信号VL直接对CPAR充放电，这将产生很大的耗损，例如，通过如下公式可计算出CPAR在传感器工作过程的损耗功率：
PCpar.Loss＝ICpar.Loss×VCCL＝CPARVCCLfTX×VCCL        (1)
PCpar.Loss是CPAR在传感器工作过程的损耗功率，ICpar.Loss是等效的损耗电 流，VCCL同VCCL，fTX是TX信号的频率。
例如，CPAR＝200pF，VCCL＝2.8V，fTX＝2MHz，从式(1)可知损耗的功率为1.12mA×2.8V＝3.136mW；若CPAR＝800pF，VCCL＝10V，fTX＝2MHz，则损耗的功率高达16.0mA×10.0V＝160mW。
假设电容式阵列传感器的功率约10mA×2.8V＝28mW，则CPAR损耗的功率是传感器阵列功率的11.2％～571.4％。为了电容式阵列传感器的性能，通常会使用较高的驱动电压VCCL、较快的TX频率或更大的传感器阵列(传感器阵列越大CPAR越大)，则CPAR损耗会非常大，从而使得传感器的总体功耗变得非常大，导致终端设备电池的使用时长缩短、降低用户体验。
为了解决现有技术损耗大的缺点，本发明实施例给出了一种电源产生电路，可以应用在为电容式阵列传感器供电。具体地，在电源产生电路中内嵌一个脉冲产生电路，使得该脉冲产生电路能够在TX处于负相位阶时，对传感器地(也就是浮地)和设备地之间的寄生电容中的电荷进行回收再利用，不仅提高了该电源产生电路的输出电荷的利用率，还降低了该电容式阵列传感器的功耗。
此外，本发明实施例的技术方案还可以支持更高浮动电压、更快TX频率、更大的阵列面积，从而实现低功耗、高性能的电容式阵列传感器。
图3是本发明实施例的电源产生电路400的示意性结构图。
如图3所示，该电源产生电路400包括：驱动电压产生电路410，用于产生驱动电压信号；脉冲产生电路460，包括第一输入端461、第二输入端462、第一输出端463和储能端464，该脉冲产生电路460用于，通过该第一输入端461接收该驱动电压信号VCCL，通过该第二输入端462接收通信信号TX_VCC，在该通信信号TX_VCC的正相位阶段，从该第一输出端463输出该驱动电压信号VCCL，在该通信信号TX_VCC的负相位阶段，不从该第一输出端463输出该驱动电压信号VCCL，并将从该第一输出端463输入的电荷输出到该储能端464。为方便描述，将从该第一输出端463输出到该储能端464的电荷称为VER。
以下，结合图4详细说明根据本发明实施例的电源产生电路。
可选地，如图4所示，该脉冲产生电路460包括：控制单元469、第一支路481和第二支路482，该控制单元469，用于在该通信信号TX_VCC的正相位阶段，控制该第一支路481从该第一输出端输出该驱动电压信号 VCCL，在该通信信号TX_VCC的负相位阶段，控制该第一支路481不从该第一输出端输出该驱动电压信号VCCL，并控制该第二支路482将从该第一输出端463输入的电荷输出到该储能端464。
此外，需要注意的是，由于本发明实施例的第二支路482的每一个工作周期都是仅发生在TX_VCC为负相位阶段内，因此，第二支路482的工作周期是离散的。
具体而言，该控制单元469用于根据该通信信号TX_VCC生成多个控制信号，该多个控制信号用于控制该第一支路481中的开关和该第二支路482中的开关。例如，如图中所示的，用于控制第一开关471的第一控制信号用E表示，用于控制第二开关472的第二控制信号用C表示，用于控制第三开关473的第三控制信号用A表示，用于控制第四开关474的第四控制信号用B表示，用于控制第五开关475的第五控制信号用D表示。
作为一个实施例，如图4所示，该第一支路481可以包括第一开关471，该驱动电压产生电路410通过该第一开关471连接至该第一输出端463，该多个控制信号包括第一控制信号E，该第一控制信号E用于，在该通信信号TX_VCC的正相位阶段导通该第一开关471，在该通信信号TX_VCC的负相位阶段断开该第一开关471。
具体而言，在TX_VCC为正相位阶段时，导通第一开关471，驱动电压产生电路410会将第一输出端463的电平拉高至VCCL，在TX_VCC为负相位阶段时，关断第一开关471，驱动电压产生电路410不会将第一输出端463的电平拉高至VCCL。
作为另一个实施例，如图4所示，该第二支路482可以包括电感477、第二开关472和第三开关473，该第一输出端通过该电感477和该第二开关472连接至该储能端464，该电感477和该第二开关472之间设置有第一端口476，该第一端口476通过该第三开关473连接至设备地GND，该多个控制信号包括第二控制信号C和第三控制信号A，该第二控制信号C用于，在该通信信号TX_VCC的负相位阶段的初始时刻断开该第二开关472，直到该第一输出端463的电压下降至该设备地GND的电压时导通该第二开关472，该第三控制信号A用于，在该通信信号TX_VCC的负相位阶段的初始时刻导通该第三开关473，直到该第一输出端463的电压下降至该设备地GND的电压时断开该第三开473。
具体而言，在TX为负相位阶段时，关断第一开关471，驱动电压产生电路410不会将第一输出端463的电平拉高至VCCL。此外，在该TX_VCC处于负相位阶段的初始时刻，导通第二开关472且关断第三开关473，将该电容300在TX_VCC的正相位阶段存储的电荷转移至电感477；直到该第一输出端463的电压下降至该GND的电压时，通过关断第二开关472并且导通第三开关473，将电感477中的电荷转移至储能端464。进而实现电容300中的存储电荷的回收再利用。
换句话说，本发明实施例的技术方案是在TX_VCC为负相位阶段的初始时刻，第二支路482的导通周期开始，将电容300中存储的电荷转移至电感477中，当传感器地SGND的电压水平下降至设备地GND的电压水平后，第二支路482的导通周期结束，然后第二支路482的关断周期开始，将存储在电感477中的能量转移至储能端464，由此实现对电容300中存储的电荷的回收再利用。
在本发明实施例中，第二支路482的导通周期TON等于四分之一的LC谐振周期，即：
Figure PCTCN2017093541-appb-000001
由式(2)可知，TON取决于电容300及电感477，电容300中的电荷一般可由测试得到。而TON的约束条件一般是要小于1/20的TX周期，那么就可以按式(2)计算得到所需的电感477。在电容300确定的前提下，选取电感477越大，TON越长，对其它电路的响应时间要求降低，但第一脉冲信号VL的下降沿时间变长；而选取电感477越小，则TON越短，第一脉冲信号VL变得越接近理想脉冲信号，但是对其它电路的响应时间要求增加。
假设电容300的初始储能全部转移至电感477中，即：
Figure PCTCN2017093541-appb-000002
则由电感477的峰值电流为：
Figure PCTCN2017093541-appb-000003
再根据电感的电流-电压公式，则可得Boost续流时间TOFF'为：
Figure PCTCN2017093541-appb-000004
再由式(2)可得TOFF'与TON的关系为：
Figure PCTCN2017093541-appb-000005
由此可知，TON至多是TX周期的1/20，即TON最多占TX负相位的1/10。即，在VER＝VCC情况下，VCCL越大，TOFF'越长。即保证VCCL不会远远大于VER，也就是保证VCCL不会远远大于VCC，那么第二支路482一定工作在不连续电流模式(Discontinuous Current Mode,DCM)。
也就是说，本发明实施例中，在保证内嵌的第二支路482的工作模式为DCM的前提下，本发明实施例可以使用的最高“浮地”电压VCCL至少可以是系统电源VCC近十倍，而在现有技术在同等条件下寄生电容带来的损耗极大无比，因此，本发明相比现有技术有很大的低功耗优点。
可选地，在本发明实施例中，如图4所示，该控制单元469可以包括第一比较器465和第二比较器466，该第一比较器465用于比较该第一输出端463与设备地GND之间的电势差并输出第一信号，即通过比较VL和GND输出第一信号，该第二比较器466用于比较该储能端464与该第一端口476之间的电势差并输出第二信号，即通过比较VER和SW输出第二信号，该第一信号或该第二信号用于控制该控制单元469生成该多个控制信号。
例如，该第一比较器465的正相输入端与该设备地GND相连，该第一比较器465的负相输入端与该第一输出端463相连，该第二比较器466的正相输入端与该储能端464相连，该第二比较器466的负相输入端与该第一端口476相连。
具体而言，在该TX_VCC处于负相位阶段的初始时刻，通过关断第二开关472并且导通第三开关473，将该电容300在TX_VCC的正相位阶段存储的电荷转移至电感477；直到通过第一比较器465确定该第一输出端463的电压下降至该GND的电压时，导通第二开关472且关断第三开关473，将电感477中的电荷转移至储能端464；再到通过第二比较器466确定该第一端口476的电压下降至该储能端464的电压时，通过关断第二开关472，将电感477中的电荷转移至储能端464，最终实现电容300中的存储电荷的回收再利用。
其中，第二开关472的衬底偏置电压可以由衬底偏置选择电路(DBB)的输出提供，DBB选择第二开关472的源极电压和漏极电压中最高的一个作为衬底的偏置电压。
需要注意的是，在本发明实施例中，该第一控制信号E可以由控制单元469根据通信信号TX_VCC的相位阶段确定。例如，假设该第一开关471为低电平有效，即控制信号为低电平时开关闭合。在TX_VCC在负相位阶段时，关断第一开关471，当TX_VCC在正相位阶段时，导通第一开关471。
然而，该第二控制信号C和该第三控制信号A可以由控制单元469根据通信信号TX_VCC的相位阶段，以及第一比较器465或者第二比较器466的比较结果确定的。例如，第三开关473在该通信信号TX_VCC的负相位阶段的初始时刻导通，直到该第一比较器465比较出VL小于等于GND时关断。
还应注意，在本发明实施例中用于驱动开关的控制信号可以是经过驱动器将弱电信号放大为能够驱动开关的强电流信号。例如，如图4所示，该控制单元还可以包括控制逻辑模块467和缓冲驱动电路468。具体地，控制逻辑模块467根据输入的TX_VCC、第一比较器465的比较结果以及第二比较器466的比较结果，得到控制信号A～E，其中A～E是经过缓冲驱动电路468增强驱动后的输出。
可选地，如图4所示，该第二支路482还可以包括第四开关474，该第一输出端463通过该第四开关474连接至该设备地GND，该多个控制信号包括第四控制信号B，该第四控制信号B用于，在该第一输出端463的电压小于或等于该设备地GND的电压时导通该第四开关474。
由此，可以确保该第一输出端463的电压锁定在设备地GND，进而能够有效提高电容300中存储的电荷的回收率。
可选地，如图4所示，该第二支路482还可以包括第五开关475，该第五开关475并联于该电感的两端，该多个控制信号包括第五控制信号D，该第五控制信号D用于，在该通信信号TX_VCC的正相位阶段导通该第五开关475，在该通信信号TX_VCC的负相位阶段断开该第五开关475。
由此，能够确保电感477在通信信号TX_VCC的正相位阶段处于复位态，直到TX_VCC的负相位阶段的初始时刻，进而能够有效提高电容300中存储的电荷的回收率。
需要注意的是，由于本发明实施例中的第五开关475传输的电压范围比较宽且导通阻抗要求较高，因此，可以采用互补开关设计，能够避免第五开关475在芯片中占用较大的面积。
可选地，如图4所示，该电源产生电路400还包括功率二极管480和第一电容490，该脉冲产生电路460还包括第二输出端470，该驱动电压产生电路410通过该功率二极管480连接至该第二输出端470，该第一输出端463通过该第一电容490连接至该第二输出端470。
可以理解，本发明实施例中的功率二极管480也可以是同步开关管的形式。
应理解，本发明实施例中的功率二极管480和第一电容490可以分别与图1所示的功率二极管112和第一电容113相同，也可以不同，本发明实施例不做具体限定。
应注意，图4相对图1所示的电路结构，其改进点在于，将图1中电源产生电路110替换为电源产生电路400，即,该电源产生电路400包括驱动电压产生电路410和脉冲产生电路460。还应理解，图4中所示的驱动电压产生电路410和图1所示的VCCL产生器110可以相同，其输出电压值可以是任意值，其形式包括但不仅限于：低压差线性稳压器(low dropout regulator，LDO)、升压变换电路(Boost)、电荷泵(Charge Pump)。
由此，该储能端464可以与系统电源或者其它独立的储能电容相连。该储能端464也可以连接至终端设备中的至少一个模块，该储能端464的输出电压作为这些至少一个模块的供给电压。应理解，本发明实施例中的储能端464可以和任何需要供电的模块、电路或者单元相连，本发明实施例不做具体限定。
例如，如图5所示，该储能端464可以与“钳位电路”810相连，通过“钳位电路”810得到VERC，再将VERC再输出到多路低压差线性稳压器820(low dropout regulator，LDO)得到多个输出电压供给系统其它模块作为电源使用，其中，储能电容800用于储存能量。由此能够避免储能电压VER干扰VH，进而提高该传感器装置的性能。
图6是本发明实施例的电容式阵列传感装置910的示意性电路图。
如图6所示，该电容式阵列传感装置910包括：电源产生电路400和电容式阵列传感器200，其中，该电容式阵列传感器200，包括该电容式阵列 传感器的传感器地SGND、该电容式阵列传感器400的电源端SVDD和通信接口210，该第一输出端463与该传感器地SGND相连，该第二输出端470与该电源端SVDD相连，该第二输入端462与该通信接口210相连，该电源产生电路400用于为该电容式阵列传感器200供电。
其中，该电容式阵列传感器200包括金属电极板241a、多路选择器230、扫描模块220、介质层250和电容检测电路260，该扫描模块通过该通信接口连接至该第二输入端，扫描模块220通过多路选择器230和金属电极板141a连接至电容检测电路260。扫描模块220还通过通信接口210连接至所述电源产生电路100。该电容式阵列传感器200用于，通过该金属板241a与人体肢体之间产生第二电容241b，通过该扫描模块220控制该多路选择器230将该第二电容241b中的电荷输送至该电容检测电路260，通过该电容检测电路260检测该第二电容241b中的电荷。也就是说，在该通信信号TX_VCC的负相位阶段，从该第一输出端464输入的电荷为该传感器地SGND与设备地GND之间的电容300中存储的电荷。
应注意，本发明实施例中的通信信号TX_VCC是经过通信接口后信号，是与检测信号TX同频且同相位的信号。但是，该通信信号TX_VCC的信号幅度在GND到VCC之间，而检测信号TX的信号幅度在GND到VCC+VCCL之间。还应注意，本发明实施例中的电容式阵列传感器200和图1所示的电容式阵列传感器200原理相同，为避免重复，此处不再赘述。
下面结合图7所示的时序图对本发明实施例的回收电荷的过程进行详细描述。
假设如图4或图5中所示的第三开关473、第四开关474和第五开关475高电平有效，即，控制信号为高电平时开关导通；第一开关471和第二开关472低电平有效，即，控制信号为低电平时开关导通。为方便描述，在下文中，采用0表示低电平,1采用表示高电平。
如图7所示，在TX_VCC的正相位阶段，E＝0，C＝1，A＝0，B＝0，D＝1，即导通第一支路481中的第一开关471，TX_VCC上升为高电平，关断第二支路482中的第二开关472、第三开关473和第四开关474，导通第五开关475，导通第五开关475是为了确保了在TX_VCC的负相位的初始时刻，电感477处于复位态。由此将第一输出端463的电压拉高至VCCL(即电容300被同步充电至VCCL电压)，形成第一脉冲信号VL的正相位阶段。由于第 一输出端463通过电容490连接至第二输出端470，因此电容490两端的电压不能突变，也就是说，第二输出端470的电压也同步被抬高至VCCL+VCC，形成第二脉冲信号VH的正相位阶段，此时，功率二极管480截止。可以理解，在TX_VCC的正相位阶段，VH的负载就是电容式阵列传感器200，具体地，由电容490给电容式阵列传感器200供电。
在TX_VCC由正相位阶段的变为负相位阶段时，第一脉冲信号VL需要下拉回到设备地GND，现有的技术中是直接通过开关将其下拉回到GND，这样导致储存在电容300中的电荷直接泄放到设备地GND而极大地增加了传感器的功耗。
在本发明实施例中，在TX_VCC由正相位阶段的变为负相位阶段时，脉冲发生电路460中的第二支路482开始工作，并将电容300在TX_VCC为正相位阶段储存的电荷转移至储能端464，进而再利用，极大地降低传感器的功耗。
具体而言，首先，在所述TX_VCC处于负相位阶段的初始时刻，E＝1，C＝1，A＝1，B＝0，D＝0，即关断第一开关471、第二开关472、第四开关474和第五开关475，导通第三开关473。由此，使得电容300与电感477处于并联谐振状态，电容300中的电荷转移至电感477中，具体地，电感477的电流呈“正弦形状”上升，而谐振点(第一输出端463)则呈“余弦形状”下降，进而使得电容300中的电荷转移至电感477中，此外，关断第五开关475是为了解除电感477的复位态。
其次，在该第一输出端463的电压水平低于或等于该GND的电压水平时，E＝1，C＝0，A＝0，B＝1，D＝0，即，保持第一开关471关断、第五开关475关断，此外，导通第四开关474，使得该第一输出端463的电压水平锁定在该GND的电压水平，关闭第三开关473，使得第一端口476的电压反激变高，导通第二开关472，使得储存在电感477的能量将开始释放到储能端464。
随后，电感477继续向储能端464充电，当电感477的电流减小至零开始反向时，即第二开关472的源-漏电压出现反向，第二比较器466输出1，控制逻辑模块467做出相应的响应，C变为1，关断第二开关472，防止储能端464的电流反向电流流到设备地GND；此外，D变为1，导通第五开关475，即将电感477复位，防止电感477与第一端口476的寄生电容作LC 谐振。
最后，电路将继续保持E＝1，C＝1，A＝0，B＝1，D＝1的状态直到TX_VCC的正相位阶段到来。在电容式阵列传感器200的工作期间，TX_VCC以一定频率反复切换相位，则第一脉冲信号VL、第二脉冲信号VH可以输出相同频率的“浮地电源”信号给该电容式阵列传感器200。
可以理解，本发明实施例中的电容式阵列传感装置可以应用到任何形式的终端设备中，例如，如图8所示的终端设备900中，进而能够有效提高终端设备900的使用时长，进而提高用户体验。应理解，该终端设备900包括电容式阵列传感装置910，电容式阵列传感装置910可以是如图6所示的传感装置，为避免重复，此处不再赘述。
本领域普通技术人员可以意识到，结合本文中所公开的实施例描述的各示例的单元及电路，能够以电子硬件、或者计算机软件和电子硬件的结合来实现。这些功能究竟以硬件还是软件方式来执行，取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能，但是这种实现不应认为超出本申请的范围。
在本申请所提供的几个实施例中，应该理解到，所揭露的电路、支路和单元，可以通过其它的方式实现。例如，以上所描述的支路是示意性的，例如，该单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到一个支路，或一些特征可以忽略，或不执行。
所述集成的单元如果以软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在一个计算机可读取存储介质中。基于这样的理解，本申请的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)执行本申请各个实施例所述方法的全部或部分步骤。而前述的存储介质包括：U盘、移动硬盘、只读存储器(ROM，Read-Only Memory)、随机存取存储器(RAM，Random Access Memory)、磁碟或者光盘等各种可以存储程序代码的介质。
以上所述，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本申请揭露的技术范围内，可轻易 想到变化或替换，都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应以该权利要求的保护范围为准。

Claims (17)

  1. 一种电源产生电路，其特征在于，包括：
    驱动电压产生电路，用于产生驱动电压信号；
    脉冲产生电路，包括第一输入端、第二输入端、第一输出端和储能端，所述脉冲产生电路通过所述第一输入端接收所述驱动电压信号，并通过所述第二输入端接收通信信号，在所述通信信号的正相位阶段，所述脉冲产生电路从所述第一输出端输出所述驱动电压信号，在所述通信信号的负相位阶段，所述第一输出端不输出所述驱动电压信号，并且所述脉冲产生电路将从所述第一输出端输入的电荷输出到所述储能端。
  2. 根据权利要求1所述的电源产生电路，其特征在于，所述脉冲产生电路包括：控制单元、第一支路和第二支路，其中，在所述通信信号的正相位阶段，所述控制单元控制所述第一支路从所述第一输出端输出所述驱动电压信号，在所述通信信号的负相位阶段，所述控制单元控制所述第一支路使得所述第一输出端不输出所述驱动电压信号，并控制所述第二支路将从所述第一输出端输入的电荷输出到所述储能端。
  3. 根据权利要求2所述的电源产生电路，其特征在于，所述控制单元用于根据所述通信信号生成多个控制信号，所述多个控制信号用于控制所述第一支路中的开关和所述第二支路中的开关。
  4. 根据权利要求3所述的电源产生电路，其特征在于，所述第一支路包括第一开关，所述驱动电压产生电路通过所述第一开关连接至所述第一输出端，所述多个控制信号包括第一控制信号，所述第一控制信号用于，在所述通信信号的正相位阶段导通所述第一开关，在所述通信信号的负相位阶段断开所述第一开关。
  5. 根据权利要求3或4所述的电源产生电路，其特征在于，所述第二支路包括电感、第二开关和第三开关，所述第一输出端通过所述电感和所述第二开关连接至所述储能端，所述电感和所述第二开关之间设置有第一端口，所述第一端口通过所述第三开关连接至设备地，所述多个控制信号包括第二控制信号和第三控制信号，所述第二控制信号用于，在所述通信信号的负相位阶段的初始时刻断开所述第二开关，直到所述第一输出端的电压下降至所述设备地的电压时导通所述第二开关，所述第三控制信号用于，在所述 通信信号的负相位阶段的初始时刻导通所述第三开关，直到所述第一输出端的电压下降至所述设备地的电压时断开所述第三开关。
  6. 根据权利要求3至5中任一项所述的电源产生电路，其特征在于，所述第二支路还包括第四开关，所述第一输出端通过所述第四开关连接至所述设备地，所述多个控制信号包括第四控制信号，所述第四控制信号用于，在所述第一输出端的电压小于或等于所述设备地的电压时导通所述第四开关。
  7. 根据权利要求3至6中任一项所述的电源产生电路，其特征在于，所述第二支路还包括第五开关，所述第五开关并联于所述电感的两端，所述多个控制信号包括第五控制信号，所述第五控制信号用于，在所述通信信号的正相位阶段导通所述第五开关，在所述通信信号的负相位阶段断开所述第五开关。
  8. 根据权利要求7所述的电源产生电路，其特征在于，所述第三开关、所述第四开关和所述第五开关在接收到的控制信号为正相位阶段时导通，所述第一开关和所述第二开关在接收到的控制信号的相位阶段为负相位阶段时导通。
  9. 根据权利要求5至8中任一项所述的电源产生电路，其特征在于，所述控制单元包括第一比较器和第二比较器，所述第一比较器用于比较所述第一输出端与设备地之间的电势差并输出第一信号，所述第二比较器用于比较所述储能端与所述第一端口之间的电势差并输出第二信号，所述第一信号或所述第二信号用于控制所述控制单元生成所述多个控制信号。
  10. 根据权利要求9所述的电源产生电路，其特征在于，所述第一比较器的正相输入端与所述设备地相连，所述第一比较器的负相输入端与所述第一输出端相连，所述第二比较器的正相输入端与所述储能端相连，所述第二比较器的负相输入端与所述第一端口相连。
  11. 根据权利要求1至10中任一项所述的电源产生电路，其特征在于，所述电源产生电路还包括功率二极管和第一电容，所述脉冲产生电路还包括第二输出端，所述驱动电压产生电路通过所述功率二极管连接至所述第二输出端，所述第一输出端通过所述第一电容连接至所述第二输出端。
  12. 根据权利要求1至11中任一项所述的电源产生电路，其特征在于，所述储能端与系统电源相连，或者所述储能端通过钳位电路连接至终端设备中的至少一个模块，所述钳位电路的输出电压作为所述至少一个模块的供给 电压。
  13. 一种电容式阵列传感装置，其特征在于，包括：
    电容式阵列传感器；以及
    如权利要求1至12中任一项所述的电源产生电路，所述电源产生电路用于为所述电容式阵列传感器供电。
  14. 根据权利要求13所述的电容式阵列传感装置，其特征在于，所述电容式阵列传感器包括传感器地、供电端和通信接口，所述第一输出端与所述传感器地相连，所述第二输出端与所述电源端相连，所述第二输入端与所述通信接口相连。
  15. 根据权利要求13或14所述的电容式阵列传感装置，其特征在于，在所述通信信号的负相位阶段，从所述第一输出端输入的电荷为所述传感器地与设备地之间的寄生电容中存储的电荷。
  16. 根据权利要求13至15中任一项所述的电容式阵列传感装置，其特征在于，所述电容式阵列传感器包括金属板、多路选择器、扫描模块和电容检测电路，所述扫描模块通过所述通信接口连接至所述第二输入端，所述扫描模块还通过所述多路选择器和所述金属板连接至所述电容检测电路，所述电容式阵列传感器用于，通过所述金属板与人体肢体之间产生第二电容，通过所述扫描模块控制所述多路选择器将所述第二电容中的电荷输送至所述电容检测电路，通过所述电容检测电路检测所述第二电容的电容值。
  17. 一种终端设备，其特征在于，包括：如权利要求13至16中任一项所述的电容式阵列传感装置。
PCT/CN2017/093541 2017-07-19 2017-07-19 电源产生电路、电容式阵列传感装置和终端设备 WO2019014875A1 (zh)

Priority Applications (4)

Application Number Priority Date Filing Date Title
PCT/CN2017/093541 WO2019014875A1 (zh) 2017-07-19 2017-07-19 电源产生电路、电容式阵列传感装置和终端设备
CN201780000653.1A CN107454993B (zh) 2017-07-19 2017-07-19 电源产生电路、电容式阵列传感装置和终端设备
EP17898346.6A EP3457570B1 (en) 2017-07-19 2017-07-19 Power supply generation circuit, capacitance-type array sensing apparatus and terminal device
US16/125,403 US10921158B2 (en) 2017-07-19 2018-09-07 Power supply generating circuit, capacitive array sensing apparatus and terminal device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2017/093541 WO2019014875A1 (zh) 2017-07-19 2017-07-19 电源产生电路、电容式阵列传感装置和终端设备

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US16/125,403 Continuation US10921158B2 (en) 2017-07-19 2018-09-07 Power supply generating circuit, capacitive array sensing apparatus and terminal device

Publications (1)

Publication Number Publication Date
WO2019014875A1 true WO2019014875A1 (zh) 2019-01-24

Family

ID=60497791

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2017/093541 WO2019014875A1 (zh) 2017-07-19 2017-07-19 电源产生电路、电容式阵列传感装置和终端设备

Country Status (4)

Country Link
US (1) US10921158B2 (zh)
EP (1) EP3457570B1 (zh)
CN (1) CN107454993B (zh)
WO (1) WO2019014875A1 (zh)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111164556A (zh) 2018-08-15 2020-05-15 深圳市汇顶科技股份有限公司 触控芯片、电子设备及触控方法
CN114327115B (zh) * 2020-09-30 2024-06-25 华为技术有限公司 一种电子设备及其控制方法、触控系统、芯片系统
CN114327114B (zh) * 2020-09-30 2023-10-20 华为技术有限公司 一种电子设备及其控制方法、触控系统、芯片系统
CN113589061B (zh) * 2021-06-09 2024-02-23 广东电网有限责任公司广州供电局 一种继电保护出口测试装置

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103780229A (zh) * 2012-10-17 2014-05-07 财团法人工业技术研究院 电容性负载驱动电路以及脉冲激发装置
CN106130526A (zh) * 2016-08-31 2016-11-16 北京集创北方科技股份有限公司 供电信号产生装置及其控制方法
CN206226402U (zh) * 2016-08-31 2017-06-06 北京集创北方科技股份有限公司 被动电容式指纹识别系统的供电信号产生装置

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5010261A (en) * 1989-12-08 1991-04-23 General Electric Company Lossless gate driver circuit for a high frequency converter
JP4496988B2 (ja) * 2005-02-21 2010-07-07 株式会社デンソー ゲート駆動回路
DE102009006618A1 (de) * 2009-01-29 2010-08-05 Daimler Ag Schaltungsanordnung zum Betreiben eines elektrischen Verbrauchers und Verfahren zum Schalten eines Halbleiterschalters, insbesondere eines MOSFETs
TWI590133B (zh) * 2010-12-31 2017-07-01 樂金顯示科技股份有限公司 驅動觸控感測器之設備及方法
US8884635B2 (en) * 2012-06-01 2014-11-11 Synaptics Incorporated Transcapacitive charge measurement
JP5915428B2 (ja) 2012-07-12 2016-05-11 ソニー株式会社 駆動回路、及び、駆動方法
CN105335737B (zh) * 2015-12-02 2019-03-15 苏州迈瑞微电子有限公司 电容指纹传感器
JP6665051B2 (ja) * 2016-07-25 2020-03-13 株式会社ジャパンディスプレイ 表示装置及びその駆動方法
EP3418942B1 (en) 2016-11-21 2021-07-28 Shenzhen Goodix Technology Co., Ltd. Fingerprint sensor and electronic terminal

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103780229A (zh) * 2012-10-17 2014-05-07 财团法人工业技术研究院 电容性负载驱动电路以及脉冲激发装置
CN106130526A (zh) * 2016-08-31 2016-11-16 北京集创北方科技股份有限公司 供电信号产生装置及其控制方法
CN206226402U (zh) * 2016-08-31 2017-06-06 北京集创北方科技股份有限公司 被动电容式指纹识别系统的供电信号产生装置

Also Published As

Publication number Publication date
EP3457570A1 (en) 2019-03-20
CN107454993A (zh) 2017-12-08
EP3457570A4 (en) 2019-07-10
US10921158B2 (en) 2021-02-16
EP3457570B1 (en) 2020-09-09
US20190025091A1 (en) 2019-01-24
CN107454993B (zh) 2020-10-23

Similar Documents

Publication Publication Date Title
WO2019014875A1 (zh) 电源产生电路、电容式阵列传感装置和终端设备
US8624573B2 (en) Power converters including zero-current detectors and methods of power conversion
JP2020506654A (ja) 高度に統合された高圧アクチュエータドライバ
WO2016112848A1 (zh) 电子设备及其触摸感测系统、以及触摸感测系统的检测方法
US9793751B2 (en) Energy harvesting apparatus and method for rapidly tracking a maximum power point
CN105337498B (zh) 电压转换器以及电压转换器的电压转换方法
JP2013523080A (ja) 圧電振動ハーベスタから最大電力を抽出するためのコンバータ及び方法
CN111697838B (zh) 同步整流控制电路、方法和开关电源系统
CN107659204B (zh) 超声波驱动电路和指纹识别传感器
CN103944254A (zh) 掉电保护电路及设备
CN102710241B (zh) 一种无源射频识别上电复位电路及无源射频识别标签
TWI526944B (zh) 指紋感測裝置及其手指觸碰偵測方法
CN108320762B (zh) 电荷泵驱动电路
EP2639927A2 (en) Electronic device with standby mode
JP2021189167A (ja) 圧電トランスデューサの高分解能検知
CN111030448B (zh) 一种基于电压差控制的电荷泵的轻载降频电路
CN109031089A (zh) 同步整流芯片及其供电的自动检测电路、自动检测方法
WO2019076366A1 (zh) 具有能量管理功能的nfc接口
CN104092458A (zh) 基于互电容的触摸按键信号检测方法及其检测电路
CN101980112A (zh) 电磁式触控笔
US9806614B2 (en) Low power zero inductor current detection circuit
US9897630B2 (en) Method of interfacing an LC sensor and related system
CN100550635C (zh) 一种降低触摸控制电路功耗的装置
CN111258446A (zh) 与触摸屏系统一起使用的同步电荷泵的自动可调驱动系统
CN105490564A (zh) 一种优化翻转时间的压电能量采集整流器

Legal Events

Date Code Title Description
ENP Entry into the national phase

Ref document number: 2017898346

Country of ref document: EP

Effective date: 20180907

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 17898346

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE