WO2018236374A1 - Dispositifs à qubit comprenant des matériaux supraconducteurs coiffés de couches de matériau 2d - Google Patents

Dispositifs à qubit comprenant des matériaux supraconducteurs coiffés de couches de matériau 2d Download PDF

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Publication number
WO2018236374A1
WO2018236374A1 PCT/US2017/038648 US2017038648W WO2018236374A1 WO 2018236374 A1 WO2018236374 A1 WO 2018236374A1 US 2017038648 W US2017038648 W US 2017038648W WO 2018236374 A1 WO2018236374 A1 WO 2018236374A1
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quantum
superconductive
cap layer
qubit
quantum circuit
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PCT/US2017/038648
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English (en)
Inventor
Roman CAUDILLO
Zachary R. YOSCOVITS
Jeanette M. Roberts
James S. Clarke
Ravi Pillarisetty
Nicole K. THOMAS
Hubert C. GEORGE
Payam AMIN
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Intel Corporation
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Priority to PCT/US2017/038648 priority Critical patent/WO2018236374A1/fr
Publication of WO2018236374A1 publication Critical patent/WO2018236374A1/fr

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N69/00—Integrated devices, or assemblies of multiple devices, comprising at least one superconducting element covered by group H10N60/00
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00—Superconducting devices
    • H10N60/20—Permanent superconducting devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00—Superconducting devices
    • H10N60/80—Constructional details
    • H10N60/805—Constructional details for Josephson-effect devices

Definitions

  • This disclosure relates generally to the field of quantum computing, and more specifically, to quantum circuit/qubit devices that use superconductive materials and methods of fabricating such devices.
  • Quantum computing refers to the field of research related to computation systems that use quantum-mechanical phenomena to manipulate data. These quantum-mechanical phenomena, such as superposition (in which a quantum variable can simultaneously exist in multiple different states) and entanglement (in which multiple quantum variables have related states irrespective of the distance between them in space or time), do not have analogs in the world of classical computing, and thus cannot be implemented with classical computing devices.
  • FIG. 1A provides a schematic illustration of a superconducting quantum circuit, according to some embodiments of the present disclosure.
  • FIG. IB provides a schematic illustration of an exemplary physical layout of a
  • FIG. 2 provides a schematic illustration of a structure comprising an oxidized
  • FIG. 3 provides a schematic illustration of a structure comprising a superconductor covered with a protective cap, according to some embodiments of the present disclosure.
  • FIG. 4 provides a flow chart of an oxidation protection method, according to some embodiments of the present disclosure.
  • FIGS. 5A and 5B provide a schematic illustration of a coplanar waveguide structure provided over a substrate, according to some embodiments of the present disclosure.
  • FIGS. 6A and 6B provide schematic illustrations of the superconductive portions of a coplanar waveguide structure capped with a 2D material capping layer, according to various embodiments of the present disclosure.
  • FIGS. 7 A and 7B are top views of a wafer and dies that may include one or more of quantum circuit components having superconductive materials capped with a 2D capping layer disclosed herein.
  • FIG. 8 is a cross-sectional side view of a device assembly that may include one or more of quantum circuit components having superconductive materials capped with a 2D capping layer disclosed herein.
  • FIG. 9 is a block diagram of an example quantum computing device that may include one or more of quantum circuit components having superconductive materials capped with a 2D capping layer disclosed herein, in accordance with various embodiments.
  • quantum computing or quantum information processing, refers to the field of research related to computation systems that use quantum-mechanical phenomena to manipulate data.
  • quantum-mechanical phenomena is the principle of quantum superposition, which asserts that any two or more quantum states can be added together, i.e. superposed, to produce another valid quantum state, and that any quantum state can be represented as a sum of two or more other distinct states.
  • Quantum entanglement is another example of quantum-mechanical phenomena. Entanglement refers to groups of particles being generated or interacting in such a way that the state of one particle becomes intertwined with that of the others. Furthermore, the quantum state of each particle cannot be described independently. Instead, the quantum state is given for the group of entangled particles as a whole.
  • quantum-mechanical phenomena is sometimes described as a "collapse" because it asserts that when we observe (measure) particles, we unavoidably change their properties in that, once observed, the particles cease to be in a state of superposition or entanglement (i.e. by trying to ascertain anything about the particles, we collapse their state).
  • Quantum computers use so-called quantum bits, referred to as qubits (both terms “bits” and “qubits” often interchangeably refer to the values that they hold as well as to the actual devices that store the values). Similar to a bit of a classical computer, at any given time, a qubit can be either 0 or 1. However, in contrast to a bit of a classical computer, a qubit can also be 0 and 1 at the same time, which is a result of superposition of quantum states.
  • Entanglement also contributes to the unique nature of qubits in that input data to a quantum processor can be spread out among entangled qubits, allowing manipulation of that data to be spread out as well: providing input data to one qubit results in that data being shared to other qubits with which the first qubit is entangled.
  • Another challenge that is unique to quantum computing is the ability to provide substantially lossless connectivity between qubits at very low powers, e.g. as low as a power of a single photon that may be present in a particular resonator interconnecting two qubits.
  • Resonators are integral building blocks in quantum circuits employing various types of qubits. For example, in superconducting qubit devices, resonators are used to couple qubits together and to address qubits for initialization, readout, and manipulation.
  • a resonator of a quantum circuit is a microwave transmission line that is deliberately designed to support resonant oscillations (i.e. resonance) within the line, under certain conditions (i.e. a resonant microwave transmission line).
  • CPWs coplanar waveguides
  • a typical CPW includes a signal line and two ground planes, each of which is made of superconductive materials. Oxidation of such materials presents a source of loss. Any losses are especially significant in context of quantum circuits where, sometimes, energy as small as that of a single photon is to be transmitted, making loss tolerance very low. Therefore, improvements with respect to this issue would be desirable.
  • qubit devices i.e. devices which implement one or more quantum circuits; qubit devices may also be referred to, interchangeably, as “quantum circuits” or simply “qubits" that employ superconductive materials to form various quantum circuit
  • a qubit device provided over a substrate.
  • the qubit device includes at least one quantum circuit component/element, e.g. a resonator, transmon shunt capacitor, or qubit capacitive circuit elements, comprising one or more superconductive materials, and a cap layer at least partially enclosing the one or more
  • quantum circuit component/element e.g. a resonator, transmon shunt capacitor, or qubit capacitive circuit elements
  • cap layer includes a two-dimensional (2D) material, such as for example, but not limited to, graphene, reduced graphene oxide, hexagonal boron nitride, and any of 2D transition metal dichalcogenides.
  • 2D two-dimensional
  • a 2D material i.e. a crystalline material which may be grown to be just a single layer of atoms due to all of the chemical bonding being directed in the plane of the atoms
  • a quantum circuit component made of a superconductive material minimizes (or at least reduces) oxidation of the capped portion of the superconductive material, while, simultaneously, providing additional advantages due to the unique nature of 2D materials.
  • One such advantage is that, in 2D materials, all bonds may be directed in the plane of the material and no dangling bonds may be left to interact with the neighboring materials and to degrade qubit device performance by introducing spurious two-level systems (e.g. by interactions with various adsorbates).
  • Another advantage is that using 2D materials provides an ability to accurately and reliably control the thickness of the capping layer down to a single atom thickness (for a single layer 2D material cap) or quantized by increments equal to the inter-planar spacing of a given 2D material used as a cap, resulting in less variations between different quantum circuit components. Furthermore, 2D materials can act as diffusion barriers and are non-reactive material, enabling increased stability of the capped quantum circuit components to thermal processing that could otherwise degrade such components.
  • electrically conductive portions of quantum circuit components e.g. signal lines, ground planes, electrodes, etc.
  • quantum circuit components e.g. signal lines, ground planes, electrodes, etc.
  • 2D materials are described as made of superconductive materials because such materials are particularly advantageous for providing substantially lossless connectivity to, from, and between the qubits.
  • some or all of these electrically conductive portions of quantum circuit components capped with 2D materials as described herein could be made from electrically conductive materials which are not
  • superconductive/superconducting material implies that a non-superconductive electrically conductive material can be used as well and is within a scope of the present disclosure.
  • materials described herein as "superconductive/superconducting” materials may refer to materials, including alloys of materials, which exhibit superconductive behavior at typical qubit operating conditions (e.g. materials which exhibit superconductive behavior at very low
  • Quantum circuit components having superconductive materials capped with a 2D capping layer as described herein may be included in any type of qubit devices.
  • such capped superconductive materials may be used to form various parts of quantum circuit resonators as well as non-resonant transmission structures (e.g. signal lines or/and ground planes of resonators or non- resonant transmission structures) or electrodes used in quantum circuits or flux bias lines, or readout ports, or microwave drive lines, or shunt capacitors of transmon qubits.
  • quantum circuit components having superconductive materials capped with a 2D capping layer as described herein may be implemented in one or more components associated with an integrated circuit (IC) or/and between various such components.
  • components associated with an IC include, for example, transistors, diodes, power sources, resistors, capacitors, inductors, sensors, transceivers, receivers, antennas, etc.
  • Components associated with an IC may include those that are mounted on IC or those connected to an IC.
  • the IC may be either analog or digital and may be used in a number of applications, such as microprocessors, optoelectronics, logic blocks, audio amplifiers, etc., depending on the components associated with the IC.
  • the IC may be employed as part of a chipset for executing one or more related functions in a computer.
  • drawings illustrating various structures/assemblies of exemplary devices may be drawn with precise right angles and straight lines
  • real world process limitations may prevent implementations of devices exactly as shown. Therefore, it is understood that such drawings revised to reflect example real world process limitations, in that the features may not have precise right angles and straight lines, are within the scope of the present disclosure.
  • Drawings revised in this manner may be more representative of real world structure/assemblies as may be seen on images using various characterization tools, such as e.g. scanning electron microscopy (SEM) or transmission electron microscopy (TEM).
  • SEM scanning electron microscopy
  • TEM transmission electron microscopy
  • the various structures/assemblies of the present drawings may further include possible processing defects, such as e.g.
  • the phrase “A and/or B” means (A), (B), or (A and B).
  • the phrase “A, B, and/or C” means (A), (B), (C), (A and B), (A and C), (B and C), or (A, B, and C).
  • the term “between,” when used with reference to measurement ranges, is inclusive of the ends of the measurement ranges.
  • the meaning of “a,” “an,” and “the” include plural references.
  • the meaning of "in” includes “in” and "on.”
  • another part means that the referenced part is either in contact with the other part, or that the referenced part is above the other part with one or more intermediate part(s) located
  • the terms "oxide,” “carbide,” “nitride,” etc. refer to compounds containing, respectively, oxygen, carbon, nitrogen, etc.
  • the term “connected” means a direct electrical or magnetic connection between the things that are connected, without any intermediary devices, while the term “coupled” means either a direct electrical or magnetic connection between the things that are connected or an indirect connection through one or more passive or active intermediary devices.
  • circuit means one or more passive and/or active components that are arranged to cooperate with one another to provide a desired function.
  • the present disclosure may include references to microwave signals, this is done only because current qubits are designed to work with such signals because the energy in the microwave range is higher than thermal excitations at the temperature that qubits are operated at.
  • techniques for the control and measurement of microwaves are well known. For these reasons, typical frequencies of qubits are in 1-10 gigahertz (GHz) range, e.g. 5-8 GHz range, in order to be higher than thermal excitations, but low enough for ease of microwave engineering.
  • GHz gigahertz
  • qubits can be designed to have any frequency. Therefore, in general, qubits could be designed to operate with signals in other ranges of electromagnetic spectrum and embodiments of the present disclosure could be modified accordingly. All of these alternative implementations are within the scope of the present disclosure.
  • the terms such as “resonator structure,” “transmission line structure,” “signal line structure,” and “ground plane structure” may be referred to without using the word “structure.”
  • the term “signal line” may be used interchangeably with the terms such as “conductor strip,” “signal path,” or “center line” as known in microwave engineering.
  • quantum computing refers to the use of quantum- mechanical properties such as superposition and entanglement to perform calculations.
  • a physical system that can act as a theoretically designed qubit is needed.
  • One type of physical system that could be used to implement qubits is based on use of superconductive materials (superconductive/superconducting qubits).
  • JJ Josephson Junction
  • JJs are realized by providing a thin layer of an insulating material (typically referred to as a “barrier” or a “tunnel barrier") sandwiched, in a stack-like arrangement, between two layers of superconductors.
  • the thin layer of an insulating material acts as the weak link between the two layers of superconductors which are referred to as a "base electrode layer” and a “top electrode layer” of a JJ to indicate that one of the superconductors is provided below the insulator and the other one is provided above the insulator.
  • FIG. 1A provides a schematic illustration of a superconducting quantum circuit 100, according to some embodiments of the present disclosure.
  • an exemplary superconducting quantum circuit 100 includes two or more qubits 102 (reference numerals following after a dash, such as e.g. qubit 102-1 and 102-2 indicate different instances of the same or analogous element).
  • Each of the superconducting qubits 102 may include one or more JJs 104 connected to one or more other circuit elements 106, which, in combination with the JJ(s) 104, form a non-linear circuit providing a unique two-level quantum state for the qubit.
  • the circuit elements 106 could be e.g. capacitors in transmons or superconducting loops in flux qubits.
  • an exemplary superconducting quantum circuit 100 typically includes means 108 for providing external control of qubits 102 and means 110 for providing internal control of qubits 102.
  • external control refers to controlling the qubits 102 from outside of, e.g., an IC chip comprising the qubits, including control by a user of a quantum computer, while “internal control” refers to controlling the qubits 102 within the IC chip.
  • qubits 102 are transmon qubits
  • external control may be implemented by means of flux bias lines (also known as “flux lines” and “flux coil lines”) and by means of readout and drive lines (also known as "microwave lines” since qubits are typically designed to operate with microwave signals), described in greater detail below.
  • flux bias lines also known as “flux lines” and “flux coil lines”
  • readout and drive lines also known as "microwave lines” since qubits are typically designed to operate with microwave signals
  • internal control lines for such qubits may be implemented by means of resonators, e.g., coupling and readout resonators, also described in greater detail below.
  • any one of the qubits 102, the external control means 108, and the external control means 110 of the quantum circuit 100 may be provided on, over, or at least partially embedded in a substrate (not shown in FIG. 1A).
  • three classes are typically distinguished: charge qubits, flux qubits, and phase qubits.
  • Transmons a type of charge qubits with the name being an abbreviation of "transmission line shunted plasma oscillation qubits" are particularly encouraging because they exhibit reduced sensitivity to charge noise.
  • FIG. IB provides a schematic illustration of an exemplary physical layout of a superconducting quantum circuit 100B where qubits are implemented as transmons, according to some embodiments of the present disclosure.
  • FIG. IB illustrates two qubits 102.
  • FIG. IB illustrates flux bias lines 112, microwave lines 114, a coupling resonator 116, a readout resonator 118, and connectors to external circuitry, connectors being e.g. wirebonding pads, 120 and 122.
  • the flux bias lines 112 and the microwave lines may be viewed as examples of the external control means 108 shown in FIG. 1A.
  • the coupling resonator 116 and the readout resonator 118 may be viewed as examples of the internal control means 110 shown in FIG. 1A.
  • Each of flux bias lines, microwave lines, drive lines, and coupling and readout resonators may be implemented as any suitable architecture of a microwave transmission line, such as e.g. a coplanar waveguide, a stripline, a microstrip line, or an inverted microstrip line.
  • Coupling resonators and readout resonators may be configured for capacitive or inductive coupling to other circuit elements at one or both ends in order to have resonant oscillations, whereas flux bias lines and microwave lines may be similar to conventional microwave transmission lines because there is no resonance in these lines.
  • the qubit 102 induces a resonant frequency in the readout resonator 118, which resonant frequency is then passed to the microwave lines 114 and communicated to the pads 122.
  • the readout resonator 118 may be a transmission line that includes a capacitive connection to ground on one side and is either shorted to the ground on the other side (for a quarter wavelength resonator) or has a capacitive connection to ground (for a half wavelength resonator), which results in oscillations within the transmission line (resonance), with the resonant frequency of the oscillations being close to the frequency of the qubit.
  • the readout resonator 118 is coupled to the qubit by being in sufficient proximity to the qubit 102, more specifically in sufficient proximity to the capacitor of the qubit 102, when the qubit is implemented as a transmon, either through capacitive or inductive coupling. Due to a coupling between the readout resonator 118 and the qubit 102, changes in the state of the qubit 102 result in changes of the resonant frequency of the readout resonator 118. In turn, because the readout resonator 118 is in sufficient proximity to the microwave line 114, changes in the resonant frequency of the readout resonator 118 induce changes in the current in the microwave line 114, and that current can be read externally via the wire bonding pads 122.
  • the coupling resonator 116 allows coupling different qubits together in order to realize quantum logic gates.
  • the coupling resonator 116 is similar to the readout resonator 118 in that it is a transmission line that includes capacitive connections to ground on both sides (i.e. a half wavelength resonator), which also results in oscillations within the coupling resonator 116.
  • Each side of the coupling resonator 116 is coupled (again, either capacitively or inductively) to a respective qubit by being in sufficient proximity to the qubit, namely in sufficient proximity to the capacitor of the qubit, when the qubit is implemented as a transmon.
  • each side of the coupling resonator 116 has coupling with a respective different qubit, the two qubits are coupled together through the coupling resonator 116.
  • state of one qubit depends on the state of the other qubit, and the other way around.
  • coupling resonators may be employed in order to use a state of one qubit to control a state of another qubit.
  • the microwave line 114 may be used to not only readout the state of the qubits as described above, but also to control the state of the qubits.
  • the line operates in a half-duplex mode where, at some times, it is configured to readout the state of the qubits, and, at other times, it is configured to control the state of the qubits.
  • microwave lines such as the line 114 shown in FIG. IB may be used to only readout the state of the qubits as described above, while separate drive lines such as e.g. drive lines 124 shown in FIG. IB, may be used to control the state of the qubits.
  • the microwave lines used for readout may be referred to as readout lines (e.g. readout line 114), while microwave lines used for controlling the state of the qubits may be referred to as drive lines (e.g. drive lines 124).
  • the drive lines 124 may control the state of their respective qubits 102 by providing, using e.g. wirebonding pads 126 as shown in FIG. IB, a microwave pulse at the qubit frequency, which in turn stimulates (i.e. triggers) a transition between the 0 and 1 state of the qubit. By varying the length of this pulse, a partial transition can be stimulated, giving a superposition of the 0 and 1 states of the qubit.
  • Flux bias lines, microwave lines, coupling resonators, drive lines, and readout resonators such as e.g. those described above, together form interconnects for supporting propagation of microwave signals.
  • any other connections for providing direct electrical interconnection between different quantum circuit elements and components such as e.g. connections from electrodes of JJs to plates of the capacitors or to superconducting loops of superconducting quantum interference devices (SQUIDS) or connections between two ground lines of a particular transmission line for equalizing electrostatic potential on the two ground lines, are also referred to herein as interconnects.
  • SQUIDS superconducting quantum interference devices
  • interconnect may also be used to refer to elements providing electrical interconnections between quantum circuit elements and components and non- quantum circuit elements, which may also be provided in a quantum circuit, as well as to electrical interconnections between various non-quantum circuit elements provided in a quantum circuit.
  • non-quantum circuit elements which may be provided in a quantum circuit may include various analog and/or digital systems, e.g. analog-to-digital converters, mixers, multiplexers, amplifiers, etc.
  • the interconnects as shown in FIG. IB could have different shapes and layouts.
  • some interconnects may comprise more curves and turns while other interconnects may comprise less curves and turns, and some interconnects may comprise substantially straight lines.
  • various interconnects may intersect one another, in such a manner that they don't make an electrical connection, which can be done by using e.g. a bridge, bridging one interconnect over the other.
  • quantum circuits with different shapes and layouts of the interconnects than those illustrated in FIG. IB are all within the scope of the present disclosure.
  • Each one of the interconnects used in quantum circuits may be formed of superconductive materials such as e.g. aluminum (Al), niobium (Nb), niobium nitride (NbN), titanium nitride (TiN), and niobium titanium nitride (NbTiN).
  • superconductive materials such as e.g. aluminum (Al), niobium (Nb), niobium nitride (NbN), titanium nitride (TiN), and niobium titanium nitride (NbTiN).
  • other suitable superconductive materials and alloys of superconductive materials may be used as well.
  • FIG. 2 provides a schematic illustration of a structure 200 that includes a substrate 202 over which a superconductor (i.e. a superconductive material) 204 is disposed.
  • the superconductor 204 could be any element of a quantum circuit that needs to be superconducting at typical qubit operating temperatures, such as e.g. a top electrode of a JJ, a resonator, a flux bias line, a drive line, etc.
  • the superconductor 204 is often exposed to air where the surface of the superconductor 204 will oxidize and oxygen may diffuse further below the surface of the superconductor 204 and cause losses. This is illustrated in FIG. 2 with a layer of oxide 206 shown over the superconductor 204, where portions 208 of the oxide 206 are diffused into the
  • FIG. 2 is not drawn to scale because the bulk of the superconductor 204 typically has a thickness on the order of 100-200 nm while the thickness of the oxide 206 is on the order of a few nm. Nevertheless, this relatively thin oxide layer at the surface contributes strongly to losses which degrade the quality factor of resonators and reduce the coherence times of qubits.
  • Embodiments of the present disclosure are based on an insight that protecting
  • defects in the areas surrounding interconnects JJs and other quantum circuit elements such as e.g. capacitors of transmon qubits.
  • defects could include e.g. defects in the crystal structure of a material or defects in a form of polar impurities such as hydroxyl (OH- ) groups.
  • FIG. 3 provides a schematic illustration of a structure 300 comprising a superconductor 304, disposed over a substrate 302 and covered with a protective cap 310, according to some embodiments of the present disclosure.
  • the superconductor 304 could include one or more superconductive materials forming any of the quantum circuit components described herein, such as e.g. any of the interconnects used in quantum circuits (e.g. flux bias lines 112, microwave lines 114, coupling resonators 116, and readout resonators 118 described above), or any of the electrodes (e.g. electrodes of JJs 104 described above) used in quantum circuits.
  • the superconductor 304 could include a signal line or any of the one or more ground planes of a quantum circuit resonator implemented e.g. as a CPW or a microwave transmission line of any other type (e.g.
  • the protective cap 310 encloses the superconductor 304 at least partially, but preferably completely, including the sidewalls of a patterned structure, so that as little of the superconductor 304 is exposed to air as possible, thus preventing or at least reducing oxidation of the
  • the protective cap 310 is such that it has a limited amount of spurious TLS's, at least less than the native oxide 206 shown in FIG. 2.
  • the cap layer 310 may conform to the topography of the superconductor 304.
  • One class of materials which could be used as protective caps 310 include various 2D materials such as e.g. materials which include hexagonal boron nitride (hBN), graphene, and/or any of the transition metal dichalcogenides (TMDs). Such materials could passivate the superconductive material and prevent oxidation, thereby reducing the number of spurious two-level systems and improving qubit device performance. In that respect, 2D materials which can be grown or deposited selectively on the metal surface of the superconducting circuit elements in their metallic state, i.e. without the presence of a surface oxide, and thereby protect the metal surface of the
  • superconducting circuit elements from oxidation upon exposure to ambient conditions may be particularly advantageous.
  • a cap 310 of any of the 2D materials described herein could lead to improving the quality factor of the resonators.
  • a cap when used to protect the superconducting materials of shunt capacitors or capactive elements of a transmon qubit from oxidation, a cap could lead to improving the coherence time of the qubit.
  • Monolayer graphene is a one-atom thick sheet of graphite isolated from a 3-dimensional graphite crystal. It is an atomically-thin crystal of carbon atoms arranged in a honeycomb lattice.
  • the honeycomb network of atoms has a 2-dimensional plane of atoms (therefore this material is called a 2D material) with sp2-bonding in the plane directed between all of the atoms in the plane.
  • graphene can also exist in bilayer and few-layer (e.g. up to approximately 10 layers) structures, whereby single graphene sheets with the same bonding previously described are stacked on top of each other but only weakly linked by van der Waals forces that for the most part do not disturb the 2D-material properties of each of the individual graphene layers. In this way, even imperfect graphene sheets, when grown or deposited on top of superconducting materials of quantum circuits, could act as superb capping materials that prevent or reduce the formation of surface oxides and thereby reduce losses associated with these lossy interface materials.
  • Hexagonal boron nitride like graphene, is a 2D crystal with a honeycomb lattice structure, but having alternating boron and nitrogen atoms.
  • the honeycomb network of atoms give hBN its advantageous mechanical properties and the alternating B and N atoms in the lattice give it an ionic character and make it an insulator with a large bandgap of 5-6 eV.
  • hBN even when provided as a single layer, is expected to be an excellent diffusion barrier (if the hBN is relatively defect-free), and, therefore, it has the potential to serve as an excellent material choice for capping superconductive materials of quantum circuit components. Few-layer hBN with imperfect hBN sheets may still provide good performance as a diffusion barrier as well.
  • the single layer TMDs are direct bandgap semiconductors whereas the multilayer TMDs are indirect bandgap semiconductors. Because of their 2D nature, like graphene and hBN, they can potentially serve as diffusion barriers and could therefore serve to reduce the amount of surface oxide at the interface of superconducting metals used in quantum circuits.
  • TMDs which may be particularly suitable to serve as the cap 310 include molybdenum disulfide (M0S2), molybdenum dise!enide (MoSe2), molybdenum ditelluride (MoTe 2 ), tungsten disulfide (WS 2 ), tungsten diselenide (WSe 2 ), tungsten(IV) tel!uride (WTe 2 ), hafnium disulfide (HfS 2 ), hafnium diselenide (HfSe 2 ), hafnium ditel uride (HfTe 2 ), rhenium disulfide (ReS 2 ), and rhenium diselenide (ReSe 2 ).
  • M0S2 molybdenum disulfide
  • MoSe2 molybdenum dise!enide
  • MoTe 2 molybdenum ditelluride
  • WS 2 tungsten disulfide
  • WSe 2 tungsten dis
  • FIG. 4 provides a flow chart of an oxidation protection method that may be used for fabricating a qubit device with one or more of quantum circuit components having superconductive materials capped with a 2D capping layer, such as e.g. the 2D capping layer 310, according to some embodiments of the present disclosure.
  • a 2D capping layer such as e.g. the 2D capping layer 310
  • FIG. 4 provides a flow chart of an oxidation protection method that may be used for fabricating a qubit device with one or more of quantum circuit components having superconductive materials capped with a 2D capping layer, such as e.g. the 2D capping layer 310, according to some embodiments of the present disclosure.
  • the method 400 may begin with providing a quantum circuit component comprising a superconductive material over a substrate (process 402 of FIG. 4, an exemplary result of which is illustrated with a CPW 500 shown in FIGS. 5A-5B).
  • the substrate used at 402 may include any substrate suitable for realizing quantum circuit components described herein.
  • the substrate may be a crystalline substrate such as, but not limited to a silicon or a sapphire substrate, and may be provided as a wafer or a portion thereof.
  • the substrate may be non-crystalline.
  • any material that provides sufficient advantages e.g. sufficiently good electrical isolation and/or ability to apply known fabrication and processing techniques
  • to outweigh the possible disadvantages e.g. negative effects of spurious two-level systems
  • Additional examples of substrates include silicon-on-insulator (SOI) substrates, lll-V substrates, and quartz substrates.
  • the substrate used at 402 may be cleaned to remove surface-bound organic and metallic contaminants, as well as subsurface contamination, prior to deposition of the superconductive materials onto the substrate in process 402.
  • cleaning may be carried out using e.g. a chemical solutions (such as peroxide), and/or with ultraviolet (UV) radiation combined with ozone, and/or oxidizing the surface (e.g., using thermal oxidation) then removing the oxide (e.g. using hydrofluoric acid (HF)).
  • a quantum circuit component comprising a superconductive material provided over a substrate in process 402 may be a coplanar waveguide 500 as shown in FIGS. 5A and 5B.
  • the coplanar waveguide structure such as the one shown in FIGS. 5A and 5B may be used to implement any of the quantum circuit resonators described above, e.g. any of the readout or coupling resonators shown in FIG. IB.
  • the coplanar waveguide structure such as the one shown in FIGS. 5A and 5B may be used to implement any of the non- resonant transmissions lines described above, e.g. any of the flux bias lines, microwave lines, or drive lines shown in FIG. IB.
  • FIGS. 5A and 5B provide, respectively, a perspective and a cross-section illustrations of the CPW 500.
  • the CPW 500 may include two ground planes 504 and 508 and a signal line 506 provided in the middle, between the two ground planes.
  • the signal line 506 and the ground planes 504 and 508 all lie in the same plane over a dielectric substrate 502, which could be any of the substrates described above, and can be made from one or more
  • FIG. 5A indicates a strip width Wl of the signal line 506, slot spaces 51 between the signal line 506 and each of the ground planes 504 and 508, and a thickness tl of the CPW 500.
  • the strip width Wl, the slot spaces SI, and the thickness tl are parameters that define characteristics of a CPW resonator, such as e.g. impedance of the transmission line and electromagnetic field distribution.
  • the CPW 500 may be provided on the substrate 502 using any suitable deposition and patterning techniques as known in the art, which techniques may include e.g. atomic layer deposition (ALD), physical vapor deposition (PVD) (e.g. evaporative deposition, magnetron sputtering, or e-beam deposition), chemical vapor deposition (CVD), electroplating, use of masks, and etching.
  • ALD atomic layer deposition
  • PVD physical vapor deposition
  • CVD chemical vapor deposition
  • electroplating use of masks, and etching.
  • the method 400 may then proceed with providing a capping layer 310 over the
  • FIG. 6A provides a cross-section illustrations of a CPW 600A, similar to that of FIG. 5B, further showing that two ground planes 604 and 608 and a signal line 606 now include the superconductive materials of the ground planes 504, 508, and of the signal line 506 shown in FIG. 5B, and are covered with the capping layer 310, as described above.
  • FIG. 6A illustrates the embodiment where the capping layer 310 is provided not only on the upper surfaces of the ground planes 504/508 and the signal line 506, but also on their sidewalls.
  • Providing the capping layer 310 on the sidewalls of the superconducting metal may be particularly advantageous in terms of protection from oxidation, as well as may be the one that is easiest to implement with a selective deposition on the reduced metal surface of the superconducting metal.
  • the CPW 600B shown in FIG. 6B is different from the CPW 600A in that it illustrates the embodiment where the capping layer 310 is provided only on the upper surfaces of the ground planes 504/508 and the signal line 506, but not on the sidewalls.
  • FIGS. 6A and 6B are not drawn to scale because the bulk of the superconductor of the ground planes 604/608 and the signal line 606 may have a thickness tl on the order of 100-200 nm while the thickness of the capping layer 310 is on the order of a few nm, e.g. between about 0.1 and 5 nm, including all values and ranges therein, e.g. between about 1 and 3 nm.
  • Particular deposition methods used for providing the capping layer 310 on any portions of the superconductive materials of quantum circuit components would depend on which 2D material is used as the capping layer 310.
  • the 2D material growth/deposition technique may determine the thickness of the 2D capping layer and its quality by its growth parameters, e.g. pressure, temperature, growth time, precursors, gas flow rate, ratio of gas flow rates, etc., and can be carried out by a variety of known deposition techniques, including e.g. CVD and ALD.
  • methods of providing the capping layer 310 over the superconductive materials of quantum circuit components may be divided into direct growth methods (i.e.
  • CVD and ALD may be used for both direct growth and transfer methods.
  • CVD and ALD are chemical processes in which one or more reactive precursor gases are introduced into a reaction chamber and directed towards a substrate in order to induce controlled chemical reactions that result in growth of a desired material on the substrate.
  • a substrate used in the CVD or ALD process is the substrate with superconductive materials provided thereon, where the superconductive materials may be already patterned into the desired quantum circuit components.
  • a substrate is another substrate on which the capping layer is to be grown initially.
  • the one or more reactive gases may be provided to the chamber at a flow rate of e.g. 1 standard cubic centimeter per minute (seem) to 500 seem, including all values and ranges therein.
  • the reactive gas may be provided with a carrier gas, such as an inert gas, which may include, for example, argon (Ar) or nitrogen (e.g. N2).
  • the chamber may be maintained at a pressure in the range of 1 milliTorr to 100 milliTorr, including all values and ranges therein, and a temperature in the range of 100° C to 1100° C, including all values and ranges therein.
  • the substrate itself may also be heated.
  • the process may be plasma assisted where electrodes are provided within the process chamber and are used to ionize the gases.
  • plasma may be formed outside of the chamber and then supplied into the chamber.
  • a layer of solid thin film material is deposited preferentially on the surface of the superconducting metal due to reaction of the gas/gases and the catalytic properties of the superconducting metal in contrast to those of the substrate.
  • a hydrocarbon precursor may be used, such as methane, ethane, acetylene, or any other carbon containing precursor gas or liquid.
  • An inert carrier gas such as e.g. argon or nitrogen, in correct proportion to H2, may be provided and may together serve several purposes, including, but not limited to, reduction of the metal surfaces on the substrate (i.e. reduction of the superconductive material portions of quantum circuit components which are to be capped with graphene) and removal of surface oxide (if present) from such metal surfaces, control of graphene nucleation rate on the substrate, and mediation of the diffusivity of precursors and radicals on the substrate.
  • the carrier gas and H2 gas is introduced at some elevated temperature to chemically reduce the metal at the surface and remove the surface oxide (if present) at the metal-vacuum interface of the superconducting metals.
  • boron and nitrogen- containing precursors may be used, such as e.g., but not limited to, ammonia borane (BH3-NH3) or borazine (BH)3(NH)3.
  • An inert carrier gas such as e.g. argon or nitrogen, in correct proportion to hydrogen, may be provided and may serve several purposes, including, but not limited to, reduction of the metal surfaces on the substrate (i.e.
  • graphene and/or hBN may be grown on a surface of a suitable catalyst that would lower the energy required to decompose the precursor gases into carbon and/or B- and N-containing radicals that are able to nucleate and grow into the first stable graphene or hBN layer over the superconductive material.
  • the superconductive materials to be capped with the 2D capping layer may, on their own, serve as suitable catalysts for the deposition of the graphene and/or hBN capping layer, but, in general, any superconductive metals such as Nb, NbN, NbTiN, TiN, Al, and any other superconductive metals with high enough melting point to sustain the required growth temperatures are expected to be a suitable catalytic metal for promoting graphene, hBN, or TMD growth. Copper (Cu) is another example of a suitable catalytic metal for promoting growth of 2D materials.
  • the superconductive materials of quantum circuit components to be capped with the 2D capping layer may, first, be capped with a thin catalytic metal layer that would be a different conductive or superconductive metal than the bulk of these quantum circuit components and which could be better suited to catalyze the decomposition of precursors during the deposition step of the capping layer.
  • a catalytic metal layer (not specifically shown in FIG. 6A, but which would be included between the superconductive materials of 504/506/508 and the 2D capping layer 310) may have a thickness between about 5 and 500 nm, including all values and ranges therein.
  • the process flow above is a direct growth approach because the capping layer is grown directly on the quantum circuit substrate with the superconductive materials, patterned into the desired circuit element structures such as e.g. a resonator, to be capped.
  • Such an approach may allow taking advantage of direct growth/deposition of a 2D capping material 310 on the superconductor 304 is utilized in order to make a high-quality interface between the
  • the superconductive quantum circuit component 304 and the insulating capping layer 310 It also provides the advantage of growing the capping material 310 on the sidewalls of the superconductive materials 504/506/508, as shown in FIG. 6A. However, it may also place some restrictions on the growth process because care must be taken to not compromise or destroy the underlying superconductive quantum circuit components present on the substrate, e.g. temperatures which may be used for the growth.
  • An alternative to the direct growth approach is the transfer approach which includes providing the 2D capping layer 310 onto the superconductor 304 by, first, growing the 2D capping layer 310 on a separate substrate, followed by a mechanical transfer to the target substrate 302 containing the quantum circuit with the superconductor 304 to be capped.
  • the superconductor 304 may be unpatterned prior to the transfer of the capping layer 310, and may only be patterned into the desired circuit element structure, e.g. a resonator, after the capping layer 310 has been transferred thereon, e.g. using suitable etch processes.
  • the desired circuit element structure e.g. a resonator
  • suitable etch processes e.g. using suitable etch processes.
  • the transfer approach may relax the requirements for the growth of the 2D material layer(s) as the 2D material layer can now be grown on non-superconductive metal, or on other materials, with fewer requirements on growth temperature and other processing parameters as for the direct growth case, where the presence of the superconductive metal of a quantum circuit component, or the presence of other quantum circuit components on the same substrate, may limit some growth parameters.
  • the transfer approach has the additional complexities of a transfer step, compared to the direct growth, and would be challenging for covering the sidewalls of the ultimately patterned superconducting circuit element structures, since only the top surface of the structures would contain the 2D capping material that is transferred by a planar process that cannot conform to excessive topography.
  • either direct or transfer approach may be used due to their respective advantages.
  • graphene or hBN may be grown on rolled copper (Cu) foils of ⁇ 25-50 micrometers (um) thickness or Cu thin films on a wafer, which are then subsequently etched away and the graphene or hBN layers are mechanically transferred to a target substrate, i.e. to an unpatterned superconductive material 304 of a future quantum circuit component, by known methods.
  • the unpatterned superconductive material 304 with the capping layer 310 transferred thereon is then subsequently etched into the desired geometries of the various different superconducting circuit elements, e.g. to form the CPW 600B as shown in FIG. 6B.
  • An exemplary transfer method may include providing a mechanical support layer, e.g. by depositing (e.g. by spin-coating) a protective polymer layer, e.g. poly(methyl methacrylate) (PMMA), on top of the grown 2D material (e.g. graphene, hBN, or TMD) and may include an additional, possibly much sturdier and thicker, mechanical support layer (e.g. transfer tape) on top of the protective polymer layer which is directly in contact with the grown 2D material layer.
  • a protective polymer layer e.g. poly(methyl methacrylate) (PMMA)
  • PMMA poly(methyl methacrylate)
  • the polymer layer with the additional mechanical support layer such as a transfer tape would serve as a protective and mechanical support layer during the transfer of the 2D material layer that is typically accomplished by chemical etching of the underlying catalytic metal, e.g. if the catalytic metal used to catalyze growth of the 2D material layer is Cu, then Cu can be etched using e.g. ferric chloride (FeCI3), which would release the 2D material layer and the protective and mechanical support layer deposited thereon, thereby allowing these layers to be mechanically transferred to the target substrate, e.g. to the substrate 302 with the superconductor 304, with the 2D material layer facing the target substrate.
  • FeCI3 ferric chloride
  • the released 2D material layer and the mechanical support layer may be brought to the target substrate in a controlled, dry environment utilizing wafer-scale techniques, e.g. industrial wafer bonder, as known in the art, and in an environment where the superconducting metal surface can be maintained in its metallic state free of surface oxide.
  • wafer-scale techniques e.g. industrial wafer bonder, as known in the art
  • the polymer layer and the additional mechanical support layer on top of the 2D material layer is removed, e.g. by mechanically removing additional mechanical support layer, if such a layer was present, and by removing the protective polymer layer by chemically dissolving it using a suitable solvent, or by gently ashing it off.
  • the surface of the superconductor 304 could undergo a reduction process (i.e. removal of oxygen) which could be carried out in an inert gas or vacuum environment in order to inhibit the growth of a surface oxide, or/and remove existing oxide between the superconductor 304 and the 2D material layer 310 and improve the interface by eliminating or reducing adsorbed water, adventitious carbon, and other adsorbates.
  • a reduction step could include a buffered oxide etch, an HF etch, or reduction by annealing in a forming gas, e.g.
  • the 2D material capping layer 310 may be a layer having only one atomic layer of 2D materials, or a layer having multiple such layers of 2D materials.
  • the thickness of the capping layer 310 may affect the effectiveness of it as a diffusion barrier and as a passivation layer and, thus, its effectiveness in preventing the formation of metal oxide at the surface of the superconducting metal upon exposure to ambient conditions. In turn, reduction in formation of metal oxide translates to a reduction in spurious two-level systems at the surface that degrade the performance of circuit elements, e.g. quality factor of CPW resonators and coherence times of transmon qubits. Therefore, the thickness of the capping layer 310 can be selected to set the desired barrier properties and optimal thickness for improving resonator quality factors and qubit coherence times. A suitable thickness may be identified based on considerations such as e.g.
  • a single 2D layer of hBN typically has a thickness between 0.1 and 1.0 nm including all values and ranges therein, e.g. between 0.2 and 0.4 nm.
  • a thickness between 0.1 and 1.0 nm including all values and ranges therein, e.g. between 0.2 and 0.4 nm.
  • what is considered to be a "thickness" of a 2D layer depends on how the thickness of a single layer is defined.
  • the inter-planar spacing of the bulk 2D material is used as a thickness of one layer, in which case a thickness of one layer of hBN would be about 3.3 Angstroms and one layer of graphene would be about 3.4 Angstroms.
  • the neighboring material is something other than another layer of the same 2D material, such as e.g. at an interface of hBN and a 3D material or another 2D material, then the spacing can be something different.
  • the spacing may be reduced if there is some interaction between the two materials besides the van der Waals interactions typical between layers of the bulk layered material, or may be about the same if there are only van der Waals interactions between the materials, as is the case for individual layers in the bulk hBN or other 2D materials.
  • 2-15 of such atomic 2D material layers may be used, e.g. 2-15 hBN layers, resulting in the total thickness of the capping layer 310 being between about 0.4 and 6 nm including all values and ranges therein, e.g. between 1 and 5 nm, e.g. 2-3 nm.
  • Some exemplary deposition details described above refer to hBN and/or graphene. Similar deposition techniques may be used for other 2D materials as known in the art, including TMDs.
  • the 2D material capping layers over any of the superconducting materials of quantum circuit components described herein can be detected by cross-sectional TEM, possibly in conjunction with Raman spectroscopy.
  • a TEM can be used to determine the number of the atomic layers of the 2D material in the capping layer 310 by simply counting the atomic layers above the superconductor 304, where the different atomic layers of a 2D material will be clearly distinguishable from the surrounding superconductive material and any possible interface layer (e.g. the catalytic metal described above).
  • Raman spectroscopy can be used to unambiguously determine the presence of a particular 2D material in the capping layer 310 (e.g. presence of graphene, TMDs, or hBN), as opposed to some other 2D material.
  • Raman spectroscopy refers to a spectroscopic technique used to observe vibrational, rotational, and other low-frequency modes in a system, and is commonly used to provide a fingerprint by which molecules can be identified.
  • Raman spectroscopy can be used to unambiguously identify graphene, the number of layers present, and how many/which defects it may have.
  • TMDs Raman spectroscopy and
  • photo!uminescence spectroscopy can be used to identify the particular TMD chemistry and to distinguish between single layer (direct bandgap) and multilayer (indirect bandgap) TMDs.
  • superconductive materials capped with a 2D capping layer as described herein could be a part of a superconducting qubit, e.g. a part of a charge qubit, in particular a part of a transmon, or a part of a flux qubit.
  • the superconductive quantum circuit component 304 capped with the 2D capping layer 310 may be used in quantum circuits implementing qubits other than superconducting qubits.
  • FIGS. 7A-7B are top views of a wafer 2000 and dies 2002 that may be formed from the wafer 2000, according to some embodiments of the present disclosure.
  • the dies 2002 may include any of the quantum circuits/qubit devices disclosed herein, e.g., the quantum circuit 100, and may include any of the quantum circuit components having superconductive materials capped with a 2D capping layer described herein, such as e.g. any of the quantum circuit components shown in FIGS. 1A-1B and FIG. 3, or any combinations of these structures.
  • the wafer 2000 may include semiconductor material and may include one or more dies 2002 having conventional and quantum circuit device elements formed on a surface of the wafer 2000.
  • Each of the dies 2002 may be a repeating unit of a semiconductor product that includes any suitable conventional and/or quantum circuit qubit device. After the fabrication of the semiconductor product is complete, the wafer 2000 may undergo a singulation process in which each of the dies 2002 is separated from one another to provide discrete "chips" of the semiconductor product.
  • a die 2002 may include one or more quantum circuits 100 and/or supporting circuitry to route electrical signals to the quantum circuits 100 (e.g., interconnects connected to the conductive contacts of the flux bias line structures described herein, and other conductive vias and lines), as well as any other IC components.
  • the wafer 2000 or the die 2002 may include a memory device (e.g., a static random access memory (SRAM) device), a logic device (e.g., AND, OR, NAND, or NOR gate), or any other suitable circuit element. Multiple ones of these devices may be combined on a single die 2002. For example, a memory array formed by multiple memory devices may be formed on a same die 2002 as a processing device (e.g., the processing device 2202 of FIG. 9) or other logic that is configured to store information in the memory devices or execute instructions stored in the memory array. [0088] FIG.
  • a memory device e.g., a static random access memory (SRAM) device
  • a logic device e.g., AND, OR, NAND, or NOR gate
  • Multiple ones of these devices may be combined on a single die 2002.
  • a memory array formed by multiple memory devices may be formed on a same die 2002 as a processing device (e.g., the processing device 2202 of FIG. 9) or other logic that
  • the device assembly 2100 includes a number of components disposed on a circuit board 2102.
  • the device assembly 2100 may include components disposed on a first face 2140 of the circuit board 2102 and an opposing second face 2142 of the circuit board 2102; generally, components may be disposed on one or both faces 2140 and 2142.
  • the circuit board 2102 may be a printed circuit board (PCB) including multiple metal layers separated from one another by layers of dielectric material and interconnected by electrically conductive vias. Any one or more of the metal layers may be formed in a desired circuit pattern to route electrical signals (optionally in conjunction with other metal layers) between the components coupled to the circuit board 2102.
  • the circuit board 2102 may be a package substrate or flexible board.
  • the IC device assembly 2100 illustrated in FIG. 8 includes a package-on-interposer structure 2136 coupled to the first face 2140 of the circuit board 2102 by coupling components 2116.
  • the coupling components 2116 may electrically and mechanically couple the package-on-interposer structure 2136 to the circuit board 2102, and may include solder balls (as shown in FIG. 8), male and female portions of a socket, an adhesive, an underfill material, and/or any other suitable electrical and/or mechanical coupling structure.
  • the package-on-interposer structure 2136 may include a package 2120 coupled to an interposer 2104 by coupling components 2118.
  • the coupling components 2118 may take any suitable form for the application, such as the forms discussed above with reference to the coupling components 2116. Although a single package 2120 is shown in FIG. 8, multiple packages may be coupled to the interposer 2104; indeed, additional interposers may be coupled to the interposer 2104.
  • the interposer 2104 may provide an intervening substrate used to bridge the circuit board 2102 and the package 2120.
  • the package 2120 may be a quantum circuit device package as described herein, e.g.
  • the interposer 2104 may spread a connection to a wider pitch or reroute a connection to a different connection.
  • the interposer 2104 may couple the package 2120 (e.g., a die) to a ball grid array (BGA) of the coupling components 2116 for coupling to the circuit board 2102.
  • BGA ball grid array
  • the package 2120 and the circuit board 2102 are attached to opposing sides of the interposer 2104; in other embodiments, the package 2120 and the circuit board 2102 may be attached to a same side of the interposer 2104. In some embodiments, three or more components may be interconnected by way of the interposer 2104.
  • the interposer 2104 may be formed of an epoxy resin, a fiberglass-reinforced epoxy resin, a ceramic material, or a polymer material such as polyimide. In some embodiments, the interposer 2104 may be formed of alternate rigid or flexible materials that may include the same materials described above for use in a semiconductor substrate, such as silicon, germanium, and other group lll-V and group IV materials.
  • the interposer 2104 may include metal interconnects 2108 and vias 2110, including but not limited to through-silicon vias (TSVs) 2106.
  • TSVs through-silicon vias
  • the interposer 2104 may further include embedded devices 2114, including both passive and active devices.
  • Such devices may include, but are not limited to, capacitors, decoupling capacitors, resistors, inductors, fuses, diodes, transformers, sensors, electrostatic discharge (ESD) devices, and memory devices. More complex devices such as radio frequency (RF) devices, power amplifiers, power management devices, antennas, arrays, sensors, and microelectromechanical systems (MEMS) devices may also be formed on the interposer 2104.
  • RF radio frequency
  • MEMS microelectromechanical systems
  • the package-on-interposer structure 2136 may take the form of any of the package-on-interposer structures known in the art.
  • the device assembly 2100 may include a package 2124 coupled to the first face 2140 of the circuit board 2102 by coupling components 2122.
  • the coupling components 2122 may take the form of any of the embodiments discussed above with reference to the coupling components 2116
  • the package 2124 may take the form of any of the embodiments discussed above with reference to the package 2120.
  • the package 2124 may be a package including one or more quantum circuits with qubits as described herein or may be a conventional IC package, for example.
  • the package 2124 may take the form of any of the embodiments of the quantum circuit 100 with any of the quantum circuit components having superconductive materials capped with a 2D capping layer described herein.
  • the device assembly 2100 illustrated in FIG. 8 includes a package-on-package structure 2134 coupled to the second face 2142 of the circuit board 2102 by coupling components 2128.
  • the package-on-package structure 2134 may include a package 2126 and a package 2132 coupled together by coupling components 2130 such that the package 2126 is disposed between the circuit board 2102 and the package 2132.
  • the coupling components 2128 and 2130 may take the form of any of the embodiments of the coupling components 2116 discussed above, and the packages 2126 and 2132 may take the form of any of the embodiments of the package 2120 discussed above.
  • Each of the packages 2126 and 2132 may be a qubit device package as described herein or may be a conventional IC package, for example.
  • one or both of the packages 2126 and 2132 may take the form of any of the embodiments of the quantum circuit 100 with any of the quantum circuit components having superconductive materials capped with a 2D capping layer described herein, or a combination thereof.
  • FIG. 9 is a block diagram of an example quantum computing device 2200 that may include any of the quantum circuit components having superconductive materials capped with a 2D capping layer disclosed herein.
  • a number of components are illustrated in FIG. 9 as included in the quantum computing device 2200, but any one or more of these components may be omitted or duplicated, as suitable for the application.
  • some or all of the components included in the quantum computing device 2200 may be attached to one or more PCBs (e.g., a motherboard), and may be included in, or include, any of the quantum circuits with quantum circuit components having superconductive materials capped with a 2D capping layer described herein.
  • PCBs e.g., a motherboard
  • various ones of these components may be fabricated onto a single system-on-a-chip (SoC) die.
  • the quantum computing device 2200 may not include one or more of the components illustrated in FIG. 9, but the quantum computing device 2200 may include interface circuitry for coupling to the one or more components.
  • the quantum computing device 2200 may not include a display device 2206, but may include display device interface circuitry (e.g., a connector and driver circuitry) to which a display device 2206 may be coupled.
  • the quantum computing device 2200 may not include an audio input device 2218 or an audio output device 2208, but may include audio input or output device interface circuitry (e.g., connectors and supporting circuitry) to which an audio input device 2218 or audio output device 2208 may be coupled.
  • audio input or output device interface circuitry e.g., connectors and supporting circuitry
  • the quantum computing device 2200 may include a processing device 2202 (e.g., one or more processing devices).
  • processing device or “processor” may refer to any device or portion of a device that processes electronic data from registers and/or memory to transform that electronic data into other electronic data that may be stored in registers and/or memory.
  • the processing device 2202 may include a quantum processing device 2226 (e.g., one or more quantum processing devices), and a non-quantum processing device 2228 (e.g., one or more non-quantum processing devices).
  • the quantum processing device 2226 may include one or more of the quantum circuits 100 with quantum circuit components having superconductive materials capped with a 2D capping layer disclosed herein, and may perform data processing by performing operations on the qubits that may be generated in the quantum circuits 100, and monitoring the result of those operations. For example, as discussed above, different qubits may be allowed to interact, the quantum states of different qubits may be set or transformed, and the quantum states of different qubits may be read.
  • the quantum processing device 2226 may be a universal quantum processor, or specialized quantum processor configured to run one or more particular quantum algorithms.
  • the quantum processing device 2226 may execute algorithms that are particularly suitable for quantum computers, such as cryptographic algorithms that utilize prime factorization, encryption/decryption, algorithms to optimize chemical reactions, algorithms to model protein folding, etc.
  • the quantum processing device 2226 may also include support circuitry to support the processing capability of the quantum processing device 2226, such as input/output channels, multiplexers, signal mixers, quantum amplifiers, and analog-to-digital converters.
  • the processing device 2202 may include a non-quantum processing device 2228.
  • the non-quantum processing device 2228 may provide peripheral logic to support the operation of the quantum processing device 2226.
  • the non-quantum processing device 2228 may control the performance of a read operation, control the performance of a write operation, control the clearing of quantum bits, etc.
  • the non-quantum processing device 2228 may also perform conventional computing functions to supplement the computing functions provided by the quantum processing device 2226.
  • the non-quantum processing device 2228 may interface with one or more of the other components of the quantum computing device 2200 (e.g., the communication chip 2212 discussed below, the display device 2206 discussed below, etc.) in a conventional manner, and may serve as an interface between the quantum processing device 2226 and conventional components.
  • the non-quantum processing device 2228 may include one or more digital signal processors (DSPs), application-specific ICs (ASICs), central processing units (CPUs), graphics processing units (GPUs), cryptoprocessors (specialized processors that execute cryptographic algorithms within hardware), server processors, or any other suitable processing devices.
  • DSPs digital signal processors
  • ASICs application-specific ICs
  • CPUs central processing units
  • GPUs graphics processing units
  • cryptoprocessors specialized processors that execute cryptographic algorithms within hardware
  • server processors or any other suitable processing devices.
  • the quantum computing device 2200 may include a memory 2204, which may itself include one or more memory devices such as volatile memory (e.g., dynamic random access memory (DRAM)), nonvolatile memory (e.g., read-only memory (ROM)), flash memory, solid-state memory, and/or a hard drive.
  • volatile memory e.g., dynamic random access memory (DRAM)
  • nonvolatile memory e.g., read-only memory (ROM)
  • flash memory solid-state memory
  • solid-state memory solid-state memory
  • hard drive solid-state memory
  • the states of qubits in the quantum processing device 2226 may be read and stored in the memory 2204.
  • the memory 2204 may include memory that shares a die with the non-quantum processing device 2228. This memory may be used as cache memory and may include embedded dynamic random access memory (eDRAM) or spin transfer torque magnetic random access memory (STT-MRAM).
  • eDRAM embedded dynamic random access memory
  • STT-MRAM spin transfer torque magnetic random access memory
  • the quantum computing device 2200 may include a cooling apparatus 2230.
  • the cooling apparatus 2230 may maintain the quantum processing device 2226, in particular the quantum circuits 100 as described herein, at a predetermined low temperature during operation to avoid qubit decoherence and to reduce the effects of scattering in the quantum processing device 2226.
  • This predetermined low temperature may vary depending on the setting; in some embodiments, the temperature may be 5 degrees Kelvin or less.
  • the non-quantum processing device 2228 (and various other components of the quantum computing device 2200) may not be cooled by the cooling apparatus 2230, and may instead operate at room temperature.
  • the cooling apparatus 2230 may be, for example, a dilution refrigerator, a helium-3 refrigerator, or a liquid helium refrigerator.
  • the quantum computing device 2200 may include a communication chip 2212 (e.g., one or more communication chips).
  • the communication chip 2212 may be configured for managing wireless communications for the transfer of data to and from the quantum computing device 2200.
  • wireless and its derivatives may be used to describe circuits, devices, systems, methods, techniques, communications channels, etc., that may communicate data through the use of modulated electromagnetic radiation through a nonsolid medium. The term does not imply that the associated devices do not contain any wires, although in some embodiments they might not.
  • the communication chip 2212 may implement any of a number of wireless standards or protocols, including but not limited to Institute for Electrical and Electronic Engineers (IEEE) standards including Wi-Fi (IEEE 802.11 family), IEEE 802.16 standards (e.g., IEEE 802.16-2005 Amendment), Long-Term Evolution (LTE) project along with any amendments, updates, and/or revisions (e.g., advanced LTE project, ultramobile broadband (UMB) project (also referred to as "3GPP2”), etc.).
  • IEEE 802.16 compatible Broadband Wireless Access (BWA) networks are generally referred to as WiMAX networks, an acronym that stands for Worldwide Interoperability for Microwave Access, which is a certification mark for products that pass conformity and
  • the communication chip 2212 may operate in accordance with a Global System for Mobile Communication (GSM), General Packet Radio Service (GPRS), Universal Mobile Telecommunications System (UMTS), High Speed Packet Access (HSPA), Evolved HSPA (E-HSPA), or LTE network.
  • GSM Global System for Mobile Communication
  • GPRS General Packet Radio Service
  • UMTS Universal Mobile Telecommunications System
  • High Speed Packet Access HSPA
  • E-HSPA Evolved HSPA
  • LTE LTE network.
  • the communication chip 2212 may operate in accordance with Enhanced Data for GSM Evolution (EDGE), GSM EDGE Radio Access Network (GERAN), Universal Terrestrial Radio Access Network (UTRAN), or Evolved UTRAN (E-UTRAN).
  • EDGE Enhanced Data for GSM Evolution
  • GERAN GSM EDGE Radio Access Network
  • UTRAN Universal Terrestrial Radio Access Network
  • E-UTRAN Evolved UTRAN
  • the communication chip 2212 may operate in accordance with Code Division Multiple Access (CDMA), Time Division Multiple Access (TDMA), Digital Enhanced Cordless Telecommunications (DECT), Evolution-Data Optimized (EV-DO), and derivatives thereof, as well as any other wireless protocols that are designated as 3G, 4G, 5G, and beyond.
  • CDMA Code Division Multiple Access
  • TDMA Time Division Multiple Access
  • DECT Digital Enhanced Cordless Telecommunications
  • EV-DO Evolution-Data Optimized
  • the communication chip 2212 may operate in accordance with other wireless protocols in other embodiments.
  • the quantum computing device 2200 may include an antenna 2222 to facilitate wireless communications and/or to receive other wireless
  • the communication chip 2212 may manage wired communications, such as electrical, optical, or any other suitable communication protocols (e.g., the Ethernet). As noted above, the communication chip 2212 may include multiple communication chips. For instance, a first communication chip 2212 may be dedicated to shorter-range wireless
  • a second communication chip 2212 may be dedicated to longer-range wireless communications such as global positioning system (GPS), EDGE, GPRS, CDMA, WiMAX, LTE, EV-DO, or others.
  • GPS global positioning system
  • EDGE EDGE
  • GPRS global positioning system
  • CDMA Code Division Multiple Access
  • WiMAX Long Term Evolution
  • LTE Long Term Evolution
  • EV-DO EV-DO
  • a first communication chip 2212 may be dedicated to wireless communications
  • a second communication chip 2212 may be dedicated to wired communications.
  • the quantum computing device 2200 may include battery/power circuitry 2214.
  • the battery/power circuitry 2214 may include one or more energy storage devices (e.g., batteries or capacitors) and/or circuitry for coupling components of the quantum computing device 2200 to an energy source separate from the quantum computing device 2200 (e.g., AC line power).
  • the quantum computing device 2200 may include a display device 2206 (or corresponding interface circuitry, as discussed above).
  • the display device 2206 may include any visual indicators, such as a heads-up display, a computer monitor, a projector, a touchscreen display, a liquid crystal display (LCD), a light-emitting diode display, or a flat panel display, for example.
  • LCD liquid crystal display
  • the quantum computing device 2200 may include an audio output device 2208 (or corresponding interface circuitry, as discussed above).
  • the audio output device 2208 may include any device that generates an audible indicator, such as speakers, headsets, or earbuds, for example.
  • the quantum computing device 2200 may include an audio input device 2218 (or corresponding interface circuitry, as discussed above).
  • the audio input device 2218 may include any device that generates a signal representative of a sound, such as microphones, microphone arrays, or digital instruments (e.g., instruments having a musical instrument digital interface (MI DI) output).
  • MI DI musical instrument digital interface
  • the quantum computing device 2200 may include a GPS device 2216 (or corresponding interface circuitry, as discussed above).
  • the GPS device 2216 may be in communication with a satellite-based system and may receive a location of the quantum computing device 2200, as known in the art.
  • the quantum computing device 2200 may include an other output device 2210 (or corresponding interface circuitry, as discussed above).
  • Examples of the other output device 2210 may include an audio codec, a video codec, a printer, a wired or wireless transmitter for providing information to other devices, or an additional storage device.
  • the quantum computing device 2200 may include an other input device 2220 (or corresponding interface circuitry, as discussed above).
  • Examples of the other input device 2220 may include an accelerometer, a gyroscope, a compass, an image capture device, a keyboard, a cursor control device such as a mouse, a stylus, a touchpad, a bar code reader, a Quick Response (QR) code reader, any sensor, or a radio frequency identification (RFID) reader.
  • RFID radio frequency identification
  • the quantum computing device 2200 may have any appropriate form factor, such as a hand-held or mobile computing device (e.g., a cell phone, a smart phone, a mobile internet device, a music player, a tablet computer, a laptop computer, a netbook computer, an ultrabook computer, a personal digital assistant (PDA), an ultramobile personal computer, etc.), a desktop computing device, a server or other networked computing component, a printer, a scanner, a monitor, a set-top box, an entertainment control unit, a vehicle control unit, a digital camera, a digital video recorder, or a wearable computing device.
  • a hand-held or mobile computing device e.g., a cell phone, a smart phone, a mobile internet device, a music player, a tablet computer, a laptop computer, a netbook computer, an ultrabook computer, a personal digital assistant (PDA), an ultramobile personal computer, etc.
  • PDA personal digital assistant
  • Example 1 provides a qubit device that includes a substrate, a quantum circuit component provided over the substrate, the quantum circuit component including a superconductive material, and a cap layer at least partially enclosing the superconductive material, the cap layer including a two-dimensional (2D) material configured to minimize oxidation of at least a portion of the superconducting material being enclosed by the cap layer.
  • 2D two-dimensional
  • Example 2 provides the qubit device according to Example 1, where the 2D material is hexagonal boron nitride (hBN).
  • hBN hexagonal boron nitride
  • Example 3 provides the qubit device according to Example 1, where the 2D material is graphene.
  • Example 4 provides the qubit device according to Example 1, where the 2D material is graphene oxide.
  • Example 5 provides the qubit device according to Example 1, where the 2D material is a TMD.
  • Example 6 provides the qubit device according to Example 5, where the TMD is one of a material including molybdenum (Mo) and sulfur (S) (e.g. molybdenum disulfide (MoS 2 )), a material including molybdenum (Mo) and se!enide (Se) (e.g. molybdenum dise!enide (MoSe2)), a material including tungsten (W) and sulfur (S) (e.g. tungsten disulfide (WS 2 )), and a material including tungsten (W) and selenide (Se) (e.g. tungsten diselenide (WSe 2 )).
  • Example 7 provides the qubit device according to any one of the preceding Examples, where a thickness of the cap layer is between 0.1 and 5 nanometers, e.g. between 1 and 3 nm.
  • Example 8 provides the qubit device according to any one of the preceding Examples, where the cap layer conforms to a topography of the superconductive material.
  • Example 9 provides the qubit device according to any one of Examples 1-8, where the quantum circuit component is a Josephson Junction and the superconductive material forms an electrode of the Josephson Junction.
  • Example 10 provides the qubit device according to Example 9, where the Josephson Junction is included within a superconducting quantum interference device (SQUID).
  • SQUID superconducting quantum interference device
  • Example 11 provides the qubit device according to any one of Examples 1-8, where the quantum circuit component is a non-resonant transmission line and the superconductive material forms a signal line or/and at least one ground plane of the non-resonant transmission line.
  • Example 12 provides the qubit device according to Example 11, where the non-resonant transmission line is a flux bias line.
  • Example 13 provides the qubit device according to Example 11, where the non-resonant transmission line is a microwave line.
  • Example 14 provides the qubit device according to Example 11, where the non-resonant transmission line is a drive line.
  • Example 15 provides the qubit device according to any one of Examples 1-8, where the quantum circuit component is a resonator and the superconductive material forms a signal line or/and at least one ground plane of the resonator.
  • Example 16 provides the qubit device according to Example 15, where the resonator is a coupling resonator.
  • Example 17 provides the qubit device according to Example 15, where the resonator is a readout resonator.
  • Example 18 provides a method for fabricating a qubit device, the method including providing a superconductive material for forming a quantum circuit component over a substrate; and providing a cap layer at least partially enclosing the superconductive material, the cap layer including a two-dimensional (2D) material configured to minimize oxidation of at least a portion of the superconducting material being enclosed by the cap layer.
  • 2D two-dimensional
  • Example 19 provides the method according to Example 18, further including patterning the superconductive material to form the quantum circuit component prior to providing the cap layer, e.g. using suitable etching techniques for etching the superconductive material.
  • Example 20 provides the method according to Example 19, where providing the cap layer includes directly growing the cap layer over the patterned superconductive material.
  • Example 21 provides the method according to Example 20, further including providing a layer of a catalytic material over the superconductive material prior to providing the cap layer.
  • Example 22 provides the method according to Example 21, where the superconductive material is a first superconductive material, and the catalytic material includes a second superconductive material, different from the first superconductive material.
  • Example 23 provides the method according to Example 21, where the catalytic material includes copper.
  • Example 24 provides the method according to any one of Examples 20-23, where the layer of the catalytic material has a thickness between about 5 and 500 nanometers.
  • Example 25 provides the method according to any one of Examples 20-24, where directly growing the cap layer includes growing the cap layer on upper and sidewall surfaces of the patterned superconductive material.
  • Example 26 provides the method according to Example 18, further including patterning the superconductive material to form the quantum circuit component after providing the cap layer, e.g. using suitable etching techniques for etching the cap layer and the superconductive material.
  • Example 27 provides the method according to Example 26, where providing the cap layer includes growing the cap layer on a foundation different from the substrate with the
  • Example 28 provides the method according to Example 27, where the foundation is a copper foil or a copper thin film on a wafer.
  • Example 29 provides the method according to Examples 27 or 28, further including providing a mechanical support layer over the cap layer grown on the foundation, prior to transferring the grown cap layer to the not yet patterned superconductive material.
  • Example 30 provides the method according to Example 29, further including removing the mechanical support layer after transferring the grown cap layer to the not yet patterned superconductive material.
  • Example 31 provides the method according to any one of Examples 27-30, where, following the transfer, the cap layer covers only upper surface of the not yet patterned superconductive material.
  • Example 32 provides the method according to any one of Examples 18-31, further including performing a reduction process prior to providing the cap layer.
  • Example 33 provides the method according to Example 32, where the reduction process includes a buffered oxide etch, a hydrofluoric acid etch, or reduction by annealing in a forming gas.
  • Example 34 provides a quantum computing device that includes a quantum processing device, a non-quantum processing device coupled to the quantum processing device, and a memory device to store data generated by or using the plurality of quantum circuit components during operation of the quantum processing device.
  • the quantum processing device includes a die including a plurality of quantum circuit components, each of the quantum circuit components including a superconductive material, and a cap layer at least partially enclosing the superconductive material, the cap layer including a two-dimensional (2D) material.
  • Example 35 provides the quantum computing device according to Example 34, further including a cooling apparatus configured to maintain a temperature of the quantum processing device below 5 degrees Kelvin.
  • Example 36 provides the quantum computing device according to Examples 34 or 35, where the memory device is to store instructions for a quantum computing algorithm to be executed by the quantum processing device.

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  • Superconductor Devices And Manufacturing Methods Thereof (AREA)

Abstract

L'invention concerne des dispositifs à qubit qui font appel à des matériaux supraconducteurs et à des moyens de protection de tels matériaux contre l'oxydation. Selon un aspect, la présente invention concerne un dispositif à qubit comprenant au moins un composant/élément de circuit quantique, par exemple un résonateur. Le composant de circuit quantique comprend un ou plusieurs matériaux supraconducteurs et une couche de capot entourant au moins partiellement lesdits matériaux supraconducteurs, la couche de capot comprenant une couche bidimensionnelle (2D) tel que du graphène, du nitrure de bore hexagonal, ou un dichalcogénure de métal de transition. En faisant appel à des matériaux 2D de manière à recouvrir des composants de circuit quantique, l'oxydation des parties coiffées de matériaux supraconducteurs peut être réduite à un minimum, d'où une réduction des pertes dues à des systèmes à deux niveaux parasites et une amélioration des performances, tout en fournissant simultanément des avantages supplémentaires en raison de la nature unique de matériaux 2D, comme par exemple l'absence de liaisons pendantes et le réglage précis et fiable de l'épaisseur de la couche de capot.
PCT/US2017/038648 2017-06-22 2017-06-22 Dispositifs à qubit comprenant des matériaux supraconducteurs coiffés de couches de matériau 2d WO2018236374A1 (fr)

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CN112070230A (zh) * 2020-08-26 2020-12-11 南通大学 一种基于新型量子位交互拓扑的量子表面码的纠错受控非门
CN112070230B (zh) * 2020-08-26 2023-09-26 南通大学 一种基于新型量子位交互拓扑的量子表面码的纠错受控非门
WO2022232717A3 (fr) * 2021-02-17 2023-03-09 Cornell University Calcul quantique intégré avec des matériaux épitaxiaux
WO2023111379A1 (fr) * 2021-12-15 2023-06-22 Iqm Finland Oy Ligne de transmission dans un circuit supraconducteur
WO2024049506A3 (fr) * 2022-04-04 2024-05-10 The Trustees Of Princeton University Encre de nanofeuille à base de ws2 supraconductrice

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