WO2018229597A1

WO2018229597A1 - Charging control system, charging control method, and electronic equipment

Info

Publication number: WO2018229597A1
Application number: PCT/IB2018/054029
Authority: WO
Inventors: 田島亮太; 豊高耕平; 伊佐敏行; 宍戸英明
Original assignee: 株式会社半導体エネルギー研究所
Priority date: 2017-06-16
Filing date: 2018-06-06
Publication date: 2018-12-20
Also published as: JPWO2018229597A1; JP7235409B2

Abstract

[Abstract] Because the internal resistance of a secondary cell increases when the secondary cell deteriorates, a deteriorated secondary cell has high terminal voltage during charging and low terminal voltage during discharging, and thus a difference arises from the terminal voltage of an undeteriorated secondary cell. According to the present invention, the level of deterioration and estimated value of a plurality of secondary cells are calculated using a first neural network, and variation in the level of deterioration is reduced by slowing the charging rate for secondary cells having high deterioration so as not to enter a fully charged state, and speeding up the charging rate for secondary cells having low deterioration so as to enter a fully charged state. The secondary cells having a high level of deterioration are set to a low charging termination voltage so as not to enter a fully charged state, and the charging conditions are selected on the basis of a calculation in which a second neural network is used.

Description

CHARGE CONTROL SYSTEM, CHARGE CONTROL METHOD, AND ELECTRONIC DEVICE

One embodiment of the present invention relates to an object, a method, or a manufacturing method. Alternatively, one embodiment of the present invention relates to a process, a machine, a manufacture, or a composition (composition of matter). One embodiment of the present invention relates to a semiconductor device, a display device, a light-emitting device, a power storage device, a lighting device, an electronic device, or a manufacturing method thereof. In particular, the present invention relates to a charge control system, a charge control method, and an electronic device having a secondary battery. One embodiment of the present invention relates to a vehicle or a vehicle electronic device provided in the vehicle.

Note that in this specification, a power storage device refers to all elements and devices having a power storage function. For example, a storage battery (also referred to as a secondary battery) such as a lithium ion secondary battery, a lithium ion capacitor, an all-solid battery, and an electric double layer capacitor are included.

One embodiment of the present invention relates to a neural network and a charge control system using the same. Another embodiment of the present invention relates to a vehicle using a neural network. Another embodiment of the present invention relates to an electronic device using a neural network. One embodiment of the present invention is not limited to a vehicle, and can also be applied to a charge control system for a power storage device for storing power obtained from power generation equipment such as a solar power generation panel installed in a structure or the like. .

In recent years, various power storage devices such as lithium ion secondary batteries, lithium ion capacitors, and air batteries have been actively developed. In particular, lithium ion secondary batteries with high output and high energy density are portable information terminals such as mobile phones, smartphones, tablets, or notebook computers, portable music players, digital cameras, medical devices, or hybrid vehicles (HEV). Demand for electric vehicles (EVs), next-generation clean energy vehicles such as plug-in hybrid vehicles (PHEVs), etc., is growing rapidly with the development of the semiconductor industry. It has become indispensable to the society.

In personal digital assistants and electric vehicles, a plurality of secondary batteries are connected in series or in parallel to provide a protection circuit and used as a battery pack (also referred to as an assembled battery). The battery pack refers to a battery in which a plurality of secondary batteries are stored together with a predetermined circuit in a container (metal can, film outer package) in order to facilitate handling of the secondary battery. The battery pack is provided with an ECU (Electronic Control Unit) in order to manage the operation state. If the characteristics of each of the secondary batteries constituting the battery pack vary, an imbalance will occur. When an imbalance occurs, a secondary battery that is overcharged during charging or a secondary battery that is not fully charged is generated, and the apparent capacity of the entire battery pack is reduced. However, since charging ends when a certain voltage is reached, there is a difference between the actual capacity and the capacity output by the calculation.

Since one battery pack, that is, a plurality of secondary batteries are charged or discharged together, imbalance increases inside one battery pack. In order to accelerate the deterioration by applying stress to only a part of the batteries having a large deterioration, a repeated cycle of charging / discharging results in a vicious cycle in which the life of the battery pack becomes shorter.

An electric vehicle is a vehicle that uses only an electric motor as a drive unit, but there is also a hybrid vehicle that includes both an internal combustion engine such as an engine and an electric motor. A plurality of sets of battery packs each including a plurality of secondary batteries as one battery pack are arranged in a lower part of an automobile using the secondary batteries.

When charging an electric vehicle or a hybrid vehicle, charging is performed using a charging facility or a household power source. Since the time to reach full charge differs depending on the charging facility specifications, that is, the charging conditions such as the charging voltage, it is difficult to predict the charging end time.

Secondary batteries used in electric vehicles and hybrid vehicles are deteriorated depending on the number of times of charge / discharge, depth of discharge, charging current, charging environment (temperature change), and the like. Depending on how the user uses the battery, the temperature at the time of charging, the frequency of quick charging, the amount of charge by the regenerative brake, the charging timing by the regenerative brake, etc. may affect the degree of deterioration of the battery.

In addition, since secondary batteries used in electric vehicles and hybrid vehicles are premised on long-term use, it is desired to have sufficient reliability. Patent Document 1 describes a method of controlling charging / discharging from a discharging battery cell to a charging battery cell by controlling a transistor according to the capacity of the battery cell.

In addition, in a device installed on a human head, for example, a head mounted display (also referred to as HMD) or a spectacle type device, the weight of the battery or the weight balance due to the arrangement of the battery is emphasized. A spectacle-type device incorporating a plurality of batteries is disclosed in Patent Document 2.

Also, Patent Document 3 discloses a device that zooms in the field of view while observing an image with an HMD.

JP 2017-022928 A JP 2006-076475 A JP 2017-130190 A

The actual remaining capacity of a secondary battery can be obtained by discharging and detecting the secondary battery, but the device cannot be used if it is actually discharged. The remaining capacity is estimated from correlated parameters (battery voltage and integrated current). In addition, since the secondary battery uses a chemical reaction, it may be erroneous if the remaining capacity is instantaneously estimated based on a small amount of data.

In addition, since the internal resistance increases when the secondary battery deteriorates, the deteriorated secondary battery has a large terminal voltage during charging and a small terminal voltage during discharging. There is a difference. Therefore, it is an object to make the degree of deterioration uniform among a plurality of secondary batteries. Another object is to reduce a difference in terminal voltage between a plurality of secondary batteries used in an electronic device and reduce an unbalance between the secondary batteries.

An object of one embodiment of the present invention is to provide a novel battery management circuit, a power storage device, an electronic device, and the like.

Note that the problems of one embodiment of the present invention are not limited to the problems listed above. The problems listed above do not disturb the existence of other problems. Other issues are issues that are not mentioned in this section, as described in the following description. Problems not mentioned in this item can be derived from descriptions of the specification or drawings by those skilled in the art, and can be appropriately extracted from these descriptions. Note that one embodiment of the present invention solves at least one of the above-described problems and / or other problems.

¡Rather than charging the entire battery pack, the secondary batteries are selected and the secondary batteries are individually charged to reduce the unbalance between the secondary batteries. Conventionally, a plurality of secondary batteries have been controlled together. However, in the present invention, a plurality of secondary batteries, preferably two or more secondary batteries are individually controlled, so Reduce balance. In particular, when regenerative energy or the like is used in an electric vehicle or the like, repetitive charging increases. Therefore, a battery with little deterioration is preferentially charged, or the number of charging is increased. In addition, for a battery with great deterioration, the charging condition is changed to suppress the deterioration, and charging is stopped within a range where the battery is not fully charged. It is also effective in an electric vehicle equipped with a solar cell that repeatedly charges and an electric vehicle equipped with a power generation engine.

The current, voltage, temperature, etc. of the secondary battery are detected by a detecting element or sensor, and the state of charge (SOC) is calculated. Note that the SOC is also called a charging rate, and is defined by the ratio of the remaining capacity to the maximum capacity of the secondary battery. Ideally, it is desirable that the SOC of all the secondary batteries is the same as time progresses, but in reality, the more used, the more the imbalance based on individual differences within one assembled battery becomes It will expand. Therefore, information on individual secondary batteries is collected, and the degree of deterioration is analyzed using the first neural network (diagnosis, or in the future, the deterioration will increase and the difference between individuals will increase), Charge individual secondary batteries under optimal charging conditions. The optimal charging condition may be determined using the second neural network. The first neural network and the second neural network are preferably configured in separate microcomputers.

The invention disclosed in this specification includes an integrated circuit, a first secondary battery, and a second secondary battery, and the SOC (charge rate) of the secondary battery is 1% or more. Within 100% or less, charge / discharge is performed within an arbitrary fixed range (discharge lower limit voltage or more and charge upper limit voltage or less), and the integrated circuit is connected to the first secondary battery and the second secondary battery using a neural network. Diagnose the deterioration level, the integrated circuit detects the secondary battery with the higher level of deterioration, and the secondary battery with the higher level of deterioration is within a narrower range than the secondary battery with the lower level of deterioration. It is a charge control system that performs charging under a charging condition that provides a charging rate that fits. For example, the progress of deterioration is suppressed by selectively setting a lower charging upper limit voltage of a secondary battery having a higher degree of deterioration and charging at a lower charge rate.

In the above configuration, a charging condition that provides a charging rate that falls within a narrower range than the secondary battery having a smaller degree of deterioration may be determined using the second neural network.

In the above structure, the first secondary battery is electrically connected to the first switch, the second secondary battery is electrically connected to the second switch, and the first and second switches are Controlled by an integrated circuit. The integrated circuit has a memory for storing charge / discharge characteristic data correlated with SOC (charge rate). The integrated circuit includes a CPU (Central Processing Unit) and manages devices such as the entire electric vehicle. The CPU is not particularly limited as long as it can perform the necessary computation, and a GPU (Graphics Processing Unit) or an APU (Accelerated Processing Unit) may be used. Note that APU refers to a chip in which a CPU and a GPU are integrated.

The above configuration shows an example in which two secondary batteries are used, but there is no particular limitation, and the number of secondary batteries is 3 or more, or 100 or more, or 7000 or more and 10,000 or less. In an in-vehicle secondary battery, a service plug or a circuit breaker that can cut off a high voltage without using a tool is provided to cut off power from a plurality of secondary batteries. For example, when 48 battery modules having 2 to 10 cells are connected in series, a service plug or a circuit breaker is provided between the 24th battery module and the 25th battery module. . In order to control an individual secondary battery, an individual switch is provided. For example, the same number of IC chips (including switches) as the secondary battery are prepared, and one IC chip is electrically connected to one secondary battery.

Also, in a device installed on the human head, a plurality of secondary batteries are provided, and preferably two or more are individually controlled using a neural network, thereby reducing imbalance between the secondary batteries.

The invention disclosed in this specification includes a first display area, a second display area, an integrated circuit, a first secondary battery, and a second secondary battery, and includes a neural network. The integrated circuit uses the first secondary battery or the second secondary battery for deterioration analysis, and the secondary battery having the larger deterioration degree has a lower SOC than the secondary battery having the lower deterioration degree. It is an electronic device that charges in a narrow range.

In the above structure, the first secondary battery is electrically connected to the first switch, the second secondary battery is electrically connected to the second switch, and the first and second switches are Controlled by an integrated circuit. The integrated circuit has a memory for storing charge / discharge characteristic data correlated with the SOC.

In the above configuration, the first display area is the first display device, and the second display area is the second display device. By using independent display devices, the distance between the display device for the right eye and the display device for the left eye can be adjusted according to the eye position. In the case of an eyeglass-type device, the distance between human eyes, that is, the distance between pupils, has a width of about 50 mm to about 80 mm. Moreover, the information regarding an individual secondary battery can be collected by using an independent secondary battery, and it can charge separately by optimal charging conditions.

The above configuration shows an example in which two secondary batteries are used, but there is no particular limitation, and the number of secondary batteries is 3 or more, or 100 or more. In order to control an individual secondary battery, an individual switch is provided. For example, the same number of IC chips (including switches) as the secondary battery are prepared, and one IC chip is electrically connected to one secondary battery.

The invention disclosed in this specification includes a first display region, a second display region, a first integrated circuit, a second integrated circuit, a first secondary battery, and a second secondary battery. A first secondary battery is electrically connected to the first switch, a second secondary battery is electrically connected to the second switch, and the first switch is The second switch is an electronic device controlled by the second integrated circuit, and is controlled by the first integrated circuit.

In the above configuration, the electronic device may be an electronic device having an imaging device having a function of imaging a pupil. A change in the shape of the pupil can be detected based on the captured pupil shape. The integrated circuit may generate display data based on a change in setting according to a change in the shape of the pupil. Or an integrated circuit produces | generates the display data based on the change of the setting according to the motion of the head and the change of the shape of a pupil. Note that generation of display data in an integrated circuit involves processing in a circuit such as a processor, and therefore display data may be calculated and generated. The integrated circuit may generate display data that reduces drunkness of the user by viewing the display image of the display device, and may correct the display image of the display device.

In the above configuration, the first integrated circuit performs a deterioration analysis of the first secondary battery using a neural network, and the second integrated circuit performs a deterioration analysis of the second secondary battery using a neural network. Then, charging is performed in a range in which the SOC is narrower than that of the secondary battery having the smaller deterioration degree than the secondary battery having the larger deterioration degree.

In the above structure, the integrated circuit may include a transistor including an oxide semiconductor. In this specification and the like, a transistor in which an oxide semiconductor or a metal oxide is used for a channel formation region is referred to as an oxide semiconductor transistor or an OS transistor. The channel formation region of the OS transistor preferably includes a metal oxide.

In addition, in this specification and the like, a metal oxide is a metal oxide in a broad expression. Metal oxides are classified into oxide insulators, oxide conductors (including transparent oxide conductors), oxide semiconductors (also referred to as oxide semiconductors or simply OS), and the like. For example, in the case where a metal oxide is used for a semiconductor layer of a transistor, the metal oxide may be referred to as an oxide semiconductor. That is, when a metal oxide has at least one of an amplifying function, a rectifying function, and a switching function, the metal oxide can be referred to as a metal oxide semiconductor, or OS for short.

The metal oxide included in the channel formation region preferably contains indium (In). In the case where the metal oxide included in the channel formation region is a metal oxide containing indium, carrier mobility (electron mobility) of the OS transistor is increased. In addition, the metal oxide included in the channel formation region is preferably an oxide semiconductor containing the element M. The element M is preferably aluminum (Al), gallium (Ga), tin (Sn), or the like. Other elements applicable to the element M include boron (B), silicon (Si), titanium (Ti), iron (Fe), nickel (Ni), germanium (Ge), yttrium (Y), zirconium (Zr ), Molybdenum (Mo), lanthanum (La), cerium (Ce), neodymium (Nd), hafnium (Hf), tantalum (Ta), tungsten (W), and the like. However, the element M may be a combination of a plurality of the aforementioned elements. The element M is an element having a high binding energy with oxygen, for example. For example, it is an element whose binding energy with oxygen is higher than that of indium. The metal oxide included in the channel formation region is preferably a metal oxide containing zinc (Zn). A metal oxide containing zinc may be easily crystallized.

The metal oxide contained in the channel formation region is not limited to a metal oxide containing indium. The metal oxide contained in the channel formation region is, for example, zinc-tin oxide, gallium tin oxide, or the like, which does not contain indium, zinc-containing metal oxide, gallium-containing metal oxide, tin-containing metal oxide, etc. It does not matter.

Further, in the above configuration, the secondary battery having a higher degree of deterioration stops charging so as not to be fully charged at the time of charging, and the secondary battery having a lower degree of deterioration is fully charged at the time of charging. To maintain. The fully charged state means a state in which charging is performed until the voltage of the secondary battery that has started charging falls within the range of the charge end voltage. The state of charge is indicated by an SOC in which the charge amount is expressed as a ratio with respect to the capacity of the secondary battery.

Priority is given to charging or discharging a secondary battery with little deterioration, thereby making a difference between the secondary battery with high deterioration and the number of times it has been charged or the maintenance period of a fully charged state. As the number of times of charging increases, or the longer the fully charged state is maintained, the longer the deterioration, the more accelerated the deterioration. The difference is reduced, and the difference in the degree of deterioration between the secondary batteries is reduced.

Further, in the above configuration, the secondary battery having a higher degree of deterioration stops the discharge by increasing the discharge lower limit voltage so that the SOC (charge rate) does not become less than 30% at the time of discharging, and the degree of deterioration is small. The secondary battery is discharged until the SOC (charge rate) reaches less than 30%. These discharges are controlled by one switch or a plurality of switches.

The charge control method is also one of the inventions disclosed in this specification. Diagnose the degree of deterioration of the first secondary battery and the second secondary battery, and turn on the switch connected to one of the first secondary battery and the second secondary battery that is less deteriorated The first charging condition is fully charged, the switch connected to the other battery having a large deterioration is turned on, and charging is started under a second charging condition different from the first charging condition. Rate) Stop charging in the range of 50% to 80% and record the charging history.

In the above configuration, the second charging condition is determined by neural network processing. Neural network processing is a system that learns using a plurality of data. Alternatively, the second charging condition may be determined by selecting one of several predetermined charging conditions using a learning result obtained by using a neural network learned in advance.

Since some of the secondary batteries are not fully charged in the assembled battery, secondary batteries having different remaining capacities are used, and the voltage of the secondary battery having a low voltage is individually increased by the booster circuit. Also, information on individual secondary batteries is collected, and discharge is performed by selecting optimum conditions for the individual secondary batteries using the second neural network. For example, a secondary battery with low deterioration is used preferentially, and a secondary battery with high deterioration hardly uses (discharges or charges), and maintains capacity. By using the assembled battery so that the degree of deterioration between the batteries is the same, the imbalance between the secondary batteries is reduced.

If the temperature of the detected secondary battery is high, the cooling means such as the blower and the liquid circulation device is controlled. Further, if the temperature of the outside air is low and the temperature of the detected secondary battery is low, the temperature may be increased by controlling heating means such as a heater.

Connect the charging plug to the vehicle with the secondary battery and charge the secondary battery from the charging facility. The charging method includes a CHAdeMO method and a Combo method. Moreover, you may use a non-contact-type charging device. Power is exchanged from the transmitting coil to the receiving coil. Non-contact methods include a resonance method and an electromagnetic induction method.

Also, a charging control device is one aspect of the present invention. The charge control device includes: a first switch electrically connected to the first secondary battery; a second switch electrically connected to the second secondary battery; the first secondary battery; An integrated circuit for performing deterioration analysis or deterioration diagnosis or deterioration estimation of the second secondary battery, a neural network unit for determining a charging condition suitable for the deterioration state of the secondary battery, one secondary battery and the second second battery And a converter that boosts the smaller output voltage so that the output voltages of the secondary batteries are the same.

The difference in performance deterioration among a plurality of secondary batteries used in electronic devices can be reduced, and the unbalance between secondary batteries can be reduced. By connecting a plurality of secondary batteries in series or in parallel, the secondary battery can be efficiently used by reducing the unbalance of the secondary batteries, and the assembled battery can be used for a long time.

Also, by arranging a plurality of lightweight secondary batteries, the secondary battery can be built into the HMD or glasses-type device. Moreover, it becomes easy to adjust the weight balance of an electronic device by arrange | positioning a some secondary battery suitably.

In the case where some of the secondary batteries used in electronic devices have a short life, it was conventionally necessary to replace all the secondary batteries at the timing of replacement of the secondary battery with a short life. According to the invention, even if only one is replaced, the charging condition is adjusted by a microprocessor capable of performing neural network calculation individually, so that a long life is achieved even if there is a difference in the usage period of the secondary battery. be able to.

Also, a new battery management circuit can be realized.

Also, a new charge control system can be realized.

1 is an example of a block diagram illustrating one embodiment of the present invention. 6 is an example of a flowchart illustrating one embodiment of the present invention. 6 is an example of a flowchart illustrating one embodiment of the present invention. 6 is an example of a flowchart illustrating one embodiment of the present invention. The graph which shows an example of SOC, and the graph which shows a capacity | capacitance and a cycle. The figure which shows an example of a structure of a neural network. The figure which shows an example of a structure of a neural network. The figure which shows an example of a structure of a neural network. The block diagram which shows the structural example of a product-sum operation circuit. The circuit diagram which shows the structural example of a circuit. The timing chart which shows the operation example of a product-sum operation circuit. The figure which shows a cylindrical secondary battery. The figure explaining a coin-type secondary battery. The figure explaining a secondary battery. The figure explaining a secondary battery. The figure explaining a secondary battery. 10A and 10B each illustrate an example of an electronic device. 10A and 10B each illustrate an example of an electronic device. 10A and 10B each illustrate an example of an electronic device. 10A and 10B each illustrate an example of an electronic device. 4A and 4B are a top view and a schematic view illustrating one embodiment of the present invention. 10A and 10B each illustrate an electronic device. A graph showing capacity and cycle (comparative example).

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it will be easily understood by those skilled in the art that modes and details can be variously changed. In addition, the present invention is not construed as being limited to the description of the embodiments below.

(Embodiment 1)
FIG. 1A shows an example of a block diagram of a passenger car equipped with a plurality of secondary batteries, here two secondary batteries. Note that in FIG. 1A, for simplification, a seat, a door, a frame for increasing rigidity, and the like are not illustrated.

1A includes a secondary battery 301a, a secondary battery 301b, a boost converter 302, an inverter 303, a motor 305, a regenerative brake emphasis control valve 304, a tire 306, and the like.

The secondary battery 301a and the secondary battery 301b are lithium ion secondary batteries, and are provided with

switches

311a and 311b, respectively, and charging or discharging can be controlled using a plurality of switches. The switch is controlled by the first ECU.

The exchange of electric power between the regenerative brake emphasis control valve 304 and the secondary battery 301a (or the secondary battery 301b) is controlled by an ECU (first ECU or second ECU). In FIG. 1A, a range controlled by the ECU is surrounded by a dotted line. The ECU indicates an electronic control unit and is a kind of integrated circuit such as a microcomputer. The first ECU may be composed of an LSI (Large Scale Integrated Circuit) manufactured by being integrated on one chip. Further, the integration method is not limited to LSI, and may be realized by a dedicated circuit or a general-purpose processor. Further, an FPGA (Field Programmable Gate Array) that can be programmed after manufacturing the LSI or a reconfigurable processor that can reconfigure the connection and setting of the circuit cells inside the LSI may be used.

During the traveling of the passenger car, the power supplied from the secondary battery is supplied to the motor 305 via the boost converter 302 and the inverter 303. The motor 305 rotates the tire 306 to move the passenger car. When the brake is used, regenerative energy is collected and the secondary battery is charged via the second ECU and the first ECU. In charging, the charging destination can be determined by switching the

switches

311a and 311b in consideration of the degree of deterioration.

In this embodiment, the deterioration state of a plurality of secondary batteries is analyzed (or diagnosed or estimated) while the passenger car is running using a neural network. If the SOC is 30% or more, the switch is turned on and the power consumption is reduced. Supply. For the secondary battery in which the SOC is discharged to less than 30%, the power supply to the motor is stopped by turning off the switch. Alternatively, the secondary battery in which the SOC is discharged to less than 30% is switched on to preferentially start charging from the regenerative brake. Further, the secondary battery having a small degree of deterioration is switched on to preferentially start charging from the regenerative brake.

Analyzing (or diagnosing or inferring) the secondary battery's deterioration state using a neural network, and when charging a secondary battery with relatively high deterioration based on the secondary battery with the lowest deterioration, Control so as not to become. For example, in FIG. 1A, when the secondary battery 301b is more deteriorated than the secondary battery 301a in the middle of charging, the switch 311a of the secondary battery 301a is turned on to continue charging, and the fully charged state Then, by turning off the switch 311b of the secondary battery 301b, the charging can be stopped and the fully charged state can be prevented.

Here, an example of the charging operation of the charging control system in the present embodiment will be described with reference to the drawings. FIG. 2 is a flowchart showing a charging operation while the vehicle is stopped. Here, an example in which a microprocessor capable of performing neural network processing is mounted on the ECU is shown. The microprocessor built in the ECU of the passenger car may have an analog product-sum operation circuit. Details of the analog product-sum operation circuit will be described in a later embodiment. Note that a microprocessor capable of performing neural network processing can be configured without using an analog product-sum operation circuit.

First, an external power source (single-phase AC200V or three-phase AC200V, etc.) and a plug are electrically connected using a charging cable, and the microprocessor of the first ECU provides information such as the remaining capacity (SOC) of the secondary battery. Obtained automatically (S1). As a method for measuring the remaining capacity of the secondary battery, there are a detection method by a voltage method, a detection method by an integration method, and the like. The detection of SOC based on a physical model involves a model that relies on variables such as current, voltage, internal temperature, no-load voltage, external temperature, impedance, and the like. The method for detecting the SOC is coulometry.

Next, the microprocessor of the first ECU performs neural network processing to diagnose the degree of deterioration of the first and second secondary batteries (S2). The secondary battery deterioration degree diagnosis refers to the time series data of the reference secondary battery SOC (for example, SOC at the time of shipment) and the time series data of the SOC after using the secondary battery to determine the degree of deterioration. It is to be. In the present embodiment, as a result, the degree of deterioration is calculated (S4). In the diagnosis of the degree of deterioration of the secondary battery, a charging profile may be inferred from the transition of the charging voltage after the start of charging, and the degree of deterioration may be diagnosed from the inferred charging capacity. For neural network processing that pre-learns the correlation between the charging rate of the secondary battery as a reference and parameters (current value, voltage value, internal impedance, temperature, etc.) in advance, input the parameters to input The degree of deterioration can be diagnosed by estimating the SOC of the secondary battery and comparing it with the SOC at the time of shipment of the target secondary battery. Further, the deterioration degree may be diagnosed not by comparing with the SOC at the time of shipment but by comparing with other secondary batteries. For the neural network processing, various known neural network calculation methods can be used.

When comparing the first secondary battery and the second secondary battery that have been charged the same number of times, the deterioration of either one has progressed. A threshold value may be provided to determine the degree of deterioration of the secondary battery.

A secondary battery with great deterioration turns on the first charge switch (S5). Then, charging is started (S6), and charging is stopped before the fully charged state is reached. The first charging switch is turned off to stop charging (S7). The secondary battery having a large deterioration is charged so that the SOC is in the range of 50% to 80% (S8). The degree of deterioration and the charge history are stored in a memory or the like (S10), and the data can be referred to as a past charge history (S3) when calculating the degree of deterioration (also called the degree of deterioration). The rechargeable secondary battery is charged in such a series of flows.

On the other hand, a secondary battery with little deterioration is charged normally. In FIG. 2, the second charging switch is turned on (S5), charging is started (S6), and the process is terminated (S9) when the fully charged state is reached. Then, the second charging switch is turned off (S11). Charging of the secondary battery with small deterioration is performed in such a series of flows. Note that the first charging switch and the second charging switch correspond to the

switches

311a and 311b in FIG.

Here, an example of the discharge operation and the charge operation of the charge control system in the present embodiment will be described with reference to the drawings. FIG. 3 and FIG. 4 are examples of flowcharts showing a discharge operation and a charge operation during the start of travel and travel of a passenger car equipped with a plurality of secondary batteries. Note that regenerative energy or a power generation engine is used as a power supply to the secondary battery during the charging operation while the passenger car is running.

First, a switch installed between the power supply circuit and the secondary battery is turned on (S1). Power is supplied from the secondary battery to the power supply circuit (S2).

Next, the secondary battery voltage check (S3) is performed, and the SOCs of the plurality of secondary batteries are respectively determined (S4). If the SOCs of the plurality of secondary batteries are equal to or greater than the threshold value, the voltage of the secondary battery is determined. A difference is detected (S5). In addition, if the voltage of a secondary battery is less than a threshold value, it will be set as charge operation. For example, the determination of the SOC (S4) is performed by a comparison circuit in which a threshold value is determined in advance and the data is stored in a memory.

Next, the secondary battery having the maximum voltage among the plurality of secondary batteries is detected, and the voltage difference between the secondary battery having the maximum voltage and the other secondary battery is detected (S5). However, a plurality of secondary batteries to be used have different voltages. In this embodiment, since there are at least two types of secondary batteries that are in a fully charged state and secondary batteries that are not in a fully charged state in order to suppress deterioration, a discharge operation using secondary batteries having different voltages It becomes. Therefore, at the time of discharging, the secondary battery is used by boosting to the intended voltage using a DCDC converter or the like at a boosting rate corresponding to the voltage of each secondary battery.

In the case of a secondary battery having a small voltage difference from the secondary battery having the maximum voltage (that is, a secondary battery having a large voltage), a normal secondary battery is used. The boosting rate is calculated (S6), the connection with the booster circuit is turned on (S7), and boosting is started (S8). Then, the switch for controlling the power supply is turned on (S9), the power supply to the circuit is started (S10), the passenger car is run, the vehicle is stopped, and the power supply to the circuit is stopped. Neural network processing may be used to calculate the boosting rate and the like.

Then, the secondary battery voltage check (S11) is performed for the second time, the second SOC is determined (S12), and if there is sufficient remaining capacity, the power supply stop instruction (S13) to the circuit is not issued. The power supply to the circuit is continued (S14), and after a predetermined time, the voltage check is performed again, and the process is repeated until the discharge is no longer possible. When the remaining capacity of the secondary battery runs out, power supply to the circuit is stopped (S15), and charging is performed if necessary.

A secondary battery having a medium voltage difference from the secondary battery having the maximum voltage is substantially the same as the secondary battery having a small voltage difference except that the remaining capacity is different. However, detailed description is omitted here.

Also, in the case of a secondary battery having a large voltage difference from the secondary battery having the maximum voltage, that is, a small remaining capacity, the flowchart is almost the same as that of the secondary battery having a small voltage difference. However, detailed description is omitted here. In this way, the secondary batteries are used with different voltages, and the boosting rates are also different.

Any secondary battery is switched to a charging operation (charging mode) if the SOC calculation result is out of a discharge permission range.

When switching to the charging mode, the charging end voltage is read with reference to the past charging history (S16). Since the charging history of each secondary battery is different, the numerical value of the end-of-charge voltage is also different. The end-of-charge voltage of each secondary battery may be determined using neural network processing.

Then, start charging (S18) to obtain a charging profile. The degree of deterioration of the battery can be diagnosed by comparing the charging profiles. Then, feedback (S19) is performed on the charging history, and the deterioration degree of each secondary battery is recorded in a memory or the like.

Then, the charging switch is turned off (S20) at the stage where the charging end voltage that has been set in advance is reached by continuing charging.

Then, the inference of leveling the deterioration variation of the plurality of batteries is performed, and the charging upper limit voltage (upper limit SOC) of all the batteries is reset (S21). For the reasoning of leveling, neural network processing may be used.

For example, if a secondary battery with a high degree of deterioration is generated and used as it is, the stop of the running operation is accelerated or the deterioration is accelerated, so that only the secondary battery is switched to the charging mode. Then, the charging switch is turned on (S17), and charging by the regenerative brake is started (S18). In addition, it is preferable that the charging by the regenerative brake is not a rapid charging but a charging condition that hardly deteriorates. As charging conditions that are difficult to deteriorate, the charge / discharge rate, end-of-charge voltage, temperature, and charging method (constant voltage charging method, constant current charging method, constant voltage constant current charging method), etc., are determined using neural network processing. Good. Moreover, it is preferable that the secondary battery having a large degree of deterioration is set to have a low end-of-charge voltage so as not to be fully charged. For example, for a secondary battery with a high degree of deterioration, the end-of-charge voltage is set so that the SOC is in the range of 50% to 80%.

When operated in this way, the number of times of use of a secondary battery that has deteriorated early is limited, and after a certain period of use, the degree of deterioration of a secondary battery that has deteriorated early is different from that of other secondary batteries. It can be leveled to the same extent.

1A is an example in which regenerative energy is obtained by braking or deceleration, but FIG. 1B is one of the modifications. Since a power generation engine 307 using gasoline and a power generation motor 308 are provided, and energy can be obtained by appropriately generating power, if a secondary battery in which SOC is discharged to less than 30% is detected. The secondary battery can be charged with priority, and deterioration can be reduced.

Further, the passenger car shown in FIG. 1B has three secondary batteries, and has

switches

311a, 311b, and 311c for driving the motor, and power generation switches 311d, 311e, and 311f.

Also, a secondary battery that is optimal for the load of the circuit to be operated may be used and leveled so that the degree of deterioration is the same.

For example, in FIG. 1B, the secondary battery 301a is the A-rank product with the least deterioration, the secondary battery 301c is the C-rank product with the greatest deterioration, and the secondary battery 301b is moderately deteriorated. It is assumed that the product is a B rank product.

FIG. 23 shows the cycle characteristics of these three secondary batteries. As shown in FIG. 23, the secondary battery 301c is the most deteriorated and the unbalance increases.

Therefore, the secondary battery 301a is operated within the SOC range as shown in FIG. 5A, the secondary battery 301b is operated within the SOC range as shown in FIG. 5B, and the secondary battery 301c is operated. 5 is operated within the SOC range as shown in FIG. 5C, the deterioration of the secondary battery 301a is promoted, and the deterioration of the secondary battery 301c is slowed down as shown in FIG. 5D. It is also possible to arrange the degree of. 5A, FIG. 5B, FIG. 5C, and FIG. 5D show an example. In an actual device, the designer determines the allowable use range of the SOC. For example, when the SOC is 20% or more and 80% or less and the SOC is less than 20%, the power supply from the secondary battery is cut off. .

Since the use method (discharge or charge) of such a secondary battery is complicated, the microprocessor of the ECU performs the second neural network process, and the optimum charging condition and the optimum discharging condition for each secondary battery. It is desirable to select the so that the degree of deterioration between the secondary batteries is uniform.

In addition to calculating the degree of deterioration of a secondary battery, if a secondary battery that exhibits abnormal behavior occurs, the secondary battery is detected and turned off so that it is not used. Do not charge or discharge the battery. By doing so, a safe control system can be realized. In addition, by using various data, it is possible to construct a neural network process capable of inferring the occurrence of a secondary battery exhibiting abnormal behavior, and to cope with or warn in advance.

(Embodiment 2)
In the present embodiment, an example of the configuration of the neural network NN and a specific example of an analog product-sum operation circuit applicable to the neural network will be described.

Embodiments described below include the use of dedicated or general purpose computers, including various computer hardware or software. Also, the embodiments described below in this specification can be implemented using a computer-readable recording medium. The recording medium may also include RAM, ROM, or optical disks, magnetic disks, or any other storage medium that can be accessed by a computer. Further, algorithms, components, flows, programs, and the like shown as examples in the embodiments described below in this specification can be executed in software or a combination of hardware and software.

FIG. 6 shows an example of a neural network according to one embodiment of the present invention. The neural network NN shown in FIG. 6 has an input layer IL, an output layer OL, and a hidden layer (intermediate layer) HL. The neural network NN can be configured by a neural network having a plurality of hidden layers HL, that is, a deep neural network. Note that learning in a deep neural network is sometimes called deep learning. The output layer OL, the input layer IL, and the hidden layer HL each have a plurality of neuron circuits, and neuron circuits provided in different layers are connected via a synapse circuit.

In the neural network NN, a function of analyzing the operation of the storage battery is added by learning. When the measured storage battery parameters are input to the neural network NN, arithmetic processing is performed in each layer. Arithmetic processing in each layer is executed by a sum-of-products operation between the output data of the neuron circuit included in the previous layer and the weighting coefficient. The coupling between layers may be a total coupling in which all the neuron circuits are coupled, or a partial coupling in which some neuron circuits are coupled.

For example, a convolutional neural network (CNN) in which only a specific neuron circuit has a connection between adjacent layers and has a convolutional layer and a pooling layer may be used.

The convolved data is converted by the activation function and then output to the pooling layer. As the activation function, ReLU (Rectified Linear Unit) or the like can be used. ReLU is a function that outputs “0” when the input value is negative, and outputs the input value as it is when the input value is “0” or more. Moreover, a sigmoid function, a tanh function, etc. can also be used as an activation function.

CNN performs feature extraction by the above convolution processing and pooling processing. The CNN can be composed of a plurality of convolution layers and a plurality of pooling layers.

For example, after several layers of convolution layers and pooling layers are alternately arranged, it is preferable that the entire bonding layer is arranged.

The configuration example of the neural network NN illustrated in FIG. 7A may be referred to as a recurrent neural network (RNN). In the neural network shown in FIG. 7A, the output of the hidden layer HL is input (returned) to itself by the hidden layer HL having a feedback path. By using RNN, it is possible to analyze time-series data and estimate data to be acquired in the future. As time-series data, the cycle characteristics and charge / discharge characteristics of the secondary battery are used. For example, in the neural network processing of one embodiment of the present invention, the degree of deterioration of the secondary battery may be estimated with high accuracy.

FIG. 7B is a simplified representation of RNN at time T = T (x). The weighting factor from the input layer IL to the hidden layer HL is expressed as Win, the weighting factor from the hidden layer HL to the output layer OL is expressed as Wout, and the weighting factor of feedback from the hidden layer HL is expressed as Wr.

As shown in FIG. 7C, the RNN expands with time so that different layers (input layer IL (1) to input layer in time T (1) to time T (x) in FIG. 7) are obtained. IL (x), hidden layer HL (1) to hidden layer HL (x), and output layer OL (1) to output layer OL (x)). By expanding the RNN over time, it can be regarded as a forward propagation network having no feedback path as shown in FIG.

In addition, as a neural network, a configuration called a Long Short-Term Memory (LSTM: long / short-term memory) can be used. The LSTM can store a state when the hidden layer has memory cells in the RNN, and can perform analysis, for example, estimation for a longer time.

A configuration example of the neural network NN having a learning function will be described. A configuration example of the neural network NN is shown in FIG. The neural network NN includes a neuron circuit NC and a synapse circuit SC provided between the neuron circuits.

FIG. 8A shows a configuration example of the neuron circuit NC and the synapse circuit SC constituting the neural network NN. Input data x _{1 to} x _L (L is a natural number) is input to the synapse circuit SC. The synapse circuit SC has a function of storing a weight coefficient w _k (k is an integer of 1 or more and L or less). The weighting factor w _k corresponds to the strength of the connection between the neuron circuits NC.

When the input data x _{1 to} x _L are input to the synapse circuit SC, the neuron circuit NC has a product of the input data x _k input to the synapse circuit SC and the weight coefficient w _k stored in the synapse circuit SC. (X _k w _k ) is obtained by adding the values of k = 1 to L (x ₁ w ₁ + x ₂ w ₂ +... + X _L w _L ), that is, by product-sum operation using x _k and w _k. The supplied value is supplied. When this value exceeds the threshold value θ of the neuron circuit NC, the neuron circuit NC outputs a high level signal y. This phenomenon is called firing of the neuron circuit NC.

FIG. 8B shows a model of a neural network NN that forms a hierarchical persetron using the neuron circuit NC and the synapse circuit SC. The neural network NN has an input layer IL, a hidden layer (intermediate layer) HL, and an output layer OL.

Input data x _{1 to} x _L are output from the input layer IL. The hidden layer HL has a hidden synapse circuit HS and a hidden neuron circuit HN. The output layer OL has an output synapse circuit OS and an output neuron circuit ON.

The hidden neuron circuit HN is supplied with a value obtained by a product-sum operation using the input data x _k and the weighting coefficient w _k held in the hidden synapse circuit HS. The output neuron circuit ON is supplied with the value obtained by the product-sum operation using the output of the hidden neuron circuit HN and the weighting coefficient w _k held in the output synapse circuit OS. Then, output data y _{1 to} y _L are output from the output neuron circuit ON.

As described above, the neural network NN given the predetermined input data outputs, as output data, values corresponding to the weighting coefficient held in the synapse circuit SC and the threshold value θ (θ _H , θ _O ) of the neuron circuit. Has the function of

Also, the neural network NN can perform supervised learning by inputting teacher data. FIG. 8C shows a model of the neural network NN that performs supervised learning using the error back propagation method.

The error back propagation method is a method of changing the weight coefficient of the synapse circuit so that the error between the output data of the neural network and the teacher signal becomes small. Specifically, the weighting factor w _k of the hidden synapse circuit HS is changed according to the error δ _O determined based on the output data y _{1 to} y _L and the teacher data t _{1 to} t _L. Further, in accordance with the change amount of the weighting coefficient w _k of the hidden synapse circuit HS, further weighting factor w _k of the preceding stage of the synapse circuit SC is changed. As described above, the neural network NN can be learned by sequentially changing the weighting coefficient of the synapse circuit SC based on the teacher data t _{1 to} t _L.

8B and 8C show one hidden layer HL, the number of hidden layers HL can be two or more. Deep learning can be performed by using a neural network having two or more hidden layers HL (deep neural network (DNN)). Thereby, the precision of calculation of the deterioration degree of a secondary battery can be improved. Further, the accuracy of calculation of the degree of deterioration of the secondary battery may be increased by an algorithm combining deep learning and reinforcement learning (Q learning).

As described in FIG. 7C, the RNN can be regarded as a forward-propagation network without a feedback path by time-expanding. In the forward propagation network, the weighting coefficient can be changed based on the teacher data using the error back propagation method described above.

6 to 8 are executed by a huge number of product-sum operations. The product-sum operation is preferably performed by an analog product-sum operation circuit (hereinafter referred to as APS (Analog Product-Sum circuit)). The APS preferably has an analog memory. By storing the weighting coefficient obtained by learning in the analog memory, the APS can execute a product-sum operation with analog data. As a result, an APS can efficiently construct a neural network with a small number of transistors.

FIG. 9 shows a configuration example of the product-sum operation circuit. The product-sum operation circuit MAC shown in FIG. 9 is a circuit that performs a product-sum operation on first data held in a memory cell to be described later and input second data. The first data and the second data can be analog data or multi-value data (discrete data).

The product-sum operation circuit MAC includes a current source circuit CS, a current mirror circuit CM, a circuit WDD, a circuit WLD, a circuit CLD, an offset circuit OFST, an activation function circuit ACTV, and a memory cell array CA.

The memory cell array CA includes a memory cell AM [1], a memory cell AM [2], a memory cell AMref [1], and a memory cell AMref [2]. The memory cell AM [1] and the memory cell AM [2] have a role of holding the first data, and the memory cell AMref [1] and the memory cell AMref [2] are for performing a product-sum operation. It has a function to hold necessary reference data. The reference data can also be analog data or multi-valued data (discrete data), like the first data and the second data.

The memory cell array CA of FIG. 9 has two memory cells in the row direction and two in the column direction, which are arranged in a matrix. However, the memory cell array CA has three or more memory cells in the row direction. It is good also as a structure arrange | positioned at 3 or more in the direction of a matrix. Further, when performing multiplication instead of product-sum operation, the memory cell array CA may have a configuration in which one memory cell is arranged in a matrix in the row direction and two or more in the column direction.

The memory cell AM [1], the memory cell AM [2], the memory cell AMref [1], and the memory cell AMref [2] each include a transistor Tr11, a transistor Tr12, and a capacitor C1. .

Note that the transistor Tr11 is preferably an OS transistor.

In addition, by using an OS transistor as the transistor Tr12, the transistor Tr11 can be manufactured at the same time, and thus the product-sum operation circuit manufacturing process may be shortened. Further, the channel formation region of the transistor Tr12 may be made of amorphous silicon, polycrystalline silicon, or the like instead of oxide.

In each of the memory cell AM [1], the memory cell AM [2], the memory cell AMref [1], and the memory cell AMref [2], the first terminal of the transistor Tr11 is electrically connected to the gate of the transistor Tr12. Connected. A first terminal of the transistor Tr12 is electrically connected to the wiring VR. The first terminal of the capacitor C1 is electrically connected to the gate of the transistor Tr12.

In the memory cell AM [1], the second terminal of the transistor Tr11 is electrically connected to the wiring WD, and the gate of the transistor Tr11 is electrically connected to the wiring WL [1]. A second terminal of the transistor Tr12 is electrically connected to the wiring BL, and a second terminal of the capacitor C1 is electrically connected to the wiring CL [1]. In FIG. 9, in the memory cell AM [1], the connection point between the first terminal of the transistor Tr11, the gate of the transistor Tr12, and the first terminal of the capacitor C1 is a node NM [1]. In addition, the current flowing from the wiring BL to the second terminal of the transistor Tr12 and _{I AM [1].}

In the memory cell AM [2], the second terminal of the transistor Tr11 is electrically connected to the wiring WD, and the gate of the transistor Tr11 is electrically connected to the wiring WL [2]. A second terminal of the transistor Tr12 is electrically connected to the wiring BL, and a second terminal of the capacitor C1 is electrically connected to the wiring CL [2]. In FIG. 9, in the memory cell AM [2], a connection point between the first terminal of the transistor Tr11, the gate of the transistor Tr12, and the first terminal of the capacitor C1 is a node NM [2]. In addition, a current flowing from the wiring BL to the second terminal of the transistor Tr12 is denoted as IAM _[2] .

In the memory cell AMref [1], the second terminal of the transistor Tr11 is electrically connected to the wiring WDref, and the gate of the transistor Tr11 is electrically connected to the wiring WL [1]. A second terminal of the transistor Tr12 is electrically connected to the wiring BLref, and a second terminal of the capacitor C1 is electrically connected to the wiring CL [1]. In FIG. 9, in the memory cell AMref [1], a connection point between the first terminal of the transistor Tr11, the gate of the transistor Tr12, and the first terminal of the capacitor C1 is a node NMref [1]. In addition, a current flowing from the wiring BLref to the second terminal of the transistor Tr12 is _denoted as I _{AMref [1]} .

In the memory cell AMref [2], the second terminal of the transistor Tr11 is electrically connected to the wiring WDref, and the gate of the transistor Tr11 is electrically connected to the wiring WL [2]. A second terminal of the transistor Tr12 is electrically connected to the wiring BLref, and a second terminal of the capacitor C1 is electrically connected to the wiring CL [2]. In FIG. 9, in the memory cell AMref [2], a connection point between the first terminal of the transistor Tr11, the gate of the transistor Tr12, and the first terminal of the capacitor C1 is a node NMref [2]. In addition, a current flowing from the wiring BLref to the second terminal of the transistor Tr12 is _denoted as I _{AMref [2]} .

The node NM [1], the node NM [2], the node NMref [1], and the node NMref [2] described above function as holding nodes for the respective memory cells.

The wiring VR allows a current to flow between the first terminal and the second terminal of each of the transistors Tr12 of the memory cell AM [1], the memory cell AM [2], the memory cell AMref [1], and the memory cell AMref [2]. Wiring. Therefore, the wiring VR functions as a wiring for applying a predetermined potential. Note that in this embodiment, the potential provided by the wiring VR is a reference potential or a potential lower than the reference potential.

The current source circuit CS is electrically connected to the wiring BL and the wiring BLref. The current source circuit CS has a function of supplying current to the wiring BL and the wiring BLref. Note that the amount of current supplied to each of the wiring BL and the wiring BLref may be different from each other. In this configuration example, the current flowing from the current source circuit CS to the wiring BL is I _C , and the current flowing from the current source circuit CS to the wiring BLref is I _Cref .

The current mirror circuit CM includes a wiring IE and a wiring IEref. The wiring IE is electrically connected to the wiring BL. In FIG. 9, the connection portion between the wiring IE and the wiring BL is illustrated as a node NP. The wiring IEref is electrically connected to the wiring BLref. In FIG. 9, a connection point between the wiring IEref and the wiring BLref is a node NPref. The current mirror circuit CM has a function of discharging a current corresponding to the potential of the node NPref from the node NPref of the wiring BLref to the wiring IEref and discharging the same amount of current as the current from the node NP of the wiring BL to the wiring IE. Have. In FIG. 9, the current discharged from the node NP to the wiring IE and the current discharged from the node NPref to the wiring IEref are denoted as I _CM . In addition, the wiring BL, the current flowing from the current mirror circuit CM in the memory cell array CA marked _{I B,} in the wiring BLref, mark the current flowing from the current mirror circuit CM in the memory cell array CA and _{I Bref.}

The circuit WDD is electrically connected to the wiring WD and the wiring WDref. The circuit WDD has a function of transmitting data to be stored in each memory cell included in the memory cell array CA.

The circuit WLD is electrically connected to the wiring WL [1] and the wiring WL [2]. The circuit WLD has a function of selecting a memory cell to which data is written when data is written to a memory cell included in the memory cell array CA.

The circuit CLD is electrically connected to the wiring CL [1] and the wiring CL [2]. The circuit CLD has a function of applying a potential to the second terminal of the capacitor C1 of each memory cell included in the memory cell array CA.

The circuit OFST is electrically connected to the wiring BL and the wiring OE. The circuit OFST has a function of measuring the amount of current flowing from the wiring BL to the circuit OFST and / or the amount of change in current flowing from the wiring BL to the circuit OFST. In addition, the circuit OFST has a function of outputting the measurement result to the wiring OE. Note that the circuit OFST may have a configuration in which the measurement result is directly output as a current to the wiring OE, or may be converted into a voltage and output to the wiring OE. In FIG. 9, a current flowing from the wiring BL to the circuit OFST is denoted as I _α .

For example, the circuit OFST can be configured as shown in FIG. In FIG. 10, the circuit OFST includes a transistor Tr21, a transistor Tr22, a transistor Tr23, a capacitor C2, and a resistor R.

The first terminal of the capacitive element C2 is electrically connected to the wiring BL, and the first terminal of the resistance element R is electrically connected to the wiring BL. The second terminal of the capacitor C2 is electrically connected to the first terminal of the transistor Tr21, and the first terminal of the transistor Tr21 is electrically connected to the gate of the transistor Tr22. The first terminal of the transistor Tr22 is electrically connected to the first terminal of the transistor Tr23, and the first terminal of the transistor Tr23 is electrically connected to the wiring OE. Note that an electrical connection point between the first terminal of the capacitor element C2 and the first terminal of the resistor element R is a node Na, the second terminal of the capacitor element C2, the first terminal of the transistor Tr21, and the transistor Tr22. An electrical connection point with the gate is a node Nb.

The second terminal of the resistance element R is electrically connected to the wiring VrefL. The second terminal of the transistor Tr21 is electrically connected to the wiring VaL, and the gate of the transistor Tr21 is electrically connected to the wiring RST. A second terminal of the transistor Tr22 is electrically connected to the wiring VDDL. A second terminal of the transistor Tr23 is electrically connected to the wiring VSSL, and a gate of the transistor Tr23 is electrically connected to the wiring VbL.

The wiring VrefL is a wiring that applies a potential Vref, the wiring VaL is a wiring that applies a potential Va, and the wiring VbL is a wiring that applies a potential Vb. The wiring VDDL is a wiring that applies the potential VDD, and the wiring VSSL is a wiring that supplies the potential VSS. In particular, in the configuration example of the circuit OFST here, the potential VDD is a high level potential and the potential VSS is a low level potential. The wiring RST is a wiring that applies a potential for switching between the conductive state and the non-conductive state of the transistor Tr21.

In the circuit OFST shown in FIG. 10, the transistor Tr22, the transistor Tr23, the wiring VDDL, the wiring VSSL, and the wiring VbL constitute a source follower circuit.

In the circuit OFST shown in FIG. 10, a potential corresponding to the current flowing from the wiring BL and the resistance of the resistance element R is applied to the node Na by the resistance element R and the wiring VrefL.

An example of operation of the circuit OFST shown in FIG. 10 will be described. When a first current (hereinafter referred to as a first current) flows from the wiring BL, the resistance element R and the wiring VrefL cause the first current and the resistance of the resistance element R to correspond to the node Na. A potential is applied. At this time, the transistor Tr21 is turned on to apply the potential Va to the node Nb. Thereafter, the transistor Tr21 is turned off.

Next, when a second current (hereinafter referred to as a second current) flows from the wiring BL, similarly to when the first current flows, the resistance element R and the wiring VrefL cause the node Na to flow. In addition, a potential corresponding to the second current and the resistance of the resistance element R is applied. At this time, since the node Nb is in a floating state, the potential of the node Nb also changes due to capacitive coupling when the potential of the node Na changes. When the change in the potential of the node Na is ΔV _Na and the capacitive coupling coefficient is 1, the potential of the node Nb is Va + ΔV _Na . When the threshold voltage of the transistor Tr22 and the _{V th,} the potential Va + Δ _Na -V _th is output from the wiring OE. Here, the potential Va and the threshold voltage _{V th,} it is possible from the wiring OE outputs a potential [Delta] V _Na.

The potential ΔV _Na is determined according to the amount of change from the first current to the second current, the resistance element R, and the potential Vref. A resistive element R, and the potential Vref, is because it can be known, by using a circuit OFST shown in FIG. 10, it is possible to determine the amount of change current flowing from the potential [Delta] V _Na, the wiring BL.

The activation function circuit ACTV is electrically connected to the wiring OE and the wiring NIL. The activation function circuit ACTV receives the amount of change in current measured by the circuit OFST via the wiring OE. The activation function circuit ACTV is a circuit that performs an operation according to a predefined function system for the amount of change in the current. As the function system, for example, a sigmoid function, a tanh function, a softmax function, a ReLU function, a threshold function, and the like can be used, and these functions are applied as activation functions in the neural network.

<Operation example of product-sum operation circuit>
Next, an operation example of the product-sum operation circuit MAC will be described.

FIG. 11 shows a timing chart of an operation example of the product-sum operation circuit MAC. The timing chart of FIG. 11 includes the wiring WL [1], the wiring WL [2], the wiring WD, the wiring WDref, and the node from time T01 to time T09. NM [1], a node NM [2], a node NMref [1], a node NMref [2], a wiring CL [1], and a wiring CL [2], which show potential fluctuations, a current I _B −I _α , and It shows the variation of the magnitude of the current _{I Bref.} In particular, the current I _B -I _α indicates the sum of currents flowing from the wiring BL to the memory cells AM [1] and AM [2] of the memory cell array CA.

<< From time T01 to time T02 >>
Between time T01 and time T02, a high-level potential (indicated as High in FIG. 11) is applied to the wiring WL [1], and a low-level potential (Low in FIG. 11) is applied to the wiring WL [2]. Is applied). In addition, a potential V _PR −V _{W [1]} larger than the ground potential (indicated as GND in FIG. 11) is applied to the wiring WD, and a potential V _PR larger than the ground potential is applied to the wiring WDref. Applied. Further, a reference potential (indicated as REFP in FIG. 11) is applied to each of the wiring CL [1] and the wiring CL [2].

Note that the potential V _{W [1]} is a potential corresponding to one of the first data. The potential _VPR is a potential corresponding to the reference data.

At this time, a high level potential is applied to the gates of the transistors Tr11 of the memory cells AM [1] and AMref [1], and the transistors of the memory cells AM [1] and AMref [1]. Tr11 becomes conductive, the potential of the node NM [1] becomes V _PR −V _{W [1]} , and the potential of the node NMref [1] becomes V _PR .

When the current flowing from the wiring BL to the first terminal through the second terminal of the transistor Tr12 of the memory cell AM [1] is IAM _{[1], 0} , _{IAM [1], 0} is expressed by the following equation. be able to.

Note that k is a constant determined by the channel length, the channel width, the mobility, the capacitance of the gate insulating film, and the like of the transistor Tr12. V _th is the threshold voltage of the transistor Tr12.

When the current flowing from the wiring BLref to the first terminal through the second terminal of the transistor Tr12 of the memory cell AMref [1] is _{IAMref [1], 0} , _{IAMref [1], 0} is It can be expressed by a formula.

Note that since a low-level potential is applied to the gates of the transistors Tr11 of the memory cells AM [2] and AMref [2], the memory cells AM [2] and AMref [2] The transistor Tr11 is turned off. Therefore, no potential is written to the node NM [2] and the node NMref [2].

<< From time T02 to time T03 >>
Between the time T02 and the time T03, the low-level potential is applied to the wiring WL [1]. At this time, since a low level potential is applied to the gates of the transistors Tr11 of the memory cells AM [1] and AMref [1], each of the memory cells AM [1] and AMref [1] The transistor Tr11 is turned off.

Further, the low-level potential is continuously applied to the wiring WL [2] from before time T02. For this reason, each transistor Tr11 of the memory cell AM [2] and the memory cell AMref [2] is in a non-conducting state before the time T02. Accordingly, the potentials of the node NM [1], the node NM [2], the node NMref [1], and the node NMref [2] are held between the time T02 and the time T03. By applying an OS transistor to the transistor Tr11, leakage current flowing between the first terminal and the second terminal of the transistor Tr11 can be reduced, so that the potential of each node can be held for a long time. Since the ground potential is applied to the wiring WD and the wiring WDref and the transistor Tr11 is in a non-conductive state, the potential held in the node is applied by the application of the potential from the wiring WD and the wiring WDref. It will not be rewritten.

<< From time T03 to time T04 >>
Between time T03 and time T04, the low-level potential is applied to the wiring WL [1], and the high-level potential is applied to the wiring WL [2]. In addition, a potential V _PR −V _{W [2]} larger than the ground potential is applied to the wiring WD, and a potential V _PR larger than the ground potential is applied to the wiring WDref. Further, the reference potential is applied to the wiring CL [1] and the wiring CL [2] continuously from the time T02.

Note that the potential V _{W [2]} is a potential corresponding to one of the first data.

At this time, since a high level potential is applied to the gates of the transistors Tr11 of the memory cells AM [2] and AMref [2], the memory cells AM [2] and AMref [2] The transistor Tr11 becomes conductive, the potential of the node NM [2] is V _PR −V _{W [2]} , and the potential of the node NMref [2] is V _PR .

When the current flowing from the wiring BL to the first terminal through the second terminal of the transistor Tr12 of the memory cell AM [2] is IAM _{[2], 0} , _{IAM [2], 0} is expressed by the following equation. be able to.

When the current flowing from the wiring BLref to the first terminal through the second terminal of the transistor Tr12 of the memory cell AMref [2] is I _{AMref [2], 0} , similarly, I _{AMref [2], 0} It can be expressed by a formula.

<< From time T04 to time T05 >>
Here, a current flowing through the wiring BL and the wiring BLref from time T04 to time T05 is described.

A current from the current source circuit CS is supplied to the wiring BLref. In addition, current is discharged to the wiring BLref by the current mirror circuit CM, the memory cell AMref [1], and the memory cell AMref [2]. In the wiring BLref, when the current supplied from the current source circuit CS is I _Cref and the current discharged by the current mirror circuit CM is I _{CM, 0} , the following equation is established according to Kirchhoff's law.

In the wiring BL, when the current supplied from the current source circuit CS is I _{C, 0} and the current flowing from the wiring BL to the circuit OFST is I _{α, 0} , the following equation is established according to Kirchhoff's law.

<< From time T05 to time T06 >>
In the period from time T05 to time T06, _{V X [1]} high potential is applied than the reference potential to the wiring CL [1]. At this time, since the potential V _{X [1]} is applied to the second terminal of each capacitor C1 of the memory cell AM [1] and the memory cell AMref [1], the gate potential of the transistor Tr12 increases. .

Note that the potential V _{X [1]} is a potential corresponding to one of the second data.

Note that an increase in the gate potential of the transistor Tr12 is a potential obtained by multiplying the potential change of the wiring CL [1] by a capacitive coupling coefficient determined by the configuration of the memory cell. The capacitive coupling coefficient is calculated from the capacitance of the capacitive element C1, the gate capacitance of the transistor Tr12, and the parasitic capacitance. In this operation example, in order to avoid complicated explanation, the increase in the potential of the wiring CL [1] and the increase in the potential of the gate of the transistor Tr12 are described as the same value. This corresponds to the case where the respective capacitive coupling coefficients in the memory cell AM [1] and the memory cell AMref [1] are 1.

Since the capacitive coupling coefficient is 1, the potential V _{X [1]} is applied to the second terminal of each of the capacitive elements C1 of the memory cell AM [1] and the memory cell AMref [1], whereby the node NM [1] and the potential of the node NMref _[1] rise by V _{X [1]} , respectively.

Here, a current flowing from the second terminal to the first terminal of the transistor Tr12 of each of the memory cell AM [1] and the memory cell AMref [1] is considered. When the current flowing from the wiring BL to the first terminal through the second terminal of the transistor Tr12 of the memory cell AM [1] is IAM _{[1], 1} , _{IAM [1], 1} is expressed by the following equation. be able to.

That is, when the potential V _{X [1]} is applied to the wiring CL [1], the current flowing from the wiring BL to the first terminal through the second terminal of the transistor Tr12 of the memory cell AM [1] is I _{AM [ 1], 1−} I _{AM [1], 0} (indicated as ΔI _{AM [1] in} FIG. 11).

Similarly, when the current flowing from the wiring BLref to the first terminal via the second terminal of the transistor Tr12 of the memory cell AMref [1] is _{IAMref [1], 1} , _{IAMref [1], 1} is It can be expressed by a formula.

That is, by applying the potential V _{X [1]} to the wiring CL [1], the current flowing from the wiring BLref to the first terminal through the second terminal of the transistor Tr12 of the memory cell AMref [1] is I _{AMref [ 1], 1} −I _{AMref [1], 0} ( _indicated as ΔI _{AMref [1] in} FIG. 11).

In the wiring BLref, when the current discharged by the current mirror circuit CM is I _{CM, 1} , the following equation is established according to Kirchhoff's law.

In the wiring BL, when the current flowing from the wiring BL to the circuit OFST is I _{α, 1} , the following equation is established according to Kirchhoff's law.

Note that the current I _{α, 0} flowing from the wiring BL to the wiring OFST from time T04 to time T05 _, and the current I _{α, 1} flowing from the wiring BL to the wiring OFST from time T05 to time T06, Is the difference ΔI _α . Hereinafter, ΔI _α is referred to as a differential current in the product-sum operation circuit MAC. The differential current ΔI _α can be expressed as the following equation using the equations (E1) to (E10).

<< From time T06 to time T07 >>
Between time T06 and time T07, the reference potential is applied to the wiring CL [1]. At this time, since the reference potential is applied to the second terminal of each capacitor C1 of the memory cell AM [1] and the memory cell AMref [1], the nodes NM [1] and NMref [1] The potential returns to the potential between time T04 and time T05, respectively.

<< From time T07 to time T08 >>
Between time T07 and time T08, a potential V _{X [1]} higher than the reference potential is applied to the wiring CL [1], and a potential V _{X [2]} higher than the reference potential is applied to the wiring CL [2]. Is done. At this time, the potential V _{X [1]} is applied to the second terminal of each capacitor C1 of the memory cell AM [1] and the memory cell AMref [1], and the memory cell AM [2] and the memory cell AMref [ potential _{V X [2]} is applied to each of the second terminal of the capacitor C1 of 2]. Therefore, the gate potentials of the transistors Tr12 of the memory cell AM [1], the memory cell AM [2], the memory cell AMref [1], and the memory cell AMref [2] are increased.

When the current flowing from the wiring BL to the first terminal through the second terminal of the transistor Tr12 of the memory cell AM [2] is IAM _{[2], 1} , _{IAM [2], 1} is expressed by the following equation. be able to.

Similarly, when the current flowing from the wiring BLref to the first terminal via the second terminal of the transistor Tr12 of the memory cell AMref [2] is I _{AMref [2], 1} , I _{AMref [2], 1} It can be expressed by a formula.

In the wiring BLref, when the current discharged by the current mirror circuit CM is I _{CM, 2} , the following equation is established according to Kirchhoff's law.

In the wiring BL, when the current flowing from the wiring BL to the circuit OFST is I _{α, 3} , the following expression is established according to Kirchhoff's law.

The difference between the current I _{α, 0} flowing from the wiring BL to the wiring OFST from the time T04 to the time T05 and the current I _{α, 3} flowing from the wiring BL to the wiring OFST from the time T07 to the time T08. The differential current ΔI _α can be expressed as the following equation using the equations (E1) to (E8) and (E12) to (E15).

As shown in the equation (E16), the differential current ΔI _α input to the circuit OFST corresponds to the sum of the products of the plurality of first data potentials V _W and the plurality of second data potentials V _X. Value. That is, the sum of products of the first data and the second data can be obtained by measuring the differential current ΔI _α with the circuit OFST.

<< From time T08 to time T09 >>
A reference potential is applied to the wiring CL [1] and the wiring CL [2] from time T08 to time T09. At this time, the reference potential is applied to the second terminals of the respective capacitor elements C1 of the memory cell AM [1], the memory cell AM [2], the memory cell AMref [1], and the memory cell AMref [2]. , The potentials of the node NM [1], the node NM [2], the node NMref [1], and the node NMref [2] return to the potential between the time T06 and the time T07, respectively.

In the period from time T05 to time T06, and applying _{V X [1]} to the wiring CL [1], during the period from time T07 to time T08, the wiring CL [1] and the wiring CL [2], each _{V X [1]} and V _{X [2]} are applied, but the potential applied to the wiring CL [1] and the wiring CL [2] may be lower than the reference potential REFP. When a potential lower than the reference potential REFP is applied to the wiring CL [1] and / or the wiring CL [2], the memory cell connected to the wiring CL [1] and / or the wiring CL [2] The potential of the holding node can be lowered by capacitive coupling. Thereby, in the product-sum operation, the product of the first data and one of the second data having a negative value can be performed. For example, during the period from time T07 to time T08, the wiring CL _[2], the case of applying _{-V X [2]} rather than _{V X [2],} the differential current [Delta] I _alpha, expressed as the following formula be able to.

In this operation example, the memory cell array CA having the memory cells arranged in a matrix of 2 rows and 2 columns has been dealt with. However, the memory cell array CA having 1 row and 2 columns or more, or 3 rows and 3 columns and 3 columns. Similarly, the product-sum operation can be performed for the above memory cell array. In this case, the product-sum operation circuit uses one of the plurality of columns as a memory cell that holds the reference data (potential V _PR ), and simultaneously performs the product-sum operation processing on the remaining columns of the plurality of columns. be able to. That is, by increasing the number of columns of the memory cell array, an arithmetic circuit that realizes high-speed product-sum arithmetic processing can be provided. Further, by increasing the number of rows, the number of terms to be added in the product-sum operation can be increased. The differential current ΔIα when the number of rows is increased can be expressed by the following equation.

By the way, in the product-sum operation circuit described in this embodiment, the number of rows of memory cells AM is the number of neurons in the previous layer. In other words, the number of rows of the memory cells AM corresponds to the number of output signals of the neurons in the previous layer that are input to the next layer. The number of columns of the memory cells AM is the number of neurons in the next layer. In other words, the number of columns of the memory cells AM corresponds to the number of neuron output signals output from the next layer. That is, the number of rows and columns of the memory cell array of the product-sum operation circuit is determined by the number of neurons in the previous layer and the next layer, so the number of rows and columns of the memory cell array depends on the neural network to be configured. Can be determined.

Further, although an example in which a neural network is configured using a product-sum operation circuit in the present embodiment has been shown, the present invention is not particularly limited, and a neural network may be configured using parallel computation and GPU computing.

This embodiment mode can be combined with any of the other embodiment modes as appropriate.

(Embodiment 3)
In this embodiment, an example of a cylindrical secondary battery is described with reference to FIGS. As shown in FIG. 12A, the cylindrical secondary battery 600 has a positive electrode cap (battery cover) 601 on the top surface and a battery can (outer can) 602 on the side surface and the bottom surface. The positive electrode cap 601 and the battery can (outer can) 602 are insulated by a gasket (insulating packing) 610.

FIG. 12B is a diagram schematically showing a cross section of a cylindrical secondary battery. Inside the hollow cylindrical battery can 602, a battery element in which a strip-like positive electrode 604 and a negative electrode 606 are wound with a separator 605 interposed therebetween is provided. Although not shown, the battery element is wound around a center pin. The battery can 602 has one end closed and the other end open. For the battery can 602, a metal such as nickel, aluminum, titanium, or the like having corrosion resistance to the electrolytic solution, or an alloy thereof or an alloy of these with another metal (for example, stainless steel) can be used. . In order to prevent corrosion due to the electrolytic solution, it is preferable to coat nickel, aluminum, or the like. Inside the battery can 602, the battery element in which the positive electrode, the negative electrode, and the separator are wound is sandwiched between a pair of opposing insulating

plates

608 and 609. Further, a non-aqueous electrolyte (not shown) is injected into the inside of the battery can 602 provided with the battery element. As the non-aqueous electrolyte, the same non-aqueous electrolyte as that of a coin-type secondary battery can be used.

Since the positive electrode and the negative electrode used for the cylindrical storage battery are wound, it is preferable to form an active material on both surfaces of the current collector. A positive electrode terminal (positive electrode current collecting lead) 603 is connected to the positive electrode 604, and a negative electrode terminal (negative electrode current collecting lead) 607 is connected to the negative electrode 606. Both the positive electrode terminal 603 and the negative electrode terminal 607 can use a metal material such as aluminum. The positive terminal 603 is resistance-welded to the safety valve mechanism 612, and the negative terminal 607 is resistance-welded to the bottom of the battery can 602. The safety valve mechanism 612 is electrically connected to the positive electrode cap 601 via a PTC element (Positive Temperature Coefficient) 611. The safety valve mechanism 612 disconnects the electrical connection between the positive electrode cap 601 and the positive electrode 604 when the increase in the internal pressure of the battery exceeds a predetermined threshold value. The PTC element 611 is a heat-sensitive resistance element that increases in resistance when the temperature rises, and prevents abnormal heat generation by limiting the amount of current by increasing the resistance. For the PTC element, barium titanate (BaTiO ₃ ) -based semiconductor ceramics or the like can be used.

[Example of secondary battery structure]
Another structural example of the secondary battery will be described with reference to FIGS.

FIG. 13A is an external view of a coin-type (single-layer flat type) secondary battery, and FIG. 13B is a cross-sectional view thereof.

In the coin-type secondary battery 400, a positive electrode can 401 also serving as a positive electrode terminal and a negative electrode can 402 also serving as a negative electrode terminal are insulated and sealed with a gasket 403 formed of polypropylene or the like. The positive electrode 404 is formed by a positive electrode current collector 405 and a positive electrode active material layer 406 provided so as to be in contact therewith. The negative electrode 407 is formed of a negative electrode current collector 408 and a negative electrode active material layer 409 provided so as to be in contact therewith.

Note that in each of the positive electrode 404 and the negative electrode 407 used in the coin-type secondary battery 400, the active material layer may be formed only on one side.

For the positive electrode can 401 and the negative electrode can 402, a metal such as nickel, aluminum, or titanium that is corrosion resistant to an electrolytic solution, or an alloy thereof or an alloy of these with another metal (for example, stainless steel) is used. it can. In order to prevent corrosion due to the electrolytic solution, it is preferable to coat nickel, aluminum, or the like. The positive electrode can 401 and the negative electrode can 402 are electrically connected to the positive electrode 404 and the negative electrode 407, respectively.

The negative electrode 407, the positive electrode 404, and the separator 410 are impregnated in the electrolyte, and the positive electrode 404, the separator 410, the negative electrode 407, and the negative electrode can 402 are laminated in this order with the positive electrode can 401 facing down, as shown in FIG. Then, the positive electrode can 401 and the negative electrode can 402 are pressure-bonded via a gasket 403 to manufacture a CR2032-type (diameter 20 mm, height 3.2 mm) coin-type secondary battery 400.

FIG. 14A is an example showing a plurality of secondary batteries having a wound body inside. In this embodiment, one secondary battery is provided with one switch for control. FIG. 14 shows an IC chip 999 including a switch mounted on a circuit board. The terminal 911 includes a control signal input terminal, a power supply terminal, and the like. The IC chip 999 may be provided on the back surface of the circuit board 900.

Note that as shown in FIG. 14B, one secondary battery 913 is provided with a terminal 951 and a terminal 952 inside the housing 930. In the secondary battery 913, a housing 930a and a housing 930b are bonded to each other, and a wound body is provided in a region surrounded by the housing 930a and the housing 930b.

Furthermore, a structural example of the secondary battery 913 will be described with reference to FIGS.

A secondary battery 913 illustrated in FIG. 15A includes a wound body 950 in which a terminal 951 and a terminal 952 are provided inside a housing 930. The wound body 950 is impregnated with the electrolytic solution inside the housing 930. The terminal 952 is in contact with the housing 930, and the terminal 951 is not in contact with the housing 930 by using an insulating material or the like. Note that in FIG. 15A, the housing 930 is illustrated separately for convenience, but in actuality, the wound body 950 is covered with the housing 930, and the

terminals

951 and 952 are included in the housing 930. Extends outside. As the housing 930, a metal material (eg, aluminum) or a resin material can be used.

Note that as illustrated in FIG. 15B, the housing 930 illustrated in FIG. 15A may be formed using a plurality of materials. For example, in the secondary battery 913 illustrated in FIG. 15B, a housing 930a and a housing 930b are attached to each other, and a winding body 950 is provided in a region surrounded by the housing 930a and the housing 930b. .

As the housing 930a, an insulating material such as an organic resin can be used. In particular, by using a material such as an organic resin on the surface where the antenna is formed, electric field shielding by the secondary battery 913 can be suppressed. Note that an antenna may be provided inside the housing 930a if the shielding of the electric field by the housing 930a is small. As the housing 930b, for example, a metal material can be used.

Furthermore, the structure of the wound body 950 is shown in FIG. The wound body 950 includes a negative electrode 931, a positive electrode 932, and a separator 933. The wound body 950 is a wound body in which the negative electrode 931 and the positive electrode 932 are stacked with the separator 933 interposed therebetween, and the laminated sheet is wound. Note that a stack of a plurality of negative electrodes 931, a positive electrode 932, and a separator 933 may be stacked.

The negative electrode 931 is connected to a terminal 911 illustrated in FIG. 14A through one of a terminal 951 and a terminal 952. The positive electrode 932 is connected to the terminal 911 illustrated in FIG. 14A through the other of the terminal 951 and the terminal 952.

By using a plurality of secondary batteries whose charging is controlled by a switch, optimal charging can be performed using a neural network, and a long-life secondary battery 913 can be obtained.

(Embodiment 4)
In this embodiment, an example in which a plurality of secondary batteries whose charging is controlled by a switch is mounted on an electronic device will be described.

First, as an electronic device to which a plurality of secondary batteries are applied, for example, a television device (also referred to as a television or a television receiver), a monitor for a computer, a digital camera, a digital video camera, a digital photo frame, a mobile phone (Also referred to as a mobile phone or a mobile phone device), a portable game machine, a portable information terminal, a sound reproduction device, a large game machine such as a pachinko machine, and the like.

Next, FIG. 17A and FIG. 17B show an example of a tablet terminal that can be folded in half. A tablet terminal 9600 illustrated in FIGS. 17A and 17B includes a housing 9630a, a housing 9630b, a movable portion 9640 that connects the housing 9630a and the housing 9630b, a display portion 9631, and a display mode switching switch 9626. , A power switch 9627, a power saving mode switching switch 9625, a fastener 9629, and an operation switch 9628. By using a flexible panel for the display portion 9631, a tablet terminal having a wider display portion can be obtained. FIG. 17A shows a state where the tablet terminal 9600 is opened, and FIG. 17B shows a state where the tablet terminal 9600 is closed.

Further, the tablet terminal 9600 includes a plurality of power storage units 9635 inside the housing 9630a and the housing 9630b. The power storage unit 9635 is provided across the housing 9630a and the housing 9630b through the movable portion 9640.

The display portion 9631 can partly be a touch panel area, and data can be input by touching the displayed operation keys. Further, a keyboard button can be displayed on the display portion 9631 by touching a position where the keyboard display switching button on the touch panel is displayed with a finger or a stylus.

Further, the display mode change-over switch 9626 can select a landscape mode and a portrait mode, a monochrome mode and a color mode. The power saving mode change-over switch 9625 can optimize the display luminance in accordance with the amount of external light in use detected by an optical sensor incorporated in the tablet terminal 9600. The tablet terminal may include not only an optical sensor but also other detection devices such as a gyroscope, an acceleration sensor, and other sensors that detect inclination.

FIG. 17B shows a closed state, and the tablet terminal includes a charge / discharge control circuit 9634 including a housing 9630, a solar cell 9633, and a DCDC converter 9636. Further, as the power storage unit 9635, a plurality of secondary batteries according to one embodiment of the present invention is used.

Note that since the tablet terminal 9600 can be folded in two, the housing 9630a and the housing 9630b can be folded so as to overlap when not in use. By folding, the display portion 9631 can be protected, so that durability of the tablet terminal 9600 can be improved. Further, according to the control system of one embodiment of the present invention, since the plurality of power storage bodies 9635 have a long lifetime, the tablet terminal 9600 that can be used for a long time can be provided.

In addition, the tablet terminal shown in FIGS. 17A and 17B has a function for displaying various information (still images, moving images, text images, etc.), a calendar, date or time, and the like. A touch input function for touch input operation or editing of information displayed on the display unit, a function for controlling processing by various software (programs), and the like.

Power can be supplied to a touch panel, a display unit, a video signal processing unit, or the like by a solar cell 9633 mounted on the surface of the tablet terminal. Note that the solar battery 9633 can be provided on one or both surfaces of the housing 9630 and the plurality of power storage bodies 9635 can be charged efficiently.

The structure and operation of the charge / discharge control circuit 9634 illustrated in FIG. 17B will be described with reference to a block diagram in FIG. FIG. 17C illustrates the solar battery 9633, the power storage unit 9635, the DCDC converter 9636, the converter 9637, the switches SW1 to SW3, and the display portion 9631. The power storage unit 9635, the DCDC converter 9636, the converter 9637, and the switches SW1 to SW3 are shown. Is a portion corresponding to the charge / discharge control circuit 9634 shown in FIG.

First, an example of operation in the case where power is generated by the solar battery 9633 using external light will be described. The power generated by the solar battery is boosted or lowered by the DCDC converter 9636 so as to be a voltage for charging the power storage unit 9635. When power from the solar cell 9633 is used for the operation of the display portion 9631, the switch SW1 is turned on, and the converter 9637 increases or decreases the voltage required for the display portion 9631. When display on the display portion 9631 is not performed, the power storage unit 9635 may be charged by turning off the switch SW1 and turning on the switch SW2.

Note that although the solar battery 9633 is shown as an example of a power generation unit, the power storage unit 9635 is charged by another power generation unit such as a piezoelectric element (piezo element) or a thermoelectric conversion element (Peltier element). There may be. For example, a non-contact power transmission module that wirelessly (contactlessly) transmits and receives power for charging and other charging means may be combined.

FIG. 18 shows an example of another electronic device. In FIG. 18, a display device 8000 is an example of an electronic device that controls charging of a plurality of secondary batteries 8004 using a microprocessor (including APS). Specifically, the display device 8000 corresponds to a display device for receiving TV broadcasts, and includes a housing 8001, a display portion 8002, a speaker portion 8003, a secondary battery 8004, and the like. A plurality of secondary batteries 8004 according to one embodiment of the present invention are provided in the housing 8001. The display device 8000 can receive power from a commercial power supply. Alternatively, the display device 8000 can use power stored in the secondary battery 8004.

The display portion 8002 includes a liquid crystal display device, a light emitting device including a light emitting element such as an organic EL element, an electrophoretic display device, a DMD (Digital Micromirror Device), a PDP (Plasma Display Panel), and an FED (Field Emission Display). A semiconductor display device such as) can be used.

The display device includes all information display devices such as a personal computer and an advertisement display in addition to a TV broadcast reception.

Also, the voice input device 8005 uses a plurality of secondary batteries whose charging is controlled by a switch. The voice input device 8005 includes a wireless communication element, a microphone, a speaker 8007, and a plurality of sensors (such as an optical sensor, a temperature sensor, a humidity sensor, an atmospheric pressure sensor, an illuminance sensor, and a motion sensor). Thus, other devices can be operated, for example, the power operation of the display device 8000, the light amount adjustment of the stationary illumination device 8100, and the like. The voice input device 8005 can operate peripheral devices by voice and can be used instead of a manual remote controller. The voice input device 8005 is provided on a base 8006 that rotates around an axis indicated by a dotted line, rotates in a direction in which the user's voice can be heard, listens to a command accurately with a built-in microphone, and displays the contents of the display unit 8008. Or a touch input operation of the display portion 8008 can be performed. FIG. 18 shows an example in which the base 8006 is used. However, the present invention is not particularly limited, and the voice input device 8005 may be provided with wheels or mechanical movement means and moved to a desired position. You may fix without providing.

In FIG. 18, a lighting device 8100 is an example of an electronic device using a plurality of secondary batteries 8103 whose charging is controlled by a switch. Specifically, the lighting device 8100 includes a housing 8101, a light source 8102, a secondary battery 8103, and the like. FIG. 18 illustrates the case where the secondary battery 8103 is provided inside the ceiling 8104 where the housing 8101 and the light source 8102 are installed, but the plurality of secondary batteries 8103 are provided inside the housing 8101. May be provided. The lighting device 8100 can receive power from a commercial power supply. Alternatively, the lighting device 8100 can use power stored in the secondary battery 8103.

Note that FIG. 18 illustrates the lighting device 8100 provided on the ceiling 8104. However, a plurality of secondary batteries whose charging is controlled by switches are provided on the side wall 8105, the floor 8106, the window 8107, and the like other than the ceiling 8104. It can also be used for a stationary lighting device, or a desktop lighting device.

As the light source 8102, an artificial light source that artificially obtains light using electric power can be used. Specifically, discharge lamps such as incandescent bulbs and fluorescent lamps, and light emitting elements such as LEDs and organic EL elements are examples of the artificial light source.

18, an air conditioner having an indoor unit 8200 and an outdoor unit 8204 is an example of an electronic device using a plurality of secondary batteries 8203 whose charging is controlled by a switch. Specifically, the indoor unit 8200 includes a housing 8201, an air outlet 8202, a secondary battery 8203, and the like. FIG. 18 illustrates the case where the secondary battery 8203 is provided in the indoor unit 8200, but the secondary battery 8203 may be provided in the outdoor unit 8204. Alternatively, the secondary battery 8203 may be provided in both the indoor unit 8200 and the outdoor unit 8204. The air conditioner can receive power from a commercial power supply. Alternatively, the air conditioner can use power stored in the secondary battery 8203.

Note that FIG. 18 illustrates a separate type air conditioner including an indoor unit and an outdoor unit. However, an integrated air conditioner having the functions of the indoor unit and the outdoor unit in one housing is illustrated. A plurality of secondary batteries whose charging is controlled by a switch can also be used.

In FIG. 18, an electric refrigerator-freezer 8300 is an example of an electronic apparatus using a plurality of secondary batteries 8304 whose charging is controlled by a switch. Specifically, the electric refrigerator-freezer 8300 includes a housing 8301, a refrigerator door 8302, a refrigerator door 8303, a secondary battery 8304, and the like. In FIG. 18, a plurality of secondary batteries 8304 are provided inside the housing 8301. The electric refrigerator-freezer 8300 can receive power from a commercial power supply. Alternatively, the electric refrigerator-freezer 8300 can use power stored in the secondary battery 8304.

In addition, in a time zone when the electronic device is not used, particularly in a time zone where the ratio of the actually used power amount (referred to as the power usage rate) is low in the total power amount that can be supplied by the commercial power supply source. By storing electric power in the secondary battery, it is possible to suppress an increase in the power usage rate outside the above time period. For example, in the case of the electric refrigerator-freezer 8300, electric power is stored in the secondary battery 8304 at night when the temperature is low and the refrigerator door 8302 and the refrigerator door 8303 are not opened and closed. In the daytime when the temperature rises and the refrigerator door 8302 and the freezer door 8303 are opened and closed, the secondary battery 8304 is used as an auxiliary power source, so that the daytime power usage rate can be kept low.

In addition to the electronic devices described above, a plurality of secondary batteries whose charging is controlled by a switch can be mounted on any electronic device. This embodiment can be implemented in appropriate combination with any of the other embodiments.

(Embodiment 5)
In this embodiment, an example in which a plurality of secondary batteries that control charging with a switch which is one embodiment of the present invention is mounted on a vehicle will be described.

When a secondary battery is mounted on a vehicle, a next-generation clean energy vehicle such as a hybrid vehicle (HEV), an electric vehicle (EV), or a plug-in hybrid vehicle (PHEV) can be realized. If the weight is biased by the arrangement of the secondary batteries, the position of the center of gravity of the vehicle as a whole may change. Therefore, it is desirable to arrange a plurality of secondary batteries at optimal positions so that the center of gravity of the vehicle is as designed. If a plurality of secondary batteries are arranged at various locations, the secondary battery may be affected by the heat generated by the devices arranged around a certain secondary battery, and may be deteriorated more than other secondary batteries. The present invention is effective when a plurality of secondary batteries having different progress of deterioration are arranged.

FIG. 19 illustrates a vehicle using a plurality of secondary batteries whose charge is controlled by a switch which is one embodiment of the present invention. A car 8400 illustrated in FIG. 19A is an electric car that uses an electric motor as a power source for traveling. Or it is a hybrid vehicle which can select and use an electric motor and an engine suitably as a motive power source for driving | running | working. By using one embodiment of the present invention, it is possible to extend the life of a secondary battery mounted on a vehicle. The automobile 8400 has a battery pack 8402. The battery pack 8402 may use a large number of small cylindrical secondary batteries shown in FIG. 12 side by side with respect to the floor portion in the vehicle. Further, a battery pack in which a plurality of secondary batteries shown in FIG. 13 are combined may be installed on the floor portion in the vehicle. In FIG. 19A, the battery pack 8402 can not only drive the electric motor 8406 but also supply power to a light-emitting device such as a headlight 8401 and a room light (not shown). In addition, the ceiling portion of the automobile 8400 includes a photoelectric conversion element 8405, and the irradiated light can be photoelectrically converted and stored in the battery pack 8402.

Further, the battery pack 8402 can supply power to a display device such as a speedometer or a tachometer that the automobile 8400 has. The battery pack 8402 can supply power to a display device such as a navigation system included in the automobile 8400. Further, a sensor 8403 may be provided instead of the side mirror, and an image obtained by the sensor 8403 may be projected and displayed on a part of the windshield 8404. Further, an image obtained by the sensor 8403 may be displayed on a display device in the vehicle.

An automobile 8500 shown in FIG. 19B can charge a plurality of secondary batteries of the automobile 8500 by receiving power supply from an external charging facility by a plug-in method, a non-contact power supply method, or the like. FIG. 19B illustrates a state where the secondary battery 8024 mounted on the automobile 8500 is charged through the cable 8022 from the ground-installed charging device 8021. When charging, the charging method, connector standard, and the like may be appropriately performed by a predetermined method such as CHAdeMO (registered trademark) or a combo. The charging device 8021 may be a charging station provided in a commercial facility, or may be a household power source. For example, the secondary battery 8024 mounted on the automobile 8500 can be charged by power supply from the outside by plug-in technology. Charging can be performed by converting AC power into DC power via a conversion device such as an ACDC converter included in the charging device 8021. In the case of an automobile 8500 equipped with a charging ACDC converter 8025, charging can be performed even if an AC power supply is connected.

Although not shown, the power receiving device can be mounted on the vehicle and charged by supplying power from the ground power transmitting device in a non-contact manner. In the case of this non-contact power supply method, charging can be performed not only when the vehicle is stopped but also during traveling by incorporating a power transmission device on a road or an outer wall. In addition, this non-contact power feeding method may be used to transmit and receive power between vehicles. Furthermore, a solar battery may be provided in the exterior part of the vehicle, and the secondary battery may be charged when the vehicle is stopped or traveling. An electromagnetic induction method or a magnetic field resonance method can be used for such non-contact power supply.

FIG. 19C is an example of a motorcycle using a plurality of secondary batteries whose charging is controlled by a switch. A scooter 8600 illustrated in FIG. 19C includes a secondary battery 8602, a side mirror 8601, and a direction indicator lamp 8603. The secondary battery 8602 can supply electricity to the direction indicator lamp 8603.

Further, the scooter 8600 shown in FIG. 19C can store a plurality of secondary batteries 8602 in the under-seat storage 8604. The secondary battery 8602 can be stored in the under-seat storage 8604 even if the under-seat storage 8604 is small. The secondary battery 8602 can be removed. When charging, the secondary battery 8602 can be carried indoors, charged, and stored before traveling.

FIG. 20 (A) is an example of an electric bicycle using a plurality of secondary batteries whose charging is controlled by a switch as a battery pack. An electric bicycle 8700 illustrated in FIG. 20A includes a battery pack 8702. The battery pack 8702 can supply electricity to a motor that assists the driver. Further, the battery pack 8702 can be carried, and FIG. 20B shows a state where the battery pack 8702 is detached from the electric bicycle. The battery pack 8702 includes a plurality of laminated secondary batteries 8701 so that the remaining capacity of the secondary battery can be displayed on the display portion 8703. Note that when a plurality of secondary batteries are incorporated, each has a switch, a charge control device, and a protection circuit.

(Embodiment 6)
An electronic device and an input system of one embodiment of the present invention are described with reference to drawings. The electronic device can be used as a head mounted display (HMD).

<Appearance>
FIG. 21A is an example of the appearance of an electronic device viewed from the top of the user wearing the electronic device (here, the HMD), and FIG. 21B is a block diagram.

The electronic device (HMD) includes at

least imaging devices

120a and 120b,

detection devices

130a and 130b,

integrated circuits

140a and 140b,

secondary batteries

141a and 141b, and

display devices

150a and 150b.

The

imaging devices

120a and 120b, the

detection devices

130a and 130b, the

integrated circuits

140a and 140b, the

secondary batteries

141a and 141b, and the

display devices

150a and 150b can be provided in the housing 110, for example, and are electrically connected to each other. ing.

In the housing 110,

display devices

150a and 150b and

imaging devices

120a and 120b are provided so as to face the respective eyeballs of the wearing users. In FIG. 21B, power from the secondary battery 141a is supplied to the integrated circuit 140a, the imaging device 120a, the detection device 130a, and the display device 150a via the switch 142a. The power from the secondary battery 141b is supplied to the integrated circuit 140b, the imaging device 120b, the detection device 130b, and the display device 150b via the switch 142b.

The integrated circuit 140a collects information on the secondary battery 141a, analyzes the degree of deterioration using the first neural network, and charges the secondary battery 141a under optimum charging conditions. Similarly, the integrated circuit 140b collects information on the secondary battery 141b, analyzes the degree of deterioration using the second neural network, and charges the secondary battery 141b under optimum charging conditions. The

integrated circuits

140a and 140b have a memory for storing charge / discharge characteristic data correlated with the SOC.

The

imaging device

120a, 120b can use a camera having an imaging device capable of imaging the shape of the pupil. The shape of the portion where the black and white eyes are exposed from the eyelid has a clear outline, so that the shape can be detected without using a high-performance image sensor.

The

detection devices

130a and 130b detect a change in the shape of the pupil based on the shape of the pupil imaged by the

imaging devices

120a and 120b. For example, a change in the shape of the pupil is detected from information on the boundary between the eye lid and the sclera (white eye) or the boundary between the eye lid and the cornea (for example, black eye). Note that detection of changes in the shape of the pupil in the

detection devices

130a and 130b involves image processing and calculation processing, and thus may be referred to as calculation of change in the shape of the pupil.

Furthermore, the

integrated circuits

140a and 140b may generate display data based on a setting change according to a change in the shape of the pupil. Alternatively, the

integrated circuits

140a and 140b generate display data based on a change in setting according to the movement of the head and the change in the shape of the pupil. Display data may be generated by a circuit such as a processor. Further, the

integrated circuits

140a and 140b may generate display data of an image displayed on the

display devices

150a and 150b, which is difficult for a user to get sick.

FIG. 21 shows an example of an image sensor that can image the shape of the pupil, but other sensor elements such as a triaxial acceleration sensor may be used.

As the

display devices

150a and 150b, EL display devices, liquid crystal display devices, and micro LED display devices can be used. A display device that has a spherical display surface and can be arranged so as to cover the eyeball is preferable. Further, an optical system may be provided between the

display devices

150a and 150b and the eyeball. In FIG. 21, in addition to the housing 110, the user's eyeball 160, the speaker unit 161, and the

fixtures

162 and 163 are illustrated. The speaker unit 161 and the

fixtures

162 and 163 are for fixing the housing 110 to the head. Therefore, the configuration is not limited to the band-shaped fixture, and another configuration may be used.

With the above configuration, during charging, the integrated circuit can reduce the difference in performance deterioration between the plurality of secondary batteries, and can reduce the unbalance between the secondary batteries. In addition, when the image is displayed on the user's head, the brightness can be adjusted by the integrated circuit so as to obtain an optimum display for each display device.

(Embodiment 7)
In this embodiment, an example of an eyeglass-type device is illustrated in FIG.

The eyeglass-type device 7110 has a secondary battery 7101 in each of the left and right temple parts (the part arranged along the user's temporal region when worn).

For example, if a large number of parts including a secondary battery are arranged in the front part of the eyeglass-type device 7110, the weight balance may be deteriorated. Thus, by arranging the secondary battery 7101 in the temple portion, a weight-balanced spectacle-type device 7110 that can be used comfortably can be obtained. In addition, when using a smartphone to fit into a frame to make an HMD, the smartphone and its battery are heavy and the smartphone is placed away from the head, so if you turn your neck you will feel more weight due to centrifugal force . On the other hand, according to the present embodiment, since the two secondary batteries are dispersed in two places and further installed at a position close to the head, it is possible to adopt a configuration in which the weight is not felt so much.

The eyeglass device 7110 may have a terminal portion 7104. The secondary battery 7101 can be charged from the terminal portion 7104. In addition, it is preferable that the secondary batteries 7101 are electrically connected to each other. Since the secondary batteries 7101 are electrically connected to each other, the two secondary batteries 7101 can be charged from one terminal portion 7104.

Further, the eyeglass-type device 7110 may have a display portion 7112. Further, a control unit 7103 including a microprocessor capable of performing a neural network operation may be provided. The controller 7103 can control charging / discharging of the secondary battery 7101 and can generate image data to be displayed on the display portion 7112. In addition, by mounting a chip having a wireless communication function on the controller 7103, data can be transmitted / received to / from the outside. Furthermore, an external display unit 7112 may be attached to form a multi-display.

The present invention is not limited to an electronic device worn on the user's head.

Priority is placed on weight balance, and it can be applied to unmanned mobile objects (typically also called unmanned aerial vehicles and drones), small robots, artificial satellites, space probes, and planetary probes that use multiple secondary batteries. FIG. 22B shows an example of an unmanned aerial vehicle.

The unmanned aerial vehicle 7300 includes a plurality of rotors 7302, a plurality of secondary batteries 7301, a control auto 7304 including a microprocessor capable of performing a neural network operation, a camera 7303, and an antenna (not shown). Unmanned aerial vehicle 7300 can be remotely operated via an antenna. A plurality of secondary batteries 7301 are arranged in a well-balanced manner, and the control unit 7304 can perform control for inspecting the degree of deterioration of the batteries and adjusting charge / discharge conditions according to the deterioration. It can be used often for long life. Since there are four propellers, four secondary batteries are also arranged in consideration of balance. In FIG. 22B, only two of the four secondary batteries are indicated by dotted lines.

Even in an electric vehicle (EV), a hybrid vehicle (HEV) having both an internal combustion engine and an electric motor, and a plug-in hybrid vehicle (PHEV), the position of the center of gravity of the vehicle as a whole may change if the weight is biased due to the arrangement of the secondary battery. For this reason, it is desirable to arrange a plurality of secondary batteries at optimal positions so that the center of gravity of the vehicle is as designed. When a plurality of secondary batteries are arranged at various locations, there is a risk of deterioration due to heat generated by peripheral devices arranged in a certain secondary battery, and deterioration may proceed more than other secondary batteries. The present invention is effective when a plurality of secondary batteries having different progress of deterioration are arranged.

100: Electronic equipment, 110: Housing, 120a: Imaging device, 120b: Imaging device, 130a: Detection device, 130b: Detection device, 140a: Integrated circuit, 140b: Integrated circuit, 141a: Secondary battery, 141b: Secondary Battery, 142a: switch, 142b: switch, 150a: display device, 150b: display device, 160: eyeball, 161: speaker unit, 162: fixture, 163: fixture 301a secondary battery, 301b secondary battery, 302 booster Converter, 303 Inverter, 304: Regenerative brake emphasis control valve, 305: Motor, 306: Tire, 307 Power generation engine, 308 Power generation motor, 311a switch, 311b switch, 311c: Switch, 311d: Power generation switch, 311e: Power generation Switch, 311f: Power generation switch H, 400: secondary battery, 401: positive electrode can, 402: negative electrode can, 403: gasket, 404: positive electrode, 405: positive electrode current collector, 406: positive electrode active material layer, 407: negative electrode, 408: negative electrode current collector 409: negative electrode active material layer, 410: separator, 512: semiconductor layer, 600: secondary battery, 601: positive electrode cap, 602: battery can, 603: positive electrode terminal, 604: positive electrode, 605: separator, 606: negative electrode, 607: Negative electrode terminal, 608: Insulating plate, 609: Insulating plate, 611: PTC element, 612: Safety valve mechanism, 900: Circuit board, 911: Terminal, 913: Secondary battery, 930: Housing, 930a: Housing, 930b: Housing, 931: Negative electrode, 932: Positive electrode, 933: Separator, 950: Winding body, 951: Terminal, 952: Terminal, 999: IC chip, 7101: Secondary battery, 103: control unit, 7104: terminal unit, 7110: glasses-type device, 7112: display unit, 7300: unmanned aircraft, 7301: secondary battery, 7302: rotor, 7303: camera 8000: display device, 8001: housing, 8002 : Display unit, 8003: Speaker unit, 8004: Secondary battery, 8005: Audio input device, 8006: Stand, 8007: Speaker, 8008: Display unit, 8021: Charging device, 8022: Cable, 8024: Secondary battery, 8025 : ACDC converter for charging, 8100: Lighting device, 8101: Housing, 8102: Light source, 8103: Secondary battery, 8104: Ceiling, 8105: Side wall, 8106: Floor, 8107: Window, 8200: Indoor unit, 8201: Housing Body, 8202: air outlet, 8203: secondary battery, 8204: outdoor unit, 8300: electric cooling Frozen refrigerator, 8301: housing, 8302: door for refrigerator, 8303: door for freezer, 8304: secondary battery, 8400: automobile, 8401: headlight, 8402: battery pack, 8403: sensor, 8404: windshield , 8405: photoelectric conversion element, 8406: electric motor, 8500: automobile, 8600: scooter, 8601: side mirror, 8602: secondary battery, 8603: direction indicator lamp, 8604: storage under seat, 8700: electric bicycle, 8701: Secondary battery, 8702: Battery pack, 8703: Display unit, 9600: Tablet-type terminal, 9625: Switch, 9626: Switch, 9627: Power switch, 9628: Operation switch, 9629: Fastener, 9630: Housing, 9630a: Housing, 9630b: Housing, 9631: Display portion, 9633: Solar cell, 9634: charging and discharging control circuit, 9635: power storage unit, 9636: DCDC converter 9637: Converters, 9640: movable portion

Claims

An integrated circuit;
A first secondary battery;
A second secondary battery,
Charging / discharging the secondary battery in a range where the charging rate is 1% or more and 100% or less,
The integrated circuit performs a deterioration analysis of the first secondary battery and the second secondary battery using a neural network,
The integrated circuit detects the secondary battery having the greater deterioration level,
A charge control system that charges a secondary battery having a higher degree of deterioration under a charging condition that provides a charging rate that falls within a narrower range than a secondary battery having a lower degree of deterioration.
In claim 1,
The first secondary battery is electrically connected to a first switch;
The second secondary battery is electrically connected to a second switch;
The charge control system in which the first switch and the second switch are controlled by the integrated circuit.
3. The charge control system according to claim 1, wherein the integrated circuit includes a transistor including an oxide semiconductor.
3. The secondary battery according to claim 1, wherein the secondary battery having a higher degree of deterioration stops charging so as not to be fully charged, and the secondary battery having a lower degree of deterioration maintains a fully charged state. To charge control system.
In claim 1 or claim 2, the secondary battery having a larger degree of deterioration stops discharging so that the charging rate does not become less than 30% during discharging, and the secondary battery having a smaller degree of deterioration is A charge control system that discharges until the charge rate reaches less than 30%.
3. The charging control system according to claim 1, wherein the charging condition is determined using a second neural network.
Diagnose the deterioration degree of the first secondary battery and the second secondary battery,
Of the first secondary battery and the second secondary battery, a switch connected to one of the batteries that is less deteriorated is turned on to be fully charged under the first charging condition,
Turn on the switch connected to the other battery that is greatly deteriorated, start charging under a second charging condition different from the first charging condition, and stop charging within the range of 50% to 80% charging rate. A charge control method for recording a charge history.
8. The charge control method according to claim 7, wherein the deterioration degree diagnosis is performed by a first neural network process.
9. The charging control method according to claim 7, wherein the second charging condition is determined by a second neural network process.
A first display area, a second display area, an integrated circuit, a first secondary battery, and a second secondary battery;
The integrated circuit performs deterioration analysis of the first secondary battery or the second secondary battery using a neural network,
An electronic device that performs charging in a range where the charging rate is narrower than that of a secondary battery having a lower degree of deterioration than a secondary battery having a higher degree of deterioration.
The first secondary battery according to claim 10, wherein the first secondary battery is electrically connected to the first switch.
The second secondary battery is electrically connected to a second switch;
The electronic device in which the first switch and the second switch are controlled by the integrated circuit.
12. The electronic device according to claim 10, wherein the integrated circuit includes a memory.
A first display area, a second display area, a first integrated circuit, a second integrated circuit, a first secondary battery, and a second secondary battery;
The first secondary battery is electrically connected to a first switch, the second secondary battery is electrically connected to a second switch, and the first switch is connected to the first switch. The electronic device is controlled by the integrated circuit, and the second switch is controlled by the second integrated circuit.
14. The electronic device according to claim 11 or 13, which includes a transistor including an oxide semiconductor.
14. The electronic apparatus according to claim 11, further comprising an imaging device having a function of imaging a pupil.
14. The electronic device according to claim 13, wherein the first integrated circuit includes a memory.
The first integrated circuit according to claim 13, wherein the first integrated circuit performs deterioration analysis of the first secondary battery using a first neural network.
The second integrated circuit performs a deterioration analysis of the second secondary battery using a second neural network;
An electronic device that performs charging in a range where the charging rate is narrower than that of a secondary battery having a lower degree of deterioration than a secondary battery having a higher degree of deterioration.