WO2018228097A1 - 阵列基板及其制作方法、显示面板、显示装置 - Google Patents

阵列基板及其制作方法、显示面板、显示装置 Download PDF

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WO2018228097A1
WO2018228097A1 PCT/CN2018/086382 CN2018086382W WO2018228097A1 WO 2018228097 A1 WO2018228097 A1 WO 2018228097A1 CN 2018086382 W CN2018086382 W CN 2018086382W WO 2018228097 A1 WO2018228097 A1 WO 2018228097A1
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layer
transparent conductive
conductive layer
metal
array substrate
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PCT/CN2018/086382
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English (en)
French (fr)
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宫奎
段献学
白明基
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京东方科技集团股份有限公司
合肥京东方光电科技有限公司
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Priority to US16/317,644 priority Critical patent/US10811446B2/en
Publication of WO2018228097A1 publication Critical patent/WO2018228097A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133553—Reflecting elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/1296—Multistep manufacturing methods adapted to increase the uniformity of device parameters
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/13439—Electrodes characterised by their electrical, optical, physical properties; materials therefor; method of making
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136277—Active matrix addressed cells formed on a semiconductor substrate, e.g. of silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1218—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/1262—Multistep manufacturing methods with a particular formation, treatment or coating of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs

Definitions

  • the present disclosure relates to the field of display technologies, and in particular, to an array substrate, a method for fabricating the same, a display panel, and a display device.
  • Existing display devices include transmissive display devices, reflective display devices, and transflective display devices.
  • the transmissive display device mainly uses a backlight as a light source, that is, the display panel of the transmissive display device needs to provide a backlight to provide a light source for the display panel, but the backlight utilization rate is not high, and the backlight needs to be greatly improved in order to improve the display brightness. Brightness, so power consumption is higher.
  • the reflective display device mainly uses a front light source or an external light source as a light source. That is, the display panel of the reflective display device does not need to be provided with a backlight, and the external light source mainly provides a light source for the display panel, and the power consumption is relatively low.
  • the embodiment of the present disclosure provides an array substrate, a manufacturing method thereof, a display panel, and a display device.
  • the specific scheme is as follows:
  • a method for fabricating an array substrate according to an embodiment of the present disclosure includes a method of sequentially forming a thin film transistor and a passivation layer on a substrate, wherein the method further includes:
  • the reflective layer is electrically connected to a source or a drain of the thin film transistor through a via penetrating the passivation layer, the transparent conductive layer including a number of metal ions;
  • the transparent conductive layer and the reflective layer which have completed the above steps are patterned to form a pixel electrode.
  • the transparent conductive layer is subjected to a reduction treatment, so that the metal ions are reduced to form a metal particle layer, including:
  • the transparent conductive layer is subjected to plasma treatment such that the metal ions included in the transparent conductive layer are reduced to form a metal particle layer.
  • the reducing gas is any one of hydrogen, chlorine, carbon monoxide, hydrogen sulfide, hydrogen bromide, methane, and sulfur dioxide.
  • the thickness of the metal particle layer is 1/10 to 1/5 of the thickness of the transparent conductive layer.
  • forming the reflective layer and the transparent conductive layer sequentially on the passivation layer including:
  • a metal layer and a transparent conductive layer are sequentially deposited on the passivation layer by magnetron sputtering.
  • the transparent conductive layer is any one or any combination of indium tin oxide, indium zinc oxide, and zinc oxide.
  • An embodiment of the present disclosure further provides an array substrate formed by using the above-described method for fabricating an array substrate, comprising a thin film transistor and a passivation layer sequentially disposed on a substrate, wherein the substrate further includes a thin film transistor and a passivation layer. a reflective layer and a transparent conductive layer on the reflective layer, the transparent conductive layer comprising a layer of metal particles formed of a plurality of metal particles.
  • the thickness of the metal particle layer is 1/10 to 1/5 of the thickness of the transparent conductive layer.
  • Embodiments of the present disclosure also provide a display panel including the above array substrate.
  • Embodiments of the present disclosure also provide a display device including the above display panel.
  • FIG. 1 is a schematic structural view of a reflective display panel of the prior art
  • FIG. 2 is a flow chart of a method for fabricating an array substrate according to an embodiment of the present disclosure
  • FIG. 3 to FIG. 6 are schematic structural diagrams of different stages in a process of fabricating an array substrate according to an embodiment of the present disclosure
  • FIG. 7 is a schematic structural diagram of a display panel according to an embodiment of the present disclosure.
  • FIG. 8 is a schematic diagram of scattering of external light by a pixel electrode included in an array substrate according to an embodiment of the present disclosure.
  • a display panel of a reflective display device of the related art is formed by a counter substrate 11 and an array substrate 12, and a liquid crystal layer 13 is encapsulated in a space between the opposite substrate 11 and the array substrate 12, and the array substrate is arranged as shown in FIG. 12 includes a thin film transistor 121 on the base substrate 120, a passivation layer 127 on the thin film transistor 121, a pixel electrode 128 on the passivation layer 127, and a pixel electrode 128 that is capable of reflecting light; wherein: the thin film transistor 121 includes a gate 122, a gate insulating layer 123, a semiconductor active layer 124, a source 125, and a drain 126.
  • the light reflected by the pixel electrode included in the display panel of the reflective display device has a certain direction, and the pixel electrode does not enable the viewer to see a uniform reflection effect at various viewing angles.
  • the embodiments of the present disclosure provide an array substrate, a manufacturing method thereof, a display panel, and a display device, so that a viewer can view a uniform reflection effect at various viewing angles and improve the display effect.
  • a specific embodiment of the present disclosure provides a method for fabricating an array substrate, including a method for sequentially forming a thin film transistor and a passivation layer on a substrate, the method further comprising:
  • a reflective layer and a transparent conductive layer are sequentially formed on the passivation layer, and the reflective layer is electrically connected to a source or a drain of the thin film transistor through a via hole penetrating the passivation layer, and the transparent conductive layer includes a plurality of metal ions;
  • the pixel electrode formed by the specific embodiment of the present disclosure includes both a reflective layer and a transparent conductive layer.
  • the reflective layer can reflect external light well, and can realize a reflective array substrate.
  • the transparent conductive is provided by the specific embodiment of the present disclosure.
  • the layer is subjected to a reduction treatment to form a layer of metal particles, and the formation of the metal particle layer can perform a good diffuse reflection effect on the light irradiated to the transparent conductive layer. Therefore, the specific embodiment of the present disclosure enables the viewer to The uniform reflection effect can be seen from the viewing angle, and the specific embodiment of the present disclosure improves the display effect as compared with the prior art.
  • the manufacturing of the thin film transistor on the substrate substrate includes: sequentially forming a gate electrode, a gate insulating layer, a semiconductor active layer, a source and a drain on the substrate by a patterning process; or The patterning process sequentially fabricates a light shielding layer, a first insulating layer, a semiconductor active layer, a gate insulating layer, a gate electrode, a second insulating layer, a source and a drain on the base substrate.
  • the patterning process in the specific embodiment of the present disclosure includes a process of coating, exposing, developing, etching, and removing part or all of the photoresist.
  • the specific method of fabricating the thin film transistor in the specific embodiment of the present disclosure is similar to the prior art. , no longer repeat them here.
  • the thin film transistor formed may be a bottom gate type thin film transistor, a top gate type thin film transistor, and of course, other types of thin film transistors, and the specific embodiments of the present disclosure are not for the type of thin film transistor. Make a limit.
  • a specific embodiment of the present disclosure forms a passivation layer on the thin film transistor by a patterning process.
  • the specific fabrication method of the passivation layer is similar to the prior art, and details are not described herein.
  • the specific material selection of the passivation layer and the prior art The same, no longer repeat here.
  • a reflective layer and a transparent conductive layer are sequentially formed on the passivation layer.
  • a metal layer and a transparent conductive layer are sequentially deposited on the passivation layer by magnetron sputtering.
  • the metal layer and the transparent conductive layer may be deposited by other methods, for example, a metal layer and a transparent conductive layer may be sequentially deposited by thermal evaporation.
  • the material of the metal layer in the specific embodiment of the present disclosure may select any one or any combination of molybdenum (Mo), aluminum (Al), copper (Cu), silver (Ag), and the like.
  • the material of the transparent conductive layer in the specific embodiment of the present disclosure may be selected from any one or any combination of indium tin oxide (ITO), indium zinc oxide (IZO), and zinc oxide (ZnO).
  • ITO indium tin oxide
  • IZO indium zinc oxide
  • ZnO zinc oxide
  • the transparent conductive layer in the specific embodiment may also be selected from other transparent conductive materials including a plurality of metal ions, and the specific embodiment of the present disclosure does not limit the specific material of the transparent conductive layer.
  • the transparent conductive layer is subjected to a reduction treatment, so that the metal ions included in the transparent conductive layer are reduced to form a metal particle layer, and specifically, the transparent conductive layer is subjected to plasma treatment in a working atmosphere of the reducing gas, so that The metal ions included in the transparent conductive layer are reduced to form a metal particle layer.
  • the transparent conductive layer Due to the current mature plasma processing process, the transparent conductive layer can be processed by the plasma treatment process to ensure process stability and ensure processing. As a result, the yield rate is such that, in the working atmosphere of the reducing gas, the metal ions included in the transparent conductive layer can be well reduced by plasma treatment.
  • the reducing gas in the specific embodiment of the present disclosure is hydrogen (H 2 ), chlorine (Cl 2 ), carbon monoxide (CO), hydrogen sulfide (H 2 S), hydrogen bromide (HBr), methane (CH). 4 ) Any of sulfur dioxide (SO 2 ).
  • the thickness of the metal particle layer formed by the specific embodiment of the present disclosure is 1/10 to 1/5 of the thickness of the transparent conductive layer. If the thickness of the metal particle layer formed by the specific embodiment of the present disclosure is thin, It has a good diffuse reflection effect, and if the thickness of the formed metal particle layer is thick, it will affect the reflective performance of the reflective layer of the specific embodiment of the present disclosure.
  • the thin film transistor formed by the specific embodiment of the present disclosure is described by taking a bottom gate type thin film transistor as an example.
  • a gate electrode 122, a gate insulating layer 123, a semiconductor active layer 124, a source electrode 125, a drain electrode 126, and a passivation layer 127 are sequentially formed on the base substrate 120 by a patterning process, specifically, A via hole 30 is formed through the passivation layer 127 and exposing the drain 126 by a patterning process.
  • the gate electrode 122, the gate insulating layer 123, the semiconductor active layer 124, the source 125, the drain 126, and the blunt are disclosed in the embodiment of the present disclosure.
  • the specific manufacturing method of the layer 127 is similar to the prior art, and will not be described again here.
  • a metal layer 41 and a transparent conductive layer 42 are sequentially deposited on the passivation layer 127 by magnetron sputtering.
  • the metal layer 41 passes through the via 30 and the drain penetrating the passivation layer 127.
  • the transparent conductive layer 42 deposited in the specific embodiment of the present disclosure is exemplified by indium tin oxide (ITO).
  • the substrate for completing the above steps is placed in a plasma enhanced chemical vapor deposition apparatus, and the formed transparent conductive layer 42 (ie, ITO) layer is plasma-treated with hydrogen as a working gas.
  • the direction of the arrow in the figure indicates the processing direction of the plasma. Since the plasma with hydrogen as the working gas has a strong reducibility, the metal ions included in the ITO layer can be reduced, thereby depositing a large amount of metal particles 60 in the ITO layer. As shown in FIG. 6, the metal particles 60 are composed. A layer of metal particles.
  • the density of the metal particles 60 in the metal particle layer and the thickness of the metal particle layer in the specific embodiment of the present disclosure may be determined by parameters of the plasma enhanced chemical vapor deposition apparatus, such as increasing the flow rate of the working gas hydrogen and increasing the plasma enhanced chemistry.
  • the upper electrode power in the vapor deposition apparatus can increase the density of the plasma in the chamber, thereby increasing the density of the metal particles 60, and correspondingly increasing the thickness of the metal particle layer composed of the metal particles 60.
  • the power of the lower electrode in the plasma enhanced chemical vapor deposition apparatus should be minimized to reduce the size of the self-bias;
  • the manner of plasma treatment of ITO in a plasma enhanced chemical vapor deposition apparatus is only one preferred embodiment of the specific embodiment of the present disclosure, and any manner in which metal ions in the ITO layer can be reduced in the actual production process can be employed.
  • the working gas selected in the specific embodiment of the present disclosure is hydrogen and is only a preferred embodiment of the specific embodiment of the present disclosure.
  • Other reducing gases such as Cl 2 , CO, H 2 S, HBr, and CH 4 , SO 2 and the like can be used as the working gas of the specific embodiment of the present disclosure, and these gases have strong reducibility when ionized into a plasma.
  • the ITO film is a tin (Sn) doped indium oxide (In 2 O 3 ) film, and the Sn atoms in the ITO film are generally in the form of SnO or Sn 2 O, and analyzed by secondary ion mass spectrometry.
  • the surface of the ITO film was analyzed, and the surface negative ions O - and positive ions In + were used as the main components.
  • H 2 was introduced into the chamber of the plasma enhanced chemical vapor deposition apparatus, and H 2 was ionized to form hydrogen (H + ) ions, since H + ions + ions stronger than the activity of the ITO film is in, in + ions can thus displaced from out of the ITO film, in + ions deposited on the surface of the ITO film is gradually formed in elemental metal, i.e., an in metal
  • elemental metal i.e., an in metal
  • the specific structure of the particles, In metal element is hemispherical or semi-ellipsoidal.
  • the reaction equation of hydrogen plasma and indium oxide is:
  • the parameters of the plasma enhanced chemical vapor deposition device can be set according to the required scattering effect.
  • a suitable amount of In metal element of a suitable size is obtained.
  • H 2 is introduced into the chamber of the plasma enhanced chemical vapor deposition apparatus, and the concentration of the H 2 is increased (for example, 500 sccm to 2000 sccm) and the access time (for example, 5 s to 200 s).
  • the plasma pressure of the chemical vapor deposition equipment such as: 500Pa ⁇ 3000Pa
  • the temperature such as: 150 ° C ⁇ 400 ° C
  • the upper surface of the ITO film produces In metal, and can be The size, shape and thickness of the structure of the In metal element are adjusted.
  • a specific embodiment of the present disclosure forms a metal layer 41 and a transparent conductive layer 42 formed with metal particles 60 by a mask process, and the metal layer 41 and the transparent conductive layer 42 are etched together to form an array.
  • the pixel electrode of the substrate The lower portion of the pixel electrode is a metal layer 41 for reflecting external light.
  • the upper portion of the pixel electrode is a transparent conductive layer 42 in which a plurality of metal particles 60 are distributed, and a metal particle layer composed of a plurality of metal particles 60 serves as a scattering layer of light.
  • the pixel electrode film layer of the array substrate after the pixel electrode film layer of the array substrate is fabricated, the pixel electrode film layer includes a transparent conductive layer of the top layer and a reflective metal layer of the bottom layer, and is processed by plasma in a working environment of a reducing gas.
  • a metal particle layer is deposited in the transparent conductive layer of the top layer. In this way, a layer of metal particles is formed on the bottom reflective metal layer without adding an additional photolithography process to achieve diffuse reflection, which not only improves the display. The effect is also effective in reducing costs.
  • a specific embodiment of the present disclosure further provides an array substrate formed by the above method, comprising a thin film transistor and a passivation layer sequentially disposed on a substrate, wherein the reflective layer is further included on the passivation layer. And a transparent conductive layer on the reflective layer, the transparent conductive layer comprising a layer of metal particles formed of a plurality of metal particles.
  • the metal particle layer can provide a good diffuse reflection effect on the light irradiated to the transparent conductive layer. Therefore, the specific embodiment of the present disclosure enables the viewer to see a uniform reflection effect at various viewing angles.
  • the thickness of the metal particle layer is 1/10 to 1/5 of the thickness of the transparent conductive layer, and the metal particle layer of the thickness can not only perform a good diffuse reflection effect, but also does not Affects the reflective properties of the reflective layer.
  • a specific embodiment of the present disclosure further provides a display panel, which includes the above array substrate provided by the specific embodiment of the present disclosure. As shown in FIG. 7 , the display panel includes the embodiment of the present disclosure.
  • the specific structure of the counter substrate 11 and the liquid crystal layer 13 between the array substrate and the counter substrate 11 is the same as that of the prior art, and details are not described herein again.
  • a part of the light rays a, b, c, d which are irradiated by the counter substrate 11 are directly reflected back by the metal particles 60 on the surface of the transparent conductive layer 42, and a part of the light is removed by the metal particles 60.
  • the metal layer 41 After scattering, it is incident on the metal layer 41, is reflected by the metal layer 41, and is incident on the liquid crystal layer 13 through the light-transmitting region between the metal particles 60, or the light reflected by the metal layer 41 is again scattered by the metal particles 60 by the metal particles 60. Then, it is directed to the liquid crystal layer 13 or the like.
  • the light that is irradiated by the opposite substrate is sufficiently scattered by the metal particles 60. Thereby, the uniformity of the display of the reflective display panel can be increased, and the display quality can be improved.
  • a specific embodiment of the present disclosure further provides a display device, which includes the above display panel provided by a specific embodiment of the present disclosure, and the display device may be: a mobile phone, a tablet computer, a liquid crystal television, or an organic light emitting diode.
  • OLED Organic Light Emitting Diode
  • Any product or component with display function such as TV, notebook computer, digital photo frame, navigator, etc.
  • Other essential components of the display device are understood by those of ordinary skill in the art and will not be described herein.
  • a specific embodiment of the present disclosure provides a method for fabricating an array substrate, comprising sequentially forming a reflective layer and a transparent conductive layer on a passivation layer; the reflective layer passes through a via hole penetrating the passivation layer and a source or a drain of the thin film transistor.
  • the electrode is electrically connected, the transparent conductive layer comprises a plurality of metal ions; the transparent conductive layer is subjected to a reduction treatment, so that the metal ions are reduced to form a metal particle layer; and the transparent conductive layer and the reflective layer completing the above steps are patterned to form a pixel electrode.
  • the reflective layer formed by the specific embodiment of the present disclosure can reflect external light well, and at the same time, the metal particle layer formed by the specific embodiment of the present disclosure can have a good diffuse reflection effect on the light irradiated to the transparent conductive layer. Disclosing the specific embodiment enables the viewer to see a uniform reflection effect at various viewing angles, and the specific embodiment of the present disclosure improves the display effect as compared with the prior art.

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
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Abstract

公开了一种阵列基板及其制作方法、显示面板、显示装置，用以使观看者能在各个视角都能观看到均匀的反射效果，提高显示效果。阵列基板的制作方法，包括在衬底基板上依次制作薄膜晶体管和钝化层的方法，还包括：在钝化层上依次形成反射层和透明导电层；反射层通过贯穿钝化层的过孔与薄膜晶体管的源极或漏极电连接，透明导电层包括若干金属离子；对透明导电层进行还原处理，使得金属离子被还原出来，形成一金属颗粒层；对完成上述步骤的透明导电层和反射层进行构图工艺，形成像素电极。

Description

阵列基板及其制作方法、显示面板、显示装置
本申请要求在2017年6月12日提交中国专利局、申请号为201710437796.0、发明名称为“一种阵列基板及其制作方法、显示面板、显示装置”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本公开涉及显示技术领域，尤其涉及一种阵列基板及其制作方法、显示面板、显示装置。
背景技术
现有的显示装置包括透射式显示装置、反射式显示装置和透反式显示装置。透射式显示装置主要以背光源作为光源，即透射式显示装置的显示面板需要设置背光源为显示面板提供光源，但其背光源利用率不高，为提高显示亮度就需要大幅度提高背光源的亮度，因此功耗较高。而反射式显示装置主要以前置光源或者外界光源作为光源，即反射式显示装置的显示面板后面不需要设置背光源，其主要利用外部光源为显示面板提供光源，功耗相对较低。
发明内容
本公开实施例提供了一种阵列基板及其制作方法、显示面板、显示装置，具体方案如下：
本公开实施例提供的一种阵列基板的制作方法，包括在衬底基板上依次制作薄膜晶体管和钝化层的方法，其中，该方法还包括：
在所述钝化层上依次形成反射层和透明导电层；所述反射层通过贯穿所述钝化层的过孔与所述薄膜晶体管的源极或漏极电连接，所述透明导电层包括若干金属离子；
对所述透明导电层进行还原处理，使得所述金属离子被还原出来，形成一金属颗粒层；
对完成上述步骤的所述透明导电层和所述反射层进行构图工艺，形成像素电极。
可选地，所述对所述透明导电层进行还原处理，使得所述金属离子被还原出来，形成一金属颗粒层，包括：
在还原性气体的工作环境中，对所述透明导电层进行等离子体处理，使得所述透明导电层包括的所述金属离子被还原出来，形成一金属颗粒层。
可选地，所述还原性气体为氢气、氯气、一氧化碳、硫化氢、溴化氢、甲烷、二氧化硫中的任一种气体。
可选地，所述金属颗粒层的厚度为所述透明导电层的厚度的1/10到1/5。
可选地，所述在所述钝化层上依次形成反射层和透明导电层，包括：
通过磁控溅射的方式，在所述钝化层上依次沉积一层金属层和一层透明导电层。
可选地，所述透明导电层为氧化铟锡、氧化铟锌、氧化锌中的任一种或任意组合。
本公开实施例还提供了一种采用上述的阵列基板的制作方法制作形成的阵列基板，包括依次位于衬底基板上的薄膜晶体管和钝化层，其中，还包括位于所述钝化层上的反射层和位于所述反射层上的透明导电层，所述透明导电层包括由若干金属颗粒形成的金属颗粒层。
可选地，所述金属颗粒层的厚度为所述透明导电层的厚度的1/10到1/5。
本公开实施例还提供了一种显示面板，该显示面板包括上述的阵列基板。
本公开实施例还提供了一种显示装置，该显示装置包括上述的显示面板。
附图说明
图1为现有技术的反射式显示面板的结构示意图；
图2为本公开实施例提供的一种阵列基板的制作方法流程图；
图3-图6为本公开实施例提供的一种阵列基板的制作过程中不同阶段的结构示意图；
图7为本公开实施例提供的一种显示面板的结构示意图；
图8为本公开实施例提供的阵列基板包括的像素电极对外界光线的散射示意图。
具体实施方式
相关技术的反射式显示装置的显示面板如图1所示，由对向基板11和阵列基板12对盒形成，对向基板11和阵列基板12之间的空间中封装有液晶层13，阵列基板12包括位于衬底基板120上的薄膜晶体管121、位于薄膜晶体管121上的钝化层127、位于钝化层127上的像素电极128，像素电极128采用能够反射光线的金属电极；其中：薄膜晶体管121包括栅极122、栅极绝缘层123、半导体有源层124、源极125和漏极126。
但是，该反射式显示装置的显示面板包括的像素电极反射的光线具有一定的方向，像素电极并不能使观看者在各个视角都能观看到均匀的反射效果。
有鉴于此，本公开实施例提供了一种阵列基板及其制作方法、显示面板、显示装置，用以使观看者能在各个视角都能观看到均匀的反射效果，提高显示效果。
为了使本公开的目的、技术方案和优点更加清楚，下面将结合附图对本公开作进一步地详细描述，显然，所描述的实施例仅仅是本公开一部分实施例，而不是全部的实施例。基于本公开中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其它实施例，都属于本公开保护的范围。
如图2所示，本公开具体实施例提供了一种阵列基板的制作方法，包括在衬底基板上依次制作薄膜晶体管和钝化层的方法，该方法还包括：
S201、在钝化层上依次形成反射层和透明导电层，反射层通过贯穿钝化层的过孔与薄膜晶体管的源极或漏极电连接，透明导电层包括若干金属离子；
S202、对透明导电层进行还原处理，使得金属离子被还原出来，形成一金属颗粒层；
S203、对完成上述步骤的透明导电层和反射层进行构图工艺，形成像素电极。
本公开具体实施例形成的像素电极既包括反射层，又包括透明导电层，反射层能够很好的反射外界光线，能够实现反射式的阵列基板，同时，由于本公开具体实施例提供对透明导电层进行了还原处理，形成了一层金属颗粒层，金属颗粒层的形成能够对照射到透明导电层的光线起到很好的漫反射作用，因此，本公开具体实施例能够使观看者在各个视角均都能观看到均匀的反射效果，与现有技术相比，本公开具体实施例提高了显示效果。
具体地，本公开具体实施例在衬底基板上制作薄膜晶体管包括：通过构图工艺在衬底基板上依次制作栅极、栅极绝缘层、半导体有源层、源极和漏极；或，通过构图工艺在衬底基板上依次制作遮光层、第一绝缘层、半导体有源层、栅极绝缘层、栅极、第二绝缘层、源极和漏极。
本公开具体实施例中的构图工艺包括光刻胶的涂覆、曝光、显影、刻蚀、去除光刻胶的部分或全部过程，本公开具体实施例制作薄膜晶体管的具体方法与现有技术类似，这里不再赘述。实际生产过程中，制作形成的薄膜晶体管可以为底栅型的薄膜晶体管，也可以为顶栅型的薄膜晶体管，当然还可以为其它类型的薄膜晶体管，本公开具体实施例并不对薄膜晶体管的类型做限定。
之后，本公开具体实施例在薄膜晶体管上通过构图工艺制作一层钝化层，钝化层的具体制作方法与现有技术类似，这里不再赘述，钝化层的具体材料选择与现有技术相同，这里不再赘述。
接着，在钝化层上依次形成反射层和透明导电层，具体地，通过磁控溅射的方式，在钝化层上依次沉积一层金属层和一层透明导电层。当然，在实际生产过程中，还可以通过其它方式沉积金属层和透明导电层，如：可以通过热蒸发的方式依次沉积一层金属层和一层透明导电层。
可选地，本公开具体实施例中金属层的材料可以选择钼(Mo)、铝(Al)、铜(Cu)、银(Ag)等中的任一种或任意组合。本公开具体实施例中透明导电 层的材料可以选择氧化铟锡(ITO)、氧化铟锌(IZO)、氧化锌(ZnO)中的任一种或任意组合，当然，在实际生产过程中，本公开具体实施例中的透明导电层还可以选择其它包括有若干金属离子的透明导电材料，本公开具体实施例并不对透明导电层的具体材料做限定。
接着，对透明导电层进行还原处理，使得透明导电层包括的金属离子被还原出来，形成一金属颗粒层，具体地，在还原性气体的工作环境中，对透明导电层进行等离子体处理，使得透明导电层包括的金属离子被还原出来，形成一金属颗粒层，由于目前等离子体处理工艺较成熟，因此，采用等离子体处理工艺对透明导电层进行处理能够保证工艺的稳定性，以及能够保证处理结果的良品率，这样，在还原性气体的工作环境中，通过等离子体处理后，能够很好的将透明导电层包括的金属离子还原出来。
可选地，本公开具体实施例中的还原性气体为氢气(H 2)、氯气(Cl 2)、一氧化碳(CO)、硫化氢(H 2S)、溴化氢(HBr)、甲烷(CH 4)、二氧化硫(SO 2)中的任一种气体。
可选地，本公开具体实施例形成的金属颗粒层的厚度为透明导电层的厚度的1/10到1/5，若本公开具体实施例形成的金属颗粒层的厚度较薄时，则不能起到很好的漫反射作用，若形成的金属颗粒层的厚度较厚时，则会影响本公开具体实施例的反射层的反光性能。
下面结合一个具体的实施例详细介绍本公开具体实施例提供的阵列基板的制作方法。
附图中各膜层厚度和区域大小、形状不反应各膜层的真实比例，目的只是示意说明本公开内容。
本公开具体实施例形成的薄膜晶体管以底栅型薄膜晶体管为例进行介绍。
如图3所示，首先，通过构图工艺在衬底基板120上依次制作栅极122、栅极绝缘层123、半导体有源层124、源极125、漏极126和钝化层127，具体地，通过构图工艺形成贯穿钝化层127且暴露漏极126的过孔30，本公开 具体实施例栅极122、栅极绝缘层123、半导体有源层124、源极125、漏极126和钝化层127的具体制作方法与现有技术类似，这里不再赘述。
接着，如图4所示，在钝化层127上通过磁控溅射的方式依次沉积一层金属层41和透明导电层42，金属层41通过贯穿钝化层127的过孔30与漏极126电连接，本公开具体实施例沉积的透明导电层42以氧化铟锡(ITO)为例。
接着，如图5所示，将完成上述步骤的衬底基板放入等离子体增强化学气相沉积设备中，并以氢气为工作气体对形成的透明导电层42(即ITO)层进行等离子体处理，图中的箭头方向表示等离子体的处理方向。由于以氢气为工作气体的等离子体具有很强的还原性，因此可以将ITO层包括的金属离子还原出来，从而在ITO层中析出大量的金属颗粒60，如图6所示，金属颗粒60组成一金属颗粒层。
本公开具体实施例中金属颗粒层中金属颗粒60的密度，以及金属颗粒层的厚度可以通过等离子体增强化学气相沉积设备的参数决定，例如增大工作气体氢气的流量、增大等离子体增强化学气相沉积设备中上部电极功率均可增加腔室中等离子体的密度，从而增加金属颗粒60的密度，并且相应的增大金属颗粒60组成的金属颗粒层的厚度。
在实际生产过程中，为了减小等离子体轰击对ITO层的破坏，应尽量减小等离子体增强化学气相沉积设备中下部电极的功率，以减小自偏压的大小；本公开具体实施例中采用等离子体增强化学气相沉积设备中的等离子体处理ITO的方式只是本公开具体实施例中的一种优选的实施方式，实际生产过程中，只要能够还原ITO层中金属离子的方式都可以采用。
另外，本公开具体实施例中选择的工作气体为氢气也只是本公开具体实施例的一种优选的实施方式，其它的还原性气体，如：Cl 2、CO、H 2S、HBr、CH 4、SO 2等均可以作为本公开具体实施例的工作气体，这些气体当被电离成等离子体后，皆具有很强的还原性。
下面简单的说明一下本公开具体实施例中对ITO层进行等离子体处理后形成金属颗粒的原理。
通常情况下，ITO薄膜是一种锡(Sn)掺杂的氧化铟(In 2O 3)薄膜，ITO薄膜中的Sn原子一般以SnO或Sn 2O的形式存在，利用二次离子质谱分析对ITO薄膜表面进行分析，得出其表面负离子O -、正离子In +为其主要成分，向等离子体增强化学气相沉积设备的腔室中通入H 2，H 2经过电离后形成氢(H +)离子，由于H +离子比ITO薄膜中的In +离子活性更强，因此能将In +离子从ITO薄膜中置换出来，In +离子在ITO薄膜表面沉积逐渐形成In金属单质，即形成In金属颗粒，In金属单质的具体结构为半球状或半椭球状。氢等离子体与氧化铟的反应方程式为：
In 2O 3+6H→2In+3H 2O
一般来说，H 2通入流量越大，浓度越大，则In金属单质的结构的形状越大，数量也越多，可以根据需要的散射效果来设置等离子体增强化学气相沉积设备的参数从而得到大小合适，数量合适的In金属单质。
具体实施时，向等离子体增强化学气相沉积设备的腔室中通入H 2，通过调节H 2的通入量的浓度(如：500sccm～2000sccm)、通入时间(如：5s～200s)，并通过控制等离子体增强化学气相沉积设备的腔室压强(如：500Pa～3000Pa)和温度(如：150℃～400℃)等工艺参数，使得ITO薄膜的上表面生产In金属单质，并可以对In金属单质的结构的大小、形状和厚度进行调节。
最后，本公开具体实施例通过一道掩膜板工艺，同时图案化金属层41和形成有金属颗粒60的透明导电层42，金属层41和透明导电层42一起被刻蚀制作完成，从而形成阵列基板的像素电极。像素电极的下部为金属层41，用来反射外界的光线，像素电极的上部为分布有若干金属颗粒60的透明导电层42，若干金属颗粒60组成的金属颗粒层作为光线的散射层。
本公开具体实施例在制作出阵列基板的像素电极膜层后，像素电极膜层包括顶层的透明导电层和底层的反射金属层，在还原性气体的工作环境中，利用等离子体进行处理，在顶层的透明导电层中析出金属颗粒层，通过这种方式，不需要增加额外的光刻工艺就在底部的反射金属层上方制作出一层金属颗粒层来实现漫反射的效果，不仅能提高显示效果，而且可以有效降低成 本。
基于同一发明构思，本公开具体实施例还提供了一种采用上述方法制作形成的阵列基板，包括依次位于衬底基板上的薄膜晶体管和钝化层，其中，还包括位于钝化层上的反射层和位于反射层上的透明导电层，透明导电层包括由若干金属颗粒形成的金属颗粒层。金属颗粒层能够对照射到透明导电层的光线起到很好的漫反射作用，因此，本公开具体实施例能够使观看者在各个视角均都能观看到均匀的反射效果。
可选地，本公开具体实施例中金属颗粒层的厚度为透明导电层的厚度的1/10到1/5，这个厚度的金属颗粒层不仅能起到很好的漫反射作用，而且不会影响反射层的反光性能。
基于同一发明构思，本公开具体实施例还提供了一种显示面板，该显示面板包括本公开具体实施例提供的上述阵列基板，如图7所示，该显示面板包括与本公开具体实施例提供的上述阵列基板相对设置的对向基板11，以及位于阵列基板和对向基板11之间的液晶层13，对向基板11的具体结构与现有技术相同，这里不再赘述。
如图7和图8所示，通过对向基板11照射进来的光线a、b、c、d中有一部分直接被透明导电层42表面的金属颗粒60反射回去，还有一部分光线被金属颗粒60散射后射向金属层41，被金属层41反射后，通过金属颗粒60之间的透光区域射向液晶层13，或者被金属层41反射后的光线再次经过金属颗粒60被金属颗粒60散射后射向液晶层13等。通过对向基板照射进来的光线被阵列基板反射回液晶层的光路种类很多，这里不再一一列举，本公开具体实施例外界通过对向基板照射进来的光线会被金属颗粒60充分地散射，从而可以增加反射式显示面板显示的均匀性，提高显示质量。
基于同一发明构思，本公开具体实施例还提供了一种显示装置，该显示装置包括本公开具体实施例提供的上述显示面板，该显示装置可以为：手机、平板电脑、液晶电视、有机发光二极管(Organic Light Emitting Diode，OLED)电视、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。 对于该显示装置的其它必不可少的组成部分均为本领域的普通技术人员应该理解具有的，在此不予赘述。
综上，本公开具体实施例提供一种阵列基板的制作方法，包括在钝化层上依次形成反射层和透明导电层；反射层通过贯穿钝化层的过孔与薄膜晶体管的源极或漏极电连接，透明导电层包括若干金属离子；对透明导电层进行还原处理，使得金属离子被还原出来，形成一金属颗粒层；对完成上述步骤的透明导电层和反射层进行构图工艺，形成像素电极。本公开具体实施例形成的反射层能够很好的反射外界光线，同时，本公开具体实施例形成的金属颗粒层能够对照射到透明导电层的光线起到很好的漫反射作用，因此，本公开具体实施例能够使观看者在各个视角均都能观看到均匀的反射效果，与现有技术相比，本公开具体实施例提高了显示效果。
显然，本领域的技术人员可以对本公开进行各种改动和变型而不脱离本公开的精神和范围。这样，倘若本公开的这些修改和变型属于本公开权利要求及其等同技术的范围之内，则本公开也意图包含这些改动和变型在内。

Claims (10)

  1. 一种阵列基板的制作方法，包括在衬底基板上依次制作薄膜晶体管和钝化层的方法，其中，该方法还包括：
    在所述钝化层上依次形成反射层和透明导电层；所述反射层通过贯穿所述钝化层的过孔与所述薄膜晶体管的源极或漏极电连接，所述透明导电层包括若干金属离子；
    对所述透明导电层进行还原处理，使得所述金属离子被还原出来，形成一金属颗粒层；
    对完成上述步骤的所述透明导电层和所述反射层进行构图工艺，形成像素电极。
  2. 根据权利要求1所述的制作方法，其中，所述对所述透明导电层进行还原处理，使得所述金属离子被还原出来，形成一金属颗粒层，包括：
    在还原性气体的工作环境中，对所述透明导电层进行等离子体处理，使得所述透明导电层包括的所述金属离子被还原出来，形成一金属颗粒层。
  3. 根据权利要求2所述的制作方法，其中，所述还原性气体为氢气、氯气、一氧化碳、硫化氢、溴化氢、甲烷、二氧化硫中的任一种气体。
  4. 根据权利要求1所述的制作方法，其中，所述金属颗粒层的厚度为所述透明导电层的厚度的1/10到1/5。
  5. 根据权利要求1所述的制作方法，其中，所述在所述钝化层上依次形成反射层和透明导电层，包括：
    通过磁控溅射的方式，在所述钝化层上依次沉积一层金属层和一层透明导电层。
  6. 根据权利要求5所述的制作方法，其中，所述透明导电层为氧化铟锡、氧化铟锌、氧化锌中的任一种或任意组合。
  7. 一种采用权利要求1-6任一项所述的制作方法制作形成的阵列基板，包括依次位于衬底基板上的薄膜晶体管和钝化层，其中，还包括位于所述钝 化层上的反射层和位于所述反射层上的透明导电层，所述透明导电层包括由若干金属颗粒形成的金属颗粒层。
  8. 根据权利要求7所述的阵列基板，其中，所述金属颗粒层的厚度为所述透明导电层的厚度的1/10到1/5。
  9. 一种显示面板，其中，包括权利要求7或权利要求8所述的阵列基板。
  10. 一种显示装置，其中，包括权利要求9所述的显示面板。
PCT/CN2018/086382 2017-06-12 2018-05-10 阵列基板及其制作方法、显示面板、显示装置 WO2018228097A1 (zh)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120235175A1 (en) * 2011-03-18 2012-09-20 Valeriy Prushinskiy Organic light-emitting display apparatus and method of manufacturing the same
CN103985717A (zh) * 2014-05-13 2014-08-13 京东方科技集团股份有限公司 一种阵列基板及其制备方法、显示装置
CN105280682A (zh) * 2015-09-08 2016-01-27 上海和辉光电有限公司 Oled显示面板及其制备方法
CN107170761A (zh) * 2017-06-12 2017-09-15 京东方科技集团股份有限公司 一种阵列基板及其制作方法、显示面板、显示装置

Family Cites Families (3)

* Cited by examiner, † Cited by third party
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KR100667082B1 (ko) * 2005-11-02 2007-01-10 삼성에스디아이 주식회사 유기전계발광소자 및 그 제조방법
CN103367165A (zh) * 2013-07-01 2013-10-23 北京京东方光电科技有限公司 薄膜晶体管及其制作方法、阵列基板及显示器
CN104637970B (zh) * 2015-03-03 2018-03-06 京东方科技集团股份有限公司 阵列基板及其制作方法、x射线平板探测器、摄像系统

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120235175A1 (en) * 2011-03-18 2012-09-20 Valeriy Prushinskiy Organic light-emitting display apparatus and method of manufacturing the same
CN103985717A (zh) * 2014-05-13 2014-08-13 京东方科技集团股份有限公司 一种阵列基板及其制备方法、显示装置
CN105280682A (zh) * 2015-09-08 2016-01-27 上海和辉光电有限公司 Oled显示面板及其制备方法
CN107170761A (zh) * 2017-06-12 2017-09-15 京东方科技集团股份有限公司 一种阵列基板及其制作方法、显示面板、显示装置

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