WO2018223835A1 - 显示基板及其驱动方法和显示面板 - Google Patents

显示基板及其驱动方法和显示面板 Download PDF

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Publication number
WO2018223835A1
WO2018223835A1 PCT/CN2018/087652 CN2018087652W WO2018223835A1 WO 2018223835 A1 WO2018223835 A1 WO 2018223835A1 CN 2018087652 W CN2018087652 W CN 2018087652W WO 2018223835 A1 WO2018223835 A1 WO 2018223835A1
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Prior art keywords
sub
electrode
electrodes
connection pattern
substrate
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PCT/CN2018/087652
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English (en)
French (fr)
Inventor
黄炜赟
祁小敬
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京东方科技集团股份有限公司
成都京东方光电科技有限公司
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Publication of WO2018223835A1 publication Critical patent/WO2018223835A1/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0412—Digitisers structurally integrated in a display
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416—Control or interface arrangements specially adapted for digitisers
    • G06F3/04164—Connections between sensors and controllers, e.g. routing lines between electrodes and connection pads
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416—Control or interface arrangements specially adapted for digitisers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/40—OLEDs integrated with touch screens
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8051—Anodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8052—Cathodes
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2203/00—Indexing scheme relating to G06F3/00 - G06F3/048
    • G06F2203/041—Indexing scheme relating to G06F3/041 - G06F3/045
    • G06F2203/04102—Flexible digitiser, i.e. constructional details for allowing the whole digitising part of a device to be flexed or rolled like a sheet of paper
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8051—Anodes
    • H10K59/80515—Anodes characterised by their shape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8052—Cathodes
    • H10K59/80521—Cathodes characterised by their shape

Definitions

  • Embodiments of the present disclosure relate to a display substrate, a driving method thereof, and a display panel.
  • An organic light emitting diode display such as an AMOLED (Active-Matrix Organic Light Emitting Diode) display generally has a touch function.
  • AMOLED Active-Matrix Organic Light Emitting Diode
  • Embodiments of the present disclosure provide a display substrate including: a substrate substrate;
  • each of the first electrodes includes a plurality of first sub-electrodes An electrode, the first sub-electrodes are connected, each of the second electrodes comprises a plurality of second sub-electrodes, and the second sub-electrodes are connected;
  • the first sub-electrode is configured to load a common electrode voltage during a display phase and load a touch driving voltage during a touch phase;
  • the second sub-electrode is configured to load a common electrode voltage during a display phase and a touch-sensing voltage during a touch phase.
  • the display substrate further includes:
  • first sub-electrodes are connected by the first connection pattern
  • the first connection pattern is located in a different layer from the first sub-electrode, and the second connection pattern is disposed in the same layer as the second sub-electrode.
  • the first connection pattern and the first sub-electrode are located in different layers, and the second connection pattern and the second sub-electrode are located in different layers.
  • the first connection pattern is located above the base substrate, and the first sub-electrode is located above the first connection pattern, and correspondingly above each of the first connection patterns
  • There are two first vias each of the first vias corresponding to one of the first sub-electrodes, and each of the first sub-electrodes passes through the corresponding first via and the first connection pattern Connecting so that two adjacent first sub-electrodes are connected by the first connection pattern.
  • the display substrate further includes:
  • planarization layer is closer to the substrate substrate than the pixel aperture layer, the first via hole passing through the planarization layer and the pixel aperture layer.
  • the first connection pattern is located above the base substrate, the second connection pattern is located above the first connection pattern, and the first sub-electrode is located at the first connection Above the figure, the second sub-electrode is located above the second connection pattern, and each of the first connection patterns is correspondingly provided with two first via holes, above each of the second connection patterns Correspondingly, there are two second through holes;
  • Each of the first vias corresponds to one of the first sub-electrodes, and each of the first sub-electrodes is connected to the first connection pattern through a corresponding first via hole so that two adjacent ones The first sub-electrodes are connected by the first connection pattern;
  • Each of the second vias corresponds to one of the second sub-electrodes, and each of the second sub-electrodes is connected to the second connection pattern through a corresponding second via hole so that two adjacent ones The second sub-electrodes are connected by the second connection pattern.
  • the display substrate further includes:
  • the flat layer is closer to the substrate substrate than the pixel opening layer
  • the second connection pattern is between the flat layer and the pixel opening layer
  • the first via hole passes through the flat layer and the pixel opening layer
  • the second via passes through the pixel aperture layer.
  • the display substrate further includes:
  • the luminescent layer is located above the third electrode, a portion of the first sub-electrode is located above the luminescent layer; the first sub-electrode is a cathode, the third electrode is an anode, or The first sub-electrode is an anode and the third electrode is a cathode; and/or
  • the luminescent layer is located above the third electrode, a portion of the second sub-electrode is located above the luminescent layer; the second sub-electrode is a cathode, the third electrode is an anode, or The second sub-electrode is an anode and the third electrode is a cathode.
  • the orthographic projection of each of the first sub-electrode and the second sub-electrode on the substrate substrate covers an orthographic projection of the plurality of light-emitting layers on the substrate substrate.
  • the orthographic projection of each of the first sub-electrode and the second sub-electrode on the substrate substrate covers an orthographic projection of the four luminescent layers on the substrate.
  • the first sub-electrode and the second sub-electrode are disposed in the same layer.
  • Embodiments of the present disclosure also provide a display panel including the above display substrate.
  • An embodiment of the present disclosure further provides a driving method of a display substrate, the display substrate including: a substrate substrate; and a plurality of first electrodes and a plurality of second electrodes on the substrate, the first The electrode and the second electrode are disposed at intersection and insulated from each other, each of the first electrodes includes a plurality of first sub-electrodes, the first sub-electrodes are connected, and each of the second electrodes includes a plurality of second a sub-electrode, the second sub-electrode being connected;
  • the driving method includes:
  • the first sub-electrode is loaded with a touch driving voltage, and the second sub-electrode outputs a touch sensing voltage.
  • loading the common electrode voltage on the first sub-electrode and the second sub-electrode includes:
  • Each of the first sub-electrodes loads a corresponding common electrode voltage and each of the second sub-electrodes loads a corresponding common electrode voltage.
  • FIG. 1 is a schematic structural diagram of a display substrate according to an embodiment of the present disclosure
  • FIG. 2 is a plan view showing the first sub-electrode and the second sub-electrode shown in FIG. 1;
  • FIG. 3 is a schematic structural diagram of a display substrate according to another embodiment of the present disclosure.
  • FIG. 4 is a plan view showing the first sub-electrode and the second sub-electrode shown in FIG. 3;
  • FIG. 5 is a timing chart of driving of a display substrate according to an embodiment of the present disclosure.
  • FIG. 6 is a schematic diagram of voltage loading before compensation of a display substrate according to an embodiment of the present disclosure
  • FIG. 7 is a schematic diagram of voltage loading after compensation of a display substrate according to an embodiment of the present disclosure.
  • FIG. 1 is a schematic structural diagram of a display substrate according to an embodiment of the present disclosure. As shown in FIG. 1 , the display substrate includes a base substrate 1 and a plurality of first electrodes and a plurality of first electrodes on the base substrate 1 .
  • each of the first electrodes includes a plurality of first sub-electrodes 5, and the first sub-electrodes 5 are connected, and each of the second electrodes includes a plurality of second sub-electrodes
  • the electrode 7 and the second sub-electrode 7 are connected; the first sub-electrode 5 is used for loading the common electrode voltage during the display phase and the touch driving voltage is loaded during the touch phase; the second sub-electrode 7 is for loading the common electrode during the display phase The voltage and the touch sensing voltage are output during the touch phase.
  • the plurality of first sub-electrodes 5 are sequentially connected to form a first electrode
  • the plurality of second sub-electrodes 7 are sequentially connected to form a second electrode.
  • FIG. 2 is a schematic plan view of the first sub-electrode and the second sub-electrode shown in FIG. 1.
  • the display substrate further includes a first connection pattern 8 and a second connection pattern on the substrate substrate 1. 12; the first sub-electrodes 5 are connected by a first connection pattern 8; the second sub-electrodes 7 are connected by a second connection pattern 12.
  • Fig. 2 is a plan view schematically showing the substrate substrate 1 in the direction of the first sub-electrode 5 in Fig. 1.
  • the plurality of first electrodes are arranged in the row direction, and the plurality of second electrodes are arranged in the column direction, and the display substrate includes a plurality of rows of first electrodes and a plurality of rows of second electrodes.
  • the plurality of rows of first electrodes and the plurality of columns of second electrodes are disposed across each other and insulated from each other.
  • Each row of the first electrode includes a plurality of first sub-electrodes 5 arranged in series and sequentially connected
  • each of the second electrodes includes a plurality of second sub-electrodes 7 sequentially connected in sequence.
  • the first sub-electrode 5 and the second sub-electrode 7 are disposed in the same layer.
  • first connection pattern 8 and the first sub-electrode 5 are located in different layers, and the second connection pattern 12 is disposed in the same layer as the second sub-electrode 7.
  • the material of the first sub-electrode 5 is a transparent conductive material
  • the material of the second sub-electrode 7 is a transparent conductive material
  • the material of the first connection pattern 8 is metal; since the second connection pattern 12 is disposed in the same layer as the second sub-electrode 7, the material of the second connection pattern 12 and the material of the second sub-electrode 7 are the same.
  • the second connection pattern 12 and the second sub-electrode 7 may be integrated.
  • the first connection pattern 8 is located above the substrate 1 and the first sub-electrode 5 is located above the first connection pattern 8.
  • the first connection pattern 8 is disposed above the first connection pattern 8.
  • the first via hole 6 is correspondingly disposed with two first via holes 6 respectively.
  • Each of the first via holes 6 corresponds to one first sub-electrode 5, and each of the first sub-electrodes 5 passes through a corresponding one.
  • the first via 6 is connected to the first connection pattern 8 such that the adjacent two first sub-electrodes 5 are connected by the first connection pattern 8. In this embodiment, the bridging between the adjacent two first sub-electrodes 5 is achieved by the first connection pattern 8.
  • the display substrate further includes a flat layer 2 and a pixel opening layer 3, the flat layer 2 is located above the first connection pattern 8, and the pixel aperture layer 3 is located above the flat layer 2, and the first sub-electrode 5 And the second sub-electrode 7 are both located above the pixel opening layer 3.
  • the first via 6 is disposed in the flat layer 2 and the pixel opening layer 3 above the first connection pattern 8.
  • the portion of the first sub-electrode 5 corresponding to the first via 6 is located in the first via 6 and is first
  • the connection pattern 8 is in contact, so that the first sub-electrode 5 is connected to the first connection pattern 8.
  • the display substrate further includes a third electrode 41 and a light emitting layer 42.
  • the luminescent layer 42 is located above the third electrode 41, a portion of the first sub-electrode 5 is located above the luminescent layer 42, the third electrode 41, the luminescent layer 42 and a portion of the first sub-electrode 5 form the OLED 4; and/or the luminescent layer 42 Located above the third electrode 41, a portion of the second sub-electrode 7 is located above the luminescent layer 42, and the third electrode 41, the luminescent layer 42 and a portion of the second sub-electrode 7 form the OLED 4.
  • the display substrate further includes a Thin Film Transistor (TFT) 9, the OLED 4 is located above the TFT 9, and the OLED 4 is connected to the TFT 9.
  • TFT 9 includes a gate electrode, an active layer, a source and a drain, an active layer above the gate, a source on the active layer, a drain on the active layer, and a drain connected to the third electrode 41.
  • the third electrode 41 may be a pixel electrode.
  • the third electrode 41 is the anode of the OLED 4; or, if the first sub-electrode 5 is the anode of the OLED 4, the third electrode 41 is the cathode of the OLED 4. Further, if the second sub-electrode 7 is the cathode of the OLED 4, the third electrode 41 is the anode of the OLED 4; or, if the second sub-electrode 7 is the anode of the OLED 4, the third electrode 41 is the cathode of the OLED 4.
  • the positional relationship between the components of the TFT 9 and the first connection pattern 8 and the flat layer 2 may be any suitable positional relationship, and the TFT 9 shown in the figure is only an example.
  • the first connection pattern 8 may be separately disposed, or the first connection pattern 8 may be disposed in the same layer as other metal layers, which is not limited herein.
  • each of the first sub-electrodes 5 is disposed corresponding to the plurality of OLEDs 4, and each of the second sub-electrodes 7 is disposed corresponding to the plurality of OLEDs 4.
  • each of the first sub-electrodes 5 is disposed corresponding to the four OLEDs 4, and each of the second sub-electrodes 7 is disposed corresponding to the four OLEDs 4.
  • each of the first sub-electrodes 5 may be disposed corresponding to more (for example, 9) OLEDs 4, and each of the second sub-electrodes 7 may be disposed corresponding to more (for example, 9) OLEDs 4.
  • the orthographic projection of each of the first sub-electrode 5 and the second sub-electrode 7 on the substrate substrate 1 covers a plurality of (for example, four, nine) light-emitting layers 42 or OLEDs 4 on the base substrate. Orthographic projection on 1.
  • the shape of the first sub-electrode 5 is a diamond shape
  • the shape of the second sub-electrode 7 is a diamond shape
  • the first sub-electrode 5 and the second sub-electrode 7 may also have a square shape. Both the first sub-electrode 5 and the second sub-electrode 7 may have other shapes, which are not enumerated here.
  • the first sub-electrode 5 serves as a common electrode, the first sub-electrode 5 is loaded with a common electrode voltage, the second sub-electrode 7 is used as a common electrode, and the second sub-electrode 7 is loaded with a common electrode voltage.
  • the first sub-electrode 5 serves as a driving electrode, and the first sub-electrode 5 is loaded with a touch driving voltage.
  • the second sub-electrode 7 serves as a sensing electrode, and the second sub-electrode 7 outputs a touch-sensing voltage.
  • the first electrode and the second electrode are disposed at intersection and insulated from each other, and each of the first electrodes includes a plurality of first sub-electrodes, and the first sub-electrodes are connected, and each of the second electrodes includes a plurality of a second sub-electrode, the second sub-electrode is connected, the first sub-electrode is used to load the common electrode voltage in the display phase and the touch driving voltage is loaded in the touch phase, and the second sub-electrode is used to load the common electrode in the display phase The voltage and the touch sensing voltage are output during the touch phase.
  • the display substrate in this embodiment realizes touch and display through time-division driving without adding an additional process, thereby reducing process complexity and reducing The cost.
  • the display substrate in this embodiment realizes touch and display by time-division driving without adding an additional process, thereby improving the stability of the display substrate, particularly the stability of the flexible display substrate.
  • FIG. 3 is a schematic structural view of a display substrate according to another embodiment of the present disclosure
  • FIG. 4 is a schematic plan view of the first sub-electrode and the second sub-electrode shown in FIG. 3, as shown in FIG. 3 and FIG.
  • the difference between this embodiment and the embodiment shown in FIG. 1 and FIG. 2 is that the first connection pattern 8 and the first sub-electrode 5 are located in different layers, and the second connection pattern 10 and the second sub-electrode 7 are located in different layers.
  • FIG. 4 is a schematic plan view of the substrate substrate 1 as viewed from the direction of the first sub-electrode 5 in FIG.
  • the material of the first sub-electrode 5 is a transparent conductive material
  • the material of the second sub-electrode 7 is a transparent conductive material
  • the material of the first connection pattern 8 is metal
  • the material of the second connection pattern 10 is metal.
  • the first connection pattern 8 is located above the base substrate 1
  • the second connection pattern 10 is located above the first connection pattern 8
  • the first sub-electrode 5 is located at the first connection.
  • the second sub-electrode 7 is located above the second connection pattern 10.
  • Each of the first connection patterns 5 is correspondingly provided with two first via holes 6, and the upper portion of each of the second connection patterns 10 is correspondingly disposed.
  • Each of the first vias 6 corresponds to a first sub-electrode 5, and each of the first sub-electrodes 5 is connected to the first connection pattern 8 through a corresponding first via 6 so that two adjacent first sub-electrodes 5 is connected by the first connection pattern 8.
  • Each of the second vias 11 corresponds to a second sub-electrode 7, and each of the second sub-electrodes 7 is connected to the second connection pattern 10 through a corresponding second via 11 so that two adjacent second sub-electrodes 7 is connected by the second connection pattern 10.
  • the bridging between the adjacent two first sub-electrodes 5 is realized by the first connection pattern 8; the bridging of the adjacent two second sub-electrodes 7 is realized by the second connection pattern 10,
  • the display substrate further includes a flat layer 2 and a pixel opening layer 3, the flat layer 2 is located above the first connection pattern 8, and the pixel aperture layer 3 is located above the flat layer 2, and the first sub-electrode 5
  • the second sub-electrode 7 is located above the pixel opening layer 3, and the second connection pattern 10 is located between the flat layer 2 and the pixel opening layer 3.
  • the first via 6 is disposed in the flat layer 2 and the pixel opening layer 3 above the first connection pattern 8.
  • the portion of the first sub-electrode 5 corresponding to the first via 6 is located in the first via 6 and is first
  • the connection pattern 8 is in contact, so that the first sub-electrode 5 is connected to the first connection pattern 8.
  • the second via hole 11 is disposed in the pixel opening layer 3 above the second connection pattern 10, and the portion of the second sub-electrode 7 corresponding to the second via hole 11 is located in the second via hole 11 and is in contact with the second connection pattern 10. Thereby, the second sub-electrode 7 is connected to the second connection pattern 10.
  • the positional relationship between the components of the TFT 9 and the first connection pattern 8 and the flat layer 2 may be any suitable positional relationship, and the TFT 9 shown in the figure is only an example.
  • the first connection pattern 8 may be separately set, or the first connection pattern 8 may be disposed in the same layer as other metal layers, which is not limited herein;
  • the second connection pattern 10 may be separately set, or the second connection pattern 10 may be separately provided. It can be disposed in the same layer as other metal layers, and is not limited herein.
  • first via hole 6 and the second via hole 11 in FIG. 3 are not in one cross section, and the first via hole 6 and the second via hole 11 are clearly shown in FIG.
  • the first via 6 and the second via 11 are drawn in one section. The specific locations of the first via 6 and the second via 11 can be seen in FIG.
  • the first electrode and the second electrode are disposed at intersection and insulated from each other, and each of the first electrodes includes a plurality of first sub-electrodes, and the first sub-electrodes are connected, and each of the second electrodes includes a plurality of a second sub-electrode, the second sub-electrode is connected, the first sub-electrode is used to load the common electrode voltage in the display phase and the touch driving voltage is loaded in the touch phase, and the second sub-electrode is used to load the common electrode in the display phase The voltage and the touch sensing voltage are output during the touch phase.
  • the display substrate in this embodiment realizes touch and display through time-division driving without adding an additional process, thereby reducing process complexity and reducing The cost.
  • the display substrate in this embodiment realizes touch and display by time-division driving without adding an additional process, thereby improving the stability of the display substrate, particularly the stability of the flexible display substrate.
  • An embodiment of the present disclosure further provides a display panel including the display substrate of any of the above embodiments.
  • the first electrode and the second electrode are disposed at intersection and insulated from each other, and each of the first electrodes includes a plurality of first sub-electrodes, and the first sub-electrodes are connected, and each of the second electrodes includes a plurality of a second sub-electrode, the second sub-electrode is connected, the first sub-electrode is used to load the common electrode voltage in the display phase and the touch driving voltage is loaded in the touch phase, and the second sub-electrode is used to load the common electrode in the display phase The voltage and the touch sensing voltage are output during the touch phase.
  • the display panel in this embodiment realizes touch and display through time-division driving without adding additional processes, thereby reducing process complexity and reducing The cost.
  • the display panel in this embodiment realizes touch and display by time-division driving without adding an additional process, thereby improving the stability of the display panel, particularly the stability of the flexible display panel.
  • Embodiments of the present disclosure also provide a driving method of a display substrate including a substrate substrate and a plurality of first electrodes and a plurality of second electrodes on the substrate substrate, the first electrodes and the second electrodes are disposed at intersection And insulated from each other, each of the first electrodes includes a plurality of first sub-electrodes, and the first sub-electrodes are connected, and each of the second electrodes includes a plurality of second sub-electrodes, and the second sub-electrodes are connected.
  • the method includes:
  • the common electrode voltage is applied to the first sub-electrode and the second sub-electrode;
  • the first sub-electrode is loaded with a touch driving voltage, and the second sub-electrode outputs a touch sensing voltage.
  • the driving method of the display substrate can be used for the display substrate provided by any of the above embodiments.
  • the first sub-electrode is used as the electrode of the OLED and the touch electrode
  • the second sub-electrode is used as the electrode of the OLED and the touch electrode
  • FIG. 5 is a driving timing diagram of a display substrate according to an embodiment of the present disclosure. As shown in FIG. 5, the driving time per frame is divided into two time segments, one time segment is a display phase, and the other time segment is a touch phase. .
  • the emission (Emission, EM for short) signal loaded on the gate of the TFT is a low level signal, and the TFT is turned on under the control of the EM signal.
  • the pixel voltage can be output to the third electrode through the turned-on TFT, and the common electrode voltage is output to the first sub-electrode and the common electrode voltage is output to the second sub-electrode.
  • the EM signal loaded on the gate of the TFT is a high level signal, and the TFT is turned off under the control of the EM signal.
  • the touch driving voltage can be output to the first sub-electrode, the touch driving voltage can be a pulse signal, and the second sub-electrode can output the touch sensing voltage.
  • the display and touch processes are required under the control of the field sync (VSYNC) signal and the line sync (HSYNC) signal.
  • the EM signal control switch in the process of switching to the touch phase during the display phase, the EM signal control switch jumps in advance for a short period of time, and similarly, during the touch phase to switch to the display phase.
  • the EM signal control switch jumps at a short time to form a buffer to avoid crosstalk in the display phase during the touch phase.
  • the common electrode voltages applied to each of the first sub-electrodes and each of the second sub-electrodes are the same.
  • FIG. 6 is a schematic diagram of voltage loading before compensation of a display substrate according to an embodiment of the present disclosure.
  • the voltage input terminal outputs a common electrode voltage V ref to the first sub-electrode 5, and the resistor has a resistance. R A , and the resistance R A will produce a voltage drop.
  • the voltage finally applied to the first sub-electrode 5 is V ref - ⁇ V IRA ; the voltage input terminal is second
  • the common electrode voltage V ref is outputted on the sub-electrode 7, and the resistor R B generates a voltage drop due to the presence of the resistor R B , and is finally applied to the second sub-electrode 7 under the influence of the voltage drop ⁇ V IRB generated by the resistor R B .
  • the voltage is V ref - ⁇ V IRB .
  • each of the first sub-electrodes is loaded with a corresponding common electrode voltage and each of the second sub-electrodes is loaded with a corresponding common electrode voltage.
  • 7 is a schematic diagram of voltage loading after compensation of the display substrate in the fourth embodiment. As shown in FIG. 7, in the display phase, the voltage input terminal outputs a corresponding common electrode voltage V ref + ⁇ V IRA to the first sub-electrode 5 due to The wiring has a resistance R A , and the resistor R A generates a voltage drop.
  • the first electrode and the second electrode are disposed at intersection and insulated from each other, and each of the first electrodes includes a plurality of first sub-electrodes, and the first sub-electrodes are connected, and each second The electrode includes a plurality of second sub-electrodes connected between the second sub-electrodes, the first sub-electrode is configured to load the common electrode voltage during the display phase and the touch driving voltage is loaded during the touch phase, and the second sub-electrode is used in the display phase The common electrode voltage is loaded and the touch sensing voltage is output during the touch phase.
  • the display substrate in this embodiment realizes touch and display through time-division driving without adding an additional process, thereby reducing process complexity. And reduce costs.
  • the display substrate in this embodiment realizes touch and display by time-division driving without adding an additional process, thereby improving the stability of the display substrate, particularly the stability of the flexible display substrate.
  • the purpose of independently inputting the common electrode voltage is achieved, and the output is common through the voltage input end.
  • the electrode voltage is compensated such that the voltage applied to each of the first sub-electrodes and each of the second sub-electrodes is the same, thereby avoiding the phenomenon of uneven display of the picture generated during the display phase, and improving the uniformity of the display of the picture.
  • the embodiment of the present disclosure further provides a method for fabricating a display substrate, which can be used to fabricate the display substrate of the embodiment shown in FIG. 1 and FIG. 2, the method comprising:
  • Step 101 forming a first connection pattern 8, a TFT 9, a flat layer 2, a pixel aperture layer 3, a first via 6 and a third electrode 41 on the base substrate 1.
  • the openings in the first connection pattern 8, the TFT 9, the first via 6, the third electrode 41, and the pixel opening layer 3 in this step may be formed by a patterning process, wherein the patterning process may include photoresist coating Processes such as coating, exposure, development, etching, and photoresist stripping.
  • the patterning process may include photoresist coating Processes such as coating, exposure, development, etching, and photoresist stripping.
  • Step 102 forming a light-emitting layer 42 on the third electrode 41 by an evaporation process.
  • Step 103 forming a first sub-electrode 5 and a second sub-electrode 7 by an evaporation process.
  • step 102 it is necessary to ensure that the first via 6 is not covered by the evaporation material.
  • the embodiment of the present disclosure further provides another method for fabricating a display substrate, which can be used to fabricate the display substrate of the embodiment shown in FIG. 3 and FIG. 4, the method comprising:
  • Step 201 forming a first connection pattern 8, a TFT 9, a flat layer 2, a second connection pattern 10, a pixel aperture layer 3, a first via 6, a second via 11, and a third electrode on the base substrate 1.
  • the first connection pattern 8, the TFT 9, the second connection pattern 10, the first via 6, the second via 11, the third electrode 41, and the opening in the pixel opening layer 3 in this step can be formed by a patterning process.
  • the patterning process may include processes such as photoresist coating, exposure, development, etching, and photoresist stripping.
  • Step 202 forming a light-emitting layer 42 on the third electrode 41 by an evaporation process.
  • Step 203 forming a first sub-electrode 5 and a second sub-electrode 7 by an evaporation process.
  • step 202 it is necessary to ensure that the first via hole 6 and the second via hole 11 are not covered by the evaporation material.

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Abstract

本公开的实施例公开了一种显示基板、显示面板及驱动方法，该显示基板包括衬底基板和位于衬底基板上的多个第一电极和多个第二电极，第一电极和第二电极交叉设置且相互绝缘，每个第一电极包括多个第一子电极，第一子电极之间连接，每个第二电极包括多个第二子电极，第二子电极之间连接；第一子电极用于在显示阶段加载公共电极电压以及在触控阶段加载触控驱动电压；第二子电极用于在显示阶段加载公共电极电压以及在触控阶段输出触控感应电压。

Description

显示基板及其驱动方法和显示面板
相关申请的交叉引用
本申请要求于2017年6月9日递交中国专利局的、申请号为201710437502.4的中国专利申请的权益，该申请的全部公开内容以引用方式并入本文。
技术领域
本公开的实施例涉及一种显示基板及其驱动方法和显示面板。
背景技术
诸如AMOLED(Active-matrix organic light emitting diode，有源矩阵有机发光二极体)显示器的有机发光二极体显示器通常具有触控功能。
发明内容
本公开的实施例提供了一种显示基板，包括：衬底基板；和
位于所述衬底基板上的多个第一电极和多个第二电极，所述第一电极和所述第二电极交叉设置且相互绝缘，每个所述第一电极包括多个第一子电极，所述第一子电极之间连接，每个所述第二电极包括多个第二子电极，所述第二子电极之间连接；
其中所述第一子电极用于在显示阶段加载公共电极电压以及在触控阶段加载触控驱动电压；以及
其中所述第二子电极用于在显示阶段加载公共电极电压以及在触控阶段输出触控感应电压。
根据本公开的实施例，所述显示基板还包括：
位于所述衬底基板上的第一连接图形和第二连接图形；
其中所述第一子电极之间通过所述第一连接图形连接；并且
其中所述第二子电极之间通过所述第二连接图形连接。
根据本公开的实施例，所述第一连接图形与所述第一子电极位于不 同层，并且所述第二连接图形与所述第二子电极同层设置。
根据本公开的实施例，所述第一连接图形与所述第一子电极位于不同层，所述第二连接图形与所述第二子电极位于不同层。
根据本公开的实施例，所述第一连接图形位于所述衬底基板的上方，所述第一子电极位于所述第一连接图形的上方，每个所述第一连接图形的上方对应设置有两个第一过孔，每个所述第一过孔对应于一个所述第一子电极，每个所述第一子电极通过对应的所述第一过孔与所述第一连接图形连接，以使相邻的两个所述第一子电极通过所述第一连接图形连接。
根据本公开的实施例，所述显示基板还包括：
位于所述第一连接图形与所述第一子电极和第二子电极之间的平坦层和像素开孔层，
其中平坦层比像素开孔层更靠近衬底基板，所述第一过孔穿过所述平坦层和像素开孔层。
根据本公开的实施例，所述第一连接图形位于所述衬底基板的上方，所述第二连接图形位于所述第一连接图形的上方，所述第一子电极位于所述第一连接图形的上方，所述第二子电极位于所述第二连接图形的上方，每个所述第一连接图形的上方对应设置有两个第一过孔，每个所述第二连接图形的上方对应设置有两个第二过孔；
每个所述第一过孔对应于一个所述第一子电极，每个所述第一子电极通过对应的所述第一过孔与所述第一连接图形连接，以使相邻的两个所述第一子电极通过所述第一连接图形连接；以及
每个所述第二过孔对应于一个所述第二子电极，每个所述第二子电极通过对应的所述第二过孔与所述第二连接图形连接，以使相邻的两个所述第二子电极通过所述第二连接图形连接。
根据本公开的实施例，所述显示基板还包括：
位于所述第一连接图形与所述第一子电极和第二子电极之间的平坦层和像素开孔层，
其中平坦层比像素开孔层更靠近衬底基板，所述第二连接图形位于平坦层和像素开孔层之间，所述第一过孔穿过所述平坦层和像素开孔层， 且第二过孔穿过像素开孔层。
根据本公开的实施例，所述显示基板还包括：
第三电极和发光层；
其中所述发光层位于所述第三电极之上，部分所述第一子电极位于所述发光层之上；所述第一子电极为阴极，所述第三电极为阳极，或者，所述第一子电极为阳极，所述第三电极为阴极；和/或
其中所述发光层位于所述第三电极之上，部分所述第二子电极位于所述发光层之上；所述第二子电极为阴极，所述第三电极为阳极，或者，所述第二子电极为阳极，所述第三电极为阴极。
根据本公开的实施例，所述第一子电极和所述第二子电极中的每一个在衬底基板上的正投影覆盖多个发光层在衬底基板上的正投影。
根据本公开的实施例，所述第一子电极和所述第二子电极中的每一个在衬底基板上的正投影覆盖4个发光层在衬底基板上的正投影。
根据本公开的实施例，所述第一子电极和所述第二子电极同层设置。
本公开的实施例还提供了一种显示面板，包括上述显示基板。
本公开的实施例还提供了一种显示基板的驱动方法，所述显示基板包括：衬底基板和位于所述衬底基板上的多个第一电极和多个第二电极，所述第一电极和所述第二电极交叉设置且相互绝缘，每个所述第一电极包括多个第一子电极，所述第一子电极之间连接，每个所述第二电极包括多个第二子电极，所述第二子电极之间连接；
所述驱动方法包括：
在显示阶段，所述第一子电极和所述第二子电极上加载公共电极电压；以及
在触控阶段，所述第一子电极上加载触控驱动电压，所述第二子电极输出触控感应电压。
根据本公开的实施例，所述第一子电极和所述第二子电极上加载公共电极电压包括：
每个第一子电极加载对应的公共电极电压以及每个第二子电极加载对应的公共电极电压。
附图说明
图1为本公开的一个实施例提供的一种显示基板的结构示意图；
图2为图1中所示的第一子电极和第二子电极的平面示意图；
图3为本公开的另一个实施例提供的一种显示基板的结构示意图；
图4为图3中所示的第一子电极和第二子电极的平面示意图；
图5为本公开的实施例的显示基板的驱动时序图；
图6为本公开的实施例的对显示基板补偿前的电压加载示意图；以及
图7为本公开的实施例的对显示基板补偿后的电压加载示意图。
具体实施方式
为使本领域的技术人员更好地理解本公开的实施例的技术方案，下面结合附图对本公开的实施例中的技术方案进行清楚、完整的描述，显然，所描述的实施例是本公开的一部分实施例，而不是全部的实施例。基于本公开的实施例，本领域普通技术人员在没有做出创造性劳动的前提下所获得的所有其他实施例，都属于本公开保护的范围。
图1为本公开的一个实施例提供的一种显示基板的结构示意图，如图1所示，该显示基板包括衬底基板1和位于衬底基板1上的多个第一电极和多个第二电极，第一电极和第二电极交叉设置且相互绝缘，每个第一电极包括多个第一子电极5，第一子电极5之间连接，每个第二电极包括多个第二子电极7，第二子电极7之间连接；第一子电极5用于在显示阶段加载公共电极电压以及在触控阶段加载触控驱动电压；第二子电极7用于在显示阶段加载公共电极电压以及在触控阶段输出触控感应电压。
本实施例中，多个第一子电极5依次相连接形成第一电极，多个第二子电极7依次相连接形成第二电极。
图2为图1中所示的第一子电极和第二子电极的平面示意图，如图2所示，该显示基板还包括位于衬底基板1上的第一连接图形8和第二连接图形12；第一子电极5之间通过第一连接图形8连接；第二子电极7之间通过第二连接图形12连接。需要说明的是：图2为图1中从衬底基 板1向第一子电极5方向看去的平面示意图。
本实施例中，多个第一电极按行方向排列，多个第二电极按列方向排列，则显示基板中包括多行第一电极和多行第二电极。多行第一电极和多列第二电极交叉设置且相互绝缘。每行第一电极包括多个依次排列且依次连接的第一子电极5，每列第二电极包括多个依次排列依次连接的第二子电极7。
本实施例中，第一子电极5和第二子电极7同层设置。
本实施例中，第一连接图形8与第一子电极5位于不同层，第二连接图形12与第二子电极7同层设置。
本实施例中，第一子电极5的材料为透明导电材料，第二子电极7的材料为透明导电材料。
本实施例中，第一连接图形8的材料为金属；由于第二连接图形12与第二子电极7同层设置，因此第二连接图形12的材料和第二子电极7的材料相同。第二连接图形12和第二子电极7可以成一体。
本实施例中，如图1和图2所示，第一连接图形8位于衬底基板1的上方，第一子电极5位于第一连接图形8的上方，第一连接图形8的上方设置有第一过孔6，每个第一连接图形8上方对应设置两个第一过孔6，每个第一过孔6对应于一个第一子电极5，每个第一子电极5通过对应的第一过孔6与第一连接图形8连接，以使相邻的两个第一子电极5通过第一连接图形8连接。本实施例中，通过第一连接图形8实现了相邻的两个第一子电极5之间的桥接。
在本实施例中，该显示基板还包括平坦层2和像素开孔层3，平坦层2位于第一连接图形8之上，像素开孔层3位于平坦层2之上，第一子电极5和第二子电极7均位于像素开孔层3之上。第一过孔6设置于第一连接图形8上方的平坦层2和像素开孔层3中，第一过孔6对应的第一子电极5的部分位于第一过孔6中并与第一连接图形8接触，从而实现了该第一子电极5与第一连接图形8连接。
在本实施例中，如图1所示，该显示基板还包括第三电极41和发光层42。发光层42位于第三电极41之上，部分第一子电极5位于发光层42之上，第三电极41、发光层42和部分第一子电极5形成OLED 4；和/ 或，发光层42位于第三电极41之上，部分第二子电极7位于发光层42之上，第三电极41、发光层42和部分第二子电极7形成OLED 4。像素开孔层3中设置有开孔，有机发光二极管(Organic Light-Emitting Diode，简称：OLED)4设置于开孔中。进一步地，该显示基板还包括薄膜晶体管(Thin Film Transistor，TFT)9，OLED 4位于TFT 9的上方且OLED 4与TFT 9连接。TFT 9包括栅极、有源层、源极和漏极，有源层位于栅极上方，源极位于有源层上，漏极位于有源层上，且漏极与第三电极41连接，其中第三电极41可以为像素电极。若第一子电极5为OLED 4的阴极，则第三电极41为OLED 4的阳极；或者，若第一子电极5为OLED 4的阳极，则第三电极41为OLED 4的阴极。此外，若第二子电极7为OLED 4的阴极，则第三电极41为OLED 4的阳极；或者，若第二子电极7为OLED 4的阳极，则第三电极41为OLED 4的阴极。
本实施例中，TFT 9中各组件与第一连接图形8、平坦层2之间的位置关系可以是任何合适的位置关系，图中所示的TFT 9仅为一种示例。在实际应用中，第一连接图形8可以单独设置，或者第一连接图形8可以与其它金属层同层设置，在此不做限定。
如图2所示，每个第一子电极5与多个OLED 4对应设置，每个第二子电极7与多个OLED 4对应设置。例如，每个第一子电极5与4个OLED 4对应设置，每个第二子电极7与4个OLED 4对应设置。此外，每个第一子电极5可以与更多个(例如9个)OLED 4对应设置，每个第二子电极7可以与更多个(例如9个)OLED 4对应设置。
本实施例中，第一子电极5和第二子电极7中的每一个在衬底基板1上的正投影覆盖多个(例如4个、9个)发光层42或OLED 4在衬底基板1上的正投影。
本实施例中，第一子电极5的形状为菱形，第二子电极7的形状为菱形。第一子电极5和第二子电极7也可以具有正方形的形状。第一子电极5和第二子电极7均可以具有其它形状，此处不再一一列举。
本实施例中，在显示阶段，第一子电极5作为公共电极，该第一子电极5上加载公共电极电压，第二子电极7作为公共电极，该第二子电极7上加载公共电极电压。在触控阶段，第一子电极5作为驱动电极， 该第一子电极5上加载触控驱动电压。第二子电极7作为感应电极，该第二子电极7上输出触控感应电压。
本实施例提供的显示基板中，第一电极和第二电极交叉设置且相互绝缘，每个第一电极包括多个第一子电极，第一子电极之间连接，每个第二电极包括多个第二子电极，第二子电极之间连接，第一子电极用于在显示阶段加载公共电极电压以及在触控阶段加载触控驱动电压，第二子电极用于在显示阶段加载公共电极电压以及在触控阶段输出触控感应电压，本实施例中的显示基板在不增加额外的工序的情况下，通过分时驱动实现了触控和显示，从而减小了工艺复杂度，且降低了成本。本实施例中的显示基板在不增加额外的工序的情况下，通过分时驱动实现了触控和显示，从而提高了显示基板的稳定性，特别是柔性显示基板的稳定性。
图3为本公开的另一实施例提供的一种显示基板的结构示意图，图4为图3中所示的第一子电极和第二子电极的平面示意图，如图3和图4所示，本实施例与图1和图2所示的实施例的区别在于：第一连接图形8与第一子电极5位于不同层，第二连接图形10与第二子电极7位于不同层。
需要说明的是：图4为图3中从衬底基板1向第一子电极5方向看去的平面示意图。
本实施例中，第一子电极5的材料为透明导电材料，第二子电极7的材料为透明导电材料，第一连接图形8的材料为金属，第二连接图形10的材料为金属。
本实施例中，如图3和图4所示，第一连接图形8位于衬底基板1的上方，第二连接图形10位于第一连接图形8的上方，第一子电极5位于第一连接图形8的上方，第二子电极7位于第二连接图形10的上方，每个第一连接图形5的上方对应设置有两个第一过孔6，每个第二连接图形10的上方对应设置有两个第二过孔11。每个第一过孔6对应于一个第一子电极5，每个第一子电极5通过对应的第一过孔6与第一连接图形8连接，以使相邻的两个第一子电极5通过第一连接图形8连接。每个第二过孔11对应于一个第二子电极7，每个第二子电极7通过对应的第二 过孔11与第二连接图形10连接，以使相邻的两个第二子电极7通过第二连接图形10连接。本实施例中，通过第一连接图形8实现了相邻的两个第一子电极5之间的桥接；通过第二连接图形10实现了相邻的两个第二子电极7的桥接，
在本实施例中，该显示基板还包括平坦层2和像素开孔层3，平坦层2位于第一连接图形8之上，像素开孔层3位于平坦层2之上，第一子电极5和第二子电极7均位于像素开孔层3之上，第二连接图形10位于平坦层2和像素开孔层3之间。第一过孔6设置于第一连接图形8上方的平坦层2和像素开孔层3中，第一过孔6对应的第一子电极5的部分位于第一过孔6中并与第一连接图形8接触，从而实现了该第一子电极5与第一连接图形8连接。第二过孔11设置于第二连接图形10上方的像素开孔层3中，第二过孔11对应的第二子电极7的部分位于第二过孔11中并与第二连接图形10接触，从而实现了该第二子电极7与第二连接图形10连接。
本实施例中，TFT 9中各组件与第一连接图形8、平坦层2之间的位置关系可以是任何合适的位置关系，图中所示的TFT 9仅为一种示例。在实际应用中，第一连接图形8可以单独设置，或者第一连接图形8可以与其它金属层同层设置，在此不做限定；第二连接图形10可以单独设置，或者第二连接图形10可以与其它金属层同层设置，在此不做限定。
需要说明的是：根据图4所示，图3中的第一过孔6和第二过孔11不在一个截面内，图3中为清楚示出第一过孔6和第二过孔11，将第一过孔6和第二过孔11画在了一个截面内。第一过孔6和第二过孔11的具体位置可参见图4所示。
图3和图4所示的实施例中的显示基板的其余组件可参见图1和图2所示的实施例，此处不再重复描述。
本实施例提供的显示基板中，第一电极和第二电极交叉设置且相互绝缘，每个第一电极包括多个第一子电极，第一子电极之间连接，每个第二电极包括多个第二子电极，第二子电极之间连接，第一子电极用于在显示阶段加载公共电极电压以及在触控阶段加载触控驱动电压，第二子电极用于在显示阶段加载公共电极电压以及在触控阶段输出触控感应 电压，本实施例中的显示基板在不增加额外的工序的情况下，通过分时驱动实现了触控和显示，从而减小了工艺复杂度，且降低了成本。本实施例中的显示基板在不增加额外的工序的情况下，通过分时驱动实现了触控和显示，从而提高了显示基板的稳定性，特别是柔性显示基板的稳定性。
本公开的实施例还提供了一种显示面板，该显示面板包括上述实施例中的任一实施例的显示基板。
本实施例提供的显示面板中，第一电极和第二电极交叉设置且相互绝缘，每个第一电极包括多个第一子电极，第一子电极之间连接，每个第二电极包括多个第二子电极，第二子电极之间连接，第一子电极用于在显示阶段加载公共电极电压以及在触控阶段加载触控驱动电压，第二子电极用于在显示阶段加载公共电极电压以及在触控阶段输出触控感应电压，本实施例中的显示面板在不增加额外的工序的情况下，通过分时驱动实现了触控和显示，从而减小了工艺复杂度，且降低了成本。本实施例中的显示面板在不增加额外的工序的情况下，通过分时驱动实现了触控和显示，从而提高了显示面板的稳定性，特别是柔性显示面板的稳定性。
本公开的实施例还提供了一种显示基板的驱动方法，显示基板包括衬底基板和位于衬底基板上的多个第一电极和多个第二电极，第一电极和第二电极交叉设置且相互绝缘，每个第一电极包括多个第一子电极，第一子电极之间连接，每个第二电极包括多个第二子电极，第二子电极之间连接。
该方法包括：
在显示阶段，第一子电极和第二子电极上加载公共电极电压；以及
在触控阶段，第一子电极上加载触控驱动电压，第二子电极输出触控感应电压。
该显示基板的驱动方法可用于上述任一实施例所提供的显示基板。
在显示基板中，由于第一子电极用作OLED的电极和触控电极，以及第二子电极用作OLED的电极和触控电极，因此在对显示基板的驱动过程中需要进行分时驱动。
图5为本公开的实施例的显示基板的驱动时序图，如图5所示，将每1帧的驱动时间分成两个时间段，一个时间段是显示阶段，另一个时间段是触控阶段。
在显示阶段，TFT的栅极上加载的发射(Emission，简称EM)信号为低电平信号，TFT在该EM信号的控制下开启。此时可通过开启的TFT向第三电极输出像素电压，并向第一子电极输出公共电极电压以及向第二子电极输出公共电极电压。
在触控阶段，TFT的栅极上加载的EM信号为高电平信号，TFT在该EM信号的控制下关闭。此时可向第一子电极输出触控驱动电压，该触控驱动电压可以为脉冲信号，并且第二子电极可输出触控感应电压。
在每1帧画面驱动过程中，均需要在场同步(VSYNC)信号和行同步(HSYNC)信号的控制下进行显示和触控过程。
如图5所示，根据本公开的实施例，在显示阶段切换至触控阶段的过程中，EM信号控制开关提前一小段时间跳变，同样地，在触控阶段切换至显示阶段的过程中，EM信号控制开关晚一小段时间跳变，以形成缓冲，避免触控阶段对显示阶段的串扰，这样的设计能够有效提升显示阶段画面的稳定性。
在本实施例中，在显示阶段，每个第一子电极和每个第二子电极上加载的公共电极电压相同。
图6为本公开的实施例的对显示基板补偿前的电压加载示意图，如图6所示，在显示阶段，电压输入端向第一子电极5上输出公共电极电压V ref，由于布线存在电阻R A，而电阻R A会产生压降，在电阻R A产生的压降δV IRA的影响下，最终加载到第一子电极5上的电压为V ref-δV IRA；电压输入端向第二子电极7上输出公共电极电压V ref，由于布线存在电阻R B，而电阻R B会产生压降，在电阻R B产生的压降δV IRB的影响下，最终加载到第二子电极7上的电压为V ref-δV IRB。综上所述，由于第一子电极5和第二子电极7加载的电压大小不同，因此在显示阶段可能会产生画面显示不均的现象。
为解决上述问题，在显示阶段，每个第一子电极加载对应的公共电极电压以及每个第二子电极加载对应的公共电极电压。图7为实施例四 中对显示基板补偿后的电压加载示意图，如图7所示，在显示阶段，电压输入端向第一子电极5上输出对应的公共电极电压V ref+δV IRA，由于布线存在电阻R A，而电阻R A会产生压降，在电阻R A产生的压降δV IRA的影响下，最终加载到第一子电极5上的电压为V ref；电压输入端向第二子电极7上输出对应的公共电极电压V ref+δV IRB，由于布线存在电阻R B，而电阻R B会产生压降，在电阻R B产生的压降δV IRB的影响下，最终加载到第二子电极7上的电压为V ref。综上所述，由于在电压输入端对输出的公共电极电压进行了补偿，因此每个第一子电极5和每个第二子电极7加载的电压相同，从而避免了在显示阶段可能产生的画面显示不均的现象，提高了画面显示的均匀性。
本实施例提供的显示基板的驱动方法中，第一电极和第二电极交叉设置且相互绝缘，每个第一电极包括多个第一子电极，第一子电极之间连接，每个第二电极包括多个第二子电极，第二子电极之间连接，第一子电极用于在显示阶段加载公共电极电压以及在触控阶段加载触控驱动电压，第二子电极用于在显示阶段加载公共电极电压以及在触控阶段输出触控感应电压，本实施例中的显示基板在不增加额外的工序的情况下，通过分时驱动实现了触控和显示，从而减小了工艺复杂度，且降低了成本。本实施例中的显示基板在不增加额外的工序的情况下，通过分时驱动实现了触控和显示，从而提高了显示基板的稳定性，特别是柔性显示基板的稳定性。本实施例中，通过将第一电极分割成多个第一子电极，以及将第二电极分割成第二子电极，实现了独立输入公共电极电压的目的，通过在电压输入端对输出的公共电极电压进行补偿，使得每个第一子电极和每个第二子电极加载的电压相同，从而避免了在显示阶段产生的画面显示不均的现象，提高了画面显示的均匀性。
本公开的实施例还提供了一种显示基板的制作方法，该制作方法可以用于制作图1和图2所示的实施例的显示基板，该方法包括：
步骤101、在衬底基板1上形成第一连接图形8、TFT 9、平坦层2、像素开孔层3、第一过孔6和第三电极41。
本步骤中的第一连接图形8、TFT 9、第一过孔6、第三电极41和像素开孔层3中的开孔可通过构图工艺制成，其中，构图工艺可包括光刻 胶涂覆、曝光、显影、刻蚀和光刻胶剥离等工艺。
步骤102、采用蒸镀工艺在第三电极41上形成发光层42。
步骤103、采用蒸镀工艺形成第一子电极5和第二子电极7。
在步骤102的蒸镀过程中，需要保证第一过孔6不被蒸镀材料覆盖。
本公开的实施例还提供了另一种显示基板的制作方法，该制作方法可以用于制作图3和图4所示的实施例的显示基板，该方法包括：
步骤201、在衬底基板1上形成第一连接图形8、TFT 9、平坦层2、第二连接图形10、像素开孔层3、第一过孔6、第二过孔11和第三电极41。
本步骤中的第一连接图形8、TFT 9、第二连接图形10、第一过孔6、第二过孔11、第三电极41和像素开孔层3中的开孔可通过构图工艺制成，其中，构图工艺可包括光刻胶涂覆、曝光、显影、刻蚀和光刻胶剥离等工艺。
步骤202、采用蒸镀工艺在第三电极41上形成发光层42。
步骤203、采用蒸镀工艺形成第一子电极5和第二子电极7。
在步骤202的蒸镀过程中，需要保证第一过孔6和第二过孔11不被蒸镀材料覆盖。
显然，本领域的技术人员可以对本公开进行各种改动和变型而不脱离本公开的精神和范围。这样，倘若本公开的这些修改和变型属于本公开权利要求及其等同技术的范围之内，则本公开也意图包含这些改动和变型在内。

Claims (15)

  1. 一种显示基板，包括：
    衬底基板；和
    位于所述衬底基板上的多个第一电极和多个第二电极，所述第一电极和所述第二电极交叉设置且相互绝缘，每个所述第一电极包括多个第一子电极，所述第一子电极之间连接，每个所述第二电极包括多个第二子电极，所述第二子电极之间连接；
    其中所述第一子电极用于在显示阶段加载公共电极电压以及在触控阶段加载触控驱动电压；以及
    其中所述第二子电极用于在显示阶段加载公共电极电压以及在触控阶段输出触控感应电压。
  2. 根据权利要求1所述的显示基板，还包括：
    位于所述衬底基板上的第一连接图形和第二连接图形；
    其中所述第一子电极之间通过所述第一连接图形连接；并且
    其中所述第二子电极之间通过所述第二连接图形连接。
  3. 根据权利要求2所述的显示基板，其中，
    所述第一连接图形与所述第一子电极位于不同层，所述第二连接图形与所述第二子电极同层设置。
  4. 根据权利要求2所述的显示基板，其中，
    所述第一连接图形与所述第一子电极位于不同层，并且所述第二连接图形与所述第二子电极位于不同层。
  5. 根据权利要求3所述的显示基板，其中，
    所述第一连接图形位于所述衬底基板的上方，所述第一子电极位于所述第一连接图形的上方，每个所述第一连接图形的上方对应设置有两个第一过孔，每个所述第一过孔对应于一个所述第一子电极，每个所述 第一子电极通过对应的所述第一过孔与所述第一连接图形连接，以使相邻的两个所述第一子电极通过所述第一连接图形连接。
  6. 根据权利要求5所述的显示基板，还包括：
    位于所述第一连接图形与所述第一子电极和第二子电极之间的平坦层和像素开孔层，
    其中平坦层比像素开孔层更靠近衬底基板，所述第一过孔穿过所述平坦层和像素开孔层。
  7. 根据权利要求4所述的显示基板，其中，
    所述第一连接图形位于所述衬底基板的上方，所述第二连接图形位于所述第一连接图形的上方，所述第一子电极位于所述第一连接图形的上方，所述第二子电极位于所述第二连接图形的上方，每个所述第一连接图形的上方对应设置有两个第一过孔，每个所述第二连接图形的上方对应设置有两个第二过孔；
    每个所述第一过孔对应于一个所述第一子电极，每个所述第一子电极通过对应的所述第一过孔与所述第一连接图形连接，以使相邻的两个所述第一子电极通过所述第一连接图形连接；以及
    每个所述第二过孔对应于一个所述第二子电极，每个所述第二子电极通过对应的所述第二过孔与所述第二连接图形连接，以使相邻的两个所述第二子电极通过所述第二连接图形连接。
  8. 根据权利要求7所述的显示基板，还包括：
    位于所述第一连接图形与所述第一子电极和第二子电极之间的平坦层和像素开孔层，
    其中平坦层比像素开孔层更靠近衬底基板，所述第二连接图形位于平坦层和像素开孔层之间，所述第一过孔穿过所述平坦层和像素开孔层，且第二过孔穿过像素开孔层。
  9. 根据权利要求1所述的显示基板，还包括：
    第三电极和发光层；
    其中所述发光层位于所述第三电极之上，部分所述第一子电极位于所述发光层之上；所述第一子电极为阴极，所述第三电极为阳极，或者，所述第一子电极为阳极，所述第三电极为阴极；和/或
    其中所述发光层位于所述第三电极之上，部分所述第二子电极位于所述发光层之上；所述第二子电极为阴极，所述第三电极为阳极，或者，所述第二子电极为阳极，所述第三电极为阴极。
  10. 根据权利要求9所述的显示基板，其中：
    所述第一子电极和所述第二子电极中的每一个在衬底基板上的正投影覆盖多个发光层在衬底基板上的正投影。
  11. 根据权利要求9所述的显示基板，其中：
    所述第一子电极和所述第二子电极中的每一个在衬底基板上的正投影覆盖4个发光层在衬底基板上的正投影。
  12. 根据权利要求1所述的显示基板，其中，
    所述第一子电极和所述第二子电极同层设置。
  13. 一种显示面板，包括：
    权利要求1至12任一所述的显示基板。
  14. 一种显示基板的驱动方法，其中：
    所述显示基板包括：衬底基板和位于所述衬底基板上的多个第一电极和多个第二电极，所述第一电极和所述第二电极交叉设置且相互绝缘，每个所述第一电极包括多个第一子电极，所述第一子电极之间连接，每个所述第二电极包括多个第二子电极，所述第二子电极之间连接；
    所述驱动方法包括：
    在显示阶段，所述第一子电极和所述第二子电极上加载公共电极电压；以及
    在触控阶段，所述第一子电极上加载触控驱动电压，所述第二子电极输出触控感应电压。
  15. 根据权利要求14所述的显示基板的驱动方法，，其中
    所述第一子电极和所述第二子电极上加载公共电极电压包括：
    每个第一子电极加载对应的公共电极电压以及每个第二子电极加载对应的公共电极电压。
PCT/CN2018/087652 2017-06-09 2018-05-21 显示基板及其驱动方法和显示面板 WO2018223835A1 (zh)

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