WO2018206084A1 - Method for fabricating a light emitting semiconductor chip - Google Patents
Method for fabricating a light emitting semiconductor chip Download PDFInfo
- Publication number
- WO2018206084A1 WO2018206084A1 PCT/EP2017/061006 EP2017061006W WO2018206084A1 WO 2018206084 A1 WO2018206084 A1 WO 2018206084A1 EP 2017061006 W EP2017061006 W EP 2017061006W WO 2018206084 A1 WO2018206084 A1 WO 2018206084A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- layer
- cover layer
- semiconductor structure
- recess
- carrier
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 107
- 238000000034 method Methods 0.000 title claims abstract description 37
- 239000000463 material Substances 0.000 claims abstract description 20
- 239000012780 transparent material Substances 0.000 claims abstract description 18
- 239000000758 substrate Substances 0.000 claims description 46
- 239000011888 foil Substances 0.000 claims description 20
- 229910052751 metal Inorganic materials 0.000 claims description 9
- 239000002184 metal Substances 0.000 claims description 9
- 239000004593 Epoxy Substances 0.000 claims description 6
- 229920001296 polysiloxane Polymers 0.000 claims description 6
- 229920006267 polyester film Polymers 0.000 claims description 4
- -1 polyethylene terephthalate Polymers 0.000 claims description 3
- 229920000139 polyethylene terephthalate Polymers 0.000 claims description 3
- 239000005020 polyethylene terephthalate Substances 0.000 claims description 3
- 229910052709 silver Inorganic materials 0.000 claims description 3
- 239000004332 silver Substances 0.000 claims description 3
- 238000000151 deposition Methods 0.000 description 7
- 238000006243 chemical reaction Methods 0.000 description 3
- 229910052594 sapphire Inorganic materials 0.000 description 3
- 239000010980 sapphire Substances 0.000 description 3
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- NSMXQKNUPPXBRG-SECBINFHSA-N (R)-lisofylline Chemical compound O=C1N(CCCC[C@H](O)C)C(=O)N(C)C2=C1N(C)C=N2 NSMXQKNUPPXBRG-SECBINFHSA-N 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- MYWUZJCMWCOHBA-VIFPVBQESA-N methamphetamine Chemical compound CN[C@@H](C)CC1=CC=CC=C1 MYWUZJCMWCOHBA-VIFPVBQESA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/52—Encapsulations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
- H01L2933/005—Processes relating to semiconductor body packages relating to encapsulations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/58—Optical field-shaping elements
- H01L33/60—Reflective elements
Definitions
- the invention refers to a method for fabricating a light emitting semiconductor chip and to a light emitting semicon- ductor chip.
- a method for fabricating a light emitting semiconductor chip wherein a carrier with at least one recess is provided.
- the recess has a bottom and side walls.
- a light emitting semiconductor structure is put on the bottom of the recess.
- Light-transparent material is filled in the recess covering the semiconductor structure.
- the light-transparent material is cured to a cover layer of the semiconductor structure.
- the semiconductor structure with the cover layer is removed from the carrier and put with the cover layer on a further carrier. Side faces of the cover layer are covered with a reflective layer. Mold material is deposited on the reflective layer forming the semiconductor chip.
- the proposed method has the advantage that with simple means different shapes of the cover layer can be formed. This is possible since the recesses of the carrier define at least the shape of side faces of the cover layer.
- the reflective layer can be formed on the cover layer using a simple depositing method. Additionally, the reflective layer can be protected against environmental forces by depositing mold material on the reflective layer.
- the reflective layer can for example comprise metal or can be made of metal. Depending on the used embodiment, the metal may be plated on the cover layer. A simple depositing of the reflective layer is attained by using silver for forming the reflective layer.
- the light-transparent material that forms the cover layer may comprise silicone and/or epoxy or may be made of silicone and/or epoxy. Silicone and epoxy can be easily filled in the recess. Furthermore, silicone and epoxy generate a strong adhesive force between the cover lay ⁇ er and the semiconductor structure.
- the side walls of the re ⁇ cess and the bottom of the recess are covered with a foil.
- the foil can be used to easily remove the cover layer and the semiconductor structure from the carrier.
- the foil is removed from the cover layer and the semiconductor structure before the reflective layer is deposited. Therefore, the production method is improved by using the foil.
- the foil has the ad- vantage that no transparent material remains in the recesses of the carrier. Therefore, the carrier can be used several times without the need of cleaning the carrier.
- the foil simplifies the removing of the semiconductor struc ⁇ ture and the cover layer from the carrier. In a simple way, the foil is drawn from the cover layer and therefore, the semiconductor structure and the cover layer are also removed from the carrier.
- the foil may be made of a ma ⁇ terial that reduces the connecting forces between the cured cover layer and the foil. Additionally, the foil is smooth and thin enough to cover the structure of the carrier and to cover the recesses of the carrier without changing the shape of the recesses.
- the foil is a polyester film made of stretched polyethylene terephthalate . This material provides suitable features to perform the described method.
- the carrier comprises a structure with several recesses, wherein in each recess a semiconductor structure is deposited and covered with a cover layer.
- the semiconductor structures with cover layers are put on the further carrier with a distance between the semiconductor structures, wherein after forming the reflective layers on the cover layers of the sem ⁇ iconductor structures, mold material is deposited embedding the semiconductor structures in a common mold layer. After hardening the mold material to the common mold layer, the single semiconductor chips are separated. For example, a saw ⁇ ing process is used for separating the single semiconductor chips .
- the light emitting semiconductor structure is arranged on a substrate, wherein the semiconduc ⁇ tor structure with the substrate is put on the bottom of the recess. Therefore, it is possible to produce a semiconductor chip that also comprises a substrate.
- the substrate is, for example, made of a light-transparent material.
- the substrate may be made of sapphire.
- the top side of the substrate and the side faces of the substrate are covered with the cover layer. This means that also at side faces of the substrate there is an reflective layer arranged.
- the reflective layer is arranged at a rim layer of a bottom side of the substrate, wherein the reflective rim layer is connected with the reflective side face layer, wherein the reflective side face layer is ar ⁇ ranged on side faces of the cover layer. Therefore, also a small rim layer of the bottom side of the substrate is cov- ered with a reflective layer. This increases the light that is transmitted by the reflective layer in a predetermined emitting direction. Furthermore, the invention refers to a light emitting semi ⁇ conductor chip made according to the proposed method.
- Fig. 1 shows a schematic cross-sectional view of a semi ⁇ conductor structure with a substrate.
- Fig. 2 shows a view on a bottom of the semiconductor
- Fig. 3 shows a schematic view of a process step for fabri ⁇ cating a light emitting semiconductor chip.
- Fig. 4 shows a view on the carrier with recesses and semi- conductor structures.
- Fig. 5 shows a further process step, wherein a cover layer is formed on the semiconductor structure.
- Fig. 6 shows a schematic view of a further process step, wherein the semiconductor structure with the cover layer is put on a further carrier.
- Fig. 7 shows the arrangement of Fig. 6 after the deposi- tion of the reflective layer.
- Fig. 8 shows the forming of a common mold layer on the
- Fig. 9 shows a schematic view of the arrangement of Fig. 8 after performing a sawing process.
- Fig. 10 shows a cross-sectional view of a light emitting semiconductor chip that is made according to the described method.
- Fig. 11 shows a view on a bottom side of the light emitting semiconductor chip.
- Fig. 12 shows a further light emitting semiconductor chip.
- Fig. 13 shows another light emitting semiconductor chip.
- Fig. 1 shows a cross-sectional view of a semiconductor struc ⁇ ture 1 with a substrate 2.
- the substrate 2 is arranged on top of the semiconductor structure 1.
- the substrate 2 may be made of light-transparent material, for example sapphire.
- the semiconductor structure 1 comprises semiconductor material that is embodied to emit light.
- the semiconductor structure 1 comprises a first positive doped semiconductor layer 3 and a second negative doped semiconduc ⁇ tor layer 4.
- an active region 5 is arranged at a boarder face between the positive doped first semiconductor layer 3 and the negative doped second semiconductor layer 4 arranged.
- the active region 5 is embodied to generate light if the first lay ⁇ er 3 and the second layer 4 are supplied with a predetermined electrical voltage.
- the first layer 3 comprises a first elec- trical contact 6.
- the second layer 4 comprises a second elec ⁇ trical contact 7.
- the first and second electrical contacts 6, 7 may for example be made of metal.
- a wavelength conversion layer 8 may be arranged on top of the substrate 2.
- the conversion layer 8 may for exam- pie comprise phosphor material that is embodied to shift a wavelength of the light that is emitted by the active region 5 of the semiconductor structure 1.
- the substrate 2 and/or the conversion layer 8 may be omitted.
- also other semiconductor structures may be provided that are embodied to generate light.
- Light is any electromagnetic ra ⁇ diation from a visible region and/or from an invisible re- gion.
- the light may be in an infrared or an ul ⁇ traviolet region.
- the light that is emitted by the semiconductor structure 1 may also be in a visible re ⁇ gion .
- Fig. 2 shows a view on a bottom 19 of the semiconductor structure 1 of Fig. 1.
- the semicon ⁇ ductor structure 1 has a smaller area than the substrate 2.
- the substrate 2 may have the same area as the semiconductor structure 1. However, in this embodiment, there is a free rim 9 on the bottom of the substrate 2 that surrounds the semiconductor structure 1.
- Fig. 3 shows a first process step, wherein a carrier 10 is provided.
- the carrier 10 comprises recesses 11.
- Each recess 11 comprises a bottom 12 and side walls 13, 14.
- the recesses 11 and the whole upper surface 17 of the carrier 10 are covered with a foil 18.
- the foil 18 may be made of a flexible material, that has a thin thickness and that is flexible enough to protect or cover the upper surface 17 with the recesses 11 of the carrier 10.
- the foil 18 is made of a polyester film, for example a polyester film made from stretched polyethylene terephthalate.
- also foils made of other materials can be used.
- the semiconductor structure 1 with the substrate 2 is depos ⁇ ited on the bottom 12 of the recesses 11.
- the bottom 19 of the semiconductor structure 1 is put on the bottom 12 of the recess 11.
- the electrical contacts of the semiconductor structure 1 are arranged at the bottom 19 of the semiconduc ⁇ tor structure 1.
- the semiconductor structure 1 and the sub ⁇ strate 2 may have the same shape as shown in Fig. 1 and 2.
- the depositing of the semiconductor struc- ture 1 on the bottom 12 of the recess 11 using a pick-and- place tool 20 is shown.
- a semiconductor structure 1 with electrical contacts at the bottom 19 is deposited in the recesses 11.
- Fig. 4 shows a schematic partial view of the upper surface 17 of the carrier 10.
- the recesses 11 have the same shape and each recess 11 comprises four side walls 13, 14, 15, 16 that are arranged with an angle that is larger than 90 degrees with regard to a plane of the bottom 12.
- Fig. 5 shows the arrangement of Fig. 3 after filling light- transparent material 21 in the recesses 11.
- the light- transparent material 21 covers side faces and a top face of the semiconductor structure 1 with the substrate 2.
- the transparent material 21 covers top faces 34 of the substrates 2 and the whole recesses 11.
- the cover layer 22 covers side faces 25, 26 of the substrates 2. In the shown cross-sectional view only two opposite side fac ⁇ es 25, 26 of the substrate 2 are shown. However, all four side faces 25, 26 of the substrate 2 are covered with the cover layer 22.
- the light-transparent material 21 is cured to a cover layer 22 that is connected with the semiconductor structure 1 and the substrate 2. After curing the transparent material 21 to the cover layer 22, the semi- conductor structure 1 with the substrates 2 and the cover layers 22 are removed from the carrier 10 and put with top faces 23 of the cover layer 22 on a further carrier 24 as shown in Fig. 6. In a further process step that is shown in Fig.
- a reflec ⁇ tive layer 29 is deposited on side faces 27, 28 of the cover layer 22.
- the reflective 29 may also cover a bottom rim face 30 of the cover layer 22 that surrounds the semiconductor structure 1.
- material for a reflective layer 29 for example metal can be used.
- Metal can be easily deposited for example plated on the cover layer 22.
- silver can be used as a metal for forming the reflective layer.
- the bottom side 19 of the semiconductor structure 1 is pro- tected against the depositing of the reflective layer 29.
- a mold ma ⁇ terial 31 is deposited on the further carrier 24 embedding the semiconductor structure 1 with the substrates 2 and the cover layer 22 with the reflective layers 29 in a common mold layer .
- Fig. 9 shows the process after forming the mold material 31 on the whole further carrier 24 generating the common mold layer, wherein single semiconductor chips 33 are separated from the common mold layer for example by a sawing process.
- trenches 32 are formed in the mold material 31 by a sawing process.
- the trenches 32 extend from an upper side of the mold materi- al 31 to the further carrier 24.
- a trench 32 surrounds one semiconductor structure 1 and constitutes a light emitting semiconductor chip 33.
- the individual semiconductor chips 33 may be removed from the fur ⁇ ther carrier 24.
- Fig. 10 shows a schematic cross sectional view of a semicon ⁇ ductor chip 33 with a semiconductor structure 1, a substrate 2, a cover layer 22, a reflective layers 29 and a housing made of mold material 31 that surrounds the reflective layer 29.
- the semiconductor chip 33 comprises a flip chip semiconductor structure 1.
- the semiconductor chip 33 may also have any other structure of a semiconductor structure 1 that is embodied to emit light.
- Fig. 11 shows a view on the bottom side 19 of the semiconduc- tor chip 33 of Fig. 10.
- Fig. 12 shows a schematic cross sectional view of another em ⁇ bodiment of a semiconductor chip 33 with a semiconductor structure 1, a substrate 2, a cover layer 22, a reflective layer 29 and a housing made of mold material 31 that sur ⁇ rounds the reflective layer 29.
- the side faces 27, 28 of the cover layer 22 have a lower part 41 and an upper part 42.
- the lower part 41 and the upper part 42 are connected and form the cover layer 22.
- the lower part 41 of the cover layer 22 starts from the semiconductor structure 1.
- the upper part 42 of the cover layer 22 is guided to an upper side of the semiconductor chip 33.
- the lower part 41 of the side faces 27, 28 is arranged with a smaller angle with re ⁇ spect to the plane of the semiconductor structure 1 and the substrate 2 compared to the upper part 42 of the side faces
- Fig. 12 shows only two side faces 27, 28 of the cover layer 22. But also the other two not shown side faces of the cover layer 22 have a lower part and an upper part.
- the lower parts of all side faces 27, 28 of the cover layer 22 may be arranged with the same angle with respect to the plane of the semiconductor structure 1 or the substrate 2.
- the upper parts of all side faces of the cover layer 22 may be arranged with the same angle with respect to the plane of the semiconductor structure 1 or the substrate 2.
- the reflective layer 29 covers the side faces 27, 28 of the cover layer 22.
- the reflective layer 29 has a lower part and an upper part, wherein the lower part of the reflective layer 29 is arranged with a smaller angle to the plane of the semiconductor structure and the substrate 2 compared to the upper part of the reflective layer 29.
- the cover layer 22 may have side faces with different shapes.
- the reflective layer 29 has different shapes.
- Fig. 13 shows a schematic cross sectional view of another em- bodiment of a semiconductor chip 33 with a semiconductor structure 1, a substrate 2, a cover layer 22, a reflective layer 29 and a housing made of mold material 31 that sur ⁇ rounds the reflective layer 29.
- the side faces 27, 28 of the cover layer 22 have a convex curved.
- the reflective layer 29 has also a convex curved shape .
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Abstract
Method for fabricating a light emitting semiconductor chip, wherein a carrier (10) with at least one recess (11) is provided, wherein the recess (11) has a bottom (12) and side walls (13, 14), wherein a light emitting semiconductor structure (1) is put on the bottom of the recess (11), wherein a light transparent material is filled in the recess (11) covering the semiconductor structure (1), wherein the light transparent material is cured to a cover layer of the semiconductor structure, wherein the semiconductor structure (1) with the cover layer is removed from the carrier and put with the cover layer on a further carrier, wherein side faces of the cover layer are covered with a reflective layer, wherein mould material is deposited on the reflective layer forming the semiconductor chip.
Description
METHOD FOR FABRICATING A LIGHT EMITTING SEMICONDUCTOR CHIP
DESCRIPTION
The invention refers to a method for fabricating a light emitting semiconductor chip and to a light emitting semicon- ductor chip.
It is known in the state of the art to provide a sapphire flip chip that is embedded in a reflective frame and that comprises a phosphor sheet for converting a wave length of a light that is emitted by the flip chip.
It is an object of the invention to propose an improved meth¬ od for fabricating a light emitting semiconductor chip and to provide an improved light emitting semiconductor chip.
The objects of the invention are attained by the independent claims .
A method for fabricating a light emitting semiconductor chip is proposed, wherein a carrier with at least one recess is provided. The recess has a bottom and side walls. A light emitting semiconductor structure is put on the bottom of the recess. Light-transparent material is filled in the recess covering the semiconductor structure. The light-transparent material is cured to a cover layer of the semiconductor structure. The semiconductor structure with the cover layer is removed from the carrier and put with the cover layer on a further carrier. Side faces of the cover layer are covered with a reflective layer. Mold material is deposited on the reflective layer forming the semiconductor chip.
The proposed method has the advantage that with simple means different shapes of the cover layer can be formed. This is possible since the recesses of the carrier define at least the shape of side faces of the cover layer. Furthermore, the reflective layer can be formed on the cover layer using a
simple depositing method. Additionally, the reflective layer can be protected against environmental forces by depositing mold material on the reflective layer. The reflective layer can for example comprise metal or can be made of metal. Depending on the used embodiment, the metal may be plated on the cover layer. A simple depositing of the reflective layer is attained by using silver for forming the reflective layer.
In a further embodiment, the light-transparent material that forms the cover layer may comprise silicone and/or epoxy or may be made of silicone and/or epoxy. Silicone and epoxy can be easily filled in the recess. Furthermore, silicone and epoxy generate a strong adhesive force between the cover lay¬ er and the semiconductor structure.
In a further embodiment, at least the side walls of the re¬ cess and the bottom of the recess are covered with a foil. The foil can be used to easily remove the cover layer and the semiconductor structure from the carrier. The foil is removed from the cover layer and the semiconductor structure before the reflective layer is deposited. Therefore, the production method is improved by using the foil. The foil has the ad- vantage that no transparent material remains in the recesses of the carrier. Therefore, the carrier can be used several times without the need of cleaning the carrier. Furthermore, the foil simplifies the removing of the semiconductor struc¬ ture and the cover layer from the carrier. In a simple way, the foil is drawn from the cover layer and therefore, the semiconductor structure and the cover layer are also removed from the carrier. Additionally, the foil may be made of a ma¬ terial that reduces the connecting forces between the cured cover layer and the foil. Additionally, the foil is smooth and thin enough to cover the structure of the carrier and to cover the recesses of the carrier without changing the shape of the recesses.
For example, the foil is a polyester film made of stretched polyethylene terephthalate . This material provides suitable features to perform the described method. In a further embodiment, the carrier comprises a structure with several recesses, wherein in each recess a semiconductor structure is deposited and covered with a cover layer.
In a further embodiment, several semiconductor structures with cover layers are put on the further carrier with a distance between the semiconductor structures, wherein after forming the reflective layers on the cover layers of the sem¬ iconductor structures, mold material is deposited embedding the semiconductor structures in a common mold layer. After hardening the mold material to the common mold layer, the single semiconductor chips are separated. For example, a saw¬ ing process is used for separating the single semiconductor chips . In a further embodiment, the light emitting semiconductor structure is arranged on a substrate, wherein the semiconduc¬ tor structure with the substrate is put on the bottom of the recess. Therefore, it is possible to produce a semiconductor chip that also comprises a substrate. The substrate is, for example, made of a light-transparent material. For example, the substrate may be made of sapphire.
In a further embodiment, the top side of the substrate and the side faces of the substrate are covered with the cover layer. This means that also at side faces of the substrate there is an reflective layer arranged.
In a further embodiment, the reflective layer is arranged at a rim layer of a bottom side of the substrate, wherein the reflective rim layer is connected with the reflective side face layer, wherein the reflective side face layer is ar¬ ranged on side faces of the cover layer. Therefore, also a small rim layer of the bottom side of the substrate is cov-
ered with a reflective layer. This increases the light that is transmitted by the reflective layer in a predetermined emitting direction. Furthermore, the invention refers to a light emitting semi¬ conductor chip made according to the proposed method.
The above-described properties, features and advantages of this invention and the way in which they are achieved will become clearer and more clearly understood in association with the following description of the exemplary embodiments which are explained in greater detail in association with the drawings. Here in schematic illustration in each case: Fig. 1 shows a schematic cross-sectional view of a semi¬ conductor structure with a substrate.
Fig. 2 shows a view on a bottom of the semiconductor
structure of Fig. 1.
Fig. 3 shows a schematic view of a process step for fabri¬ cating a light emitting semiconductor chip.
Fig. 4 shows a view on the carrier with recesses and semi- conductor structures.
Fig. 5 shows a further process step, wherein a cover layer is formed on the semiconductor structure. Fig. 6 shows a schematic view of a further process step, wherein the semiconductor structure with the cover layer is put on a further carrier.
Fig. 7 shows the arrangement of Fig. 6 after the deposi- tion of the reflective layer.
Fig. 8 shows the forming of a common mold layer on the
further carrier.
Fig. 9 shows a schematic view of the arrangement of Fig. 8 after performing a sawing process. Fig. 10 shows a cross-sectional view of a light emitting semiconductor chip that is made according to the described method.
Fig. 11 shows a view on a bottom side of the light emitting semiconductor chip.
Fig. 12 shows a further light emitting semiconductor chip.
Fig. 13 shows another light emitting semiconductor chip.
Fig. 1 shows a cross-sectional view of a semiconductor struc¬ ture 1 with a substrate 2. The substrate 2 is arranged on top of the semiconductor structure 1. The substrate 2 may be made of light-transparent material, for example sapphire. The semiconductor structure 1 comprises semiconductor material that is embodied to emit light. In the shown embodiment, the semiconductor structure 1 comprises a first positive doped semiconductor layer 3 and a second negative doped semiconduc¬ tor layer 4. At a boarder face between the positive doped first semiconductor layer 3 and the negative doped second semiconductor layer 4 an active region 5 is arranged. The active region 5 is embodied to generate light if the first lay¬ er 3 and the second layer 4 are supplied with a predetermined electrical voltage. The first layer 3 comprises a first elec- trical contact 6. The second layer 4 comprises a second elec¬ trical contact 7. The first and second electrical contacts 6, 7 may for example be made of metal. Depending on the used em¬ bodiment, a wavelength conversion layer 8 may be arranged on top of the substrate 2. The conversion layer 8 may for exam- pie comprise phosphor material that is embodied to shift a wavelength of the light that is emitted by the active region 5 of the semiconductor structure 1. Depending on the used embodiment, the substrate 2 and/or the conversion layer 8 may
be omitted. Furthermore, depending on the used embodiment, also other semiconductor structures may be provided that are embodied to generate light. Light is any electromagnetic ra¬ diation from a visible region and/or from an invisible re- gion. For example, the light may be in an infrared or an ul¬ traviolet region. Furthermore, the light that is emitted by the semiconductor structure 1 may also be in a visible re¬ gion . Fig. 2 shows a view on a bottom 19 of the semiconductor structure 1 of Fig. 1. In the shown embodiment, the semicon¬ ductor structure 1 has a smaller area than the substrate 2. Depending on the used embodiment, the substrate 2 may have the same area as the semiconductor structure 1. However, in this embodiment, there is a free rim 9 on the bottom of the substrate 2 that surrounds the semiconductor structure 1.
Fig. 3 shows a first process step, wherein a carrier 10 is provided. The carrier 10 comprises recesses 11. Each recess 11 comprises a bottom 12 and side walls 13, 14. In the shown embodiment, the recesses 11 and the whole upper surface 17 of the carrier 10 are covered with a foil 18. The foil 18 may be made of a flexible material, that has a thin thickness and that is flexible enough to protect or cover the upper surface 17 with the recesses 11 of the carrier 10. For example, the foil 18 is made of a polyester film, for example a polyester film made from stretched polyethylene terephthalate. However, depending on the used embodiment, also foils made of other materials can be used.
The semiconductor structure 1 with the substrate 2 is depos¬ ited on the bottom 12 of the recesses 11. The bottom 19 of the semiconductor structure 1 is put on the bottom 12 of the recess 11. The electrical contacts of the semiconductor structure 1 are arranged at the bottom 19 of the semiconduc¬ tor structure 1. The semiconductor structure 1 and the sub¬ strate 2 may have the same shape as shown in Fig. 1 and 2. At a middle recess 11 the depositing of the semiconductor struc-
ture 1 on the bottom 12 of the recess 11 using a pick-and- place tool 20 is shown. Depending on the used embodiment, on¬ ly a semiconductor structure 1 with electrical contacts at the bottom 19 is deposited in the recesses 11.
Fig. 4 shows a schematic partial view of the upper surface 17 of the carrier 10. In the shown section, there are three re¬ cesses 11, wherein semiconductor structures 1 with substrates 2 are arranged on the bottoms 12 of the recesses 11. In the shown embodiment, the recesses 11 have the same shape and each recess 11 comprises four side walls 13, 14, 15, 16 that are arranged with an angle that is larger than 90 degrees with regard to a plane of the bottom 12. Fig. 5 shows the arrangement of Fig. 3 after filling light- transparent material 21 in the recesses 11. The light- transparent material 21 covers side faces and a top face of the semiconductor structure 1 with the substrate 2. In the shown embodiment, the transparent material 21 covers top faces 34 of the substrates 2 and the whole recesses 11. The cover layer 22 covers side faces 25, 26 of the substrates 2. In the shown cross-sectional view only two opposite side fac¬ es 25, 26 of the substrate 2 are shown. However, all four side faces 25, 26 of the substrate 2 are covered with the cover layer 22. As light-transparent material 21, for example silicone or epoxy can be used. The light-transparent material 21 is cured to a cover layer 22 that is connected with the semiconductor structure 1 and the substrate 2. After curing the transparent material 21 to the cover layer 22, the semi- conductor structure 1 with the substrates 2 and the cover layers 22 are removed from the carrier 10 and put with top faces 23 of the cover layer 22 on a further carrier 24 as shown in Fig. 6. In a further process step that is shown in Fig. 7, a reflec¬ tive layer 29 is deposited on side faces 27, 28 of the cover layer 22. In the shown cross-sectional view, only the first and the second opposite side faces 27, 28 of the cover layer
22 are shown. However, all four side faces of the cover layer 22 are covered by the reflective layer 29. The reflective 29 may also cover a bottom rim face 30 of the cover layer 22 that surrounds the semiconductor structure 1. As material for a reflective layer 29 for example metal can be used. Metal can be easily deposited for example plated on the cover layer 22. For example silver can be used as a metal for forming the reflective layer. Depending on the used depositing method, the bottom side 19 of the semiconductor structure 1 is pro- tected against the depositing of the reflective layer 29.
In a further method step that is shown in Fig. 8, a mold ma¬ terial 31 is deposited on the further carrier 24 embedding the semiconductor structure 1 with the substrates 2 and the cover layer 22 with the reflective layers 29 in a common mold layer .
Fig. 9 shows the process after forming the mold material 31 on the whole further carrier 24 generating the common mold layer, wherein single semiconductor chips 33 are separated from the common mold layer for example by a sawing process. In the areas between two semiconductor structures 1 trenches 32 are formed in the mold material 31 by a sawing process. The trenches 32 extend from an upper side of the mold materi- al 31 to the further carrier 24. A trench 32 surrounds one semiconductor structure 1 and constitutes a light emitting semiconductor chip 33. After forming the trenches 32, the individual semiconductor chips 33 may be removed from the fur¬ ther carrier 24.
Fig. 10 shows a schematic cross sectional view of a semicon¬ ductor chip 33 with a semiconductor structure 1, a substrate 2, a cover layer 22, a reflective layers 29 and a housing made of mold material 31 that surrounds the reflective layer 29. In the shown embodiments, the semiconductor chip 33 comprises a flip chip semiconductor structure 1. Depending on the used embodiment, the semiconductor chip 33 may also have
any other structure of a semiconductor structure 1 that is embodied to emit light.
Fig. 11 shows a view on the bottom side 19 of the semiconduc- tor chip 33 of Fig. 10.
Fig. 12 shows a schematic cross sectional view of another em¬ bodiment of a semiconductor chip 33 with a semiconductor structure 1, a substrate 2, a cover layer 22, a reflective layer 29 and a housing made of mold material 31 that sur¬ rounds the reflective layer 29. In this embodiment, the side faces 27, 28 of the cover layer 22 have a lower part 41 and an upper part 42. The lower part 41 and the upper part 42 are connected and form the cover layer 22. The lower part 41 of the cover layer 22 starts from the semiconductor structure 1. The upper part 42 of the cover layer 22 is guided to an upper side of the semiconductor chip 33. The lower part 41 of the side faces 27, 28 is arranged with a smaller angle with re¬ spect to the plane of the semiconductor structure 1 and the substrate 2 compared to the upper part 42 of the side faces
27, 28. Fig. 12 shows only two side faces 27, 28 of the cover layer 22. But also the other two not shown side faces of the cover layer 22 have a lower part and an upper part. The lower parts of all side faces 27, 28 of the cover layer 22 may be arranged with the same angle with respect to the plane of the semiconductor structure 1 or the substrate 2. The upper parts of all side faces of the cover layer 22 may be arranged with the same angle with respect to the plane of the semiconductor structure 1 or the substrate 2.
The reflective layer 29 covers the side faces 27, 28 of the cover layer 22. This means that also the reflective layer 29 has a lower part and an upper part, wherein the lower part of the reflective layer 29 is arranged with a smaller angle to the plane of the semiconductor structure and the substrate 2 compared to the upper part of the reflective layer 29. De¬ pending on the shapes of the recesses of the carrier 10, the
cover layer 22 may have side faces with different shapes. As a result also the reflective layer 29 has different shapes.
Fig. 13 shows a schematic cross sectional view of another em- bodiment of a semiconductor chip 33 with a semiconductor structure 1, a substrate 2, a cover layer 22, a reflective layer 29 and a housing made of mold material 31 that sur¬ rounds the reflective layer 29. In this embodiment, the side faces 27, 28 of the cover layer 22 have a convex curved. As a result, the reflective layer 29 has also a convex curved shape .
The invention has been illustrated and described in detail with the aid of the preferred exemplary embodiments. Never- theless, the invention is not restricted to the examples dis¬ closed. Rather, other variants may be derived therefrom by a person skilled in the art without departing from the protec¬ tive scope of the invention.
REFERENCE SYMBOLS
1 semiconductor structure
2 substrate
3 first layer
4 second layer
5 active region
6 first electrical contact
7 second electrical contact
8 converting layer
9 free rim substrate
10 carrier
11 recess
12 bottom recess
13 first side wall
14 second side wall
15 third side wall
16 fourth side wall
17 upper surface carrier
18 foil
19 bottom semiconductor structure
20 pick-and-place tool
21 transparent material
22 cover layer
23 top face cover layer
24 further carrier
25 first side face substrate
26 second side face substrate
27 first side face cover layer
28 second side face cover layer
29 reflective layer
30 bottom rim face
31 mold material
32 trench
33 semiconductor chip
34 top face substrate
41 lower part side face cover layer
42 upper part side face cover layer
Claims
Method for fabricating a light emitting semiconductor chip, wherein a carrier with at least one recess is pro¬ vided, wherein the recess has a bottom and side walls, wherein a light emitting semiconductor structure is put on the bottom of the recess, wherein a light transparent material is filled in the recess covering the semiconduc¬ tor structure, wherein the light transparent material is cured to a cover layer of the semiconductor structure, wherein the semiconductor structure with the cover layer is removed from the carrier and put with the cover layer on a further carrier, wherein side faces of the cover layer are covered with a reflective layer, wherein mould material is deposited on the reflective layer forming the semiconductor chip.
Method of claim 1, wherein the reflective layer is made of metal.
Method of claim 2, wherein the metal is plated on the cover layer.
Method of claim 2 or 3, wherein silver is used for forming the reflective layer.
Method of any one of the preceding claims, wherein the light transparent material is silicone or epoxy.
Method of any one of the preceding claims, wherein at least the side walls of the recess and the bottom of the recess are covered with a foil, wherein the foil is re¬ moved from the carrier by the removing of the cover layer and the semiconductor structure from the carrier, wherein the foil is removed from the cover layer and the semicon¬ ductor structure before the reflective layer is deposit¬ ed .
7. Method of claim 6, wherein the foil is a polyester film made from stretched polyethylene terephthalate.
8. Method of any one of the preceding claims, wherein sever- al semiconductor structures with cover layers are put on the further carrier with a distance between the semiconductor structures, wherein after forming the reflective layers on the cover layers of the semiconductor struc¬ tures, mould material is deposited embedding the semicon- ductor structures in a common mould layer, wherein after hardening the mould material single semiconductor chips are separated from the common mould layer.
9. Method of claim 8, wherein the separating of the single semiconductor chip is performed by a sawing process.
10. Method of any one of the preceding claims, wherein the light emitting semiconductor structure is arranged on a substrate, wherein the semiconductor structure with the substrate is put on the bottom of the recess.
11. Method of claim 10, wherein the substrate is transparent for the light of the semiconductor structure.
12. Method of claim 10 or 11, wherein a top side of the sub¬ strate and side faces of the substrate are covered with the cover layer.
13. Method of any one of the claims 10 to 12, wherein the re- flective layer is arranged at a rim layer of a bottom side of the substrate, wherein the rim layer is connected with side faces of the reflective layer, wherein the side faces of the reflective layer are arranged on side faces of the cover layer.
14. A light emitting semiconductor chip (33), that is made according to a method of any one of the preceding claims.
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PCT/EP2017/061006 WO2018206084A1 (en) | 2017-05-09 | 2017-05-09 | Method for fabricating a light emitting semiconductor chip |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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PCT/EP2017/061006 WO2018206084A1 (en) | 2017-05-09 | 2017-05-09 | Method for fabricating a light emitting semiconductor chip |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2022207908A1 (en) * | 2021-04-01 | 2022-10-06 | Osram Opto Semiconductors Gmbh | Transfer method for optoelectronic semiconductor component |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20100109025A1 (en) * | 2008-11-05 | 2010-05-06 | Koninklijke Philips Electronics N.V. | Over the mold phosphor lens for an led |
US20150364639A1 (en) * | 2014-06-16 | 2015-12-17 | Samsung Electronics Co., Ltd. | Method of manufacturing semiconductor light emitting device package |
US20160218261A1 (en) * | 2013-09-13 | 2016-07-28 | Osram Opto Semiconductors Gmbh | Optoelectronic semiconductor component and method of fabricating an optoelectronic semiconductor component |
-
2017
- 2017-05-09 WO PCT/EP2017/061006 patent/WO2018206084A1/en active Application Filing
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20100109025A1 (en) * | 2008-11-05 | 2010-05-06 | Koninklijke Philips Electronics N.V. | Over the mold phosphor lens for an led |
US20160218261A1 (en) * | 2013-09-13 | 2016-07-28 | Osram Opto Semiconductors Gmbh | Optoelectronic semiconductor component and method of fabricating an optoelectronic semiconductor component |
US20150364639A1 (en) * | 2014-06-16 | 2015-12-17 | Samsung Electronics Co., Ltd. | Method of manufacturing semiconductor light emitting device package |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2022207908A1 (en) * | 2021-04-01 | 2022-10-06 | Osram Opto Semiconductors Gmbh | Transfer method for optoelectronic semiconductor component |
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