WO2018149511A1 - Method for producing a carrier for an optoelectronic component, and carrier for an optoelectronic component - Google Patents

Method for producing a carrier for an optoelectronic component, and carrier for an optoelectronic component Download PDF

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Publication number
WO2018149511A1
WO2018149511A1 PCT/EP2017/053798 EP2017053798W WO2018149511A1 WO 2018149511 A1 WO2018149511 A1 WO 2018149511A1 EP 2017053798 W EP2017053798 W EP 2017053798W WO 2018149511 A1 WO2018149511 A1 WO 2018149511A1
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WO
WIPO (PCT)
Prior art keywords
lead frame
layer
mask
mask layer
frame sections
Prior art date
Application number
PCT/EP2017/053798
Other languages
French (fr)
Inventor
Choo Kean LIM
Original Assignee
Osram Opto Semiconductors Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Osram Opto Semiconductors Gmbh filed Critical Osram Opto Semiconductors Gmbh
Priority to PCT/EP2017/053798 priority Critical patent/WO2018149511A1/en
Publication of WO2018149511A1 publication Critical patent/WO2018149511A1/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0703Plating
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/007Manufacture or processing of a substrate for a printed circuit board supported by a temporary or sacrificial carrier

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Led Device Packages (AREA)

Abstract

The invention refers to a method for producing a carrier for an optoelectronic component, wherein a subcarrier is provided, wherein a first mask layer is deposited on the subcarrier, wherein the first mask layer has at least two mask openings extending from an upper side of the first mask layer to a bottom side of the first mask layer, wherein the first mask layer covers predetermined areas of the subcarrier and provides at least two free areas of the subcarrier in the mask openings, wherein electroconductive material is deposited in the mask openings and on the free areas of the subcarrier, wherein the first mask layer is removed providing two separate lead frame sections made of electroconductive material, wherein the two lead frame sections are arranged side by side with a free space between two side faces of the two lead frame sections, wherein mould material is formed in the free space between the two lead frame sections forming a mould material layer connecting the two side faces of the two lead frame sections, removing the subcarrier and attaining the carrier with two lead frame sections, wherein the lead frame sections are connected by a mould material layer.

Description

METHOD FOR PRODUCING A CARRIER FOR AN OPTOELECTRONIC COMPONENT, AND CARRIER FOR AN OPTOELECTRONIC COMPONENT
DESCRIPTION
The invention refers to a method for producing a carrier for an optoelectronic component and to a carrier for an optoelec¬ tronic component. It is known in the state of the art to use a carrier for an optoelectronic component, wherein the carrier comprises two lead frame sections that are embedded in an insulating layer. The lead frame sections are metal stripes that are punched out from a metal plate. The punched metal lead frame sections are embedded in an insulated material forming a carrier.
It is an object of the proposed invention to provide an im¬ proved method for producing a carrier for an optoelectronic component with two lead frame sections. A further object of the proposed invention is to provide an improved carrier for an optoelectronic component with two lead frame sections.
The objects of the invention are attained by the independent claims. Further embodiments of the invention are disclosed in the dependant claims.
A method for producing a carrier for an optoelectronic compo¬ nent is proposed, wherein a subcarrier is provided, wherein a first mask layer is deposited on the subcarrier. The first mask layer has at least two mask openings extending from an upper side of the first mask layer to a bottom side of the first mask layer. The first mask layer covers predetermined areas of the subcarrier and provides at least two free areas of the subcarrier in the mask openings. Electroconductive ma- terial for example metal is deposited in the mask openings and on the free areas of the subcarrier. The first mask layer is removed providing two separate lead frame sections that are arranged side by side with a free space between the two side faces of the two lead frame sections. Then mould materi¬ al is formed in the free space between the two lead frame sections forming a mould material layer connecting the two side faces of the two lead frame sections. After this, the subcarrier is removed and a carrier with two lead frame sec¬ tions made of electroconductive material is attained, wherein the two lead frame sections are connected by a mould material layer . Since the first mask layer can easily be formed with differ¬ ent types and sizes of mask openings, the lead frame sections can be formed in different sizes and shapes. Furthermore, the lead frame sections are made of deposited electroconductive material for example metal and can therefore be precisely formed with a predetermined thickness and/or a predetermined size .
In a further embodiment, a second mask layer with second mask openings can be used to deposit a further layer of electro- conductive material. The second mask layer can have the same shape or a different shape compared to the first mask layer. The second mask layer can be used to form a lead frame sec¬ tion with a recess and/or a projection at a side of the lead frame section for example.
In a further embodiment, a third mask layer with third mask openings is deposited on the second mask layer. The third mask layer is used to deposit a further layer of electroconductive material. The third mask layer may have a different shape compared to the second mask layer. By using different structured mask layers lead frame sections with different shapes can be formed.
In a further embodiment, the first mask layer and/or the sec- ond mask layer and/or the third mask layer are made of a ma¬ terial that can be structured by photolithographic processes. For example, the mask layers are made of photoresist. The mask openings of the first mask layer and/or the second mask openings of the second mask layer and/or the third mask open¬ ings of the third mask layer are formed in the first mask layer and/or the second mask layer and/or the third mask layer using photolithographic processes. The photolithographic processes result in a precise size and/or shape of the first mask openings and the first mask layer and/or the second mask openings and the second mask layer and/or the third mask openings in the third mask layer. As a result, the shapes of the lead frame sections can be formed precisely.
A further advantage of the photolithographic processes is that the two lead frame sections can be formed with a small distance and with a high thickness. Therefore, small carriers can be formed. Additionally, if a lot of first and second lead frame sections are formed on the subcarrier and embedded in the mould material layer, then more lead frame sections can be produced on a subcarrier with a given size since the distance between the lead frame sections is very small. Addi¬ tionally, lead frame sections with a great thickness can be embedded in mould material with a small distance. A great thickness of the lead frame sections increases a heat dissi¬ pation by the lead frame sections. Therefore, an optoelec¬ tronic component, for example a laser diode or a light emit¬ ting diode, can be better cooled or a maximum temperature of the optoelectronic component can be decreased by an improved heat dissipation.
In a further embodiment, the electroconductive material com¬ prises metal or consists of metal. For example copper is used as metal. Copper can be easily deposited for example by an electroplating process. Additionally, metal and especially copper provides good electrical conductivity and good thermal conductivity . In a further embodiment, the metal is deposited by an elec¬ troplating process. To use the electroplating process, the subcarrier comprises at an upper side a conductive layer. The metal is deposited in the openings of the first mask layer and on the conductive layer.
In a further embodiment, the first mask layer is removed by a dry film stripping process. In the same way, also the second mask layer is removed by a dry film stripping process. Also the third mask layer is removed by a dry film stripping process. The dry film stripping process is a simple and clean method to remove the first mask layer and/or the second mask layer and/or the third mask layer.
In a further embodiment, an upper side of the lead frame sec¬ tions and the mould material layer are covered by a protec¬ tion layer before the subcarrier is removed. After removing the subcarrier, the protection layer is also removed. This process protects the upper side of the lead frame sections and the upper side of the mould material layer against mate¬ rials for example etching liquids that may be used for remov¬ ing the subcarrier. Additionally, the protection layer covers the upper side of the lead frame sections and the upper side of the mould material layer against soil particles that may be generated by removing the subcarrier.
In a further embodiment, the subcarrier comprises an insulat- ing layer that is covered with a metal layer on top side and with a metal layer on bottom side. This kind of subcarrier is stable enough for the proposed method, and the metal layer can be used for an electroplating process for depositing the first metal layer.
In a further embodiment, the two mask openings of the first mask layer are arranged at a distance that is smaller than a thickness of the first metal layer. Therefore, the two lead frame sections are arranged with a small distance compared to the thickness of the first metal layer. This embodiment al¬ lows the production of a small carrier since the lead frame sections are arranged at a small distance. In a further embodiment, the distance between the two mask openings of the first mask layer is smaller than 0,1 mm. In a further embodiment, the thickness of the first metal layer is greater than 0,2 mm.
A carrier for an optoelectronic component with two lead frame sections is proposed. The two lead frame sections are ar¬ ranged side by side, wherein a mould material layer is ar¬ ranged between the two lead frame sections connecting the two side faces of the two lead frame sections. The lead frame sections are made of deposited metal.
In a further embodiment, the lead frame sections are made of electroplated metal. The electroplated metal provide a suita- ble metal structure for guiding the electric current and the thermal heat.
In a further embodiment, the two lead frame sections of the carrier are arranged side by side with a given distance. The distance between the two opposite sides of the two lead frame sections is smaller than a thickness of the lead frame sec¬ tions. Therefore, a small area is sufficient for providing two lead frame sections with a predetermined thickness. In a further embodiment, the lead frame sections have a thickness larger than 0,1 mm, especially larger than 0,2 mm.
In a further embodiment, the lead frame sections are arranged side by side with a given distance, wherein the given dis- tance is smaller than 0,2 mm, especially smaller than 0,15 mm.
The above-described properties, features and advantages of this invention and the way in which they are achieved will become clearer and more clearly understood in association with the following description of the exemplary embodiments which are explained in greater detail in association with the drawings. Here in schematic illustration in each case: Fig. 1 shows a schematic top view on a carrier for an optoelectronic component. Fig. 2 shows a cross section of the carrier of Fig.
1.
Fig. 3 shows a top view on a further embodiment of a carrier .
Fig. 4 shows a cross section of the carrier of Fig.
3.
Fig. 5 shows a top view of a further embodiment of a carrier.
Fig. 6 shows a cross section of the carrier of Fig.
5. Fig. 7 shows a top view on another embodiment of a carrier .
Fig. 8 shows a cross section of the carrier of Fig.
7.
Fig. 9 to 16 show process steps of a method for producing a carrier .
Fig. 17 to 22 show process steps of a further method for
producing a carrier.
Fig. 23 shows a cross-sectional view of a carrier with an optoelectronic component. Fig. 24 shows a top view of the carrier with the opto¬ electronic component of Fig. 23.
Fig. 25 shows a bottom view of the carrier of Fig. 23. Fig. 26 shows a cross-sectional view of a further car¬ rier with an optoelectronic component and a lens .
Fig. 1 shows a top view on a carrier 1 with a first lead frame section 2 and a second lead frame section 3. The first lead frame section 2 and the second lead frame section 3 are connected by a connecting layer 4. A first side 5 of the first lead frame section 2 is arranged at a given distance 6 with respect to a second side 7 of the second lead frame sec¬ tion 3. The carrier 1 has a length along an x-axis and a width along a y-axis. The connecting layer 4 has the same width along the y-axis as the first and the second lead frame section 2, 3.
Fig. 2 shows a cross-sectional view of the carrier 1 of Fig. 1. The first and the second lead frame section 2, 3 and the connecting layer 4 have the same thickness 8. The connecting layer 4 is only arranged between the two side faces 5, 7 of the two lead frame sections 2, 3. The lead frame section 2, the second lead frame section 3 and the connecting layer 4 have the same thickness along a z-axis. The z-y-x-axis define an orthogonal coordinate system.
Fig. 3 shows a top view of a further carrier 1 that comprises the same lead frame sections 2, 3 as the carrier 1 of Fig. 1. However, in contrast to the carrier 1 of Fig. 1, in this embodiment the two lead frame sections 2, 3 are embedded in a connecting layer 4. The connecting layer 4 surrounds all side faces of the first and the second lead frame section 2, 3. Therefore, the length of the carrier 1 is larger than the length of the carrier 1 of Fig. 1. Additionally, a width along the y-axis is also larger than the width of the carrier 1 of Fig. 1. However, the distance 6 between the first side 5 of the first lead frame section 2 and the second side 7 of the second lead frame section 3 is the same as in the embodi¬ ment of Fig . 1. Fig. 4 shows of cross-sectional view of the carrier 1 of Fig. 3. The thickness 8 of the carrier 1 is the same as the thick¬ ness 8 of the carrier 1 of Fig. 2.
Fig. 5 shows a top view of a further carrier 1. The carrier 1 of Fig. 5 has basically the same structure as the carrier 1 of the Figures 3 and 4. However, in contrast to the second lead frame section 3 of Fig. 3, the second lead frame section 3 of Fig. 5 has a recess 9 that is filled up with material of the connecting layer 4. The recess 9 divides a face of the second lead frame section 3 that projects from the connecting layer 4 in two parts. Fig. 6 shows a cross-sectional view of the connector 1 of Fig. 5. Also in this embodiment, the first side 5 of the first lead frame section 2 is arranged at a given distance 6 with respect to the second side 7 of the second lead frame section 3. The carrier 1 has a given thickness 8.
Fig. 7 shows a further embodiment of a carrier 1 with a first lead frame section 2 and a second lead frame section 3 that are embedded in a connecting layer 4. The carrier 1 has the same basic structure as the carrier 1 of Fig. 3.
Fig. 8 shows a cross-sectional view of the carrier 1 of Fig. 7. In this embodiment, the first side 5 of the first lead frame section 2 comprises a first recess 11. The second side 7 of the second lead frame section 3 comprises a second re- cess 12. The space between the first and the second side of the first lead frame section 2 and the second lead frame sec¬ tion 3 is filled with material of the connecting layer 4. Also the first and the second recess 11, 12 are filled with the material of the connecting layer 4. The connecting layer 4 comprises therefore locking structures 10 that extend in the first and second recess 11, 12 of the first and the second lead frame section 2, 3. The locking structure 10 increases the fixing of the connecting layer 4 with the first and the second lead frame section 2, 3.
The carriers that are shown in the Figures 1 to 8 comprise lead frame sections 2, 3 that are embodied as deposited metal layers. For example, the lead frame sections 2, 3 are made of electroplated metal layers. The connecting layer 4 is made of a mould material for example silicone, epoxy or polymer. For example the lead frame sections 2, 3 are made of copper. De- pending on the used embodiment, the distance 6 between the first side 5 of the first lead frame section 2 and the second side 7 of the second lead frame section 3 along the x-axis is smaller than a thickness of the first and/or the second lead frame section 2, 3 along the z-axis. The thickness of the first and the second lead frame section 2, 3 may be larger than 0,1 mm, preferably larger than 0,2 mm. The distance 6 between the first side 5 of the first lead frame section 2 and the second side 7 of the second lead frame section 3 may be smaller than 0,2 mm, preferably smaller than 0,15 mm or smaller than 0,1 mm.
The Figures 9 to 16 show a method for producing a carrier for an optoelectronic component. Fig. 9 shows a cross-sectional view of a subcarrier 13. In the shown embodiment, the subcar- rier 13 comprises a carrier layer 15. On top of the carrier layer 15 a conductive layer 14 is arranged. Also at a bottom side of the carrier layer 15 a second conductive layer 16 is arranged. Depending on the used embodiment, the second con¬ ductive layer 16 can be omitted. The carrier layer 15 may have the shape of a plate and may be made of insulating mate¬ rial, semiconductor material or metal. The carrier layer 15 may be made of steel. The first and/or the second conductive layer 14, 16 may be made of metal, for example copper. In a further process step, as shown in Fig. 10, a first mask layer 17 is deposited on the first conductive layer 14. De¬ pending on the used embodiment, the first mask layer 17 can be deposited as a structured first mask layer 17 with first openings 20, 21, wherein the first mask layer 17 covers pre¬ determined areas of the subcarrier 13. The structured first mask layer provides at least two free areas 18, 19 of the subcarrier 13. The two free areas 18, 19 are defined by the two first mask openings 20, 21 of the first mask layer 17. The two first mask openings are embodied as a first and the second recess 20, 21 that extend from a top side to a bottom side of the first mask layer 17. The first mask openings 20, 21 can be generated by the deposition of the first mask layer 17 outside the areas of the first mask openings 20, 21.
In a further embodiment, the first mask layer 17 is deposited as a complete layer and the first mask openings 20, 21 are formed in a later process. The first mask layer 17 is for ex- ample made of a material that can be structured by photolith¬ ographic processes. For example the first mask layer 17 is made of a photoresist. After the deposition of a first mask layer 17 that covers the first conductive layer 14 and that is made of photoresist, then photolithographic processes are used to remove parts of the first mask layer 17 from prede¬ fined areas to generate the two first mask openings 20, 21. The photolithographic processes have the advantage that the size of the first mask openings 20, 21 and also the positions of the first mask openings and/or the distance 22 between the two first mask openings 20, 21 can be precisely determined.
After removing photoresist material from the predefined areas of the two first mask openings 20, 21, a first mask layer 17 with two first mask openings 20, 21 with the shape of recess¬ es is attained. In the first mask openings 20, 21 the free areas 18, 19 of the subcarrier 13 are arranged.
In a further process step, electroconductive material 23, for example metal, is deposited in the two first openings 20, 21. The first openings 20, 21 are filled up with the electrocon- ductive material 23. For example an electroplating process can be used to deposit metal, e.g. copper on the free areas 18, 19 of the first conductive layer 14 of the subcarrier 13. The electroplated electroconductive material 23 constitutes two separate lead frame sections 24, 25. Since the lead frame sections 24, 25 are made of electroplated metal, especially copper, the lead frame sections 24, 25 have a precise shape and thickness and in preferred embodiments low thermal re- sistance and low electrical resistance.
Fig. 11 shows an optional process step. In this optional pro¬ cess step a second mask layer 26 is deposited on the arrange¬ ment shown in Fig. 10. The second mask layer 26 is for exam- pie made of the same material as the first mask layer and may be deposited in the same way as the first mask layer 17. De¬ pending on the used embodiment, also other materials and/or other methods can be used for depositing or forming the second mask layer 26. The second mask layer 26 may have the same structure as the first mask layer 17. In the shown embodi¬ ment, however the second mask layer 26 has the two second mask openings 50, 51 and a further second mask opening 27 that is embodied as a third recess. As discussed referring to the first mask layer 17, also the second mask openings 50, 51, 27 of the second mask layer 26 are filled with electro- conductive material 23. The electroconductive material 23 can be made of metal, for example copper that is, for example, deposited by an electroplating process. In a further process step that is shown in Fig. 12, the first and the second mask layer 17, 26 are removed from the subcar- rier 13. For removing the first and the second mask layer 17, 26, for example a dry film stripping method can be used. Also other methods as for example etching processes can be used to remove the first and the second mask layers 17, 26. As a re¬ sult, a first and a second lead frame section 24, 25 are dis¬ posed on the subcarrier 13. The first and the second lead frame sections 24, 25 are arranged side by side with a free space 28 between a first side face 29 of the first lead frame section 24 and a second side face 30 of the second lead frame 25. The two side faces 29, 30 of the two lead frame sections 24, 25 are arranged at a given distance 22. The first lead frame 24 comprises at an upper side a further recess 33. In a further process step that is shown in Fig. 13, mould ma¬ terial 31 is formed at side faces of the two lead frame sec¬ tions 24, 25 constituting a mould material layer 32 that con- nects the two lead frame sections 24, 25. For example the mould material is formed in the free space 28 between the side faces of the first and the second lead frame sections contacting the first side face 29 of the first lead frame section 24 and a second side face 30 of the second lead frame 25. The mould material 31 in the space 28 forms a mould mate¬ rial layer 32, that connects the first and the second lead frame section 24, 25. In the shown embodiment, not only the space 28 between the first and the second lead frame section 24, 25 is filled with material, but also the further recess 33 of the first lead frame section 24 and the other side fac¬ es 29, 30 of the first and the second lead frame section 24, 25 are covered with the mould material 31. For example all side faces of the lead frame sections 24, 25 or at least some of the side faces of the lead frame sections are embedded in a mould material layer 32.
Fig. 14 shows a top view of the arrangement of Fig. 13 with the first and the second lead frame section 24, 25 that are embedded in the mould material layer 32 made of mould materi- al 31.
In a further process step that is shown in Fig. 15, a top side of the arrangement is covered by a protective film 34. Then the subcarrier 13 is removed from the mould material layer 32 and the lead frame sections 24, 25 . In a further process step, the protective film 34 is removed and a carrier 1 for an optoelectronic component with two lead frame sec¬ tions 24, 25 that are arranged side by side is attained as shown in Fig. 15. The two lead frame sections are embedded in the mould material layer 32. The two lead frame sections 24, 25 are made of deposited material, for example deposited met¬ al material. Depending on the used embodiment, the two lead frame sections 24, 25 are made of electroplated metal. The side faces 29, 30 of the first and the second lead frame section 24, 25 are arranged with a small distance 22 along an x-axis. The distance 22 between the two side faces 29, 30 of the first and the second lead frame section 24, 25 may be smaller than a thickness of the first and/or the second lead frame section 24, 25 along a z-axis. In a further embodiment, the distance 22 between the two side faces of the first and the second lead frame section may be smaller than 0,1 mm. The thickness of the lead frame sections 24, 25 may be greater than 0 , 2 mm.
Fig. 17 to 22 show a further method for producing a carrier for an optoelectronic component with two lead frame sections that are arranged side by side, wherein a mould material lay¬ er is arranged between the two lead frame sections connecting at least two side faces of the two lead frame sections.
Fig. 17 shows a subcarrier 13 that is covered with a first mask layer 17. The first mask layer 17 comprises two mask openings 20, 21. In the two mask openings 20, 21 free areas 18, 19 of the subcarrier 13 are arranged. The two mask open¬ ings 20, 21 are embodied as recesses that extend from an up¬ per side of the first mask layer 17 to a lower side of the first mask layer 17. In a further process step that is shown in Fig. 18, electroconductive material 23 is deposited in the two mask openings 20, 21. The deposited electroconductive ma¬ terial 23 constitutes a first lead frame section layer 35. In a further process step, a second mask layer 26 is deposit¬ ed on the arrangement of Fig. 18. The second mask layer 26 also comprises a two second mask openings 50, 51. The two second mask openings 50, 51 are embodied as recesses that ex¬ tend from an upper side of the second mask layer 17 to a low- er side of the second mask layer 17. However, the second mask openings 50, 51 of the second mask layer 26 have a smaller size than the mask openings 20, 21 of the first mask layer 17. electroconductive material 23 is deposited in the mask openings 20, 21 of the second mask layer 26. This process step is shown in Fig. 20.
In a further process step that is shown in Fig. 21, a third mask layer 36 is deposited on the arrangement of Fig. 20. The third mask layer 36 comprises two third mask openings 52, 53 that have a greater size than the two second mask openings 50, 51 of the second mask layer 26. Then the third mask openings 52, 53 of the third mask layer 36 are filled up with electroconductive material 23. This process step is shown in Fig. 22.
In a further process step, the first, the second and the third mask layer 17, 26, 36 are removed and instead of the first, the second and the third mask layer mould material 31 is formed on the electroconductive material 23. This process step is shown in Fig. 23. Depending on the used embodiment, only mould material 31 is formed between the opposite first side face 29 and the second side face 30 of the first and the second lead frame section 24, 25. However, it might be useful to embed all side faces of the first and the second lead frame section 24, 25 in mould material. Then the subcarrier 13 is removed and a carrier 1 is attained as it is shown in Fig. 24.
In Fig. 24, an optoelectronic component 37 that may be embod¬ ied as a laser diode or a light emitting diode is arranged on top of the first lead frame section 24 of the carrier 1. At a bottom of the optoelectronic component 37 an electrical con- tact may be embodied that is in contact with the first lead frame section 24. Furthermore, a second electrical contact of the optoelectronic component 37 is connected via an electri¬ cal connecting line 38, for example a bond wire, with the second lead frame section 25. The first side face 29 of the first lead frame section 24 and the second side face 30 of the second lead frame section 25 have a locking recess 39, 40. Thus the mould material 31 that is arranged between the side faces 29, 30 of the first and second lead frame sections 24, 25 projects a predetermined distance in the first and the second lead frame section 24, 25. Therefore, the mould mate¬ rial has locking projections 41, 42 that increase the fixing of the mould material layer 32 with the first and the second lead frame section 24, 25. Depending on the used embodiment, also only one locking projection 41, 42 may be sufficient to increase the fixing of the mould material layer 32.
Fig. 25 shows a top view on the carrier 1 of Fig. 24 with the optoelectronic component 37.
Fig. 26 shows a cross-sectional view of a further embodiment of a carrier 1 with two lead frame sections 24, 25 that are embedded in a mould material layer 32 that is made of mould material 31. In the shown embodiment, the mould material lay¬ er 32 comprises a rim 44 that circumvents the first and the second lead frame sections 24, 25. The optoelectronic compo¬ nent 37 is covered by a lens 43 that may be for example made of polymer or silicone material.
The proposed carrier and the proposed methods for producing the carrier have the advantage that lead frame sections may be produced with a thickness larger than 0,1 mm especially larger than 0,2 mm. Opposite side faces of the lead frame sections that are arranged side by side may have a given dis¬ tance that is smaller than 0,2 mm, especially smaller than 0,15 mm .
The proposed method can be used to produce a lot of lead frame sections that are arranged on a subcarrier and embedded in a mould material layer. Since the proposed method allows a small distance between the lead frame sections, more lead frame sections can be produced on a subcarrier with a given size. This is possible especially for methods that use photo- lithographic processes to structure the first, the second and/or the third mask layer. The invention has been illustrated and described in detail with the aid of the preferred exemplary embodiments. Never¬ theless, the invention is not restricted to the examples dis¬ closed. Rather, other variants may be derived therefrom by a person skilled in the art without departing from the protec¬ tive scope of the invention.
REFERENCE SYMBOLS
1 carrier
2 first lead frame section
3 second lead frame section
4 connecting layer
5 first side first lead frame
6 distance
7 second side second lead frame 8 thickness
9 recess
10 locking structure
11 first recess
12 second recess
13 subcarrier
14 conductive layer
15 carrier layer
16 second conductive layer
17 first mask layer
18 first free area
19 second free area
20 first opening
21 second opening
22 distance
23 conductive material
24 first lead frame
25 second lead frame
26 second mask layer
27 further second mask opening
28 space
29 side face first lead frame
30 side face second lead frame
31 mould material
32 mould material layer
33 further recess
34 protective film
35 first lead frame section layer
36 third mask layer optoelectronic component bond wire
first locking recess second locking recess locking projection
second locking projection lens
rim
second mask opening
further second mask opening third mask opening
further third mask opening

Claims

Method for producing a carrier for an optoelectronic component, wherein a subcarrier is provided, wherein a first mask layer is deposited on the subcarrier, wherein the first mask layer has at least two mask openings extending from an upper side of the first mask layer to a bottom side of the first mask layer, wherein the first mask lay¬ er covers predetermined areas of the subcarrier and pro¬ vides at least two free areas of the subcarrier in the mask openings, wherein electroconductive material is de¬ posited in the mask openings and on the free areas of the subcarrier, wherein the first mask layer is removed providing two separate lead frame sections made of elec¬ troconductive material, wherein the two lead frame sec¬ tions are arranged side by side with a free space between two side faces of the two lead frame sections, wherein mould material is formed in the free space between the two lead frame sections forming a mould material layer connecting the two side faces of the two lead frame sec¬ tions, removing the subcarrier and attaining the carrier with two lead frame sections , wherein the lead frame sections are connected by a mould material layer.
Method of claim 1, wherein after the deposition of the electroconductive material a second mask layer with sec¬ ond mask openings is deposited on the first mask layer, wherein the second mask openings extend from an upper side to a bottom side of the second mask layer, wherein the second mask openings are at least partially arranged on the electroconductive material , wherein electrocon¬ ductive material is deposited in the second mask open¬ ings, wherein the second mask layer is removed providing the first and the second lead frame section, wherein mould material is formed at the first and the second lead frame section, wherein the mould material is a mould ma¬ terial layer connecting the two lead frame sections.
Method of claim 2, wherein after the deposition of the electroconductive material in the second mask openings of the second mask layer a third mask layer with third mask openings is deposited on the second mask layer, wherein the third mask openings extend from an upper side to a bottom side of the third mask layer, wherein at least one third mask opening is at least partially arranged above a second mask opening of the second mask layer and above the second mask layer adjacent to the second mask open¬ ing, wherein electroconductive material is deposited in the third mask openings, wherein the third mask layer is removed providing the two lead frame sections, wherein mould material is formed at the two lead frame sections building a mould layer material connecting the two lead frame sections wherein the mould material layer has a locking feature that projects in a recess of a side face of one of the lead frame sections.
Method according to any one of the preceding claims, wherein the first mask layer is deposited on the subcar- rier, wherein after the deposition of the first mask layer openings are formed in the first mask layer using pho¬ tolithographic processes.
Method of claim 2 to 4, wherein the second mask layer is deposited on the first mask layer, wherein after the dep¬ osition of the second mask layer the second openings are formed in the second mask layer using photolithographic processes .
Method of any one of the preceding claims, wherein the electroconductive material comprises or is made of metal.
Method according to any one of the preceding claims, wherein the subcarrier has a conductive layer, wherein the first mask is formed on the conductive layer, and wherein as electroconductive material metal is deposited in the openings of the first mask layer and on the con¬ ductive layer by an electroplating process.
8. Method according to any one of the preceding claims,
wherein the first mask layer is removed by a dry film stripping process.
9. Method according to any one of the preceding claims,
wherein an upper side of the lead frame sections and the mould material layer are covered by a protection layer before the subcarrier is removed, and wherein after the removing of the subcarrier the protection layer is removed .
10. Method according to any one of the preceding claims,
wherein the subcarrier comprises an insulating layer, wherein the insulating layer is covered with a metal layer on a top side and with a further metal layer on a bot¬ tom side, wherein the first mask layer is formed on the metal layer of the top side.
11. Method according to any one of the preceding claims,
wherein the two mask openings of the first mask layer are arranged at a distance that is smaller than a thickness of the deposited electroconductive material.
12. Method according to claim 11, wherein the distance be¬ tween the two mask openings of the first mask layer is smaller than 0,1 mm and/or the height of the first metal layer is greater than 0,2 mm.
13. A carrier (1) for an optoelectronic component with two lead frame sections that are arranged side by side, wherein a mould material layer (32) is arranged between the two lead frame sections connecting two side faces of the two lead frame sections, wherein the two lead frame sections are made of deposited electroconductive materi¬ al .
14. Carrier (1) of claim 13, wherein the lead frame sections are made of metal.
15. Carrier of claim 14, wherein the lead frame sections are made of electroplated metal.
16. Carrier (1) of any one of the claims 13 to 15, wherein the lead frame sections (2, 3, 24, 25) are arranged side by side with a given distance (6), wherein the lead frame sections have a given thickness (8), wherein the given distance (6) between the sides of the lead frame sections is smaller than the thickness (8) of the lead frame sec¬ tions .
17. Carrier (1) of any one of the claims 13 to 16, wherein the lead frame sections have a thickness (8) larger than 0,1 mm, especially larger than 0,2 mm.
18. Carrier (1) of any one of the claims 13 to 17, wherein the lead frame sections are arranged side by side with a given distance (6), wherein the given distance (6) is smaller than 0,2 mm, especially smaller than 0,15 mm.
PCT/EP2017/053798 2017-02-20 2017-02-20 Method for producing a carrier for an optoelectronic component, and carrier for an optoelectronic component WO2018149511A1 (en)

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