WO2018196096A1 - 像素驱动电路、显示面板及像素驱动方法 - Google Patents

像素驱动电路、显示面板及像素驱动方法 Download PDF

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Publication number
WO2018196096A1
WO2018196096A1 PCT/CN2017/086738 CN2017086738W WO2018196096A1 WO 2018196096 A1 WO2018196096 A1 WO 2018196096A1 CN 2017086738 W CN2017086738 W CN 2017086738W WO 2018196096 A1 WO2018196096 A1 WO 2018196096A1
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Prior art keywords
switch
gate
control signal
driving
compensation current
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English (en)
French (fr)
Inventor
蔡玉莹
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Priority to US15/543,996 priority Critical patent/US10360849B2/en
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/043—Compensation electrodes or other additional electrodes in matrix displays related to distortions or compensation signals, e.g. for modifying TFT threshold voltage in column driver
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G09G2310/0251—Precharge or discharge of pixel before applying new pixel voltage
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0262—The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen

Definitions

  • the current Organic Light Emitting Diode (OLED) display has the advantages of small size, simple structure, autonomous illumination, high brightness, large viewing angle, and short response time, which attracts extensive attention.
  • a control circuit is connected between the drain and the gate of the first switch, the control circuit is configured to input a first control signal and output a compensation current to compensate a threshold voltage drift of the first switch;
  • a display panel the display panel includes a pixel driving circuit, and the pixel driving circuit includes:
  • a control circuit is connected between the drain and the gate of the first switch, the control circuit is configured to input a first control signal and output a compensation current to compensate a threshold voltage drift of the first switch;
  • a storage unit connected between a source of the second switch and a gate of the first switch, the storage unit configured to store a compensation voltage provided to the first switch by the compensation current;
  • a third switch is connected between the compensation current output end and a drain of the first switch, and a gate of the third switch is used to input the first control signal;
  • the first switch, the second switch, the third switch, and the fourth switch are all N-type thin film transistors.
  • the first switch, the second switch, the third switch, and the fourth switch are all P-type thin film transistors.
  • a pixel driving method comprising a pixel driving circuit, comprising: a driving power source, an organic light emitting diode, a driving switch, a first switch, a second switch, a storage unit and a control circuit, wherein the driving switch is connected to the driving Between the power source and the organic light emitting diode, the first switch is connected between the source and the gate of the driving switch, and the first switch and the driving switch are transistors of the same type, the control a circuit is coupled between a drain and a gate of the first switch, the memory cell being coupled between a source of the second switch and a gate of the first switch, the method comprising:
  • the memory unit applying the compensation voltage to a gate of the drive switch and the a data voltage, the driving power source driving the organic light emitting diode to emit light.
  • control circuit comprises:
  • a third switch connected between the compensation current output terminal and a drain of the first switch, a gate of the third switch inputs the first control signal
  • the first switch, the second switch, the third switch, and the fourth switch are all N-type thin film transistors.
  • the first switch, the second switch, the third switch, and the fourth switch are all P-type thin film transistors.
  • the beneficial effects of the present application are as follows: during the first time period, the compensation current compensates for the threshold voltage drift of the first switch, and is stored in the storage unit in the form of a compensation voltage, and the storage unit stores the data voltage in the second time period, and in the third The time period releases the compensation voltage and the data voltage to control the driving voltage to drive the organic light emitting diode to emit light, the gate of the first switch is electrically connected to the gate of the driving switch, the source of the first switch is electrically connected to the source of the driving switch, and the first A switch and a drive switch are the same type of transistor, the threshold voltage drift is the same, the first switch is compensated for the compensation drive switch, the compensation current and the data signal are independently applied to the pixel drive circuit, and the drive switch is compensated without affecting the data signal.
  • the threshold voltage drifts, the current of the organic light emitting diode is stable, and the brightness of the display panel is uniform.
  • FIG. 1 is a circuit diagram of a pixel driving circuit according to an embodiment of the present application.
  • FIG. 2 is a timing diagram of a pixel driving method according to an embodiment of the present application.
  • FIG. 4 is a schematic diagram of a circuit state of a second time period of a pixel driving method according to an embodiment of the present disclosure. Figure.
  • FIG. 5 is a schematic diagram of a circuit state of a third time period of a pixel driving method according to an embodiment of the present disclosure.
  • the pixel driving circuit provided by the embodiment of the present application is applied to an organic light emitting diode display for providing a stable current to the organic light emitting diode to drive the organic light emitting diode to emit light, and the brightness of the light emitting is uniform.
  • the organic light emitting diode has the characteristics of high power saving efficiency, fast response, light weight, thin thickness, simple structure and low cost, and is widely used in display devices.
  • I ds K(V gs -V th ) 2 (1)
  • the current I ds flowing through the driving switch 40 for driving the organic light emitting diode 10 depends on the voltage difference V gs between the gate and the source and the threshold voltage V th , and needs to pass when the threshold voltage V th of the driving switch 40 drifts.
  • the gate and source voltage difference Vgs compensates for the threshold voltage Vth drift of the drive switch 40.
  • the first switch 502 is connected between the source and the gate of the driving switch 40. Further, the source of the first switch 502 and the source of the driving switch 40 are connected to the organic light emitting diode 10 together.
  • the first switch 502 is also a thin film transistor, and the first switch 502 and the driving switch 40 are transistors of the same type, that is, the carrier mobility ⁇ of the first switch 502 and the driving switch 40, and the channel width W.
  • the channel length L is the same, causing the first switch 502 and the driving switch 40 to have the same threshold voltage Vth drift, combined with the connection manner of the first switch 502 and the driving switch 40 (the gate of the first switch 502 is connected to the driving switch 40)
  • the gate of the first switch 502 is connected to the source of the driving switch 40. Compensating for the threshold voltage Vth drift of the first switch 502 is equivalent to compensating for the threshold voltage Vth drift of the driving switch 40.
  • the control circuit 30 is connected between the drain and the gate of the first switch 502.
  • the control circuit 30 is configured to input the first control signal V S1 and output the compensation current I ref to compensate for the threshold voltage V th drift of the first switch 502.
  • the first control signal V S1 controls the on and off of the control circuit 30, thereby controlling whether the compensation current I ref can flow to the first switch 502.
  • the first control signal V S1 is provided by the first scan line of the display panel.
  • the memory unit 20 is connected between the source of the second switch 504 and the gate of the first switch 502 for charging and storing the charge and discharging the charge.
  • the storage unit 20 stores different voltages stored in different time periods. Specifically, the first time period storage unit 20 stores the compensation voltage I ref to the compensation voltage of the first switch 502, and the second time period storage unit 20 stores the data voltage V. Data and simultaneously release the compensation voltage and the data voltage V data during the third time period.
  • the storage unit 20 is a capacitor. In other embodiments, the storage unit 20 may also be other electronic devices having a storage function.
  • the compensation current I ref compensates for the threshold voltage V th of the first switch 502 to drift, and is stored in the memory unit 20 in the form of a compensation voltage, and the memory unit 20 stores the data voltage V data in the second period of time, and The third period of time releases the compensation voltage and the data voltage V data to control the driving voltage V dd to drive the organic light emitting diode 10 to emit light
  • the gate of the first switch 502 is electrically connected to the gate of the driving switch 40
  • the source of the first switch 502 is The source of the driving switch 40 is electrically connected, and the first switch 502 and the driving switch 40 are the same type of transistors, the threshold voltage Vth drifts the same
  • the first switch 502 is compensated, that is, the compensation driving switch 40, the compensation current I ref and the data signal V d is independently applied to the pixel driving circuit, without affecting the data signal V d, the compensation driving switching threshold voltage V th 40 drift current of the organic light emitting diode 10 is stabilized, the display
  • the control circuit 30 includes a compensation current output terminal, a third switch 506 and a fourth switch 508.
  • the compensation current output terminal is used to output a compensation current I ref
  • the compensation current I ref passes through the third switch 506 and the fourth switch 508 . It then flows to the first switch 502.
  • the third switch 506 is connected between the compensation current output terminal and the drain of the first switch 502
  • the fourth switch 508 is connected between the compensation current output terminal and the gate of the first switch 502, and the gate of the third switch 506
  • the gates of the poles and fourth switches 508 are used to input a second control signal V S2 , and the third switch 506 and the fourth switch 508 maintain the same on-off state under the control of the second control signal V S2 .
  • the third switch 506 and the fourth switch 508 are both in an on state, the gate and the drain of the first switch 502 are shorted, the first switch 502 is equivalent to a diode, and the compensation current I ref flows through the first switch 502.
  • the threshold voltage Vth of the first switch 502 is compensated for drift and stored in the memory unit 20 in the form of a compensation voltage for compensating for the threshold voltage Vth drift of the drive switch 40 during the third time period (lighting phase).
  • the first switch 502, the second switch 504, the third switch 506, and the fourth switch 508 are all N-type thin film transistors. In other embodiments, the first switch 502, the second switch 504, and the third switch The 506 and fourth switch 508 can also be P-type thin film transistors.
  • the compensation current I ref compensates for the threshold voltage V th of the first switch 502 to drift, and is stored in the memory unit 20 in the form of a compensation voltage, and the memory unit 20 stores the data voltage V data in the second period of time, and The third period of time releases the compensation voltage and the data voltage V data to control the driving voltage V dd to drive the organic light emitting diode 10 to emit light
  • the gate of the first switch 502 is electrically connected to the gate of the driving switch 40
  • the source of the first switch 502 is The source of the driving switch 40 is electrically connected, and the first switch 502 and the driving switch 40 are the same type of transistors, the threshold voltage Vth drifts the same
  • the first switch 502 is compensated, that is, the compensation driving switch 40, the compensation current I ref and the data signal V d is independently applied to the pixel driving circuit, without affecting the data signal V d, the compensation driving switching threshold voltage V th 40 drift current of the organic light emitting diode 10 is stabilized, the display
  • the embodiment of the present application further provides a display panel including the pixel driving circuit described above.
  • the embodiment of the present application further provides a pixel driving method, which is implemented by the pixel driving circuit provided by the embodiment of the present application.
  • the pixel driving circuit includes a driving power source, an organic light emitting diode 10, a driving switch 40, a first switch 502, and a
  • the second switch 504, the storage unit 20 and the control circuit 30 are connected between the driving power source and the organic light emitting diode 10, the first switch 502 is connected between the source and the gate of the driving switch 40, and the first switch 502
  • the drive switch 40 is the same type of transistor, the control circuit 30 is connected between the drain and the gate of the first switch 502, and the memory unit 20 is connected between the source of the second switch 504 and the gate of the first switch 502.
  • the driving switch 40, the first switch 502, the second switch 504, the third switch 506, and the fourth switch 508 are all N-type thin film transistors.
  • the pixel driving method provided by the embodiment of the present application includes the following steps:
  • V gs (I ds /K) 1/2 +V th
  • the memory unit 20 includes a first connection terminal A and a second connection terminal B, and the potential V A of the first connection terminal A is equal to the gate potential V g of the first switch 502, that is,
  • the potential V B of the second connection terminal B is the reference voltage V ref transmitted by the data line through the second switch 504, that is,
  • V B V ref
  • the reference voltage V ref is a reference value for comparison with a subsequent data voltage V data .
  • the compensation current I ref of the threshold voltage V th drift is stored in the memory unit 20 in the form of a compensation voltage. Since the first switch 502 is the same as the model of the drive switch 40, the first switch is in the subsequent third time period t3 (lighting phase). The compensation of 502 is equivalent to the compensation of drive switch 40.
  • the first control signal V S1 and the second control signal V S2 are loaded, wherein the first control signal V S1 is a low level signal, and the second control signal V S2 is high.
  • the level signal thereby turning on the second switch 504, turns off the control circuit 30.
  • a second data line through the switch 504 to the data storage unit 20 outputs a signal V d, and the data voltage V data stored in the storage unit 20.
  • the potential V A of the first connection terminal A of the memory cell 20 is also The same amount of change occurs. Specifically, the amount of change in potential is V data -V ref , so the potential of the first connection terminal A of the memory cell 20 at this time
  • V A (I ds /K) 1/2 +V th +V oled +V data -V ref
  • the storage unit 20 stores the data voltage Vdata for controlling the drive switch 40 to illuminate the organic light emitting diode 10 in a subsequent third period of time (lighting phase).
  • the compensation current I ref compensates for the threshold voltage V th of the first switch 502 to drift, and is stored in the memory unit 20 in the form of a compensation voltage, and the memory unit 20 stores the data voltage V data in the second time period t2.
  • the gate of the first switch 502 is electrically connected to the gate of the driving switch 40, and the first switch 502 is The source is electrically connected to the source of the driving switch 40, and the first switch 502 and the driving switch 40 are the same type of transistors, the threshold voltage Vth drifts the same, the first switch 502 is compensated, that is, the compensation driving switch 40, the compensation current I ref and a case where a data signal V d applied to the pixel driving circuit independently, without affecting the data signal V d, offset drive switching threshold voltage V th 40 drift current of the organic light emitting diode 10 is stabilized, the display luminance of the display panel uniform.
  • the control circuit 30 includes a compensation current output terminal, a third switch 506 and a fourth switch 508.
  • the compensation current output terminal is used to output a compensation current I ref
  • the compensation current I ref passes through the third switch 506 and the fourth switch 508 . It then flows to the first switch 502.
  • the third switch 506 is connected between the compensation current output terminal and the drain of the first switch 502
  • the fourth switch 508 is connected between the compensation current output terminal and the gate of the first switch 502, and the gate of the third switch 506
  • the gates of the poles and fourth switches 508 are used to input a second control signal V S2 , and the third switch 506 and the fourth switch 508 maintain the same on-off state under the control of the second control signal V S2 .
  • the third switch 506 and the fourth switch 508 are both in an on state, the gate and the drain of the first switch 502 are shorted, the first switch 502 is equivalent to a diode, and the compensation current I ref flows through the first switch 502.
  • the threshold voltage Vth of the first switch 502 is compensated for drift and stored in the memory unit 20 in the form of a compensation voltage for compensating for the threshold voltage Vth drift of the drive switch 40 during the third time period (lighting phase).
  • the first switch 502, the second switch 504, the third switch 506, and the fourth switch 508 are all N-type thin film transistors. In other embodiments, the first switch 502, the second switch 504, and the third switch The 506 and fourth switch 508 can also be P-type thin film transistors.
  • a first compensation current I ref compensated switching threshold voltage V th 502 drift, and the compensation voltage stored in the form storage unit 20, storage unit 20 in the second time period t2 is stored in the data voltage V data, And releasing the compensation voltage and the data voltage V data to control the driving voltage V dd to drive the organic light emitting diode 10 to emit light in the third period t3, the gate of the first switch 502 is electrically connected to the gate of the driving switch 40, and the first switch 502 is The source is electrically connected to the source of the driving switch 40, and the first switch 502 and the driving switch 40 are the same type of transistors, the threshold voltage Vth drifts the same, the first switch 502 is compensated, that is, the compensation driving switch 40, the compensation current I ref and a case where a data signal V d applied to the pixel driving circuit independently, without affecting the data signal V d, offset drive switching threshold voltage V th 40 drift current of the organic light emitting diode 10 is stabilized, the display luminance

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of El Displays (AREA)
  • Electroluminescent Light Sources (AREA)
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Abstract

一种像素驱动电路、显示面板和像素驱动方法，像素驱动电路包括：驱动开关（40），连接在驱动电源与有机发光二极管（10）之间；第一开关（502），连接在驱动开关（40）的源极和栅极之间，并且第一开关（502）和驱动开关（40）为相同型号的晶体管；控制电路（30），连接在第一开关（502）的漏极和栅极之间，控制电路（30）用于输入第一控制信号（V S1）及输出补偿电流（I ref）补偿第一开关（502）的阈值电压漂移；存储单元（20），连接在第二开关（504）的源极和第一开关（502）的栅极之间，存储单元（20）用于存储补偿电流（I ref）提供至第一开关（502）的补偿电压；第二开关（504）的栅极用于输入第二控制信号（V S2），第二开关（504）的漏极用于输入数据信号（V d）；其有机发光二极管（10）的电流稳定，显示面板亮度显示均匀。

Description

像素驱动电路、显示面板及像素驱动方法
本申请要求于2017年4月28日提交中国专利局、申请号为2017102961149、申请名称为“像素驱动电路、显示面板及像素驱动方法”的中国专利申请的优先权，上述在先申请的内容以引入的方式并入本文本中。
技术领域
本申请涉及显示技术领域，尤其是涉及一种像素驱动电路、显示面板及像素驱动方法。
背景技术
目前的有机发光二极管(Organic Light Emitting Diode，OLED)显示器具有体积小、结构简单、自主发光、亮度高、可视角度大、响应时间短等优点，吸引了广泛的注意。
现有的有机发光二极管显示器中有一个晶体管作为驱动晶体管用于控制通过有机发光二极管OLED的电流，因此驱动晶体管的阈值电压的重要性便十分明显，所述阈值电压的正向或负向漂移都会使得在相同数据信号下有不同的电流通过有机发光二极管，目前的晶体管在使用过程中如氧化物半导体中的照光、源漏电极电压应力作用等因素，都可能导致阈值电压漂移，造成通过有机发光二极管的电流不稳定，进而引起面板亮度显示不均匀。
申请内容
本申请要解决的技术问题是提供一种像素驱动电路、显示面板及像素驱动方法，用以解决现有技术中阈值电压漂移造成有机发光二极管的电流不稳定，以此实现面板亮度显示均匀的问题。
为解决上述技术问题，本申请提供一种像素驱动电路，包括：
驱动开关，连接在驱动电源与有机发光二极管之间；
第一开关，连接在所述驱动开关的源极和栅极之间，并且所述第一开关和 所述驱动开关为相同型号的晶体管；
控制电路，连接在所述第一开关的漏极和栅极之间，所述控制电路用于输入第一控制信号及输出补偿电流补偿所述第一开关的阈值电压漂移；
存储单元，连接在第二开关的源极和所述第一开关的栅极之间，所述存储单元用于存储所述补偿电流提供至所述第一开关的补偿电压；
所述第二开关的栅极用于输入第二控制信号，所述第二开关的漏极用于输入数据信号，所述存储单元用于存储所述数据信号产生的数据电压；
所述存储单元用于向所述驱动开关施加所述补偿电压和所述数据电压。
其中，所述控制电路包括：
补偿电流输出端，用于输出所述补偿电流；
第三开关，连接在所述补偿电流输出端与所述第一开关的漏极之间，所述第三开关的栅极用于输入所述第一控制信号；
第四开关，连接在所述补偿电流输出端与所述第一开关的栅极之间，所述第四开关的栅极用于输入所述第一控制信号。
其中，所述第一开关、所述第二开关、所述第三开关及所述第四开关均为N型薄膜晶体管。
其中，所述第一开关、所述第二开关、所述第三开关及所述第四开关均为P型薄膜晶体管。
一种显示面板，所述显示面板包括像素驱动电路，所述像素驱动电路，包括：
驱动开关，连接在驱动电源与有机发光二极管之间；
第一开关，连接在所述驱动开关的源极和栅极之间，并且所述第一开关和所述驱动开关为相同型号的晶体管；
控制电路，连接在所述第一开关的漏极和栅极之间，所述控制电路用于输入第一控制信号及输出补偿电流补偿所述第一开关的阈值电压漂移；
存储单元，连接在第二开关的源极和所述第一开关的栅极之间，所述存储单元用于存储所述补偿电流提供至所述第一开关的补偿电压；
所述第二开关的栅极用于输入第二控制信号，所述第二开关的漏极用于输入数据信号，所述存储单元用于存储所述数据信号产生的数据电压；
所述存储单元用于向所述驱动开关施加所述补偿电压和所述数据电压。
其中，所述控制电路包括：
补偿电流输出端，用于输出所述补偿电流；
第三开关，连接在所述补偿电流输出端与所述第一开关的漏极之间，所述第三开关的栅极用于输入所述第一控制信号；
第四开关，连接在所述补偿电流输出端与所述第一开关的栅极之间，所述第四开关的栅极用于输入所述第一控制信号。
其中，所述第一开关、所述第二开关、所述第三开关及所述第四开关均为N型薄膜晶体管。
其中，所述第一开关、所述第二开关、所述第三开关及所述第四开关均为P型薄膜晶体管。
一种像素驱动方法，提供像素驱动电路，所述像素驱动电路包括驱动电源、有机发光二极管、驱动开关、第一开关、第二开关、存储单元及控制电路，所述驱动开关连接在所述驱动电源与所述有机发光二极管之间，所述第一开关连接在所述驱动开关的源极和栅极之间，并且所述第一开关和所述驱动开关为相同型号的晶体管，所述控制电路连接在所述第一开关的漏极和栅极之间，所述存储单元连接在第二开关的源极和所述第一开关的栅极之间，所述方法包括：
在第一时间段，加载第一控制信号与第二控制信号，导通所述第二开关与所述控制电路，所述控制电路加载补偿电流，补偿所述第一开关的阈值电压漂移，并将补偿电压存储于所述存储单元；
在第二时间段，加载第一控制信号与第二控制信号，导通所述第二开关，断开所述控制电路，向所述存储单元输出数据信号，所述存储单元存储所述数据信号产生的数据电压；
在第三时间段，加载第一控制信号与第二控制信号，断开所述第二开关与所述控制电路，所述存储单元向所述驱动开关的栅极施加所述补偿电压和所述数据电压，所述驱动电源驱动所述有机发光二极管发光。
其中，所述控制电路包括：
补偿电流输出端，用于输出所述补偿电流；
第三开关，连接在所述补偿电流输出端与所述第一开关的漏极之间，所述 第三开关的栅极输入所述第一控制信号；
第四开关，连接在所述补偿电流输出端与所述第一开关的栅极之间，所述第四开关的栅极输入所述第一控制信号。
其中，所述第一开关、所述第二开关、所述第三开关及所述第四开关均为N型薄膜晶体管。
其中，所述第一开关、所述第二开关、所述第三开关及所述第四开关均为P型薄膜晶体管。
其中，所述第一时间段与所述第二时间段之间、所述第二时间段与所述第三时间段之间设有过渡时间段，用于预留时间传递所述第一控制信号、所述第二控制信号及所述数据信号。
本申请的有益效果如下：在第一时间段，补偿电流补偿第一开关的阈值电压漂移，并以补偿电压的形式存储在存储单元，存储单元在第二时间段存储数据电压，并在第三时间段释放补偿电压与数据电压以控制驱动电压驱动有机发光二极管发光，第一开关的栅极与驱动开关的栅极电连接，第一开关的源极与驱动开关的源极电连接，并且第一开关与驱动开关为相同型号的晶体管，阈值电压漂移相同，补偿第一开关即补偿驱动开关，补偿电流与数据信号独立施加于像素驱动电路，在不影响数据信号的情况下，补偿驱动开关的阈值电压漂移，有机发光二极管的电流稳定，显示面板亮度显示均匀。
附图说明
为了更清楚地说明本申请实施例中的技术方案，下面将对实施例中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本申请实施例提供的像素驱动电路的电路图。
图2为本申请实施例提供的像素驱动方法的时序图。
图3为本申请实施例提供的像素驱动方法的第一时间段的电路状态示意图。
图4为本申请实施例提供的像素驱动方法的第二时间段的电路状态示意 图。
图5为本申请实施例提供的像素驱动方法的第三时间段的电路状态示意图。
具体实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
本申请实施例提供的像素驱动电路应用于有机发光二极管显示器，用于向有机发光二极管提供稳定的电流以驱动有机发光二极管发光，且发光的亮度均匀。有机发光二极管具有省电效率高、反应快、重量轻、厚度薄，构造简单、成本低等特点，广泛应用于显示设备中。
请参阅图1，本申请实施例提供的像素驱动电路包括驱动电源、有机发光二极管10、驱动开关40、第一开关502、第二开关504、存储单元20及控制电路30。具体的，驱动开关40连接在驱动电源与有机发光二极管10之间，驱动电源用于驱动有机发光二极管10发光，同时也用于驱动显示设备的其他电子器件工作。本实施例中，驱动开关40为薄膜晶体管(Thin Film Transistor，TFT)，薄膜晶体管是场效应晶体管的一种，具有栅极、漏极及源极，进一步的，薄膜晶体管包括N型薄膜晶体管与P型薄膜晶体管，以N型薄膜晶体管为例，当栅极和源极的电压差Vgs大于阈值电压Vth时，漏极与源极导通，电流从漏极流向源极，即电流流过驱动开关40驱动有机发光二极管10发光，从而通过控制驱动开关40的栅极和源极的电压差Vgs可以控制驱动开关40的通断，进一步的，根据公式：
Ids＝K(Vgs-Vth)2                            (1)
其中，K＝μCoxW/(2L)，μ为驱动开关40的载流子迁移率，W和L分别为驱动开关40的沟道的宽度和长度。
流经驱动开关40、用于驱动有机发光二极管10的电流Ids取决于栅极和源极的电压差Vgs及阈值电压Vth，当驱动开关40的阈值电压Vth发生漂移时， 需要通过栅极和源极的电压差Vgs补偿驱动开关40的阈值电压Vth漂移。
第一开关502连接在驱动开关40的源极和栅极之间，进一步的，第一开关502的源极和驱动开关40的源极一同连接至有机发光二极管10。本实施例中，第一开关502亦为薄膜晶体管，并且第一开关502和驱动开关40为相同型号的晶体管，即第一开关502和驱动开关40的载流子迁移率μ、沟道宽度W及沟道长度L均相同，导致第一开关502和驱动开关40具有相同的阈值电压Vth漂移，结合第一开关502与驱动开关40的连接方式(第一开关502的栅极连接驱动开关40的栅极，第一开关502的源极连接驱动开关40的源极)，补偿第一开关502的阈值电压Vth漂移即等同于补偿驱动开关40的阈值电压Vth漂移。
控制电路30连接在第一开关502的漏极和栅极之间，控制电路30用于输入第一控制信号VS1及输出补偿电流Iref补偿第一开关502的阈值电压Vth漂移。具体的，第一控制信号VS1控制控制电路30的通断，从而控制补偿电流Iref是否能够流向第一开关502。本实施例中，第一控制信号VS1由显示面板的第一扫描线提供。
存储单元20连接在第二开关504的源极和第一开关502的栅极之间，用于充电存储电荷及放电释放电荷。存储单元20存储在不同的时间段存储不同的电压，具体的，第一时间段存储单元20存储补偿电流Iref提供至第一开关502的补偿电压，第二时间段存储单元20存储数据电压Vdata，并且在第三时间段同时释放补偿电压和数据电压Vdata。一种较佳的实施方式中，存储单元20为电容器，其他实施方式中，存储单元20也可以为其他具有存储功能的电子器件。
第二开关504的源极连接存储单元20，漏极连接数据线，栅极连接第二扫描线，第二扫描线向栅极输出第二控制信号VS2，数据线向第二开关504输出数据信号Vd，并将数据信号Vd以数据电压Vdata的形式存储在存储单元20，以用于后续向驱动开关40输出并控制有机发光二极管10发光。
在第一时间段，补偿电流Iref补偿第一开关502的阈值电压Vth漂移，并以补偿电压的形式存储在存储单元20，存储单元20在第二时间段存储数据电压Vdata，并在第三时间段释放补偿电压与数据电压Vdata以控制驱动电压Vdd驱动 有机发光二极管10发光，第一开关502的栅极与驱动开关40的栅极电连接，第一开关502的源极与驱动开关40的源极电连接，并且第一开关502与驱动开关40为相同型号的晶体管，阈值电压Vth漂移相同，补偿第一开关502即补偿驱动开关40，补偿电流Iref与数据信号Vd独立施加于像素驱动电路，在不影响数据信号Vd的情况下，补偿驱动开关40的阈值电压Vth漂移，有机发光二极管10的电流稳定，显示面板亮度显示均匀。
本实施例中，控制电路30包括补偿电流输出端、第三开关506及第四开关508，补偿电流输出端用于输出补偿电流Iref，补偿电流Iref经过第三开关506和第四开关508后流向第一开关502。进一步，第三开关506连接在补偿电流输出端与第一开关502的漏极之间，第四开关508连接在补偿电流输出端与第一开关502的栅极之间，第三开关506的栅极和第四开关508的栅极用于输入第二控制信号VS2，在第二控制信号VS2的控制下，第三开关506和第四开关508保持相同的通断状态。当第三开关506和第四开关508均为导通状态时，第一开关502的栅极和漏极被短接，第一开关502相当于二极管，补偿电流Iref流过第一开关502以补偿第一开关502的阈值电压Vth漂移，并以补偿电压的形式存储在存储单元20，以用于在第三时间段(发光阶段)补偿驱动开关40的阈值电压Vth漂移。
一种实施方式中，第一开关502、第二开关504、第三开关506及第四开关508均为N型薄膜晶体管，其他实施方式中，第一开关502、第二开关504、第三开关506及第四开关508也可以为P型薄膜晶体管。
在第一时间段，补偿电流Iref补偿第一开关502的阈值电压Vth漂移，并以补偿电压的形式存储在存储单元20，存储单元20在第二时间段存储数据电压Vdata，并在第三时间段释放补偿电压与数据电压Vdata以控制驱动电压Vdd驱动有机发光二极管10发光，第一开关502的栅极与驱动开关40的栅极电连接，第一开关502的源极与驱动开关40的源极电连接，并且第一开关502与驱动开关40为相同型号的晶体管，阈值电压Vth漂移相同，补偿第一开关502即补偿驱动开关40，补偿电流Iref与数据信号Vd独立施加于像素驱动电路，在不影响数据信号Vd的情况下，补偿驱动开关40的阈值电压Vth漂移，有机发光二极管10的电流稳定，显示面板亮度显示均匀。
本申请实施例还提供了一种显示面板，包括以上所述的像素驱动电路。
本申请实施例还提供了一种像素驱动方法，通过本申请实施例提供的像素驱动电路实现，具体的，像素驱动电路包括驱动电源、有机发光二极管10、驱动开关40、第一开关502、第二开关504、存储单元20及控制电路30，驱动开关40连接在驱动电源与有机发光二极管10之间，第一开关502连接在驱动开关40的源极和栅极之间，并且第一开关502和驱动开关40为相同型号的晶体管，控制电路30连接在第一开关502的漏极和栅极之间，存储单元20连接在第二开关504的源极和第一开关502的栅极之间。本实施例中，驱动开关40、第一开关502、第二开关504、第三开关506及第四开关508均为N型薄膜晶体管。
结合图2，本申请实施例提供的像素驱动方法包括以下步骤：
S101、在第一时间段t1，结合图3，加载第一控制信号VS1与第二控制信号VS2，其中第一控制信号VS1和第二控制信号VS2均为高电平信号，从而导通第二开关504与控制电路30。控制电路30加载补偿电流Iref，补偿第一开关502的阈值电压Vth漂移，并将补偿电压存储于存储单元20。
本实施例中，当控制电路30为导通状态时，第一开关502的栅极和漏极被短接，第一开关502相当于二极管，补偿电流Iref流过第一开关502，即Ids＝Iref，根据公式(1)，第一开关502的栅极和源极的电压差
Vgs＝(Ids/K)1/2+Vth
进一步的，由于
Vgs＝Vg-Vs
Vs＝Voled
故Vg＝(Ids/K)1/2+Vth+Voled
其中Vg为第一开关502的栅极的电势，Vs为第一开关502的源极的电势，Voled为有机发光二极管10的电势。
进一步的，设存储单元20包括第一连接端A和第二连接端B，第一连接端A的电势VA与第一开关502的栅极电势Vg相等，即
VA＝Vg＝(Ids/K)1/2+Vth+Voled
第二连接端B的电势VB为数据线通过第二开关504传递的参考电压Vref， 即
VB＝Vref
参考电压Vref为一个参考值，用于与后续的数据电压Vdata作比较。
由此，在第一时间段t1，存储单元20的两端电势分别为VA＝(Ids/K)1/2+Vth+Voled、VB＝Vref，补偿第一开关502的阈值电压Vth漂移的补偿电流Iref以补偿电压的形式存储在存储单元20，由于第一开关502与驱动开关40的型号相同，在后续的第三时间段t3(发光阶段)对第一开关502的补偿等效于对驱动开关40的补偿。
S102、在第二时间段t2，结合图4，加载第一控制信号VS1与第二控制信号VS2，其中第一控制信号VS1为低电平信号，第二控制信号VS2均为高电平信号，从而导通第二开关504，断开控制电路30。数据线通过第二开关504向存储单元20输出数据信号Vd，并以数据电压Vdata存储于存储单元20。此时，存储单元20的第二连接端B的电势VB＝Vd＝Vdata，由于存储单元20的两端的电势不能单独发生突变，存储单元20的第一连接端A的电势VA也发生相同的变化量，具体的，电势的变化量为Vdata-Vref，故此时存储单元20的第一连接端A的电势
VA＝(Ids/K)1/2+Vth+Voled+Vdata-Vref
由此，在第二时间段t2，存储单元20的两端电势分别为VA＝(Ids/K)1/2+Vth+Voled+Vdata-Vref、VB＝Vdata，存储单元20存储数据电压Vdata，用于在后续的第三时间段(发光阶段)控制驱动开关40以使有机发光二极管10发光。
S103、在第三时间段t3，结合图4，加载第一控制信号VS1与第二控制信号VS2，其中第一控制信号VS1和第二控制信号VS2均为低电平信号，断开第二开关504与控制电路30，存储单元20向驱动开关40的栅极施加补偿电压和数据电压Vdata，驱动电源驱动有机发光二极管10发光。具体的，存储单元20进行放电，存储单元20的第一连接端A电势VA＝(Ids/K)1/2+Vth+Voled+Vdata-Vref，包括了第一时间段用于补偿驱动开关40阈值电压Vth漂移的补偿电压和数据线提供的包含数据信号Vd的数据电压Vdata，使流过有机发光二极管10的电流稳定，显示面板亮度显示均匀。
在第一时间段t1，补偿电流Iref补偿第一开关502的阈值电压Vth漂移， 并以补偿电压的形式存储在存储单元20，存储单元20在第二时间段t2存储数据电压Vdata，并在第三时间段t3释放补偿电压与数据电压Vdata以控制驱动电压Vdd驱动有机发光二极管10发光，第一开关502的栅极与驱动开关40的栅极电连接，第一开关502的源极与驱动开关40的源极电连接，并且第一开关502与驱动开关40为相同型号的晶体管，阈值电压Vth漂移相同，补偿第一开关502即补偿驱动开关40，补偿电流Iref与数据信号Vd独立施加于像素驱动电路，在不影响数据信号Vd的情况下，补偿驱动开关40的阈值电压Vth漂移，有机发光二极管10的电流稳定，显示面板亮度显示均匀。
本实施例中，控制电路30包括补偿电流输出端、第三开关506及第四开关508，补偿电流输出端用于输出补偿电流Iref，补偿电流Iref经过第三开关506和第四开关508后流向第一开关502。进一步，第三开关506连接在补偿电流输出端与第一开关502的漏极之间，第四开关508连接在补偿电流输出端与第一开关502的栅极之间，第三开关506的栅极和第四开关508的栅极用于输入第二控制信号VS2，在第二控制信号VS2的控制下，第三开关506和第四开关508保持相同的通断状态。当第三开关506和第四开关508均为导通状态时，第一开关502的栅极和漏极被短接，第一开关502相当于二极管，补偿电流Iref流过第一开关502以补偿第一开关502的阈值电压Vth漂移，并以补偿电压的形式存储在存储单元20，以用于在第三时间段(发光阶段)补偿驱动开关40的阈值电压Vth漂移。
一种实施方式中，第一开关502、第二开关504、第三开关506及第四开关508均为N型薄膜晶体管，其他实施方式中，第一开关502、第二开关504、第三开关506及第四开关508也可以为P型薄膜晶体管。
一种较佳的实施方式中，第一时间段t1与第二时间段t2之间、第二时间段t2与第三时间段t3之间设有过渡时间段，用于预留时间传递第一控制信号VS1、第二控制信号VS2及数据信号Vd。
在第一时间段t1，补偿电流Iref补偿第一开关502的阈值电压Vth漂移，并以补偿电压的形式存储在存储单元20，存储单元20在第二时间段t2存储数据电压Vdata，并在第三时间段t3释放补偿电压与数据电压Vdata以控制驱动电压Vdd驱动有机发光二极管10发光，第一开关502的栅极与驱动开关40的栅 极电连接，第一开关502的源极与驱动开关40的源极电连接，并且第一开关502与驱动开关40为相同型号的晶体管，阈值电压Vth漂移相同，补偿第一开关502即补偿驱动开关40，补偿电流Iref与数据信号Vd独立施加于像素驱动电路，在不影响数据信号Vd的情况下，补偿驱动开关40的阈值电压Vth漂移，有机发光二极管10的电流稳定，显示面板亮度显示均匀。
以上所述，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本申请揭露的技术范围内，可轻易的想到各种等效的修改或替换，这些修改或替换都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应以权利要求的保护范围为准。

Claims (13)

  1. 一种像素驱动电路，其中，包括：
    驱动开关，连接在驱动电源与有机发光二极管之间；
    第一开关，连接在所述驱动开关的源极和栅极之间，并且所述第一开关和所述驱动开关为相同型号的晶体管；
    控制电路，连接在所述第一开关的漏极和栅极之间，所述控制电路用于输入第一控制信号及输出补偿电流补偿所述第一开关的阈值电压漂移；
    存储单元，连接在第二开关的源极和所述第一开关的栅极之间，所述存储单元用于存储所述补偿电流提供至所述第一开关的补偿电压；
    所述第二开关的栅极用于输入第二控制信号，所述第二开关的漏极用于输入数据信号，所述存储单元用于存储所述数据信号产生的数据电压；
    所述存储单元用于向所述驱动开关施加所述补偿电压和所述数据电压。
  2. 根据权利要求1所述的像素驱动电路，其中，所述控制电路包括：
    补偿电流输出端，用于输出所述补偿电流；
    第三开关，连接在所述补偿电流输出端与所述第一开关的漏极之间，所述第三开关的栅极用于输入所述第一控制信号；
    第四开关，连接在所述补偿电流输出端与所述第一开关的栅极之间，所述第四开关的栅极用于输入所述第一控制信号。
  3. 根据权利要求2所述的像素驱动电路，其中，所述第一开关、所述第二开关、所述第三开关及所述第四开关均为N型薄膜晶体管。
  4. 根据权利要求2所述的像素驱动电路，其中，所述第一开关、所述第二开关、所述第三开关及所述第四开关均为P型薄膜晶体管。
  5. 一种显示面板，其中，所述显示面板包括像素驱动电路，所述像素驱动电路，包括：
    驱动开关，连接在驱动电源与有机发光二极管之间；
    第一开关，连接在所述驱动开关的源极和栅极之间，并且所述第一开关和所述驱动开关为相同型号的晶体管；
    控制电路，连接在所述第一开关的漏极和栅极之间，所述控制电路用于输 入第一控制信号及输出补偿电流补偿所述第一开关的阈值电压漂移；
    存储单元，连接在第二开关的源极和所述第一开关的栅极之间，所述存储单元用于存储所述补偿电流提供至所述第一开关的补偿电压；
    所述第二开关的栅极用于输入第二控制信号，所述第二开关的漏极用于输入数据信号，所述存储单元用于存储所述数据信号产生的数据电压；
    所述存储单元用于向所述驱动开关施加所述补偿电压和所述数据电压。
  6. 根据权利要求5所述的显示面板，其中，所述控制电路包括：
    补偿电流输出端，用于输出所述补偿电流；
    第三开关，连接在所述补偿电流输出端与所述第一开关的漏极之间，所述第三开关的栅极用于输入所述第一控制信号；
    第四开关，连接在所述补偿电流输出端与所述第一开关的栅极之间，所述第四开关的栅极用于输入所述第一控制信号。
  7. 根据权利要求6所述的显示面板，其中，所述第一开关、所述第二开关、所述第三开关及所述第四开关均为N型薄膜晶体管。
  8. 根据权利要求6所述的显示面板，其中，所述第一开关、所述第二开关、所述第三开关及所述第四开关均为P型薄膜晶体管。
  9. 一种像素驱动方法，其中，提供像素驱动电路，所述像素驱动电路包括驱动电源、有机发光二极管、驱动开关、第一开关、第二开关、存储单元及控制电路，所述驱动开关连接在所述驱动电源与所述有机发光二极管之间，所述第一开关连接在所述驱动开关的源极和栅极之间，并且所述第一开关和所述驱动开关为相同型号的晶体管，所述控制电路连接在所述第一开关的漏极和栅极之间，所述存储单元连接在第二开关的源极和所述第一开关的栅极之间，所述方法包括：
    在第一时间段，加载第一控制信号与第二控制信号，导通所述第二开关与所述控制电路，所述控制电路加载补偿电流，补偿所述第一开关的阈值电压漂移，并将补偿电压存储于所述存储单元；
    在第二时间段，加载第一控制信号与第二控制信号，导通所述第二开关，断开所述控制电路，向所述存储单元输出数据信号，所述存储单元存储所述数据信号产生的数据电压；
    在第三时间段，加载第一控制信号与第二控制信号，断开所述第二开关与所述控制电路，所述存储单元向所述驱动开关的栅极施加所述补偿电压和所述数据电压，所述驱动电源驱动所述有机发光二极管发光。
  10. 根据权利要求9所述的像素驱动方法，其中，所述控制电路包括：
    补偿电流输出端，用于输出所述补偿电流；
    第三开关，连接在所述补偿电流输出端与所述第一开关的漏极之间，所述第三开关的栅极输入所述第一控制信号；
    第四开关，连接在所述补偿电流输出端与所述第一开关的栅极之间，所述第四开关的栅极输入所述第一控制信号。
  11. 根据权利要求10所述的像素驱动方法，其中，所述第一开关、所述第二开关、所述第三开关及所述第四开关均为N型薄膜晶体管。
  12. 根据权利要求10所述的像素驱动电路，其中，所述第一开关、所述第二开关、所述第三开关及所述第四开关均为P型薄膜晶体管。
  13. 根据权利要求9所述的像素驱动方法，其中，所述第一时间段与所述第二时间段之间、所述第二时间段与所述第三时间段之间设有过渡时间段，用于预留时间传递所述第一控制信号、所述第二控制信号及所述数据信号。
PCT/CN2017/086738 2017-04-28 2017-05-31 像素驱动电路、显示面板及像素驱动方法 Ceased WO2018196096A1 (zh)

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