WO2018161671A1 - 彩膜基板、显示面板及其检测方法 - Google Patents

彩膜基板、显示面板及其检测方法 Download PDF

Info

Publication number
WO2018161671A1
WO2018161671A1 PCT/CN2017/115878 CN2017115878W WO2018161671A1 WO 2018161671 A1 WO2018161671 A1 WO 2018161671A1 CN 2017115878 W CN2017115878 W CN 2017115878W WO 2018161671 A1 WO2018161671 A1 WO 2018161671A1
Authority
WO
WIPO (PCT)
Prior art keywords
display panel
light transmitting
display
extending direction
group
Prior art date
Application number
PCT/CN2017/115878
Other languages
English (en)
French (fr)
Inventor
姚丽清
陈曦
刘耀
李宗祥
廖加敏
Original Assignee
京东方科技集团股份有限公司
福州京东方光电科技有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 京东方科技集团股份有限公司, 福州京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US16/086,970 priority Critical patent/US11086060B2/en
Priority to EP17899860.5A priority patent/EP3594739B1/en
Publication of WO2018161671A1 publication Critical patent/WO2018161671A1/zh

Links

Images

Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/133374—Constructional arrangements; Manufacturing methods for displaying permanent signs or marks
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B5/00—Optical elements other than lenses
    • G02B5/20—Filters
    • G02B5/201—Filters in the form of arrays
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/1306—Details
    • G02F1/1309—Repairing; Testing
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509—Filters, e.g. light shielding masks
    • G02F1/133512—Light shielding layers, e.g. black matrix
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136259—Repairing; Defects
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/133388—Constructional arrangements; Manufacturing methods with constructional differences between the display region and the peripheral region
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136259—Repairing; Defects
    • G02F1/136263—Line defects
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0404—Matrix technologies
    • G09G2300/0413—Details of dummy pixels or dummy lines in flat panels

Definitions

  • the present disclosure relates to the field of display technology. Specifically, it relates to a color film substrate, a display panel, and a method of detecting a display panel.
  • a bad line may appear in the display unit.
  • the method for confirming the defective line number of the conventional display device is completed by the spotlight mark of the lighting device combined with the reflected light of the microscope. This method requires the use of a lighting machine and a microscope at the same time. It is necessary to confirm the number of the defective line one by one for multiple line defects, which is time consuming and laborious, and it is not possible to quickly confirm whether the abnormal point is located inside the display area.
  • Embodiments of the present disclosure provide a color film substrate, a display panel, and a method of detecting a display panel.
  • a first aspect of the present disclosure provides a color film substrate.
  • the color filter substrate includes a display area and a peripheral area corresponding to the virtual pixel area disposed around the display area, wherein a black matrix of the color filter substrate is in a portion of the peripheral area corresponding to the virtual pixel unit Having a light transmitting portion, and the light transmitting portion includes a first group of light transmitting portions and a second group of light transmitting portions, and wherein each of the first group of light transmitting portions is formed along the In a portion of the first side of the display region that extends corresponding to the dummy pixel unit, each of the light transmitting portions of the second group of light transmitting portions is formed along a side opposite to the first side of the display region The second side extends corresponding to the virtual In the part of the pixel unit.
  • the light transmissive portion includes an opening formed in the black matrix.
  • the openings in each of the first set of light transmissive portions and the second set of light transmissive portions respectively have a numerical shape that is sequentially arranged.
  • the light transmissive portion includes an opening formed in the black matrix and a light blocking region located within the opening.
  • the light-shielding regions of the openings in each of the first group of light-transmitting portions and the second group of light-transmitting portions respectively have a numerical shape that is sequentially arranged.
  • the light transmitting portion further includes a third group of light transmitting portions and a fourth group of light transmitting portions.
  • each of the third group of light transmitting portions is formed in a portion corresponding to the dummy pixel unit extending along a third side of the display region adjacent to the first side,
  • Each of the fourth group of light transmitting portions is formed in a portion corresponding to the dummy pixel unit extending along a fourth side of the display region opposite to the third side.
  • Another object of the present disclosure is to provide a display panel.
  • a second aspect of the present disclosure provides a display panel.
  • the display panel includes a color film substrate as described above and an array substrate disposed opposite to the color film substrate.
  • the light transmissive portion of the color filter substrate is aligned with the light transmissive region of the array substrate in the dummy pixel region, so that light from the light transmissive region can pass through The black matrix.
  • the array substrate includes: a display area and a dummy pixel area disposed around the display area, the display area having a plurality of pixel units defined by gate lines and data lines intersecting each other,
  • the dummy pixel region has a plurality of dummy pixel cells defined by the gate lines and the data lines intersecting each other, wherein the dummy pixel regions have marks located within the dummy pixel cells, and the marks A first set of indicia and a second set of indicia, and wherein each of the first set of indicia is formed in the virtual pixel unit extending along a first side of the display area, the second Each of the group marks is formed in the virtual pixel unit extending along a second side opposite the first side of the display area.
  • the transparent portion of the color filter substrate is aligned with the mark in the array substrate such that Light from the mark can pass through the black matrix.
  • the extending direction of the first side and the second side coincides with one of an extending direction of the gate line and an extending direction of the data line.
  • the light transmittance of the mark is greater than the light transmittance of other portions of the virtual pixel unit.
  • the mark is formed in a gate metal layer of a thin film transistor of the array substrate.
  • the indicia comprises an opening formed in the gate metal layer.
  • the openings of each of the first set of indicia and the second set of indicia respectively have a shape of a numerically arranged number.
  • the indicia includes an opening formed in the gate metal layer and a light blocking portion located within the opening.
  • the light shielding portions of each of the first set of marks and the second set of marks respectively have a shape of a numerically arranged number.
  • the extending direction of the mark coincides with the extending direction of the gate line, and the length of the dummy pixel unit in the extending direction of the data line is smaller than the pixel unit in the data. The length in the direction in which the line extends.
  • the indicia further includes a third set of indicia and a fourth set of indicia,
  • each of the third set of marks is formed in the virtual pixel unit extending along a third side of the display area adjacent to the first side
  • Each of the fourth set of indicia is formed in the virtual pixel unit extending along a fourth side of the display area opposite the third side.
  • the extending direction of the third side and the fourth side coincides with the other of the extending direction of the gate line and the extending direction of the data line.
  • a third aspect of the present disclosure provides a method of detecting a display panel.
  • the display panel includes the display panel as described above, and the method for detecting the display panel includes:
  • Whether or not the line is abnormal is determined according to the display state of the light transmitting portion.
  • determining whether the line is abnormal according to the display state of the light transmitting portion includes determining that the line is abnormal when the display state of the light transmitting portion is inconsistent.
  • the display state of the light transmitting portion includes brightness.
  • the extending direction of the first side and the second side is consistent with the extending direction of the data line
  • the display mode of the display panel is a normally white mode
  • the detecting method further includes A voltage for displaying a black state is input to the data line, and an on voltage is input to the gate line, and the light-transmitting portion is determined to be an abnormality flag, and the gate line corresponding to the abnormality flag is determined to be an open circuit.
  • the extending direction of the first side and the second side is consistent with the extending direction of the data line
  • the display mode of the display panel is a normally black mode
  • the detecting method further includes The data line input is used to display a voltage in a white state and input an on voltage to the gate line, determine an unlit light transmission portion as an abnormality flag, and determine that the gate line corresponding to the abnormality flag is an open circuit.
  • inputting a voltage for displaying a white state to the data line includes inputting a voltage only to a data line in the virtual pixel region.
  • the extending direction of the first side and the second side is consistent with the extending direction of the gate line
  • the display mode of the display panel is a normally white mode
  • the detecting method further includes Inputting a voltage for displaying a black state to the data line, inputting an on-voltage to the gate line, determining the light-transmitting portion as an abnormality flag, and determining that the data line corresponding to the abnormality flag is an open circuit .
  • the extending direction of the first side and the second side is consistent with the extending direction of the gate line
  • the display mode of the display panel is a normally black mode
  • the detecting method further includes Inputting a voltage for displaying a white state to the data line, inputting an on voltage to the gate line, determining an unlit transparent portion as an abnormal flag, and determining the data line corresponding to the abnormal flag as appearing Open circuit.
  • inputting an turn-on voltage to the gate line includes inputting a voltage only to a gate line in the dummy pixel region.
  • the line in the display area is judged to be abnormal.
  • a line in at least one of the virtual pixel region and the peripheral circuit is determined to be abnormal.
  • FIG. 1 is a schematic plan view of a color filter substrate in accordance with an embodiment of the present disclosure
  • FIG. 2(a) is a partial cross-sectional view of a color filter substrate in accordance with an embodiment of the present disclosure
  • FIG. 2(b) is a partial cross-sectional view of a color filter substrate in accordance with an embodiment of the present disclosure
  • 3(a) is a schematic view of a color filter substrate according to an embodiment of the present disclosure
  • 3(b) is a schematic view of a color filter substrate according to an embodiment of the present disclosure.
  • FIG. 4 is a schematic view of a color filter substrate in accordance with an embodiment of the present disclosure.
  • FIG. 5 is a schematic diagram of a display panel in accordance with an embodiment of the present disclosure.
  • FIG. 6 is a schematic diagram of a display panel in accordance with an embodiment of the present disclosure.
  • FIG. 7 is a further schematic view of an array substrate of the display panel of FIG. 6;
  • FIG. 8(a) is a partial cross-sectional schematic view of an array substrate of a display panel in accordance with an embodiment of the present disclosure
  • FIG. 8(b) is a partial cross-sectional view of an array substrate of a display panel in accordance with an embodiment of the present disclosure
  • FIG. 9(a) is a schematic diagram of an array substrate of a display panel according to an embodiment of the present disclosure.
  • FIG. 9(b) is a schematic diagram of an array substrate of a display panel according to an embodiment of the present disclosure.
  • FIG. 10 is a schematic diagram of an array substrate of a display panel according to an embodiment of the present disclosure.
  • FIG. 11 is a schematic diagram of a column substrate of an array display panel in accordance with an embodiment of the present disclosure.
  • FIG. 12 is a flowchart of a method of detecting a display panel according to an embodiment of the present disclosure
  • FIG. 13 is a flowchart of a method of detecting a display panel according to an embodiment of the present disclosure
  • FIG. 14 is a flowchart of a method of detecting a display panel according to an embodiment of the present disclosure
  • 15(a) is a schematic diagram of an array substrate provided with a substrate of a display panel according to an embodiment of the present disclosure
  • 15(b) is a schematic diagram of a padded array substrate of a display panel in accordance with an embodiment of the present disclosure.
  • the terms “upper”, “lower”, “left”, “right”, “vertical”, “horizontal”, “top”, “bottom” and The derivative should refer to the public text.
  • the terms “overlay”, “on top of”, “positioned on” or “positioned on top of” mean that a first element, such as a first structure, exists in a second element, such as a second structure. Above, wherein an intermediate element such as an interface structure may exist between the first element and the second element.
  • the term “contacting” means connecting a first element such as a first structure and a second element such as a second structure, with or without other elements at the interface of the two elements.
  • Embodiments of the present disclosure provide a color film substrate.
  • FIG. 1 is a schematic plan view of a color filter substrate in accordance with an embodiment of the present disclosure.
  • the color film substrate includes a display area R1 and a peripheral area R2' corresponding to the dummy pixel area R2 disposed around the display area.
  • the display area may comprise a color filter layer.
  • the virtual pixel region herein is a region having a plurality of dummy pixel units of the array substrate, and the dummy pixel units of the dummy pixel region are defined by the gate lines GL and the data lines DL intersecting each other.
  • the black matrix 11 of the color filter substrate has a light transmitting portion 12 in a portion DU' of the peripheral pixel region R2' corresponding to the dummy pixel unit DU of the dummy pixel region R2.
  • the light transmitting portion includes a first group of light transmitting portions G1 and a second group of light transmitting portions G2.
  • Each of the first group of light transmitting portions G1 is formed in a portion DU' corresponding to the dummy pixel unit extending along the first side S1 of the display region, and the second group of the light transmitting portions G2 is formed.
  • a portion DU' corresponding to the virtual pixel unit that extends along the second side S2 opposite the first side S1 of the display area.
  • each of the first light-transmitting portions is located in the same row and the light-transmitting portions of the second group of light-transmitting portions are located in the same column as an example, and each group of the light-transmitting portions
  • the respective light transmitting portions may not be located in the same row, as long as the respective light transmitting portions of the respective sets of light transmitting portions are provided along the extending direction of the respective sides.
  • the light transmitting portion 12 of the black matrix 11 may include an opening formed in the black matrix.
  • the color filter substrate of the embodiment of the present invention it is possible to solve the problem that the line abnormality detection of the display panel in the prior art is time consuming and laborious.
  • 2(a) is a partial cross-sectional schematic view of a color filter substrate showing a cross section of a black matrix corresponding to one dummy pixel unit, in accordance with an embodiment of the present disclosure.
  • 2(a) is exemplified by the light-transmitting portion of the black matrix 11 including the opening 121 formed in the black matrix 11.
  • the black matrix is shown as black, and is not shown as a shadow fill as in Figure 1.
  • the light transmitting portion 12 of the black matrix 11 may include an opening formed in the black matrix and a light shielding region located inside the opening.
  • 2(b) is a partial cross-sectional schematic view of a color filter substrate showing a cross section of a black matrix corresponding to one dummy pixel unit, in accordance with an embodiment of the present disclosure.
  • 2(b) is exemplified by the light transmitting portion of the black matrix including the opening 122 formed in the black matrix and the light blocking region 123 located inside the opening 122.
  • the black matrix is shown as black, and is not shown as a shadow fill as in Figure 1.
  • each of the first group of light transmitting portions and the second group of light transmitting portions may be disposed to have a shape of a numerically arranged one by one.
  • FIG. 3(a) is a schematic diagram of a color filter substrate according to an embodiment of the present disclosure.
  • Fig. 3(a) further shows the embodiment shown in Fig. 2(a).
  • the black matrix on the other side of the color film substrate adjacent to both sides of the light transmitting portion is omitted.
  • the openings 121 in each of the first group of light transmitting portions G1 and the second group of light transmitting portions G2 have a numerical shape which is sequentially arranged.
  • FIG. 3(b) is a schematic diagram of a color filter substrate according to an embodiment of the present disclosure.
  • Fig. 3(b) further shows the embodiment shown in Fig. 2(b).
  • the black matrix on the other side of the color film substrate adjacent to both sides of the light transmitting portion is omitted.
  • the light shielding regions 123 of the openings 122 in each of the first group of light transmitting portions G1 and the second group of light transmitting portions G2 have a numerical shape which is sequentially arranged.
  • the light transmitting portion further includes a third group of light transmitting portions and a fourth group of light transmitting portions.
  • each of the light transmitting portions of the third group of light transmitting portions G3 is formed in a portion corresponding to the dummy pixel unit extending along the third side S3 of the display region adjacent to the first side S1.
  • Each of the light transmitting portions of the fourth group of light transmitting portions G4 is formed in a portion corresponding to the dummy pixel unit extending along the fourth side S4 of the display region opposite to the third side S3.
  • the light transmitting portions in the third group of light transmitting portions are located in the same row and the respective light transmitting portions in the fourth group of light transmitting portions are located in the same behavior example, and each of the light transmitting portions in each group is transparent.
  • the light portions may not be located in the same row as long as they can satisfy the respective light-transmitting portions of the light-transmitting portions of the respective groups along the extending direction of the respective sides.
  • Embodiments of the present disclosure also provide a display panel.
  • FIG. 5 is a schematic diagram of a display panel in accordance with an embodiment of the present disclosure.
  • FIG. 5 is a schematic diagram of a display panel in accordance with an embodiment of the present disclosure.
  • the display panel of FIG. 5 includes the color filter substrate 01 as described above and the array substrate 02 disposed opposite to the color filter substrate. As shown in Figure 5, in this In the display panel provided by the embodiment of the disclosure, the light transmitting portion 12 of the color filter substrate 01 and the array substrate are aligned in the light transmitting region 13 of the dummy pixel region R2, so that the light from the light transmitting region 13 can pass through the black.
  • Matrix 11 is a schematic diagram of a display panel in accordance with an embodiment of the present disclosure.
  • FIG. 5 is a schematic diagram of a display panel in accordance with an embodiment of the present disclosure.
  • the display panel of FIG. 5 includes the color filter substrate 01 as described above and the array substrate 02 disposed opposite to the color filter substrate. As shown in Figure 5, in this In the display panel provided by the
  • a region where the gate electrode is located is an opaque region of the array substrate, and the remaining region is an array substrate.
  • Light transmission area when a transparent metal material such as ITO is used as a pixel electrode and an opaque metal such as Al or Cu is used as a gate metal layer, a region where the gate electrode is located is an opaque region of the array substrate, and the remaining region is an array substrate. Light transmission area.
  • FIG. 6 is a schematic diagram of a display panel in accordance with an embodiment of the present disclosure.
  • the display panel of FIG. 6 includes the color filter substrate 01 as described above and the array substrate 02 disposed opposite to the color filter substrate. As shown in FIG. 11, the light transmitting portion 12 of the color filter substrate 01 is aligned with the mark 20 in the array substrate 02 so that light from the mark 20 can pass through the black matrix 11.
  • an array substrate of a display panel includes a display area R1 and a dummy pixel area R2 disposed around the display area R1.
  • the display region R1 has a plurality of pixel units PU defined by the gate lines GL and the data lines DL that intersect each other, and the dummy pixel region R2 has a plurality of dummy pixel units DU defined by the gate lines GL and the data lines DL that intersect each other.
  • the dummy pixel region R2 has a mark 20 on the virtual pixel unit DU, and the mark includes a first set of marks G1' and a second set of marks G2'.
  • Each of the first set of indicia is formed in a virtual pixel unit extending along a first side of the display area, each of the second set of indicia being formed along the first and the display area
  • the virtual pixel unit extends on the opposite side of the second side.
  • each of the first set of marks is located in the same column, and each of the second set of marks is located in the same column as an example, and each mark in each set of marks may not be in the same column. It suffices that each of the sets of marks can be provided along the extending direction of the corresponding side.
  • FIG. 7 only shows the virtual pixel areas on the left and right sides of the display area, and the virtual pixel areas on the upper and lower sides of the display area are omitted.
  • the extending direction of the first side S1 and the second side S2 may coincide with one of the extending direction of the gate line GL and the extending direction of the data line DL.
  • the light transmittance of the mark may be greater than the light transmittance of other portions of the virtual pixel unit, so that different display brightness may be exhibited when illuminated.
  • the gate metal layer of the thin film transistor of the array substrate can be considered.
  • the mark 20 can be formed in the gate metal layer 21 of the thin film transistor of the array substrate by using an opaque metal material such as Cu, Al, and process precision.
  • the indicia can include an opening formed in the gate metal layer.
  • FIG. 8(a) is a partial cross-sectional schematic view of an array substrate of a display panel in accordance with an embodiment of the present disclosure.
  • 8(a) is an example in which the gate metal layer 21 of the thin film transistor formed on the array substrate is denoted by a mark 20, and a cross section of the gate metal layer 21 corresponding to one dummy pixel unit is shown.
  • the opening 201 formed in the black matrix 11 is exemplified by the reference numeral 20.
  • the gate metal layer 21 is shown as black, and is not shown as a shadow fill as in FIG.
  • the indicia 20 may include an opening formed in the gate metal layer and a light blocking portion located within the opening.
  • FIG. 8(b) is a partial cross-sectional schematic view of an array substrate of a display panel according to an embodiment of the present disclosure.
  • 8(b) is exemplified by the mark 20 forming the gate metal layer 21 of the thin film transistor of the array substrate, and shows a cross section of the gate metal layer 21 corresponding to one dummy pixel unit.
  • the mark 20 includes an opening 202 formed in the gate metal layer 21 and a light blocking portion 203 located inside the opening as an example.
  • the gate metal layer 21 is shown as black, and is not shown as a shadow fill as in FIG.
  • each of the first group of light transmitting portions and the second group of light transmitting portions may be disposed to have a shape of a numerically arranged one by one.
  • FIG. 9(a) is a schematic diagram of an array substrate of a display panel according to an embodiment of the present disclosure.
  • Fig. 9(a) further shows the embodiment shown in Fig. 8(a).
  • the openings 201 in each of the first group mark G1' and the second group mark G2' have shapes of numbers arranged in order.
  • FIG. 9(b) is a schematic diagram of an array substrate of a display panel according to an embodiment of the present disclosure.
  • Fig. 9(b) further shows the embodiment shown in Fig. 8(b).
  • the light blocking region 203 of the opening 202 in each of the first group of marks G1' and the second group of marks G2' Each has a shape of a number arranged in order.
  • FIG. 10 is a schematic diagram of an array substrate of a display panel in accordance with an embodiment of the present disclosure.
  • the array substrate illustrated in FIG. 10 further includes a third set of indicia G3' and a fourth set of indicia G4'.
  • each of the third set of marks G3' is formed in a virtual pixel unit extending along a third side S3 of the display area adjacent to the first side S1, and a fourth set of marks G4'
  • Each of the marks is formed in a virtual pixel unit extending along a fourth side G4' of the display area opposite to the third side.
  • each of the markers in each group of markers may not be in the same row, as long as it can satisfy
  • Each of the sets of marks may be disposed along the direction in which the respective sides extend.
  • FIG. 11 is a schematic diagram of an array substrate of a display panel in accordance with an embodiment of the present disclosure. For the sake of simplicity, only the virtual pixel areas on the upper and lower sides of the display area are shown in FIG. 11, and the virtual pixel areas on the left and right sides of the display area are omitted.
  • the extending direction of the mark coincides with the extending direction of the gate line GL, and the length of the dummy pixel unit DU in the extending direction of the data line DL is smaller than the extending direction of the pixel unit PU in the data line DL. length. With such a length setting, space can be saved.
  • Embodiments of the present disclosure also provide a method of detecting a display panel.
  • the display panel includes a display panel as described above.
  • FIG. 12 is a method of detecting a display panel according to an embodiment of the present disclosure. As shown in FIG. 12, the detection method of the display panel includes:
  • FIG. 13 is a flowchart of a method of detecting a display panel according to an embodiment of the present disclosure.
  • FIG. 13 further shows the detection method of the display panel shown in FIG.
  • determining whether the line is abnormal according to the display state of the light transmitting portion includes:
  • the display state of the light transmissive portion includes the brightness of the virtual display unit.
  • FIG. 14 is a flowchart of a method of detecting a display panel according to an embodiment of the present disclosure.
  • Figure 14 further shows the detection method of the display panel shown in FIG.
  • the detecting method of the display panel further specifically includes the following steps:
  • the detecting method further includes inputting a voltage for displaying the black state to the data line ( For example, L0) inputs an on-voltage to the gate line, determines the light-transmitting portion to be an abnormality flag, and determines that the gate line corresponding to the abnormality flag is broken.
  • a voltage for displaying the black state For example, L0
  • the gate line determines the light-transmitting portion to be an abnormality flag, and determines that the gate line corresponding to the abnormality flag is broken.
  • the turn-on voltage is input to the gate, and the L0 voltage can be input to the data line through the data IC, and the dummy pixel region where no line abnormality occurs is black, and the mark is not visible.
  • the corresponding virtual pixel area of the open circuit cannot input the L0 voltage, and the abnormal virtual pixel area is lit to display a white state.
  • the display state of the abnormal virtual pixel area can be seen through the light transmitting portion. Therefore, it is possible to determine that the gate line in the display region corresponding to the light-transmitting portion is turned on, and to determine that the gate line corresponding to the unlit light-transmitting portion is not abnormal.
  • the detecting method further includes inputting to the data line for displaying the white state (for example, And L255), the voltage is input to the gate line, and the unlit light-transmitting portion is determined as an abnormality flag, and the gate line corresponding to the abnormality flag is determined to be broken.
  • inputting a voltage for displaying a white state to the data line includes inputting a voltage only to a data line in the virtual pixel region.
  • the data lines of the dummy pixel regions may be connected to the additional pads 50 to separately supply voltages independently of the data ICs.
  • the detecting method further includes inputting a voltage for displaying the black state to the data lines. (For example, L0), an ON voltage is input to the gate line, the light-transmitting portion that is lit is determined as an abnormality flag, and the data line corresponding to the abnormality flag is determined to be an open circuit.
  • the detecting method further includes inputting to the data line for displaying the white state ( For example, L255) voltage and input the turn-on voltage to the gate line,
  • the unlit light-transmitting portion is determined to be an abnormality flag
  • the data line in the display region corresponding to the abnormality flag is determined to be an open circuit.
  • inputting an on voltage to the gate line includes inputting a voltage only to a gate line in the dummy pixel region.
  • the gate lines of the dummy pixel regions may be connected to the additional pads 50' to separately supply voltages independently of the gate ICs.
  • 15(a) and 15(b) are schematic diagrams of a spacer-equipped array substrate of a display panel according to an embodiment of the present disclosure.
  • the data lines of the virtual pixel area may be connected.
  • the pad 50 To the pad 50.
  • the virtual pixel area where no abnormality occurs is in a white state, and the corresponding mark is visible; when the open circuit occurs, the corresponding virtual pixel at the open circuit
  • the area will be filled with L255 voltage through the pad, the abnormal virtual pixel area will be black, and the abnormal mark will not be visible. Therefore, it is possible to determine that the gate line corresponding to the unlit flag is an open circuit.
  • the gate of the dummy pixel region may be The wire is connected to the pad 50'.
  • the virtual pixel region where no circuit abnormality appears presents a white state, and the corresponding mark is visible; when an open circuit occurs, the corresponding virtual portion at the open circuit
  • the pixel area is filled with L255 voltage through the pad, the abnormal virtual pixel area is black, and the abnormal mark is not visible. Therefore, it is possible to determine that the data line corresponding to the unlit mark is an open circuit.
  • a solution for quickly detecting a display panel can be provided.
  • the line in the display area is determined to be abnormal; when in the display When an abnormality flag occurs in the virtual pixel area in the opposite sides of the area, the line of at least one of the virtual pixel area and the peripheral circuit is judged to be abnormal.

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Theoretical Computer Science (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Liquid Crystal (AREA)

Abstract

一种彩膜基板（01）、显示面板及其检测方法。彩膜基板（01）包括显示区（R1）和设置在显示区（R1）周围的对应于虚拟像素区（R2）的周边区（R2'），彩膜基板（01）的黑矩阵（11）在周边区（R2'）的对应于虚拟像素单元（DU）的部分（DU'）中具有透光部（12），且透光部（12）包括第一组透光部（G1）和第二组透光部（G2），其中，第一组透光部（G1）和第二组透光部（G2）中的每个透光部（12）被分别形成在沿显示区域的第一侧（S1）延伸和与第一侧（S1）相对的第二侧（S2）延伸的对应于虚拟像素单元（DU）的部分（DU'）中。

Description

彩膜基板、显示面板及其检测方法
相关申请的交叉引用
本申请要求于2017年03月08日递交的中国专利申请第201710134007.6号的优先权，在此全文引用上述中国专利申请公开的内容以作为本申请的一部分。
技术领域
本公开文本涉及显示技术领域。具体地，涉及一种彩膜基板、显示面板以及显示面板的检测方法。
背景技术
显示装置中会出现线路不良。传统的显示装置的不良线编号的确认方法是通过点灯机点屏标记结合显微镜打反射光查找完成。这种方法同时需要用到点灯机和显微镜，针对多个线不良需要逐个确认不良线的编号，费时费力，并且无法快速确认异常点是否位于显示区内部。
发明内容
本公开文本的实施例提供了一种彩膜基板、显示面板以及显示面板的检测方法。
本公开文本的一个目的在于提供一种彩膜基板。
本公开文本的第一方面提供了一种彩膜基板。所述彩膜基板包括显示区和设置在所述显示区周围的对应于虚拟像素区的周边区，其中，所述彩膜基板的黑矩阵在所述周边区的对应于虚拟像素单元的部分中具有透光部，且所述透光部包括第一组透光部和第二组透光部，并且其中，所述第一组透光部中的每个透光部被形成在沿所述显示区域的第一侧延伸的对应于所述虚拟像素单元的部分中，所述第二组透光部的每个透光部被形成在沿与所述显示区域的所述第一侧相对的第二侧延伸的对应于所述虚拟 像素单元的部分中。
在一个实施例中，所述透光部包括形成在所述黑矩阵中的开口。
在一个实施例中，所述第一组透光部和所述第二组透光部中的每一个中的所述开口分别具有依次排列的数字的形状。
在一个实施例中，所透光部包括形成在所述黑矩阵中的开口和位于所述开口内的遮光区。
在一个实施例中，所述第一组透光部和所述第二组透光部中的每一个中的所述开口的所述遮光区分别具有依次排列的数字的形状。
在一个实施例中，所述透光部还包括第三组透光部和第四组透光部，
其中，所述第三组透光部中的每个透光部被形成在沿所述显示区域的与第一侧相邻近的第三侧延伸的对应于所述虚拟像素单元的部分中，
所述第四组透光部中的每个透光部被形成在沿所述显示区域的与所述第三侧相对的第四侧延伸的对应于所述虚拟像素单元的部分中。
本公开文本的另一个目的在于提供一种显示面板。
本公开文本的第二方面提供了一种显示面板。所述显示面板包括如上所述的彩膜基板和与所述彩膜基板相对设置的阵列基板。
在一种实施方式中，所述彩膜基板的所述透光部与所述阵列基板在所述虚拟像素区的透光区相对准，以使得来自所述透光区的光能透过所述黑矩阵。
在一种实施方式中，所述阵列基板包括：显示区和设置在所述显示区周围的虚拟像素区，所述显示区具有由彼此相交的栅极线和数据线限定的多个像素单元，所述虚拟像素区具有由彼此相交的所述栅极线和所述数据线限定的多个虚拟像素单元，其中，所述虚拟像素区具有位于所述虚拟像素单元内的标记，且所述标记包括第一组标记和第二组标记，并且其中，所述第一组标记中的每个标记被形成在沿所述显示区域的第一侧延伸的所述虚拟像素单元中，所述第二组标记中的每个标记被形成在沿与所述显示区域的所述第一侧相对的第二侧延伸的所述虚拟像素单元中。并且其中，所述彩膜基板的所述透光部与所述阵列基板中的所述标记相对准，以使得 来自所述标记的光能透过所述黑矩阵。
在一个实施例中，所述第一侧和所述第二侧的延伸方向与所述栅极线的延伸方向和所述数据线的延伸方向中的一者相一致。
在一个实施例中，所述标记的透光率大于所述虚拟像素单元的其它部分的透光率。
在一个实施例中，所述标记被形成在所述阵列基板的薄膜晶体管的栅极金属层中。
在一个实施例中，所述标记包括形成在所述栅极金属层中的开口。
在一个实施例中，所述第一组标记和所述第二组标记中的每一个的所述开口分别具有依次排列的数字的形状。
在一个实施例中，所述标记包括形成在所述栅极金属层中的开口和位于所述开口内的遮光部。
在一个实施例中，所述第一组标记和所述第二组标记中的每一个的所述遮光部分别具有依次排列的数字的形状。
在一个实施例中，所述标记的延伸方向与所述栅极线的延伸方向相一致，且所述虚拟像素单元在所述数据线的延伸方向上的长度小于所述像素单元在所述数据线的延伸方向上的长度。
在一个实施例中，所述标记还包括第三组标记和第四组标记，
其中，所述第三组标记中的每个标记被形成在沿所述显示区域的与第一侧相邻近的第三侧延伸的所述虚拟像素单元中，
所述第四组标记中的每个标记被形成在沿所述显示区域的与所述第三侧相对的第四侧延伸的所述虚拟像素单元中。
在一个实施例中，所述第三侧和所述第四侧的延伸方向与所述栅线线的延伸方向和所述数据线的延伸方向中的另一者相一致。
本公开文本的又一个目的在于提供一种显示面板的检测方法。
本公开文本的第三方面提供了一种显示面板的检测方法。所述显示面板包括如上所述的显示面板，所述显示面板的检测方法包括：
检测所述彩膜基板的所述透光部的显示状态；
根据所述透光部的显示状态来判断线路是否出现异常。
在一个实施例中，根据所述透光部的显示状态来判断线路是否出现异常包括：当所述透光部的显示状态存在不一致时，将线路判断为出现异常。
在一个实施例中，所述透光部的显示状态包括亮度。
在一个实施例中，所述第一侧和所述第二侧的延伸方向与所述数据线的延伸方向中相一致，所述显示面板的显示模式为常白模式，所述检测方法进一步包括向所述数据线输入用于显示黑态的电压并向所述栅极线输入开启电压，将点亮的透光部判断为异常标记，将异常标记所对应的栅极线判断为出现断路。
在一个实施例中，所述第一侧和所述第二侧的延伸方向与所述数据线的延伸方向相一致，所述显示面板的显示模式为常黑模式，所述检测方法进一步包括向所述数据线输入用于显示白态的电压并向所述栅极线输入开启电压，将未点亮的透光部判断为异常标记，将异常标记所对应的栅极线路判断为出现断路。
在一个实施例中，向所述数据线输入用于显示白态的电压包括仅向所述虚拟像素区中的数据线输入电压。
在一个实施例中，所述第一侧和所述第二侧的延伸方向与所述栅极线的延伸方向相一致，所述显示面板的显示模式为常白模式，所述检测方法进一步包括向所述数据线输入用于显示黑态的电压并向所述栅极线输入开启电压，将点亮的透光部判断为异常标记，将异常标记所对应的所述数据线判断为出现断路。
在一个实施例中，所述第一侧和所述第二侧的延伸方向与所述栅极线的延伸方向相一致，所述显示面板的显示模式为常黑模式，所述检测方法进一步包括向所述数据线输入用于显示白态的电压并向所述栅极线输入开启电压，将未点亮的透光部判断为异常标记，将异常标记所对应的所述数据线判断为出现断路。
在一个实施例中，向所述栅极线输入开启电压包括仅向所述虚拟像素区中的栅极线输入电压。
在一个实施例中，当在所述显示区的相对的两侧中的一侧的虚拟像素区中出现异常标记时，将显示区中的线路判断为出现异常。
在一个实施例中，当在所述显示区的相对的两侧中的虚拟像素区中均出现异常标记时，将虚拟像素区和外围电路中的至少一者中的线路判断为出现异常。
附图说明
为了更清楚地说明本公开文本的实施例的技术方案，下面将对实施例的附图进行简要说明，应当知道，以下描述的附图仅仅涉及本公开文本的一些实施例，而非对本公开文本的限制，其中：
图1为根据本公开文本的实施例的彩膜基板的平面示意图；
图2(a)为根据本公开文本的实施例的彩膜基板的局部截面示意图；
图2(b)为根据本公开文本的实施例的彩膜基板的局部截面示意图；
图3(a)为根据本公开文本的实施例的彩膜基板的示意图；
图3(b)为根据本公开文本的实施例的彩膜基板的示意图；
图4为根据本公开文本的实施例的彩膜基板的示意图；
图5为根据本公开文本的实施例的显示面板的示意图；
图6为根据本公开文本的实施例的显示面板的示意图；
图7为图6的显示面板的阵列基板的进一步示意图；
图8(a)为根据本公开文本的实施例的显示面板的阵列基板的局部截面示意图；
图8(b)为根据本公开文本的实施例的显示面板的阵列基板的局部截面示意图；
图9(a)为根据本公开文本的实施例的显示面板的阵列基板的示意图；
图9(b)为根据本公开文本的实施例的显示面板的阵列基板的示意图；
图10为根据本公开文本的实施例的显示面板的阵列基板的示意图；
图11为根据本公开文本的实施例的阵显示面板的列基板的示意图；
图12为根据本公开文本的实施例的显示面板的检测方法的流程图；
图13为根据本公开文本的实施例的显示面板的检测方法的流程图；
图14为根据本公开文本的实施例的显示面板的检测方法的流程图；
图15(a)为根据本公开文本的实施例的显示面板的设置有衬底的阵列基板的示意图；
图15(b)为根据本公开文本的实施例的显示面板的设置有衬垫的阵列基板的示意图。
具体实施方式
为了使本公开文本的实施例的目的、技术方案和优点更加清楚，下面将接合附图，对本公开文本的实施例的技术方案进行清楚、完整的描述。显然，所描述的实施例是本公开文本的一部分实施例，而不是全部的实施例。基于所描述的本公开文本的实施例，本领域技术人员在无需创造性劳动的前提下所获得的所有其他实施例，也都属于本公开文本保护的范围。
当介绍本公开文本的元素及其实施例时，除非上下文中另外明确地指出，否则在本文和所附权利要求中所使用的词语的单数形式包括复数，反之亦然。因而，当提及单数时，通常包括相应术语的复数。用语“包含”、“包括”、“含有”和“具有”旨在包括性的并且表示可以存在除所列要素之外的另外的要素。
出于下文表面描述的目的，如其在附图中被标定方向那样，术语“上”、“下”、“左”、“右”“垂直”、“水平”、“顶”、“底”及其派生词应涉及公开文本。术语“上覆”、“在……顶上”、“定位在……上”或者“定位在……顶上”意味着诸如第一结构的第一要素存在于诸如第二结构的第二要素上，其中，在第一要素和第二要素之间可存在诸如界面结构的中间要素。术语“接触”意味着连接诸如第一结构的第一要素和诸如第二结构的第二要素，而在两个要素的界面处可以有或者没有其它要素。
本公开文本的实施例提供了一种彩膜基板。
图1为根据本公开文本的实施例的彩膜基板的平面示意图。如图1所 示，彩膜基板包括显示区R1和设置在显示区周围的对应于虚拟(dummy)像素区R2的周边区R2’。可以理解，显示区可以包括彩色滤光层。也可以理解，本文的虚拟像素区是为阵列基板的具有多个虚拟像素单元的区域，虚拟像素区的虚拟像素单元由彼此相交的栅极线GL和数据线DL所限定。彩膜基板的黑矩阵11在周边区R2’的对应于虚拟像素区R2的虚拟像素单元DU的部分DU’中具有透光部12。且透光部包括第一组透光部G1和第二组透光部G2。其中，第一组透光部G1中的每个透光部12被形成在沿显示区域的第一侧S1延伸的对应于虚拟像素单元的部分DU’中，第二组透光部G2被形成在沿与显示区域的第一侧S1相对的第二侧S2延伸的对应于虚拟像素单元的部分DU’中。需要说明，虽然图1中，以第一组透光部中的各个透光部位于同一列且第二组透光部中的各个透光部位于同一列为示例，每组透光部中的各个透光部也可以不位于同一列，只要能满足各组透光部中的各个透光部沿着相应的侧的延伸方向而设置即可。
黑矩阵11的透光部12可以包括形成在所述黑矩阵中的开口。
通过本发明的实施例的彩膜基板，能够解决现有技术中显示面板的线路异常检测费时费力的问题。
图2(a)为根据本公开文本的实施例的彩膜基板的局部截面示意图，其示出了对应于一个虚拟像素单元的黑矩阵的截面。图2(a)以黑矩阵11的透光部包括形成在黑矩阵11中的开口121为示例。为了显示清楚起见，在图2(a)中，将黑矩阵显示为黑色，而没有像图1那样显示为阴影填充。
黑矩阵11的透光部12可以包括形成在黑矩阵中的开口和位于所述开口内的遮光区。
图2(b)为根据本公开文本的实施例的彩膜基板的局部截面示意图，其示出了对应于一个虚拟像素单元的黑矩阵的截面。图2(b)以黑矩阵的透光部包括形成在黑矩阵中的开口122和位于开口122内的遮光区123为示例。为了显示清楚起见，在图2(b)中，将黑矩阵显示为黑色，而没有像图1那样显示为阴影填充。
标记的形状可以根据需要而设置，本公开文本对其不做限制，例如， 其可以为数字、字母等。在一种实施方式中，为了快速识别，可以将第一组透光部和第二组透光部中的每一个透光部设置为具有依次排列的数字的形状。
图3(a)为根据本公开文本的实施例的彩膜基板的示意图。图3(a)进一步示出了图2(a)示出的实施例。为了简便起见，省略了彩膜基板的邻近设置有透光部的两侧的另外两侧的黑矩阵。如图3(a)所示，第一组透光部G1和所述第二组透光部G2中的每一个中的开口121分别具有依次排列的数字的形状。
图3(b)为根据本公开文本的实施例的彩膜基板的示意图。图3(b)进一步示出了图2(b)示出的实施例。为了简便起见，省略了彩膜基板的邻近设置有透光部的两侧的另外两侧的黑矩阵。如图3(b)所示，第一组透光部G1和所述第二组透光部G2中的每一个中的开口122的遮光区123分别具有依次排列的数字的形状。
在一个实施例中，透光部还包括第三组透光部和第四组透光部。
图4为根据本公开文本的实施例的彩膜基板的示意图。除了图1示出的结构之外，图4示出的彩膜基板还包括第三组透光部和第四组透光部。如图4所示，第三组透光部G3中的每个透光部被形成在沿显示区域的与第一侧S1相邻近的第三侧S3延伸的对应于虚拟像素单元的部分中；第四组透光部G4中的每个透光部被形成在沿所述显示区域的与第三侧S3相对的第四侧S4延伸的对应于虚拟像素单元的部分中。需要说明，虽然图4中，以第三组透光部中的透光部位于同一行且第四组透光部中的各个透光部位于同一行为示例，每组透光部中的各个透光部也可以不位于同一行，只要能满足各组透光部中的各个透光部沿着相应的侧的延伸方向而设置即可。
本公开文本的实施例还提供了一种显示面板。
图5为根据本公开文本的实施例的显示面板的示意图。图5为根据本公开文本的实施例的显示面板的示意图。图5的显示面板包括如上所述的彩膜基板01和与该彩膜基板相对设置的阵列基板02。如图5所示，在本 公开文本的实施例所提供的显示面板中，彩膜基板01的透光部12与阵列基板在虚拟像素区R2的透光区13相对准，以使得来自透光区13的光能透过黑矩阵11。例如，对于采用诸如ITO的透明导电材料做像素电极和诸如Al或Cu的不透明金属做栅极金属层时，栅极电极所位于的区域为阵列基板的不透光区，其余区域为阵列基板的透光区。
图6为根据本公开文本的实施例的显示面板的示意图。图6的显示面板包括如上所述的彩膜基板01和与该彩膜基板相对设置的阵列基板02。如图11所示，彩膜基板01的透光部12与阵列基板02中的标记20相对准，以使得来自标记20的光能透过所述黑矩阵11。
图7为图6的显示面板的的阵列基板的进一步示意图。如图7所示，根据本公开文本的实施例的显示面板的阵列基板包括显示区R1和设置在显示区R1周围的虚拟像素区R2。显示区R1具有由彼此相交的栅极线GL和数据线DL限定的多个像素单元PU，而虚拟像素区R2具有由彼此相交的栅极线GL和数据线DL限定的多个虚拟像素单元DU。该虚拟像素区R2具有位于虚拟像素单元DU上的标记20，且标记包括第一组标记G1＇和第二组标记G2＇。第一组标记中的每个标记被形成在沿显示区域的第一侧延伸的虚拟像素单元中，所述第二组标记中的每个标记被形成在沿与所述显示区域的所述第一侧相对的第二侧延伸的虚拟像素单元中。
需要说明，虽然图7中，以第一组标记中的各个标记部位于同一列且第二组标记中的各个标记位于同一列为示例，每组标记中的各个标记也可以不位于同一列，只要能满足各组标记中的各个标记沿着相应的侧的延伸方向而设置即可。为了简便起见，图7只画出了位于显示区的左右两侧的虚拟像素区，而省略了位于显示区上下两侧的虚拟像素区。
在一种实施方式中，第一侧S1和第二侧S2的延伸方向可以与栅极线GL的延伸方向和数据线DL的延伸方向中的一者相一致。标记的透光率可以大于虚拟像素单元的其它部分的透光率，从而在被点亮时可以呈现出不同的显示亮度。
在一种实施方式中，考虑到阵列基板的薄膜晶体管的栅极金属层可以 采用诸如Cu、Al的不透光的金属材料以及工艺精准度，可以将标记20形成在阵列基板的薄膜晶体管的栅极金属层21中。
标记可以包括形成在所述栅极金属层中的开口。
图8(a)为根据本公开文本的实施例的显示面板的阵列基板的局部截面示意图。图8(a)以标记20形成在阵列基板的薄膜晶体管的栅极金属层21为示例，并且示出了对应于一个虚拟像素单元的栅极金属层21的截面。在图8(a)的实施例中，以标记20包括形成在黑矩阵11中的开口201为示例。为了显示清楚起见，在图8(a)中，将栅极金属层21显示为黑色，而没有像图5那样显示为阴影填充。
标记20可以包括形成在栅极金属层中的开口和位于开口内的遮光部。
图8(b)为根据本公开文本的实施例的显示面板的阵列基板的局部截面示意图。图8(b)以标记20形成在阵列基板的薄膜晶体管的栅极金属层21为示例，并且示出了对应于一个虚拟像素单元的栅极金属层21的截面。在图8(b)的实施例中，以标记20包括行成在栅极金属层21中的开口202和位于所述开口内的遮光部203为示例。为了显示清楚起见，在图8(b)中，将栅极金属层21显示为黑色，而没有像图7那样显示为阴影填充。
标记的形状可以根据需要而设置，本公开文本对其不做限制，例如，其可以为数字、字母等。在一种实施方式中，为了快速识别，可以将第一组透光部和第二组透光部中的每一个透光部设置为具有依次排列的数字的形状。
图9(a)为根据本公开文本的实施例的显示面板的阵列基板的示意图。图9(a)进一步示出了图8(a)示出的实施例。如图9(a)所示，第一组标记G1＇和所述第二组标记G2＇中的每一个中的开口201分别具有依次排列的数字的形状。
图9(b)为根据本公开文本的实施例的显示面板的阵列基板的示意图。图9(b)进一步示出了图8(b)示出的实施例。如图9(b)所示，第一组标记G1＇和所述第二组标记G2＇中的每一个中的开口202的遮光区203 分别具有依次排列的数字的形状。
图10为根据本公开文本的实施例的显示面板的阵列基板的示意图。除了图7示出的结构之后，图10示出的阵列基板还进一步包括第三组标记G3＇和第四组标记G4＇。如图10所示，第三组标记G3＇中的每个标记被形成在沿显示区域的与第一侧S1相邻近的第三侧S3延伸的虚拟像素单元中，第四组标记G4＇中的每个标记被形成在沿显示区域的与第三侧相对的第四侧G4＇延伸的虚拟像素单元中。需要说明，虽然图10中，以第三组标记中的标记位于同一行且第四组标记中的各个标记位于同一行为示例，每组标记中的各个标记也可以不位于同一行，只要能满足各组标记中的各个标记沿着相应的侧的延伸方向而设置即可。
图11为根据本公开文本的实施例的显示面板的阵列基板的示意图。为了简便起见，图11中只画出了位于显示区的上下两侧的虚拟像素区，而省略了位于显示区左右两侧的虚拟像素区。
在图11的实施例中，标记的延伸方向与栅极线GL的延伸方向相一致，且虚拟像素单元DU在数据线DL的延伸方向上的长度小于像素单元PU在数据线DL的延伸方向上的长度。通过这样的长度设置，可以节省空间。
本公开文本的实施例还提供了一种显示面板的检测方法。该显示面板包括如上所述的显示面板。图12为根据本公开文本的实施例的显示面板的检测方法。如图12所示，该显示面板的检测方法包括：
S1、检测彩膜基板的透光部的显示状态；
S3、根据所述透光部的显示状态来判断线路是否出现异常。
图13为根据本公开文本的实施例的显示面板的检测方法的流程图。图13进一步示出了图12所示的显示面板的检测方法。在图13的实施例中，根据所述透光部的显示状态来判断线路是否出现异常包括：
S31、当透光部的显示状态存在不一致时，将线路判断为出现异常。
S32、当透光部的显示状态一致时，将线路判断为没有出现异常。
在一个实施例中，透光部的显示状态包括虚拟显示单元的亮度。
图14为根据本公开文本的实施例的显示面板的检测方法的流程图。图 14进一步示出了图13所示的显示面板的检测方法。在图14的实施例中，显示面板的检测方法进一步具体包括下列步骤：
S311、对于第一侧和第二侧的延伸方向与数据线的延伸方向相一致且显示面板的显示模式为常白模式的情况，检测方法进一步包括向数据线输入用于显示黑态的电压(例如，L0)并向栅极线输入开启电压，将点亮的透光部判断为异常标记，将异常标记所对应的栅极线判断为出现断路。
具体地，在这种情况下，向栅极输入开启电压，可以通过数据IC向数据线输入L0电压，没有出现线路异常的虚拟像素区呈现黑态，标记不可见。当出现断路时，断路处对应的虚拟像素区无法输入L0电压，异常虚拟像素区被点亮而呈现白态，此时该异常的虚拟像素区的显示状态可以通过透光部而可见。因此，可以将点亮的透光部所对应的显示区内的栅极线判断为出现断路，而将未点亮的透光部所对应的栅极线判断为没有出现线路异常。
S312、对于第一侧和第二侧的延伸方向与数据线的延伸方向相一致且显示面板的显示模式为常黑模式的情况，检测方法进一步包括向数据线输入用于显示白态的(例如，L255)电压并向所述栅极线输入开启电压，将未点亮的透光部判断为异常标记，将异常标记所对应的栅极线判断为出现断路。在一种实施方式中，为了视觉上更好的区分异常线路和正常线路，向数据线输入用于显示白态的电压包括仅向虚拟像素区中的数据线输入电压。例如，如稍后描述的图15(a)所示，可以将虚拟像素区的数据线连接到附加的衬垫50以独立于数据IC而单独提供电压。
S313、对于第一侧和第二侧的延伸方向与栅极线的延伸方向相一致且显示面板的显示模式为常白模式的情况，检测方法进一步包括向数据线输入用于显示黑态的电压(例如，L0)并向栅极线输入开启电压，将点亮的透光部判断为异常标记，将异常标记所对应的数据线判断为出现断路。
S314、对于第一侧和第二侧的延伸方向与栅极线的延伸方向相一致且显示面板的显示模式为常黑模式的情况，检测方法进一步包括向数据线输入用于显示白态的(例如，L255)电压并向所述栅极线输入开启电压，将 未点亮的透光部判断为异常标记，将异常标记所对应的显示区内的数据线判断为出现断路。在一种实施方式中，为了视觉上更好的区分异常线路和正常线路，向栅极线输入开启电压包括仅向虚拟像素区中的栅极线输入电压。例如，如稍后描述的图15(b)所示，可以将虚拟像素区的栅极线连接到附加的衬垫50’以独立于栅极IC而单独提供电压。
图15(a)和图15(b)为根据本公开文本的实施例的显示面板的设置有衬垫的阵列基板的示意图。
对于第一侧和第二侧的延伸方向与数据线的延伸方向相一致且显示面板的显示模式为常黑模式的情况，如图15(a)所示，可以将虚拟像素区的数据线连接到衬垫50。在这种情况下，开启栅极并向数据线输入用于显示白态的电压之后，没有发生异常的虚拟像素区呈白态，对应的标记可见；当出现断路时，断路处对应的虚拟像素区会通过衬垫外灌L255电压，异常的虚拟像素区呈现黑态，异常标记不可见。因此，可以将未点亮的标记对应的栅极线判断为出现断路。
对于第一侧和第二侧的延伸方向与栅极线的延伸方向相一致且显示面板的显示模式为常黑模式的情况，如图15(b)所示，可以将虚拟像素区的栅极线连接到衬垫50’。在这种情况下，开启栅极并向数据线输入用于显示白态的电压之后，没有出现电路异常的虚拟像素区呈现白态，对应的标记可见；当出现断路时，断路处对应的虚拟像素区会通过衬垫外灌L255电压，异常虚拟像素区呈现黑态，异常标记不可见。因此，可以将未点亮的标记对应的数据线判断为出现断路。
通过本公开文本的实施例，能够提供了快速检测显示面板的解决方案。在本公开文本的实施例中，当在所述显示区的相对的两侧中的一侧的虚拟像素区中出现异常标记时，将显示区中的线路判断为出现异常；当在所述显示区的相对的两侧中的虚拟像素区中均出现异常标记时，将虚拟像素区和外围电路中的至少一者的线路判断为出现异常。
已经描述了某特定实施例，这些实施例仅通过举例的方式展现，而且不旨在限制本公开文本的范围。事实上，本文所描述的新颖实施例可以以 各种其它形式来实施；此外，可在不脱离本公开文本的精神下，做出以本文所描述的实施例的形式的各种省略、替代和改变。所附权利要求以及它们的等价物旨在覆盖落在本公开文本范围和精神内的此类形式或者修改。

Claims (30)

  1. 一种彩膜基板，包括显示区和设置在所述显示区周围的对应于虚拟像素区的周边区，其中，所述彩膜基板的黑矩阵在所述周边区的对应于虚拟像素单元的部分中具有透光部，且所述透光部包括第一组透光部和第二组透光部，
    其中，所述第一组透光部中的每个透光部被形成在沿所述显示区域的第一侧延伸的对应于所述虚拟像素单元的部分中，所述第二组透光部的每个透光部被形成在沿与所述显示区域的所述第一侧相对的第二侧延伸的对应于所述虚拟像素单元的部分中。
  2. 根据权利要求1所述的彩膜基板，其中，所述透光部包括形成在所述黑矩阵中的开口。
  3. 根据权利要求2所述的彩膜基板，其中，所述第一组透光部和所述第二组透光部中的每一个中的所述开口分别具有依次排列的数字的形状。
  4. 根据权利要求1所述的彩膜基板，其中，所透光部包括形成在所述黑矩阵中的开口和位于所述开口内的遮光区。
  5. 根据权利要求4所述的彩膜基板，其中，所述第一组透光部和所述第二组透光部中的每一个中的所述开口的所述遮光区分别具有依次排列的数字的形状。
  6. 根据权利要求1-4中任一项所述的彩膜基板，其中，所述透光部还包括第三组透光部和第四组透光部，
    其中，所述第三组透光部中的每个透光部被形成在沿所述显示区域的与第一侧相邻近的第三侧延伸的对应于所述虚拟像素单元的部分中，
    所述第四组透光部中的每个透光部被形成在沿所述显示区域的与所述第三侧相对的第四侧延伸的对应于所述虚拟像素单元的部分中。
  7. 一种显示面板，其中，包括根据权利要求1-6中任一项所述的彩膜基板和与所述彩膜基板相对设置的阵列基板。
  8. 根据权利要求7所述的显示面板，其中，所述彩膜基板的所述透光部与所述阵列基板在所述虚拟像素区的透光区相对准，以使得来自所述透 光区的光能透过所述彩膜基板的所述黑矩阵。
  9. 根据权利要求7所述的显示面板，其中，所述阵列基板包括：显示区和设置在所述显示区周围的虚拟像素区，所述显示区具有由彼此相交的栅极线和数据线限定的多个像素单元，所述虚拟像素区具有由彼此相交的所述栅极线和所述数据线限定的多个虚拟像素单元，其中，
    所述虚拟像素区具有位于所述虚拟像素单元内的标记，且所述标记包括第一组标记和第二组标记，
    其中，所述第一组标记中的每个标记被形成在沿所述显示区域的第一侧延伸的所述虚拟像素单元中，所述第二组标记中的每个标记被形成沿在与所述显示区域的所述第一侧相对的第二侧延伸的所述虚拟像素单元中，并且其中，所述彩膜基板的所述透光部与所述阵列基板中的所述标记相对准，以使得来自所述标记的光能透过所述黑矩阵。
  10. 根据权利要求9所述的显示面板，其中，所述第一侧和所述第二侧的延伸方向与所述栅极线的延伸方向和所述数据线的延伸方向中的一者相一致。
  11. 根据权利要求10所述的显示面板，其中，所述标记的透光率大于所述虚拟像素单元的其它部分的透光率。
  12. 根据权利要求11所述的显示面板，其中，所述标记被形成在所述阵列基板的薄膜晶体管的栅极金属层中。
  13. 根据权利要求12所述的显示面板，其中，所述标记包括形成在所述栅极金属层中的开口。
  14. 根据权利要求13所述的显示面板，其中，所述第一组标记和所述第二组标记中的每一个的所述开口分别具有依次排列的数字的形状。
  15. 根据权利要求12所述的显示面板，其中，所述标记包括形成在所述栅极金属层中的开口和位于所述开口内的遮光部。
  16. 根据权利要求15所述的显示面板，其中，所述第一组标记和所述第二组标记中的每一个的所述遮光部分别具有依次排列的数字的形状。
  17. 根据权利要求9-16中任一项所述的显示面板，其中，所述标记的 延伸方向与所述栅极线的延伸方向相一致，且所述虚拟像素单元在所述数据线的延伸方向上的长度小于所述像素单元在所述数据线的延伸方向上的长度。
  18. 根据权利要求9-16中任一项所述的显示面板，其中，所述标记还包括第三组标记和第四组标记，
    其中，所述第三组标记中的每个标记被形成在沿所述显示区域的与第一侧相邻近的第三侧延伸的所述虚拟像素单元中，
    所述第四组标记中的每个标记被形成在沿所述显示区域的与所述第三侧相对的第四侧延伸的所述虚拟像素单元中。
  19. 根据权利要求18所述的显示面板，其中，所述第三侧和所述第四侧的延伸方向与所述栅线线的延伸方向和所述数据线的延伸方向中的另一者相一致。
  20. 一种显示面板的检测方法，其中，所述显示面板包括根据权利要求7-19中任一项所述的显示面板，所述显示面板的检测方法包括：
    检测所述彩膜基板的所述透光部的显示状态；
    根据所述透光部的显示状态来判断线路是否出现异常。
  21. 根据权利要求20所述的显示面板的检测方法，其中，根据所述透光部的显示状态来判断线路是否出现异常包括：当所述透光部的显示状态存在不一致时，将线路判断为出现异常。
  22. 根据权利要求21所述的显示面板的检测方法，其中，所述透光部的显示状态包括亮度。
  23. 根据权利要求22所述的显示面板的检测方法，其中，所述第一侧和所述第二侧的延伸方向与所述数据线的延伸方向相一致，所述显示面板的显示模式为常白模式，所述检测方法进一步包括向所述数据线输入用于显示黑态的电压并向所述栅极线输入开启电压，将点亮的透光部判断为异常标记，将异常标记所对应的栅极线判断为出现断路。
  24. 根据权利要求22所述的显示面板的检测方法，其中，所述第一侧和所述第二侧的延伸方向与所述数据线的延伸方向相一致，所述显示面板 的显示模式为常黑模式，所述检测方法进一步包括向所述数据线输入用于显示白态的电压并向所述栅极线输入开启电压，将未点亮的透光部判断为异常标记，将异常标记所对应的栅极线路判断为出现断路。
  25. 根据权利要求24所述的显示面板的检测方法，其中，向所述数据线输入用于显示白态的电压包括仅向所述虚拟像素区中的数据线输入电压。
  26. 根据权利要求22所述的显示面板的检测方法，其中，所述第一侧和所述第二侧的延伸方向与所述栅极线的延伸方向相一致，所述显示面板的显示模式为常白模式，所述检测方法进一步包括向所述数据线输入用于显示黑态的电压并向所述栅极线输入开启电压，将点亮的透光部判断为异常标记，将异常标记所对应的数据线判断为出现断路。
  27. 根据权利要求22所述的显示面板的检测方法，其中，所述第一侧和所述第二侧的延伸方向与所述栅极线的延伸方向相一致，所述显示面板的显示模式为常黑模式，所述检测方法进一步包括向所述数据线输入用于显示白态的电压并向所述栅极线输入开启电压，将未点亮的透光部判断为异常标记，将异常标记所对应的数据线判断为出现断路。
  28. 根据权利要求27所述的显示面板的检测方法，其中，向所述栅极线输入开启电压包括仅向所述虚拟像素区中的栅极线输入电压。
  29. 根据权利要求23-28中任一项所述的显示面板的检测方法，其中，当在所述显示区的相对的两侧中的一侧的虚拟像素区中出现异常标记时，将显示区中的线路判断为出现异常。
  30. 根据权利要求23-28中任一项所述的显示面板的检测方法，其中，当在所述显示区的相对的两侧中的虚拟像素区中均出现异常标记时，将虚拟像素区和外围电路中的至少一者中的线路判断为出现异常。
PCT/CN2017/115878 2017-03-08 2017-12-13 彩膜基板、显示面板及其检测方法 WO2018161671A1 (zh)

Priority Applications (2)

Application Number Priority Date Filing Date Title
US16/086,970 US11086060B2 (en) 2017-03-08 2017-12-13 Color film substrate, display panel and method for detecting a display panel
EP17899860.5A EP3594739B1 (en) 2017-03-08 2017-12-13 Display panel, and testing method thereof

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201710134007.6A CN108572477B (zh) 2017-03-08 2017-03-08 彩膜基板、显示面板及其检测方法
CN201710134007.6 2017-03-08

Publications (1)

Publication Number Publication Date
WO2018161671A1 true WO2018161671A1 (zh) 2018-09-13

Family

ID=63448393

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2017/115878 WO2018161671A1 (zh) 2017-03-08 2017-12-13 彩膜基板、显示面板及其检测方法

Country Status (4)

Country Link
US (1) US11086060B2 (zh)
EP (1) EP3594739B1 (zh)
CN (1) CN108572477B (zh)
WO (1) WO2018161671A1 (zh)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102656664B1 (ko) * 2016-10-06 2024-04-12 삼성디스플레이 주식회사 표시장치
CN106647011A (zh) * 2017-03-14 2017-05-10 京东方科技集团股份有限公司 显示基板的制作方法、显示基板、显示面板和显示装置
CN109491164A (zh) * 2018-12-17 2019-03-19 惠科股份有限公司 一种显示面板和显示装置
CN114999324B (zh) * 2019-06-29 2023-09-19 武汉天马微电子有限公司 一种显示面板和显示装置
CN111091773A (zh) * 2020-01-10 2020-05-01 深圳市华星光电半导体显示技术有限公司 显示面板及显示装置
EP4044166A4 (en) * 2020-06-12 2022-11-23 BOE Technology Group Co., Ltd. DISPLAY PANEL AND DRIVE METHOD THEREOF AND DISPLAY DEVICE
CN111987126B (zh) 2020-08-05 2024-02-02 Tcl华星光电技术有限公司 显示面板、显示屏及电子设备
US11864418B2 (en) 2020-09-17 2024-01-02 Chengdu Boe Optoelectronics Technology Co., Ltd. Display panel, preparation method thereof and display device

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1573444A (zh) * 2003-06-04 2005-02-02 株式会社日立显示器 液晶显示装置
JP2006164690A (ja) * 2004-12-06 2006-06-22 Canon Inc ディスプレイ測定方法
CN1873484A (zh) * 2005-06-02 2006-12-06 Lg.菲利浦Lcd株式会社 液晶显示装置
CN104981907A (zh) * 2013-02-14 2015-10-14 奥林巴斯株式会社 半导体基板、摄像元件及摄像装置
CN105243994A (zh) * 2015-11-11 2016-01-13 深圳市华星光电技术有限公司 Amoled驱动系统及驱动方法
CN105954908A (zh) * 2016-06-16 2016-09-21 友达光电（昆山）有限公司 一种显示面板及其测试方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6587160B2 (en) * 1997-10-14 2003-07-01 Samsung Electronics Co., Ltd. Liquid crystal displays
CN1195243C (zh) * 1999-09-30 2005-03-30 三星电子株式会社 用于液晶显示器的薄膜晶体管阵列屏板及其制造方法
JP2004347659A (ja) 2003-05-20 2004-12-09 Sony Corp 液晶パネルとその製造方法、及び液晶表示装置
JP4285158B2 (ja) * 2003-08-29 2009-06-24 セイコーエプソン株式会社 電気光学装置及び電子機器
TWI269078B (en) 2005-12-30 2006-12-21 Quanta Display Inc Color filter substrate and fabricating method thereof
JP5856006B2 (ja) * 2012-04-27 2016-02-09 株式会社ジャパンディスプレイ 液晶表示パネル
CN103698934B (zh) 2013-12-31 2016-11-02 友达光电(厦门)有限公司 显示面板
KR102231946B1 (ko) * 2014-07-15 2021-03-26 삼성디스플레이 주식회사 유기 발광 표시 장치
CN104317158B (zh) 2014-11-14 2018-05-22 京东方科技集团股份有限公司 一种掩膜板、掩膜板组、彩膜基板及显示装置
US10435093B2 (en) * 2015-01-14 2019-10-08 19Th Hole Cart Llc Utility vehicle configurable workstation
CN205507317U (zh) * 2016-04-01 2016-08-24 厦门天马微电子有限公司 显示模组及显示装置
CN106405924A (zh) 2016-11-11 2017-02-15 深圳市华星光电技术有限公司 黑色矩阵光罩、黑色矩阵制作方法及显示面板

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1573444A (zh) * 2003-06-04 2005-02-02 株式会社日立显示器 液晶显示装置
JP2006164690A (ja) * 2004-12-06 2006-06-22 Canon Inc ディスプレイ測定方法
CN1873484A (zh) * 2005-06-02 2006-12-06 Lg.菲利浦Lcd株式会社 液晶显示装置
CN104981907A (zh) * 2013-02-14 2015-10-14 奥林巴斯株式会社 半导体基板、摄像元件及摄像装置
CN105243994A (zh) * 2015-11-11 2016-01-13 深圳市华星光电技术有限公司 Amoled驱动系统及驱动方法
CN105954908A (zh) * 2016-06-16 2016-09-21 友达光电（昆山）有限公司 一种显示面板及其测试方法

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP3594739A4 *

Also Published As

Publication number Publication date
US20210165143A9 (en) 2021-06-03
EP3594739A4 (en) 2021-03-03
CN108572477B (zh) 2021-12-07
EP3594739B1 (en) 2023-06-07
CN108572477A (zh) 2018-09-25
US20190101673A1 (en) 2019-04-04
US11086060B2 (en) 2021-08-10
EP3594739A1 (en) 2020-01-15

Similar Documents

Publication Publication Date Title
WO2018161671A1 (zh) 彩膜基板、显示面板及其检测方法
CN106707606B (zh) 异形显示面板及显示装置
CN106896961B (zh) 触控显示面板和触控显示装置
CN110047852B (zh) 显示面板和显示装置
EP2749998A2 (en) Liquid crystal display with embedded touch panel and method of manufacturing the same
WO2016173340A1 (zh) 触控显示面板及其制备方法、触摸检测方法
US20170337859A1 (en) Display panel
KR102303019B1 (ko) 표시 장치용 패널, 표시 장치용 패널의 코드 판독 방법 및 표시 장치용 패널의 제조 방법
KR20150085439A (ko) 표시 패널 및 이를 포함하는 표시 장치
CN103760728B (zh) 一种阵列基板及其显示装置
CN108873449A (zh) 彩色滤光基板及液晶显示装置
WO2016004710A1 (zh) 双视场显示器及其制造方法、驱动方法
JP2005301283A (ja) 目視で切断精度を確認するための記号を有するｌｃｄパネル
CN106094311B (zh) 一种窄边框液晶面板及其组立标尺的制作方法
CN105353545A (zh) 液晶显示面板及其阵列基板电路
JP2015108765A (ja) 表示装置
CN107870490A (zh) 显示装置
KR20130040504A (ko) 표시 장치
JP3183253U (ja) タッチ表示装置
CN105954908A (zh) 一种显示面板及其测试方法
CN109871151B (zh) 显示面板和显示装置
CN210429261U (zh) 显示面板及显示装置
KR100853214B1 (ko) 액정 표시 장치의 패널 제조 방법
US20180120602A1 (en) Liquid crystal display panel and manufacturing method thereof
KR20180049378A (ko) 표시장치

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 17899860

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

ENP Entry into the national phase

Ref document number: 2017899860

Country of ref document: EP

Effective date: 20191008