WO2018149010A1 - 阵列基板及其制作方法与In Cell触控显示面板 - Google Patents

阵列基板及其制作方法与In Cell触控显示面板 Download PDF

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Publication number
WO2018149010A1
WO2018149010A1 PCT/CN2017/076774 CN2017076774W WO2018149010A1 WO 2018149010 A1 WO2018149010 A1 WO 2018149010A1 CN 2017076774 W CN2017076774 W CN 2017076774W WO 2018149010 A1 WO2018149010 A1 WO 2018149010A1
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layer
array substrate
disposed
substrate
flat
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PCT/CN2017/076774
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English (en)
French (fr)
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李亚锋
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武汉华星光电技术有限公司
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Priority to US15/529,513 priority Critical patent/US20180314093A1/en
Publication of WO2018149010A1 publication Critical patent/WO2018149010A1/zh

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    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
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    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
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    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
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    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/133357Planarisation layers
    • GPHYSICS
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    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1339Gaskets; Spacers; Sealing of cells
    • G02F1/13396Spacers having different sizes
    • GPHYSICS
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    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1343Electrodes
    • G02F1/134309Electrodes characterised by their geometrical arrangement
    • G02F1/134372Electrodes characterised by their geometrical arrangement for fringe field switching [FFS] where the common electrode is not patterned
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    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
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    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
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    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
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    • GPHYSICS
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    • G06F2203/04103Manufacturing, i.e. details related to manufacturing processes specially suited for touch sensitive devices

Definitions

  • the present invention relates to the field of display technologies, and in particular, to an array substrate, a method for fabricating the same, and an In Cell touch display panel.
  • touch display panels have been widely accepted and used by people, such as smart phones, tablets, etc., using touch display panels.
  • the touch display panel integrates the touch panel and the liquid crystal display panel by using the embedded touch technology, and the touch panel function is embedded in the liquid crystal display panel, so that the liquid crystal display panel has the functions of displaying and sensing the touch input at the same time.
  • the touch display panel can be divided into a touch cell covering the on cell (On Cell), a touch electrode embedded in the cell (In Cell), and an external type according to different structures.
  • On Cell On Cell
  • In Cell touch display panel has the advantages of low cost, ultra-thin, and narrow bezel. It is mainly used in high-end touch products and has evolved into the main development direction of future touch technology.
  • FIG. 1 and 2 are schematic cross-sectional views of a conventional In Cell touch display panel including an array substrate 100 and a color filter substrate disposed opposite the array substrate 100. 200, and a liquid crystal layer 300 between the array substrate 100 and the color film substrate 200;
  • the array substrate 100 includes a first substrate 110, a light shielding layer 120 disposed on the first substrate 110, and a first insulating layer 130 disposed on the first substrate 110 and the light shielding layer 120.
  • a polysilicon layer 140 on an insulating layer 130, a second insulating layer 150 disposed on the first insulating layer 130 and the polysilicon layer 140, and a gate 160 disposed on the second insulating layer 150.
  • a flat layer 500 on the third insulating layer 170 a first passivation layer 810 disposed on the flat layer 500, and a touch signal layer 600 disposed on the first passivation layer 810.
  • a first via 910 is disposed on the third passivation layer 830 , the second passivation layer 820 , the first passivation layer 810 , and the flat layer 500 , and the pixel electrode 900 passes through the first A via 910 is in contact with the source/drain 410;
  • the second passivation layer 820 is provided with a second a via 920, the common electrode 700 is in contact with the touch signal layer 600 through the second via 920;
  • the color filter substrate 200 is provided with a spacer 250, and the spacer 250 is in contact with the surface of the array substrate 100.
  • the manufacturing method of the array substrate 100 is as follows:
  • Step 1 ′ providing a first substrate 110, forming a light shielding layer 120, a first insulating layer 130, a polysilicon layer 140, a second insulating layer 150, a gate 160, and a third on the first substrate 110 in order from bottom to top. Insulation layer 170, and source/drain 410 and data line 420;
  • Step 2 ′ forming a planarization layer 500 on the source/drain 410, the data line 420 and the third insulating layer 170, and forming a first passivation layer 810 on the planarization layer 500, in the first passivation a touch signal layer 600 is formed on the layer 810, and a second passivation layer 820 is formed on the touch signal layer 600 and the first passivation layer 810;
  • the flat layer 500, the first passivation layer 810, and the second passivation layer 820 are etched by a photolithography process, and the flat layer 500, the first passivation layer 810, and the second passivation layer 820 are formed to correspond. a first via 913 above the source/drain 410, and a second via 920 corresponding to the top of the touch signal layer 600 on the second passivation layer 820;
  • Step 3 forming a common electrode 700 on the second passivation layer 820, and the common electrode 700 is in contact with the touch signal layer 600 through the second via 920;
  • Step 4 ′ forming a third passivation layer 830 on the common electrode 700 and the second passivation layer 820 , and etching the third passivation layer 830 by using a photolithography process to form the first via hole 913 a second through hole 914, the second through hole 914 and the first through hole 913 together constitute a first through hole 910;
  • Step 5' forming a pixel electrode 900 on the third passivation layer 830, and the pixel electrode 900 is in contact with the source/drain 410 through the first via 910.
  • the array substrate 100 includes a first passivation layer 810, a second passivation layer 820, and a third passivation layer 830.
  • the layer makes the process complicated and the process cost is high;
  • the surface of the array substrate 100 corresponding to the touch signal layer 600 may have a protrusion 101, which is limited by space.
  • the area is generally the contact area of the spacer 250 with the array substrate 100.
  • the spacer 250 is easily slipped under the protrusion 101. It is easy to cause the cell thickness (Cell Gap) to change, causing poor display; and when the spacer 250 slides, it is easy to cause the alignment film (not shown) in the area to be scratched, causing fine cracks and bright spots, affecting the panel ( Panel) display quality.
  • An object of the present invention is to provide an array substrate having a relatively flat surface, which can prevent the liquid crystal cell from collapsing or the alignment film from being scratched due to sliding of the spacer, thereby improving display quality and low process cost.
  • Another object of the present invention is to provide a method for fabricating an array substrate.
  • the surface of the array substrate is relatively flat, the display quality is good, the process is simple, and the process cost is low.
  • Another object of the present invention is to provide an In Cell touch display panel with good display quality and low production cost.
  • the present invention provides an array substrate including a first substrate, a light shielding layer disposed on the first substrate, a first insulating layer disposed on the first substrate and the light shielding layer, and disposed at the An active layer on the first insulating layer, a second insulating layer disposed on the first insulating layer and the active layer, a gate electrode disposed on the second insulating layer, and the gate electrode a third insulating layer on the second insulating layer, source/drain and data lines disposed on the third insulating layer, and first flatness disposed on the source/drain, the data line and the third insulating layer a layer, a touch signal layer disposed on the first planar layer, a second planar layer disposed on the touch signal layer and the first planar layer, a common electrode disposed on the second planar layer, a passivation layer disposed on the common electrode and the second planar layer, and a pixel electrode disposed on the passivation layer;
  • a first via hole is disposed on the passivation layer, the first flat layer and the second flat layer, and the pixel electrode is in contact with the source/drain through the first via hole;
  • the active layer is a polysilicon layer.
  • the light shielding layer completely covers the active layer in the horizontal direction.
  • the second via corresponds to being disposed above the data line.
  • the material of the light shielding layer is metal; the material of the touch signal layer is metal.
  • the present invention also provides a method for fabricating the above array substrate, comprising the following steps:
  • Step 1 providing a first substrate, forming a light shielding layer, a first insulating layer, an active layer, a second insulating layer, a gate electrode, a third insulating layer, and a source/drain sequentially from bottom to top on the first substrate Pole and data line;
  • Step 2 forming a first flat layer on the source/drain, the data line and the third insulating layer, forming a touch signal layer on the first flat layer, and the first flat layer on the touch signal layer Forming a second planar layer on the layer;
  • Etching the second planar layer and the first planar layer by a photolithography process forming a first via hole corresponding to the source/drain on the second planar layer and the first planar layer, Forming a second via hole corresponding to the top of the touch signal layer on the second flat layer;
  • Step 3 forming a common electrode on the second flat layer, and the common electrode is in contact with the touch signal layer through the second via hole;
  • Step 4 forming a passivation layer on the common electrode and the second planar layer, etching the passivation layer by using a photolithography process to form a second via hole penetrating the first via hole, the first
  • the two through holes and the first through hole together constitute a first through hole
  • Step 5 Form a pixel electrode on the passivation layer, and the pixel electrode contacts the source/drain through the first via.
  • the present invention further provides an In Cell touch display panel, comprising an array substrate, a color film substrate disposed opposite to the array substrate, and a liquid crystal layer between the array substrate and the color filter substrate;
  • the array substrate is the above array substrate.
  • the color filter substrate includes a second substrate, a black matrix disposed on the second substrate, a color resist layer disposed on the black matrix and the second substrate, and a third flat disposed on the color resist layer And a main spacer disposed on the third planar layer, the main spacer contacting the passivation layer on the surface of the array substrate.
  • the color filter substrate further includes a secondary spacer in the same layer as the main spacer, the secondary spacer having a height lower than a height of the main spacer.
  • the second substrate is a glass substrate; the color resist layer comprises a red color resist, a green color resist, and a blue color resist.
  • the present invention provides an array substrate in which a first flat layer, a touch signal layer, a second flat layer, and a common electrode are sequentially formed on a source/drain, a data line, and a third insulating layer.
  • the passivation layer and the pixel electrode are arranged such that the touch signal layer is located under the second flat layer, and the surface of the array substrate corresponding to the touch signal layer is not formed, and the surface of the array substrate is compared.
  • Flat can avoid the collapse of the liquid crystal cell or the alignment film scratch caused by the sliding of the spacer, improve the display quality; at the same time reduce the three passivation layers in the existing array substrate into a passivation layer, thereby simplifying the process, Reduce process costs.
  • the invention provides a method for fabricating an array substrate, wherein the prepared array substrate has a relatively flat surface, good display quality, simple process and low process cost.
  • the In Cell touch display panel provided by the invention has good display quality and low production cost.
  • FIG. 1 is a cross-sectional view of a conventional In Cell touch display panel at a first via
  • FIG. 2 is a cross-sectional view of the In Cell touch display panel of FIG. 1 at a second via;
  • FIG. 3 is a cross-sectional view showing the array substrate of the present invention at a first via hole
  • FIG. 4 is a cross-sectional view showing the array substrate of the present invention at a second via hole
  • FIG. 5 is a flow chart of a method of fabricating an array substrate of the present invention.
  • FIG. 6 is a cross-sectional view of the In Cell touch display panel of the present invention at a first via of the array substrate;
  • FIG. 7 is a cross-sectional view of the In Cell touch display panel of the present invention at a second via of the array substrate.
  • the present invention first provides an array substrate 10 including a first substrate 11 , a light shielding layer 12 disposed on the first substrate 11 , and a first substrate 11 and a light shielding layer 12 .
  • a first insulating layer 13 , an active layer 14 disposed on the first insulating layer 13 , and a second insulating layer 15 disposed on the first insulating layer 13 and the active layer 14 a gate electrode 16 on the second insulating layer 15, a third insulating layer 17 disposed on the gate electrode 16 and the second insulating layer 15, a source/drain 41 and data provided on the third insulating layer 17.
  • the touch signal layer 60 and the second flat layer 52 on the first flat layer 51, the common electrode 70 disposed on the second flat layer 52, and the common electrode 70 and the second flat layer 52 are disposed on the second flat layer 52.
  • a passivation layer 81, and a pixel electrode 90 disposed on the passivation layer 81;
  • a first via 91 is disposed on the passivation layer 81, the first planar layer 51, and the second planar layer 52.
  • the pixel electrode 90 passes through the first via 91 and source/drain.
  • the second flat layer 52 is provided with a second via 92, and the common electrode 70 is in contact with the touch signal layer 60 through the second via 92.
  • the third insulating layer 17 and the second insulating layer 15 are provided with contact holes 171 corresponding to the upper ends of the active layer 14, and the source/drain electrodes 41 are connected via the contact holes 171.
  • the active layer 14 is in contact.
  • the first substrate 11 is a glass substrate.
  • the active layer 14 is a polysilicon layer.
  • the light shielding layer 12 completely covers the active layer 14 in the horizontal direction.
  • the second via 92 is disposed above the data line 42.
  • the material of the light shielding layer 12 is metal.
  • the material of the touch signal layer 60 is metal.
  • the first insulating layer 13, the second insulating layer 15, the third insulating layer 17, and the passivation layer 81 are respectively a silicon nitride (SiN x ) layer, a silicon oxide (SiO x ) layer, or both.
  • Composite layer a silicon nitride (SiN x ) layer, a silicon oxide (SiO x ) layer, or both.
  • the materials of the common electrode 70 and the pixel electrode 90 are both transparent conductive metal oxides, preferably indium tin oxide (ITO).
  • ITO indium tin oxide
  • the first flat layer 51, the touch signal layer 60, the second flat layer 52, the common electrode 70, and the blunt are sequentially formed on the source/drain 41, the data line 42, and the third insulating layer 17.
  • the layer 81 and the pixel electrode 90 are arranged such that the touch signal layer 60 is located below the second flat layer 52, and the surface of the array substrate 10 does not form a bump corresponding to the area of the touch signal layer 60.
  • the surface of the array substrate 10 is relatively flat, which can avoid the situation that the array substrate 10 collapses or the alignment film is scratched due to the sliding of the spacer on the color filter substrate after forming the liquid crystal cell with the color filter substrate, thereby improving the display quality; At the same time, the three passivation layers in the existing array substrate are reduced to one passivation layer, thereby simplifying the process and reducing the process cost.
  • the present invention further provides a method for fabricating the array substrate 10, including the following steps:
  • Step 1 providing a first substrate 11 on which the light shielding layer 12, the first insulating layer 13, the active layer 14, the second insulating layer 15, the gate 16, and the third are sequentially formed from bottom to top.
  • the step of etching the second insulating layer 15 and the third insulating layer 17 before forming the source/drain 41 and the data line 42 is performed in the second insulating layer 15 and the third insulating layer 17
  • a contact hole 171 is formed on both ends of the active layer 14 , and the source/drain 41 is in contact with the active layer 14 through the contact hole 171 .
  • Step 2 forming a first planar layer 51 on the source/drain 41, the data line 42 and the third insulating layer 17, and forming a touch signal layer 60 on the first flat layer 51.
  • a second planar layer 52 is formed on the signal layer 60 and the first planar layer 51.
  • the second planarization layer 52 and the first planarization layer 51 are etched by a photolithography process, and a first pass corresponding to the source/drain 41 is formed on the second planarization layer 52 and the first planarization layer 51.
  • the hole 911 is formed on the second flat layer 52 at the same time as the second via hole 92 corresponding to the touch signal layer 60.
  • Step 3 forming a common electrode 70 on the second planar layer 52, and the common electrode 70 is in contact with the touch signal layer 60 through the second via 92.
  • Step 4 forming a passivation layer 81 on the common electrode 70 and the second planar layer 52,
  • the passivation layer 81 is etched by a photolithography process to form a second via hole 912 penetrating the first via hole 911.
  • the second via hole 912 and the first via hole 911 together form a first via hole 91. .
  • Step 5 forming a pixel electrode 90 on the passivation layer 81, and the pixel electrode 90 is in contact with the source/drain 41 through the first via 91.
  • the first planar layer 51, the touch signal layer 60, the second planar layer 52, and the common electrode are sequentially formed on the source/drain 41, the data line 42, and the third insulating layer 17.
  • the passivation layer 81 and the pixel electrode 90 are arranged such that the touch signal layer 60 is located below the second flat layer 52, and the surface of the array substrate 10 corresponding to the touch signal layer 60 does not form a bump.
  • the array substrate 10 can be prevented from collapsing the liquid crystal cell or the alignment film is scratched due to the sliding of the spacer on the color filter substrate after forming the liquid crystal cell with the color filter substrate.
  • Improve the display quality at the same time, reduce the three passivation layer processes in the existing array substrate process to one passivation layer process, thereby simplifying the process and reducing the process cost.
  • the present invention further provides an In Cell touch display panel including the array substrate 10 , including an array substrate 10 and a color filter substrate disposed opposite the array substrate 10 . 20, and a liquid crystal layer 30 between the array substrate 10 and the color filter substrate 20;
  • the structure of the array substrate 10 is as described above, and details are not described herein again.
  • the color filter substrate 20 includes a second substrate 21, a black matrix 22 disposed on the second substrate 21, and a color resist layer 23 disposed on the black matrix 22 and the second substrate 21. a third flat layer 24 on the color resist layer 23, and a main spacer 251 disposed on the third flat layer 24, and a passivation layer on the surface of the main spacer 251 and the array substrate 10. 81 contact.
  • the color filter substrate 20 further includes a secondary spacer 252 located in the same layer as the main spacer 251, and the height of the secondary spacer 252 is lower than the height of the main spacer 251.
  • a gap is formed between the secondary spacer 252 and the surface of the array substrate 10.
  • the second substrate 21 is a glass substrate.
  • the color resist layer 23 includes a red color resist 231, a green color resist 232, and a blue color resist 233.
  • the In Cell touch display panel of the present invention comprises the array substrate 10, and the surface of the array substrate 10 is relatively flat, which can avoid the collapse of the liquid crystal cell or the scratch of the alignment film caused by the sliding of the spacer on the color filter substrate 20. Improve display quality while low production costs.
  • the present invention provides an array substrate and a method for fabricating the same, and an In Cell touch display panel.
  • the array substrate of the present invention sequentially forms a first planar layer, a touch signal layer, a second planar layer, a common electrode, a passivation layer, and a pixel on the source/drain, the data line, and the third insulating layer.
  • the touch signal layer is located under the second flat layer, and the surface of the array substrate corresponding to the touch signal layer is not formed.
  • the surface of the array substrate is relatively flat, which can avoid separation. The sliding of the spacer causes the liquid crystal cell to collapse or the alignment film to be scratched, thereby improving the display quality.
  • the three passivation layers in the existing array substrate are reduced to one passivation layer, thereby simplifying the process and reducing the process cost.
  • the surface of the array substrate obtained is relatively flat, the display quality is good, the process is simple, and the process cost is low.
  • the In Cell touch display panel of the invention has good display quality and low production cost.

Abstract

一种阵列基板(10)及其制作方法与In Cell触控显示面板。阵列基板(10),通过在源/漏极(41)、数据线(42)与第三绝缘层(17)上依次形成第一平坦层(51)、触控信号层(60)、第二平坦层(52)、公共电极(70)、钝化层(81)、及像素电极(90),这种架构使得触控信号层(60)位于第二平坦层(52)下方,不会出现阵列基板(10)表面对应于触控信号层(60)的区域形成凸起的情况,阵列基板(10)的表面比较平坦,能够避免因隔垫物滑动造成液晶盒塌陷或者配向膜刮伤的情况,提升显示品质;同时将现有的阵列基板(10)中的三道钝化层减少为一道钝化层,从而简化制程,降低制程成本。阵列基板(10)的制作方法,制得的阵列基板(10)表面平坦,且制程简单,制程成本低。In Cell触控显示面板,显示品质好,同时生产成本低。

Description

阵列基板及其制作方法与In Cell触控显示面板 技术领域
本发明涉及显示技术领域,尤其涉及一种阵列基板及其制作方法与In Cell触控显示面板。
背景技术
随着显示技术的飞速发展,触控显示面板已经广泛地被人们所接受及使用,如智能手机、平板电脑等均使用了触控显示面板。触控显示面板采用嵌入式触控技术将触控面板和液晶显示面板结合为一体,并将触控面板功能嵌入到液晶显示面板内,使得液晶显示面板同时具备显示和感知触控输入的功能。触控显示面板根据结构不同可划分为触控电极覆盖于液晶盒上式(On Cell)、触控电极内嵌在液晶盒内式(In Cell)、以及外挂式。其中,In Cell触控显示面板具有成本低、超薄、和窄边框的优点,主要应用在高端触控产品中,已演化为未来触控技术的主要发展方向。
请参阅图1与图2,为一种现有的In Cell触控显示面板的剖视示意图,所述In Cell触控显示面板包括阵列基板100、与所述阵列基板100相对设置的彩膜基板200、及位于所述阵列基板100与彩膜基板200之间的液晶层300;
所述阵列基板100包括第一基板110、设于所述第一基板110上的遮光层120、设于所述第一基板110与遮光层120上的第一绝缘层130、设于所述第一绝缘层130上的多晶硅层140、设于所述第一绝缘层130与多晶硅层140上的第二绝缘层150、设于所述第二绝缘层150上的栅极160、设于所述栅极160与第二绝缘层150上的第三绝缘层170、设于所述第三绝缘层170上的源/漏极410与数据线420、设于所述源/漏极410、数据线420与第三绝缘层170上的平坦层500、设于所述平坦层500上的第一钝化层810、设于所述第一钝化层810上的触控信号层600、设于所述触控信号层600与第一钝化层810上的第二钝化层820、设于所述第二钝化层820上的公共电极700、设于所述公共电极700与第二钝化层820上的第三钝化层830、及设于所述第三钝化层830上的像素电极900;
如图1所示,所述第三钝化层830、第二钝化层820、第一钝化层810及平坦层500上设有第一过孔910,所述像素电极900通过所述第一过孔910与源/漏极410相接触;如图2所示,所述第二钝化层820上设有第二 过孔920,所述公共电极700通过所述第二过孔920与触控信号层600相接触;
所述彩膜基板200上设有隔垫物250,所述隔垫物250与所述阵列基板100的表面相接触。
所述阵列基板100的制作方法为:
步骤1’、提供第一基板110,在所述第一基板110上从下到上依次形成遮光层120、第一绝缘层130、多晶硅层140、第二绝缘层150、栅极160、第三绝缘层170、及源/漏极410与数据线420;
步骤2’、在所述源/漏极410、数据线420与第三绝缘层170上形成平坦层500,在所述平坦层500上形成第一钝化层810,在所述第一钝化层810上形成触控信号层600,在所述触控信号层600与第一钝化层810上形成第二钝化层820;
采用一道光刻制程对所述平坦层500、第一钝化层810及第二钝化层820进行蚀刻,在所述平坦层500、第一钝化层810及第二钝化层820形成对应于所述源/漏极410上方的第一通孔913,同时在所述第二钝化层820上形成对应于所述触控信号层600上方的第二过孔920;
步骤3’、在所述第二钝化层820上形成公共电极700,所述公共电极700通过所述第二过孔920与触控信号层600相接触;
步骤4’、在所述公共电极700与第二钝化层820上形成第三钝化层830,采用一道光刻制程对第三钝化层830进行蚀刻,形成与所述第一通孔913相贯通的第二通孔914,所述第二通孔914与第一通孔913共同构成第一过孔910;
步骤5’、在所述第三钝化层830上形成像素电极900,所述像素电极900通过所述第一过孔910与源/漏极410相接触。
从所述阵列基板100的结构及其制作方法可以看出,由于所述阵列基板100共含有第一钝化层810、第二钝化层820、及第三钝化层830共三道钝化层,使得其制程复杂,制程成本较高;
另外,由于触控信号层600较厚,且又位于平坦层500之上,因此所述阵列基板100表面对应于所述触控信号层600的区域会出现凸起101,而受空间的限制,该区域一般为隔垫物250与阵列基板100的接触区域,那么当阵列基板100与彩膜基板200之间发生偏移或者发生滑动时,隔垫物250很容易滑落到所述凸起101下方,容易造成液晶盒厚(Cell Gap)发生变化,引起显示不良;并且当隔垫物250发生滑动时,容易造成该区域的配向膜(未图示)刮伤,造成细小碎亮点,影响面板(Panel)的显示品质。
发明内容
本发明的目的在于提供一种阵列基板,表面比较平坦,能够避免因隔垫物滑动造成液晶盒塌陷或者配向膜刮伤的情况,提升显示品质,同时制程成本低。
本发明的目的还在于提供一种阵列基板的制作方法,制得的阵列基板表面比较平坦,显示品质好,且制程简单,制程成本低。
本发明的目的还在于提供一种In Cell触控显示面板,显示品质好,同时生产成本低。
为实现上述目的,本发明提供一种阵列基板,包括第一基板、设于所述第一基板上的遮光层、设于所述第一基板与遮光层上的第一绝缘层、设于所述第一绝缘层上的有源层、设于所述第一绝缘层与有源层上的第二绝缘层、设于所述第二绝缘层上的栅极、设于所述栅极与第二绝缘层上的第三绝缘层、设于所述第三绝缘层上的源/漏极与数据线、设于所述源/漏极、数据线与第三绝缘层上的第一平坦层、设于所述第一平坦层上的触控信号层、设于所述触控信号层与第一平坦层上的第二平坦层、设于所述第二平坦层上的公共电极、设于所述公共电极与第二平坦层上的钝化层、及设于所述钝化层上的像素电极;
所述钝化层、第一平坦层与第二平坦层上设有第一过孔,所述像素电极通过所述第一过孔与源/漏极相接触;所述第二平坦层上设有第二过孔,所述公共电极通过所述第二过孔与触控信号层相接触。
所述有源层为多晶硅层。
所述遮光层在水平方向上完全遮盖所述有源层。
所述第二过孔对应于所述数据线上方设置。
所述遮光层的材料为金属;所述触控信号层的材料为金属。
本发明还提供一种上述阵列基板的制作方法,包括如下步骤:
步骤1、提供第一基板,在所述第一基板上从下到上依次形成遮光层、第一绝缘层、有源层、第二绝缘层、栅极、第三绝缘层、及源/漏极与数据线;
步骤2、在所述源/漏极、数据线与第三绝缘层上形成第一平坦层,在所述第一平坦层上形成触控信号层,在所述触控信号层与第一平坦层上形成第二平坦层;
采用一道光刻制程对第二平坦层与第一平坦层进行蚀刻,在所述第二平坦层与第一平坦层上形成对应于所述源/漏极上方的第一通孔,同时在所 述第二平坦层上形成对应于所述触控信号层上方的第二过孔;
步骤3、在所述第二平坦层上形成公共电极,所述公共电极通过所述第二过孔与触控信号层相接触;
步骤4、在所述公共电极与第二平坦层上形成钝化层,采用一道光刻制程对钝化层进行蚀刻,形成与所述第一通孔相贯通的第二通孔,所述第二通孔与第一通孔共同构成第一过孔;
步骤5、在所述钝化层上形成像素电极,所述像素电极通过所述第一过孔与源/漏极相接触。
本发明还提供一种In Cell触控显示面板,包括阵列基板、与所述阵列基板相对设置的彩膜基板、及位于所述阵列基板与彩膜基板之间的液晶层;
所述阵列基板为上述阵列基板。
所述彩膜基板包括第二基板、设于所述第二基板上的黑色矩阵、设于所述黑色矩阵与第二基板上的色阻层、设于所述色阻层上的第三平坦层、及设于所述第三平坦层上的主隔垫物,所述主隔垫物与所述阵列基板表面的钝化层相接触。
所述彩膜基板还包括与所述主隔垫物位于同一层的次隔垫物,所述次隔垫物的高度低于主隔垫物的高度。
所述第二基板为玻璃基板;所述色阻层包括红色色阻、绿色色阻、及蓝色色阻。
本发明的有益效果:本发明提供的一种阵列基板,通过在源/漏极、数据线与第三绝缘层上依次形成第一平坦层、触控信号层、第二平坦层、公共电极、钝化层、及像素电极,这种架构使得触控信号层位于第二平坦层下方,不会出现阵列基板表面对应于触控信号层的区域形成凸起的情况,所述阵列基板的表面比较平坦,能够避免因隔垫物滑动造成液晶盒塌陷或者配向膜刮伤的情况,提升显示品质;同时将现有的阵列基板中的三道钝化层减少为一道钝化层,从而简化制程,降低制程成本。本发明提供的一种阵列基板的制作方法,制得的阵列基板表面比较平坦,显示品质好,且制程简单,制程成本低。本发明提供的一种In Cell触控显示面板,显示品质好,同时生产成本低。
附图说明
为了能更进一步了解本发明的特征以及技术内容,请参阅以下有关本发明的详细说明与附图,然而附图仅提供参考与说明用,并非用来对本发明加以限制。
附图中,
图1为一种现有的In Cell触控显示面板在第一过孔处的剖视示意图;
图2为图1的In Cell触控显示面板在第二过孔处的剖视示意图;
图3为本发明的阵列基板在第一过孔处的剖视示意图;
图4为本发明的阵列基板在第二过孔处的剖视示意图;
图5为本发明的阵列基板的制作方法的流程图;
图6为本发明的In Cell触控显示面板在阵列基板的第一过孔处的剖视示意图;
图7为本发明的In Cell触控显示面板在阵列基板的第二过孔处的剖视示意图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果,以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图3与图4,本发明首先提供一种阵列基板10,包括第一基板11、设于所述第一基板11上的遮光层12、设于所述第一基板11与遮光层12上的第一绝缘层13、设于所述第一绝缘层13上的有源层14、设于所述第一绝缘层13与有源层14上的第二绝缘层15、设于所述第二绝缘层15上的栅极16、设于所述栅极16与第二绝缘层15上的第三绝缘层17、设于所述第三绝缘层17上的源/漏极41与数据线42、设于所述源/漏极41、数据线42与第三绝缘层17上的第一平坦层51、设于所述第一平坦层51上的触控信号层60、设于所述触控信号层60与第一平坦层51上的第二平坦层52、设于所述第二平坦层52上的公共电极70、设于所述公共电极70与第二平坦层52上的钝化层81、及设于所述钝化层81上的像素电极90;
如图3所示,所述钝化层81、第一平坦层51与第二平坦层52上设有第一过孔91,所述像素电极90通过所述第一过孔91与源/漏极41相接触;如图4所示,所述第二平坦层52上设有第二过孔92,所述公共电极70通过所述第二过孔92与触控信号层60相接触。
具体的,所述第三绝缘层17与第二绝缘层15上设有对应于所述有源层14两端上方的接触孔171,所述源/漏极41经由所述接触孔171与所述有源层14相接触。
具体的,所述第一基板11为玻璃基板。
具体的,所述有源层14为多晶硅层。
具体的,所述遮光层12在水平方向上完全遮盖所述有源层14。
具体的,所述第二过孔92对应于所述数据线42上方设置。
具体的,所述遮光层12的材料为金属。
具体的,所述触控信号层60的材料为金属。
具体的,所述第一绝缘层13、第二绝缘层15、第三绝缘层17及钝化层81分别为氮化硅(SiNx)层、氧化硅(SiOx)层、或二者的复合层。
具体的,所述公共电极70与像素电极90的材料均为透明导电金属氧化物,优选为氧化铟锡(ITO)。
本发明的阵列基板10,通过在源/漏极41、数据线42与第三绝缘层17上依次形成第一平坦层51、触控信号层60、第二平坦层52、公共电极70、钝化层81、及像素电极90,这种架构使得触控信号层60位于第二平坦层52下方,不会出现阵列基板10表面对应于触控信号层60的区域形成凸起的情况,所述阵列基板10的表面比较平坦,能够避免阵列基板10在与彩膜基板对组形成液晶盒后因彩膜基板上的隔垫物滑动造成液晶盒塌陷或者配向膜刮伤的情况,提升显示品质;同时将现有的阵列基板中的三道钝化层减少为一道钝化层,从而简化制程,降低制程成本。
请参阅图5,同时参阅图3与图4,基于上述阵列基板10的结构,本发明还提供一种上述阵列基板10的制作方法,包括如下步骤:
步骤1、提供第一基板11,在所述第一基板11上从下到上依次形成遮光层12、第一绝缘层13、有源层14、第二绝缘层15、栅极16、第三绝缘层17、及源/漏极41与数据线42。
具体的,所述步骤1中在形成源/漏极41与数据线42之前还具有一蚀刻第二绝缘层15与第三绝缘层17的步骤,在第二绝缘层15与第三绝缘层17上对应于所述有源层14两端上方形成接触孔171,所述源/漏极41通过接触孔171与有源层14相接触。
步骤2、在所述源/漏极41、数据线42与第三绝缘层17上形成第一平坦层51,在所述第一平坦层51上形成触控信号层60,在所述触控信号层60与第一平坦层51上形成第二平坦层52。
采用一道光刻制程对第二平坦层52与第一平坦层51进行蚀刻,在所述第二平坦层52与第一平坦层51上形成对应于所述源/漏极41上方的第一通孔911,同时在所述第二平坦层52上形成对应于所述触控信号层60上方的第二过孔92。
步骤3、在所述第二平坦层52上形成公共电极70,所述公共电极70通过所述第二过孔92与触控信号层60相接触。
步骤4、在所述公共电极70与第二平坦层52上形成钝化层81,采用 一道光刻制程对钝化层81进行蚀刻,形成与所述第一通孔911相贯通的第二通孔912,所述第二通孔912与第一通孔911共同构成第一过孔91。
步骤5、在所述钝化层81上形成像素电极90,所述像素电极90通过所述第一过孔91与源/漏极41相接触。
本发明的阵列基板10的制作方法,通过在源/漏极41、数据线42与第三绝缘层17上依次形成第一平坦层51、触控信号层60、第二平坦层52、公共电极70、钝化层81、及像素电极90,这种架构使得触控信号层60位于第二平坦层52下方,不会出现阵列基板10表面对应于所述触控信号层60的区域形成凸起的情况,所述阵列基板10的表面比较平坦,能够避免阵列基板10在与彩膜基板对组形成液晶盒后因彩膜基板上的隔垫物滑动造成液晶盒塌陷或者配向膜刮伤的情况,提升显示品质;同时将现有的阵列基板制程中的三道钝化层制程减少为一道钝化层制程,从而简化制程,降低制程成本。
请参阅图6与图7,基于上述阵列基板10,本发明还提供一种含有上述阵列基板10的In Cell触控显示面板,包括阵列基板10、与所述阵列基板10相对设置的彩膜基板20、及位于所述阵列基板10与彩膜基板20之间的液晶层30;
所述阵列基板10的结构如上文所述,此处不再赘述。
具体的,所述彩膜基板20包括第二基板21、设于所述第二基板21上的黑色矩阵22、设于所述黑色矩阵22与第二基板21上的色阻层23、设于所述色阻层23上的第三平坦层24、及设于所述第三平坦层24上的主隔垫物251,所述主隔垫物251与所述阵列基板10表面的钝化层81相接触。
优选的,所述彩膜基板20还包括与所述主隔垫物251位于同一层的次隔垫物252,所述次隔垫物252的高度低于所述主隔垫物251的高度,使所述次隔垫物252与所述阵列基板10的表面之间形成有间隙。
具体的,所述第二基板21为玻璃基板。
具体的,所述色阻层23包括红色色阻231、绿色色阻232、及蓝色色阻233。
本发明的In Cell触控显示面板,含有上述阵列基板10,所述阵列基板10的表面比较平坦,能够避免因彩膜基板20上的隔垫物滑动造成液晶盒塌陷或者配向膜刮伤的情况,提升显示品质,同时生产成本低。
综上所述,本发明提供一种阵列基板及其制作方法与In Cell触控显示面板。本发明的阵列基板,通过在源/漏极、数据线与第三绝缘层上依次形成第一平坦层、触控信号层、第二平坦层、公共电极、钝化层、及像素电 极,这种架构使得触控信号层位于第二平坦层下方,不会出现阵列基板表面对应于触控信号层的区域形成凸起的情况,所述阵列基板的表面比较平坦,能够避免因隔垫物滑动造成液晶盒塌陷或者配向膜刮伤的情况,提升显示品质;同时将现有的阵列基板中的三道钝化层减少为一道钝化层,从而简化制程,降低制程成本。本发明的阵列基板的制作方法,制得的阵列基板表面比较平坦,显示品质好,且制程简单,制程成本低。本发明的In Cell触控显示面板,显示品质好,同时生产成本低。
以上所述,对于本领域的普通技术人员来说,可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形,而所有这些改变和变形都应属于本发明后附的权利要求的保护范围。

Claims (10)

  1. 一种阵列基板,包括第一基板、设于所述第一基板上的遮光层、设于所述第一基板与遮光层上的第一绝缘层、设于所述第一绝缘层上的有源层、设于所述第一绝缘层与有源层上的第二绝缘层、设于所述第二绝缘层上的栅极、设于所述栅极与第二绝缘层上的第三绝缘层、设于所述第三绝缘层上的源/漏极与数据线、设于所述源/漏极、数据线与第三绝缘层上的第一平坦层、设于所述第一平坦层上的触控信号层、设于所述触控信号层与第一平坦层上的第二平坦层、设于所述第二平坦层上的公共电极、设于所述公共电极与第二平坦层上的钝化层、及设于所述钝化层上的像素电极;
    所述钝化层、第一平坦层与第二平坦层上设有第一过孔,所述像素电极通过所述第一过孔与源/漏极相接触;所述第二平坦层上设有第二过孔,所述公共电极通过所述第二过孔与触控信号层相接触。
  2. 如权利要求1所述的阵列基板,其中,所述有源层为多晶硅层。
  3. 如权利要求1所述的阵列基板,其中,所述遮光层在水平方向上完全遮盖所述有源层。
  4. 如权利要求1所述的阵列基板,其中,所述第二过孔对应于所述数据线上方设置。
  5. 如权利要求1所述的阵列基板,其中,所述遮光层的材料为金属;所述触控信号层的材料为金属。
  6. 一种如权利要求1所述的阵列基板的制作方法,包括如下步骤:
    步骤1、提供第一基板,在所述第一基板上从下到上依次形成遮光层、第一绝缘层、有源层、第二绝缘层、栅极、第三绝缘层、及源/漏极与数据线;
    步骤2、在所述源/漏极、数据线与第三绝缘层上形成第一平坦层,在所述第一平坦层上形成触控信号层,在所述触控信号层与第一平坦层上形成第二平坦层;
    采用一道光刻制程对第二平坦层与第一平坦层进行蚀刻,在所述第二平坦层与第一平坦层上形成对应于所述源/漏极上方的第一通孔,同时在所述第二平坦层上形成对应于所述触控信号层上方的第二过孔;
    步骤3、在所述第二平坦层上形成公共电极,所述公共电极通过所述第二过孔与触控信号层相接触;
    步骤4、在所述公共电极与第二平坦层上形成钝化层,采用一道光刻制 程对钝化层进行蚀刻,形成与所述第一通孔相贯通的第二通孔,所述第二通孔与第一通孔共同构成第一过孔;
    步骤5、在所述钝化层上形成像素电极,所述像素电极通过所述第一过孔与源/漏极相接触。
  7. 一种In Cell触控显示面板,包括阵列基板、与所述阵列基板相对设置的彩膜基板、及位于所述阵列基板与彩膜基板之间的液晶层;
    所述阵列基板为如权利要求1所述的阵列基板。
  8. 如权利要求7所述的In Cell触控显示面板,其中,所述彩膜基板包括第二基板、设于所述第二基板上的黑色矩阵、设于所述黑色矩阵与第二基板上的色阻层、设于所述色阻层上的第三平坦层、及设于所述第三平坦层上的主隔垫物,所述主隔垫物与所述阵列基板表面的钝化层相接触。
  9. 如权利要求7所述的In Cell触控显示面板,其中,所述彩膜基板还包括与所述主隔垫物位于同一层的次隔垫物,所述次隔垫物的高度低于主隔垫物的高度。
  10. 如权利要求7所述的In Cell触控显示面板,其中,所述第二基板为玻璃基板;所述色阻层包括红色色阻、绿色色阻、及蓝色色阻。
PCT/CN2017/076774 2017-02-17 2017-03-15 阵列基板及其制作方法与In Cell触控显示面板 WO2018149010A1 (zh)

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