WO2016145708A1 - Coa型液晶面板的制作方法及coa型液晶面板 - Google Patents

Coa型液晶面板的制作方法及coa型液晶面板 Download PDF

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Publication number
WO2016145708A1
WO2016145708A1 PCT/CN2015/077155 CN2015077155W WO2016145708A1 WO 2016145708 A1 WO2016145708 A1 WO 2016145708A1 CN 2015077155 W CN2015077155 W CN 2015077155W WO 2016145708 A1 WO2016145708 A1 WO 2016145708A1
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Prior art keywords
layer
pixel electrode
electrode layer
disposed
liquid crystal
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PCT/CN2015/077155
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English (en)
French (fr)
Inventor
徐洪远
孙博
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深圳市华星光电技术有限公司
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Priority to US14/758,564 priority Critical patent/US9638975B2/en
Publication of WO2016145708A1 publication Critical patent/WO2016145708A1/zh

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    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136227Through-hole connection of the pixel electrode to the active element through an insulation layer
    • GPHYSICS
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    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
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    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
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    • G02F1/1368Active matrix addressed cells in which the switching element is a three-electrode device
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    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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    • G02F1/136286Wiring, e.g. gate line, drain line
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    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
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Definitions

  • the present invention relates to the field of display technologies, and in particular, to a method for fabricating a COA liquid crystal panel and a COA liquid crystal panel.
  • LCD Liquid crystal display
  • PDA personal digital assistant
  • digital camera computer screen or laptop screen.
  • a liquid crystal display device includes a housing, a liquid crystal panel disposed in the housing, and a backlight module disposed in the housing.
  • the structure of the liquid crystal panel is mainly composed of a Thin Film Transistor Array Substrate (TFT Array Substrate), a color filter substrate (Color Filter, CF), and a liquid crystal layer disposed between the two substrates (Liquid).
  • the crystal layer is constructed by controlling the rotation of the liquid crystal molecules of the liquid crystal layer by applying a driving voltage on the two glass substrates, and refracting the light of the backlight module to produce a picture.
  • COA Color filter On Array
  • the COA structure reduces the coupling of the pixel electrode and the metal trace, and the delay condition of the signal on the metal line is improved.
  • the COA structure can significantly reduce the size of the parasitic capacitance, increase the panel aperture ratio, and improve the panel display quality.
  • the color resist layer forms red, green, and blue blocking blocks corresponding to the red, green, and blue sub-pixel regions, respectively, and a certain degree is generated between adjacent color blocking blocks during the process.
  • the liquid crystal above the junction area may be reversed due to the difference in topography. Therefore, it is necessary to block the black matrix (Black Matrix, BM) on the side of the glass substrate, but a large area of black matrix will be set. A large part of the aperture ratio is lost.
  • Black Matrix, BM Black Matrix
  • An object of the present invention is to provide a method for fabricating a COA type liquid crystal panel, which can simplify the process and increase the aperture ratio.
  • Another object of the present invention is to provide a COA type liquid crystal panel which has a simple structure, a high aperture ratio, and low energy consumption.
  • the present invention provides a method for fabricating a COA type liquid crystal panel, comprising the following steps:
  • Step 1 Providing an array substrate and a glass substrate
  • the array substrate includes red, green, and blue sub-pixel regions, and each sub-pixel region includes a substrate, a gate and a scan line disposed on the substrate, and a gate disposed on the gate to cover the substrate.
  • Step 2 forming a color resist layer on the passivation layer
  • the color resist layer forms red, green, and blue blocking blocks corresponding to the red, green, and blue sub-pixel regions, respectively, and a first intersection region is formed between adjacent two color blocking blocks arranged laterally, the first The intersection area is located above the signal line, a second interface area is formed between adjacent two color block blocks arranged longitudinally, and the second interface area is located above the scan line;
  • Step 3 forming a first via hole on the color resist layer corresponding to the source/drain, and forming a first pixel electrode layer on the color resist layer;
  • the first pixel electrode layer is in contact with the source/drain via the first via;
  • Step 4 forming a flat layer on the first pixel electrode layer, and forming a second via hole on the flat layer;
  • Step 5 depositing and patterning a second pixel electrode layer on the flat layer
  • the second pixel electrode layer is in contact with the first pixel electrode layer via the second via hole, and the second pixel electrode layer includes pixel electrode blocks respectively located in each sub-pixel region, the pixel electrode block a lateral boundary is above the scan line, and a longitudinal boundary is above the signal line;
  • Step 6 forming a dot black matrix on the glass substrate corresponding to the position of the semiconductor layer, and forming a common electrode layer on the black matrix;
  • Step 7 Align the array substrate with the glass substrate and fill the liquid crystal layer.
  • the step 2 forms a color resist layer by a coating process.
  • the step 4 forms the second via hole by an exposure process, and the flat layer is a transparent organic material.
  • the step 5 forms the second pixel electrode layer by physical vapor deposition.
  • the materials of the first pixel electrode layer, the second pixel electrode layer, and the common electrode layer are all indium tin oxide.
  • the present invention also provides a COA type liquid crystal panel, comprising an array substrate, a glass substrate disposed opposite to the array substrate, and a liquid crystal layer between the array substrate and the glass substrate;
  • the array substrate includes red, green, and blue sub-pixel regions, and each sub-pixel region includes a base. a gate, a scan line disposed on the substrate, a gate insulating layer covering the substrate on the gate, a semiconductor disposed on the gate insulating layer and corresponding to the gate a layer, a source/drain provided on the gate insulating layer in contact with both ends of the semiconductor layer, and a signal line disposed on the gate insulating layer and vertically crossing the scan line in a horizontal direction a passivation layer covering the gate insulating layer on the source/drain, a color resist layer disposed on the passivation layer, a first pixel electrode layer disposed on the color resist layer, a flat layer disposed on the first pixel electrode layer and a second pixel electrode layer disposed on the flat layer;
  • a first via hole is disposed on the color resist layer and the passivation layer corresponding to the source/drain, and a second via is disposed on the flat layer, and the first pixel electrode layer is via the first a via is in contact with the source/drain, and the second pixel electrode layer is in contact with the first pixel electrode layer via the second via;
  • the color resist layer forms red, green, and blue blocking blocks corresponding to the red, green, and blue sub-pixel regions, respectively, and a first intersection region is formed between adjacent two color blocking blocks arranged laterally, the first The intersection area is located above the signal line, and a second interface area is formed between adjacent two color block blocks arranged longitudinally, the second interface area is located above the scan line; and the second pixel electrode layer is respectively located a pixel electrode block of each sub-pixel region, a lateral boundary of the pixel electrode block being above the scan line, and a longitudinal boundary being above the signal line.
  • the flat layer is a transparent organic material.
  • a dot-shaped black matrix is disposed on the glass substrate at a position corresponding to the semiconductor layer, and a common electrode layer is disposed on the black matrix.
  • the materials of the first pixel electrode layer, the second pixel electrode layer, and the common electrode layer are all indium tin oxide.
  • the material of the source/drain, the gate, the scan line, and the signal line is iron, molybdenum or copper.
  • the present invention also provides a COA type liquid crystal panel, comprising an array substrate, a glass substrate disposed opposite to the array substrate, and a liquid crystal layer between the array substrate and the glass substrate;
  • the array substrate includes red, green, and blue sub-pixel regions, and each sub-pixel region includes a substrate, a gate and a scan line disposed on the substrate, and a gate disposed on the gate to cover the substrate.
  • a first via hole is disposed on the color resist layer and the passivation layer corresponding to the source/drain.
  • a second via is disposed on the flat layer, the first pixel electrode layer is in contact with the source/drain via the first via, and the second pixel electrode is via the second via The first pixel electrode layer is in contact with each other;
  • the color resist layer forms red, green, and blue blocking blocks corresponding to the red, green, and blue sub-pixel regions, respectively, and a first intersection region is formed between adjacent two color blocking blocks arranged laterally, the first The intersection area is located above the signal line, and a second interface area is formed between adjacent two color block blocks arranged longitudinally, the second interface area is located above the scan line; and the second pixel electrode layer is respectively located a pixel electrode block of each sub-pixel region, a lateral boundary of the pixel electrode block is above the scan line, and a longitudinal boundary is above the signal line;
  • the flat layer is a transparent organic material
  • the material of the source/drain, the gate, the scan line, and the signal line is iron, molybdenum or copper.
  • the method for fabricating a COA type liquid crystal panel of the present invention and the COA type liquid crystal panel by forming a first pixel electrode layer on the color resist layer, forming a flat layer on the first pixel electrode layer, and in a flat layer Forming a second pixel electrode layer in contact with the first pixel electrode layer to maximize the planarization of the pixel electrode layer, and the second pixel electrode layer is located above the scan line at a lateral boundary of the pixel electrode block of each sub-pixel region
  • the vertical boundary is located above the signal line, and the scanning line and the signal line can be self-shielded, the horizontal and vertical black matrices are omitted, and the dot position is performed by placing a dot black matrix on the TFT on the corresponding array substrate of the glass substrate. Shading, which simplifies the process and increases the aperture ratio.
  • FIG. 1 is a flow chart of a method for fabricating a COA type liquid crystal panel of the present invention
  • step 1 is a schematic diagram of step 1 of a method for fabricating a COA liquid crystal panel of the present invention
  • step 2 is a schematic diagram of step 2 of a method for fabricating a COA liquid crystal panel of the present invention
  • FIG. 4 is a schematic view showing a step 3 of a method for fabricating a COA liquid crystal panel of the present invention
  • step 4 is a schematic diagram of step 4 of a method for fabricating a COA liquid crystal panel of the present invention
  • FIG. 6 is a schematic view showing a step 5 of a method for fabricating a COA type liquid crystal panel according to the present invention.
  • step 6 is a schematic diagram of step 6 of a method for fabricating a COA type liquid crystal panel according to the present invention.
  • FIG. 8 is a schematic view showing the step 7 of the method for fabricating a COA liquid crystal panel of the present invention and a schematic cross-sectional view of the COA liquid crystal panel of the present invention.
  • the present invention provides a method for fabricating a COA type liquid crystal panel, comprising the following steps:
  • Step 1 As shown in FIG. 2, the array substrate 1 and the glass substrate 2 are provided.
  • the array substrate 1 includes red, green, and blue sub-pixel regions, and each sub-pixel region includes a substrate 11 , a gate electrode 12 disposed on the substrate 11 , and a scan line disposed on the gate electrode 12 .
  • a gate insulating layer 13 covering the substrate 11 , a semiconductor layer 14 disposed on the gate insulating layer 13 above the gate electrode 12 , and a semiconductor layer 14 disposed on the gate insulating layer 13 and the semiconductor layer a source/drain 16 contacted at both ends of the 14 , a signal line 15 disposed on the gate insulating layer 13 and vertically intersecting the scan line in a horizontal direction, and a source line 16 disposed on the source/drain 16
  • the passivation layer 17 of the gate insulating layer 13 is covered.
  • the material of the source/drain 16, the gate 12, the signal line 15, and the scan line is a metal material such as iron, molybdenum or copper.
  • Step 2 As shown in FIG. 3, a color resist layer 18 is formed on the passivation layer 17.
  • the color resist layer 18 is formed using a coating process.
  • the color resist layer 18 forms red, green, and blue blocking blocks respectively corresponding to the red, green, and blue sub-pixel regions, and a first intersection region 83 is formed between the adjacent two color blocking blocks arranged laterally.
  • the first interface area 83 is located above the signal line 15
  • a second interface area is formed between adjacent two color block blocks arranged longitudinally, and the second interface area is located above the scan line, thereby implementing scan lines and signals.
  • the line is self-shielded, omitting the black matrix in the horizontal and vertical directions.
  • Step 3 as shown in FIG. 4, a first via 81 is formed on the color resist layer 18 corresponding to the source/drain 16 and a first pixel electrode layer 19 is formed on the color resist layer 18. .
  • the first pixel electrode layer 19 is in contact with the source/drain 16 via the first via 81.
  • Step 4 as shown in FIG. 5, a flat layer 21 is formed on the first pixel electrode layer 19, and a second via hole 82 is formed on the flat layer 21.
  • the second via 82 is formed by an exposure process, and the planar layer 21 is a transparent organic material.
  • Step 5 depositing and patterning a second pixel electrode on the flat layer 21 Layer 23.
  • the second pixel electrode layer 23 is in contact with the first pixel electrode layer 19 via the second via hole 82, and the second pixel electrode layer 23 includes pixel electrode blocks respectively located in each sub-pixel region, A lateral boundary of the pixel electrode block is above the scan line, and a longitudinal boundary is above the signal line 15.
  • the second pixel electrode layer 23 is formed by a physical vapor deposition (PVD) method.
  • PVD physical vapor deposition
  • Step 6 as shown in FIG. 7, a dot-shaped black matrix 24 is formed on the glass substrate 2 at a position corresponding to the semiconductor layer 14, and a common electrode layer 25 is formed on the black matrix 24.
  • the materials of the first pixel electrode layer 19, the second pixel electrode layer 23, and the common electrode layer 25 are all indium tin oxide (ITO).
  • Step 7 As shown in FIG. 8, the array substrate 1 and the glass substrate 2 are paired and poured into the liquid crystal layer 3.
  • the TFT channel position of the array substrate 1 can be shielded by the dot black matrix 24 after the pair.
  • a first pixel electrode layer is formed on the color resist layer, a flat layer is formed on the first pixel electrode layer, and a second contact with the first pixel electrode layer is formed on the flat layer
  • the pixel electrode layer realizes maximum planarization of the pixel electrode layer, and the second pixel electrode layer is located above the scan line at a lateral boundary of the pixel electrode block of each sub-pixel region, and the vertical boundary is located above the signal line, and the scan line and the scan line can be realized.
  • the signal line is self-shielded, omitting the black matrix in the horizontal and vertical directions, and the dot position black matrix is disposed on the TFT on the corresponding substrate of the glass substrate to shield the channel position, thereby simplifying the process and increasing the aperture ratio.
  • the present invention further provides a COA type liquid crystal panel including an array substrate 1 , a glass substrate 2 disposed opposite to the array substrate 1 , and a liquid crystal layer between the array substrate 1 and the glass substrate 2 . 3.
  • the array substrate 1 includes red, green, and blue sub-pixel regions, and each sub-pixel region includes a substrate 11 , a gate electrode 12 disposed on the substrate 11 , and a scan line disposed on the gate electrode 12 .
  • a gate insulating layer 13 covering the substrate 11 , a semiconductor layer 14 disposed on the gate insulating layer 13 above the gate electrode 12 , and a semiconductor layer 14 disposed on the gate insulating layer 13 and the semiconductor layer a source/drain 16 which is in contact with both ends of the 14 and a signal line 15 which is disposed on the gate insulating layer 13 and vertically intersects with the scanning line in a horizontal direction, and is disposed on the source/drain 16 a passivation layer 17 of the gate insulating layer 13 , a color resist layer 18 disposed on the passivation layer 17 , and a first pixel electrode layer 19 disposed on the color resist layer 18 A flat layer 21 on the one-pixel electrode layer 19 and a second pixel electrode layer 23 provided on the flat layer 21.
  • the material of the source/drain 16, the gate 12, the signal line 15, and the scan line is iron, Metal materials such as molybdenum or copper.
  • a first via 81 is disposed on the color resist layer 18 and the passivation layer 17 corresponding to the source/drain 16
  • a second via 82 is disposed on the flat layer 21 , the first pixel The electrode layer 19 is in contact with the source/drain 16 via the first via 81, and the second pixel electrode layer 23 is in contact with the first pixel electrode layer 19 via the second via 82;
  • the color resist layer 18 forms red, green, and blue blocking blocks respectively corresponding to the red, green, and blue sub-pixel regions, and a first intersection region 83 is formed between the adjacent two color blocking blocks arranged laterally.
  • the first interface area 83 is located above the signal line 15
  • a second interface area is formed between adjacent two color block blocks arranged longitudinally, the second interface area is located above the scan line; the second pixel electrode
  • the layer 23 includes pixel electrode blocks respectively located in respective sub-pixel regions, the lateral boundaries of the pixel electrode blocks being above the scan lines, and the longitudinal boundaries being above the signal lines 15.
  • the flat layer 21 is a transparent organic material.
  • a dot-shaped black matrix 24 is disposed on the glass substrate 2 at a position corresponding to the semiconductor layer 14, and the common electrode layer 25 is disposed on the black matrix 24.
  • the TFT channel position of the array substrate 1 can be shielded by the dot black matrix 24.
  • the materials of the first pixel electrode layer 19, the second pixel electrode layer 23, and the common electrode layer 25 are all indium tin oxide.
  • a first pixel electrode layer is disposed on the color resist layer, a flat layer is disposed on the first pixel electrode layer, and a second pixel electrode layer is formed on the flat layer in contact with the first pixel electrode layer.
  • the pixel electrode layer is maximized in planarization, and the second pixel electrode layer is located above the scan line at a lateral boundary of the pixel electrode block of each sub-pixel region, and the vertical boundary is located above the signal line, and the scan line and the signal line can be realized.
  • the light-shielding omits the black matrix in the horizontal and vertical directions, and the glass substrate is provided with a dot-like black matrix corresponding to the TFT on the array substrate, and the channel position is shielded from light, the structure is simple, the aperture ratio is high, and the energy consumption is low.
  • the method for fabricating a COA type liquid crystal panel of the present invention and the COA type liquid crystal panel form a flat layer on the first pixel electrode layer by forming a first pixel electrode layer on the color resist layer, and on the flat layer Forming a second pixel electrode layer in contact with the first pixel electrode layer to maximize the planarization of the pixel electrode layer, and the second pixel electrode layer is located above the scan line at a lateral boundary of the pixel electrode block of each sub-pixel region.
  • the longitudinal boundary is located above the signal line, and the scanning line and the signal line can be self-shielded, and the horizontal and vertical black matrices are omitted, and the channel position can be set by placing a dot black matrix on the TFT on the corresponding array substrate of the glass substrate. Shading, which simplifies the process and increases the aperture ratio.

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Abstract

一种COA型液晶面板的制作方法及COA型液晶面板,该方法通过在色阻层(18)上形成第一像素电极层(19),在第一像素电极层(19)上形成平坦层(21),并在平坦层(21)上形成与第一像素电极层(19)相接触的第二像素电极层(23),使像素电极层实现最大程度的平坦化,且第二像素电极层(23)位于各子像素区域的像素电极块的横向边界位于扫描线(22)上方,纵向边界位于信号线(15)上方,实现扫描线(22)与信号线(15)自遮光,省略了横向与纵向的黑色矩阵,并可通过在玻璃基板(2)对应阵列基板(1)上的TFT处设置点状黑色矩阵,对沟道位置进行遮光,从而实现简化制程,提高开口率。

Description

COA型液晶面板的制作方法及COA型液晶面板 技术领域
本发明涉及显示技术领域,尤其涉及一种COA型液晶面板的制作方法及COA型液晶面板。
背景技术
液晶显示装置(Liquid Crystal Display,LCD)具有机身薄、省电、无辐射等众多优点,得到了广泛的应用。如:液晶电视、移动电话、个人数字助理(PDA)、数字相机、计算机屏幕或笔记本电脑屏幕等。
通常液晶显示装置包括壳体、设于壳体内的液晶面板及设于壳体内的背光模组(Backlight module)。其中,液晶面板的结构主要是由一薄膜晶体管阵列基板(Thin Film Transistor Array Substrate,TFT Array Substrate)、一彩色滤光片基板(Color Filter,CF)、以及配置于两基板间的液晶层(Liquid Crystal Layer)所构成,其工作原理是通过在两片玻璃基板上施加驱动电压来控制液晶层的液晶分子的旋转,将背光模组的光线折射出来产生画面。
COA(Color filter On Array)是一种将CF基板上的色阻层制备于阵列基板上的技术,COA结构因减小了像素电极与金属走线的耦合,金属线上信号的延迟状况得到改善。COA结构可明显减小寄生电容大小,并提高面板开口率,改善面板显示品质。
但是,在现有COA型液晶面板中,色阻层对应红、绿、蓝色子像素区域分别形成红、绿、蓝色阻块,相邻色阻块之间在制程过程中会产生一定程度的交接区域,交接区域上方的液晶会因地形差异而出现倒向错乱,因而需要在玻璃基板一侧用很大一块面积的黑色矩阵(Black Matrix,BM)遮挡,但设置大面积的黑色矩阵会损失掉很大一部分的开口率。
发明内容
本发明的目的在于提供一种COA型液晶面板的制作方法,可简化制程,提高开口率。
本发明的另一目的在于提供一种COA型液晶面板,结构简单,开口率高,能耗较低。
为实现上述目的,本发明提供一种COA型液晶面板的制作方法,包括如下步骤:
步骤1、提供阵列基板与玻璃基板;
所述阵列基板包括红、绿、蓝色子像素区域,每一子像素区域包括基板、设于所述基板上的栅极及扫描线、设于所述栅极上覆盖所述基板的栅极绝缘层、设于所述栅极绝缘层上且对应所述栅极设置的半导体层、设于所述栅极绝缘层上与所述半导体层的两端相接触的源/漏极、设于所述栅极绝缘层上且在水平方向上与扫描线垂直交叉排列的信号线、及设于所述源/漏极上覆盖所述栅极绝缘层的钝化层;
步骤2、在所述钝化层上形成色阻层;
所述色阻层对应所述红、绿、蓝色子像素区域分别形成红、绿、蓝色阻块,横向排列的相邻的两色阻块之间形成第一交接区域,所述第一交接区域位于所述信号线上方,纵向排列的相邻的两色阻块之间形成第二交接区域,所述第二交接区域位于所述扫描线上方;
步骤3、在所述色阻层上对应所述源/漏极的上方形成第一过孔,并在所述色阻层上形成第一像素电极层;
所述第一像素电极层经由所述第一过孔与所述源/漏极相接触;
步骤4、在所述第一像素电极层上形成平坦层,并在所述平坦层上形成第二过孔;
步骤5、在所述平坦层上沉积并图案化第二像素电极层;
所述第二像素电极层经由所述第二过孔与所述第一像素电极层相接触,所述第二像素电极层包括分别位于各子像素区域的像素电极块,所述像素电极块的横向边界位于所述扫描线上方,纵向边界位于所述信号线上方;
步骤6、在所述玻璃基板上对应所述半导体层的位置形成点状黑色矩阵,并在所述黑色矩阵上形成公共电极层;
步骤7、将所述阵列基板与玻璃基板对组,并灌入液晶层。
所述步骤2采用涂布制程形成所述色阻层。
所述步骤4通过曝光制程形成所述第二过孔,所述平坦层为透明有机材料。
所述步骤5采用物理气相沉积法形成所述第二像素电极层。
所述第一像素电极层、第二像素电极层、及公共电极层的材料均为氧化铟锡。
本发明还提供一种COA型液晶面板,包括阵列基板、与所述阵列基板相对设置的玻璃基板、及位于所述阵列基板与玻璃基板之间的液晶层;
所述阵列基板包括红、绿、蓝色子像素区域,每一子像素区域包括基 板、设于所述基板上的栅极及扫描线、设于所述栅极上覆盖所述基板的栅极绝缘层、设于所述栅极绝缘层上且对应所述栅极设置的半导体层、设于所述栅极绝缘层上与所述半导体层的两端相接触的源/漏极、设于所述栅极绝缘层上且在水平方向上与扫描线垂直交叉排列的信号线、设于所述源/漏极上覆盖所述栅极绝缘层的钝化层、设于所述钝化层上的色阻层、设于所述色阻层上的第一像素电极层、设于所述第一像素电极层上的平坦层、及设于所述平坦层上的第二像素电极层;
所述色阻层、及钝化层上对应所述源/漏极的上方设有第一过孔,所述平坦层上设有第二过孔,所述第一像素电极层经由所述第一过孔与所述源/漏极相接触,所述第二像素电极层经由所述第二过孔与所述第一像素电极层相接触;
所述色阻层对应所述红、绿、蓝色子像素区域分别形成红、绿、蓝色阻块,横向排列的相邻的两色阻块之间形成第一交接区域,所述第一交接区域位于所述信号线上方,纵向排列的相邻的两色阻块之间形成第二交接区域,所述第二交接区域位于所述扫描线上方;所述第二像素电极层包括分别位于各子像素区域的像素电极块,所述像素电极块的横向边界位于所述扫描线上方,纵向边界位于所述信号线上方。
所述平坦层为透明有机材料。
所述玻璃基板上对应所述半导体层的位置设有点状黑色矩阵,所述黑色矩阵上设有公共电极层。
所述第一像素电极层、第二像素电极层、及公共电极层的材料均为氧化铟锡。
所述源/漏极、栅极、扫描线、及信号线的材料为铁、钼或铜。
本发明还提供一种COA型液晶面板,包括阵列基板、与所述阵列基板相对设置的玻璃基板、及位于所述阵列基板与玻璃基板之间的液晶层;
所述阵列基板包括红、绿、蓝色子像素区域,每一子像素区域包括基板、设于所述基板上的栅极及扫描线、设于所述栅极上覆盖所述基板的栅极绝缘层、设于所述栅极绝缘层上且对应所述栅极设置的半导体层、设于所述栅极绝缘层上与所述半导体层的两端相接触的源/漏极、设于所述栅极绝缘层上且在水平方向上与扫描线垂直交叉排列的信号线、设于所述源/漏极上覆盖所述栅极绝缘层的钝化层、设于所述钝化层上的色阻层、设于所述色阻层上的第一像素电极层、设于所述第一像素电极层上的平坦层、及设于所述平坦层上的第二像素电极层;
所述色阻层、及钝化层上对应所述源/漏极的上方设有第一过孔,所述 平坦层上设有第二过孔,所述第一像素电极层经由所述第一过孔与所述源/漏极相接触,所述第二像素电极层经由所述第二过孔与所述第一像素电极层相接触;
所述色阻层对应所述红、绿、蓝色子像素区域分别形成红、绿、蓝色阻块,横向排列的相邻的两色阻块之间形成第一交接区域,所述第一交接区域位于所述信号线上方,纵向排列的相邻的两色阻块之间形成第二交接区域,所述第二交接区域位于所述扫描线上方;所述第二像素电极层包括分别位于各子像素区域的像素电极块,所述像素电极块的横向边界位于所述扫描线上方,纵向边界位于所述信号线上方;
其中,所述平坦层为透明有机材料;
其中,所述源/漏极、栅极、扫描线、及信号线的材料为铁、钼或铜。
本发明的有益效果:本发明的COA型液晶面板的制作方法及COA型液晶面板,通过在色阻层上形成第一像素电极层,在第一像素电极层上形成平坦层,并在平坦层上形成与第一像素电极层相接触的第二像素电极层,使像素电极层实现最大程度的平坦化,且第二像素电极层位于各子像素区域的像素电极块的横向边界位于扫描线上方,纵向边界位于信号线上方,可实现扫描线与信号线自遮光,省略了横向与纵向的黑色矩阵,并通过在玻璃基板对应阵列基板上的TFT处设置点状黑色矩阵,对沟道位置进行遮光,从而简化制程,提高开口率。
为了能更进一步了解本发明的特征以及技术内容,请参阅以下有关本发明的详细说明与附图,然而附图仅提供参考与说明用,并非用来对本发明加以限制。
附图说明
下面结合附图,通过对本发明的具体实施方式详细描述,将使本发明的技术方案及其他有益效果显而易见。
附图中,
图1为本发明COA型液晶面板的制作方法的流程图;
图2为本发明COA型液晶面板的制作方法的步骤1的示意图;
图3为本发明COA型液晶面板的制作方法的步骤2的示意图;
图4为本发明COA型液晶面板的制作方法的步骤3的示意图;
图5为本发明COA型液晶面板的制作方法的步骤4的示意图;
图6为本发明COA型液晶面板的制作方法的步骤5的示意图;
图7为本发明COA型液晶面板的制作方法的步骤6的示意图;
图8为本发明COA型液晶面板的制作方法的步骤7的示意图暨本发明COA型液晶面板的剖面示意图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果,以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图1,本发明提供一种COA型液晶面板的制作方法,包括如下步骤:
步骤1、如图2所示,提供阵列基板1与玻璃基板2。
具体地,所述阵列基板1包括红、绿、蓝色子像素区域,每一子像素区域包括基板11、设于所述基板11上的栅极12及扫描线、设于所述栅极12上覆盖所述基板11的栅极绝缘层13、位于所述栅极12上方设于所述栅极绝缘层13上的半导体层14、设于所述栅极绝缘层13上与所述半导体层14的两端相接触的源/漏极16、设于所述栅极绝缘层13上且在水平方向上与扫描线垂直交叉排列的信号线15、及设于所述源/漏极16上覆盖所述栅极绝缘层13的钝化层17。
具体地,所述源/漏极16、栅极12、信号线15、及扫描线的材料为铁、钼或铜等金属材料。
步骤2、如图3所示,在所述钝化层17上形成色阻层18。
具体地,采用涂布制程形成所述色阻层18。所述色阻层18对应所述红、绿、蓝色子像素区域分别形成红、绿、蓝色阻块,横向排列的相邻的两色阻块之间形成第一交接区域83,所述第一交接区域83位于所述信号线15上方,纵向排列的相邻的两色阻块之间形成第二交接区域,所述第二交接区域位于所述扫描线上方,从而实现扫描线与信号线自遮光,省略了横向与纵向的黑色矩阵。
步骤3、如图4所示,在所述色阻层18上对应所述源/漏极16的上方形成第一过孔81,并在所述色阻层18上形成第一像素电极层19。
所述第一像素电极层19经由所述第一过孔81与所述源/漏极16相接触。
步骤4、如图5所示,在所述第一像素电极层19上形成平坦层21,并在所述平坦层21上形成第二过孔82。
具体地,通过曝光制程形成所述第二过孔82,所述平坦层21为透明有机材料。
步骤5、如图6所示,在所述平坦层21上沉积并图案化第二像素电极 层23。
所述第二像素电极层23经由所述第二过孔82与所述第一像素电极层19相接触,所述第二像素电极层23包括分别位于各子像素区域的像素电极块,所述像素电极块的横向边界位于所述扫描线上方,纵向边界位于所述信号线15上方。
具体地,采用物理气相沉积(PVD)法形成所述第二像素电极层23。
步骤6、如图7所示,在所述玻璃基板2上对应所述半导体层14的位置形成点状黑色矩阵24,并在所述黑色矩阵24上形成公共电极层25。
具体地,所述第一像素电极层19、第二像素电极层23、及公共电极层25的材料均为氧化铟锡(ITO)。
步骤7、如图8所示,将所述阵列基板1与玻璃基板2对组,并灌入液晶层3。
具体地,对组后可通过所述点状黑色矩阵24,对阵列基板1的TFT沟道位置进行遮光。
上述COA型液晶面板的制作方法,通过在色阻层上形成第一像素电极层,在第一像素电极层上形成平坦层,并在平坦层上形成与第一像素电极层相接触的第二像素电极层,使像素电极层实现最大程度的平坦化,且第二像素电极层位于各子像素区域的像素电极块的横向边界位于扫描线上方,纵向边界位于信号线上方,可实现扫描线与信号线自遮光,省略了横向与纵向的黑色矩阵,并可通过在玻璃基板对应阵列基板上的TFT处设置点状黑色矩阵,对沟道位置进行遮光,从而简化制程,提高开口率。
请参阅图8,本发明还提供一种COA型液晶面板,包括阵列基板1、与所述阵列基板1相对设置的玻璃基板2、及位于所述阵列基板1与玻璃基板2之间的液晶层3。
具体地,所述阵列基板1包括红、绿、蓝色子像素区域,每一子像素区域包括基板11、设于所述基板11上的栅极12及扫描线、设于所述栅极12上覆盖所述基板11的栅极绝缘层13、位于所述栅极12上方设于所述栅极绝缘层13上的半导体层14、设于所述栅极绝缘层13上与所述半导体层14的两端相接触的源/漏极16、设于所述栅极绝缘层13上且在水平方向上与扫描线垂直交叉排列的信号线15、设于所述源/漏极16上覆盖所述栅极绝缘层13的钝化层17、设于所述钝化层17上的色阻层18、设于所述色阻层18上的第一像素电极层19、设于所述第一像素电极层19上的平坦层21、及设于所述平坦层21上的第二像素电极层23。
具体地,所述源/漏极16、栅极12、信号线15、及扫描线的材料为铁、 钼或铜等金属材料。
所述色阻层18、及钝化层17上对应所述源/漏极16的上方设有第一过孔81,所述平坦层21上设有第二过孔82,所述第一像素电极层19经由所述第一过孔81与所述源/漏极16相接触,所述第二像素电极层23经由所述第二过孔82与所述第一像素电极层19相接触;
所述色阻层18对应所述红、绿、蓝色子像素区域分别形成红、绿、蓝色阻块,横向排列的相邻的两色阻块之间形成第一交接区域83,所述第一交接区域83位于所述信号线15上方,纵向排列的相邻的两色阻块之间形成第二交接区域,所述第二交接区域位于所述扫描线上方;所述第二像素电极层23包括分别位于各子像素区域的像素电极块,所述像素电极块的横向边界位于所述扫描线上方,纵向边界位于所述信号线15上方。
具体地,所述平坦层21为透明有机材料。
所述玻璃基板2上对应所述半导体层14的位置设有点状黑色矩阵24,所述黑色矩阵24上设有公共电极层25。可通过所述点状黑色矩阵24,对阵列基板1的TFT沟道位置进行遮光。
具体地,所述第一像素电极层19、第二像素电极层23、及公共电极层25的材料均为氧化铟锡。
上述COA型液晶面板,在色阻层上设有第一像素电极层,在第一像素电极层上设有平坦层,平坦层上设有与第一像素电极层相接触的第二像素电极层,使像素电极层实现最大程度的平坦化,且第二像素电极层位于各子像素区域的像素电极块的横向边界位于扫描线上方,纵向边界位于信号线上方,可实现扫描线与信号线自遮光,省略了横向与纵向的黑色矩阵,同时玻璃基板对应阵列基板上的TFT处设有点状黑色矩阵,对沟道位置进行遮光,结构简单,开口率高,能耗较低。
综上所述,本发明的COA型液晶面板的制作方法及COA型液晶面板,通过在色阻层上形成第一像素电极层,在第一像素电极层上形成平坦层,并在平坦层上形成与第一像素电极层相接触的第二像素电极层,使像素电极层实现最大程度的平坦化,且第二像素电极层位于各子像素区域的像素电极块的横向边界位于扫描线上方,纵向边界位于信号线上方,可实现扫描线与信号线自遮光,省略了横向与纵向的黑色矩阵,并可通过在玻璃基板对应阵列基板上的TFT处设置点状黑色矩阵,对沟道位置进行遮光,从而简化制程,提高开口率。
以上所述,对于本领域的普通技术人员来说,可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形,而所有这些改变和变形 都应属于本发明后附的权利要求的保护范围。

Claims (13)

  1. 一种COA型液晶面板的制作方法,包括如下步骤:
    步骤1、提供阵列基板与玻璃基板;
    所述阵列基板包括红、绿、蓝色子像素区域,每一子像素区域包括基板、设于所述基板上的栅极及扫描线、设于所述栅极上覆盖所述基板的栅极绝缘层、设于所述栅极绝缘层上且对应所述栅极设置的半导体层、设于所述栅极绝缘层上与所述半导体层的两端相接触的源/漏极、设于所述栅极绝缘层上且在水平方向上与扫描线垂直交叉排列的信号线、及设于所述源/漏极上覆盖所述栅极绝缘层的钝化层;
    步骤2、在所述钝化层上形成色阻层;
    所述色阻层对应所述红、绿、蓝色子像素区域分别形成红、绿、蓝色阻块,横向排列的相邻的两色阻块之间形成第一交接区域,所述第一交接区域位于所述信号线上方,纵向排列的相邻的两色阻块之间形成第二交接区域,所述第二交接区域位于所述扫描线上方;
    步骤3、在所述色阻层上对应所述源/漏极的上方形成第一过孔,并在所述色阻层上形成第一像素电极层;
    所述第一像素电极层经由所述第一过孔与所述源/漏极相接触;
    步骤4、在所述第一像素电极层上形成平坦层,并在所述平坦层上形成第二过孔;
    步骤5、在所述平坦层上沉积并图案化第二像素电极层;
    所述第二像素电极层经由所述第二过孔与所述第一像素电极层相接触,所述第二像素电极层包括分别位于各子像素区域的像素电极块,所述像素电极块的横向边界位于所述扫描线上方,纵向边界位于所述信号线上方;
    步骤6、在所述玻璃基板上对应所述半导体层的位置形成点状黑色矩阵,并在所述黑色矩阵上形成公共电极层;
    步骤7、将所述阵列基板与玻璃基板对组,并灌入液晶层。
  2. 如权利要求1所述的COA型液晶面板的制作方法,其中,所述步骤2采用涂布制程形成所述色阻层。
  3. 如权利要求1所述的COA型液晶面板的制作方法,其中,所述步骤4通过曝光制程形成所述第二过孔,所述平坦层为透明有机材料。
  4. 如权利要求1所述的COA型液晶面板的制作方法,其中,所述步 骤5采用物理气相沉积法形成所述第二像素电极层。
  5. 如权利要求1所述的COA型液晶面板的制作方法,其中,所述第一像素电极层、第二像素电极层、及公共电极层的材料均为氧化铟锡。
  6. 一种COA型液晶面板,包括阵列基板、与所述阵列基板相对设置的玻璃基板、及位于所述阵列基板与玻璃基板之间的液晶层;
    所述阵列基板包括红、绿、蓝色子像素区域,每一子像素区域包括基板、设于所述基板上的栅极及扫描线、设于所述栅极上覆盖所述基板的栅极绝缘层、设于所述栅极绝缘层上且对应所述栅极设置的半导体层、设于所述栅极绝缘层上与所述半导体层的两端相接触的源/漏极、设于所述栅极绝缘层上且在水平方向上与扫描线垂直交叉排列的信号线、设于所述源/漏极上覆盖所述栅极绝缘层的钝化层、设于所述钝化层上的色阻层、设于所述色阻层上的第一像素电极层、设于所述第一像素电极层上的平坦层、及设于所述平坦层上的第二像素电极层;
    所述色阻层、及钝化层上对应所述源/漏极的上方设有第一过孔,所述平坦层上设有第二过孔,所述第一像素电极层经由所述第一过孔与所述源/漏极相接触,所述第二像素电极层经由所述第二过孔与所述第一像素电极层相接触;
    所述色阻层对应所述红、绿、蓝色子像素区域分别形成红、绿、蓝色阻块,横向排列的相邻的两色阻块之间形成第一交接区域,所述第一交接区域位于所述信号线上方,纵向排列的相邻的两色阻块之间形成第二交接区域,所述第二交接区域位于所述扫描线上方;所述第二像素电极层包括分别位于各子像素区域的像素电极块,所述像素电极块的横向边界位于所述扫描线上方,纵向边界位于所述信号线上方。
  7. 如权利要求6所述的COA型液晶面板,其中,所述平坦层为透明有机材料。
  8. 如权利要求6所述的COA型液晶面板,其中,所述玻璃基板上对应所述半导体层的位置设有点状黑色矩阵,所述黑色矩阵上设有公共电极层。
  9. 如权利要求8所述的COA型液晶面板,其中,所述第一像素电极层、第二像素电极层、及公共电极层的材料均为氧化铟锡。
  10. 如权利要求6所述的COA型液晶面板,其中,所述源/漏极、栅极、扫描线、及信号线的材料为铁、钼或铜。
  11. 一种COA型液晶面板,包括阵列基板、与所述阵列基板相对设置的玻璃基板、及位于所述阵列基板与玻璃基板之间的液晶层;
    所述阵列基板包括红、绿、蓝色子像素区域,每一子像素区域包括基板、设于所述基板上的栅极及扫描线、设于所述栅极上覆盖所述基板的栅极绝缘层、设于所述栅极绝缘层上且对应所述栅极设置的半导体层、设于所述栅极绝缘层上与所述半导体层的两端相接触的源/漏极、设于所述栅极绝缘层上且在水平方向上与扫描线垂直交叉排列的信号线、设于所述源/漏极上覆盖所述栅极绝缘层的钝化层、设于所述钝化层上的色阻层、设于所述色阻层上的第一像素电极层、设于所述第一像素电极层上的平坦层、及设于所述平坦层上的第二像素电极层;
    所述色阻层、及钝化层上对应所述源/漏极的上方设有第一过孔,所述平坦层上设有第二过孔,所述第一像素电极层经由所述第一过孔与所述源/漏极相接触,所述第二像素电极层经由所述第二过孔与所述第一像素电极层相接触;
    所述色阻层对应所述红、绿、蓝色子像素区域分别形成红、绿、蓝色阻块,横向排列的相邻的两色阻块之间形成第一交接区域,所述第一交接区域位于所述信号线上方,纵向排列的相邻的两色阻块之间形成第二交接区域,所述第二交接区域位于所述扫描线上方;所述第二像素电极层包括分别位于各子像素区域的像素电极块,所述像素电极块的横向边界位于所述扫描线上方,纵向边界位于所述信号线上方;
    其中,所述平坦层为透明有机材料;
    其中,所述源/漏极、栅极、扫描线、及信号线的材料为铁、钼或铜。
  12. 如权利要求11所述的COA型液晶面板,其中,所述玻璃基板上对应所述半导体层的位置设有点状黑色矩阵,所述黑色矩阵上设有公共电极层。
  13. 如权利要求12所述的COA型液晶面板,其中,所述第一像素电极层、第二像素电极层、及公共电极层的材料均为氧化铟锡。
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