WO2018141123A1 - 像素驱动架构及液晶显示面板 - Google Patents

像素驱动架构及液晶显示面板 Download PDF

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Publication number
WO2018141123A1
WO2018141123A1 PCT/CN2017/076775 CN2017076775W WO2018141123A1 WO 2018141123 A1 WO2018141123 A1 WO 2018141123A1 CN 2017076775 W CN2017076775 W CN 2017076775W WO 2018141123 A1 WO2018141123 A1 WO 2018141123A1
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sub
pixel
pixels
pixel group
polarity
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PCT/CN2017/076775
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English (en)
French (fr)
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应见见
杜鹏
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深圳市华星光电技术有限公司
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Priority to US15/517,161 priority Critical patent/US10338445B2/en
Publication of WO2018141123A1 publication Critical patent/WO2018141123A1/zh

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    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/1368Active matrix addressed cells in which the switching element is a three-electrode device
    • GPHYSICS
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    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
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    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
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    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
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    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/785Field effect transistors with field effect produced by an insulated gate having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78696Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/40Arrangements for improving the aperture ratio
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/52RGB geometrical arrangements
    • GPHYSICS
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    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/04Structural and physical details of display devices
    • G09G2300/0421Structural details of the set of electrodes
    • G09G2300/0426Layout of electrodes and connections
    • GPHYSICS
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    • GPHYSICS
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    • G09G2330/00Aspects of power supply; Aspects of display protection and defect management
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    • G09G2330/021Power management, e.g. power saving

Definitions

  • the present invention relates to the field of liquid crystal display technologies, and in particular, to a pixel driving architecture and a liquid crystal display panel.
  • LCD Liquid Crystal Display
  • advantages such as thin body, power saving, no radiation, etc., such as: LCD TV, mobile phone, personal digital assistant (PDA), digital camera, computer screen or Laptop screens, etc., dominate the field of flat panel display.
  • PDA personal digital assistant
  • liquid crystal displays which include a liquid crystal display panel and a backlight module.
  • the working principle of the liquid crystal display panel is to fill liquid crystal molecules between a Thin Film Transistor Array Substrate (TFT Array Substrate) and a Color Filter (CF), and apply driving on the two substrates.
  • TFT Array Substrate Thin Film Transistor Array Substrate
  • CF Color Filter
  • the liquid crystal display panel has a plurality of red (R, R), green (G, G), and blue (B, B) sub-pixels arranged in a matrix, and each sub-pixel is electrically connected to a thin film transistor (TFT), TFT
  • TFT thin film transistor
  • the gate is connected to the horizontal scan line
  • the drain is connected to the vertical data line
  • the source is connected to the corresponding sub-pixel.
  • Applying a sufficient voltage on the horizontal scanning line causes all the TFTs electrically connected to the scanning line to be turned on, so that the signal voltage on the data line can be written into the sub-pixels, and the transmittance of the liquid crystal is controlled to achieve a display effect.
  • the liquid crystal molecules have a characteristic that if a liquid crystal molecule is polarized by applying a co-directional voltage to the liquid crystal molecules for a long time, even if the voltage is canceled, the liquid crystal molecules may not be rotated by the electric field due to the destruction of the characteristics, so the liquid crystal
  • the display panel must be driven by AC, and the liquid crystal molecules are reversed at a certain frequency when the screen is displayed, so that the liquid crystal molecules are prevented from being biased in the same direction and lose their activity.
  • the liquid crystal display panel supports a plurality of inversion modes, such as a dot inversion mode, a row inversion mode, a column inversion mode, etc., and the way to achieve the inversion is mainly by constantly alternating the positive and negative polarities of the TFT source voltage (ie, The positive and negative polarities of the signal voltage transmitted by the data line are used for the purpose of AC driving.
  • inversion modes such as a dot inversion mode, a row inversion mode, a column inversion mode, etc.
  • an nth (n is an integer greater than 1) data line D(n) is distributed on the n-1th column subpixel P on both sides thereof.
  • the TFTs T in the nth column sub-pixel P are alternately connected: the mth row (m is a positive integer).
  • the TFT T in the nth column sub-pixel P is connected to the n-th data line on the right side of the n-th data line D(n).
  • the TFT T in the m+1th column and the n-1th column sub-pixel P is connected to the nth data line D(n) on the left side of the nth data line D(n);
  • the polarity of the signal voltage transmitted by the data line is reversed; such a setting can achieve the effect of dot inversion.
  • the TFT region generally requires a black matrix (BM) shading
  • BM black matrix
  • the pixel driving architecture using the column inversion mode is generally improved as compared with FIG. 1.
  • Each of the data lines is designed to be wound, so that the TFTs T are arranged neatly in a column, and the corresponding sub-pixel openings are arranged. The area is also aligned to overcome the display quality problems caused by the irregular arrangement of the opening areas.
  • this design increases the overall length of the data line (about 2.5 times the length of the original data line), greatly increasing the resistive load of the data line, and increasing the capacitive load due to the increased overlap area of the data line and other metal lines.
  • the panel has a high probability of mischarging, especially the high-resolution panel is more sensitive, and it also increases the panel power consumption.
  • Another object of the present invention is to provide a liquid crystal display panel in which the pixel opening areas are arranged neatly, and there are no display defects such as bright dark lines and irregular marks, and the color cut resistance is improved, the power consumption is low, and the display quality is good.
  • the present invention first provides a pixel driving architecture, including:
  • each column sub-pixel being repeatedly arranged in the order of a red sub-pixel, a green sub-pixel, and a blue sub-pixel;
  • a scanning line extending in a lateral direction corresponding to each row of sub-pixels; let m be a positive integer, and the mth scanning line is correspondingly disposed above the m-th row of sub-pixels;
  • n a positive integer
  • the nth data line is correspondingly disposed on a left side of the n-th column of sub-pixels
  • a TFT disposed corresponding to each sub-pixel;
  • the nth column TFTs are arranged at positions where the nth column of sub-pixels are close to the nth data line; and the gates of the mth row and nth columns of TFTs are electrically connected to the mth scan line,
  • the drain is electrically connected to the n data lines, and the source is electrically connected to the mth row and the nth column of the sub-pixels;
  • nth column of sub-pixels four sub-pixels or two sub-pixels adjacent in the vertical direction are a pixel group, and the n-th data line defines a signal period corresponding to each pixel group to define each sub-pixel in the pixel group.
  • the polarity is such that the polarity of the upper and lower adjacent two pixel groups is reversed at the intersection of the two pixels, and the polarity of the adjacent two columns of sub-pixels is opposite, achieving a display effect similar to dot inversion.
  • the four sub-pixels adjacent in the vertical direction and the lower side are a pixel group; in the upper and lower adjacent two pixel groups, the signal period corresponding to the pixel group located above is the pixel period
  • the four sub-pixels in the group are collectively defined as a positive polarity or a negative polarity; the signal period corresponding to the pixel group located below is collectively limited to the negative polarity or the positive polarity of the four sub-pixels in the pixel group, so that the upper and lower adjacent two The polarity of the pixel group is reversed.
  • the two sub-pixels adjacent in the vertical direction and the lower side are a pixel group; in the upper and lower adjacent two pixel groups, the signal period corresponding to the pixel group located above is the pixel period
  • the two sub-pixels in the group are collectively defined as positive polarity or negative polarity; the signal period corresponding to the pixel group located below is collectively limited to the negative polarity or the positive polarity of the two sub-pixels in the pixel group, so that the upper and lower adjacent two The polarity of the pixel group is reversed.
  • the four sub-pixels adjacent in the vertical direction and the lower side are a pixel group; in the upper and lower adjacent two pixel groups, the signal period corresponding to the pixel group located above is the pixel period
  • the first three sub-pixels in the group are defined as positive polarity or negative polarity, and the last sub-pixel in the pixel group is limited to the opposite polarity of the polarity of the first three sub-pixels; the signal period corresponding to the pixel group located below
  • the first three sub-pixels within the pixel group are defined as the opposite polarity of the last sub-pixel polarity within the upper pixel group, and the last sub-pixel within the pixel group is limited to the opposite polarity of the first three sub-pixel polarities .
  • the TFT is a tri-gate TFT.
  • the present invention also provides a liquid crystal display panel having a pixel driving architecture, the pixel driving architecture comprising:
  • each column sub-pixel being repeatedly arranged in the order of a red sub-pixel, a green sub-pixel, and a blue sub-pixel;
  • a scanning line extending in a lateral direction corresponding to each row of sub-pixels; let m be a positive integer, and the mth scanning line is correspondingly disposed above the m-th row of sub-pixels;
  • n a positive integer
  • the nth data line is correspondingly disposed on a left side of the n-th column of sub-pixels
  • a TFT disposed corresponding to each sub-pixel;
  • the nth column TFTs are arranged at positions where the nth column of sub-pixels are close to the nth data line; and the gates of the mth row and nth columns of TFTs are electrically connected to the mth scan line,
  • the drain is electrically connected to the n data lines, and the source is electrically connected to the mth row and the nth column of the sub-pixels;
  • the nth data line is set for each pixel group to set a signal period to define the polarity of each sub-pixel in the pixel group, so that the upper and lower adjacent two pixel groups are reversed at the boundary between the two groups.
  • the polarity of the adjacent two columns of sub-pixels is opposite, and a display effect similar to dot inversion is achieved.
  • the four sub-pixels adjacent in the vertical direction and the lower side are a pixel group; in the upper and lower adjacent two pixel groups, in the signal period corresponding to the pixel group located above n data lines collectively define four sub-pixels in the pixel group as positive polarity or negative polarity; the nth data line in the signal period corresponding to the pixel group located below is common to the four sub-pixels in the pixel group It is negative polarity or positive polarity, so that the polarities of the upper and lower adjacent two pixel groups are opposite.
  • the two sub-pixels adjacent in the vertical direction and the lower side are a pixel group; in the upper and lower adjacent two pixel groups, in the signal period corresponding to the pixel group located above n data lines collectively define two sub-pixels in the pixel group as positive polarity or negative polarity; the nth data line in the signal period corresponding to the pixel group located below is common to the two sub-pixels in the pixel group It is negative polarity or positive polarity, so that the polarities of the upper and lower adjacent two pixel groups are opposite.
  • the four sub-pixels adjacent in the vertical direction and the lower side are a pixel group; in the upper and lower adjacent two pixel groups, in the signal period corresponding to the pixel group located above
  • the n data lines define the first three sub-pixels in the pixel group as positive polarity or negative polarity, and the last sub-pixel in the pixel group is limited to the opposite polarity of the polarity of the first three sub-pixels;
  • the nth data line in the signal period corresponding to the pixel group defines the first three sub-pixels in the pixel group as opposite polarities of the polarity of the last sub-pixel in the upper pixel group, and the last one in the pixel group
  • the sub-pixels are defined as the opposite polarity of the polarity of the first three sub-pixels.
  • the TFT is a tri-gate TFT.
  • the invention also provides a pixel driving architecture, comprising:
  • each column sub-pixel being repeatedly arranged in the order of a red sub-pixel, a green sub-pixel, and a blue sub-pixel;
  • a scanning line extending in a lateral direction corresponding to each row of sub-pixels; let m be a positive integer, and the mth scanning line is correspondingly disposed above the m-th row of sub-pixels;
  • n a positive integer
  • the nth data line is correspondingly disposed on a left side of the n-th column of sub-pixels
  • a TFT disposed corresponding to each sub-pixel;
  • the nth column TFTs are arranged at positions where the nth column of sub-pixels are close to the nth data line; and the gates of the mth row and nth columns of TFTs are electrically connected to the mth scan line,
  • the drain is electrically connected to the n data lines, and the source is electrically connected to the mth row and the nth column of the sub-pixels;
  • nth column of sub-pixels four sub-pixels or two sub-pixels adjacent in the vertical direction are a pixel group, and the n-th data line defines a signal period corresponding to each pixel group to define each sub-pixel in the pixel group.
  • Polarity such that the upper and lower adjacent two pixel groups have a polarity reversal at the junction between the two,
  • the polarity of the adjacent two columns of sub-pixels is opposite, and the display effect similar to dot inversion is achieved;
  • the four sub-pixels adjacent in the vertical direction and the lower side are a pixel group; in the upper and lower adjacent two pixel groups, the n-th column in the signal period corresponding to the pixel group located above
  • the data line defines the four sub-pixels in the pixel group as positive polarity or negative polarity; the n-th data line in the signal period corresponding to the pixel group located below is collectively defined as the negative electrode in the pixel group.
  • Sexual or positive polarity such that the polarity of the upper and lower adjacent two pixel groups is opposite;
  • the TFT is a tri-gate TFT.
  • the invention provides a pixel driving structure and a liquid crystal display panel, wherein the nth column of TFTs are arranged at positions where the nth column of subpixels are close to the nth data line; and in the nth column of subpixels, The four sub-pixels or two sub-pixels adjacent to each other in the vertical direction are set as a pixel group, and the n-th data line defines a signal period corresponding to each pixel group to define the polarity of each sub-pixel in the pixel group, so that The polarity of the lower two adjacent pixel groups is reversed at the intersection of the two pixels, and the polarity of the adjacent two columns of sub-pixels is reversed to achieve a display effect similar to the dot inversion, so that the pixel opening areas are arranged neatly, and the bright and dark lines are eliminated. Irregular spots, etc. display defects, prevent color shift, reduce power consumption, and improve display quality.
  • FIG. 1 is a schematic diagram of a conventional pixel driving architecture employing a column inversion mode
  • FIG. 2 is a schematic diagram of a pixel driving architecture using a column inversion mode which is commonly used now;
  • FIG. 3 is a schematic diagram of a first embodiment of a pixel driving architecture of the present invention.
  • FIG. 4 is a schematic diagram of an ideal waveform and an actual waveform in a data line of a first embodiment of a pixel driving architecture of the present invention
  • FIG. 5 is a schematic diagram of a second embodiment of a pixel driving architecture of the present invention.
  • FIG. 6 is a schematic diagram of an ideal waveform and an actual waveform in a data line of a second embodiment of the pixel driving architecture of the present invention.
  • FIG. 7 is a schematic diagram of a third embodiment of a pixel driving architecture of the present invention.
  • FIG. 8 is a schematic diagram showing ideal waveforms and actual waveforms in a data line of a third embodiment of the pixel driving architecture of the present invention.
  • FIG. 3 shows a first embodiment of a pixel driving architecture of the present invention, including:
  • each of the sub-pixels P being repeatedly arranged in the order of the red sub-pixel R, the green sub-pixel G, and the blue sub-pixel B;
  • a scanning line extending in the lateral direction corresponding to each row of sub-pixels P; let m be a positive integer, and the m-th scanning line G(m) is correspondingly disposed above the m-th sub-pixel P, for example, the first scanning line G (1) correspondingly disposed above the first row of sub-pixels P, the second scanning line G(2) corresponding to the second row of sub-pixels P, and so on;
  • n a positive integer
  • the n-th data line D(n) corresponding to the left side of the n-th column of sub-pixels P, for example: the first data line D (1) corresponding to the left side of the first column of sub-pixels P, the second data line D (2) corresponding to the left side of the second column of sub-pixels P, and so on;
  • the n-th column TFT T is arranged at a position where the n-th column sub-pixel P is close to the n-th data line D(n), for example, the first column TFT T is arranged in the first row.
  • 1 column of sub-pixels P is close to the position of the first data line D(1), and the second column of TFTs T is arranged at the position of the second column of sub-pixels P close to the second data line D(2), and so on;
  • the gate of the nth column TFT T is electrically connected to the mth scanning line G(m)
  • the drain is electrically connected to the n data lines D(n)
  • the source is electrically connected to the mth row and the nth column of subpixels P
  • the gate of the TFT T of the first row and the first column is electrically connected to the first scanning line G(1)
  • the drain is electrically connected to one data line D(1)
  • the source is electrically connected to the first row and the first column.
  • Pixel P the first row and the second column of the TFT T are electrically connected to the first scanning line G(1), the drain is electrically connected to the two data lines D(2), and the source is electrically connected to the first row. 2 columns of sub-pixels P; the gate of the second row and the first column TFT T is electrically connected to the second scanning line G(2), the drain is electrically connected to one data line D(1), and the source is electrically connected to the second Row 1 column sub-pixel P, and so on;
  • the four sub-pixels P adjacent in the vertical direction and the lower side are a pixel group PG; for example, in the first column sub-pixel P, the first row to the fourth row adjacent in the vertical direction and the lower side
  • the four sub-pixels P of the row are a pixel group PG, and the four sub-pixels P of the fifth row to the eighth row adjacent in the vertical direction are a pixel group PG, and so on; likewise in the second column sub-pixel P
  • the four sub-pixels P of the first row to the fourth row adjacent in the vertical direction are a pixel group PG, and the four sub-pixels P of the fifth row to the eighth row adjacent in the vertical direction are one pixel. Group PG, and so on.
  • the nth data line D(n) sets a signal period corresponding to each pixel group PG to define the polarity of each sub-pixel P in the pixel group PG, so that the upper and lower adjacent two pixel groups PG are at the junction of the two.
  • the polarity is reversed.
  • the nth data line D(n) in the signal period corresponding to the pixel group PG located above is collectively limited to the positive polarity of the four sub-pixels P in the pixel group PG.
  • the nth data line D(n) in the signal period corresponding to the pixel group PG located below is collectively limited to the negative polarity of the four sub-pixels P in the pixel group PG, so that the upper and lower adjacent two pixel groups PG
  • the polarity is reversed; of course, the nth data line D(n) can be collectively limited to the negative polarity by the four sub-pixels P in the pixel group PG in the signal period corresponding to the pixel group PG located above;
  • the nth signal period in the signal period corresponding to the pixel group PG located below causes the data line D(n) to collectively define the four sub-pixels P in the pixel group PG to be positive, so that the poles of the upper and lower adjacent two pixel groups PG
  • the polarity of the adjacent two columns of sub-pixels P is opposite, and the pixel driving architecture can achieve a display effect similar to dot inversion.
  • the sub-pixels P of the first to fourth rows of the first column are collectively limited to the positive polarity by the first data line D(1) in the corresponding signal period, and the first column is The sub-pixels P of the fifth to eighth rows are collectively defined as the negative polarity by the first data line D(1) in the corresponding signal period, and so on; and the sub-pixels P of the first to fourth rows of the second column are The corresponding signal period is collectively limited to the negative polarity by the second data line D(2), and the sub-pixels P of the 5th to 8th rows of the second column are the second data line D(2) in the corresponding signal period.
  • the black solid line in FIG. 4 is an ideal waveform in the first data line D(1), and the black thick dotted line is the first data.
  • the actual waveform in line D(1) due to the existence of signal delay, when the polarity of sub-pixel P is reversed, it takes a certain time for the signal to change from positive polarity to negative polarity or from negative polarity to positive polarity, resulting in polarity reversal.
  • the sub-pixel P of the turn is less charged, but the polarity of the sub-pixel P in the first embodiment is reversed according to the red sub-pixel R, the green sub-pixel G, the blue sub-pixel B, the red sub-pixel R, and the green sub-pixel.
  • the regularity of the pixel G and the blue sub-pixel B repeatedly occurs, and does not cause the charging rate of the sub-pixel P corresponding to a certain color to be poor, so that the white-picture color shift phenomenon does not occur due to the low brightness of a certain color. It has the advantage of point reversal and the function of preventing color shift.
  • the first embodiment described above is capable of achieving the display effect similar to the dot inversion and preventing the color shift, since the nth column TFT T is evenly arranged at the position of the nth column subpixel P close to the nth data line D(n).
  • Each TFT T is aligned in columns, and the pixel opening areas are arranged neatly, which can eliminate display defects such as bright dark lines and irregular marks; since the nth data line D(n) only needs to extend in the longitudinal direction, no winding design is required, and Increasing the overall length of the data line, the resistive load, and the capacitive load can reduce power consumption; thus, the first embodiment can significantly improve display quality.
  • the TFT T is a Trig-Gate TFT (using a three-dimensional silicon fin to replace the planar gate on the conventional two-dimensional TFT), which can increase the TFT layout density and have a higher density. High performance and efficiency.
  • FIG. 5 shows a second embodiment of the pixel driving architecture of the present invention, and the difference between the second embodiment and the first embodiment is:
  • the two sub-pixels P adjacent in the vertical direction and the lower side are a pixel group PG; for example, in the first column sub-pixel P, the first row and the second row adjacent in the vertical direction and the lower side
  • the two sub-pixels P of the row are a pixel group PG
  • the two sub-pixels P of the third row and the fourth row adjacent in the vertical direction are a pixel group PG, and so on;
  • the two sub-pixels P of the first row and the second row adjacent in the vertical direction are a pixel group PG
  • the two sub-pixels P of the third row and the fourth row adjacent in the vertical direction are one pixel. Group PG, and so on.
  • the nth data line D(n) sets a signal period corresponding to each pixel group PG to define the polarity of each sub-pixel P in the pixel group PG, so that the upper and lower adjacent two pixel groups PG occur at the junction between the two. Sexual inversion.
  • the nth data line D(n) in the signal period corresponding to the pixel group PG located above is collectively limited to the positive polarity of the two sub-pixels P in the pixel group PG.
  • the nth data line D(n) in the signal period corresponding to the pixel group PG located below is collectively limited to the negative polarity of the two sub-pixels P in the pixel group PG, so that the upper and lower adjacent two pixel groups PG
  • the polarity is reversed; of course, the nth data line D(n) may be collectively limited to a negative polarity in the signal period corresponding to the pixel group PG located above;
  • the nth data line D(n) is collectively limited to the positive polarity of the two sub-pixels P in the pixel group PG, so that the poles of the upper and lower adjacent two pixel groups PG
  • the polarity of the adjacent two columns of sub-pixels P is opposite, and the pixel driving architecture can achieve a display effect similar to dot inversion.
  • the sub-pixels P of the first to second rows of the first column are collectively limited to the positive polarity by the first data line D(1) in the corresponding signal period, and the first column is The sub-pixels P of the third to fourth rows are collectively limited to the negative polarity by the first data line D(1) in the corresponding signal period, and so on; and the sub-pixels P of the first to second rows of the second column are The corresponding signal period is limited to the negative polarity by the second data line D(2), and the sub-pixels P of the third to fourth rows of the second column are the second data line D(2) in the corresponding signal period.
  • the black solid line in FIG. 6 is an ideal waveform in the first data line D(1), and the black thick dotted line is the first data.
  • the actual waveform in line D(1) due to the existence of signal delay, when the polarity of sub-pixel P is reversed, it takes a certain time for the signal to change from positive polarity to negative polarity or from negative polarity to positive polarity, resulting in polarity reversal.
  • the sub-pixel P of the turn is less charged, but the polarity of the sub-pixel P in the second embodiment is reversed according to the red sub-pixel R, the blue sub-pixel B, the green sub-pixel G, the red sub-pixel R,
  • the repetition of the blue sub-pixel B and the green sub-pixel G does not result in a difference in the charging rate of the sub-pixel P corresponding to a certain color, so that the white-color color shift does not occur due to the low brightness of a certain color.
  • the phenomenon has both a point reversal advantage and a color shift prevention function.
  • the second embodiment described above is capable of achieving the display effect similar to the dot inversion and preventing the color shift, since the nth column TFT T is evenly arranged at the position of the nth column subpixel P close to the nth data line D(n).
  • Each TFT T is aligned in columns, and the pixel opening areas are arranged neatly, which can eliminate display defects such as bright dark lines and irregular marks; since the nth data line D(n) only needs to extend in the longitudinal direction, no winding design is required, and Increasing the overall length of the data line, the resistive load, and the capacitive load can reduce power consumption; thus, the second embodiment can significantly improve display quality.
  • FIG. 7 shows a third embodiment of the pixel driving architecture of the present invention, and the third embodiment differs from the first embodiment in that:
  • the four sub-pixels P adjacent in the vertical direction and the lower side are a pixel group PG; for example, in the first column sub-pixel P, the first row to the fourth row adjacent in the vertical direction and the lower side
  • the four sub-pixels P of the row are a pixel group PG, and the four sub-pixels P of the fifth row to the eighth row adjacent in the vertical direction are a pixel group PG, and so on; likewise in the second column sub-pixel P
  • the four sub-pixels P of the first row to the fourth row adjacent in the vertical direction are a pixel group PG, and the four sub-pixels P of the fifth row to the eighth row adjacent in the vertical direction are one pixel. Group PG, and so on.
  • the nth data line D(n) sets a signal period corresponding to each pixel group PG to define the polarity of each sub-pixel P in the pixel group PG, so that the upper and lower adjacent two pixel groups PG occur at the junction between the two. Sexual inversion.
  • the nth data line D(n) in the signal period corresponding to the pixel group PG located above is collectively defined as the positive electrode of the first three sub-pixels P in the pixel group PG.
  • the first sub-pixel P in the pixel group PG is limited to a negative polarity; the n-th data line D(n) in the signal period corresponding to the pixel group PG located below is the first three sub-pixels in the pixel group PG
  • the pixels P are collectively defined as a positive polarity, and the last sub-pixel P in the pixel group PG is limited to a negative polarity; of course, the n-th data line D (n) may be made in a signal period corresponding to the pixel group PG located above.
  • the first three sub-pixels P in the pixel group PG are collectively limited to a negative polarity, and the last sub-pixel P in the pixel group PG is limited to a positive polarity; in the signal period corresponding to the pixel group PG located below,
  • the n data lines D(n) collectively define the first three sub-pixels P in the pixel group PG as negative polarity, and define the last sub-pixel P in the pixel group PG as positive polarity; and add adjacent columns of sub-pixels P
  • the pixel drive architecture can achieve a point-inverted Shows effect.
  • the sub-pixels P of the first to third rows of the first column are limited to the positive polarity by the first data line D(1) in the corresponding signal period, and the first column 4 rows of subpixels P is limited to the negative polarity in the same signal period; the sub-pixels P of the fifth to seventh rows of the first column are limited to the positive polarity by the first data line D(1) in the corresponding signal period, and the first column
  • the sub-pixel P of the 8th row is limited to a negative polarity in the same signal period, and so on; and the sub-pixels P of the 1st to 3rd rows of the 2nd column are subjected to the 2nd data line D in the corresponding signal period ( 2) limited to the negative polarity, the sub-pixel P of the fourth row of the second column is limited to the positive polarity in the same signal period; the sub-pixel P of the fifth to seventh rows of the second column is the second in the corresponding signal period
  • the strip data line D(2) is limited
  • the black solid line in FIG. 8 is an ideal waveform in the first data line D(1), and the black thick dotted line is the first data.
  • the actual waveform in line D(1) due to the existence of signal delay, when the polarity of sub-pixel P is reversed, it takes a certain time for the signal to change from positive polarity to negative polarity or from negative polarity to positive polarity, resulting in polarity reversal.
  • the sub-pixel P of the turn is less charged, but the polarity of the sub-pixel P in the third embodiment is reversed according to the red sub-pixel R, the red sub-pixel R, the green sub-pixel G, the green sub-pixel G, and the blue sub-pixel.
  • the repetition of the pattern of the pixel B and the blue sub-pixel B does not cause the charging rate of the sub-pixel P corresponding to a certain color to be poor, so that the white-color color shift phenomenon does not occur due to the low brightness of a certain color. It has the advantage of point reversal and the function of preventing color shift.
  • the third embodiment described above is capable of achieving the display effect similar to the dot inversion and preventing the color shift, since the nth column TFT T is evenly arranged at the position of the nth column subpixel P close to the nth data line D(n).
  • Each TFT T is aligned in columns, and the pixel opening areas are arranged neatly, which can eliminate display defects such as bright dark lines and irregular marks; since the nth data line D(n) only needs to extend in the longitudinal direction, no winding design is required, and Increasing the overall length of the data line, the resistive load, and the capacitive load can reduce power consumption; thus, the third embodiment can significantly improve display quality.
  • the present invention further provides a liquid crystal display panel having the above-mentioned pixel driving structure, so that the pixel opening areas are arranged neatly, and there are no display defects such as bright dark lines and irregular marks, and the color shift prevention capability and power consumption are compared. Low, the display quality is good, and the pixel drive architecture is no longer described repeatedly.
  • the nth column of TFTs are arranged at positions where the nth column of subpixels are close to the nth data line; and in the nth column of subpixels, The next four adjacent sub-pixels or two sub-pixels are set as a pixel group, and the n-th data line defines a signal period corresponding to each pixel group to define the polarity of each sub-pixel in the pixel group, so that the upper and lower adjacent two pixels.
  • the polarity inversion of the pixel group at the junction of the two, and the polarity of the adjacent two columns of sub-pixels are opposite, achieving a display effect similar to dot inversion, which enables the pixel opening areas to be arranged neatly. Eliminate display defects such as bright and dark lines, irregular marks, prevent color shift, reduce power consumption, and improve display quality.

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Abstract

一种像素驱动架构及液晶显示面板。在像素驱动结构中,将第n列TFT(T)均排布在第n列子像素(P)靠近第n条数据线(D(n))的位置;在第n列子像素(P)中,将沿纵向上、下相邻的四个子像素(P)或两个子像素(P)设为一像素组(PG),第n条数据线(D(n))对应每一像素组(PG)设立一信号周期来限定像素组(PG)内各子像素(P)的极性,使得上、下相邻两像素组(PG)在二者交界处发生极性反转,加之相邻两列子像素(P)的极性相反,达到类似于点反转的显示效果,能够使得像素开口区域排列整齐,消除亮暗线、不规则斑痕等显示缺陷,防止色偏,降低功耗,提高显示品质。

Description

像素驱动架构及液晶显示面板 技术领域
本发明涉及液晶显示技术领域,尤其涉及一种像素驱动架构及液晶显示面板。
背景技术
液晶显示器(Liquid Crystal Display,LCD)具有机身薄、省电、无辐射等众多优点,得到了广泛的应用,如:液晶电视、移动电话、个人数字助理(PDA)、数字相机、计算机屏幕或笔记本电脑屏幕等,在平板显示领域中占主导地位。
现有市场上的液晶显示器大部分为背光型液晶显示器,其包括液晶显示面板及背光模组(backlight module)。液晶显示面板的工作原理是在薄膜晶体管阵列基板(Thin Film Transistor Array Substrate,TFT Array Substrate)与彩色滤光片基板(Color Filter,CF)之间灌入液晶分子,并在两片基板上施加驱动电压来控制液晶分子的旋转方向,以将背光模组的光线折射出来产生画面。
液晶显示面板具有多个呈矩阵式排列的红色(Red,R)、绿色(Green,G)、及蓝色(Blue,B)子像素,每个子像素电性连接一个薄膜晶体管(TFT),TFT的栅极(Gate)连接至水平扫描线,漏极(Drain)连接至竖直方向的数据线,源极(Source)则连接至对应的子像素。在水平扫描线上施加足够的电压,会使得电性连接至该条扫描线上的所有TFT打开,从而数据线上的信号电压能够写入子像素,控制液晶的透光度,实现显示效果。
液晶分子具有一种特性,如果长时间给液晶分子施加同向电压,会使液晶分子极化,即使将电压取消,液晶分子亦会因为特性的破坏而无法再因电场的变化而转动,因此液晶显示面板必须是通过交流驱动,在显示画面的时候以一定的频率去反转液晶分子,防止液晶分子固定偏向同一个方向而失去活性。目前,液晶显示面板支持多种反转模式,比如点反转模式、行反转模式、列反转模式等,实现反转的途径主要是通过不断交替TFT源极电压的正、负极性(即数据线传送的信号电压的正、负极性),以达到交流驱动的目的。
请参阅图1,在传统的采用列反转模式的像素驱动架构中,第n条(n为大于1的整数)数据线D(n)同分布在它两侧的第n-1列子像素P、及 第n列子像素P内的TFT T交替连接:第m行(m为正整数)第n列子像素P内的TFT T于第n条数据线D(n)的右侧连接该第n条数据线D(n),第m+1行第n-1列子像素P内的TFT T于第n条数据线D(n)的左侧连接该第n条数据线D(n);相邻两条数据线传送的信号电压的极性相反;这样的设置可以达到点反转的效果。但是,由于同一列子像素P中相邻的两TFT T的其中之一位于对应子像素P的左边,另一个位于对应子像素P的右边,而TFT区域通常需要黑色矩阵(Black Matrix,BM)遮光,除TFT外的开口区域的排布不整齐,相邻两行子像素P的开口区域排布不同,易出现亮暗线及不规则斑痕(Mura),降低显示品质。
请参阅图2,现在通常使用的采用列反转模式的像素驱动架构较图1进行了改进,将每条数据线采用绕线设计,可使TFT T整齐排布为一列,对应的子像素开口区域也是对齐的,可克服开口区域排布不整齐带来的显示品质问题。但是,该种设计增加了数据线的整体长度(约为原数据线长度的2.5倍),大大增加了数据线的电阻负载,同时因数据线与其它金属线重叠面积增加,电容负载也会增加,面板错充几率大,尤其高解析度面板更为敏感,同时也会增加面板功耗。
发明内容
本发明的目的在于提供一种像素驱动架构,能够使得像素开口区域排列整齐,消除亮暗线、不规则斑痕等显示缺陷,防止色偏,降低功耗,提高显示品质。
本发明的另一目的在于提供一种液晶显示面板,其像素开口区域排列整齐,不存在亮暗线、不规则斑痕等显示缺陷,具有防色偏能力,功耗较低,显示品质较好。
为实现上述目的,本发明首先提供一种像素驱动架构,包括:
呈矩阵式排列的多个子像素,每一列子像素按照红色子像素、绿色子像素、蓝色子像素的顺序依次重复排列;
对应每一行子像素设置的沿横向延伸的扫描线;设m为正整数,第m条扫描线对应设于第m行子像素的上方;
对应每一列子像素设置的沿纵向延伸的数据线;设n为正整数,第n条数据线对应设于第n列子像素的左侧;
以及对应每一子像素设置的TFT;第n列TFT均排布在第n列子像素靠近第n条数据线的位置;第m行第n列TFT的栅极电性连接第m条扫描线,漏极电性连接n条数据线,源极电性连接第m行第n列子像素;
在第n列子像素中,沿纵向上、下相邻的四个子像素或两个子像素为一像素组,第n条数据线对应每一像素组设立一信号周期来限定像素组内各子像素的极性,使得上、下相邻两像素组在二者交界处发生极性反转,加之相邻两列子像素的极性相反,达到类似于点反转的显示效果。
可选的,在第n列子像素中,沿纵向上、下相邻的四个子像素为一像素组;上、下相邻两像素组中,与位于上方的像素组对应的信号周期将该像素组内的四个子像素共同限定为正极性或负极性;与位于下方的像素组对应的信号周期将该像素组内的四个子像素共同限定为负极性或正极性,使得上、下相邻两像素组的极性相反。
可选的,在第n列子像素中,沿纵向上、下相邻的两个子像素为一像素组;上、下相邻两像素组中,与位于上方的像素组对应的信号周期将该像素组内的两个子像素共同限定为正极性或负极性;与位于下方的像素组对应的信号周期将该像素组内的两个子像素共同限定为负极性或正极性,使得上、下相邻两像素组的极性相反。
可选的,在第n列子像素中,沿纵向上、下相邻的四个子像素为一像素组;上、下相邻两像素组中,与位于上方的像素组对应的信号周期将该像素组内的前三个子像素限定为正极性或负极性,将该像素组内的最后一个子像素限定为前三个子像素极性的相反极性;与位于下方的像素组对应的信号周期将该像素组内的前三个子像素限定为位于上方的像素组内的最后一个子像素极性的相反极性,将该像素组内的最后一个子像素限定为前三个子像素极性的相反极性。
所述TFT为三栅TFT。
本发明还提供一种液晶显示面板,具有像素驱动架构,所述像素驱动架构包括:
呈矩阵式排列的多个子像素,每一列子像素按照红色子像素、绿色子像素、蓝色子像素的顺序依次重复排列;
对应每一行子像素设置的沿横向延伸的扫描线;设m为正整数,第m条扫描线对应设于第m行子像素的上方;
对应每一列子像素设置的沿纵向延伸的数据线;设n为正整数,第n条数据线对应设于第n列子像素的左侧;
以及对应每一子像素设置的TFT;第n列TFT均排布在第n列子像素靠近第n条数据线的位置;第m行第n列TFT的栅极电性连接第m条扫描线,漏极电性连接n条数据线,源极电性连接第m行第n列子像素;
在第n列子像素中,沿纵向上、下相邻的四个子像素或两个子像素为 一像素组,第n条数据线对应每一像素组设立一信号周期来限定像素组内各子像素的极性,使得上、下相邻两像素组在二者交界处发生极性反转,加之相邻两列子像素的极性相反,达到类似于点反转的显示效果。
可选的,在第n列子像素中,沿纵向上、下相邻的四个子像素为一像素组;上、下相邻两像素组中,在与位于上方的像素组对应的信号周期内第n条数据线将该像素组内的四个子像素共同限定为正极性或负极性;在与位于下方的像素组对应的信号周期内第n条数据线将该像素组内的四个子像素共同限定为负极性或正极性,使得上、下相邻两像素组的极性相反。
可选的,在第n列子像素中,沿纵向上、下相邻的两个子像素为一像素组;上、下相邻两像素组中,在与位于上方的像素组对应的信号周期内第n条数据线将该像素组内的两个子像素共同限定为正极性或负极性;在与位于下方的像素组对应的信号周期内第n条数据线将该像素组内的两个子像素共同限定为负极性或正极性,使得上、下相邻两像素组的极性相反。
可选的,在第n列子像素中,沿纵向上、下相邻的四个子像素为一像素组;上、下相邻两像素组中,在与位于上方的像素组对应的信号周期内第n条数据线将该像素组内的前三个子像素限定为正极性或负极性,将该像素组内的最后一个子像素限定为前三个子像素极性的相反极性;在与位于下方的像素组对应的信号周期内第n条数据线将该像素组内的前三个子像素限定为位于上方的像素组内的最后一个子像素极性的相反极性,将该像素组内的最后一个子像素限定为前三个子像素极性的相反极性。
所述TFT为三栅TFT。
本发明还提供一种像素驱动架构,包括:
呈矩阵式排列的多个子像素,每一列子像素按照红色子像素、绿色子像素、蓝色子像素的顺序依次重复排列;
对应每一行子像素设置的沿横向延伸的扫描线;设m为正整数,第m条扫描线对应设于第m行子像素的上方;
对应每一列子像素设置的沿纵向延伸的数据线;设n为正整数,第n条数据线对应设于第n列子像素的左侧;
以及对应每一子像素设置的TFT;第n列TFT均排布在第n列子像素靠近第n条数据线的位置;第m行第n列TFT的栅极电性连接第m条扫描线,漏极电性连接n条数据线,源极电性连接第m行第n列子像素;
在第n列子像素中,沿纵向上、下相邻的四个子像素或两个子像素为一像素组,第n条数据线对应每一像素组设立一信号周期来限定像素组内各子像素的极性,使得上、下相邻两像素组在二者交界处发生极性反转, 加之相邻两列子像素的极性相反,达到类似于点反转的显示效果;
其中,在第n列子像素中,沿纵向上、下相邻的四个子像素为一像素组;上、下相邻两像素组中,在与位于上方的像素组对应的信号周期内第n条数据线将该像素组内的四个子像素共同限定为正极性或负极性;在与位于下方的像素组对应的信号周期内第n条数据线将该像素组内的四个子像素共同限定为负极性或正极性,使得上、下相邻两像素组的极性相反;
其中,所述TFT为三栅TFT。
本发明的有益效果:本发明提供的一种像素驱动架构及液晶显示面板,将第n列TFT均排布在第n列子像素靠近第n条数据线的位置;在第n列子像素中,将沿纵向上、下相邻的四个子像素或两个子像素设为一像素组,第n条数据线对应每一像素组设立一信号周期来限定像素组内各子像素的极性,使得上、下相邻两像素组在二者交界处发生极性反转,加之相邻两列子像素的极性相反,达到类似于点反转的显示效果,能够使得像素开口区域排列整齐,消除亮暗线、不规则斑痕等显示缺陷,防止色偏,降低功耗,提高显示品质。
附图说明
为了能更进一步了解本发明的特征以及技术内容,请参阅以下有关本发明的详细说明与附图,然而附图仅提供参考与说明用,并非用来对本发明加以限制。
附图中,
图1为传统的采用列反转模式的像素驱动架构的示意图;
图2为现在通常使用的采用列反转模式的像素驱动架构的示意图;
图3为本发明的像素驱动架构的第一实施例的示意图;
图4为本发明的像素驱动架构的第一实施例的数据线内的理想波形与实际波形示意图;
图5为本发明的像素驱动架构的第二实施例的示意图;
图6为本发明的像素驱动架构的第二实施例的数据线内的理想波形与实际波形示意图;
图7为本发明的像素驱动架构的第三实施例的示意图;
图8为本发明的像素驱动架构的第三实施例的数据线内的理想波形与实际波形示意图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果,以下结合本发明的优选实施例及其附图进行详细描述。
本发明首先提供一种像素驱动架构。图3所示为本发明的像素驱动架构的第一实施例,包括:
呈矩阵式排列的多个子像素P,每一列子像素P按照红色子像素R、绿色子像素G、蓝色子像素B的顺序依次重复排列;
对应每一行子像素P设置的沿横向延伸的扫描线;设m为正整数,第m条扫描线G(m)对应设于第m行子像素P的上方,例如:第1条扫描线G(1)对应设于第1行子像素P的上方,第2条扫描线G(2)对应设于第2行子像素P的上方,依此类推;
对应每一列子像素P设置的沿纵向延伸的数据线;设n为正整数,第n条数据线D(n)对应设于第n列子像素P的左侧,例如:第1条数据线D(1)对应设于第1列子像素P的左侧,第2条数据线D(2)对应设于第2列子像素P的左侧,依此类推;
以及对应每一子像素P设置的TFT T;第n列TFT T均排布在第n列子像素P靠近第n条数据线D(n)的位置,例如第1列TFT T均排布在第1列子像素P靠近第1条数据线D(1)的位置,第2列TFT T均排布在第2列子像素P靠近第2条数据线D(2)的位置,依此类推;第m行第n列TFT T的栅极电性连接第m条扫描线G(m),漏极电性连接n条数据线D(n),源极电性连接第m行第n列子像素P,例如第1行第1列TFT T的栅极电性连接第1条扫描线G(1),漏极电性连接1条数据线D(1),源极电性连接第1行第1列子像素P;第1行第2列TFT T的栅极电性连接第1条扫描线G(1),漏极电性连接2条数据线D(2),源极电性连接第1行第2列子像素P;第2行第1列TFT T的栅极电性连接第2条扫描线G(2),漏极电性连接1条数据线D(1),源极电性连接第2行第1列子像素P,依此类推;
在第n列子像素P中,沿纵向上、下相邻的四个子像素P为一像素组PG;例如,在第1列子像素P中,沿纵向上、下相邻的第1行至第4行的四个子像素P为一像素组PG,沿纵向上、下相邻的第5行至第8行的四个子像素P为一像素组PG,依此类推;同样在第2列子像素P中,沿纵向上、下相邻的第1行至第4行的四个子像素P为一像素组PG,沿纵向上、下相邻的第5行至第8行的四个子像素P为一像素组PG,依此类推。
第n条数据线D(n)对应每一像素组PG设立一信号周期来限定像素组PG内各子像素P的极性,使得上、下相邻两像素组PG在二者交界处发 生极性反转。结合图4,在该第一实施例中,在与位于上方的像素组PG对应的信号周期内第n条数据线D(n)将该像素组PG内的四个子像素P共同限定为正极性;在与位于下方的像素组PG对应的信号周期内第n条数据线D(n)将该像素组PG内的四个子像素P共同限定为负极性,使得上、下相邻两像素组PG的极性相反;当然也可以在与位于上方的像素组PG对应的信号周期内使第n条数据线D(n)将该像素组PG内的四个子像素P共同限定为负极性;在与位于下方的像素组PG对应的信号周期内第n条使数据线D(n)将该像素组PG内的四个子像素P共同限定为正极性,使得上、下相邻两像素组PG的极性相反;加之相邻两列子像素P的极性相反,该像素驱动架构能够达到类似于点反转的显示效果。
以图3与图4所示为例,第1列的第1至4行的子像素P在对应的信号周期内被第1条数据线D(1)共同限定为正极性,第1列的第5至8行的子像素P在对应的信号周期内被第1条数据线D(1)共同限定为负极性,依此类推;而第2列的第1至4行的子像素P在对应的信号周期内被第二条数据线D(2)共同限定为负极性,第2列的第5至8行的子像素P在对应的信号周期内被第二条数据线D(2)共同限定为正极性,依此类推,达到类似于点反转的显示效果。
进一步以第1条数据线D(1)与第1列子像素P为例,图4中黑色粗实线为第1条数据线D(1)内的理想波形,黑色粗虚线为第1条数据线D(1)内的实际波形,由于信号延迟的存在,当子像素P的极性反转时,信号由正极性向负极性转变或由负极性向正极性转变需要一定的时间,导致极性反转处的子像素P充电情况较差,但是该第一实施例中子像素P的极性反转按照红色子像素R、绿色子像素G、蓝色子像素B、红色子像素R、绿色子像素G、蓝色子像素B的规律重复出现,并不会导致某一种颜色对应的子像素P充电率差,从而不会出现因某一种颜色亮度偏低而出现白画面色偏现象,兼具点反转优势和防止色偏功能。
上述第一实施例除了能够达到类似于点反转的显示效果和防止色偏外,由于将第n列TFT T均排布在第n列子像素P靠近第n条数据线D(n)的位置,各TFT T按列对齐,像素开口区域排列整齐,能够消除亮暗线、不规则斑痕等显示缺陷;由于第n条数据线D(n)仅需沿纵向延伸,无需进行绕线设计,不会增加数据线的整体长度、电阻负载、及电容负载,能够降低功耗;从而该第一实施例能够明显提高显示品质。
值得注意的是,所述TFT T为三栅(Trig-Gate)TFT(使用一个三维硅鳍片取代传统二维TFT上的平面栅极),能够提高TFT排布密度,具有更 高的性能和效率。
图5所示为本发明的像素驱动架构的第二实施例,该第二实施例与第一实施例的差别在于:
在第n列子像素P中,沿纵向上、下相邻的两个子像素P为一像素组PG;例如,在第1列子像素P中,沿纵向上、下相邻的第1行与第2行的两个子像素P为一像素组PG,沿纵向上、下相邻的第3行与第4行的两个子像素P为一像素组PG,依此类推;同样在第2列子像素P中,沿纵向上、下相邻的第1行与第2行的两个子像素P为一像素组PG,沿纵向上、下相邻的第3行与第4行的两个子像素P为一像素组PG,依此类推。
第n条数据线D(n)对应每一像素组PG设立一信号周期来限定像素组PG内各子像素P的极性,使得上、下相邻两像素组PG在二者交界处发生极性反转。结合图6,在该第二实施例中,在与位于上方的像素组PG对应的信号周期内第n条数据线D(n)将该像素组PG内的两个子像素P共同限定为正极性;在与位于下方的像素组PG对应的信号周期内第n条数据线D(n)将该像素组PG内的两个子像素P共同限定为负极性,使得上、下相邻两像素组PG的极性相反;当然也可以在与位于上方的像素组PG对应的信号周期内使第n条数据线D(n)将该像素组PG内的两个子像素P共同限定为负极性;在与位于下方的像素组PG对应的信号周期内使第n条数据线D(n)将该像素组PG内的两个子像素P共同限定为正极性,使得上、下相邻两像素组PG的极性相反;加之相邻两列子像素P的极性相反,该像素驱动架构能够达到类似于点反转的显示效果。
以图5与图6所示为例,第1列的第1至2行的子像素P在对应的信号周期内被第1条数据线D(1)共同限定为正极性,第1列的第3至4行的子像素P在对应的信号周期内被第1条数据线D(1)共同限定为负极性,依此类推;而第2列的第1至2行的子像素P在对应的信号周期内被第2条数据线D(2)共同限定为负极性,第2列的第3至4行的子像素P在对应的信号周期内被第2条数据线D(2)共同限定为正极性,依此类推,达到类似于点反转的显示效果。
进一步以第1条数据线D(1)与第1列子像素P为例,图6中黑色粗实线为第1条数据线D(1)内的理想波形,黑色粗虚线为第1条数据线D(1)内的实际波形,由于信号延迟的存在,当子像素P的极性反转时,信号由正极性向负极性转变或由负极性向正极性转变需要一定的时间,导致极性反转处的子像素P充电情况较差,但是该第二实施例中子像素P的极性反转按照红色子像素R、蓝色子像素B、绿色子像素G、红色子像素R、 蓝色子像素B、绿色子像素G的规律重复出现,并不会导致某一种颜色对应的子像素P充电率差,从而不会出现因某一种颜色亮度偏低而出现白画面色偏现象,兼具点反转优势和防止色偏功能。
其余均与第一实施例相同,此处不再进行重复性描述。
上述第二实施例除了能够达到类似于点反转的显示效果和防止色偏外,由于将第n列TFT T均排布在第n列子像素P靠近第n条数据线D(n)的位置,各TFT T按列对齐,像素开口区域排列整齐,能够消除亮暗线、不规则斑痕等显示缺陷;由于第n条数据线D(n)仅需沿纵向延伸,无需进行绕线设计,不会增加数据线的整体长度、电阻负载、及电容负载,能够降低功耗;从而该第二实施例能够明显提高显示品质。
图7所示为本发明的像素驱动架构的第三实施例,该第三实施例与第一实施例的差别在于:
在第n列子像素P中,沿纵向上、下相邻的四个子像素P为一像素组PG;例如,在第1列子像素P中,沿纵向上、下相邻的第1行至第4行的四个子像素P为一像素组PG,沿纵向上、下相邻的第5行至第8行的四个子像素P为一像素组PG,依此类推;同样在第2列子像素P中,沿纵向上、下相邻的第1行至第4行的四个子像素P为一像素组PG,沿纵向上、下相邻的第5行至第8行的四个子像素P为一像素组PG,依此类推。
第n条数据线D(n)对应每一像素组PG设立一信号周期来限定像素组PG内各子像素P的极性,使得上、下相邻两像素组PG在二者交界处发生极性反转。结合图8,在该第三实施例中,在与位于上方的像素组PG对应的信号周期内第n条数据线D(n)将该像素组PG内的前三个子像素P共同限定为正极性,将该像素组PG内的最后一个子像素P限定负极性;在与位于下方的像素组PG对应的信号周期内第n条数据线D(n)将该像素组PG内的前三个子像素P共同限定为正极性,将该像素组PG内的最后一个子像素P限定为负极性;当然也可以在与位于上方的像素组PG对应的信号周期内使第n条数据线D(n)将该像素组PG内的前三个子像素P共同限定为负极性,将该像素组PG内的最后一个子像素P限定正极性;在与位于下方的像素组PG对应的信号周期内使第n条数据线D(n)将该像素组PG内的前三个子像素P共同限定为负极性,将该像素组PG内的最后一个子像素P限定为正极性;加之相邻两列子像素P的极性相反,该像素驱动架构能够达到类似于点反转的显示效果。
以图7与图8所示为例,第1列的第1至3行的子像素P在对应的信号周期内被第1条数据线D(1)限定为正极性,第1列的第4行的子像素 P在同一信号周期内被限定为负极性;第1列的第5至7行的子像素P在对应的信号周期内被第1条数据线D(1)限定为正极性,第1列的第8行的子像素P在同一信号周期内被限定为负极性,依此类推;而第2列的第1至3行的子像素P在对应的信号周期内被第2条数据线D(2)限定为负极性,第2列的第4行的子像素P在同一信号周期被限定为正极性;第2列的第5至7行的子像素P在对应的信号周期内被第2条数据线D(2)限定为负极性,第2列的第8行的子像素P在同一信号周期限定为正极性,依此类推,达到类似于点反转的显示效果。
进一步以第1条数据线D(1)与第1列子像素P为例,图8中黑色粗实线为第1条数据线D(1)内的理想波形,黑色粗虚线为第1条数据线D(1)内的实际波形,由于信号延迟的存在,当子像素P的极性反转时,信号由正极性向负极性转变或由负极性向正极性转变需要一定的时间,导致极性反转处的子像素P充电情况较差,但是该第三实施例中子像素P的极性反转按照红色子像素R、红色子像素R、绿色子像素G、绿色子像素G、蓝色子像素B、蓝色子像素B的规律重复出现,并不会导致某一种颜色对应的子像素P充电率差,从而不会出现因某一种颜色亮度偏低而出现白画面色偏现象,兼具点反转优势和防止色偏功能。
上述第三实施例除了能够达到类似于点反转的显示效果和防止色偏外,由于将第n列TFT T均排布在第n列子像素P靠近第n条数据线D(n)的位置,各TFT T按列对齐,像素开口区域排列整齐,能够消除亮暗线、不规则斑痕等显示缺陷;由于第n条数据线D(n)仅需沿纵向延伸,无需进行绕线设计,不会增加数据线的整体长度、电阻负载、及电容负载,能够降低功耗;从而该第三实施例能够明显提高显示品质。
其余均与第一实施例相同,此处不再进行重复性描述。
基于同一发明构思,本发明还提供一种液晶显示面板,具有上述像素驱动架构,从而其像素开口区域排列整齐,不存在亮暗线、不规则斑痕等显示缺陷,具有防色偏能力,功耗较低,显示品质较好,在此不再对像素驱动架构进行重复性描述。
综上所述,本发明的像素驱动架构及液晶显示面板,将第n列TFT均排布在第n列子像素靠近第n条数据线的位置;在第n列子像素中,将沿纵向上、下相邻的四个子像素或两个子像素设为一像素组,第n条数据线对应每一像素组设立一信号周期来限定像素组内各子像素的极性,使得上、下相邻两像素组在二者交界处发生极性反转,加之相邻两列子像素的极性相反,达到类似于点反转的显示效果,能够使得像素开口区域排列整齐, 消除亮暗线、不规则斑痕等显示缺陷,防止色偏,降低功耗,提高显示品质。
以上所述,对于本领域的普通技术人员来说,可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形,而所有这些改变和变形都应属于本发明后附的权利要求的保护范围。

Claims (11)

  1. 一种像素驱动架构,包括:
    呈矩阵式排列的多个子像素,每一列子像素按照红色子像素、绿色子像素、蓝色子像素的顺序依次重复排列;
    对应每一行子像素设置的沿横向延伸的扫描线;设m为正整数,第m条扫描线对应设于第m行子像素的上方;
    对应每一列子像素设置的沿纵向延伸的数据线;设n为正整数,第n条数据线对应设于第n列子像素的左侧;
    以及对应每一子像素设置的TFT;第n列TFT均排布在第n列子像素靠近第n条数据线的位置;第m行第n列TFT的栅极电性连接第m条扫描线,漏极电性连接n条数据线,源极电性连接第m行第n列子像素;
    在第n列子像素中,沿纵向上、下相邻的四个子像素或两个子像素为一像素组,第n条数据线对应每一像素组设立一信号周期来限定像素组内各子像素的极性,使得上、下相邻两像素组在二者交界处发生极性反转,加之相邻两列子像素的极性相反,达到类似于点反转的显示效果。
  2. 如权利要求1所述的像素驱动架构,其中,在第n列子像素中,沿纵向上、下相邻的四个子像素为一像素组;上、下相邻两像素组中,在与位于上方的像素组对应的信号周期内第n条数据线将该像素组内的四个子像素共同限定为正极性或负极性;在与位于下方的像素组对应的信号周期内第n条数据线将该像素组内的四个子像素共同限定为负极性或正极性,使得上、下相邻两像素组的极性相反。
  3. 如权利要求1所述的像素驱动架构,其中,在第n列子像素中,沿纵向上、下相邻的两个子像素为一像素组;上、下相邻两像素组中,在与位于上方的像素组对应的信号周期内第n条数据线将该像素组内的两个子像素共同限定为正极性或负极性;在与位于下方的像素组对应的信号周期内第n条数据线将该像素组内的两个子像素共同限定为负极性或正极性,使得上、下相邻两像素组的极性相反。
  4. 如权利要求1所述的像素驱动架构,其中,在第n列子像素中,沿纵向上、下相邻的四个子像素为一像素组;上、下相邻两像素组中,在与位于上方的像素组对应的信号周期内第n条数据线将该像素组内的前三个子像素限定为正极性或负极性,将该像素组内的最后一个子像素限定为前三个子像素极性的相反极性;在与位于下方的像素组对应的信号周期内第n 条数据线将该像素组内的前三个子像素限定为位于上方的像素组内的最后一个子像素极性的相反极性,将该像素组内的最后一个子像素限定为前三个子像素极性的相反极性。
  5. 如权利要求1所述的像素驱动架构,其中,所述TFT为三栅TFT。
  6. 一种液晶显示面板,具有像素驱动架构,所述像素驱动架构包括:
    呈矩阵式排列的多个子像素,每一列子像素按照红色子像素、绿色子像素、蓝色子像素的顺序依次重复排列;
    对应每一行子像素设置的沿横向延伸的扫描线;设m为正整数,第m条扫描线对应设于第m行子像素的上方;
    对应每一列子像素设置的沿纵向延伸的数据线;设n为正整数,第n条数据线对应设于第n列子像素的左侧;
    以及对应每一子像素设置的TFT;第n列TFT均排布在第n列子像素靠近第n条数据线的位置;第m行第n列TFT的栅极电性连接第m条扫描线,漏极电性连接n条数据线,源极电性连接第m行第n列子像素;
    在第n列子像素中,沿纵向上、下相邻的四个子像素或两个子像素为一像素组,第n条数据线对应每一像素组设立一信号周期来限定像素组内各子像素的极性,使得上、下相邻两像素组在二者交界处发生极性反转,加之相邻两列子像素的极性相反,达到类似于点反转的显示效果。
  7. 如权利要求6所述的液晶显示面板,其中,在第n列子像素中,沿纵向上、下相邻的四个子像素为一像素组;上、下相邻两像素组中,在与位于上方的像素组对应的信号周期内第n条数据线将该像素组内的四个子像素共同限定为正极性或负极性;在与位于下方的像素组对应的信号周期内第n条数据线将该像素组内的四个子像素共同限定为负极性或正极性,使得上、下相邻两像素组的极性相反。
  8. 如权利要求6所述的液晶显示面板,其中,在第n列子像素中,沿纵向上、下相邻的两个子像素为一像素组;上、下相邻两像素组中,在与位于上方的像素组对应的信号周期内第n条数据线将该像素组内的两个子像素共同限定为正极性或负极性;在与位于下方的像素组对应的信号周期内第n条数据线将该像素组内的两个子像素共同限定为负极性或正极性,使得上、下相邻两像素组的极性相反。
  9. 如权利要求6所述的液晶显示面板,其中,在第n列子像素中,沿纵向上、下相邻的四个子像素为一像素组;上、下相邻两像素组中,在与位于上方的像素组对应的信号周期内第n条数据线将该像素组内的前三个子像素限定为正极性或负极性,将该像素组内的最后一个子像素限定为前 三个子像素极性的相反极性;在与位于下方的像素组对应的信号周期内第n条数据线将该像素组内的前三个子像素限定为位于上方的像素组内的最后一个子像素极性的相反极性,将该像素组内的最后一个子像素限定为前三个子像素极性的相反极性。
  10. 如权利要求6所述的液晶显示面板,其中,所述TFT为三栅TFT。
  11. 一种像素驱动架构,包括:
    呈矩阵式排列的多个子像素,每一列子像素按照红色子像素、绿色子像素、蓝色子像素的顺序依次重复排列;
    对应每一行子像素设置的沿横向延伸的扫描线;设m为正整数,第m条扫描线对应设于第m行子像素的上方;
    对应每一列子像素设置的沿纵向延伸的数据线;设n为正整数,第n条数据线对应设于第n列子像素的左侧;
    以及对应每一子像素设置的TFT;第n列TFT均排布在第n列子像素靠近第n条数据线的位置;第m行第n列TFT的栅极电性连接第m条扫描线,漏极电性连接n条数据线,源极电性连接第m行第n列子像素;
    在第n列子像素中,沿纵向上、下相邻的四个子像素或两个子像素为一像素组,第n条数据线对应每一像素组设立一信号周期来限定像素组内各子像素的极性,使得上、下相邻两像素组在二者交界处发生极性反转,加之相邻两列子像素的极性相反,达到类似于点反转的显示效果;
    其中,在第n列子像素中,沿纵向上、下相邻的四个子像素为一像素组;上、下相邻两像素组中,在与位于上方的像素组对应的信号周期内第n条数据线将该像素组内的四个子像素共同限定为正极性或负极性;在与位于下方的像素组对应的信号周期内第n条数据线将该像素组内的四个子像素共同限定为负极性或正极性,使得上、下相邻两像素组的极性相反;
    其中,所述TFT为三栅TFT。
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