WO2018128435A3 - 다중 ldpc 코드에서 ldpc 베이스 코드를 선택하는 방법 및 이를 위한 장치 - Google Patents

다중 ldpc 코드에서 ldpc 베이스 코드를 선택하는 방법 및 이를 위한 장치 Download PDF

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WO2018128435A3
WO2018128435A3 PCT/KR2018/000214 KR2018000214W WO2018128435A3 WO 2018128435 A3 WO2018128435 A3 WO 2018128435A3 KR 2018000214 W KR2018000214 W KR 2018000214W WO 2018128435 A3 WO2018128435 A3 WO 2018128435A3
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code
base code
selecting
parity
device therefor
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PCT/KR2018/000214
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French (fr)
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WO2018128435A2 (ko
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신종웅
김봉회
김진우
노광석
변일무
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엘지전자 주식회사
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Priority to JP2019528707A priority Critical patent/JP2020501429A/ja
Priority to CN201880004171.8A priority patent/CN109891755A/zh
Priority to US16/065,548 priority patent/US20210167800A1/en
Priority to EP18736522.6A priority patent/EP3567730A4/en
Priority to KR1020187025831A priority patent/KR101998199B1/ko
Publication of WO2018128435A2 publication Critical patent/WO2018128435A2/ko
Publication of WO2018128435A3 publication Critical patent/WO2018128435A3/ko

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/1151—Algebraically constructed LDPC codes, e.g. LDPC codes derived from Euclidean geometries [EG-LDPC codes]
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
    • H03M13/1185—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
    • H03M13/1185—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal
    • H03M13/1188—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal wherein in the part with the double-diagonal at least one column has an odd column weight equal or greater than three
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/3707—Adaptive decoding and hybrid decoding, e.g. decoding methods or techniques providing more than one decoding algorithm for one code
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
    • H03M13/615—Use of computational or mathematical techniques
    • H03M13/616—Matrix operations, especially for generator matrices or check matrices, e.g. column or row permutations
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
    • H03M13/618—Shortening and extension of codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6508—Flexibility, adaptability, parametrability and configurability of the implementation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0041—Arrangements at the transmitter end
    • H04L1/0043—Realisations of complexity reduction techniques, e.g. use of look-up tables
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0057—Block codes

Abstract

본 발명의 일 실시예에 따른 다중 베이스 코드(Base code)를 지원하는 LDPC (Quasi-Cyclic Low-Density Parity-Check) 코드의 인코딩 방법은 패리티 체크 행렬 생성을 위한 베이스 코드를 제 1 베이스 코드와 제 2 베이스 코드 중에서 선택하는 단계, 상기 패리티 체크 행렬 생성을 위한 리프팅 값(lifting value)을 복수의 리프팅 값으로부터 선택하는 단계, 상기 선택된 베이스 코드와 상기 리프팅 값을 이용하여 상기 패리티 체크 행렬을 생성하는 단계를 포함하되, 상기 베이스 코드는 코드 블록 사이즈(Code block size) 및 부호율(Code rate)에 기반하여 결정되고, 상기 리프팅 값은 상기 베이스 코드의 파라미터와 상기 코드 블록 사이즈에 기반하여 결정될 수 있다.
PCT/KR2018/000214 2017-01-06 2018-01-05 다중 ldpc 코드에서 ldpc 베이스 코드를 선택하는 방법 및 이를 위한 장치 WO2018128435A2 (ko)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2019528707A JP2020501429A (ja) 2017-01-06 2018-01-05 多重ｌｄｐｃコードからｌｄｐｃベースコードを選択する方法及びそのための装置
CN201880004171.8A CN109891755A (zh) 2017-01-06 2018-01-05 多lpdc 码中选择ldpc 基本码的方法及其设备
US16/065,548 US20210167800A1 (en) 2017-01-06 2018-01-05 Method for selecting ldpc base code in multiple ldpc codes and apparatus therefor
EP18736522.6A EP3567730A4 (en) 2017-01-06 2018-01-05 PROCEDURE FOR SELECTING A LDPC BASIC CODE WITH A MULTI-LPDC CODE AND DEVICE FOR IT
KR1020187025831A KR101998199B1 (ko) 2017-01-06 2018-01-05 다중 ldpc 코드에서 ldpc 베이스 코드를 선택하는 방법 및 이를 위한 장치

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US201762442997P 2017-01-06 2017-01-06
US62/442,997 2017-01-06
US201762522051P 2017-06-19 2017-06-19
US62/522,051 2017-06-19

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WO2018128435A2 WO2018128435A2 (ko) 2018-07-12
WO2018128435A3 true WO2018128435A3 (ko) 2018-08-30

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US (1) US20210167800A1 (ko)
EP (1) EP3567730A4 (ko)
JP (1) JP2020501429A (ko)
KR (1) KR101998199B1 (ko)
CN (1) CN109891755A (ko)
WO (1) WO2018128435A2 (ko)

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KR102395537B1 (ko) * 2017-08-18 2022-05-10 에스케이하이닉스 주식회사 H 행렬 생성 회로, 그것의 동작 방법 및 그것에 의해 생성된 h 행렬을 사용하는 에러 정정 회로
US11728918B2 (en) * 2020-04-10 2023-08-15 Qualcomm Incorporated Multi-bit payload transmission with orthogonal sequences
KR20230107872A (ko) * 2020-10-15 2023-07-18 삼성전자주식회사 통신 또는 방송 시스템에서 데이터 복호화 방법 및 장치
CN115811379A (zh) * 2021-09-15 2023-03-17 华为技术有限公司 编码方法、译码方法以及相关装置
CN116827358B (zh) * 2023-07-13 2024-04-02 白盒子(上海)微电子科技有限公司 一种5g ldpc编码实现方法和装置

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JP2020501429A (ja) 2020-01-16
US20210167800A1 (en) 2021-06-03
EP3567730A4 (en) 2020-09-02
WO2018128435A2 (ko) 2018-07-12
EP3567730A2 (en) 2019-11-13
CN109891755A (zh) 2019-06-14
KR101998199B1 (ko) 2019-07-09
KR20180104759A (ko) 2018-09-21

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