WO2018079071A1 - Dispositif d'imagerie - Google Patents

Dispositif d'imagerie Download PDF

Info

Publication number
WO2018079071A1
WO2018079071A1 PCT/JP2017/031598 JP2017031598W WO2018079071A1 WO 2018079071 A1 WO2018079071 A1 WO 2018079071A1 JP 2017031598 W JP2017031598 W JP 2017031598W WO 2018079071 A1 WO2018079071 A1 WO 2018079071A1
Authority
WO
WIPO (PCT)
Prior art keywords
pixel
sub
pixels
imaging device
block
Prior art date
Application number
PCT/JP2017/031598
Other languages
English (en)
Japanese (ja)
Inventor
宇佐美　裕丈
Original Assignee
株式会社日立国際電気
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社日立国際電気 filed Critical 株式会社日立国際電気
Priority to JP2018547176A priority Critical patent/JP6697087B2/ja
Publication of WO2018079071A1 publication Critical patent/WO2018079071A1/fr

Links

Images

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/10—Cameras or camera modules comprising electronic image sensors; Control thereof for generating image signals from different wavelengths
    • H04N23/12—Cameras or camera modules comprising electronic image sensors; Control thereof for generating image signals from different wavelengths with one sensor only
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/70—Circuitry for compensating brightness variation in the scene
    • H04N23/76—Circuitry for compensating brightness variation in the scene by influencing the image signals
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/40—Extracting pixel data from image sensors by controlling scanning circuits, e.g. by modifying the number of pixels sampled or to be sampled
    • H04N25/46—Extracting pixel data from image sensors by controlling scanning circuits, e.g. by modifying the number of pixels sampled or to be sampled by combining or binning pixels

Definitions

  • the present invention relates to an imaging device having a solid-state imaging device.
  • the sensitivity of the image sensor in order to increase the shooting sensitivity even in low light environments, the sensitivity of the image sensor can be increased for exposure over a long period of time by controlling the shutter speed of the image sensor, or the pixel values of multiple adjacent pixels within the image sensor can be virtually
  • a technique called binning binning processing
  • digital pixel addition in which adjacent pixels are mixed and added is also used (see, for example, Patent Document 1).
  • the above-described known method has a problem that when the number of pixels to be added is increased in order to increase sensitivity, noise (quantization noise) also increases and spatial resolution decreases. Furthermore, since a general imaging apparatus switches processing in two stages, ON or OFF, there is a problem that an unnatural video shock appears at the time of switching.
  • the present invention has been made in view of such a situation, and aims to solve the above problems.
  • the present invention is an imaging apparatus comprising: a solid-state imaging device; and a pixel mixing unit that adds a pixel value of a peripheral pixel to a pixel value of a target pixel in order to increase sensitivity of the solid-state imaging device.
  • the mixing unit treats two pixels that are point-symmetric with respect to the target pixel as one set, treats a total of four pixels as a group, and adds two pixels that are symmetrical to the set, and sets the pixel value of the target pixel as a peripheral pixel.
  • the pixel mixing unit includes a plurality of sub-blocks provided in parallel in a group unit, a plurality of selectors that control outputs of the sub-blocks, a gain control unit that controls the selectors, and the plurality of sub-blocks.
  • the pixel mixing unit may be provided inside the solid-state imaging device.
  • the present invention it is possible to provide a technique for increasing sensitivity to reduce noise and spatial resolution reduction that occur in the mixing and adding process, and to reduce a video shock that occurs when the process is switched.
  • 1 is a functional block diagram of a three-plate imaging device according to a first embodiment. It is a block diagram of the pixel mixing part of the solid-state image sensing device concerning a 1st embodiment. It is the figure which showed the relationship between the extraction pixel used as the subblock and its input based on 1st Embodiment. It is an example of the conversion table with which the gain control part which concerns on 1st Embodiment is provided.
  • 1 is a block diagram of a three-plate image pickup apparatus of a comparative example according to the first embodiment. It is a functional block diagram of a single imaging device concerning a 2nd embodiment. It is a functional block diagram of a single imaging device of a comparative example according to the second embodiment.
  • pixel addition processing is performed using pixels in the N ⁇ N area around the pixel of interest.
  • the pixel area size is adaptively switched by a predetermined process in accordance with the sensitivity increase setting, and the generation of noise is suppressed and the decrease in spatial resolution is reduced according to the degree of sensitivity increase.
  • a plurality of pixels that are point-symmetric with respect to the target pixel are grouped, the pixel average values of each group are combined, apparently mixed and added in units of one pixel, and an image based on a level difference that may occur when switching sensitivity Reduce shock.
  • the three-plate imaging device 20a will be described in detail, and in the second embodiment, the single-plate imaging device 20b will be described in detail.
  • FIG. 1 is a functional block diagram of a three-plate imaging device 20a according to this embodiment.
  • the three-plate imaging device 20a mainly includes a lens 201, a spectral filter 202, a solid-state imaging device 203, a video processing unit 207, and a video output unit 211.
  • the subject image collected by the lens 201 is split into a red (R) component, a green (G) component, and a blue (B) component by the spectral filter 202, and is taken into the three solid-state imaging devices 203.
  • the solid-state imaging device 203 is not provided with a color filter array (CFA) in order to perform spectral separation with the spectral filter 202.
  • CFA color filter array
  • the solid-state image sensor 203 is, for example, a semiconductor image sensor such as a CCD image sensor or a COMS image sensor.
  • the solid-state image sensor 203 includes a solid-state image sensor (R) 203R, a solid-state image sensor (G) 203G, a solid-state image sensor corresponding to each of red (R), green (G), and blue (B) components. And an element (B) 203B.
  • the red (R) component light is taken into the solid-state imaging device (R) 203R.
  • the green (G) component light is taken into the solid-state imaging device (G) 203G.
  • the blue (B) component light is taken into the solid-state imaging device (B) 203B.
  • the solid-state imaging device (R) 203R, the solid-state imaging device (G) 203G, and the solid-state imaging device (B) 203B are elements having the same structure, and are simply referred to as “solid-state imaging device 203” unless otherwise distinguished. Will be described.
  • Each solid-state imaging device 203 includes an AMP (amplifier unit) 204, an ADC (A / D converter) 205, a pixel mixing unit 100a, and an IF unit 206.
  • AMP amplifier unit
  • ADC A / D converter
  • the AMP 204 multiplies the acquired component signal and executes the binning process described above if necessary.
  • the AMP 204 of the solid-state imaging device (B) 203B electrically amplifies a signal obtained by photoelectrically converting blue (B) component light in each pixel, and at the same time, adds signals (charges) of those adjacent pixels. By doing so, the binning process is executed.
  • the ADC 205 converts the multiplied signal from a 8-bit per-pixel digital value to a 14-bit digital value, and outputs the digital value to the pixel mixing unit 100a as a pixel value (also referred to as “pixel data”).
  • the pixel mixing unit 100a performs signal processing using a pixel mixing method, which will be described later, and outputs the processed signal to the IF unit 206.
  • the IF unit 206 adds a synchronization word consisting of a unique data string for frame synchronization to the pixel data output from the pixel mixing unit 100a, and then transfers the data to the video processing unit 207.
  • the video processing unit 207 includes a video processing unit (R) 207R corresponding to each of red (R) component, green (G) component, and blue (B) component light. G) 207G and a video processing unit (B) 207B. That is, the output of the solid-state imaging device (R) 203R is taken into the video processing unit (R) 207R. The output of the solid-state imaging device (G) 203G is taken into the video processing unit (G) 207G. The output of the solid-state image sensor (B) 203B is taken into the video processing unit (B) 207B.
  • the video processing unit (R) 207R, the video processing unit (G) 207G, and the video processing unit (B) 207B have a common structure. This will be described as “207”.
  • the video processing unit 207 includes an IF unit 210, a signal processing unit 209, and a pixel mixing unit 100b.
  • the IF unit 210 acquires pixel data from the solid-state image sensor 203, detects a synchronization word added to the pixel data, and generates a video timing signal that serves as a reference for subsequent processing. That is, the subsequent processing is synchronized with the timing signal generated by the IF unit 210.
  • the signal processing unit 209 improves correction processing such as flaws (pixel defects), image processing such as gamma correction and knee correction for ensuring a dynamic range, and visibility on the pixel data supplied from the IF unit 210. Signal processing such as noise reduction is performed.
  • the pixel mixing unit 100b performs a pixel mixing process for increasing sensitivity.
  • processing similar to that performed by the pixel mixing unit 100a of the solid-state imaging device 203 is performed.
  • the output of the ADC 205 in the solid-state image sensor 203 described above is digitized pixel data of red (R), green (G), or blue (B). That is, since the pixel mixing unit 100a in the solid-state imaging device 203 has the same interface as the pixel mixing unit 100b in the video processing unit 207, the same pixel mixing process can be efficiently performed by the two pixel mixing units 100a and 100b. .
  • the pixel data of each light processed by the three video processing units 207 is converted into various standard formats by the video output unit 211 and output as video signals.
  • FIG. 2 is a block diagram of the pixel mixing unit 100 a of the solid-state image sensor 203.
  • a maximum of 7 ⁇ 7 pixel mixing processing will be described as an example. Since the pixel mixing unit 100b of the video processing unit 207 also has the same function and configuration, description thereof is omitted.
  • the mixed pixel unit 100a receives pixel data and a 5-bit gain setting parameter signal (Gain_Para [4: 0]) as input, and outputs a mixed addition pixel obtained by mixing and adding in this block.
  • the pixel mixing unit 100a includes a pixel extraction circuit 300, a parallel sub-block group 301, a selector group 302 (302_1 to 302_12), a mixing and adding circuit 303, and a gain control unit 304.
  • the parallel sub-block group 301 is composed of sub-block (1) 301_1 to sub-block (12) 301_12 which are twelve sub-blocks provided in parallel.
  • the selector group 302 includes 12 selectors SEL (1) 302_1 to SEL (12) 302_12. SEL (1) 302_1 to SEL (12) 302_12 switch the outputs of sub-block (1) 301_1 to sub-block (12) 301_12, respectively.
  • the gain control unit 304 sends a 6-bit control signal (Gain [5: 0]) to the selector group 302 (subblock (1) 301_1 to subblock (12) 301_12) for controlling them. .
  • Gain [5: 0] is set in advance to correspond to Gain_Para [4: 0].
  • the pixel extraction circuit 300 delays input pixel data using a line memory and a delay element, and extracts a pixel of interest (centroid pixel) Pix_33 and surrounding pixels located in the vicinity thereof. In the present embodiment, 49 pixels corresponding to 7 ⁇ 7 pixels are simultaneously output by the pixel extraction circuit 300.
  • the 49 pixels output from the pixel extraction circuit 300 are allocated to the subsequent-stage parallel sub-block group 301 (sub-block (1) 301_1 to sub-block (12) 301_12) by four pixels depending on the positional relationship with the target pixel Pix_33.
  • the configuration shown in FIG. 2 is for explaining the principle, and in practice, a method (e.g., McClellan transformation) for performing an equivalent operation more efficiently can be implemented.
  • FIG. 3 is a diagram showing the relationship between sub-blocks and extracted pixels that are input to the sub-blocks. Specifically, FIGS. 3A to 3L correspond to sub-block (1) 301_1 to sub-block (12) 301_12, respectively.
  • Two pixels located symmetrically with respect to the target pixel Pix_33 serving as a central pixel are set as one set, and four pixels with the set being vertically or left-right symmetric are set as one group, that is, a value in units of four pixels (that is, four pixel values).
  • Addition processing is performed using a value based on the average of. From the total gain of 4 pixels, a gain of 1/4 (corresponding to 1 pixel), 2/4 (corresponding to 2 pixels), and 3/4 (corresponding to 3 pixels) is calculated.
  • FIG. 3A shows four pixels to be input to the sub-block (1) 301_1, and four pixels (Pix_23, Pix_43, Pix_32, and Pix_34) adjacent to the target pixel Pix_33 in the vertical and horizontal directions are sub-blocks.
  • the pixels input to the sub-block (2) 301_2 are four pixels (Pix_22, Pix_44, Pix_24, and Pix_42) that are adjacent to the target pixel (Pix_33) in the diagonal direction.
  • high sensitivity is set for an output with a small sub-block number
  • 0 or small sensitivity is set for an output with a large sub-block number.
  • This can be considered as an approximation of FIR filter coefficients expressed by a sinc function, a Gaussian function, or the like.
  • the subblocks with the smallest subblock number are added in order. For example, when a gain equivalent to 9 pixel addition is obtained, the total gain of 4 pixels for sub-block (1) 301_1 and sub-block (2) 301_2, and the total of 4 pixels for sub-block (3) 301_3. 1/4 of the gain (equivalent to one pixel) is used for addition.
  • sub-block (4) 301_4 is not used instead of sub-block (3) 301_3.
  • the pixels are added in order from the pixel with the highest correlation to the target pixel. It can be done.
  • Sub-block (1) 301_1 and sub-block (2) 301_2, sub-block (3) 301_3 and sub-block (4) 301_4, etc. having the same spatial distance are used in adaptive color plane interpolation (ACPI) or the like. Similar to the technique described above, the order of addition can be adaptively changed.
  • ACPI adaptive color plane interpolation
  • Each sub-block (sub-block (1) 301_1 to sub-block (12) 301_12) includes an adder circuit 306 and a multiplier circuit 307.
  • the adder circuit 306 performs an addition process for four input pixels.
  • the multiplier circuit 307 outputs an operation value obtained by multiplying the output value of the adder circuit 306 by a 1/4, 2/4, or 3/4 coefficient. These calculated values are mixed addition values of one pixel, two pixels, three pixels, and four pixels in each sub-block (sub-block (1) 301_1 to sub-block (12) 301_12).
  • the selector group 302 (SEL (1) 302_1 to SEL (12) 302_12) corresponds to one pixel, two pixels, three pixels, and four pixels in each sub-block (sub-block (1) 301_1 to sub-block (12) 301_12). Are selected and output.
  • the selected Sub_out_1 to Sub_out_12 signals are input to the final-stage mixed addition circuit 303.
  • a 6-bit control signal for controlling the selector group 302 (SEL (1) 302_1 to SEL (12) 302_12) will be described.
  • a 6-bit control signal (Gain [5: 0]) is output from the gain control unit 304.
  • FIG. 4 shows an example of a conversion table provided in the gain control unit 304.
  • the gain control unit 304 sets a 5-bit gain setting parameter (Gain_Para [4: 0]), which means the corresponding number of pixel mixtures, to uniquely output a 6-bit output control signal (Gain). [5: 0]), that is, the set gain value is output.
  • Gain [5: 0] 0Dh is obtained through the conversion table of FIG. 1) 301_1, sub-block (2) 301_2, and sub-block (3) 301_3 are selected, and the final stage of the mixing and adding circuit 303 performs pixel mixing processing using the 12 pixels related to the sub-block. It is output as a corresponding addition pixel. That is, the number of pixels to be subjected to pixel addition is 4n + 1 (n is a natural number). In the gain setting corresponding to 10 to 13 pixels, 13 pixels including the n sub-blocks and the central pixel are internally used for the mixing process.
  • the relationship between the number of pixels to be mixed and the gain is, for example, a relationship corresponding to a logarithmic function.
  • the reason for subblock units is that an average of four pixel values is used for steps in the same subblock, and therefore, in the same subblock, there is a slight blurring between the logarithmic function and strictly speaking.
  • the pixel area size can be adaptively switched by a predetermined process according to the sensitivity increase setting, and the generation of noise can be suppressed and the decrease in spatial resolution can be reduced according to the degree of sensitivity increase. it can.
  • a plurality of pixels located symmetrically with respect to the corresponding pixel are grouped, the pixel average values of each group are combined, and apparently mixed addition processing is performed in units of one pixel.
  • the video shock due to the level difference can be reduced.
  • FIG. 5 is a block diagram of a three-plate imaging device 200a of a comparative example.
  • the difference between the three-plate image pickup device 20a shown in FIG. 1 and the three-plate image pickup device 200a shown in FIG. 5 is that the pixel mixing section 100a of the solid-state image pickup device 203 is provided in the three-plate image pickup device 20a shown in FIG. No. 5 is that no pixel mixing section is provided.
  • the pixel mixing unit 208 of the three-plate imaging device 200a in FIG. 5 performs pixel mixing processing for increasing sensitivity.
  • the pixel mixing unit 208 for example, the pixel values of two pixels spatially adjacent in the horizontal direction are mixed and added, and the sensitivity is doubled. Because of such processing, the pixel area size cannot be adaptively changed by predetermined processing according to the sensitivity increase setting. Further, it is impossible to prevent image shock due to a level difference that may occur at the time of sensitivity switching.
  • the pixel mixing unit 100a of the solid-state imaging device 203 or the pixel mixing unit 100b of the video processing unit 207 may be used.
  • the pixel mixing unit 100a of the solid-state imaging device 203 may be configured to perform the processing proposed by the present embodiment, and the video processing unit 207 may perform the processing of the pixel mixing unit 208 shown in the comparative example.
  • pixel mixing performed in the pixel mixing units 100a and 100b can be performed in cooperation with binning performed in the element.
  • a gain increase of 4 or 16 times is not performed by the pixel mixing unit 100a or the like. This is performed by binning, and the gain increase in other fine steps is performed by the pixel mixing unit 100a or the like.
  • the target pixel mixture range (7 ⁇ 7, 5 ⁇ 5, 3 ⁇ 3) is switched. At that time, the sub-blocks within each mixing range are appropriately weighted and mixed and added.
  • FIG. 6 is a block diagram of a single-plate imaging device 20b according to this embodiment.
  • the pixel mixing process of the first embodiment (three-plate imaging device 20a) is applied to a single-plate imaging device 20b.
  • the components having the same function are denoted by the same reference numerals, and description thereof is omitted as appropriate.
  • the single-plate imaging device 20b includes a lens 201, an imaging element 213, a video processing unit 214, and a video output unit 211.
  • an imaging device 213 having an on-chip CFA 212 is used.
  • the subject image collected by the lens 201 is converted into red (R), green (G), and blue (B) color information by the CFA 212 formed inside the image sensor 213 and sent to the AMP 204.
  • the red (R), green (G), and blue (B) components are amplified by the AMPs 204 included in the three image pickup devices 203, respectively.
  • each pixel has only single color information of red (R), green (G), and blue (B). Therefore, by applying different pixel gains for each color, Amplification or the like can be performed with one AMP 204.
  • the ADC 205 converts the red (R), green (G), and blue (B) color information acquired from the AMP 204 into digitized pixel data, and outputs a Bayer array signal to the pixel mixing unit 101.
  • the pixel mixing unit 101 performs an image mixing process similar to that of the pixel mixing unit 100a of the first embodiment for each color, and outputs the result to the IF unit 206.
  • a method of processing for each color there are a method of switching by providing the conversion table of FIG. 4 for each color, and a method of separating the signal for each color and providing the configuration of the pixel mixing unit 100a of FIG. 2 for each color.
  • the IF unit 206 adds a unique synchronization word to the pixel data and transfers the pixel data to the video processing unit 214.
  • the IF unit 210 performs synchronization word detection similar to that of the three-plate imaging device 200a, and generates a reference video timing signal.
  • each pixel data of red (R), green (G), and blue (B) has the above-described Bayer arrangement, and is thus arranged only every other pixel.
  • the Bayer conversion unit 215 at the subsequent stage performs demosaicing processing, and complements the color information of red (R), green (G), and blue (B) that do not exist based on the information of the peripheral pixels.
  • each pixel has color information of red (R), green (G), and blue (B), and each is processed independently.
  • the signal processing unit 209 includes a signal processing unit (R) 209R for red (R) color information, a signal processing unit (G) 209G for color information of green (G), and a color of blue (B).
  • An information signal processor (B) 209B is provided.
  • the pixel mixing unit 100 includes a pixel mixing unit (R) 100R, a pixel mixing unit (G) 100G, and a pixel mixing unit (B) 100B.
  • the pixel mixing unit (R) 100R performs pixel mixing processing on the signal acquired from the signal processing unit (R) 209R.
  • the pixel mixing unit (G) 100G performs pixel mixing processing on the signal acquired from the signal processing unit (G) 209G.
  • the pixel mixing unit (B) 100B performs pixel mixing processing on the signal acquired from the signal processing unit (B) 209B.
  • the pixel data of each color is converted into various standard formats by the video output unit 211 and output as a video signal.
  • the pixel arrangement in the single plate type is not limited to the Bayer method, and an arbitrary arrangement may be used. In that case, the pixel extraction for each sub-block as shown in FIG. 3 needs to be designed to match the symmetry in the pixel array of the image sensor.
  • FIG. 7 shows a single-plate imaging device 200b of a comparative example.
  • the image pickup element 213 is not provided with a pixel mixing function.
  • the processing of the pixel mixing unit 208 of the video processing unit 214 is, for example, the pixel values of two pixels spatially adjacent in the horizontal direction as in the case of the three-plate imaging device 200a of the comparative example of the first embodiment. Are added together to increase sensitivity twice. Because of such processing, the pixel area size cannot be adaptively changed by predetermined processing according to the sensitivity increase setting. Further, it is impossible to prevent image shock due to a level difference that may occur at the time of sensitivity switching.
  • the pixel area size can be adaptively switched by a predetermined process according to the sensitivity increase setting, and the generation of noise is suppressed according to the degree of sensitivity increase, and the space
  • the reduction in resolution can also be reduced.
  • a plurality of pixels located symmetrically with respect to the corresponding pixel are grouped, the pixel average values of each group are combined, and apparently mixed addition processing is performed in units of one pixel.
  • the video shock due to the level difference can be reduced.
  • the present invention has been described based on the embodiments. This embodiment is an exemplification, and various modifications and applications can be made to combinations of these components.
  • the gain setting or addition pattern for the pixel mixing units 100a and 100b for each color does not necessarily have to be the same.
  • the configuration of the present embodiment is not limited to the purpose of increasing sensitivity, and can be operated as a spatial filter in a situation where sufficient illuminance or SNR is obtained, and compensation of aperture characteristics of the image sensor It can also be used for chromatic aberration compensation, diffraction aberration compensation called small aperture blur, and the like.
  • an addition pattern having such characteristics as to compensate for blurring that occurs remarkably in the B pixel may be set according to the aperture value.
  • pixel mixing is performed only on R and G pixel data that have a large effect on visibility, and pixel mixing is not performed on relatively low sensitivity B pixel data. You may make it suppress a fall.
  • B pixel data may be subjected to pixel addition to increase the bit depth, and the color reproducibility may be improved while preventing the SNR from being lowered by the linear matrix calculation.
  • the configuration of the embodiment of the present invention can provide SNR-spatial resolution scalability in various ways.
  • the present invention can be used for an imaging device having a solid-state imaging device, a surveillance camera system, and the like.
  • This application claims the benefit of priority based on Japanese Patent Application No. 2016-212803 filed on October 31, 2016, the entire disclosure of which is incorporated herein by reference.
  • 20a 3 plate type imaging device 20b Single plate type imaging device 100, 101, 100a, 100b Pixel mixing unit 100R Pixel mixing unit (R) 100G Pixel mixing unit (G) 100B Pixel mixing unit (B) 201 Lens 202 Spectral filter 203, 213 solid Imaging device 203R Solid-state imaging device (R) 203G Solid-state imaging device (G) 203B Solid-state imaging device (B) 204 AMP205 ADC206, 210 IF unit 207, 214 Video processing unit 207R Video processing unit (R) 207G Video processing unit (G) 207B Video processing unit (B) 209 Signal processing unit 209R Signal processing unit (R) 209G Signal processing unit (G) 209B Signal processing unit (B) 211 Video output unit 212 CFA215 Bayer conversion unit 300 Pixel extraction circuit 301 Parallel sub-block group 01_1 ⁇ 301_12 subblocks (1) to the sub-block (12) 302 selector group 302_1 ⁇ 302_12 SEL (1) ⁇ SEL (12) 303 mixed

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)
  • Color Television Image Signal Generators (AREA)
  • Studio Devices (AREA)

Abstract

L'invention concerne une technologie destinée à atténuer un bruit et une réduction de la résolution spatiale au cours d'un traitement de mélange et d'addition dans un dispositif d'imagerie, modérant ainsi un choc vidéo qui se produit au moment de la commutation du traitement. Une unité 100a de mélange de pixels du dispositif d'imagerie comprend: un circuit 300 d'extraction de pixels, un groupe 301 de sous-blocs parallèles constitué de sous-blocs placés en parallèle; un groupe sélecteur 302 qui commande les sorties des sous-blocs individuels; une unité 304 de commande de gain qui commande le groupe sélecteur 302; et un circuit 303 de mélange et d'addition qui additionne ensemble les sorties du groupe 301 de sous-blocs parallèles. Le groupe 301 de sous-blocs parallèles comprend douze sous-blocs, à savoir du sous-bloc (1) 301_1 au sous-bloc (12) 301_12. Ici, en tant que valeur de pixel qui est additionnée à un pixel d'intérêt, quatre pixels prédéterminés qui sont équidistants du pixel d'intérêt sont considérés comme un seul groupe, et la moyenne des valeurs de pixels des quatre pixels est utilisée en tant que valeur de pixel à l'intérieur de ce même groupe. Ensuite, les valeurs de pixels de pixels groupés sont introduites dans les sous-blocs individuels.
PCT/JP2017/031598 2016-10-31 2017-09-01 Dispositif d'imagerie WO2018079071A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2018547176A JP6697087B2 (ja) 2016-10-31 2017-09-01 撮像装置

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2016-212803 2016-10-31
JP2016212803 2016-10-31

Publications (1)

Publication Number Publication Date
WO2018079071A1 true WO2018079071A1 (fr) 2018-05-03

Family

ID=62024674

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2017/031598 WO2018079071A1 (fr) 2016-10-31 2017-09-01 Dispositif d'imagerie

Country Status (2)

Country Link
JP (1) JP6697087B2 (fr)
WO (1) WO2018079071A1 (fr)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07274069A (ja) * 1994-03-31 1995-10-20 Olympus Optical Co Ltd 画像入力装置
JP2013110644A (ja) * 2011-11-22 2013-06-06 Mitsubishi Electric Corp 撮像装置、及び輝度制御方法
JP2015046722A (ja) * 2013-08-27 2015-03-12 オリンパス株式会社 撮像装置、撮像システム及び画像処理方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07274069A (ja) * 1994-03-31 1995-10-20 Olympus Optical Co Ltd 画像入力装置
JP2013110644A (ja) * 2011-11-22 2013-06-06 Mitsubishi Electric Corp 撮像装置、及び輝度制御方法
JP2015046722A (ja) * 2013-08-27 2015-03-12 オリンパス株式会社 撮像装置、撮像システム及び画像処理方法

Also Published As

Publication number Publication date
JP6697087B2 (ja) 2020-05-20
JPWO2018079071A1 (ja) 2019-06-24

Similar Documents

Publication Publication Date Title
EP2037668B1 (fr) Appareil à capteur d'images et procédé pour améliorer la plage dynamique avec de multiples voies de circuit de lecture
WO2022088311A1 (fr) Procédé de traitement d'images, ensemble caméra et terminal mobile
US8077253B2 (en) Solid-state device having digital signal processing circuit
US8125543B2 (en) Solid-state imaging device and imaging apparatus with color correction based on light sensitivity detection
US8508625B2 (en) Image processing apparatus
US20150249795A1 (en) Imaging processing apparatus and method
US8305459B2 (en) Image processing apparatus and camera module
US8218038B2 (en) Multi-phase black level calibration method and system
JP7099446B2 (ja) 固体撮像装置および電子機器
AU2012374649A1 (en) Image processing device, image-capturing element, image processing method, and program
US20110234864A1 (en) Imaging device
JP2007306447A (ja) 撮像装置、および画像処理方法、並びにコンピュータ・プログラム
US8086032B2 (en) Image processing device, image processing method, and image pickup apparatus
JP2007174277A (ja) 画像信号処理装置、撮像装置、および画像信号処理方法、並びにコンピュータ・プログラム
JP4905279B2 (ja) 撮像回路および撮像装置
WO2011148573A1 (fr) Dispositif de prise d'image
CN112291479A (zh) 图像处理模组、图像处理方法、摄像头组件及移动终端
JP6095519B2 (ja) 撮像装置
US8823825B2 (en) Image processing device, image processing method, and solid-state imaging device
WO2018079071A1 (fr) Dispositif d'imagerie
JP2008177724A (ja) 画像入力装置、信号処理装置および信号処理方法
JP2006303774A (ja) 撮像装置
WO2021138869A1 (fr) Capteur d'image et dispositif comprenant un capteur d'image
US11985436B2 (en) Image sensor for converting analog pixel signal based on different bit precisions, imaging device, electronic device, image processing system and signal processing method
JP2012195675A (ja) 撮像装置

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 17863727

Country of ref document: EP

Kind code of ref document: A1

ENP Entry into the national phase

Ref document number: 2018547176

Country of ref document: JP

Kind code of ref document: A

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 17863727

Country of ref document: EP

Kind code of ref document: A1