WO2018074866A2 - Semiconductor light emitting device - Google Patents

Semiconductor light emitting device Download PDF

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Publication number
WO2018074866A2
WO2018074866A2 PCT/KR2017/011607 KR2017011607W WO2018074866A2 WO 2018074866 A2 WO2018074866 A2 WO 2018074866A2 KR 2017011607 W KR2017011607 W KR 2017011607W WO 2018074866 A2 WO2018074866 A2 WO 2018074866A2
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WO
WIPO (PCT)
Prior art keywords
light emitting
semiconductor light
emitting device
substrate
reflective layer
Prior art date
Application number
PCT/KR2017/011607
Other languages
French (fr)
Korean (ko)
Other versions
WO2018074866A3 (en
Inventor
김경민
한정우
김봉환
정겨울
조영관
Original Assignee
주식회사 세미콘라이트
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from KR1020160137618A external-priority patent/KR20180044039A/en
Priority claimed from KR1020160137620A external-priority patent/KR102017734B1/en
Priority claimed from KR1020160137624A external-priority patent/KR20180044470A/en
Priority claimed from KR1020160146893A external-priority patent/KR101877236B1/en
Priority claimed from KR1020160148754A external-priority patent/KR101863545B1/en
Application filed by 주식회사 세미콘라이트 filed Critical 주식회사 세미콘라이트
Publication of WO2018074866A2 publication Critical patent/WO2018074866A2/en
Publication of WO2018074866A3 publication Critical patent/WO2018074866A3/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/10Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • H01L33/46Reflective coating, e.g. dielectric Bragg reflector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/52Encapsulations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/58Optical field-shaping elements
    • H01L33/60Reflective elements

Definitions

  • the present disclosure relates generally to semiconductor light emitting devices, and more particularly, to semiconductor light emitting devices having improved light extraction efficiency.
  • FIG. 1 is a view illustrating an example of a conventional semiconductor light emitting device chip, wherein the semiconductor light emitting device chip has a growth layer 100 (eg, a sapphire substrate) and a buffer layer 200 and a first conductivity on the growth substrate 100.
  • the first semiconductor layer 300 eg n-type GaN layer
  • the active layer 400 that generates light through recombination of electrons and holes (eg, INGaN / (In) GaN MQWs), a second conductivity different from the first conductivity
  • the second semiconductor layer 500 for example, a p-type GaN layer having a plurality of layers is sequentially deposited, and a transmissive conductive film 600 for current diffusion and an electrode 700 serving as a bonding pad are formed thereon.
  • An electrode 800 eg, a Cr / Ni / Au laminated metal pad
  • the buffer layer 200 may be omitted.
  • the semiconductor light emitting device chip of the same type as that of FIG. 1 is called a lateral chip.
  • the growth substrate 100 side is electrically connected to the outside becomes a mounting surface.
  • FIG. 2 is a view showing another example of the semiconductor light emitting device chip disclosed in US Patent No. 7,262,436.
  • the semiconductor light emitting device chip includes a growth substrate 100 and a growth substrate 100, and a first semiconductor having a first conductivity.
  • the layer 300, an active layer 400 that generates light through recombination of electrons and holes, and a second semiconductor layer 500 having a second conductivity different from the first conductivity are sequentially deposited thereon, and a growth substrate (
  • the first electrode layer 901, the second electrode layer 902, and the third electrode layer 903, which are formed of three layers for reflecting light toward the side 100, are formed and are exposed by etching.
  • the electrode 800 which functions as a bonding pad is formed on ().
  • the first electrode film 901 may be an Ag reflecting film
  • the second electrode film 902 may be a Ni diffusion barrier film
  • the third electrode film 903 may be an Au bonding layer.
  • a semiconductor light emitting device chip of the same type as that of FIG. 2 is particularly referred to as a flip chip.
  • the electrode 800 formed on the first semiconductor layer 300 is at a height lower than that of the electrode films 901, 902, and 903 formed on the second semiconductor layer 500. It can also be formed.
  • the height reference may be a height from the growth substrate 100.
  • FIG 3 is a view showing an example of a conventional semiconductor light emitting device.
  • the semiconductor light emitting device 100 includes a vertical semiconductor light emitting chip 150 in the lead frames 110 and 120, the mold 130, and the cavity 140, and the cavity 140. Is filled with the encapsulant 170 containing the wavelength converting member 160.
  • the lower surface of the vertical semiconductor light emitting device chip 150 is electrically connected directly to the lead frame 110, and the upper surface is electrically connected to the lead frame 120 by the wire 180.
  • a portion of the light emitted from the vertical semiconductor light emitting device chip 150 may excite the wavelength conversion material 160 to produce light of different colors, and two different lights may be mixed to form white light.
  • the semiconductor light emitting device chip 150 may generate blue light, and light generated by being excited by the wavelength converting material 160 may be yellow light, and blue light and yellow light may be mixed to produce white light.
  • 3 illustrates a semiconductor light emitting device using the vertical semiconductor light emitting device chip 150, but a semiconductor light emitting device having a shape similar to that of FIG. 3 may be manufactured using the semiconductor light emitting device chips illustrated in FIGS. 1 and 2. have.
  • a first conductive portion, a second conductive portion, and an insulating portion positioned between the first conductive portion and the second conductive portion A substrate comprising; A body disposed on the substrate and including a bottom portion, the body having a hole formed in the bottom portion; A semiconductor light emitting device chip disposed on a substrate exposed by a hole and electrically connected to a substrate, comprising: a semiconductor having a plurality of semiconductor layers generating ultraviolet rays by recombination of electrons and holes, and electrodes electrically connected to the plurality of semiconductor layers Light emitting device chip;
  • a semiconductor light emitting device including a reflective layer formed on at least a portion of an inner surface of a body is provided.
  • a first conductive portion, a second conductive portion, and an insulating portion positioned between the first conductive portion and the second conductive portion A substrate comprising; A semiconductor light emitting device chip disposed on a substrate and electrically connected to a substrate, comprising: a semiconductor light emitting device chip having a plurality of semiconductor layers generating ultraviolet rays by recombination of electrons and holes, and electrodes electrically connected to the plurality of semiconductor layers; A wall disposed on the substrate and surrounding the semiconductor light emitting device chip; A wall, comprising: a wall comprising a bottom surface and a first face, the first face and a second face; An insulating adhesive layer interposed between the lower surface of the wall and the substrate; A bonding pad interposed between the substrate and the semiconductor light emitting device chip and electrically connecting the electrode and the substrate; And a reflective layer formed on at least a portion of the inner side surface of the wall, wherein the bonding pad is made of
  • a first conductive portion, a second conductive portion, and an insulating portion positioned between the first conductive portion and the second conductive portion A substrate comprising; A semiconductor light emitting device chip disposed on the substrate and electrically connected to the substrate; And a wall disposed on a side surface of the substrate and surrounding the semiconductor light emitting device chip and the substrate, the wall including a first surface connected to a lower surface of the wall and a second surface connected to the first surface.
  • the lower surface of the substrate and the substrate is provided with a semiconductor light emitting device, characterized in that located on the same line.
  • a semiconductor light emitting device comprising: a body including a bottom portion, the body having a hole formed in the bottom portion; A semiconductor light emitting device chip disposed on a substrate exposed by a hole and electrically connected to a substrate, comprising: a semiconductor having a plurality of semiconductor layers generating ultraviolet rays by recombination of electrons and holes, and electrodes electrically connected to the plurality of semiconductor layers Light emitting device chip; And a reflective layer formed on at least a portion of the inner side of the body, the reflective layer comprising: a coating layer having a first thickness by coating an insulating material on the inner side of the body; And a metal layer in contact with the coating layer and deposited with a metallic reflective material, the second layer having a second thickness.
  • a semiconductor light emitting device comprising: a body including a bottom portion having a plurality of holes formed in a longitudinal direction; A semiconductor light emitting device chip accommodated in each of the bottom hole formed on both sides of the body; A plurality of semiconductor layers including an active layer for generating light by recombination of electrons and holes and electrodes electrically connected to the plurality of semiconductor layers A semiconductor light emitting device chip; A reinforcing member formed in a hole in the bottom portion positioned between the semiconductor light emitting device chips; And an encapsulant filled in the body to fix the semiconductor light emitting device chip and the reinforcing material.
  • a body having a bottom portion in which a plurality of holes having different widths are formed in a longitudinal direction is disposed on a base.
  • a method of manufacturing a semiconductor light emitting device is provided.
  • FIG. 1 is a view showing an example of a conventional semiconductor light emitting device chip
  • FIG. 2 is a view showing another example of a semiconductor light emitting device chip disclosed in US Patent No. 7,262,436;
  • FIG. 3 is a view showing an example of a conventional semiconductor light emitting device
  • FIG. 5 is a view showing another example of a semiconductor light emitting device according to the present disclosure.
  • FIG. 6 is a view showing another example of a semiconductor light emitting device according to the present disclosure.
  • FIG. 7 is a view showing another example of a semiconductor light emitting device according to the present disclosure.
  • FIG. 8 is a view illustrating various embodiments of a semiconductor light emitting device disclosed in FIG. 7;
  • FIG. 9 is a view showing an example of a method of manufacturing a semiconductor light emitting device according to the present disclosure.
  • FIG. 10 is a view showing another example of a method of manufacturing a semiconductor light emitting device according to the present disclosure.
  • FIG. 11 illustrates an example of a semiconductor light emitting device according to the present disclosure
  • FIG. 12 illustrates another example of a semiconductor light emitting device according to the present disclosure
  • FIG. 13 is a view showing another example of a semiconductor light emitting device according to the present disclosure.
  • FIG. 14 is a view showing another example of a semiconductor light emitting device according to the present disclosure.
  • 15 to 19 illustrate an example of a method of manufacturing the semiconductor light emitting device shown in FIG. 10;
  • FIG. 20 is a view showing another example of the method of manufacturing the semiconductor light emitting device shown in FIG.
  • FIG. 21 illustrates an example of a semiconductor light emitting device according to the present disclosure
  • FIG. 22 illustrates another example of a semiconductor light emitting device according to the present disclosure
  • FIG. 23 is a view showing another example of a semiconductor light emitting device according to the present disclosure.
  • FIG. 24 is a view showing another example of a semiconductor light emitting device according to the present disclosure.
  • 25 is a view showing another example of a semiconductor light emitting device according to the present disclosure.
  • 26 is a view showing an example of a method of manufacturing a semiconductor light emitting device according to the present disclosure
  • FIG. 27 illustrates an example of a semiconductor light emitting device according to the present disclosure
  • 29 is a view showing another example of a semiconductor light emitting device according to the present disclosure.
  • FIG. 30 is a view showing another example of a semiconductor light emitting device according to the present disclosure.
  • FIG. 31 is a view showing another example of a semiconductor light emitting device according to the present disclosure.
  • FIG. 32 is a view showing another example of a semiconductor light emitting device according to the present disclosure.
  • FIG. 33 is a view showing an example of a method of manufacturing a semiconductor light emitting device according to the present disclosure.
  • 34 is a view showing an example of a method of manufacturing a semiconductor light emitting device according to the present disclosure.
  • 35 is a view showing another example of a semiconductor light emitting device according to the present disclosure.
  • 36 is a view showing another example of a semiconductor light emitting device according to the present disclosure.
  • FIG. 37 is a view showing another example of a semiconductor light emitting device according to the present disclosure.
  • 39 is a view showing another example of a semiconductor light emitting device according to the present disclosure.
  • FIG. 40 is a view showing another example of a semiconductor light emitting device according to the present disclosure.
  • 41 is a view showing an example of a method of manufacturing a semiconductor light emitting device according to the present disclosure.
  • FIG 43 is a view showing another example of a semiconductor light emitting device according to the present disclosure.
  • FIG. 4 is a diagram illustrating an example of a semiconductor light emitting device according to the present disclosure.
  • FIG. 4 (a) is a perspective view
  • FIG. 4 (b) is a cross-sectional view taken along AA ′
  • FIG. 4 (c) is a view showing a semiconductor light emitting device further including an insulating adhesive layer.
  • a semiconductor light emitting device including a reflective layer spaced apart from a substrate is shown.
  • the semiconductor light emitting device 200 includes a substrate 210, a semiconductor light emitting device chip 220, a body 230, a reflective layer 240, and an encapsulant 250.
  • the substrate 210 includes a first conductive portion 211, a second conductive portion 212, and an insulating portion 213 positioned between the first conductive portion 211 and the second conductive portion 212.
  • the method of manufacturing the substrate 210 is described in Korean Patent Laid-Open No. 2012-0140454.
  • the first conductive portion 211 and the second conductive portion 212 may be formed of a metallic material such as aluminum (Al), copper (Cu), or the like.
  • the first conductive portion 211 and the second conductive portion 212 have a lead frame function in the semiconductor light emitting device of FIG. 3 and are electrically connected to the outside.
  • the first conductive portion 211 and the second conductive portion 212 are excellent in electrical contact, for example, gold (Au), silver (Ag), nickel (Ni), aluminum (Al), rhodium (Rh). ), Lead (Pd), iridium (Ir), ruthenium (Ru), may be formed of a metal or alloy containing at least one of magnesium (Mg), zinc (Zn).
  • the first conductive portion 211 and the second conductive portion 212 are formed of a metallic material having excellent electrical contact, for example, gold (Au), the substrate 210 and the semiconductor light emitting device chip 220 ) And the electrical connection and physical connection with the body 230 can be facilitated to improve the reliability of the semiconductor light emitting device 200. Accordingly, light extraction efficiency of the semiconductor light emitting device 200 may be improved.
  • a metallic material having excellent electrical contact for example, gold (Au)
  • Au gold
  • the insulation unit 213 may be formed of an electrically insulating material, but is not limited thereto.
  • the semiconductor light emitting device chip 220 may include a first electrode 221 and a second electrode 222, and may be a lateral chip, a flip chip, or a vertical chip. However, when using a flip chip, the first electrode 221 and the second electrode 222 may be electrically connected to each other by being positioned on the first conductive portion 211 and the second conductive portion 212 without using wire bonding. desirable.
  • the height H1 of the substrate 210 may be formed to be the same as the height H2 of the body 230. However, the present invention is not limited thereto, and the height H1 of the substrate 210 may be smaller or larger than the height H2 of the body 230.
  • the body 230 is formed on the substrate 210 and surrounds the semiconductor light emitting device chip 220, and includes a sidewall 231 and a bottom portion 232.
  • the body 230 may be obtained through injection molding, for example, using an insulating material of resin-based or ceramic-based.
  • the height H2 of the body 230 may be smaller than the length L of the body 230.
  • the height H2 of the body 230 may be 0.1 mm or more and 0.6 mm or less, and the length L of the body 230 may be 0.5 mm or more.
  • the bottom portion 232 includes a hole 233. It also includes a cavity 234 formed by sidewalls 231 and bottom 232.
  • the bottom part 232 includes an upper surface 2320 and a lower surface 2321.
  • Sidewall 231 includes an outer surface 2310 and an inner surface 2311. On the other hand, the side wall 231 may not exist as needed.
  • the size of the hole 233 is similar to that of the semiconductor light emitting device chip 220 or 1.2 times the size of the semiconductor light emitting device chip 220.
  • the inner surface 2322 of the bottom portion 232 forming the hole 233 is preferably inclined to improve the light extraction efficiency.
  • the semiconductor light emitting device chip 220 is located in the hole 233.
  • the semiconductor light emitting device chip 220 may be a lateral chip, a vertical chip, and a flip chip.
  • the first electrode 221 and the second electrode 222 are not covered by the encapsulant 250 and are exposed from the lower surface of the encapsulant 250.
  • the height 2323 of the bottom portion 232 is preferably lower than the height 223 of the semiconductor light emitting device chip 220. This is because the light extraction efficiency of the semiconductor light emitting device 200 may be deteriorated when the height 2323 of the bottom portion 232 is higher than the height 223 of the semiconductor light emitting device chip 220. However, although the light extraction efficiency may be reduced, the height 2323 of the bottom portion 232 may be higher than the height 223 of the semiconductor light emitting device chip 220 in consideration of an optical path. A case in which the height 2323 of the bottom portion 232 is higher than the height 223 of the semiconductor light emitting device chip 220 will be described with reference to FIG. 7.
  • the height 2323 of the bottom part 232 and the height 223 of the semiconductor light emitting device chip 220 may be measured based on the bottom surface 2321 of the bottom part 232.
  • the height 223 of the semiconductor light emitting device chip 220 may be 0.05 mm or more and 0.5 mm or less.
  • the height 2323 of the bottom portion 232 may be 0.08 mm or more and 0.4 mm or less.
  • the reflective layer 240 is formed on an inner surface 2311 of the sidewall 231, an upper surface 2320 of the bottom portion 232, and one surface of an inner surface 2322 of the bottom portion 232.
  • the inner surface 2311 of the side wall 231, the upper surface 2320 of the bottom portion 232, and the inner surface 2322 of the bottom portion 232 are connected in one line. That is, the reflective layer 240 is formed on one surface of the body 230 that connects to the encapsulant 250 covering the semiconductor light emitting device chip 220.
  • the reflective layer 240 is preferably made of a highly efficient metallic material that reflects light, and for example, the metallic material may be formed by a method such as coating, plating, and deposition.
  • Examples of the metallic material forming the reflective layer 240 include silver (Ag) and aluminum (Al), but aluminum (Al) is preferable in consideration of cost and efficiency.
  • the reflective layer 240 is preferably formed of aluminum (Al) having high efficiency of reflecting from ultraviolet light. Since the reflective layer 240 is formed of aluminum (Al), light extraction efficiency of the semiconductor light emitting device may be improved by reflecting a portion of light, for example, ultraviolet light, emitted from the semiconductor light emitting device chip 220. .
  • a reflective layer may be formed on the upper surface of the body 230.
  • a reflective layer may be formed by coating a metallic material or a DBR distributed Bragg reflector (DBR) on the upper surface of the body 230.
  • DBR distributed Bragg reflector
  • an insulating layer 2320 may be separately formed on the inner surface 2232 of the bottom part 232 to reduce the risk of short circuit.
  • an insulating adhesive layer 235 may be interposed between the lower surface 2321 of the bottom part 232 and the substrate 210.
  • the insulating adhesive layer 235 is formed by bonding the substrate 210 and the body 230 using an insulating adhesive, wherein a portion of the insulating adhesive is formed on the first inner surface 241 to be shortened by the metallic reflective layer 240. The risk may be lower.
  • the reflective layer 240 has an inner side surface 2232 of the bottom portion 232 except for a portion 2321 in contact with the substrate 210 of the inner side surface 2232 of the bottom portion 232. And the inner side surface 2311 of the side wall 231. Accordingly, since the reflective layer 240 is spaced apart from the substrate 210 at predetermined intervals, short risks may be prevented between the reflective layer 240 made of a metallic material and the substrate 210.
  • the reflective layer 240 is formed only on the inner surface 2311 of the sidewall 231 except for the inner surface 2232 of the bottom portion 232, thereby forming the reflective layer 240 and the substrate 210 made of a metallic material. Shorter risks can be made in between.
  • the encapsulant 250 is provided at least in the cavity 214 to cover the semiconductor light emitting device chip 220, so that the semiconductor light emitting device chip 220 positioned in the hole 233 may be fixed to the body 230.
  • the encapsulant 250 has a light transmitting property, and may be formed of one of an epoxy resin and a silicone resin.
  • the encapsulant 250 may be made of PDMS (polydimethylsiloxane) resin. . Meanwhile, the encapsulant 250 may be omitted. When the encapsulant 250 is omitted, the encapsulant 250 may be covered with glass or quartz.
  • FIG. 5 is a view showing another example of a semiconductor light emitting device according to the present disclosure.
  • FIG. 5 is a view showing another example of a semiconductor light emitting device according to the present disclosure.
  • the semiconductor light emitting device 300 includes a reflective material 360 between the bottom portion 331 of the body 330 and the semiconductor light emitting device chip 320.
  • the semiconductor light emitting device has the same characteristics as the semiconductor light emitting device 200 of FIG. 4.
  • the reflective material 360 is positioned on the side surface of the semiconductor light emitting device chip 320, the light emitted from the side surface of the semiconductor light emitting device chip 320 may be reflected, thereby improving light extraction efficiency of the semiconductor light emitting device 300.
  • the reflective material 360 is preferably a white reflective material.
  • it may be a white silicone resin.
  • the reflective material 360 may be positioned to form a space 331 between the reflective material 360 and the semiconductor light emitting device chip 320.
  • FIG. 6 is a view illustrating another example of a semiconductor light emitting device according to the present disclosure.
  • the semiconductor light emitting device 400 includes a plurality of holes 401 at the bottom 411 of the body 430, and the semiconductor light emitting device chip 420 is positioned in each hole 401.
  • the semiconductor light emitting device 200 of FIG. 4 is identical to the semiconductor light emitting device 200 of FIG. 4 except that the semiconductor light emitting device chip 420 is positioned in the plurality of holes 401 and each hole 401, and the reflective layer 240 shown in FIG. Has characteristics.
  • the semiconductor light emitting device chips 420 disposed in the holes 401 may emit different colors.
  • FIG 7 illustrates another example of the semiconductor light emitting device according to the present disclosure.
  • the semiconductor light emitting device 500 is characterized in that the height 5323 of the bottom 532 of the body 530 is higher than the height 523 of the semiconductor light emitting device chip 520.
  • FIG. 7A illustrates the semiconductor light emitting device 200 when the height 2323 of the bottom portion 232 is lower than the height 223 of the semiconductor light emitting device 220 as the semiconductor light emitting device 200 of FIG. 4. Show the path of light 224, 225 coming from the side of 220.
  • FIG. 7B illustrates light 524 and 525 of light emitted from the side of the semiconductor LED chip 520 when the height 5323 of the bottom portion 532 is higher than the height 523 of the semiconductor LED chip 520. Show the path.
  • light 224 emitted from a portion lower than the height 2323 of the bottom portion 232 of the light 224 and 225 emitted from the side surface of the semiconductor LED chip 220 may be a hole 233.
  • the light 225 coming from a portion higher than the height 2323 of the bottom portion 232 is the bottom portion forming a hole (233) ( It is not reflected by the inner side surface 2232 of the 232 and goes upward.
  • the height of the bottom portion is preferably lower than the height of the semiconductor light emitting device chip as shown in FIG. 7 (a). Is higher than the height of the semiconductor light emitting device chip 520.
  • the bottom portion 532 which forms the hole 533 so that the width 5331 of the lower opening of the hole is larger than the width 5330 of the upper opening of the hole 533 is formed.
  • the inner side surface 5322 is inclined, most of the light 525 emitted from the side surface of the semiconductor light emitting device chip 520 does not go upward. Therefore, when the height 5323 of the bottom portion 532 is higher than the height 523 of the semiconductor light emitting device chip 520, the inner surface 5322 of the bottom portion 532 forming the hole 533 may be a hole 533. It is preferable to incline so that the width 5330 of the upper opening of the hole may be larger than the width 5331 of the lower opening of the hole 533.
  • the semiconductor light emitting device 500 is substantially the same as the semiconductor light emitting device 200 of FIG. 4.
  • FIG. 8 is a view illustrating various embodiments of the semiconductor light emitting device disclosed in FIG. 7.
  • the height 5323 of the bottom portion 532 is two times or less higher than the height 523 of the semiconductor light emitting device chip 520. It is preferable in terms of light extraction efficiency. When higher than twice, for example, the light 525 from the side surface of the semiconductor light emitting device chip 520 is reflected on the inner surface 5322 of the bottom portion 532 as shown in FIG. Because some may be lost.
  • the inclination angle 7324 formed by the inner surface 5322 of the bottom portion 532 and the lower surface 7321 of the bottom portion 5322 is preferably 45 ° or more. If the angle is less than 45 °, the effect of adjusting the path of the light 525 emitted from the side surface of the semiconductor light emitting device chip 520 by the inner side surface 5322 of the bottom portion 532 is inferior. In addition, it is preferable that the inclination angle 5324 formed by the inner surface 5322 of the bottom portion 532 and the lower surface 5321 of the bottom portion 532 be 90 ° or less. The problem which arises when the inclination angle 5324 exceeds 90 degrees was demonstrated in FIG.7 (c).
  • FIG. 9 is a view illustrating an example of a method of manufacturing a semiconductor light emitting device according to the present disclosure.
  • a body 630 including a hole 633 is prepared.
  • the body 630 may be obtained through injection molding.
  • a reflective layer 640 is formed on the inner surface of the body 630.
  • the reflective layer 640 may be formed using a deposition method or a spray coating.
  • the body 630 having the reflective layer 640 is disposed on the substrate 610.
  • An insulating adhesive layer 635 may be interposed between the bottom surface of the bottom portion 632 and the substrate 610.
  • the semiconductor light emitting device chip 620 is positioned in the hole 633. Accordingly, the height 6223 of the bottom portion 632 may be higher than the height of the semiconductor light emitting device chip 620 accommodated in the hole 633.
  • the first electrode 621 and the second electrode 622 of the semiconductor light emitting device chip 620 are positioned on the first conductive portion 611 and the second conductive portion 612 of the substrate 610, respectively, so as to be electrically and physically separated from each other. Is connected.
  • the semiconductor light emitting device chip 620 is covered with an encapsulant 650 to fix the semiconductor light emitting device chip 620 to the body 630.
  • the order of the manufacturing method of the semiconductor light emitting device according to the present disclosure may be included in the scope of the present disclosure as long as the skilled person can easily change.
  • the substrate (for the alignment between the first electrode 621 and the second electrode 622 of the semiconductor light emitting device chip 620 and the first conductive portion 611 and the second conductive portion 612 of the substrate 610).
  • the semiconductor light emitting device chip 620 may be disposed first on the 610.
  • the body 630 including the hole 633 is disposed on the substrate 610.
  • the order of the manufacturing method of the semiconductor light emitting device according to the present disclosure may be included in the scope of the present disclosure as long as the skilled person can easily change.
  • FIG. 10 is a view showing a method of manufacturing the semiconductor light emitting device shown in FIG.
  • the adhesive layer 2 is coated on the base 1.
  • the adhesive layer 2 has a thickness of 3 ⁇ m or more and 20 ⁇ m or less, and is made of silicone or acrylic material.
  • the thickness of the adhesive layer 2 preferably has a thickness of 8 ⁇ m to 10 ⁇ m.
  • the body 730 including the holes 733 is fixed on the base 1 by using the adhesive layer 2 applied on the base 1.
  • protruding portions 3a and 3b are formed at portions where the adhesive layer 2 and the body 730 come into contact with each other by the frictional force between the adhesive layer 2 and the body 730 to cure.
  • the thickness of the adhesive layer 2 is between 8 ⁇ m and 10 ⁇ m, the protruding portions 3a and 3b of the adhesive layer 2 that protrude and harden at the portion where the adhesive layer 2 and the body 730 contact each other are about. It has a thickness of 3 micrometers-8 micrometers.
  • the reflective layer 740 is formed on the inner surface of the body 730.
  • the reflective layer 740 may be formed using a deposition method or a spray coating.
  • the body 730 on which the reflective layer 740 is formed is separated from the base 1.
  • the adhesive layer 2 is removed through a separate etching process.
  • the reflective layer 740 protrudes from the contact portion of the adhesive layer 2 and the body 730, and a part of the inner side surface 7322 of the bottom portion 732 by the protruding portion 3a of the hardened adhesive layer 2. Except for the inner surface 7322 of the bottom portion 732 and the inner surface 7311 of the side wall 731 is formed.
  • an inner side surface of the bottom portion 732 except for a portion 7321 of the bottom portion 732 inner side surface 7322 contacting the substrate 710 on the substrate 710.
  • a body 730 is disposed that includes a reflective layer 740 formed only on the inner surface 7311 of the sidewall 731 and the 7322.
  • An insulating adhesive layer 735 may be interposed between the bottom surface of the bottom portion 732 and the substrate 710.
  • the order of the manufacturing method of the semiconductor light emitting device according to the present disclosure may be included in the scope of the present disclosure as long as the skilled person can easily change.
  • FIG. 11 is a view showing an example of a semiconductor light emitting device for generating ultraviolet light according to the present disclosure.
  • the semiconductor light emitting device shown in FIG. 11 may have the shape of a semiconductor light emitting device of the type shown in FIGS. 4 to 10.
  • the walls can have various shapes.
  • FIG. 11A is a perspective view
  • FIG. 11B is a cross-sectional view taken along AA ′
  • FIG. 11C is a view showing a reflection path of ultraviolet rays
  • FIG. 11D further includes an insulating adhesive layer. It is a figure which shows the semiconductor light emitting element.
  • the semiconductor light emitting device 200 includes a substrate 210, a semiconductor light emitting device chip 220, a bonding pad 230, a wall 240, a reflective layer 250, and an encapsulant 260.
  • the substrate 210 includes a first conductive portion 211, a second conductive portion 212, and an insulating portion 213 positioned between the first conductive portion 211 and the second conductive portion 212.
  • the method of manufacturing the substrate 210 is described in Korean Patent Laid-Open No. 2012-0140454.
  • the first conductive portion 211 and the second conductive portion 212 may be formed of a metallic material such as aluminum (Al), copper (Cu), or the like.
  • the first conductive portion 211 and the second conductive portion 212 have a lead frame function in the semiconductor light emitting device of FIG. 3 and are electrically connected to the outside.
  • the first conductive portion 211 and the second conductive portion 212 have a high reflectivity and high reflectivity and excellent electrical bonding properties, for example, silver (Ag), nickel (Ni), and aluminum. It may be formed of a metal or an alloy including at least one of (Al), rhodium (Rh), lead (Pd), iridium (Ir), ruthenium (Ru), magnesium (Mg), and zinc (Zn).
  • the first conductive portion 211 and the second conductive portion 212 are formed of aluminum (Al) having high efficiency of reflecting ultraviolet rays
  • the light emitted from the semiconductor light emitting device chip 220 may be, for example, ultraviolet rays.
  • the light extraction efficiency of the semiconductor light emitting device can be improved.
  • the insulation unit 213 may be formed of an electrically insulating material, but is not limited thereto.
  • the semiconductor light emitting device chip 220 may include a first electrode 221 and a second electrode 222, and may be a lateral chip, a flip chip, or a vertical chip. However, when using a flip chip, the first electrode 221 and the second electrode 222 may be electrically connected to each other by being positioned on the first conductive portion 211 and the second conductive portion 212 without using wire bonding. desirable.
  • the bonding pad 230 includes a first bonding pad 231, a second bonding pad 232, and a third bonding pad 233.
  • the bonding pad 230 made of a metallic material having excellent bonding properties is made of a material different from the first electrode 221 and the second electrode 222 made of a metallic material having excellent reflectivity.
  • the bonding pad 230 may be formed by a deposition or plating method, but is not limited thereto.
  • the first bonding pad 231 is positioned between the first conductive portion 211 and the first electrode 221 and electrically and physically connects the substrate 210 and the semiconductor light emitting device chip 220.
  • the thickness of the first bonding pad 231 is preferably about 3 ⁇ m or more in order to electrically and physically connect the first conductive portion 211 and the first electrode 221, the semiconductor light emitting device 200 may have a thickness in terms of physical aspects. Less than about 10 micrometers is preferred to facilitate electrical connection from an electrical standpoint without affecting size.
  • the width of the first bonding pad 231 may be smaller than the width of the first conductive portion 211, but may also be the same width as the first conductive portion 211.
  • the first bonding pad 231 is formed smaller than the width of the substrate 210.
  • the first bonding pad 231 may be formed of a metal material having excellent bonding properties and high conductivity, for example, gold (Au), platinum (Pt), AuSn, or the like, but is not limited thereto.
  • the first bonding pad 231 is formed of gold (Au), thereby facilitating electrical and physical connection between the first conductive portion 211 and the first electrode 221 to improve reliability of the semiconductor light emitting device. Can be improved.
  • the second bonding pad 232 is positioned between the second conductive portion 212 and the second electrode 222 to electrically and physically connect the substrate 210 and the semiconductor light emitting device chip 220.
  • the thickness of the second bonding pad 232 is preferably about 3 ⁇ m or more in order to electrically and physically connect the second conductive portion 212 and the second electrode 222. Less than about 10 micrometers is preferred to facilitate electrical connection from an electrical standpoint without affecting size.
  • the thickness of the second bonding pad 232 is preferably formed to be the same as the thickness of the first bonding pad 231.
  • the width of the second bonding pad 232 may be smaller than the width of the second conductive portion 212, but may be formed to have the same width as that of the second conductive portion 212.
  • the second bonding pads 232 are formed to be smaller than the width of the substrate 210.
  • the second bonding pads 232 may be formed to be the same as, or larger than, or smaller than the width of the first bonding pads 231.
  • the second bonding pad 232 may be formed of a metal material having excellent bonding and high conductivity, for example, platinum (Pt), gold (Au), AuSn, or the like, but is not limited thereto.
  • the second bonding pad 232 is formed of gold (Au) to facilitate electrical and physical connection between the second conductive portion 212 and the second electrode 222 to improve the reliability of the semiconductor light emitting device. You can.
  • the second bonding pads 232 may be formed of the same material as the first bonding pads 231 at the same time to simplify the process of the bonding pads 230.
  • the third bonding pads 233 are positioned on the bottom surface opposite to the top surface of the substrate 210 in contact with the semiconductor light emitting device chip 220, and are electrically and physically connected to the outside.
  • the third bonding pads 233 are formed on the entire lower surface of the substrate 210 except for the insulating portion 213.
  • the third bonding pads 233 may be omitted.
  • the wall 240 is formed on the substrate 210 and surrounds the semiconductor light emitting device chip 220, and includes a first inner side surface 241, a second inner side surface 242, and a lower surface 243.
  • the wall 240 can be obtained through injection molding using an insulating material such as, for example, an epoxy resin or a silicone resin.
  • the wall 240 is not limited thereto, and may be formed of metal.
  • the first inner surface 241 is connected to the lower surface 243, and the second inner surface 242 is connected to the first inner surface 241.
  • the reflective layer 250 is formed on one surface of the second inner side surface 242 of the wall 240. That is, the reflective layer 250 is formed on one surface of the second inner side surface 242 in contact with the encapsulant 260 covering the semiconductor light emitting device chip 220.
  • the reflective layer 250 is preferably made of a metallic material having high efficiency of reflecting light, and for example, the metallic material may be formed by a method such as coating, plating, and deposition.
  • the metallic material forming the reflective layer 250 examples include silver (Ag), aluminum (Al), and the like, but when the semiconductor light emitting device chip 220 is used as an ultraviolet chip, the reflective layer 240 reflects light in ultraviolet rays. It is preferable to form from this high aluminum (Al).
  • the reflective layer 250 may be formed of the same material as the first conductive portion 211 and the second conductive portion 212, but is not limited thereto and may be formed of a metallic material having high reflectance.
  • the reflective layer 250 made of the metallic material is formed on the first inner side surface 241
  • the reflective layer 250 is not formed on the first inner side surface 241, and the second inner side surface ( 242 only.
  • the first inner side surface 241 is formed so that the reflective layer 250 is not formed on the first inner side surface 241. It is preferable that the inclination angle 245 of the lower surface 243 of the wall 240 is an obtuse angle.
  • the inclination angle 246 of the second inner surface 242 and the imaginary surface 247 parallel to the lower surface 243 of the wall 240 is an acute angle to extract the light extraction efficiency reflected by the reflective layer 250. It is preferable because it can raise.
  • the first conductive portion 211 and the second conductive portion 212 are formed of aluminum (Al) having high efficiency reflecting from ultraviolet rays, the first conductive portion 211 and the second conductive portion 212 are reflected from the light emitted from the semiconductor light emitting device chip 220 or the reflective layer 250. By reflecting a part of the light, the light extraction efficiency of the semiconductor light emitting device can be improved.
  • an insulating adhesive layer 270 may be interposed between the lower surface 243 of the wall 240 and the substrate 210.
  • the insulating adhesive layer 270 is formed by bonding the substrate 210 and the wall 240 using an insulating adhesive, wherein a part of the insulating adhesive is formed on the first inner surface 241 to be shorted by the metallic reflective layer 250. The risk may be lower.
  • the height 248 of the point where the first inner side surface 241 and the second inner side surface 242 meet is preferably 5 ⁇ m or more for preventing short, but for the light extraction efficiency, the first inner surface in which the reflective layer 250 is not formed is formed. Less than 50 ⁇ m is preferred in that the side 241 should be small.
  • a reflective layer 250 may be formed on the top surface 249 of the wall 240.
  • the present disclosure is that the metallic reflective layer 250 is not formed on the first inner side surface 241, and that the reflective layer is not excluded from the first inner side surface 241 as necessary.
  • the encapsulant 260 is formed to cover the semiconductor light emitting device chip 220.
  • the encapsulant 260 may be formed of one of epoxy resin and silicone resin, and may be made of PDMS (polydimethylsiloxane) resin when the semiconductor light emitting device chip 220 is used as an ultraviolet chip. Meanwhile, the encapsulant 260 may be omitted. When the encapsulant 260 is omitted, the encapsulant 260 may be covered with glass or quartz.
  • PDMS polydimethylsiloxane
  • FIG 12 illustrates another example of the semiconductor light emitting device according to the present disclosure.
  • the semiconductor light emitting device 300 includes a wall 340 having an inner side surface 341 having a circular shape.
  • the inner surface 341 of the wall 340 may have various shapes such as a rectangle and a circle.
  • the semiconductor light emitting device 300 is substantially the same as the semiconductor light emitting device 200 of FIG. 11.
  • FIG. 13 illustrates another example of a semiconductor light emitting device according to the present disclosure.
  • the inclination angle 444 formed by the first inner surface 441 of the wall 440 and the lower surface 443 of the wall 440 is an acute angle.
  • An inclination angle 444 of the first inner surface 441 and the lower surface 443 of the wall 440 is preferably an obtuse angle as shown in FIG. 11, but does not exclude the acute angle.
  • the semiconductor light emitting device 400 is substantially the same as the semiconductor light emitting device 200 of FIG. 11.
  • FIG. 14 is a view showing another example of a semiconductor light emitting device according to the present disclosure.
  • an insulating layer 542 is formed on the first inner side surface 541 of the wall 540.
  • the wall 540 is formed of an insulating material
  • the reflective layer 543 may be formed on a part of the first inner surface 541 in the process of forming the reflective layer 543 on the inner surface of the wall 540. 543), the insulating layer 542 may be separately formed on the first inner surface 541 to reduce the risk of short circuit.
  • the semiconductor light emitting device 500 is substantially the same as the semiconductor light emitting device 200 of FIG. 11.
  • 15 to 19 are diagrams for describing an example of a method of manufacturing the semiconductor light emitting device shown in FIG. 11.
  • a substrate 210 is prepared, and bonding pads 230 are formed on upper and lower surfaces of the substrate 210 for electrical and physical connection with the semiconductor light emitting device chip 220 and the outside. do.
  • the bonding pad 230 may be formed through a pattern forming process, but is not limited thereto.
  • a substrate 210 is prepared, and bonding pads 230 are formed on upper and lower surfaces of the substrate 210 for electrical and physical connection with the semiconductor light emitting device chip 220 and the outside. do.
  • the bonding pad 230 may be formed through a pattern forming process, but is not limited thereto.
  • the bonding pads 230 are formed of gold (Au) using a pattern forming process, thereby to provide electrical and external connection between the second conductive portion 212 and the second electrode 222 and the outside of the substrate 210.
  • Au gold
  • the substrate 210 is prepared, and as shown in FIG. 15A, a mask 230a having a pattern in which a portion on which the bonding pad 230 is to be formed is exposed on the substrate 210 is exposed to the substrate 210. ).
  • a bonding pad 230 is formed in a portion exposed by the mask 230a.
  • the bonding pad 230 may be formed by a deposition or plating method, but is not limited thereto.
  • first bonding pads 231 and the second bonding pads 232 are partially disposed on the portion where the semiconductor light emitting device chip 220 is to be fixed to the upper surface of the substrate 210.
  • the third bonding pads 233 are simultaneously formed on the entire lower surface of the substrate 210 except for the insulating portion 213 of the substrate 210 for connection with the outside.
  • the bonding pad 230 is formed by removing the mask 230a through a separate etching process.
  • the wall 240 is formed on the upper surface of the substrate 210.
  • Wall 240 may be obtained through injection molding, for example, using an insulating material such as epoxy resin or silicone resin.
  • the wall 240 is not limited thereto, and may be formed of metal.
  • the wall 240 may be recognized as a pattern for correcting the position or angle at which the device transfer device (not shown) is to place the semiconductor light emitting device chip 220, and functions as a dam of the encapsulant 260. .
  • an insulating adhesive layer 270 is applied to a portion where the wall 240 is to be formed in order to form the wall 240 on the upper surface of the substrate 210.
  • the wall 240 is fixed on the substrate 210 by disposing the wall 240 on the insulating adhesive layer 270 before the insulating adhesive layer 270 is cured. That is, the insulating adhesive layer 270 is cured for a predetermined time to fix the wall 240 on the substrate 210.
  • the wall 240 on which the reflective layer 250 is formed is formed as follows.
  • a wall 240 formed by injection molding is disposed on the base 1.
  • the base 1 may be a rigid metal plate or a nonmetal plate, or may be a flexible film or tape.
  • the reflective layer 250 is formed on one surface of the second inner side surface 242 of the wall 240.
  • the reflective layer 250 may be formed using a deposition method or a spray coating.
  • the wall 240 on which the reflective layer 250 is formed is separated from the base 1.
  • the base 1 and the wall 240 may be pressed by external force to contact each other, or may adhere to each other using an adhesive material.
  • the adhesive material may be variously selected from conductive pastes, insulating pastes, polymer adhesives, and the like, and is not particularly limited. In some temperature ranges, the use of a material that loses adhesion may facilitate separation in the temperature range at the time of separation of the base 1 and the wall 240.
  • the wall 240 on which the reflective layer 250 is formed may be picked up from the base 1 and placed on the substrate 210.
  • the wall 240 on which the reflective layer 250 is formed is separated from the base 1, and at that moment, the device transfer device is formed on the reflective layer (
  • the wall 240 formed with the 250 may be electrically adsorbed or vacuum adsorbed.
  • a reflective layer 250 is formed on the substrate 210 to which the insulating adhesive layer 270 is applied using a device transfer device that recognizes a pattern of the substrate 210 and the bonding pads 230 and corrects position and angle.
  • Wall 240 may be disposed.
  • a separate device transfer device capable of recognizing a pattern of the wall 240, the first bonding pad 231, and the second bonding pad 232, and correcting a position and an angle thereof.
  • the semiconductor light emitting device chip 220 is disposed on the front surface of the substrate 210 by using a.
  • the first bonding pad 231 and the second bonding pad 232 disposed on the first electrode 221, the second electrode 222, and the upper surface of the substrate 210 of the semiconductor light emitting device chip 220 may be formed. Arrange to correspond to each other.
  • the first conductive portion 211 and the second conductive portion 212 of the substrate 210 and the semiconductor light emitting device By electrically and physically connecting the first electrode 221 and the second electrode 222 of the chip 220, the semiconductor light emitting device chip 220 is fixed to the front surface of the substrate 210.
  • the encapsulant 260 is added to the upper surface of the substrate 210 on which the semiconductor light emitting device chip 220 is disposed, and cured.
  • the encapsulant 260 may be formed using dispensing, a stencil, screen printing, or spin coating. Dispensing is preferable from the viewpoint of the uniformity of thickness, the internal density of the phosphor, and the like.
  • the encapsulant 260 may be one of an epoxy resin and a silicone resin generally used in the semiconductor light emitting device field. Meanwhile, the encapsulant 260 may be omitted. When the encapsulant 260 is omitted, the encapsulant 260 may be covered with glass or quartz.
  • the order of the manufacturing method of the semiconductor light emitting device according to the present disclosure may be included in the scope of the present disclosure as long as the skilled person can easily change.
  • the wall 240 is disposed on the substrate 210 to align the first bonding pad 231 and the second bonding pad 232 with the first electrode 221 and the second electrode 222.
  • the semiconductor light emitting device chip 220 may be first disposed before the semiconductor light emitting device chip is disposed.
  • the order of the manufacturing method of the semiconductor light emitting device according to the present disclosure may be included in the scope of the present disclosure as long as the skilled person can easily change.
  • 21 is a diagram illustrating an example of a semiconductor light emitting device according to the present disclosure.
  • FIG. 21A is a perspective view and FIG. 21B is a cross-sectional view taken along AA ′.
  • the semiconductor light emitting device 200 may include a substrate 210, a semiconductor light emitting device chip 220, a wall 230, and an encapsulant 240.
  • the substrate 210 includes a first conductive portion 211, a second conductive portion 212, and an insulating portion 213 positioned between the first conductive portion 211 and the second conductive portion 212.
  • the method of manufacturing the substrate 210 is described in Korean Patent Laid-Open No. 2012-0140454.
  • the first conductive portion 211 and the second conductive portion 212 may be formed of a metallic material such as aluminum (Al), copper (Cu), or the like.
  • the first conductive portion 211 and the second conductive portion 212 have a lead frame function in the semiconductor light emitting device of FIG. 3 and are electrically connected to the outside.
  • the first conductive portion 211 and the second conductive portion 212 have a high reflectivity and high reflectivity and excellent electrical contact, for example, silver (Ag), nickel (Ni), aluminum ( It may be formed of a metal or an alloy including at least one of Al, rhodium (Rh), lead (Pd), iridium (Ir), ruthenium (Ru), magnesium (Mg), zinc (Zn).
  • the first conductive portion 211 and the second conductive portion 212 are formed of aluminum (Al) having high efficiency of reflecting light, for example, ultraviolet rays, the light emitted from the semiconductor light emitting device chip 220 By reflecting a part, light extraction efficiency of the semiconductor light emitting device can be improved.
  • Al aluminum
  • the insulation unit 213 may be formed of an electrically insulating material, but is not limited thereto.
  • the semiconductor light emitting device chip 220 may include a first electrode 221 and a second electrode 222, and may be a lateral chip, a flip chip, or a vertical chip. However, when using a flip chip, the first electrode 221 and the second electrode 222 may be electrically connected to each other by being positioned on the first conductive portion 211 and the second conductive portion 212 without using wire bonding. desirable.
  • the wall 230 includes a first inner side 231, a second inner side 232, and a bottom side 233.
  • the wall 230 is formed on the side of the substrate 210 and surrounds the substrate 210 and the semiconductor light emitting device chip 220. That is, the bottom surface 233 of the wall 230 and the bottom surface of the substrate 210 are located on the same line line.
  • the wall 230 may be obtained through injection molding using an insulating material such as, for example, an epoxy resin or a silicone resin.
  • the height H3 of the wall 230 may be equal to or lower than the height H1 + H2 of the height H1 of the substrate 210 and the height H2 of the semiconductor light emitting device chip 220. In consideration of the optical path, the height H3 of the wall 230 may be greater than the height H1 + H2 to which the substrate 210 and the semiconductor light emitting device chip 220 are coupled.
  • the height H1 of the substrate 210 is 0.3 mm to 1 mm
  • the height H2 of the semiconductor light emitting device chip 220 is 0.1 mm to 0.3 mm
  • the height H3 of the wall 230 is It may be more than 0.4mm and less than 2mm.
  • the first inner side surface 231 is connected to the lower surface 233, and the second inner side surface 232 is connected to the first inner surface 231.
  • the first inner side surface 231 and the second inner side surface 232 are preferably inclined to improve the light extraction efficiency.
  • the inclination angle 234 of the first inner surface 231 and the lower surface 233 of the wall 230 is an obtuse angle.
  • the inclination angle 236 of the second inner side surface 232 and the imaginary surface 235 parallel to the lower surface 233 of the wall 230 is an acute angle.
  • the contact with the substrate 210 may be prevented and the risk of short may be lowered.
  • the height (H4) of the point where the first inner surface 231 and the second inner surface 232 meet is preferably 5um or more to prevent the short.
  • the encapsulant 240 is formed inside the wall 230 to cover the substrate 210 and the semiconductor light emitting device chip 220.
  • the encapsulant 240 has a light transmitting property and may be made of one of an epoxy resin and a silicone resin. If necessary, a wavelength converter (not shown) may be included.
  • FIG 22 illustrates another example of the semiconductor light emitting device according to the present disclosure.
  • the semiconductor light emitting device 300 includes a reflective layer 350 formed on the first inner side 331 and the second inner side 332 of the wall 330.
  • the reflective layer 350 is formed on one surface of the first inner side surface 331 and the second inner side surface 332 of the wall 330. That is, the reflective layer 350 is formed on one surface of the first inner side surface 331 and the second inner side surface 332 in contact with the encapsulant 340.
  • the reflective layer 350 is preferably made of a highly efficient metallic material that reflects light, and for example, the metallic material may be formed by coating, plating, and deposition.
  • the metallic material forming the reflective layer 350 may be, for example, silver (Ag), aluminum (Al), a distributed Bragg reflector (DBR), a highly reflective white reflector, or the like.
  • silver (Ag) is preferred in view of cost and efficiency.
  • Al is preferred in view of cost and efficiency.
  • first inner side 331 and the second inner side 332 are inclined when depositing or coating the reflective layer 350 on the first inner side 331 and the second inner side 332 of the wall 330, The efficiency of reflecting light is increased to improve light extraction efficiency.
  • the first inner side surface 331 and the second inner side surface 332 are inclined, so that there is little risk of shorting due to contact with the substrate 310.
  • the semiconductor light emitting device 200 has the same characteristics as the semiconductor light emitting device 200 shown in FIG.
  • FIG. 23 is a view illustrating another example of a semiconductor light emitting device according to the present disclosure.
  • the semiconductor light emitting device 400 includes a reflective layer 450 formed only on the second inner side surface 432 of the wall 430.
  • the reflective layer 450 is formed only on one surface of the second inner side surface 432 of the wall 430. That is, the reflective layer 450 is formed only on one surface of the second inner side surface 432 in contact with the encapsulant 440.
  • the reflective layer 450 is formed only on the second inner side surface 432, a short risk may be lowered between the reflective layer 450 made of a metallic material and the substrate 410.
  • the semiconductor light emitting device 200 has the same characteristics as the semiconductor light emitting device 200 shown in FIG.
  • FIG 24 illustrates another example of the semiconductor light emitting device according to the present disclosure.
  • the semiconductor light emitting device 500 may include a reflective layer formed only on the first inner surface 531 and the second inner surface 532 of the wall 530 having an acute angle 534 formed on the lower surface 533 of the wall 530. 550).
  • An inclination angle 534 of the first inner side surface 531 and the bottom surface 533 of the wall 530 is preferably an obtuse angle as shown in FIG. 21, but does not exclude the acute angle.
  • the semiconductor light emitting device has the same characteristics as the semiconductor light emitting device 200 described in FIG. 21.
  • 25 is a view showing another example of a semiconductor light emitting device according to the present disclosure.
  • the semiconductor light emitting device 600 includes an insulating layer 636 formed on the first inner side surface 631 of the wall 630 and a reflective layer 650 formed only on the second inner side surface 632.
  • the insulating layer 636 may be formed on the reflective layer 650. After the formation, the insulation layer 636 may be separately formed on the first inner surface 631 to reduce the risk of short circuit.
  • the semiconductor light emitting device 200 has the same characteristics as the semiconductor light emitting device 200 shown in FIG.
  • 26 is a view for explaining an example of a method of manufacturing a semiconductor light emitting device according to the present disclosure.
  • a wall 730 is disposed on a base 700.
  • the wall 730 can be obtained through injection molding.
  • Base 700 may be a flexible film or tape, or a rigid metal plate or a nonmetal plate.
  • the film or tape is also not particularly limited and is preferably sticky or adhesive and has heat resistance.
  • heat resistant tape, blue tape, or the like may be used, and various colors or light reflectances may be selected.
  • the metal plate is not particularly limited, and for example, Al, Cu, Ag, Cu-Al alloys, Cu-Ag alloys, Cu-Au alloys, SUS (stainless steel), and the like may be used. Of course you can use it.
  • Plastics can be used as nonmetallic plates, and various colors and light reflectances can be selected.
  • the reflective layer 750 is formed on one surface of the second inner side surface 732 of the wall 730.
  • the reflective layer 750 may be formed using spray coating, spin coding, or the like.
  • the semiconductor light emitting device chip 720 coupled to the substrate 710 is disposed in the wall 730.
  • the semiconductor light emitting device chip 720 coupled to the substrate 710 may be disposed on the base 700 using a device transfer device (not shown) capable of recognizing a pattern of the wall 730 and correcting position and angle. .
  • the first electrode 721 and the second electrode 722 of the semiconductor semiconductor light emitting device chip 720 are positioned on the first conductive portion 711 and the second conductive portion 712 of the substrate 710, respectively. It is electrically and physically connected.
  • a flip chip is suitable as the semiconductor light emitting device chip 720, but it does not exclude a lateral chip or a vertical chip.
  • the encapsulant 740 is introduced into the wall 730 in which the semiconductor light emitting device chip 720 is disposed, and is formed and cured.
  • the encapsulant 740 may be formed using dispensing, a stencil, screen printing, or spin coating. Dispensing is preferable from the viewpoint of the uniformity of thickness, the internal density of the phosphor, and the like.
  • the substrate 710 coupled with the semiconductor light emitting device chip 720 is fixed to the base 700 by the encapsulant 740.
  • the encapsulant 740 may be one of an epoxy resin and a silicone resin generally used in the semiconductor light emitting device field. Meanwhile, the encapsulant 740 may be omitted. When the encapsulant 740 is omitted, the encapsulant 740 may be covered with glass or quartz.
  • the substrate 710, the semiconductor light emitting device chip 720, and the wall 730 coupled by the encapsulant 740 are separated from the base 700.
  • the substrate 710, the semiconductor light emitting device chip 720, and the wall 730 coupled by the base 700 and the encapsulant 740 are pressed by external force to contact each other or by using an adhesive material.
  • the adhesive material may be variously selected from conductive pastes, insulating pastes, polymer adhesives, and the like, and is not particularly limited. In a certain temperature range, when a material that loses adhesive strength is used, the temperature is separated when the substrate 710, the semiconductor light emitting device chip 720, and the wall 730 coupled by the base 700 and the encapsulant 740 are separated. It can be easily separated in the range.
  • the substrate 710, the semiconductor light emitting device chip 720, and the wall 730 coupled by the encapsulant 740 are picked up from the base 700 using an element transfer device (not shown). up) to separate it from the base 700.
  • the encapsulant 740 is formed from the base 700 by hitting the substrate 710, the semiconductor light emitting device chip 720, and the wall 730 coupled by the pin or rod encapsulant 740 under the base 700.
  • the substrate 710, the semiconductor light emitting device chip 720, and the wall 730 coupled by each other fall off, and at that moment, the device transfer device is coupled to the substrate 710 and the semiconductor light emitting device chip 720 by the encapsulant 740.
  • the wall 730 may be electrically adsorbed or vacuum adsorbed.
  • the order of the manufacturing method of the semiconductor light emitting device according to the present disclosure may be included in the scope of the present disclosure as long as the skilled person can easily change.
  • FIG. 27 is a diagram illustrating an example of a semiconductor light emitting device according to the present disclosure.
  • FIG. 27 (b) is sectional drawing along AA '.
  • the semiconductor light emitting device 200 includes a body 210, a semiconductor light emitting device chip 220, and an encapsulant 230.
  • Body 210 includes sidewall 211 and bottom 212, and includes a cavity 214 defined by sidewall 211 and bottom 212.
  • the body 210 may be obtained through injection molding using, for example, an insulating material based on resin or ceramic.
  • Sidewall 211 includes an outer side 217 and an inner side 218.
  • the height H of the side wall 211 may be smaller than the length L of the bottom portion 212.
  • the height H of the side wall 211 may be 0.1 mm or more and 0.6 mm or less, and the length L of the bottom portion 212 may be 0.5 mm or more.
  • the side wall 211 may also be absent as needed (not shown).
  • the bottom portion 212 includes a hole 213.
  • the size of the hole 213 is similar to that of the semiconductor light emitting device chip 220 or 1.5 times the size of the semiconductor light emitting device chip 220.
  • the inner surface 240 of the bottom portion 212 forming the hole 213 is preferably inclined to improve the light extraction efficiency.
  • the semiconductor light emitting device chip 220 is located in the hole 213.
  • the semiconductor light emitting device chip 220 may be a lateral chip, a vertical chip, and a flip chip.
  • the flip chip is preferable in that the electrode 221 of the semiconductor light emitting device chip 220 is exposed toward the bottom surface 216 of the bottom portion 212 of the body 210.
  • the height 219 of the bottom portion 212 is preferably lower than the height 222 of the semiconductor light emitting device chip 220. This is because when the height 219 of the bottom 212 is higher than the height 222 of the semiconductor light emitting device chip 220, the light extraction efficiency of the semiconductor light emitting device 200 may decrease. However, although the light extraction efficiency may be reduced, the height 219 of the bottom portion 212 may be higher than the height of the semiconductor light emitting device chip 220 in consideration of an optical path.
  • the height 219 of the bottom part 212 and the height 222 of the semiconductor light emitting device chip 220 may be measured based on the bottom surface 216 of the bottom part 212.
  • the height 222 of the semiconductor light emitting device chip 220 may be 0.05 mm or more and 0.5 mm or less.
  • the height 219 of the bottom 212 may be 0.08 mm or more and 0.4 mm or less.
  • the encapsulant 230 is provided in the cavity 214 to cover the semiconductor light emitting device chip 220, so that the semiconductor light emitting device chip 220 positioned in the hole 213 may be fixed to the body 210.
  • the encapsulant 230 is light-transmissive and may be made of one of an epoxy resin and a silicone resin, for example. If necessary, the encapsulant 230 may include a wavelength converting member 231.
  • the wavelength converting material 231 may be any type as long as it converts light generated from the active layer of the semiconductor light emitting device chip 220 into light having a different wavelength (eg, a pigment, a dye, etc.). Example: YAG, (Sr, Ba, Ca) 2 SiO 4 : Eu, etc.) is preferably used.
  • the wavelength conversion material 231 may be determined according to the color of light emitted from the semiconductor light emitting device, and is well known to those skilled in the art.
  • the semiconductor light emitting device 300 includes a junction 330. Except for the junction portion 330, the semiconductor light emitting device 200 has the same characteristics as the semiconductor light emitting device 200 shown in FIG.
  • the junction 330 is located on the bottom 312 of the bottom 311 of the body 310.
  • the junction 330 is spaced apart from the electrode 321 of the semiconductor light emitting device chip 320 exposed in the direction of the bottom 312 of the bottom 311.
  • the bonding force may be improved compared to the case where the semiconductor light emitting device 300 is bonded only to the electrode 321.
  • the junction 330 may be metal.
  • the junction 330 may be one of silver (Ag), copper (Cu), and gold (Au).
  • the junction 330 may be a combination of two or more metals.
  • it may be one of a combination of nickel (Ni) and copper, a combination of chromium (Cr) and copper, and a combination of titanium (Ti) and copper.
  • the junction 330 may be variously combined in a range that can be easily changed by those skilled in the art.
  • FIG. 28B is a bottom view of FIG. 28A, and the arrangement of the electrode 321 and the junction part 330 can be confirmed.
  • the junction part 330 may be in contact with the electrode 321 of the semiconductor light emitting device chip 320 to perform an electrode function.
  • 29 illustrates another example of the semiconductor light emitting device according to the present disclosure.
  • the semiconductor light emitting device 400 includes a reflective material 430 between the bottom 411 of the body 410 and the semiconductor light emitting device chip 420. Except for the reflective material 430, the semiconductor light emitting device 300 has the same characteristics as the semiconductor light emitting device 300 of FIG. 28.
  • the reflective material 430 is positioned on the side of the semiconductor light emitting device chip 420, the light emitted from the side of the semiconductor light emitting device chip 420 may be reflected, thereby improving light extraction efficiency of the semiconductor light emitting device 400.
  • the reflective material 430 is preferably a white reflective material.
  • it may be a white silicone resin.
  • the reflective material 430 may be positioned to form a space 431 between the reflective material 430 and the semiconductor light emitting device chip 420.
  • FIG. 30 illustrates another example of a semiconductor light emitting device according to the present disclosure.
  • the semiconductor light emitting device 500 includes a reflective layer 530 on at least one of the inner surface 513 of the sidewall 511 of the body 510 and the upper surface 514 of the bottom 512. Except for the reflective layer 530, the semiconductor light emitting device 300 has the same characteristics as the semiconductor light emitting device 300 of FIG. 28.
  • the reflective layer 530 may be formed on the entire upper surface 514 of the bottom portion 512 of the body 510.
  • the reflective layer 530 may be made of aluminum (Al), silver (Ag), a distributed Bragg reflector (DBR), a highly reflective white reflector, or the like.
  • the semiconductor light emitting device chip 150 should be bonded to the lead frames 110 and 120 in the conventional semiconductor light emitting device 100 as shown in FIG. 3, the reflective layer of the metal having good reflection efficiency is the semiconductor light emitting device chip 150.
  • the entire upper surfaces of the lead frames 110 and 120 to be joined could not be formed due to an electrical short problem.
  • the metal having high reflection efficiency may be used.
  • the reflective layer 530 may be formed on the entire upper surface 514 of the bottom portion 512.
  • the light extraction efficiency of the semiconductor light emitting device 500 may be improved by forming the metal reflective layer 530 having high reflection efficiency on the entire upper surface 514 of the bottom portion 512.
  • the reflective layer 530 may be located at the side of the hole.
  • FIG 31 illustrates another example of the semiconductor light emitting device according to the present disclosure.
  • the semiconductor light emitting device 600 includes a plurality of holes 612 in the bottom portion 611 of the body 610, and the semiconductor light emitting device chip 620 is positioned in each hole 612.
  • the semiconductor light emitting device 300 has the same characteristics as the semiconductor light emitting device 300 of FIG. 28 except that the semiconductor light emitting device chip 620 is positioned in the plurality of holes 612 and each hole 612. Although a plurality of holes 612 are illustrated in FIG. 31, two or more holes are not limited thereto.
  • the semiconductor light emitting device chips 620 disposed in the holes 612 may emit different colors.
  • FIG. 32 is a view showing another example of a semiconductor light emitting device according to the present disclosure.
  • the semiconductor light emitting device 700 may have an inner surface of the bottom portion 712 except for a portion 717 of the bottom surface 716 of the bottom portion 712 of the bottom portion 712 of the body 710. 715, a reflective layer 730 formed on the upper surface 714 of the bottom 712 and the inner surface 713 of the sidewall 711. Except for the reflective layer 730, the semiconductor light emitting device 300 has the same characteristics as the semiconductor light emitting device 300 described with reference to FIG. 28.
  • a metal reflective layer 730 having a high reflectance efficiency may have an inner surface 713 of the sidewall 711, an upper surface 714 of the bottom 712, and a portion 171 of the inner surface 715 of the bottom 712. By being formed in the excluded portion, it is possible to prevent a short risk while improving the light extraction efficiency of the semiconductor light emitting device 700.
  • the reflective layer 730 may be made of aluminum (Al), silver (Ag), a distributed Bragg reflector (DBR), a highly reflective white reflector, or the like.
  • the reflective layer 730 may be formed on the upper surface of the body 710.
  • FIG. 33 illustrates a method of manufacturing a semiconductor light emitting device according to the present disclosure
  • FIG. 34 illustrates a method of manufacturing a reflective layer according to the present disclosure.
  • a body 810 including a hole 813 formed in the bottom portion 812 is prepared (S1).
  • the body 810 may be obtained through injection molding, for example, using a resin-based or ceramic-based insulating material.
  • the body 810 may be fixed and supported by the base 1, which is a temporary fixing plate.
  • the base 1 can be a general adhesive tape. For example, it may be a blue tape.
  • the reflective layer 830 is formed on the inner surface of the body 810 (S2).
  • the inner surface 831 of the body 810 has a plurality of grooves (S21).
  • the inner surface 831 of the body 810 may be formed as an uneven surface including a groove having a regular period or a groove having an irregular period when manufactured by injection molding according to a mold or a mechanical method. have.
  • an insulating material is coated on the inner surface 831 of the body 810 to form a coating layer 832 (S22).
  • the coating layer 832 may be formed using a resin-based insulating material made of a liquid on the inner surface 831 of the body 810 in which the groove is formed.
  • the coating layer 832 may be formed of an epoxy resin, a silicone resin, or a polydimethylsiloxane (PDMS) -based resin, and may be formed using a spray coating, a dipping coating, or a surface brushing coating.
  • PDMS polydimethylsiloxane
  • the coating layer 832 is made of a liquid resin, and preferably has a thickness of about 10 ⁇ m or less.
  • the reflective layer 830 is formed on the inner surface 831 of the body 810 by using a liquid resin to form a resin coating layer 832 with a thickness of about 10 ⁇ m or less, so that the thickness of the reflective layer 830 is thin and the body ( The manufacturing cost can be reduced while increasing the bonding force with 810.
  • the surface of the coating layer 832 in contact with the inner surface 831 of the body 810 is formed of a non-flat surface by filling a liquid resin in the groove formed in the inner surface 831 of the body 810, the metal layer 833 described later
  • the surface of the coating layer 832 in contact with is formed as a flat surface.
  • a metal reflective material is deposited on the surface of the coating layer 832 to form a metal layer 833 to form a reflective layer 830 (S23).
  • the metal layer 833 in contact with the coating layer 832 is formed as a flat surface as a whole.
  • the metal layer 833 is formed as a flat surface, the efficiency of reflecting light emitted from the semiconductor light emitting device chip 820 may be greatly increased.
  • the thickness of the metal layer 833 is preferably formed to be thicker than the thickness of the coating layer 832, the thickness of the metal layer 833 may be the same as or thinner than the thickness of the coating layer 832.
  • the metal layer 833 has a high efficiency of reflecting light and has excellent reflectivity and excellent electrical bonding properties, for example, silver (Ag), nickel (Ni), aluminum (Al), rhodium (Rh), and lead ( Pd), iridium (Ir), ruthenium (Ru), magnesium (Mg), it may be formed of a metal or alloy containing at least one of zinc (Zn).
  • the metal layer 833 is preferably aluminum (Al) in consideration of cost and efficiency.
  • the thickness of the reflection layer was formed thick by using the gloss plating method.
  • the reflective layer is preferably aluminum (Al) in consideration of cost and efficiency, but aluminum (Al) plating was not possible when forming the reflective layer by a bright plating method. Therefore, the peeling or bonding force of the reflective layer is lowered by the stress, and there is a problem that the manufacturing cost increases.
  • the reflective layer 830 is formed by forming the reflective layer 830 using the resin coating layer 832 on the inner surface 831 of the body 810 using a liquid resin with a thickness of about 10 ⁇ m or less.
  • the thickness of the thinner can increase the bonding force with the body 810 while reducing the manufacturing cost.
  • the reflective layer 830 may be formed before the semiconductor light emitting device chip 820 is disposed, and thus the reflective layer 830 may be formed on the inner side surface of the hole 813.
  • the reflective layer 830 may not be formed at a portion of the inner surface of the body 810 adjacent to the hole 813, so that a short risk may be lowered.
  • the semiconductor light emitting device chip 820 is disposed in each of the holes 813 (S3).
  • the semiconductor light emitting device chip 820 is disposed in the hole 813 using an element transfer device (not shown).
  • the body 810 may be recognized as a pattern for correcting the position or angle at which the device transfer device places the semiconductor light emitting device chip 820, and together with the dam, serves as a dam of the encapsulant 840.
  • an encapsulant 840 is introduced into the body 810 (S4).
  • the base 1 is removed and the junction part 850 is formed (S5).
  • the exposed electrode 821 of the semiconductor light emitting device chip 820 and the bonding portion 850 are bonded to the external substrate. Bonding of the electrode 821 and the junction portion 850 of the semiconductor light emitting device chip 820 and the external substrate may be performed by soldering using a solder material. Since the junction part 850 is positioned between the semiconductor light emitting device chips 820, the bonding force may be improved as compared with the case where only the electrodes 821 of the semiconductor light emitting device chip 820 are in contact with each other.
  • a reinforcing material (not shown) may be formed instead of the adhesive part 850. If the reinforcement is located between the upper and lower surfaces of the body bottom, the reinforcement may be inserted when the body is made. By forming the reinforcing material, the bonding force can be improved while compensating for the problem of bending due to warping or bending.
  • the order of the manufacturing method of the semiconductor light emitting device according to the present disclosure may be included in the scope of the present disclosure as long as the skilled person can easily change.
  • FIG. 35 is a view illustrating still another example of a semiconductor light emitting device according to the present disclosure.
  • (A) is a perspective view
  • FIG. 35 (b) is sectional drawing along BB '.
  • the semiconductor light emitting device 700 includes a plurality of holes 713 and 714 formed in the bottom direction 712 of the body 710 in the longitudinal direction, and the bottom part 712 formed in the sidewall 711 of the body 710.
  • the semiconductor light emitting device chip 720 formed in the first hole 713, the reinforcing material 750 formed in the second hole 714 of the bottom part 712 positioned between the semiconductor light emitting device chip 720, and the reinforcing material.
  • the reflective material 760 is filled in the second hole 714 in which the 750 is formed.
  • the bottom part 712 has a long direction (x direction) and a unidirectional direction (y direction), and the long direction may have a size five times greater than the unidirectional direction.
  • the present invention is not limited thereto, and the bottom portion 712 may be formed to be longer in the longitudinal direction than in the unidirectional direction.
  • a plurality of holes 713 and 714 and a semiconductor light emitting device chip 720 are positioned in the first hole 713, and the reinforcement 750 and the reflective material 760 are formed in the second hole 714. Except for this position, it has the same characteristics as the semiconductor light emitting device 200 shown in FIG. 35 illustrates a plurality of holes 713 and 714, but three or more holes are not limited thereto.
  • the semiconductor light emitting device chip 720 is positioned in the first hole 713 of the bottom part 712 formed on the sidewall 711 of the body 710.
  • the semiconductor light emitting device chip 720 is formed in each of the first holes 713 of the bottom part 712 formed on both sidewalls 711 of the body 710.
  • the side wall 711 serves as a dam of the encapsulant 730.
  • the semiconductor light emitting device chips 720 positioned in the first holes 713 may emit different colors.
  • the reinforcing material 750 is positioned in the second hole 714 of the bottom portion 712 positioned between the semiconductor light emitting device chips 720.
  • the reinforcement 750 is preferably disposed not to overlap the bottom portion 712 where the first hole 713 is formed.
  • the lower surface 751 of the reinforcing material 750 is exposed in the direction of the lower surface 716 of the bottom portion 712.
  • the body 710 is positioned away from the electrode 721 of the semiconductor light emitting device chip 720 exposed in the direction of the bottom surface 716 of the bottom portion 712.
  • the electrode 721 of the semiconductor light emitting device chip 720 protrudes from the bottom portion 712.
  • the height 752 of the reinforcement 750 may be formed lower than the height 719 of the bottom 712. However, the height 752 of the reinforcement 750 is not limited thereto. It may be formed higher than or equal to).
  • the width 753 of the reinforcement 750 may be formed smaller than the width 7140 of the second hole 714, but the width 753 of the reinforcement 750 is not limited thereto. It may be formed to be the same as the width 7140 of the second hole 714 located in.
  • the width 7140 of the second hole 714 is preferably larger than the width of the first hole 713.
  • the second hole 714 is preferably formed larger than the first hole 713 in order to prevent the bending of the body 710 due to the bending or the bending.
  • the second hole 714 may be smaller or the same.
  • the length of the bottom surface 751 of the reinforcement 750 protruding toward the bottom surface 716 of the bottom portion 712 is preferably equal to the length of the electrode 721 of the semiconductor light emitting device chip 720.
  • the semiconductor light emitting device 700 illustrated in FIG. 35 is formed in a long direction, a reflow process is performed to bond the semiconductor light emitting device 700 to an external substrate by using surface mounter technology (SMT) equipment.
  • SMT surface mounter technology
  • the bottom portion 712 located between the semiconductor light emitting device chips 720 is bent due to heat, so that soldering is not performed smoothly or warpage occurs, thereby causing a problem of breaking the body 710.
  • the reinforcing material 750 is positioned between the semiconductor light emitting device chips 720, the bending problem of the body 710 may be compensated for. That is, since the second hole 714 is positioned in the bottom portion 712 located between the semiconductor light emitting device chips 720, the pressure due to heat is less than that of the related art, and thus the problem of warpage may be alleviated.
  • the semiconductor light emitting device 700 is external due to the bottom surface 751 of the reinforcing material 750 protruding by the length of the electrode 721 of the semiconductor light emitting device chip 720 toward the bottom surface 716 of the bottom part 712.
  • the bonding force may be improved than when only the electrode 721 of the semiconductor light emitting device chip 720 is in contact.
  • Such a reinforcing material 750 may be made of a non-conductive metal having a high bonding strength.
  • the reinforcement 750 may be one of copper (Cu) and gold (Au).
  • the reinforcement 750 may be a combination of two or more metals.
  • it may be one of a combination of nickel (Ni) and copper, a combination of chromium (Cr) and copper, and a combination of titanium (Ti) and copper.
  • the reinforcement 750 may be variously combined within a range easily changed by those skilled in the art.
  • the reflective material 760 filled in the second hole 714 in which the reinforcing material 750 is formed is formed of a material that reflects light.
  • it may be formed of a highly reflective white reflective material, ie, white silicon, having a high reflectance.
  • the reflective material 760 is disposed on the upper surface of the reinforcing material 750, the light emitted by the wavelength converting material 731 may be reflected to improve light extraction efficiency of the semiconductor light emitting device 700.
  • FIG 36 illustrates another example of the semiconductor light emitting device according to the present disclosure.
  • the semiconductor light emitting device 800 includes a metal reflective layer 880 formed on the front surface of the reinforcing material 850 formed in the second hole 814 of the bottom part 812 located between the semiconductor light emitting device chips 820. Except for the metal reflective layer 880, it has the same characteristics as the semiconductor light emitting device 700 shown in FIG.
  • the metal reflective layer 880 is located on the upper surface of the reinforcing material 850, the light emitted by the wavelength converting material 831 may be reflected to improve light extraction efficiency of the semiconductor light emitting device 800.
  • the metal reflective layer 880 is preferably made of a metallic material having high efficiency of reflecting light, and for example, the metallic material may be formed by a method such as coating, plating, and deposition.
  • the metallic material forming the metal reflective layer 880 may be formed of, for example, silver (Ag), aluminum (Al), or the like.
  • the metal reflective layer 870 may be located on the bottom surface of the reinforcing material 850 as shown in FIG. 36 (b).
  • FIG. 37 is a view showing another example of a semiconductor light emitting device according to the present disclosure.
  • the semiconductor light emitting device 900 includes a plurality of second holes 914 in which bottom portions 912 positioned between the semiconductor light emitting device chips 920 are spaced apart from each other, and each of the second holes 914 includes a reinforcing material ( 950 and reflective material 960 are located. Same as the semiconductor light emitting device 700 of FIG. 35 except that the reinforcing material 950 and the reflecting material 960 are disposed in the plurality of second holes 914 and the second holes 914 spaced apart from each other. Has characteristics.
  • the plurality of second holes 914 is illustrated as three, but three or more holes are not limited thereto.
  • the widths of the plurality of second holes 914 may be formed to be different or the same as each other.
  • a metal reflecting layer is disposed on the upper surface or the upper surface of the reinforcing material 950 instead of the reflecting material 960 filled in the plurality of second holes 914, if necessary, to be radiated by the wavelength converter 931. By reflecting light, the light extraction efficiency of the semiconductor light emitting device 900 may be improved.
  • the semiconductor light emitting device 1000 includes reflective layers 1070 and 1071 having high reflectance in order to efficiently reflect light emitted from the side surface of the semiconductor light emitting device chip 1020. Except for the reflective layers 1070 and 1071, they have the same characteristics as the semiconductor light emitting device 700 shown in FIG.
  • the reflective layers 1070 and 1071 are preferably made of a highly efficient metallic material that reflects light, and for example, the metallic material may be formed by coating, plating, and deposition.
  • Examples of the metallic material forming the reflective layers 1070 and 1071 include silver (Ag) and aluminum (Al), but aluminum (Al) is preferable in consideration of cost and efficiency.
  • the reflective layer 1070 may include an inner surface 1018 of the sidewall 1017, an upper surface 1015 of the bottom 1012, and one surface of an inner surface 1040 of the bottom 1012. Is formed.
  • the inner surface 1018 of the wall 1017, the upper surface 1015 of the bottom portion 1012 and the inner surface 1040 of the bottom portion 1012 are positioned in a line. That is, the reflective layer 1070 is formed on one surface of the body 1010 connecting to the encapsulant 1030 covering the semiconductor light emitting device chip 1020.
  • the light extraction efficiency of the semiconductor light emitting device 1000 may be improved by forming the metal reflective layer 1070 having a high reflection efficiency on the entire inner surface of the body 1010.
  • the reflective layer 1071 may be formed of the bottom portion 1012 of the inner side surface 1040 of the bottom portion 1012 except for the portion 1041 of the bottom portion 1012 of the bottom portion 1012. It is formed only on the inner surface 1040, the upper surface 1015 of the bottom portion 1012 and the inner surface 1018 of the side wall 1017. As a result, the reflective layer 1071 is formed at a portion other than the portion 1041 of the bottom portion 1012, whereby a short risk can be prevented.
  • a reflective layer may be formed on the upper surface of the body 1010.
  • a reflective layer may be formed by applying a metallic material or a DBR distributed Bragg reflector (DBR) to the top surface of the body 1010.
  • DBR distributed Bragg reflector
  • 39 is a view showing another example of a semiconductor light emitting device according to the present disclosure.
  • the semiconductor light emitting device 1100 includes a functional device 2000 positioned in the second hole 1114 of the bottom portion 1112 of the body 1110 positioned between the semiconductor light emitting device chips 1120. Except for the functional device 2000 formed in the second hole 1114, the semiconductor light emitting device 700 has the same characteristics as the semiconductor light emitting device 700 illustrated in FIG. 35.
  • the functional device 2000 is, for example, a protecting element (eg, a zener diode) that protects the semiconductor light emitting device chip 1120 from electrostatic discharge (ESD) and / or electrical over-stress (EOS).
  • a protecting element eg, a zener diode
  • ESD electrostatic discharge
  • EOS electrical over-stress
  • the electrode 2001 of the functional device 2000 is exposed and positioned in the same direction as the electrode 1121 of the light emitting device chip 1120, that is, the lower surface 1116 of the bottom portion 1112 of the body 1100.
  • the second hole 1114 in which the functional device 2000 is formed is filled with the reflective material 1160.
  • FIG 40 illustrates another example of the semiconductor light emitting device according to the present disclosure.
  • the semiconductor light emitting device 1200 may include a plurality of second holes 1214 in which bottom parts 1212 positioned between the semiconductor light emitting device chips 1220 are spaced apart from each other, and a bottom part adjacent to the semiconductor light emitting device chips 1220.
  • the reinforcement 1250 and the reflective material 1260 are positioned in the second hole 1214 of the 1212, and the functional element 2100 is disposed between the second hole 1214 where the reinforcement 1250 and the reflective material 1260 are located.
  • a reflective material 1260 is located. Except that the reinforcement 1250 and the reflective material 1260 and the functional element 2100 and the reflective material 1260 are positioned in the plurality of second holes 1214 and each of the second holes 1214 spaced apart from each other. It has the same characteristics as the semiconductor light emitting element 700 shown in FIG.
  • the plurality of second holes 1214 spaced apart from each other may be formed to have different widths from each other, but is not limited thereto and may be formed to have the same width.
  • FIG. 41 is a view illustrating an example of a method of manufacturing a semiconductor light emitting device according to the present disclosure
  • FIG. 42 is a view illustrating an example of another method of manufacturing a semiconductor light emitting device according to the present disclosure.
  • a body 900 including a plurality of holes 1313 and 1314 formed in the bottom portion 1312 in the longitudinal direction is prepared (S1).
  • the body 1310 may be obtained through injection molding.
  • the body 1310 may be fixed and supported by the base 1, which is a temporary fixing plate.
  • the base 1 can be a general adhesive tape. For example, it may be a blue tape.
  • the first hole 1313 is located at the bottom 1312 formed in both sidewalls 1311 of the body 1310, and the second hole 1314 is located at the bottom 1312 between the first holes 1313. do.
  • the width of the second hole 1314 is wider than the width of the first hole 1313.
  • the width of the second holes 1314 is the same as or smaller than the width of the first holes 1313. Can be.
  • the semiconductor light emitting device chip 1320 is disposed in each of the first holes 1313 (S2).
  • the semiconductor light emitting device chip 1320 is disposed in the first hole 1313 using an element transfer device (not shown).
  • the body 1310 may be recognized as a pattern for correcting a position or an angle at which the device transfer device is to place the semiconductor light emitting device chip 220, and functions as a dam of the encapsulant 1330.
  • the reinforcing material 1350 is disposed in the second hole 1314 (S3).
  • the reflective material 1360 is filled in the second hole 1314 in which the reinforcing material 1350 is disposed (S4).
  • an encapsulant 1330 is introduced into the body 1310 (S5).
  • the reinforcing material 1350 may be disposed in the second hole 1314 by coating the metal reflective layer 1380 (S31).
  • the encapsulant 1330 is directly injected without forming a reflective material 1360 (S51).
  • the base 1 is removed, and the exposed electrode 1321 of the semiconductor light emitting device chip 1320 and the bottom surface of the reinforcing material 1350 are bonded to the external substrate.
  • the electrode 1321 and the reinforcing material 1350 of the semiconductor light emitting device chip 1320 and the external substrate may be bonded by soldering using a solder material.
  • the reinforcing material 1350 is positioned between the semiconductor light emitting device chips 1320, thereby compensating for the problem of bending or bending caused by the bending of the body 1310, and contacting only the electrode 1321 of the semiconductor light emitting device chip 1320. Bonding force can be improved.
  • the order of the manufacturing method of the semiconductor light emitting device according to the present disclosure may be included in the scope of the present disclosure as long as the skilled person can easily change.
  • Fig. 43 illustrates another example of the semiconductor light emitting device according to the present disclosure.
  • Fig. 43 (a) is a perspective view
  • Fig. 43 (b) is a sectional view taken along CC '
  • Fig. 43 (c) is a sectional view of another example of Fig. 43 (b)
  • Fig. 43 (d) is Fig. 43 (b).
  • the semiconductor light emitting device 1400 includes a bottom portion 1412 including a plurality of holes 1413 and 1414 formed in a longitudinal direction, a sidewall 1411 including two open sections 1401 and 1402, and a bottom portion 1412.
  • the semiconductor light emitting device chip 1420 formed in the first hole 1413 of the second reinforcement, the reinforcing material 1450 formed in the second hole 1414 of the bottom portion 1412 positioned between the semiconductor light emitting device chip 1420, and the reinforcing material
  • the reflective material 1460 is filled in the second hole 1414 formed with the 1450.
  • the bottom portion 1412 has a longitudinal direction (x direction) and a unidirectional direction (y direction), and the longitudinal direction may have a size five times greater than the unidirectional direction.
  • Sidewall 1411 includes two open sections 1401, 1402.
  • the two open sections 1401 and 1402 are preferably located facing each other on the long side.
  • the semiconductor light emitting device 1400 may emit light through the upper and open sections 1401 and 1402 of the semiconductor light emitting device 1400. Accordingly, the semiconductor light emitting device 1400 may emit light on three surfaces.
  • the height 1403 of the bottom portion 1412 is lower than the height 1421 of the semiconductor light emitting device chip 1420. Since the height 1403 of the bottom portion 1412 is lower than the height 1421 of the semiconductor light emitting device chip 1420, light extraction efficiency of the semiconductor light emitting device 1400 that emits three surfaces as shown by the arrow shown in FIG. This can be further increased.
  • the semiconductor light emitting device 1400 includes two open sections 1401 and 1402, but is not limited thereto and may include one or two or more open sections.
  • the semiconductor light emitting device 1400 is not completely removed from the sidewalls 1411 of the open sections 1401 and 1402, but partially remains to allow light to exit to the side of the semiconductor light emitting device 1400. You can adjust the angle or amount of light.
  • the semiconductor light emitting device 1400 may emit light toward the side of the semiconductor light emitting device 1400 by removing the sidewall 1411 along the cutting line 1404.
  • the semiconductor light emitting device 1400 is substantially the same as the semiconductor light emitting device 700 of FIG. 35.
  • a semiconductor light emitting device comprising: a substrate comprising a first conductive portion, a second conductive portion, and an insulating portion located between the first conductive portion and the second conductive portion; A body disposed on the substrate and including a bottom portion, the body having a hole formed in the bottom portion; A semiconductor light emitting device chip disposed on a substrate exposed by a hole and electrically connected to a substrate, comprising: a semiconductor having a plurality of semiconductor layers generating ultraviolet rays by recombination of electrons and holes, and electrodes electrically connected to the plurality of semiconductor layers Light emitting device chip; And a reflective layer formed on at least a portion of an inner surface of the body.
  • the semiconductor light emitting device chip and the substrate may be covered with an encapsulant, glass or quartz.
  • the semiconductor light emitting device has a width of the upper opening of the body larger than that of the semiconductor light emitting device chip.
  • the body includes a first surface connected to the lower surface of the body, a second surface connected to the first surface, and a third surface connected to the second surface, the width of the opening of the second surface of the body is the width of the opening of the lower surface of the body A semiconductor light emitting element that is larger and smaller than the width of the opening in the upper surface of the body.
  • a semiconductor light emitting element wherein the reflective layer is formed on the first, second and third surfaces other than a part of the first surface of the body in contact with the substrate.
  • the first and third surfaces of the body have a tilt angle inclined to the bottom surface of the body.
  • the semiconductor light emitting device in which the inclination angle of the first surface of the body and the bottom surface of the body is between 45 ° and 90 °.
  • the height of the second surface of the body is greater than the height of the semiconductor light emitting device.
  • a semiconductor light emitting device chip comprising a first electrode and a second electrode, wherein the first electrode is positioned on the first conductive portion and the second electrode is positioned on the second conductive portion and electrically connected.
  • a semiconductor light emitting element comprising a body including sidewalls and a cavity formed by the sidewalls and the bottom portion.
  • a semiconductor light emitting device comprising: a substrate comprising a first conductive portion, a second conductive portion, and an insulating portion located between the first conductive portion and the second conductive portion;
  • a semiconductor light emitting device chip disposed on a substrate and electrically connected to a substrate, comprising: a semiconductor light emitting device chip having a plurality of semiconductor layers generating ultraviolet rays by recombination of electrons and holes, and electrodes electrically connected to the plurality of semiconductor layers;
  • An encapsulant covering a semiconductor light emitting device chip;
  • a bonding pad interposed between the substrate and the semiconductor light emitting device chip and electrically connecting the electrode and the substrate;
  • a reflective layer formed on an inner surface of the wall in contact with the
  • the bonding pad is a semiconductor light emitting element made of a different material from the reflective layer.
  • a bonding pad is a semiconductor light emitting element located between each of the first conductive portion and the second conductive portion and the electrode of the light emitting element chip.
  • An electrode of a semiconductor light emitting device chip includes a first electrode and a second electrode, wherein the first electrode is positioned on the first conductive portion and the second electrode is positioned on the second conductive portion to be electrically connected.
  • a bonding pad is a semiconductor light emitting element further located on a lower surface of a substrate, which is the opposite surface of the upper surface in contact with the light emitting element chip.
  • a semiconductor light emitting element wherein the wall comprises a first surface which is connected to the lower surface of the wall, and a second surface which is connected to the first surface, and the reflective layer is not formed on the first surface of the wall but is formed only on the second surface.
  • a semiconductor light emitting device comprising: a substrate comprising a first conductive portion, a second conductive portion, and an insulating portion located between the first conductive portion and the second conductive portion; A semiconductor light emitting device chip disposed on the substrate and electrically connected to the substrate; And a wall disposed on a side surface of the substrate and surrounding the semiconductor light emitting device chip and the substrate, the wall including a first surface connected to a lower surface of the wall and a second surface connected to the first surface. And a lower surface of the substrate are on the same line.
  • the semiconductor light emitting device chip and the substrate may be covered with an encapsulant, glass or quartz.
  • a semiconductor light emitting element having an obtuse angle between the bottom surface of the wall and the first surface.
  • a semiconductor light emitting element having an acute inclination angle formed by a second surface of the wall and an imaginary surface parallel to the lower surface of the wall.
  • a semiconductor light emitting element comprising reflective layers formed on first and second surfaces of a wall.
  • a semiconductor light emitting element comprising a reflection layer formed only on the second surface of the wall.
  • a semiconductor light emitting element having inclination angles inclined toward a lower surface of the wall.
  • a semiconductor light emitting device chip comprising a first electrode and a second electrode, wherein the first electrode is positioned on the first conductive portion and the second electrode is positioned on the second conductive portion and is electrically connected.
  • a semiconductor light emitting device chip comprising: a semiconductor light emitting device having a plurality of semiconductor layers which generate ultraviolet rays by recombination of electrons and holes, and electrodes electrically connected to the plurality of semiconductor layers.
  • a semiconductor light emitting device comprising: a body including a bottom portion, the body having a hole formed in the bottom portion;
  • a semiconductor light emitting device chip disposed on a substrate exposed by a hole and electrically connected to a substrate, comprising: a semiconductor having a plurality of semiconductor layers generating ultraviolet rays by recombination of electrons and holes, and electrodes electrically connected to the plurality of semiconductor layers Light emitting device chip; And a reflective layer formed on at least a portion of the inner side of the body, the reflective layer comprising: a coating layer having a first thickness by coating an insulating material on the inner side of the body; And a metal layer in contact with the coating layer and having a second thickness by depositing a metallic reflective material.
  • a semiconductor light emitting element wherein the first thickness of the coating layer is thicker than the second thickness of the metal layer.
  • a semiconductor light emitting element having a first thickness of about 10 ⁇ m or less.
  • a semiconductor light emitting element in which the first surface of the coating layer in contact with the plating layer is an uneven surface and the second surface of the coating layer in contact with the metal layer is a flat surface.
  • a semiconductor light emitting device in which the metal layer in contact with the second surface of the coating layer has a flat surface as a whole.
  • a semiconductor light emitting device wherein the coating layer is made of the same material as the body.
  • the body includes a first surface connected to the lower surface of the body, a second surface connected to the first surface, and a third surface connected to the second surface, wherein the width of the opening of the second surface of the body is the width of the opening of the lower surface of the body.
  • a semiconductor light emitting element that is larger and smaller than the width of the opening in the upper surface of the body.
  • a semiconductor light emitting element having inclined surfaces inclined toward an inner side of an opening for accommodating a semiconductor light emitting element chip.
  • a semiconductor light emitting element wherein the reflective layer is formed on at least one of the first to third surfaces of the body.
  • a semiconductor light emitting device comprising: a body including a bottom portion having a plurality of holes formed in a longitudinal direction; A semiconductor light emitting device chip accommodated in each of the bottom hole formed on both sides of the body; A plurality of semiconductor layers including an active layer for generating light by recombination of electrons and holes and electrodes electrically connected to the plurality of semiconductor layers A semiconductor light emitting device chip; A reinforcing member formed in a hole in the bottom portion positioned between the semiconductor light emitting device chips; And an encapsulant filled in the body to fix the semiconductor light emitting device chip and the reinforcing material.
  • a semiconductor light emitting device comprising a; reflective material filled in a hole in which a reinforcing material is formed.
  • a semiconductor light emitting device comprising a; metal reflective layer positioned between the reinforcing material and the encapsulating material.
  • the height of the reinforcing material is a semiconductor light emitting element smaller than the height of the bottom portion.
  • a semiconductor light emitting device comprising: bottom portions disposed between semiconductor light emitting devices chips, and a plurality of holes spaced apart from each other, and reinforcing materials are respectively formed in the plurality of holes spaced apart from each other.
  • a semiconductor light emitting device comprising: a functional element that is a protective device formed in at least one hole of a plurality of holes spaced apart from each other, the bottom portion located between the semiconductor light emitting device chip.
  • the reinforcing material is a semiconductor light emitting element formed in the remaining hole in which the functional element is not formed.
  • a semiconductor light emitting device in which the bottom surface of the reinforcing material is exposed in the bottom direction of the bottom portion.
  • a semiconductor light emitting element wherein the bottom surface of the reinforcing material is located away from the electrodes of the semiconductor light emitting element chip exposed in the bottom direction of the bottom portion.
  • a semiconductor light emitting device comprising a reflective layer; an inner surface of a bottom portion accommodating a semiconductor light emitting device chip.
  • a body comprising a sidewall; wherein the sidewall includes at least one or more open sections, and at least one or more open sections are positioned facing each other.
  • a semiconductor light emitting element in which the width of the upper opening of the body is larger than the width of the semiconductor light emitting element chip.
  • a method of manufacturing a semiconductor light emitting device comprising the steps of: arranging a body having a bottom portion in which a plurality of holes having different widths are formed in a longitudinal direction on a base; Disposing a semiconductor light emitting device chip in each of the first holes of the bottom part formed at both sides in the longitudinal direction; Disposing a reinforcing material in a second hole of a bottom portion where the semiconductor light emitting device chip is not disposed; And inserting an encapsulant into the body.
  • the present disclosure it is possible to obtain a semiconductor light emitting device that increases reflectance while maintaining electrical contact force between the semiconductor light emitting device chip and the lead frame in order to improve light extraction efficiency.
  • a semiconductor light emitting device capable of maintaining electrical contact between the substrate and the semiconductor light emitting device chip while increasing the reflectance can be obtained.
  • the reflective layer is formed as a flat surface, the reflectance may be increased to improve light extraction efficiency.
  • the reflective layer is formed thin, peeling or a decrease in bonding strength can be suppressed or prevented.
  • the semiconductor light emitting device formed in the long direction by forming a reinforcing material between the semiconductor light emitting device chips, it is possible to prevent the phenomenon caused by the bending and the bending of the semiconductor light emitting device while maintaining the bonding force with the external substrate.

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Abstract

The present disclosure relates to a semiconductor light emitting device comprising: a substrate including a first conductive portion, a second conductive portion, and an insulating portion interposed between the first conductive portion and the second conductive portion; a body disposed on the substrate, including a bottom portion, and having a hole formed in the bottom portion; a semiconductor light emitting device chip disposed on the substrate exposed through the hole, electrically connected to the substrate, and including a plurality of semiconductor layers for generating ultraviolet rays by recombination of electrons and holes, and an electrode electrically connected to the plurality of semiconductor layers; and a reflective layer formed on at least a portion of the inner surface of the body.

Description

반도체 발광소자Semiconductor light emitting device
본 개시(Disclosure)는 전체적으로 반도체 발광소자에 관한 것으로, 특히 광 추출 효율을 향상시킨 반도체 발광소자에 관한 것이다.The present disclosure relates generally to semiconductor light emitting devices, and more particularly, to semiconductor light emitting devices having improved light extraction efficiency.
여기서는, 본 개시에 관한 배경기술이 제공되며, 이들이 반드시 공지기술을 의미하는 것은 아니다(This section provides background information related to the present disclosure which is not necessarily prior art).This section provides background information related to the present disclosure which is not necessarily prior art.
도 1은 종래의 반도체 발광소자 칩의 일 예를 나타내는 도면으로서, 반도체 발광소자 칩은 성장 기판(100; 예: 사파이어 기판), 성장 기판(100) 위에, 버퍼층(200), 제1 도전성을 가지는 제1 반도체층(300; 예: n형 GaN층), 전자와 정공의 재결합을 통해 빛을 생성하는 활성층(400; 예; INGaN/(In)GaN MQWs), 제1 도전성과 다른 제2 도전성을 가지는 제2 반도체층(500; 예: p형 GaN층)이 순차로 증착되어 있으며, 그 위에 전류 확산을 위한 투광성 도전막(600)과, 본딩 패드로 역할하는 전극(700)이 형성되어 있고, 식각되어 노출된 제1 반도체층(300) 위에 본딩 패드로 역할하는 전극(800; 예: Cr/Ni/Au 적층 금속 패드)이 형성되어 있다. 버퍼층(200)은 생략될 수 있다.1 is a view illustrating an example of a conventional semiconductor light emitting device chip, wherein the semiconductor light emitting device chip has a growth layer 100 (eg, a sapphire substrate) and a buffer layer 200 and a first conductivity on the growth substrate 100. The first semiconductor layer 300 (eg n-type GaN layer), the active layer 400 that generates light through recombination of electrons and holes (eg, INGaN / (In) GaN MQWs), a second conductivity different from the first conductivity The second semiconductor layer 500 (for example, a p-type GaN layer) having a plurality of layers is sequentially deposited, and a transmissive conductive film 600 for current diffusion and an electrode 700 serving as a bonding pad are formed thereon. An electrode 800 (eg, a Cr / Ni / Au laminated metal pad) is formed on the etched and exposed first semiconductor layer 300 as a bonding pad. The buffer layer 200 may be omitted.
도 1과 같은 형태의 반도체 발광소자 칩을 특히 레터럴 칩(Lateral Chip)이라고 한다. 여기서, 성장 기판(100) 측이 외부와 전기적으로 연결될 때 장착면이 된다.The semiconductor light emitting device chip of the same type as that of FIG. 1 is called a lateral chip. Here, when the growth substrate 100 side is electrically connected to the outside becomes a mounting surface.
도 2는 미국 등록특허공보 제7,262,436호에 제시된 반도체 발광소자 칩의 다른 예를 보여주는 도면으로서, 반도체 발광소자 칩은 성장 기판(100), 성장 기판(100) 위에, 제1 도전성을 가지는 제1 반도체층(300), 전자와 정공의 재결합을 통해 빛을 생성하는 활성층(400), 제1 도전성과 다른 제2 도전성을 가지는 제2 반도체층(500)이 순차로 증착되어 있으며, 그 위에 성장 기판(100) 측으로 빛을 반사시키기 위한 3층으로 된 제1 전극막(901), 제2 전극막(902) 및 제3 전극막(903)이 형성되어 있고, 식각되어 노출된 제1 반도체층(300) 위에 본딩 패드로 기능하는 전극(800)이 형성되어 있다.FIG. 2 is a view showing another example of the semiconductor light emitting device chip disclosed in US Patent No. 7,262,436. The semiconductor light emitting device chip includes a growth substrate 100 and a growth substrate 100, and a first semiconductor having a first conductivity. The layer 300, an active layer 400 that generates light through recombination of electrons and holes, and a second semiconductor layer 500 having a second conductivity different from the first conductivity are sequentially deposited thereon, and a growth substrate ( The first electrode layer 901, the second electrode layer 902, and the third electrode layer 903, which are formed of three layers for reflecting light toward the side 100, are formed and are exposed by etching. The electrode 800 which functions as a bonding pad is formed on ().
제1 전극막(901)은 Ag 반사막, 제2 전극막(902)은 Ni 확산 방지막, 제3 전극막(903)은 Au 본딩층일 수 있다. 여기서, 제3 전극막(903) 측이 외부와 전기적으로 연결될 때 장착면이 된다. 도 2와 같은 형태의 반도체 발광소자 칩을 특히 플립 칩(Flip Chip)이라고 한다. 도 2에 도시된 플립 칩의 경우 제1 반도체층(300) 위에 형성된 전극(800)이 제2 반도체층(500) 위에 형성된 전극막(901, 902, 903)보다 낮은 높이에 있지만, 동일한 높이에 형성될 수 있도록 할 수 도 있다. 여기서 높이의 기준은 성장 기판(100)으로부터의 높이일 수 있다.The first electrode film 901 may be an Ag reflecting film, the second electrode film 902 may be a Ni diffusion barrier film, and the third electrode film 903 may be an Au bonding layer. Here, when the third electrode film 903 side is electrically connected to the outside, it becomes a mounting surface. A semiconductor light emitting device chip of the same type as that of FIG. 2 is particularly referred to as a flip chip. In the flip chip illustrated in FIG. 2, the electrode 800 formed on the first semiconductor layer 300 is at a height lower than that of the electrode films 901, 902, and 903 formed on the second semiconductor layer 500. It can also be formed. The height reference may be a height from the growth substrate 100.
도 3은 종래의 반도체 발광소자의 일 예를 보여주는 도면이다.3 is a view showing an example of a conventional semiconductor light emitting device.
반도체 발광소자(100)는 리드 프레임(110, 120), 몰드(130), 그리고 캐비티(140) 내에 수직형 반도체 발광소자 칩(150; Vertical Type Light Emitting Chip)이 구비되어 있고, 캐비티(140)는 파장 변환재(160)를 함유하는 봉지재(170)로 채워져 있다. 수직형 반도체 발광소자 칩(150)의 하면이 리드 프레임(110)에 전기적으로 직접 연결되고, 상면이 와이어(180)에 의해 리드 프레임(120)에 전기적으로 연결되어 있다. 수직형 반도체 발광소자 칩(150)에서 나온 광의 일부가 파장 변환재(160)를 여기 시켜 다른 색의 광을 만들어 두 개의 서로 다른 광이 혼합되어 백색광을 만들 수 있다. 예를 들어 반도체 발광소자 칩(150)은 청색광을 만들고 파장 변환재(160)에 여기 되어 만들어진 광은 황색광이며, 청색광과 황색광이 혼합되어 백색광을 만들 수 있다. 도 3은 수직형 반도체 발광소자 칩(150)을 사용한 반도체 발광소자를 보여주고 있지만, 도 1 및 도 2에 도시된 반도체 발광소자 칩을 사용하여 도 3과 같은 형태의 반도체 발광소자를 제조할 수도 있다.The semiconductor light emitting device 100 includes a vertical semiconductor light emitting chip 150 in the lead frames 110 and 120, the mold 130, and the cavity 140, and the cavity 140. Is filled with the encapsulant 170 containing the wavelength converting member 160. The lower surface of the vertical semiconductor light emitting device chip 150 is electrically connected directly to the lead frame 110, and the upper surface is electrically connected to the lead frame 120 by the wire 180. A portion of the light emitted from the vertical semiconductor light emitting device chip 150 may excite the wavelength conversion material 160 to produce light of different colors, and two different lights may be mixed to form white light. For example, the semiconductor light emitting device chip 150 may generate blue light, and light generated by being excited by the wavelength converting material 160 may be yellow light, and blue light and yellow light may be mixed to produce white light. 3 illustrates a semiconductor light emitting device using the vertical semiconductor light emitting device chip 150, but a semiconductor light emitting device having a shape similar to that of FIG. 3 may be manufactured using the semiconductor light emitting device chips illustrated in FIGS. 1 and 2. have.
이에 대하여 '발명의 실시를 위한 구체적인 내용'의 후단에 기술한다.This is described later in the section titled 'Details of the Invention.'
여기서는, 본 개시의 전체적인 요약(Summary)이 제공되며, 이것이 본 개시의 외연을 제한하는 것으로 이해되어서는 아니 된다(This section provides a general summary of the disclosure and is not a comprehensive disclosure of its full scope or all of its features).This section provides a general summary of the disclosure and is not a comprehensive disclosure of its full scope or all, provided that this is a summary of the disclosure. of its features).
본 개시에 따른 일 태양에 의하면(According to one aspect of the present disclosure), 반도체 발광소자에 있어서, 제1 도전부, 제2 도전부 및 제1 도전부와 제2 도전부 사이에 위치하는 절연부를 포함하는 기판; 기판 위에 위치하며 바닥부를 포함하는 몸체;로서, 바닥부에 홀이 형성된 몸체; 홀에 의해 노출된 기판 위에 배치되며 기판과 전기적으로 연결된 반도체 발광소자 칩;으로서, 전자와 전공의 재결합에 의해 자외선을 생성하는 복수의 반도체층과, 복수의 반도체층에 전기적으로 연결된 전극을 가지는 반도체 발광소자 칩; 그리고, 몸체의 내측면의 적어도 일부분에 형성된 반사층을 포함하는 반도체 발광소자가 제공된다.According to one aspect of the present disclosure, in a semiconductor light emitting device, a first conductive portion, a second conductive portion, and an insulating portion positioned between the first conductive portion and the second conductive portion A substrate comprising; A body disposed on the substrate and including a bottom portion, the body having a hole formed in the bottom portion; A semiconductor light emitting device chip disposed on a substrate exposed by a hole and electrically connected to a substrate, comprising: a semiconductor having a plurality of semiconductor layers generating ultraviolet rays by recombination of electrons and holes, and electrodes electrically connected to the plurality of semiconductor layers Light emitting device chip; In addition, a semiconductor light emitting device including a reflective layer formed on at least a portion of an inner surface of a body is provided.
본 개시에 따른 다른 태양에 의하면(According to another aspect of the present disclosure), 반도체 발광소자에 있어서, 제1 도전부, 제2 도전부 및 제1 도전부와 제2 도전부 사이에 위치하는 절연부를 포함하는 기판; 기판 위에 위치하고, 기판과 전기적으로 연결된 반도체 발광소자 칩;으로서, 전자와 전공의 재결합에 의해 자외선을 생성하는 복수의 반도체층과, 복수의 반도체층에 전기적으로 연결된 전극을 가지는 반도체 발광소자 칩; 기판 위에 위치하고, 반도체 발광소자 칩을 둘러싸고 있는 벽; 으로서, 벽의 하면과 이어지는 제1 면과, 제1 면과 이어지는 제2 면을 포함하는 벽; 벽의 하면과 기판 사이에 개재되는 절연성 접착층; 기판과 반도체 발광소자 칩 사이에 개재되며, 전극과 기판을 전기적으로 연결하는 본딩 패드; 그리고, 벽의 내측면의 적어도 일부분에 형성된 반사층을 포함하고, 본딩 패드는 제1 도전부 및 제2 도전부와 서로 다른 물질로 이루어지는 것을 특징으로 하는 반도체 발광소자가 제공된다.According to an aspect according to the present disclosure, in a semiconductor light emitting device, a first conductive portion, a second conductive portion, and an insulating portion positioned between the first conductive portion and the second conductive portion A substrate comprising; A semiconductor light emitting device chip disposed on a substrate and electrically connected to a substrate, comprising: a semiconductor light emitting device chip having a plurality of semiconductor layers generating ultraviolet rays by recombination of electrons and holes, and electrodes electrically connected to the plurality of semiconductor layers; A wall disposed on the substrate and surrounding the semiconductor light emitting device chip; A wall, comprising: a wall comprising a bottom surface and a first face, the first face and a second face; An insulating adhesive layer interposed between the lower surface of the wall and the substrate; A bonding pad interposed between the substrate and the semiconductor light emitting device chip and electrically connecting the electrode and the substrate; And a reflective layer formed on at least a portion of the inner side surface of the wall, wherein the bonding pad is made of a material different from that of the first conductive portion and the second conductive portion.
본 개시에 따른 다른 태양에 의하면(According to another aspect of the present disclosure), 반도체 발광소자에 있어서, 제1 도전부, 제2 도전부 및 제1 도전부와 제2 도전부 사이에 위치하는 절연부를 포함하는 기판; 기판 위에 배치되고 기판과 전기적으로 연결된 반도체 발광소자 칩; 그리고, 기판의 측면에 위치하고, 반도체 발광소자 칩 및 기판을 둘러싸고 있는 벽;으로서, 벽의 하면과 이어진 제1 면 및 제1 면과 이어진 제2 면을 포함하는 벽;을 포함하고, 벽의 하면과 기판의 하면은 동일한 선상에 위치하는 것을 특징으로 하는 반도체 발광소자가 제공된다.According to an aspect according to the present disclosure, in a semiconductor light emitting device, a first conductive portion, a second conductive portion, and an insulating portion positioned between the first conductive portion and the second conductive portion A substrate comprising; A semiconductor light emitting device chip disposed on the substrate and electrically connected to the substrate; And a wall disposed on a side surface of the substrate and surrounding the semiconductor light emitting device chip and the substrate, the wall including a first surface connected to a lower surface of the wall and a second surface connected to the first surface. The lower surface of the substrate and the substrate is provided with a semiconductor light emitting device, characterized in that located on the same line.
본 개시에 따른 다른 태양에 의하면(According to another aspect of the present disclosure), 반도체 발광소자에 있어서, 바닥부를 포함하는 몸체;로서, 바닥부에 홀이 형성된 몸체; 홀에 의해 노출된 기판 위에 배치되며 기판과 전기적으로 연결된 반도체 발광소자 칩;으로서, 전자와 전공의 재결합에 의해 자외선을 생성하는 복수의 반도체층과, 복수의 반도체층에 전기적으로 연결된 전극을 가지는 반도체 발광소자 칩; 그리고, 몸체의 내측면의 적어도 일부분에 형성된 반사층을 포함하고, 반사층은: 몸체의 내측면에 절연성 물질을 코팅하여 제1 두께를 갖는 코팅층; 그리고 코팅층과 접촉하며 금속성 반사물질이 증착되어 제2 두께를 갖는 금속층;을 포함하는 반도체 발광소자가 제공된다.According to another aspect of the present disclosure (According to another aspect of the present disclosure), a semiconductor light emitting device comprising: a body including a bottom portion, the body having a hole formed in the bottom portion; A semiconductor light emitting device chip disposed on a substrate exposed by a hole and electrically connected to a substrate, comprising: a semiconductor having a plurality of semiconductor layers generating ultraviolet rays by recombination of electrons and holes, and electrodes electrically connected to the plurality of semiconductor layers Light emitting device chip; And a reflective layer formed on at least a portion of the inner side of the body, the reflective layer comprising: a coating layer having a first thickness by coating an insulating material on the inner side of the body; And a metal layer in contact with the coating layer and deposited with a metallic reflective material, the second layer having a second thickness.
본 개시에 따른 다른 태양에 의하면(According to another aspect of the present disclosure), 반도체 발광소자에 있어서, 복수개의 홀이 장방향으로 형성된 바닥부를 포함하는 몸체; 몸체의 양쪽 측면에 형성된 바닥부의 홀 각각에 수용되는 반도체 발광소자 칩;으로서, 전자와 정공의 재결합에 의해 빛을 생성하는 활성층을 포함하는 복수의 반도체층과 복수의 반도체층에 전기적으로 연결된 전극을 구비하는 반도체 발광소자 칩; 반도체 발광소자 칩 사이에 위치하는 바닥부의 홀에 형성되는 보강재; 그리고 반도체 발광소자 칩 및 보강재를 고정시키기 위해 몸체 내부에 채워지는 봉지재;를 포함하는 반도체 발광소자가 제공된다.According to another aspect of the present disclosure, there is provided a semiconductor light emitting device, comprising: a body including a bottom portion having a plurality of holes formed in a longitudinal direction; A semiconductor light emitting device chip accommodated in each of the bottom hole formed on both sides of the body; A plurality of semiconductor layers including an active layer for generating light by recombination of electrons and holes and electrodes electrically connected to the plurality of semiconductor layers A semiconductor light emitting device chip; A reinforcing member formed in a hole in the bottom portion positioned between the semiconductor light emitting device chips; And an encapsulant filled in the body to fix the semiconductor light emitting device chip and the reinforcing material.
본 개시에 따른 다른 태양에 의하면(According to another aspect of the present disclosure), 반도체 발광소자의 제조방법에 있어서, 서로 상이한 폭을 갖는 복수개의 홀이 장방향으로 형성된 바닥부를 구비하는 몸체를 베이스에 배치하는 단계; 장방향으로 양쪽 측면에 형성된 바닥부의 제1 홀 각각에 반도체 발광소자 칩을 배치하는 단계; 반도체 발광소자 칩이 배치되지 않는 바닥부의 제2 홀에 보강재를 배치하는 단계; 그리고 몸체 내부에 봉지재를 투입하는 단계;를 포함하는 반도체 발광소자의 제조방법이 제공된다.According to another aspect of the present disclosure (According to another aspect of the present disclosure), in a method of manufacturing a semiconductor light emitting device, a body having a bottom portion in which a plurality of holes having different widths are formed in a longitudinal direction is disposed on a base. Making; Disposing a semiconductor light emitting device chip in each of the first holes of the bottom part formed at both sides in the longitudinal direction; Disposing a reinforcing material in a second hole of a bottom portion where the semiconductor light emitting device chip is not disposed; And inserting an encapsulant into the body. A method of manufacturing a semiconductor light emitting device is provided.
이에 대하여 '발명의 실시를 위한 구체적인 내용'의 후단에 기술한다.This is described later in the section titled 'Details of the Invention.'
도 1은 종래의 반도체 발광소자 칩의 일 예를 나타내는 도면,1 is a view showing an example of a conventional semiconductor light emitting device chip;
도 2는 미국 등록특허공보 제7,262,436호에 제시된 반도체 발광소자 칩의 다른 예를 나타내는 도면,2 is a view showing another example of a semiconductor light emitting device chip disclosed in US Patent No. 7,262,436;
도 3은 종래의 반도체 발광소자의 일 예를 나타내는 도면,3 is a view showing an example of a conventional semiconductor light emitting device;
도 4는 본 개시에 따른 반도체 발광소자의 일 예를 보여주는 도면,4 illustrates an example of a semiconductor light emitting device according to the present disclosure;
도 5는 본 개시에 따른 반도체 발광소자의 다른 일 예를 보여주는 도면,5 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
도 6은 본 개시에 따른 반도체 발광소자의 또 다른 일 예를 보여주는 도면,6 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
도 7은 본 개시에 따른 반도체 발광소자의 또 다른 일 예를 보여주는 도면,7 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
도 8은 도 7에 개시된 반도체 발광소자의 다양한 실시예를 보여주는 도면,8 is a view illustrating various embodiments of a semiconductor light emitting device disclosed in FIG. 7;
도 9는 본 개시에 따른 반도체 발광소자의 제조방법의 일 예를 보여주는 도면,9 is a view showing an example of a method of manufacturing a semiconductor light emitting device according to the present disclosure;
도 10은 본 개시에 따른 반도체 발광소자의 제조방법의 다른 일 예를 보여주는 도면,10 is a view showing another example of a method of manufacturing a semiconductor light emitting device according to the present disclosure;
도 11은 본 개시에 따른 반도체 발광소자의 일 예를 보여주는 도면,11 illustrates an example of a semiconductor light emitting device according to the present disclosure;
도 12는 본 개시에 따른 반도체 발광소자의 다른 일 예를 보여주는 도면,12 illustrates another example of a semiconductor light emitting device according to the present disclosure;
도 13은 본 개시에 따른 반도체 발광소자의 또 다른 일 예를 보여주는 도면,13 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
도 14는 본 개시에 따른 반도체 발광소자의 또 다른 일 예를 보여주는 도면,14 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
도 15 내지 도 19는 도 10에 도시된 반도체 발광소자의 제조방법의 일 예를 보여주는 도면,15 to 19 illustrate an example of a method of manufacturing the semiconductor light emitting device shown in FIG. 10;
도 20은 도 11에 도시된 반도체 발광소자의 제조방법의 다른 일 예를 보여주는 도면,20 is a view showing another example of the method of manufacturing the semiconductor light emitting device shown in FIG.
도 21은 본 개시에 따른 반도체 발광소자의 일 예를 보여주는 도면,21 illustrates an example of a semiconductor light emitting device according to the present disclosure;
도 22는 본 개시에 따른 반도체 발광소자의 다른 일 예를 보여주는 도면,22 illustrates another example of a semiconductor light emitting device according to the present disclosure;
도 23은 본 개시에 따른 반도체 발광소자의 또 다른 일 예를 보여주는 도면,23 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
도 24는 본 개시에 따른 반도체 발광소자의 또 다른 일 예를 보여주는 도면,24 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
도 25는 본 개시에 따른 반도체 발광소자의 또 다른 일 예를 보여주는 도면,25 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
도 26은 본 개시에 따른 반도체 발광소자의 제조방법의 일 예를 보여주는 도면,26 is a view showing an example of a method of manufacturing a semiconductor light emitting device according to the present disclosure;
도 27은 본 개시에 따른 반도체 발광소자의 일 예를 보여주는 도면,27 illustrates an example of a semiconductor light emitting device according to the present disclosure;
도 28은 본 개시에 따른 반도체 발광소자의 다른 일 예를 보여주는 도면,28 illustrates another example of a semiconductor light emitting device according to the present disclosure;
도 29는 본 개시에 따른 반도체 발광소자의 또 다른 일 예를 보여주는 도면,29 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
도 30은 본 개시에 따른 반도체 발광소자의 또 다른 일 예를 보여주는 도면,30 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
도 31은 본 개시에 따른 반도체 발광소자의 또 다른 일 예를 보여주는 도면,31 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
도 32는 본 개시에 따른 반도체 발광소자의 또 다른 일 예를 보여주는 도면,32 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
도 33은 본 개시에 따른 반도체 발광소자의 제조방법의 일 예를 보여주는 도면,33 is a view showing an example of a method of manufacturing a semiconductor light emitting device according to the present disclosure;
도 34는 본 개시에 따른 반도체 발광소자의 제조방법의 일 예를 보여주는 도면.34 is a view showing an example of a method of manufacturing a semiconductor light emitting device according to the present disclosure.
도 35는 본 개시에 따른 반도체 발광소자의 또 다른 일 예를 보여주는 도면,35 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
도 36은 본 개시에 따른 반도체 발광소자의 또 다른 일 예를 보여주는 도면,36 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
도 37은 본 개시에 따른 반도체 발광소자의 또 다른 일 예를 보여주는 도면,37 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
도 38은 본 개시에 따른 반도체 발광소자의 또 다른 일 예를 보여주는 도면,38 illustrates another example of a semiconductor light emitting device according to the present disclosure;
도 39는 본 개시에 따른 반도체 발광소자의 또 다른 일 예를 보여주는 도면,39 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
도 40은 본 개시에 따른 반도체 발광소자의 또 다른 일 예를 보여주는 도면,40 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
도 41은 본 개시에 따른 반도체 발광소자의 제조방법의 일 예를 보여주는 도면,41 is a view showing an example of a method of manufacturing a semiconductor light emitting device according to the present disclosure;
도 42는 본 개시에 따른 반도체 발광소자의 다른 제조방법의 일 예를 보여주는 도면,42 illustrates an example of another method of manufacturing a semiconductor light emitting device according to the present disclosure;
도 43은 본 개시에 따른 반도체 발광소자의 또 다른 일 예를 보여주는 도면.43 is a view showing another example of a semiconductor light emitting device according to the present disclosure.
이하, 본 개시를 첨부된 도면을 참고로 하여 자세하게 설명한다(The present disclosure will now be described in detail with reference to the accompanying drawing(s)).The present disclosure will now be described in detail with reference to the accompanying drawing (s).
도 4는 본 개시에 따른 반도체 발광소자의 일 예를 보여주는 도면이다.4 is a diagram illustrating an example of a semiconductor light emitting device according to the present disclosure.
도 4(a)는 사시도이며, 도 4(b)는 AA'를 따라 자른 단면도이고, 도 4(c)는 절연성 접착층을 추가로 포함하는 반도체 발광소자를 나타내는 도면이고, 도 4(d)는 기판으로부터 이격되어 위치하는 반사층을 포함하는 반도체 발광소자를 나타내는 도면이다.4 (a) is a perspective view, FIG. 4 (b) is a cross-sectional view taken along AA ′, and FIG. 4 (c) is a view showing a semiconductor light emitting device further including an insulating adhesive layer. A semiconductor light emitting device including a reflective layer spaced apart from a substrate is shown.
반도체 발광소자(200)는 기판(210), 반도체 발광소자 칩(220), 몸체(230), 반사층(240) 및 봉지재(250)를 포함한다.The semiconductor light emitting device 200 includes a substrate 210, a semiconductor light emitting device chip 220, a body 230, a reflective layer 240, and an encapsulant 250.
기판(210)은 제1 도전부(211), 제2 도전부(212) 및 제1 도전부(211)과 제2 도전부(212) 사이에 위치하는 절연부(213)를 포함한다. 여기서, 기판(210)을 제조하는 방법은 한국 공개특허공보 제2012-0140454호에 기재되어 있다.The substrate 210 includes a first conductive portion 211, a second conductive portion 212, and an insulating portion 213 positioned between the first conductive portion 211 and the second conductive portion 212. Here, the method of manufacturing the substrate 210 is described in Korean Patent Laid-Open No. 2012-0140454.
제1 도전부(211) 및 제2 도전부(212)는 예를 들어 알루미늄(Al), 구리(Cu) 등과 같은 금속성 물질로 형성될 수 있다.The first conductive portion 211 and the second conductive portion 212 may be formed of a metallic material such as aluminum (Al), copper (Cu), or the like.
제1 도전부(211) 및 제2 도전부(212)가 도 3에 기재된 반도체 발광소자에서 리드 프레임 기능을 갖고 외부와 전기적으로 연결된다.The first conductive portion 211 and the second conductive portion 212 have a lead frame function in the semiconductor light emitting device of FIG. 3 and are electrically connected to the outside.
제1 도전부(211) 및 제2 도전부(212)는 전기적인 접촉이 우수한 물질, 예를 들어, 금(Au), 은(Ag), 니켈(Ni), 알루미늄(Al), 로듐(Rh), 납(Pd), 이리듐(Ir), 루테늄(Ru), 마그네슘(Mg), 아연(Zn) 중 적어도 하나를 포함하는 금속 또는 합금으로 형성될 수 있다.The first conductive portion 211 and the second conductive portion 212 are excellent in electrical contact, for example, gold (Au), silver (Ag), nickel (Ni), aluminum (Al), rhodium (Rh). ), Lead (Pd), iridium (Ir), ruthenium (Ru), may be formed of a metal or alloy containing at least one of magnesium (Mg), zinc (Zn).
본 예에서, 제1 도전부(211) 및 제2 도전부(212)가 전기적인 접촉이 우수한 금속성 물질 예를 들어, 금(Au)으로 형성되는 경우 기판(210)과 반도체 발광소자 칩(220) 및 몸체(230)와의 전기적 연결 및 물리적 연결을 용이하게 하여 반도체 발광소자(200)의 신뢰성을 향상시킬 수 있다. 이에 따라, 반도체 발광소자(200)의 광 추출 효율(extraction efficiency)을 향상시킬 수 있다.In the present example, when the first conductive portion 211 and the second conductive portion 212 are formed of a metallic material having excellent electrical contact, for example, gold (Au), the substrate 210 and the semiconductor light emitting device chip 220 ) And the electrical connection and physical connection with the body 230 can be facilitated to improve the reliability of the semiconductor light emitting device 200. Accordingly, light extraction efficiency of the semiconductor light emitting device 200 may be improved.
절연부(213)는 전기 절연물질로 형성될 수 있으나 이에 한정되는 것은 아니다.The insulation unit 213 may be formed of an electrically insulating material, but is not limited thereto.
반도체 발광소자 칩(220)은 제1 전극(221) 및 제2 전극(222)을 포함하며, 래터럴 칩, 플립 칩 또는 수직 칩이 가능하다. 다만 플립 칩을 사용하는 경우 제1 전극(221)과 제2 전극(222)이 와이어 본딩을 사용하지 않고 제1 도전부(211) 및 제2 도전부(212) 위에 위치하여 전기적으로 연결될 수 있어 바람직하다.The semiconductor light emitting device chip 220 may include a first electrode 221 and a second electrode 222, and may be a lateral chip, a flip chip, or a vertical chip. However, when using a flip chip, the first electrode 221 and the second electrode 222 may be electrically connected to each other by being positioned on the first conductive portion 211 and the second conductive portion 212 without using wire bonding. desirable.
기판(210)의 높이(H1)는 몸체(230)의 높이(H2)와 동일하게 형성될 수 있다. 하지만, 이에 한정되지 않고, 기판(210)의 높이(H1)가 몸체(230)의 높이(H2)보다 작거나 크게 형성될 수 있다.The height H1 of the substrate 210 may be formed to be the same as the height H2 of the body 230. However, the present invention is not limited thereto, and the height H1 of the substrate 210 may be smaller or larger than the height H2 of the body 230.
몸체(230)는 기판(210) 위에 형성되며 반도체 발광소자 칩(220)을 둘러싸고 있으며, 측벽(231) 및 바닥부(232)를 포함한다. 여기서, 몸체(230)는 예를 들어 수지 계열 또는 세라믹 계열의 절연성 물질을 사용하여 사출 성형을 통해 얻을 수 있다.The body 230 is formed on the substrate 210 and surrounds the semiconductor light emitting device chip 220, and includes a sidewall 231 and a bottom portion 232. Here, the body 230 may be obtained through injection molding, for example, using an insulating material of resin-based or ceramic-based.
여기서, 몸체(230)의 높이(H2)는 몸체(230)의 길이(L)보다 작을 수 있다. 예를 들어 몸체(230)의 높이(H2)는 0.1mm 이상 내지 0.6mm 이하일 수 있으며, 몸체(230)의 길이(L)는 0.5mm 이상일 수 있다.Here, the height H2 of the body 230 may be smaller than the length L of the body 230. For example, the height H2 of the body 230 may be 0.1 mm or more and 0.6 mm or less, and the length L of the body 230 may be 0.5 mm or more.
바닥부(232)는 홀(233)을 포함한다. 또한 측벽(231) 및 바닥부(232)에 의해 형성된 캐비티(234)를 포함한다.The bottom portion 232 includes a hole 233. It also includes a cavity 234 formed by sidewalls 231 and bottom 232.
바닥부(232)는 상면(2320)과 하면(2321)을 포함한다.The bottom part 232 includes an upper surface 2320 and a lower surface 2321.
측벽(231)은 외측면(2310)과 내측면(2311)을 포함한다. 한편, 측벽(231)은 필요에 따라 없을 수도 있다. Sidewall 231 includes an outer surface 2310 and an inner surface 2311. On the other hand, the side wall 231 may not exist as needed.
홀(233)의 크기는 반도체 발광소자 칩(220)의 크기와 비슷하거나 반도체 발광소자 칩(220)의 크기의 1.2배가 바람직하다.The size of the hole 233 is similar to that of the semiconductor light emitting device chip 220 or 1.2 times the size of the semiconductor light emitting device chip 220.
또한 홀(233)을 형성하는 바닥부(232)의 내측면(2322)은 광 추출 효율의 향상을 위해 경사진 것이 바람직하다.In addition, the inner surface 2322 of the bottom portion 232 forming the hole 233 is preferably inclined to improve the light extraction efficiency.
반도체 발광소자 칩(220)은 홀(233)에 위치하고 있다.The semiconductor light emitting device chip 220 is located in the hole 233.
반도체 발광소자 칩(220)은 래터럴 칩, 수직 칩 및 플립 칩이 가능하다.The semiconductor light emitting device chip 220 may be a lateral chip, a vertical chip, and a flip chip.
제1 전극(221) 및 제2 전극(222)은 봉지재(250)에 의해 덮이지 않고 봉지재(250)의 하면으로부터 노출된다.The first electrode 221 and the second electrode 222 are not covered by the encapsulant 250 and are exposed from the lower surface of the encapsulant 250.
바닥부(232)의 높이(2323)는 반도체 발광소자 칩(220)의 높이(223)보다 낮은 것이 바람직하다. 바닥부(232)의 높이(2323)가 반도체 발광소자 칩(220)의 높이(223)보다 높은 경우 반도체 발광소자(200)의 광 추출 효율이 떨어질 수 있기 때문이다. 다만 광 추출 효율이 떨어질 수 있지만, 광 경로 등을 고려하여 바닥부(232)의 높이(2323)가 반도체 발광소자 칩(220)의 높이(223)보다 높게 할 수도 있다. 바닥부(232)의 높이(2323)가 반도체 발광소자 칩(220)의 높이(223)보다 높은 경우에 대해서는 도 7에서 설명한다.The height 2323 of the bottom portion 232 is preferably lower than the height 223 of the semiconductor light emitting device chip 220. This is because the light extraction efficiency of the semiconductor light emitting device 200 may be deteriorated when the height 2323 of the bottom portion 232 is higher than the height 223 of the semiconductor light emitting device chip 220. However, although the light extraction efficiency may be reduced, the height 2323 of the bottom portion 232 may be higher than the height 223 of the semiconductor light emitting device chip 220 in consideration of an optical path. A case in which the height 2323 of the bottom portion 232 is higher than the height 223 of the semiconductor light emitting device chip 220 will be described with reference to FIG. 7.
바닥부(232)의 높이(2323) 및 반도체 발광소자 칩(220)의 높이(223)는 바닥부(232)의 하면(2321)을 기준으로 측정할 수 있다.The height 2323 of the bottom part 232 and the height 223 of the semiconductor light emitting device chip 220 may be measured based on the bottom surface 2321 of the bottom part 232.
예를 들어, 반도체 발광소자 칩(220)의 높이(223)는 0.05mm 이상 내지 0.5mm 이하 일 수 있다. 바닥부(232)의 높이(2323)는 0.08mm 이상 내지 0.4mm 이하 일 수 있다.For example, the height 223 of the semiconductor light emitting device chip 220 may be 0.05 mm or more and 0.5 mm or less. The height 2323 of the bottom portion 232 may be 0.08 mm or more and 0.4 mm or less.
반사층(240)은 측벽(231)의 내측면(2311), 바닥부(232)의 상면(2320) 및 바닥부(232)의 내측면(2322)의 일면에 형성된다. 여기서, 측벽(231)의 내측면(2311), 바닥부(232)의 상면(2320) 및 바닥부(232)의 내측면(2322)은 하나의 라인으로 연결되어 위치한다. 즉, 반사층(240)은 반도체 발광소자 칩(220)을 덮는 봉지재(250)와 접속하는 몸체(230)의 일면에 형성된다.The reflective layer 240 is formed on an inner surface 2311 of the sidewall 231, an upper surface 2320 of the bottom portion 232, and one surface of an inner surface 2322 of the bottom portion 232. Here, the inner surface 2311 of the side wall 231, the upper surface 2320 of the bottom portion 232, and the inner surface 2322 of the bottom portion 232 are connected in one line. That is, the reflective layer 240 is formed on one surface of the body 230 that connects to the encapsulant 250 covering the semiconductor light emitting device chip 220.
반사층(240)은 빛을 반사하는 효율이 높은 금속성 물질로 이루어진 것이 바람직하며 예를 들어 금속성 물질이 코팅, 도금 및 증착 등과 같은 방법으로 형성될 수 있다.The reflective layer 240 is preferably made of a highly efficient metallic material that reflects light, and for example, the metallic material may be formed by a method such as coating, plating, and deposition.
반사층(240)을 형성하는 금속성 물질에는 예를 들어 은(Ag), 알루미늄(Al) 등이 있지만 비용 및 효율을 고려했을 때 알루미늄(Al)이 바람직하다.Examples of the metallic material forming the reflective layer 240 include silver (Ag) and aluminum (Al), but aluminum (Al) is preferable in consideration of cost and efficiency.
더욱이, 반도체 발광소자 칩(220)을 자외선 칩으로 사용하는 경우, 반사층(240)은 자외선에서 반사하는 효율이 높은 알루미늄(Al)으로 형성되는 것이 바람직하다. 반사층(240)이 알루미늄(Al)으로 형성됨으로써, 반도체 발광소자 칩(220)으로부터 나온 빛 예를 들어, 자외선의 일부를 반사시킴으로써, 반도체 발광소자의 광 추출 효율(extraction efficiency)을 향상시킬 수 있다.In addition, when the semiconductor light emitting device chip 220 is used as an ultraviolet chip, the reflective layer 240 is preferably formed of aluminum (Al) having high efficiency of reflecting from ultraviolet light. Since the reflective layer 240 is formed of aluminum (Al), light extraction efficiency of the semiconductor light emitting device may be improved by reflecting a portion of light, for example, ultraviolet light, emitted from the semiconductor light emitting device chip 220. .
또한, 도시 하지는 않았지만 몸체(230)의 상면에도 반사층이 형성될 수 있다. 예를 들어, 몸체(230)의 상면에 금속성 물질 또는 DBR 분포 브래그 리플렉터(DBR: Distributed Bragg Reflector)를 도포하여 반사층을 형성할 수 있다.In addition, although not shown, a reflective layer may be formed on the upper surface of the body 230. For example, a reflective layer may be formed by coating a metallic material or a DBR distributed Bragg reflector (DBR) on the upper surface of the body 230.
한편, 도 4(c)를 살펴보면, 몸체(230)가 절연성 물질로 형성되지만, 몸체(230)의 내측면에 반사층(240)이 형성되는 과장에서 바닥부(232)의 내측면(2322)에 형성된 반사층(240)과 기판(210)에 의한 쇼트 방지를 위해 반사층(240) 형성 이후, 바닥부(232)의 내측면(2322)에 절연층(23220)을 별도로 형성하여 쇼트 위험성을 낮출 수 있다.On the other hand, referring to Figure 4 (c), although the body 230 is formed of an insulating material, in the exaggeration that the reflective layer 240 is formed on the inner surface of the body 230 on the inner surface 2232 of the bottom portion 232 After forming the reflective layer 240 to prevent the short by the formed reflective layer 240 and the substrate 210, an insulating layer 2320 may be separately formed on the inner surface 2232 of the bottom part 232 to reduce the risk of short circuit. .
또한, 바닥부(232)의 하면(2321)과 기판(210) 사이에 절연성 접착층(235)이 개재될 수 있다. 절연성 접착층(235)은 절연성 접착제를 사용하여 기판(210)과 몸체(230)을 접착하면서 형성되며, 이때 절연성 접착제의 일부가 제1 내측면(241)에 형성되어 금속성 반사층(240)에 의한 쇼트 위험성이 더 낮아질 수 있다.In addition, an insulating adhesive layer 235 may be interposed between the lower surface 2321 of the bottom part 232 and the substrate 210. The insulating adhesive layer 235 is formed by bonding the substrate 210 and the body 230 using an insulating adhesive, wherein a portion of the insulating adhesive is formed on the first inner surface 241 to be shortened by the metallic reflective layer 240. The risk may be lower.
그리고, 도 4(d)를 살펴보면, 반사층(240)은 바닥부(232) 내측면(2322) 중 기판(210)과 접촉하는 일부분(23221)을 제외한 나머지 바닥부(232)의 내측면(2322) 및 측벽(231)의 내측면(2311)에만 형성된다. 이에 따라, 반사층(240)이 기판(210)과 소정 간격으로 이격되어 위치함으로써, 금속성 물질로 이루어지는 반사층(240)과 기판(210) 사이에 쇼트 위험성을 방지할 수 있다.4 (d), the reflective layer 240 has an inner side surface 2232 of the bottom portion 232 except for a portion 2321 in contact with the substrate 210 of the inner side surface 2232 of the bottom portion 232. And the inner side surface 2311 of the side wall 231. Accordingly, since the reflective layer 240 is spaced apart from the substrate 210 at predetermined intervals, short risks may be prevented between the reflective layer 240 made of a metallic material and the substrate 210.
또한 도시하지 않았지만, 반사층(240)이 바닥부(232)의 내측면(2322)을 제외한 측벽(231)의 내측면(2311) 에만 형성됨으로써, 금속성 물질로 이루어지는 반사층(240)과 기판(210) 사이에 쇼트 위험성이 더 낮아 질 수 있다.Although not shown, the reflective layer 240 is formed only on the inner surface 2311 of the sidewall 231 except for the inner surface 2232 of the bottom portion 232, thereby forming the reflective layer 240 and the substrate 210 made of a metallic material. Shorter risks can be made in between.
봉지재(250)는 적어도 캐비티(214)에 구비되어 반도체 발광소자 칩(220)을 덮고 있어서, 홀(233)에 위치하고 있는 반도체 발광소자 칩(220)을 몸체(230)에 고정시킬 수 있다.The encapsulant 250 is provided at least in the cavity 214 to cover the semiconductor light emitting device chip 220, so that the semiconductor light emitting device chip 220 positioned in the hole 233 may be fixed to the body 230.
봉지재(250)는 투광성을 갖고 있으며, 예를 들어 에폭시 수지 및 실리콘 수지 중 하나로 이루어질 수 있으며, 반도체 발광소자 칩(220)을 자외선 칩으로 사용하는 경우에는 PDMS(polydimethylsiloxane)계 수지로 이루어질 수 있다. 한편, 봉지재(250)는 생략될 수 있다. 봉지재(250)가 생략되는 경우 유리 또는 석영 등으로 덮일 수 있다.The encapsulant 250 has a light transmitting property, and may be formed of one of an epoxy resin and a silicone resin. For example, when the semiconductor light emitting device chip 220 is used as an ultraviolet chip, the encapsulant 250 may be made of PDMS (polydimethylsiloxane) resin. . Meanwhile, the encapsulant 250 may be omitted. When the encapsulant 250 is omitted, the encapsulant 250 may be covered with glass or quartz.
도 5는 본 개시에 따른 반도체 발광소자의 다른 예를 보여주는 도면이다.5 is a view showing another example of a semiconductor light emitting device according to the present disclosure.
도 5는 본 개시에 따른 반도체 발광소자의 다른 예를 보여주는 도면이다.5 is a view showing another example of a semiconductor light emitting device according to the present disclosure.
반도체 발광소자(300)는 몸체(330)의 바닥부(331)와 반도체 발광소자 칩(320) 사이에 반사 물질(360)을 포함한다.The semiconductor light emitting device 300 includes a reflective material 360 between the bottom portion 331 of the body 330 and the semiconductor light emitting device chip 320.
도 5에 도시된 반사 물질(360) 및 도 4에 도시된 반사층(240)을 제외하고는 도 4에 기재된 반도체 발광소자(200)와 동일한 특성을 갖는다.Except for the reflective material 360 shown in FIG. 5 and the reflective layer 240 shown in FIG. 4, the semiconductor light emitting device has the same characteristics as the semiconductor light emitting device 200 of FIG. 4.
반사 물질(360)이 반도체 발광소자 칩(320)의 측면에 위치함으로써 반도체 발광소자 칩(320)의 측면에서 나오는 빛을 반사시켜, 반도체 발광소자(300)의 광 추출 효율을 향상시킬 수 있다.Since the reflective material 360 is positioned on the side surface of the semiconductor light emitting device chip 320, the light emitted from the side surface of the semiconductor light emitting device chip 320 may be reflected, thereby improving light extraction efficiency of the semiconductor light emitting device 300.
반사 물질(360)은 백색 반사 물질이 바람직하다. 예를 들어 백색 실리콘 수지일 수 있다. 또한 도 5(b)와 같이 반사 물질(360)과 반도체 발광소자 칩(320) 사이에 공간(331)이 형성되게 반사 물질(360)이 위치할 수도 있다.The reflective material 360 is preferably a white reflective material. For example, it may be a white silicone resin. In addition, as illustrated in FIG. 5B, the reflective material 360 may be positioned to form a space 331 between the reflective material 360 and the semiconductor light emitting device chip 320.
도 6은 본 개시에 따른 반도체 발광소자의 또 다른 일 예를 보여주는 도면이다.6 is a view illustrating another example of a semiconductor light emitting device according to the present disclosure.
반도체 발광소자(400)는 몸체(430)의 바닥부(411)에 복수개의 홀(401)을 포함하며, 각각의 홀(401)에 반도체 발광소자 칩(420)이 위치한다.The semiconductor light emitting device 400 includes a plurality of holes 401 at the bottom 411 of the body 430, and the semiconductor light emitting device chip 420 is positioned in each hole 401.
복수개의 홀(401) 및 각각의 홀(401)에 반도체 발광소자 칩(420)이 위치하는 것과 도 4에 도시된 반사층(240)을 제외하고는 도 4에 기재된 반도체 발광소자(200)와 동일한 특성을 갖는다.The semiconductor light emitting device 200 of FIG. 4 is identical to the semiconductor light emitting device 200 of FIG. 4 except that the semiconductor light emitting device chip 420 is positioned in the plurality of holes 401 and each hole 401, and the reflective layer 240 shown in FIG. Has characteristics.
도 6에는 2개의 홀이 기재되어 있으나, 2개 이상도 가능하다. 또한 각각의 홀(401)에 위치하는 반도체 발광소자 칩(420)은 서로 다른 색을 발광할 수 있다.Although two holes are described in FIG. 6, two or more holes are possible. In addition, the semiconductor light emitting device chips 420 disposed in the holes 401 may emit different colors.
도 7은 본 개시에 따른 반도체 발광소자의 다른 예를 보여주는 도면이다.7 illustrates another example of the semiconductor light emitting device according to the present disclosure.
반도체 발광소자(500)는 몸체(530)의 바닥부(532)의 높이(5323)가 반도체 발광소자 칩(520)의 높이(523)보다 높은 것을 특징으로 한다.The semiconductor light emitting device 500 is characterized in that the height 5323 of the bottom 532 of the body 530 is higher than the height 523 of the semiconductor light emitting device chip 520.
구체적으로, 도 7(a)는 도 4에 기재된 반도체 발광소자(200)로서 바닥부(232)의 높이(2323)가 반도체 발광소자 칩(220)의 높이(223)보다 낮은 경우 반도체 발광소자 칩(220)의 측면에서 나오는 빛(224, 225)의 경로를 보여준다.Specifically, FIG. 7A illustrates the semiconductor light emitting device 200 when the height 2323 of the bottom portion 232 is lower than the height 223 of the semiconductor light emitting device 220 as the semiconductor light emitting device 200 of FIG. 4. Show the path of light 224, 225 coming from the side of 220.
도 7(b)는 바닥부(532)의 높이(5323)가 반도체 발광소자 칩(520)의 높이(523)보다 높은 경우 반도체 발광소자 칩(520)의 측면에서 나오는 빛(524, 525)의 경로를 보여준다.FIG. 7B illustrates light 524 and 525 of light emitted from the side of the semiconductor LED chip 520 when the height 5323 of the bottom portion 532 is higher than the height 523 of the semiconductor LED chip 520. Show the path.
도 7(a)를 보면, 반도체 발광소자 칩(220)의 측면에서 나온 빛(224, 225) 중 바닥부(232)의 높이(2323)보다 낮은 부분에서 나오는 빛(224)은 홀(233)을 형성하는 바닥부(232) 내측면(240)에 반사되어 상측으로 나가며, 바닥부(232)의 높이(2323)보다 높은 부분에서 나오는 빛(225)은 홀(233)을 형성하는 바닥부(232)의 내측면(2322)에 반사되지 않고 그대로 상측으로 나간다.Referring to FIG. 7A, light 224 emitted from a portion lower than the height 2323 of the bottom portion 232 of the light 224 and 225 emitted from the side surface of the semiconductor LED chip 220 may be a hole 233. Reflected by the inner surface 240 of the bottom portion 232 to form a top portion, the light 225 coming from a portion higher than the height 2323 of the bottom portion 232 is the bottom portion forming a hole (233) ( It is not reflected by the inner side surface 2232 of the 232 and goes upward.
특히 바닥부(232) 내측면(2322)에 반사되지 않고 상측으로 나가는 빛(225) 때문에 반도체 발광소자 칩(220)의 측면에서 나오는 빛의 경로를 조절하는데 어려움이 있다.In particular, there is a difficulty in controlling the path of the light emitted from the side surface of the semiconductor light emitting device chip 220 due to the light 225 going upward without being reflected by the inner side surface 2322 of the bottom part 232.
반면에 그림 7(b)를 보면 반도체 발광소자 칩(520)의 측면에서 나온 빛(524, 525)의 대부분이 바닥부(532) 내측면(5322)에 반사되어 상측으로 나가기 때문에 7(a)에 비하여 반도체 발광소자 칩(520)의 측면에서 나오는 빛의 경로를 바닥부(532) 내측면(5322)에 의해 조절할 수 있다. 일반적으로 광 추출효율 측면에서는 도 7(a)와 같이 바닥부의 높이가 반도체 발광소자 칩의 높이보다 낮은 것이 바람직하지만, 상측으로 나가는 빛의 경로를 조절하기 위해서는 도 7(b)와 같이 바닥부의 높이가 반도체 발광소자 칩(520)의 높이보다 높은 것이 바람직하다. 다만 도 7(c)와 같이 홀(533)의 상측 개구의 폭(5330)보다 홀의 하측 개구의 폭(5331)이 크게 홀(533)이 형성되도록 홀(533)을 형성하는 바닥부(532)의 내측면(5322)이 경사진 경우에는 반도체 발광소자 칩(520)의 측면에서 나오는 빛(525)의 대부분이 상측으로 나가지 못하기 때문에 바람직하지 않다. 따라서 바닥부(532)의 높이(5323)가 반도체 발광소자 칩(520)의 높이(523)보다 높은 경우에 홀(533)을 형성하는 바닥부(532) 내측면(5322)은 홀(533)의 상측 개구의 폭(5330)이 홀(533)의 하측 개구의 폭(5331)보다 크도록 경사진 것이 바람직하다.On the other hand, as shown in Fig. 7 (b), since most of the light 524 and 525 emitted from the side of the semiconductor light emitting device chip 520 are reflected by the inner surface 5322 of the bottom part 532, the light is emitted upward. In contrast, the path of the light emitted from the side surface of the semiconductor light emitting device chip 520 may be controlled by the inner surface 5322 of the bottom portion 532. Generally, in terms of light extraction efficiency, the height of the bottom portion is preferably lower than the height of the semiconductor light emitting device chip as shown in FIG. 7 (a). Is higher than the height of the semiconductor light emitting device chip 520. However, as shown in FIG. 7C, the bottom portion 532 which forms the hole 533 so that the width 5331 of the lower opening of the hole is larger than the width 5330 of the upper opening of the hole 533 is formed. In the case where the inner side surface 5322 is inclined, most of the light 525 emitted from the side surface of the semiconductor light emitting device chip 520 does not go upward. Therefore, when the height 5323 of the bottom portion 532 is higher than the height 523 of the semiconductor light emitting device chip 520, the inner surface 5322 of the bottom portion 532 forming the hole 533 may be a hole 533. It is preferable to incline so that the width 5330 of the upper opening of the hole may be larger than the width 5331 of the lower opening of the hole 533.
바닥부(532) 내측면(5322)의 다양한 경사각도에 따른 효과는 도 8에서 설명한다. 도 7에서 설명하는 것을 제외하고 반도체 발광소자(500)는 도 4에 기재된 반도체 발광소자(200)와 실질적으로 동일하다.Effects of various inclination angles of the inner side surface 5322 of the bottom portion 532 will be described with reference to FIG. 8. Except as illustrated in FIG. 7, the semiconductor light emitting device 500 is substantially the same as the semiconductor light emitting device 200 of FIG. 4.
도 8은 도 7에 개시된 반도체 발광소자의 다양한 실시 예를 보여주는 도면이다.8 is a view illustrating various embodiments of the semiconductor light emitting device disclosed in FIG. 7.
반도체 발광소자 칩(520)의 측면에서 나오는 빛(525)의 경로를 조절하기 위해서 바닥부(532)의 높이(5323)를 반도체 발광소자 칩(520)의 높이(523)보다 2배 이하로 높이 하는 것이 광 추출 효율 측면에서 바람직하다. 2배보다 더 높은 경우에는 예를 들어 도 8(a)와 같이 반도체 발광소자 칩(520)의 측면에서 나오는 빛(525)이 바닥부(532) 내측면(5322)에 여러 번 반사되어 빛이 일부 손실될 수 있기 때문이다.In order to adjust the path of the light 525 from the side surface of the semiconductor light emitting device chip 520, the height 5323 of the bottom portion 532 is two times or less higher than the height 523 of the semiconductor light emitting device chip 520. It is preferable in terms of light extraction efficiency. When higher than twice, for example, the light 525 from the side surface of the semiconductor light emitting device chip 520 is reflected on the inner surface 5322 of the bottom portion 532 as shown in FIG. Because some may be lost.
또한 도 8(b)를 보면 바닥부(532)의 내측면(5322)이 바닥부(5322)의 하면(7321)과 이루는 경사각(7324)은 45°이상인 것이 바람직하다. 45°미만인 경우에는 바닥부(532) 내측면(5322)에 의해 반도체 발광소자 칩(520)의 측면에서 나오는 빛(525)의 경로를 조절하는 효과가 떨어지기 때문이다. 또한 바닥부(532)의 내측면(5322)이 바닥부(532)의 하면(5321)과 이루는 경사각(5324)은 90°이하인 것이 바람직하다. 경사각(5324)은 90°를 넘는 경우에 발생하는 문제에 대해서는 도 7(c)에서 설명하였다.8B, the inclination angle 7324 formed by the inner surface 5322 of the bottom portion 532 and the lower surface 7321 of the bottom portion 5322 is preferably 45 ° or more. If the angle is less than 45 °, the effect of adjusting the path of the light 525 emitted from the side surface of the semiconductor light emitting device chip 520 by the inner side surface 5322 of the bottom portion 532 is inferior. In addition, it is preferable that the inclination angle 5324 formed by the inner surface 5322 of the bottom portion 532 and the lower surface 5321 of the bottom portion 532 be 90 ° or less. The problem which arises when the inclination angle 5324 exceeds 90 degrees was demonstrated in FIG.7 (c).
도 9는 본 개시에 따른 반도체 발광소자의 제조방법의 일 예를 보여주는 도면이다.9 is a view illustrating an example of a method of manufacturing a semiconductor light emitting device according to the present disclosure.
먼저 도 9(a)를 참조하면, 홀(633)을 포함하는 몸체(630)를 준비한다. 여기서, 몸체(630)는 사출성형을 통해 얻을 수 있다.First, referring to FIG. 9A, a body 630 including a hole 633 is prepared. Here, the body 630 may be obtained through injection molding.
다음으로, 도 9(b)를 참조하면, 몸체(630)의 내측면에 반사층(640)을 형성한다. 이때, 반사층(640)은 증착 방식 또는 스프레이 코팅 등을 이용하여 형성될 수 있다.Next, referring to FIG. 9B, a reflective layer 640 is formed on the inner surface of the body 630. In this case, the reflective layer 640 may be formed using a deposition method or a spray coating.
다음으로, 도 9(c)를 참조하면, 기판(610) 위에 반사층(640)이 형성된 몸체(630)를 배치한다. 바닥부(632)의 하면과 기판(610) 사이에 절연성 접착층(635)이 개재될 수 있다.Next, referring to FIG. 9C, the body 630 having the reflective layer 640 is disposed on the substrate 610. An insulating adhesive layer 635 may be interposed between the bottom surface of the bottom portion 632 and the substrate 610.
다음으로, 도 9(d)를 참조하면, 반도체 발광소자 칩(620)을 홀(633)에 위치시킨다. 이에, 바닥부(632)의 높이(6323)는 홀(633)에 수용되는 반도체 발광소자 칩(620)의 높이보다 높게 형성되는 것이 바람직하다.Next, referring to FIG. 9D, the semiconductor light emitting device chip 620 is positioned in the hole 633. Accordingly, the height 6223 of the bottom portion 632 may be higher than the height of the semiconductor light emitting device chip 620 accommodated in the hole 633.
반도체 발광소자 칩(620)의 제1 전극(621) 및 제2 전극(622)은 각각 기판(610)의 제1 도전부(611) 및 제2 도전부(612) 위에 위치하여 서로 전기적 및 물리적으로 연결된다.The first electrode 621 and the second electrode 622 of the semiconductor light emitting device chip 620 are positioned on the first conductive portion 611 and the second conductive portion 612 of the substrate 610, respectively, so as to be electrically and physically separated from each other. Is connected.
다음으로, 도 9(e)를 참조하면, 반도체 발광소자 칩(620)을 몸체(630)에 고정시키기 위해 봉지재(650)로 반도체 발광소자 칩(620)을 덮는다.Next, referring to FIG. 9E, the semiconductor light emitting device chip 620 is covered with an encapsulant 650 to fix the semiconductor light emitting device chip 620 to the body 630.
본 개시에 따른 반도체 발광소자의 제조방법의 순서는 당업자가 용이하게 변경할 수 있는 범위에서는 본 개시의 범위에 포함될 수 있다.The order of the manufacturing method of the semiconductor light emitting device according to the present disclosure may be included in the scope of the present disclosure as long as the skilled person can easily change.
한편, 반도체 발광소자 칩(620)의 제1 전극(621) 및 제2 전극(622)과 기판(610)의 제1 도전부(611) 및 제2 도전부(612) 간의 정렬을 위해 기판(610) 위에 반도체 발광소자 칩(620)을 먼저 배치할 수도 있다.On the other hand, the substrate (for the alignment between the first electrode 621 and the second electrode 622 of the semiconductor light emitting device chip 620 and the first conductive portion 611 and the second conductive portion 612 of the substrate 610). The semiconductor light emitting device chip 620 may be disposed first on the 610.
다음으로, 홀(633)을 포함하는 몸체(630)를 기판(610)위에 배치한다.Next, the body 630 including the hole 633 is disposed on the substrate 610.
본 개시에 따른 반도체 발광소자의 제조방법의 순서는 당업자가 용이하게 변경할 수 있는 범위에서는 본 개시의 범위에 포함될 수 있다.The order of the manufacturing method of the semiconductor light emitting device according to the present disclosure may be included in the scope of the present disclosure as long as the skilled person can easily change.
도 10은 도 4(d)에 도시된 반도체 발광소자의 제조방법을 보여주는 도면이다.FIG. 10 is a view showing a method of manufacturing the semiconductor light emitting device shown in FIG.
먼저 도 10(a)를 참조하면, 베이스(1) 위에 접착층(2)을 도포한다.First, referring to FIG. 10 (a), the adhesive layer 2 is coated on the base 1.
접착층(2)은 3㎛ 이상 20㎛ 이하의 두께를 가지며, 실리콘 또는 아크릴 계 물질로 이루어진다.The adhesive layer 2 has a thickness of 3 µm or more and 20 µm or less, and is made of silicone or acrylic material.
접착층(2)의 두께가 3㎛ 이하인 경우에는 몸체(730)가 베이스(1) 위에 완벽하게 고정되지 않아 몸체(730)가 베이스(1)로부터 이탈될 수 있고, 20㎛ 이상인 경우 접착층(2)이 경화되는데 오랜 시간이 걸려 공정 시간이 지연될 수 있다. 따라서, 본 예에서 접착층(2)의 두께는 8㎛ 내지 10㎛의 두께를 가지는 것이 바람직하다.When the thickness of the adhesive layer 2 is 3 μm or less, the body 730 may not be completely fixed on the base 1 so that the body 730 may be separated from the base 1, and when the thickness of the adhesive layer 2 is 20 μm or more, the adhesive layer 2 This takes a long time to cure, which can delay the process time. Therefore, in the present example, the thickness of the adhesive layer 2 preferably has a thickness of 8 µm to 10 µm.
다음으로, 도 10(b)를 참조하면, 베이스(1) 위에 도포된 접착층(2)을 이용하여 홀(733)을 포함하는 몸체(730)를 베이스(1) 위에 고정시킨다.Next, referring to FIG. 10 (b), the body 730 including the holes 733 is fixed on the base 1 by using the adhesive layer 2 applied on the base 1.
여기서, 접착층(2)과 몸체(730)의 마찰력에 의해 접착층(2)과 몸체(730)가 접촉하는 부분에 일부 접착층(2)이 돌출되어 경화되는 돌출 부분(3a, 3b)이 형성된다.Here, protruding portions 3a and 3b are formed at portions where the adhesive layer 2 and the body 730 come into contact with each other by the frictional force between the adhesive layer 2 and the body 730 to cure.
본 예에서, 접착층(2)의 두께가 8㎛ 내지 10㎛ 이므로, 접착층(2)과 몸체(730)가 접촉하는 부분에서 돌출되어 경화된 접착층(2)의 돌출 부분(3a, 3b)은 약 3㎛ 내지 8㎛의 두께를 갖는다.In this example, since the thickness of the adhesive layer 2 is between 8 μm and 10 μm, the protruding portions 3a and 3b of the adhesive layer 2 that protrude and harden at the portion where the adhesive layer 2 and the body 730 contact each other are about. It has a thickness of 3 micrometers-8 micrometers.
다음으로, 도 10(c)를 참조하면, 몸체(730)의 내측면에 반사층(740)을 형성한다. 이때, 반사층(740)은 증착 방식 또는 스프레이 코팅 등을 이용하여 형성될 수 있다.Next, referring to FIG. 10 (c), the reflective layer 740 is formed on the inner surface of the body 730. In this case, the reflective layer 740 may be formed using a deposition method or a spray coating.
다음으로, 도 10(d)를 참조하면, 반사층(740)이 형성된 몸체(730)를 베이스(1)로부터 분리한다.Next, referring to FIG. 10 (d), the body 730 on which the reflective layer 740 is formed is separated from the base 1.
반사층(740)이 형성된 몸체(730)를 베이스(1)로 분리한 후, 별도의 식각 공정을 통해 접착층(2)을 제거한다.After separating the body 730 on which the reflective layer 740 is formed as the base 1, the adhesive layer 2 is removed through a separate etching process.
반사층(740)은 접착층(2)과 몸체(730)가 접촉하는 부분에서 돌출되어 경화된 접착층(2)의 돌출 부분(3a)에 의해 바닥부(732) 내측면(7322) 중 일부분(73221)을 제외한 바닥부(732)의 내측면(7322) 및 측벽(731)의 내측면(7311)에만 형성된다.The reflective layer 740 protrudes from the contact portion of the adhesive layer 2 and the body 730, and a part of the inner side surface 7322 of the bottom portion 732 by the protruding portion 3a of the hardened adhesive layer 2. Except for the inner surface 7322 of the bottom portion 732 and the inner surface 7311 of the side wall 731 is formed.
다음으로, 도 10(e)를 참조하면, 기판(710) 위에 바닥부(732) 내측면(7322) 중 기판(710)과 접촉하는 일부분(73221)을 제외한 나머지 바닥부(732)의 내측면(7322) 및 측벽(731)의 내측면(7311)에만 형성된 반사층(740)을 포함하는 몸체(730)를 배치한다. 바닥부(732)의 하면과 기판(710) 사이에 절연성 접착층(735)이 개재될 수 있다.Next, referring to FIG. 10E, an inner side surface of the bottom portion 732 except for a portion 7321 of the bottom portion 732 inner side surface 7322 contacting the substrate 710 on the substrate 710. A body 730 is disposed that includes a reflective layer 740 formed only on the inner surface 7311 of the sidewall 731 and the 7322. An insulating adhesive layer 735 may be interposed between the bottom surface of the bottom portion 732 and the substrate 710.
본 개시에 따른 반도체 발광소자의 제조방법의 순서는 당업자가 용이하게 변경할 수 있는 범위에서는 본 개시의 범위에 포함될 수 있다.The order of the manufacturing method of the semiconductor light emitting device according to the present disclosure may be included in the scope of the present disclosure as long as the skilled person can easily change.
도 11은 본 개시에 따른 자외선을 생성하는 반도체 발광소자의 일 예를 보여주는 도면이다. 도 11에 도시된 반도체 발광소자는 도 4 내지 도 10에 도시된 형태의 반도체 발광소자의 모양을 가질 수 있다. 특히, 벽은 다양한 모양을 가질 수 있다.11 is a view showing an example of a semiconductor light emitting device for generating ultraviolet light according to the present disclosure. The semiconductor light emitting device shown in FIG. 11 may have the shape of a semiconductor light emitting device of the type shown in FIGS. 4 to 10. In particular, the walls can have various shapes.
도 11(a)는 사시도이며, 도 11(b)는 AA'를 따라 자른 단면도이고, 도 11(c)는 자외선의 반사 경로를 나타내는 도면이고, 도 11(d)는 절연성 접착층을 추가로 포함하는 반도체 발광소자를 나타내는 도면이다.FIG. 11A is a perspective view, FIG. 11B is a cross-sectional view taken along AA ′, FIG. 11C is a view showing a reflection path of ultraviolet rays, and FIG. 11D further includes an insulating adhesive layer. It is a figure which shows the semiconductor light emitting element.
반도체 발광소자(200)는 기판(210), 반도체 발광소자 칩(220), 본딩 패드(230), 벽(240), 반사층(250) 및 봉지재(260)를 포함한다.The semiconductor light emitting device 200 includes a substrate 210, a semiconductor light emitting device chip 220, a bonding pad 230, a wall 240, a reflective layer 250, and an encapsulant 260.
기판(210)은 제1 도전부(211), 제2 도전부(212) 및 제1 도전부(211)과 제2 도전부(212) 사이에 위치하는 절연부(213)를 포함한다. 여기서, 기판(210)을 제조하는 방법은 한국 공개특허공보 제2012-0140454호에 기재되어 있다.The substrate 210 includes a first conductive portion 211, a second conductive portion 212, and an insulating portion 213 positioned between the first conductive portion 211 and the second conductive portion 212. Here, the method of manufacturing the substrate 210 is described in Korean Patent Laid-Open No. 2012-0140454.
제1 도전부(211) 및 제2 도전부(212)는 예를 들어 알루미늄(Al), 구리(Cu) 등과 같은 금속성 물질로 형성될 수 있다.The first conductive portion 211 and the second conductive portion 212 may be formed of a metallic material such as aluminum (Al), copper (Cu), or the like.
제1 도전부(211) 및 제2 도전부(212)는 도 3에 기재된 반도체 발광소자에서 리드 프레임 기능을 갖고 외부와 전기적으로 연결된다.The first conductive portion 211 and the second conductive portion 212 have a lead frame function in the semiconductor light emitting device of FIG. 3 and are electrically connected to the outside.
제1 도전부(211) 및 제2 도전부(212)는 빛을 반사하는 효율이 높아 반사성이 우수하고 전기적인 결합성이 우수한 물질, 예를 들어, 은(Ag), 니켈(Ni), 알루미늄(Al), 로듐(Rh), 납(Pd), 이리듐(Ir), 루테늄(Ru), 마그네슘(Mg), 아연(Zn) 중 적어도 하나를 포함하는 금속 또는 합금으로 형성될 수 있다.The first conductive portion 211 and the second conductive portion 212 have a high reflectivity and high reflectivity and excellent electrical bonding properties, for example, silver (Ag), nickel (Ni), and aluminum. It may be formed of a metal or an alloy including at least one of (Al), rhodium (Rh), lead (Pd), iridium (Ir), ruthenium (Ru), magnesium (Mg), and zinc (Zn).
본 예에서, 제1 도전부(211) 및 제2 도전부(212)가 자외선을 반사하는 효율이 높은 알루미늄(Al)으로 형성됨으로써, 반도체 발광소자 칩(220)으로부터 나온 빛 예를 들어, 자외선의 일부를 반사시킴으로써, 반도체 발광소자의 광 추출 효율(extraction efficiency)을 향상시킬 수 있다.In this example, since the first conductive portion 211 and the second conductive portion 212 are formed of aluminum (Al) having high efficiency of reflecting ultraviolet rays, the light emitted from the semiconductor light emitting device chip 220 may be, for example, ultraviolet rays. By reflecting a part of, the light extraction efficiency of the semiconductor light emitting device can be improved.
절연부(213)는 전기 절연물질로 형성될 수 있으나 이에 한정되는 것은 아니다.The insulation unit 213 may be formed of an electrically insulating material, but is not limited thereto.
반도체 발광소자 칩(220)은 제1 전극(221) 및 제2 전극(222)을 포함하며, 래터럴 칩, 플립 칩 또는 수직 칩이 가능하다. 다만 플립 칩을 사용하는 경우 제1 전극(221)과 제2 전극(222)이 와이어 본딩을 사용하지 않고 제1 도전부(211) 및 제2 도전부(212) 위에 위치하여 전기적으로 연결될 수 있어 바람직하다.The semiconductor light emitting device chip 220 may include a first electrode 221 and a second electrode 222, and may be a lateral chip, a flip chip, or a vertical chip. However, when using a flip chip, the first electrode 221 and the second electrode 222 may be electrically connected to each other by being positioned on the first conductive portion 211 and the second conductive portion 212 without using wire bonding. desirable.
본딩 패드(230)는 제1 본딩 패드(231), 제2 본딩 패드(232) 및 제3 본딩 패드(233)를 포함한다. 본 예에서, 결합성이 우수한 금속성 물질로 이루어지는 본딩 패드(230)는 반사성이 우수한 금속성 물질로 이루어지는 제1 전극(221) 및 제2 전극(222)와 서로 다른 물질로 이루어진다. 본딩 패드(230)는 증착 또는 도금 방식에 의해 형성될 수 있지만, 이에 한정되는 것은 아니다.The bonding pad 230 includes a first bonding pad 231, a second bonding pad 232, and a third bonding pad 233. In this example, the bonding pad 230 made of a metallic material having excellent bonding properties is made of a material different from the first electrode 221 and the second electrode 222 made of a metallic material having excellent reflectivity. The bonding pad 230 may be formed by a deposition or plating method, but is not limited thereto.
제1 본딩 패드(231)는 제1 도전부(211)와 제1 전극(221) 사이에 위치하며, 기판(210)과 반도체 발광소자 칩(220)을 전기적 및 물리적으로 연결한다.The first bonding pad 231 is positioned between the first conductive portion 211 and the first electrode 221 and electrically and physically connects the substrate 210 and the semiconductor light emitting device chip 220.
제1 본딩 패드(231)의 두께는 제1 도전부(211)와 제1 전극(221)을 전기적 및 물리적으로 연결하기 위해 약 3㎛ 이상이 바람직하지만, 물리적 측면에서 반도체 발광소자(200)의 크기에 영향을 주지 않고, 전기적 측면에서 전기적 연결이 용이하도록 약 10㎛ 미만이 바람직하다.Although the thickness of the first bonding pad 231 is preferably about 3 μm or more in order to electrically and physically connect the first conductive portion 211 and the first electrode 221, the semiconductor light emitting device 200 may have a thickness in terms of physical aspects. Less than about 10 micrometers is preferred to facilitate electrical connection from an electrical standpoint without affecting size.
제1 본딩 패드(231)의 폭은 제1 도전부(211)의 폭보다 작게 형성될 수 있으나, 제1 도전부(211)와 동일한 폭으로 형성될 수도 있다. 여기서, 제1 본딩 패드(231)는 기판(210)의 폭보다 작게 형성된다.The width of the first bonding pad 231 may be smaller than the width of the first conductive portion 211, but may also be the same width as the first conductive portion 211. Here, the first bonding pad 231 is formed smaller than the width of the substrate 210.
제1 본딩 패드(231)는 결합성이 우수하고 전도성이 높은 금속 물질, 예를 들어, 금(Au), 백금(Pt), AuSn 등으로 형성될 수 있으나 이에 한정되는 것은 아니다.The first bonding pad 231 may be formed of a metal material having excellent bonding properties and high conductivity, for example, gold (Au), platinum (Pt), AuSn, or the like, but is not limited thereto.
본 예에서 제1 본딩 패드(231)는 금(Au)으로 형성됨으로써, 제1 도전부(211)와 제1 전극(221) 사이의 전기적 연결 및 물리적 연결을 용이하게 하여 반도체 발광소자의 신뢰성을 향상시킬 수 있다.In this example, the first bonding pad 231 is formed of gold (Au), thereby facilitating electrical and physical connection between the first conductive portion 211 and the first electrode 221 to improve reliability of the semiconductor light emitting device. Can be improved.
제2 본딩 패드(232)는 제2 도전부(212)와 제2 전극(222) 사이에 위치하며, 기판(210)과 반도체 발광소자 칩(220)을 전기적 및 물리적으로 연결한다.The second bonding pad 232 is positioned between the second conductive portion 212 and the second electrode 222 to electrically and physically connect the substrate 210 and the semiconductor light emitting device chip 220.
제2 본딩 패드(232)의 두께는 제2 도전부(212)와 제2 전극(222)을 전기적 및 물리적으로 연결하기 위해 약 3㎛ 이상이 바람직하지만, 물리적 측면에서 반도체 발광소자(200)의 크기에 영향을 주지 않고, 전기적 측면에서 전기적 연결이 용이하도록 약 10㎛ 미만이 바람직하다. 여기서, 제2 본딩 패드(232)의 두께는 제1 본딩 패드(231)의 두께와 동일하게 형성되는 것이 바람직하다.The thickness of the second bonding pad 232 is preferably about 3 μm or more in order to electrically and physically connect the second conductive portion 212 and the second electrode 222. Less than about 10 micrometers is preferred to facilitate electrical connection from an electrical standpoint without affecting size. Here, the thickness of the second bonding pad 232 is preferably formed to be the same as the thickness of the first bonding pad 231.
제2 본딩 패드(232)의 폭은 제2 도전부(212)의 폭보다 작게 형성될 수 있으나, 제2 도전부(212)와 동일한 폭으로 형성될 수도 있다. 여기서, 제2 본딩 패드(232)는 기판(210)의 폭보다 작게 형성된다. 한편, 제2 본딩 패드(232)는 제1 본딩 패드(231)의 폭과 동일하게 또는 크거나 작게 형성될 수도 있다.The width of the second bonding pad 232 may be smaller than the width of the second conductive portion 212, but may be formed to have the same width as that of the second conductive portion 212. Here, the second bonding pads 232 are formed to be smaller than the width of the substrate 210. Meanwhile, the second bonding pads 232 may be formed to be the same as, or larger than, or smaller than the width of the first bonding pads 231.
제2 본딩 패드(232)는 결합성이 우수하며 전도성이 높은 금속 물질, 예를 들어, 백금(Pt), 금(Au), AuSn 등으로 형성될 수 있으나 이에 한정되는 것은 아니다.The second bonding pad 232 may be formed of a metal material having excellent bonding and high conductivity, for example, platinum (Pt), gold (Au), AuSn, or the like, but is not limited thereto.
본 예에서 제2 본딩 패드(232)는 금(Au)으로 형성되어 제2 도전부(212)와 제2 전극(222) 사이의 전기적 연결 및 물리적 연결을 용이하게 하여 반도체 발광소자의 신뢰성을 향상시킬 수 있다.In this example, the second bonding pad 232 is formed of gold (Au) to facilitate electrical and physical connection between the second conductive portion 212 and the second electrode 222 to improve the reliability of the semiconductor light emitting device. You can.
여기서, 제2 본딩 패드(232)는 본딩 패드(230)의 공정을 간소화하기 위해 제1 본딩 패드(231)와 동일한 물질로 동시에 형성되는 것이 바람직하다.Here, the second bonding pads 232 may be formed of the same material as the first bonding pads 231 at the same time to simplify the process of the bonding pads 230.
제3 본딩 패드(233)는 반도체 발광소자 칩(220)과 접촉하는 기판(210)의 상면의 반대면인 하면에 위치하며, 외부와 전기적 및 물리적으로 연결된다. 여기서, 제3 본딩 패드(233)는 기판(210)의 절연부(213)를 제외한 하면 전체면에 형성된다. 이와 달리, 제3 본딩 패드(233)는 생략될 수 있다.The third bonding pads 233 are positioned on the bottom surface opposite to the top surface of the substrate 210 in contact with the semiconductor light emitting device chip 220, and are electrically and physically connected to the outside. Here, the third bonding pads 233 are formed on the entire lower surface of the substrate 210 except for the insulating portion 213. Alternatively, the third bonding pads 233 may be omitted.
벽(240)은 기판(210) 위에 형성되며 반도체 발광소자 칩(220)을 둘러싸고 있으며, 제1 내측면(241), 제2 내측면(242) 및 하면(243)을 포함한다. 여기서, 벽(240)은 예를 들어 에폭시 수지나 실리콘 수지와 같은 절연성 물질을 사용하여 사출 성형을 통해 얻을 수 있다. 하지만, 벽(240)은 이에 한정되지 않고, 금속으로 형성될 수 있다.The wall 240 is formed on the substrate 210 and surrounds the semiconductor light emitting device chip 220, and includes a first inner side surface 241, a second inner side surface 242, and a lower surface 243. Here, the wall 240 can be obtained through injection molding using an insulating material such as, for example, an epoxy resin or a silicone resin. However, the wall 240 is not limited thereto, and may be formed of metal.
제1 내측면(241)은 하면(243)과 이어져 있고, 제2 내측면(242)은 제1 내측면(241)과 이어져 있다.The first inner surface 241 is connected to the lower surface 243, and the second inner surface 242 is connected to the first inner surface 241.
반사층(250)은 벽(240)의 제2 내측면(242)의 일면에 형성된다. 즉, 반사층(250)은 반도체 발광소자 칩(220)을 덮는 봉지재(260)와 접촉하는 제2 내측면(242)의 일면에 형성된다.The reflective layer 250 is formed on one surface of the second inner side surface 242 of the wall 240. That is, the reflective layer 250 is formed on one surface of the second inner side surface 242 in contact with the encapsulant 260 covering the semiconductor light emitting device chip 220.
반사층(250)은 빛을 반사하는 효율이 높은 금속성 물질로 이루어진 것이 바람직하며 예를 들어 금속성 물질이 코팅, 도금 및 증착 등과 같은 방법으로 형성될 수 있다.The reflective layer 250 is preferably made of a metallic material having high efficiency of reflecting light, and for example, the metallic material may be formed by a method such as coating, plating, and deposition.
반사층(250)을 형성하는 금속성 물질에는 예를 들어 은(Ag), 알루미늄(Al) 등이 있지만 반도체 발광소자 칩(220)을 자외선 칩으로 사용하는 경우, 반사층(240)은 자외선에서 반사하는 효율이 높은 알루미늄(Al)으로 형성되는 것이 바람직하다. 본 예에서, 반사층(250)은 제1 도전부(211) 및 제2 도전부(212)와 동일한 물질로 형성될 수 있지만, 이에 한정하지 않고 반사율이 높은 서로 금속성 물질로 이루어질 수 있다.Examples of the metallic material forming the reflective layer 250 include silver (Ag), aluminum (Al), and the like, but when the semiconductor light emitting device chip 220 is used as an ultraviolet chip, the reflective layer 240 reflects light in ultraviolet rays. It is preferable to form from this high aluminum (Al). In the present example, the reflective layer 250 may be formed of the same material as the first conductive portion 211 and the second conductive portion 212, but is not limited thereto and may be formed of a metallic material having high reflectance.
다만 금속성 물질로 이루어진 반사층(250)이 제1 내측면(241)에도 형성되는 경우 쇼트 문제가 발생할 수 있기 때문에 반사층(250)은 제1 내측면(241)에는 형성되지 않고, 제2 내측면(242)에만 형성된다.However, since the short problem may occur when the reflective layer 250 made of the metallic material is formed on the first inner side surface 241, the reflective layer 250 is not formed on the first inner side surface 241, and the second inner side surface ( 242 only.
또한 반사층(250)을 벽(240)의 제2 내측면(242)에 증착이나 코팅할 때 제1 내측면(241)에 반사층(250)이 형성되지 않도록 하기 위해서 제1 내측면(241)이 벽(240)의 하면(243)과 이루는 경사각(245)은 둔각인 것이 바람직하다.In addition, when the reflective layer 250 is deposited or coated on the second inner side surface 242 of the wall 240, the first inner side surface 241 is formed so that the reflective layer 250 is not formed on the first inner side surface 241. It is preferable that the inclination angle 245 of the lower surface 243 of the wall 240 is an obtuse angle.
또한 제2 내측면(242)이 벽(240)의 하면(243)과 평행한 가상의 면(247)과 이루는 경사각(246)은 예각인 것이 반사층(250)에 의해 반사되어 나가는 광의 추출 효율을 높일 수 있어 바람직하다.In addition, the inclination angle 246 of the second inner surface 242 and the imaginary surface 247 parallel to the lower surface 243 of the wall 240 is an acute angle to extract the light extraction efficiency reflected by the reflective layer 250. It is preferable because it can raise.
예를 들어, 도 11(c)를 참고하면, 반도체 발광소자 칩(220)의 측면으로부터 나온 빛은 반사층(250)에 의해 일부가 흡수되고 일부가 반사된다. 반사된 빛은 다시 반도체 발광소자 칩(220) 내에서 진행하면 소멸되거나 봉지재(260) 측으로 나온다. 게다가 제1 도전부(211) 및 제2 도전부(212)가 자외선에서 반사하는 효율이 높은 알루미늄(Al)으로 형성됨으로써, 반도체 발광소자 칩(220)으로부터 나온 빛 또는 반사층(250)으로부터 반사된 빛의 일부를 반사시킴으로써, 반도체 발광소자의 광 추출 효율(extraction efficiency)을 향상시킬 수 있다.For example, referring to FIG. 11C, light emitted from the side surface of the semiconductor light emitting device chip 220 is partially absorbed and partially reflected by the reflective layer 250. When the reflected light proceeds in the semiconductor light emitting device chip 220 again, it disappears or comes out toward the encapsulant 260. In addition, since the first conductive portion 211 and the second conductive portion 212 are formed of aluminum (Al) having high efficiency reflecting from ultraviolet rays, the first conductive portion 211 and the second conductive portion 212 are reflected from the light emitted from the semiconductor light emitting device chip 220 or the reflective layer 250. By reflecting a part of the light, the light extraction efficiency of the semiconductor light emitting device can be improved.
도 11(d)를 참조하면, 벽(240)의 하면(243)과 기판(210) 사이에 절연성 접착층(270)이 개재될 수 있다. 절연성 접착층(270)은 절연성 접착제를 사용하여 기판(210)과 벽(240)을 접착하면서 형성되며, 이때 절연성 접착제의 일부가 제1 내측면(241)에 형성되어 금속성 반사층(250)에 의한 쇼트 위험성이 더 낮아질 수 있다.Referring to FIG. 11D, an insulating adhesive layer 270 may be interposed between the lower surface 243 of the wall 240 and the substrate 210. The insulating adhesive layer 270 is formed by bonding the substrate 210 and the wall 240 using an insulating adhesive, wherein a part of the insulating adhesive is formed on the first inner surface 241 to be shorted by the metallic reflective layer 250. The risk may be lower.
또한 제1 내측면(241)과 제2 내측면(242)이 만나는 지점의 높이(248)는 쇼트 방지를 위해서 5um 이상이 바람직하지만 광 추출 효율을 위해 반사층(250)이 형성되지 않은 제1 내측면(241)이 적어야 되는 점에서 50um 미만이 바람직하다.In addition, the height 248 of the point where the first inner side surface 241 and the second inner side surface 242 meet is preferably 5 μm or more for preventing short, but for the light extraction efficiency, the first inner surface in which the reflective layer 250 is not formed is formed. Less than 50 μm is preferred in that the side 241 should be small.
또한 도시 하지는 않았지만 벽(240)의 상면(249)에도 반사층(250)이 형성될 수 있다.Although not shown, a reflective layer 250 may be formed on the top surface 249 of the wall 240.
본 개시는 제1 내측면(241)에 금속성 반사층(250)이 형성되지 않는 것이며, 필요에 따라 제1 내측면(241) 이외에 반사층이 형성되는 것을 배제하는 것은 아니기 때문이다.The present disclosure is that the metallic reflective layer 250 is not formed on the first inner side surface 241, and that the reflective layer is not excluded from the first inner side surface 241 as necessary.
봉지재(260)는 반도체 발광소자 칩(220)을 덮도록(cover) 형성된다.The encapsulant 260 is formed to cover the semiconductor light emitting device chip 220.
봉지재(260)는 투광성을 갖고 있으며, 에폭시 수지 및 실리콘 수지 중 하나로 이루어질 수 있으며, 반도체 발광소자 칩(220)을 자외선 칩으로 사용하는 경우에는 PDMS(polydimethylsiloxane)계 수지로 이루어질 수 있다. 한편, 봉지재(260)는 생략될 수 있다. 봉지재(260)가 생략되는 경우 유리 또는 석영 등으로 덮일 수 있다.The encapsulant 260 may be formed of one of epoxy resin and silicone resin, and may be made of PDMS (polydimethylsiloxane) resin when the semiconductor light emitting device chip 220 is used as an ultraviolet chip. Meanwhile, the encapsulant 260 may be omitted. When the encapsulant 260 is omitted, the encapsulant 260 may be covered with glass or quartz.
도 12는 본 개시에 따른 반도체 발광소자의 다른 예를 보여주는 도면이다.12 illustrates another example of the semiconductor light emitting device according to the present disclosure.
반도체 발광소자(300)는 내측면(341)이 원형인 벽(340)을 포함한다.The semiconductor light emitting device 300 includes a wall 340 having an inner side surface 341 having a circular shape.
평면도에서 벽(340)의 내측면(341)의 형상은 사각형, 원형 등 다양한 형상이 가능하다.In the plan view, the inner surface 341 of the wall 340 may have various shapes such as a rectangle and a circle.
도 12에서 설명하는 것을 제외하고 반도체 발광소자(300)는 도 11에 기재된 반도체 발광소자(200)와 실질적으로 동일하다.Except as illustrated in FIG. 12, the semiconductor light emitting device 300 is substantially the same as the semiconductor light emitting device 200 of FIG. 11.
도 13은 본 개시에 따른 반도체 발광소자의 또 다른 예를 보여주는 도면이다.13 illustrates another example of a semiconductor light emitting device according to the present disclosure.
반도체 발광소자(400)는 벽(440)의 제1 내측면(441)이 벽(440)의 하면(443)과 이루는 경사각(444)이 예각이다.In the semiconductor light emitting device 400, the inclination angle 444 formed by the first inner surface 441 of the wall 440 and the lower surface 443 of the wall 440 is an acute angle.
제1 내측면(441)이 벽(440)의 하면(443)과 이루는 경사각(444)은 도 11와 같이 둔각이 바람직하지만 예각을 배제하는 것은 아니다.An inclination angle 444 of the first inner surface 441 and the lower surface 443 of the wall 440 is preferably an obtuse angle as shown in FIG. 11, but does not exclude the acute angle.
도 13에서 설명하는 것을 제외하고 반도체 발광소자(400)는 도 11에 기재된 반도체 발광소자(200)와 실질적으로 동일하다.Except as described in FIG. 13, the semiconductor light emitting device 400 is substantially the same as the semiconductor light emitting device 200 of FIG. 11.
도 14는 본 개시에 따른 반도체 발광소자의 또 다른 예를 보여주는 도면이다.14 is a view showing another example of a semiconductor light emitting device according to the present disclosure.
반도체 발광소자(500)는 벽(540)의 제1 내측면(541)에 절연층(542)이 형성된다.In the semiconductor light emitting device 500, an insulating layer 542 is formed on the first inner side surface 541 of the wall 540.
벽(540)이 절연성 물질로 형성되지만, 벽(540)의 내측면에 반사층(543)이 형성되는 과정에서 제1 내측면(541)의 일부에 반사층(543)이 형성될 수 있기 때문에 반사층(543) 형성 이후, 제1 내측면(541)에 절연층(542)을 별도로 형성하여 쇼트 위험성을 낮출 수 있다.Although the wall 540 is formed of an insulating material, the reflective layer 543 may be formed on a part of the first inner surface 541 in the process of forming the reflective layer 543 on the inner surface of the wall 540. 543), the insulating layer 542 may be separately formed on the first inner surface 541 to reduce the risk of short circuit.
도 14에서 설명하는 것을 제외하고 반도체 발광소자(500)는 도 11에 기재된 반도체 발광소자(200)와 실질적으로 동일하다.Except as described in FIG. 14, the semiconductor light emitting device 500 is substantially the same as the semiconductor light emitting device 200 of FIG. 11.
도 15 내지 도 19는 도 11에 도시된 반도체 발광소자의 제조 방법의 일 예를 설명하기 위한 도면이다.15 to 19 are diagrams for describing an example of a method of manufacturing the semiconductor light emitting device shown in FIG. 11.
반도체 발광소자의 제조 방법에 있어서, 기판(210)을 준비하고, 반도체 발광소자 칩(220) 및 외부와의 전기적 및 물리적 연결을 위해 기판(210)의 상면 및 하면에 본딩 패드(230)를 형성한다. 여기서, 본딩 패드(230)는 패턴 형성 공정을 통해 형성될 수 있지만, 이에 한정되는 것은 아니다.In the method of manufacturing a semiconductor light emitting device, a substrate 210 is prepared, and bonding pads 230 are formed on upper and lower surfaces of the substrate 210 for electrical and physical connection with the semiconductor light emitting device chip 220 and the outside. do. Here, the bonding pad 230 may be formed through a pattern forming process, but is not limited thereto.
반도체 발광소자의 제조 방법에 있어서, 기판(210)을 준비하고, 반도체 발광소자 칩(220) 및 외부와의 전기적 및 물리적 연결을 위해 기판(210)의 상면 및 하면에 본딩 패드(230)를 형성한다. 여기서, 본딩 패드(230)는 패턴 형성 공정을 통해 형성될 수 있지만, 이에 한정되는 것은 아니다.In the method of manufacturing a semiconductor light emitting device, a substrate 210 is prepared, and bonding pads 230 are formed on upper and lower surfaces of the substrate 210 for electrical and physical connection with the semiconductor light emitting device chip 220 and the outside. do. Here, the bonding pad 230 may be formed through a pattern forming process, but is not limited thereto.
본 예에서, 본딩 패드(230)는 패턴 형성 공정을 이용하여 금(Au)으로 형성됨으로써, 기판(210)의 제2 도전부(212)와 제2 전극(222) 사이 그리고 외부와의 전기적 및 물리적 연결을 용이하게 하여 반도체 발광소자의 신뢰성을 향상시킬 수 있다.In this example, the bonding pads 230 are formed of gold (Au) using a pattern forming process, thereby to provide electrical and external connection between the second conductive portion 212 and the second electrode 222 and the outside of the substrate 210. By facilitating physical connection, the reliability of the semiconductor light emitting device can be improved.
먼저, 기판(210)을 준비하고, 도 15(a)에 도시된 봐와 같이, 기판(210)에 본딩 패드(230)가 형성될 부분이 노출된 패턴을 갖는 마스크(230a)를 기판(210)에 배치한다.First, the substrate 210 is prepared, and as shown in FIG. 15A, a mask 230a having a pattern in which a portion on which the bonding pad 230 is to be formed is exposed on the substrate 210 is exposed to the substrate 210. ).
다음으로, 도 15(b)에 도시된 봐와 같이, 마스크(230a)에 의해 노출된 부분에 본딩 패드(230)를 형성한다. 여기서, 본딩 패드(230)는 증착 또는 도금 방식에 의해 형성될 수 있지만, 이에 한정되는 것은 아니다.Next, as shown in FIG. 15B, a bonding pad 230 is formed in a portion exposed by the mask 230a. Here, the bonding pad 230 may be formed by a deposition or plating method, but is not limited thereto.
구체적으로, 기판(210)의 상면에 반도체 발광소자 칩(220)을 고정하기 위해 반도체 발광소자 칩(220)이 위치할 부분에 제1 본딩 패드(231) 및 제2 본딩 패드(232)를 부분적으로 형성하고, 외부와의 연결을 위해 기판(210)의 절연부(213)를 제외한 하면 전체면에 제3 본딩 패드(233)를 동시에 형성한다.In detail, the first bonding pads 231 and the second bonding pads 232 are partially disposed on the portion where the semiconductor light emitting device chip 220 is to be fixed to the upper surface of the substrate 210. The third bonding pads 233 are simultaneously formed on the entire lower surface of the substrate 210 except for the insulating portion 213 of the substrate 210 for connection with the outside.
다음으로, 도 15(c)에 도시된 바와 같이, 별도의 식각 공정을 통해 마스크(230a)를 제거하여 본딩 패드(230)를 형성한다.Next, as shown in FIG. 15C, the bonding pad 230 is formed by removing the mask 230a through a separate etching process.
다음으로, 도 16을 참조하면, 기판(210)의 상면에 벽(240)을 형성한다. 벽(240)은 예를 들어 에폭시 수지나 실리콘 수지와 같은 절연성 물질을 사용하여 사출 성형을 통해 얻을 수 있다. 하지만, 벽(240)은 이에 한정되지 않고, 금속으로 형성될 수 있다.Next, referring to FIG. 16, the wall 240 is formed on the upper surface of the substrate 210. Wall 240 may be obtained through injection molding, for example, using an insulating material such as epoxy resin or silicone resin. However, the wall 240 is not limited thereto, and may be formed of metal.
여기서, 벽(240)은 소자 이송 장치(미도시)가 반도체 발광소자 칩(220)을 놓을 위치나 각도를 보정하기 위한 패턴으로 인식될 수 있으며, 이와 함께 봉지재(260)의 댐으로 기능한다.Here, the wall 240 may be recognized as a pattern for correcting the position or angle at which the device transfer device (not shown) is to place the semiconductor light emitting device chip 220, and functions as a dam of the encapsulant 260. .
구체적으로, 도 16(a)에 도시된 바와 같이, 벽(240)을 기판(210)의 상면에 형성하기 위해 벽(240)이 형성될 부분에 절연성 접착층(270)을 도포한다.Specifically, as shown in FIG. 16A, an insulating adhesive layer 270 is applied to a portion where the wall 240 is to be formed in order to form the wall 240 on the upper surface of the substrate 210.
다음, 도 16(b)에 도시된 바와 같이, 절연성 접착층(270)이 경화되기 전에 절연성 접착층(270) 위에 벽(240)을 배치함으로써, 기판(210) 위에 벽(240)을 고정시킨다. 즉, 벽(240)을 기판(210) 위에 고정시키기 위해 절연성 접착층(270)을 일정 시간 경화한다.Next, as shown in FIG. 16B, the wall 240 is fixed on the substrate 210 by disposing the wall 240 on the insulating adhesive layer 270 before the insulating adhesive layer 270 is cured. That is, the insulating adhesive layer 270 is cured for a predetermined time to fix the wall 240 on the substrate 210.
여기서, 반사층(250)이 형성된 벽(240)은 다음과 같이 형성된다.Here, the wall 240 on which the reflective layer 250 is formed is formed as follows.
우선, 도 17(a)에 도시된 바와 같이, 베이스(1) 위에 사출성형을 통해 형성된 벽(240)을 배치시킨다. 여기서, 베이스(1)는 리지드(rigid)한 금속 판 또는 비금속 판이거나, 플렉시블한 필름 또는 테이프일 수 있다.First, as shown in FIG. 17A, a wall 240 formed by injection molding is disposed on the base 1. Here, the base 1 may be a rigid metal plate or a nonmetal plate, or may be a flexible film or tape.
다음, 도 17(b)에 도시된 바와 같이, 벽(240)의 제2 내측면(242)의 일면에 반사층(250)을 형성한다. 여기서, 반사층(250)은 증착 방식 또는 스프레이 코팅 등을 이용하여 형성될 수 있다.Next, as illustrated in FIG. 17B, the reflective layer 250 is formed on one surface of the second inner side surface 242 of the wall 240. Here, the reflective layer 250 may be formed using a deposition method or a spray coating.
다음, 도 17(c)에 도시된 바와 같이, 반사층(250)이 형성된 벽(240)을 베이스(1)로부터 분리한다.Next, as shown in FIG. 17C, the wall 240 on which the reflective layer 250 is formed is separated from the base 1.
본 예에서, 베이스(1)와 벽(240)은 외력에 의해 가압되어 서로 접하거나, 접착물질을 이용하여 서로 접착할 수 있다. 예를 들어, 접착 물질은 도전성 페이스트, 절연성 페이스트, 폴리머 접착제 등 다양하게 선택가능하며, 특별히 제한되지는 않는다. 어느 온도 범위에서는 접착력을 상실하는 물질을 사용하면, 베이스(1)와 벽(240)의 분리 시에 상기 온도 범위에서 분리가 쉽게 될 수 있다.In this example, the base 1 and the wall 240 may be pressed by external force to contact each other, or may adhere to each other using an adhesive material. For example, the adhesive material may be variously selected from conductive pastes, insulating pastes, polymer adhesives, and the like, and is not particularly limited. In some temperature ranges, the use of a material that loses adhesion may facilitate separation in the temperature range at the time of separation of the base 1 and the wall 240.
한편 이와 달리, 소자 이송 장치(미도시)를 이용하여 반사층(250)이 형성된 벽(240)을 베이스(1)로부터 픽업(pick-up)하여 기판(210) 위에 놓을 수 있다.On the other hand, by using an element transfer device (not shown), the wall 240 on which the reflective layer 250 is formed may be picked up from the base 1 and placed on the substrate 210.
즉, 베이스(1)의 아래에서 핀 또는 봉이 반사층(250)이 형성된 벽(240)을 치면 베이스(1)로부터 반사층(250)이 형성된 벽(240)이 떨어지며, 그 순간 소자 이송 장치가 반사층(250)이 형성된 벽(240)를 전기적 흡착 또는 진공 흡착할 수 있다.That is, when the pin 240 or the pin 240 is formed to hit the wall 240 on which the reflective layer 250 is formed, the wall 240 on which the reflective layer 250 is formed is separated from the base 1, and at that moment, the device transfer device is formed on the reflective layer ( The wall 240 formed with the 250 may be electrically adsorbed or vacuum adsorbed.
다음, 기판(210) 및 본딩 패드(230)의 패턴을 인식하고, 위치 및 각도 보정이 가능한 소자 이송 장치를 이용하여 절연성 접착층(270)이 도포된 기판(210) 위에 반사층(250)을 포함하는 벽(240)을 배치할 수 있다.Next, a reflective layer 250 is formed on the substrate 210 to which the insulating adhesive layer 270 is applied using a device transfer device that recognizes a pattern of the substrate 210 and the bonding pads 230 and corrects position and angle. Wall 240 may be disposed.
다음으로, 도 18을 참조하면, 벽(240), 제1 본딩 패드(231) 및 제2 본딩 패드(232)의 패턴을 인식하고, 위치 및 각도 보정이 가능한 별도의 소자 이송 장치(미도시)를 이용하여 기판(210)의 전면에 반도체 발광소자 칩(220)을 배치한다.Next, referring to FIG. 18, a separate device transfer device (not shown) capable of recognizing a pattern of the wall 240, the first bonding pad 231, and the second bonding pad 232, and correcting a position and an angle thereof. The semiconductor light emitting device chip 220 is disposed on the front surface of the substrate 210 by using a.
구체적으로, 반도체 발광소자 칩(220)의 제1 전극(221) 및 제2 전극(222)과 기판(210)의 상면에 위치하는 제1 본딩 패드(231) 및 제2 본딩 패드(232)가 서로 대응하도록 배치한다. 다음, 일정 온도 범위에서 제1 본딩 패드(231) 및 제2 본딩 패드(232)의 접착력을 증가시켜 기판(210)의 제1 도전부(211) 및 제2 도전부(212)와 반도체 발광소자 칩(220)의 제1 전극(221) 및 제2 전극(222) 사이를 전기적 및 물리적 연결시킴으로써, 기판(210)의 전면에 반도체 발광소자 칩(220)을 고정시킨다.In detail, the first bonding pad 231 and the second bonding pad 232 disposed on the first electrode 221, the second electrode 222, and the upper surface of the substrate 210 of the semiconductor light emitting device chip 220 may be formed. Arrange to correspond to each other. Next, by increasing the adhesive strength of the first bonding pad 231 and the second bonding pad 232 in a certain temperature range, the first conductive portion 211 and the second conductive portion 212 of the substrate 210 and the semiconductor light emitting device By electrically and physically connecting the first electrode 221 and the second electrode 222 of the chip 220, the semiconductor light emitting device chip 220 is fixed to the front surface of the substrate 210.
다음으로, 도 19를 참조하면, 반도체 발광소자 칩(220)이 배치된 기판(210)의 상면에 봉지재(260)를 투입하여 형성하고 경화한다. 여기서 봉지재(260)는 디스펜싱, 스텐실, 스크린 프린팅, 스핀 코팅 등을 이용하여 형성할 수 있다. 두께의 균일도나 형광체의 내부 밀도 등의 관점에서 디스펜싱이 바람직하다.Next, referring to FIG. 19, the encapsulant 260 is added to the upper surface of the substrate 210 on which the semiconductor light emitting device chip 220 is disposed, and cured. The encapsulant 260 may be formed using dispensing, a stencil, screen printing, or spin coating. Dispensing is preferable from the viewpoint of the uniformity of thickness, the internal density of the phosphor, and the like.
봉지재(260)는 반도체 발광소자 분야에서 일반적으로 사용되는 에폭시 수지, 실리콘 수지 중 하나 일 수 있다. 한편, 봉지재(260)는 생략될 수 있다. 봉지재(260)가 생략되는 경우 유리 또는 석영 등으로 덮일 수 있다.The encapsulant 260 may be one of an epoxy resin and a silicone resin generally used in the semiconductor light emitting device field. Meanwhile, the encapsulant 260 may be omitted. When the encapsulant 260 is omitted, the encapsulant 260 may be covered with glass or quartz.
본 개시에 따른 반도체 발광소자의 제조방법의 순서는 당업자가 용이하게 변경할 수 있는 범위에서는 본 개시의 범위에 포함될 수 있다.The order of the manufacturing method of the semiconductor light emitting device according to the present disclosure may be included in the scope of the present disclosure as long as the skilled person can easily change.
한편, 도 20을 참조하면, 제1 본딩 패드(231) 및 제2 본딩 패드(232)와 제1 전극(221) 및 제2 전극(222) 간의 정렬을 위해 기판(210) 위에 벽(240)을 배치하기 전에 반도체 발광소자 칩(220)을 먼저 배치할 수 있다.Meanwhile, referring to FIG. 20, the wall 240 is disposed on the substrate 210 to align the first bonding pad 231 and the second bonding pad 232 with the first electrode 221 and the second electrode 222. The semiconductor light emitting device chip 220 may be first disposed before the semiconductor light emitting device chip is disposed.
본 개시에 따른 반도체 발광소자의 제조방법의 순서는 당업자가 용이하게 변경할 수 있는 범위에서는 본 개시의 범위에 포함될 수 있다.The order of the manufacturing method of the semiconductor light emitting device according to the present disclosure may be included in the scope of the present disclosure as long as the skilled person can easily change.
도 21은 본 개시에 따른 반도체 발광소자의 일 예를 보여주는 도면이다.21 is a diagram illustrating an example of a semiconductor light emitting device according to the present disclosure.
도 21(a)은 사시도이며, 도 21(b)은 AA'를 따라 자른 단면도이다.FIG. 21A is a perspective view and FIG. 21B is a cross-sectional view taken along AA ′.
반도체 발광소자(200)는 기판(210), 반도체 발광소자 칩(220), 벽(230) 및 봉지재(240)를 포함한다.The semiconductor light emitting device 200 may include a substrate 210, a semiconductor light emitting device chip 220, a wall 230, and an encapsulant 240.
기판(210)은 제1 도전부(211), 제2 도전부(212) 및 제1 도전부(211)과 제2 도전부(212) 사이에 위치하는 절연부(213)를 포함한다. 여기서, 기판(210)을 제조하는 방법은 한국 공개특허공보 제2012-0140454호에 기재되어 있다.The substrate 210 includes a first conductive portion 211, a second conductive portion 212, and an insulating portion 213 positioned between the first conductive portion 211 and the second conductive portion 212. Here, the method of manufacturing the substrate 210 is described in Korean Patent Laid-Open No. 2012-0140454.
제1 도전부(211) 및 제2 도전부(212)는 예를 들어 알루미늄(Al), 구리(Cu) 등과 같은 금속성 물질로 형성될 수 있다.The first conductive portion 211 and the second conductive portion 212 may be formed of a metallic material such as aluminum (Al), copper (Cu), or the like.
제1 도전부(211) 및 제2 도전부(212)가 도 3에 기재된 반도체 발광소자에서 리드 프레임 기능을 갖고 외부와 전기적으로 연결된다.The first conductive portion 211 and the second conductive portion 212 have a lead frame function in the semiconductor light emitting device of FIG. 3 and are electrically connected to the outside.
제1 도전부(211) 및 제2 도전부(212)는 빛을 반사하는 효율이 높아 반사성이 우수하고 전기적인 접촉이 우수한 물질, 예를 들어, 은(Ag), 니켈(Ni), 알루미늄(Al), 로듐(Rh), 납(Pd), 이리듐(Ir), 루테늄(Ru), 마그네슘(Mg), 아연(Zn) 중 적어도 하나를 포함하는 금속 또는 합금으로 형성될 수 있다.The first conductive portion 211 and the second conductive portion 212 have a high reflectivity and high reflectivity and excellent electrical contact, for example, silver (Ag), nickel (Ni), aluminum ( It may be formed of a metal or an alloy including at least one of Al, rhodium (Rh), lead (Pd), iridium (Ir), ruthenium (Ru), magnesium (Mg), zinc (Zn).
본 예에서, 제1 도전부(211) 및 제2 도전부(212)가 빛 예를 들어 자외선을 반사하는 효율이 높은 알루미늄(Al)으로 형성됨으로써, 반도체 발광소자 칩(220)으로부터 나온 빛의 일부를 반사시킴으로써, 반도체 발광소자의 광 추출 효율(extraction efficiency)을 향상시킬 수 있다.In this example, since the first conductive portion 211 and the second conductive portion 212 are formed of aluminum (Al) having high efficiency of reflecting light, for example, ultraviolet rays, the light emitted from the semiconductor light emitting device chip 220 By reflecting a part, light extraction efficiency of the semiconductor light emitting device can be improved.
절연부(213)는 전기 절연물질로 형성될 수 있으나 이에 한정되는 것은 아니다.The insulation unit 213 may be formed of an electrically insulating material, but is not limited thereto.
반도체 발광소자 칩(220)은 제1 전극(221) 및 제2 전극(222)을 포함하며, 래터럴 칩, 플립 칩 또는 수직 칩이 가능하다. 다만 플립 칩을 사용하는 경우 제1 전극(221)과 제2 전극(222)이 와이어 본딩을 사용하지 않고 제1 도전부(211) 및 제2 도전부(212) 위에 위치하여 전기적으로 연결될 수 있어 바람직하다.The semiconductor light emitting device chip 220 may include a first electrode 221 and a second electrode 222, and may be a lateral chip, a flip chip, or a vertical chip. However, when using a flip chip, the first electrode 221 and the second electrode 222 may be electrically connected to each other by being positioned on the first conductive portion 211 and the second conductive portion 212 without using wire bonding. desirable.
벽(230)은 제1 내측면(231), 제2 내측면(232) 및 하면(233)을 포함한다. 벽(230)은 기판(210)의 측면에 형성되며 기판(210) 및 반도체 발광소자 칩(220)을 둘러싸고 있다. 즉, 벽(230)의 하면(233)과 기판(210)의 하면은 동일한 선상 라인에 위치한다.The wall 230 includes a first inner side 231, a second inner side 232, and a bottom side 233. The wall 230 is formed on the side of the substrate 210 and surrounds the substrate 210 and the semiconductor light emitting device chip 220. That is, the bottom surface 233 of the wall 230 and the bottom surface of the substrate 210 are located on the same line line.
여기서, 벽(230)은 예를 들어 에폭시 수지나 실리콘 수지와 같은 절연성 물질을 사용하여 사출 성형을 통해 얻을 수 있다.Here, the wall 230 may be obtained through injection molding using an insulating material such as, for example, an epoxy resin or a silicone resin.
벽(230)의 높이(H3)는 기판(210)의 높이(H1)와 반도체 발광소자 칩(220)의 높이(H2)를 결합된 높이(H1+H2)와 동일하게 또는 낮게 형성될 수 있지만, 광 경로 등을 고려하여 벽(230)의 높이(H3)는 기판(210) 및 반도체 발광소자 칩(220)이 결합된 높이(H1+H2)보다 크게 형성될 수 있다.The height H3 of the wall 230 may be equal to or lower than the height H1 + H2 of the height H1 of the substrate 210 and the height H2 of the semiconductor light emitting device chip 220. In consideration of the optical path, the height H3 of the wall 230 may be greater than the height H1 + H2 to which the substrate 210 and the semiconductor light emitting device chip 220 are coupled.
예를 들어, 기판(210)의 높이(H1)는 0.3mm ~ 1mm이고, 반도체 발광소자 칩(220)의 높이(H2)는 0.1mm ~ 0.3mm이므로, 벽(230)의 높이(H3)는 0.4mm 이상 2mm이하 일 수 있다.For example, since the height H1 of the substrate 210 is 0.3 mm to 1 mm, and the height H2 of the semiconductor light emitting device chip 220 is 0.1 mm to 0.3 mm, the height H3 of the wall 230 is It may be more than 0.4mm and less than 2mm.
제1 내측면(231)은 하면(233)과 이어져 있고, 제2 내측면(232)은 제1 내측면(231)과 이어져 있다. 여기서, 제1 내측면(231) 및 제2 내측면(232)은 광 추출 효율의 향상을 위채 경사진 것이 바람직하다.The first inner side surface 231 is connected to the lower surface 233, and the second inner side surface 232 is connected to the first inner surface 231. Here, the first inner side surface 231 and the second inner side surface 232 are preferably inclined to improve the light extraction efficiency.
제1 내측면(231)이 벽(230)의 하면(233)과 이루는 경사각(234)는 둔각인 것이 바람직하다.It is preferable that the inclination angle 234 of the first inner surface 231 and the lower surface 233 of the wall 230 is an obtuse angle.
제2 내측면(232)이 벽(230)의 하면(233)과 평행한 가상의 면(235)과 이루는 경사각(236)은 예각인 것이 바람직하다.It is preferable that the inclination angle 236 of the second inner side surface 232 and the imaginary surface 235 parallel to the lower surface 233 of the wall 230 is an acute angle.
제1 내측면(231)과 제2 내측면(232)이 각각 경사각(234, 236)을 가짐으로써, 기판(210)과의 접촉이 방지되어 쇼트 위험성이 낮아질 수 있다.Since the first inner side surface 231 and the second inner side surface 232 have the inclination angles 234 and 236, respectively, the contact with the substrate 210 may be prevented and the risk of short may be lowered.
또한, 제1 내측면(231)과 제2 내측면(232)이 만나는 지점의 높이(H4)는 쇼트 방지를 위해서 5um 이상이 이에 바람직하다.In addition, the height (H4) of the point where the first inner surface 231 and the second inner surface 232 meet is preferably 5um or more to prevent the short.
봉지재(240)는 기판(210) 및 반도체 발광소자 칩(220)을 덮도록(cover) 벽(230) 내부에 형성된다.The encapsulant 240 is formed inside the wall 230 to cover the substrate 210 and the semiconductor light emitting device chip 220.
봉지재(240)는 투광성을 갖고 있으며, 에폭시 수지 및 실리콘 수지 중 하나로 이루어질 수 있다. 필요한 경우 파장 변환재(미도시)를 포함할 수 있다.The encapsulant 240 has a light transmitting property and may be made of one of an epoxy resin and a silicone resin. If necessary, a wavelength converter (not shown) may be included.
도 22는 본 개시에 따른 반도체 발광소자의 다른 일 예를 보여주는 도면이다.22 illustrates another example of the semiconductor light emitting device according to the present disclosure.
반도체 발광소자(300)는 벽(330)의 제1 내측면(331) 및 제2 내측면(332)에 형성된 반사층(350)을 포함한다.The semiconductor light emitting device 300 includes a reflective layer 350 formed on the first inner side 331 and the second inner side 332 of the wall 330.
반사층(350)은 벽(330)의 제1 내측면(331) 및 제2 내측면(332)의 일면에 형성된다. 즉, 반사층(350)은 봉지재(340)와 접촉하는 제1 내측면(331) 및 제2 내측면(332)의 일면에 형성된다.The reflective layer 350 is formed on one surface of the first inner side surface 331 and the second inner side surface 332 of the wall 330. That is, the reflective layer 350 is formed on one surface of the first inner side surface 331 and the second inner side surface 332 in contact with the encapsulant 340.
반사층(350)은 빛을 반사하는 효율이 높은 금속성 물질로 이루어진 것이 바람직하며 예를 들어 금속성 물질이 코팅, 도금 및 증착 등과 같은 방법으로 형성될 수 있다.The reflective layer 350 is preferably made of a highly efficient metallic material that reflects light, and for example, the metallic material may be formed by coating, plating, and deposition.
반사층(350)을 형성하는 금속성 물질에는 예를 들어 은(Ag), 알루미늄(Al), 분포 브래그 리플렉터(DBR: Distributed Bragg Reflector), 고반사 백색 반사물질 등으로 될 수 있다. 하지만, 비용 및 효율을 고려했을 때 알루미늄(Al)이 바람직하다.The metallic material forming the reflective layer 350 may be, for example, silver (Ag), aluminum (Al), a distributed Bragg reflector (DBR), a highly reflective white reflector, or the like. However, aluminum (Al) is preferred in view of cost and efficiency.
반사층(350)을 벽(330)의 제1 내측면(331) 및 제2 내측면(332)에 증착이나 코팅할 때 제1 내측면(331) 및 제2 내측면(332)이 경사져 있으므로, 빛을 반사시키는 효율이 증가하여 광 추출 효율이 향상된다.Since the first inner side 331 and the second inner side 332 are inclined when depositing or coating the reflective layer 350 on the first inner side 331 and the second inner side 332 of the wall 330, The efficiency of reflecting light is increased to improve light extraction efficiency.
또한, 반사율이 높은 금속성 물질로 이루어진 반사층(350)을 형성하더라도 제1 내측면(331) 및 제2 내측면(332)이 경사져 있으므로, 기판(310)과의 접촉에 의한 쇼트 위험이 적다.In addition, even when the reflective layer 350 formed of a metallic material having a high reflectance is formed, the first inner side surface 331 and the second inner side surface 332 are inclined, so that there is little risk of shorting due to contact with the substrate 310.
도 22에 기재된 반사층(350)을 제외하고는 도 21에 기재된 반도체 발광소자(200)와 동일한 특성을 갖는다.Except for the reflective layer 350 shown in FIG. 22, the semiconductor light emitting device 200 has the same characteristics as the semiconductor light emitting device 200 shown in FIG.
도 23은 본 개시에 따른 반도체 발광소자의 다른 일 예를 보여주는 도면이다.23 is a view illustrating another example of a semiconductor light emitting device according to the present disclosure.
반도체 발광소자(400)는 벽(430)의 제2 내측면(432)에만 형성되는 반사층(450)을 포함한다.The semiconductor light emitting device 400 includes a reflective layer 450 formed only on the second inner side surface 432 of the wall 430.
반사층(450)은 벽(430)의 제2 내측면(432)의 일면에만 형성된다. 즉, 반사층(450)은 봉지재(440)와 접촉하는 제2 내측면(432)의 일면에만 형성된다.The reflective layer 450 is formed only on one surface of the second inner side surface 432 of the wall 430. That is, the reflective layer 450 is formed only on one surface of the second inner side surface 432 in contact with the encapsulant 440.
반사층(450)이 제2 내측면(432)에만 형성됨으로써, 금속성 물질로 이루어지는 반사층(450)과 기판(410) 사이에 쇼트 위험성이 더 낮아 질 수 있다.Since the reflective layer 450 is formed only on the second inner side surface 432, a short risk may be lowered between the reflective layer 450 made of a metallic material and the substrate 410.
도 23에 기재된 반사층(450)을 제외하고는 도 21에 기재된 반도체 발광소자(200)와 동일한 특성을 갖는다.Except for the reflective layer 450 shown in FIG. 23, the semiconductor light emitting device 200 has the same characteristics as the semiconductor light emitting device 200 shown in FIG.
도 24은 본 개시에 따른 반도체 발광소자의 또 다른 예를 보여주는 도면이다.24 illustrates another example of the semiconductor light emitting device according to the present disclosure.
반도체 발광소자(500)는 벽(530)의 하면(533)과 이루는 경사각(534)이 예각인 벽(530)의 제1 내측면(531) 및 제2 내측면(532)에만 형성되는 반사층(550)을 포함한다.The semiconductor light emitting device 500 may include a reflective layer formed only on the first inner surface 531 and the second inner surface 532 of the wall 530 having an acute angle 534 formed on the lower surface 533 of the wall 530. 550).
제1 내측면(531)이 벽(530)의 하면(533)과 이루는 경사각(534)은 도 21와 같이 둔각이 바람직하지만 예각을 배제하는 것은 아니다.An inclination angle 534 of the first inner side surface 531 and the bottom surface 533 of the wall 530 is preferably an obtuse angle as shown in FIG. 21, but does not exclude the acute angle.
도 24에 기재된 벽(530) 및 반사층(550)을 제외하고는 도 21에 기재된 반도체 발광소자(200)와 동일한 특성을 갖는다.Except for the wall 530 and the reflective layer 550 described in FIG. 24, the semiconductor light emitting device has the same characteristics as the semiconductor light emitting device 200 described in FIG. 21.
도 25는 본 개시에 따른 반도체 발광소자의 또 다른 예를 보여주는 도면이다.25 is a view showing another example of a semiconductor light emitting device according to the present disclosure.
반도체 발광소자(600)는 벽(630)의 제1 내측면(631)에 형성된 절연층(636) 및 제2 내측면(632)에만 형성되는 반사층(650)을 포함한다.The semiconductor light emitting device 600 includes an insulating layer 636 formed on the first inner side surface 631 of the wall 630 and a reflective layer 650 formed only on the second inner side surface 632.
벽(630)의 제2 내측면(632)에 반사층(650)이 형성되는 과정에서 제1 내측면(631) 일부에 반사층(650)이 형성될 수 있기 때문에 절연층(636)을 반사층(650) 형성 이후에 제1 내측면(631)에 절연층(636)을 별도로 형성하여 쇼트 위험성을 낮출 수 있다.Since the reflective layer 650 may be formed on a portion of the first inner surface 631 in the process of forming the reflective layer 650 on the second inner surface 632 of the wall 630, the insulating layer 636 may be formed on the reflective layer 650. After the formation, the insulation layer 636 may be separately formed on the first inner surface 631 to reduce the risk of short circuit.
도 25에 기재된 절연층(636) 및 반사층(650)을 제외하고는 도 21에 기재된 반도체 발광소자(200)와 동일한 특성을 갖는다.Except for the insulating layer 636 and the reflective layer 650 shown in FIG. 25, the semiconductor light emitting device 200 has the same characteristics as the semiconductor light emitting device 200 shown in FIG.
도 26은 본 개시에 따른 반도체 발광소자의 제조 방법의 일 예를 설명하기 위한 도면이다.26 is a view for explaining an example of a method of manufacturing a semiconductor light emitting device according to the present disclosure.
반도체 발광소자의 제조 방법에 있어서, 도 26(a)에 도시된 바와 같이, 베이스(700) 위에 벽(730)을 배치한다. 여기서, 벽(730)은 사출 성형을 통해 얻을 수 있다.In the method of manufacturing a semiconductor light emitting device, as shown in FIG. 26A, a wall 730 is disposed on a base 700. Here, the wall 730 can be obtained through injection molding.
베이스(700)는 플렉시블한 필름 또는 테이프이거나, 리지드(rigid)한 금속 판 또는 비금속 판일 수 있다. Base 700 may be a flexible film or tape, or a rigid metal plate or a nonmetal plate.
필름 또는 테이프도 특별한 제한은 없으며, 점착성 또는 접착성을 가지며 내열성을 가지는 것이 바람직하다. 예를 들어, 내열성 테이프, 블루테이프 등이 사용될 수 있으며, 다양한 색상이나 광반사율을 선택할 수 있다.The film or tape is also not particularly limited and is preferably sticky or adhesive and has heat resistance. For example, heat resistant tape, blue tape, or the like may be used, and various colors or light reflectances may be selected.
금속 판으로는 특별한 한정이 있는 것은 아니며, 예를 들어, Al, Cu, Ag, Cu-Al 합금, Cu-Ag 합금, Cu-Au 합금, SUS(스테인리스스틸) 등이 사용될 수 있으며, 도금된 판도 물론 사용 가능하다.The metal plate is not particularly limited, and for example, Al, Cu, Ag, Cu-Al alloys, Cu-Ag alloys, Cu-Au alloys, SUS (stainless steel), and the like may be used. Of course you can use it.
비금속 판으로는 플라스틱이 사용될 수 있으며, 다양한 색상이나 광반사율을 선택할 수 있다.Plastics can be used as nonmetallic plates, and various colors and light reflectances can be selected.
다음으로, 도 26(b)에 도시한 바와 같이, 벽(730)의 제2 내측면(732)의 일면에 반사층(750)을 형성한다. 여기서, 반사층(750)은 스프레이 코팅, 스핀 코딩 등을 이용하여 형성될 수 있다.Next, as shown in FIG. 26B, the reflective layer 750 is formed on one surface of the second inner side surface 732 of the wall 730. Here, the reflective layer 750 may be formed using spray coating, spin coding, or the like.
다음으로, 도 26(c)에 도시된 바와 같이, 기판(710)과 결합된 반도체 발광소자 칩(720)을 벽(730) 내부에 배치한다.Next, as shown in FIG. 26C, the semiconductor light emitting device chip 720 coupled to the substrate 710 is disposed in the wall 730.
벽(730)의 패턴을 인식하고, 위치 및 각도 보정이 가능한 소자 이송 장치(미도시)를 이용하여 베이스(700) 위에 기판(710)과 결합된 반도체 발광소자 칩(720)을 배치할 수 있다.The semiconductor light emitting device chip 720 coupled to the substrate 710 may be disposed on the base 700 using a device transfer device (not shown) capable of recognizing a pattern of the wall 730 and correcting position and angle. .
여기서, 반도체 반도체 발광소자 칩(720)의 제1 전극(721) 및 제2 전극(722)은 각각 기판(710)의 제1 도전부(711) 및 제2 도전부(712) 위에 위치하여 서로 전기적 및 물리적으로 연결된다. 본 예에서, 반도체 발광소자 칩(720)으로는 플립 칩(flip chip)이 적합하지만, 레터럴 칩(lateral chip)이나 수직형 칩(vertical chip)을 배제하는 것은 아니다.Here, the first electrode 721 and the second electrode 722 of the semiconductor semiconductor light emitting device chip 720 are positioned on the first conductive portion 711 and the second conductive portion 712 of the substrate 710, respectively. It is electrically and physically connected. In this example, a flip chip is suitable as the semiconductor light emitting device chip 720, but it does not exclude a lateral chip or a vertical chip.
다음으로, 도 26(d)에 도시된 바와 같이, 반도체 발광소자 칩(720)이 배치된 벽(730) 내부에 봉지재(740)를 투입하여 형성하고 경화한다. 여기서 봉지재(740)는 디스펜싱, 스텐실, 스크린 프린팅, 스핀 코팅 등을 이용하여 형성할 수 있다. 두께의 균일도나 형광체의 내부 밀도 등의 관점에서 디스펜싱이 바람직하다.Next, as shown in FIG. 26 (d), the encapsulant 740 is introduced into the wall 730 in which the semiconductor light emitting device chip 720 is disposed, and is formed and cured. The encapsulant 740 may be formed using dispensing, a stencil, screen printing, or spin coating. Dispensing is preferable from the viewpoint of the uniformity of thickness, the internal density of the phosphor, and the like.
봉지재(740)에 의해 반도체 발광소자 칩(720)과 결합된 기판(710)이 베이스(700)에 고정된다. 봉지재(740)는 반도체 발광소자 분야에서 일반적으로 사용되는 에폭시 수지, 실리콘 수지 중 하나 일 수 있다. 한편, 봉지재(740)는 생략될 수 있다. 봉지재(740)가 생략되는 경우 유리 또는 석영 등으로 덮일 수 있다.The substrate 710 coupled with the semiconductor light emitting device chip 720 is fixed to the base 700 by the encapsulant 740. The encapsulant 740 may be one of an epoxy resin and a silicone resin generally used in the semiconductor light emitting device field. Meanwhile, the encapsulant 740 may be omitted. When the encapsulant 740 is omitted, the encapsulant 740 may be covered with glass or quartz.
다음으로, 도 26(e)에 도시된 바와 같이, 봉지재(740)에 의해 결합된 기판(710), 반도체 발광소자 칩(720) 및 벽(730)을 베이스(700)로부터 분리한다.Next, as illustrated in FIG. 26E, the substrate 710, the semiconductor light emitting device chip 720, and the wall 730 coupled by the encapsulant 740 are separated from the base 700.
본 예에서, 베이스(700)와 봉지재(740)에 의해 결합된 기판(710), 반도체 발광소자 칩(720) 및 벽(730)은 외력에 의해 가압되어 서로 접하거나, 접착물질을 이용하여 서로 접착할 수 있다. 예를 들어, 접착 물질은 도전성 페이스트, 절연성 페이스트, 폴리머 접착제 등 다양하게 선택가능하며, 특별히 제한되지는 않는다. 어느 온도 범위에서는 접착력을 상실하는 물질을 사용하면, 베이스(700)와 봉지재(740)에 의해 결합된 기판(710), 반도체 발광소자 칩(720) 및 벽(730)의 분리 시에 상기 온도 범위에서 분리가 쉽게 될 수 있다.In this example, the substrate 710, the semiconductor light emitting device chip 720, and the wall 730 coupled by the base 700 and the encapsulant 740 are pressed by external force to contact each other or by using an adhesive material. Can adhere to each other. For example, the adhesive material may be variously selected from conductive pastes, insulating pastes, polymer adhesives, and the like, and is not particularly limited. In a certain temperature range, when a material that loses adhesive strength is used, the temperature is separated when the substrate 710, the semiconductor light emitting device chip 720, and the wall 730 coupled by the base 700 and the encapsulant 740 are separated. It can be easily separated in the range.
한편 이와 달리, 소자 이송 장치(미도시)를 이용하여 봉지재(740)에 의해 결합된 기판(710), 반도체 발광소자 칩(720) 및 벽(730)을 베이스(700)로부터 픽업(pick-up)하여 베이스(700)로부터 분리할 수 있다.Alternatively, the substrate 710, the semiconductor light emitting device chip 720, and the wall 730 coupled by the encapsulant 740 are picked up from the base 700 using an element transfer device (not shown). up) to separate it from the base 700.
즉, 베이스(700)의 아래에서 핀 또는 봉이 봉지재(740)에 의해 결합된 기판(710), 반도체 발광소자 칩(720) 및 벽(730)을 치면 베이스(700)로부터 봉지재(740)에 의해 결합된 기판(710), 반도체 발광소자 칩(720) 및 벽(730)이 떨어지며, 그 순간 소자 이송 장치가 봉지재(740)에 의해 결합된 기판(710), 반도체 발광소자 칩(720) 및 벽(730)를 전기적 흡착 또는 진공 흡착할 수 있다.That is, the encapsulant 740 is formed from the base 700 by hitting the substrate 710, the semiconductor light emitting device chip 720, and the wall 730 coupled by the pin or rod encapsulant 740 under the base 700. The substrate 710, the semiconductor light emitting device chip 720, and the wall 730 coupled by each other fall off, and at that moment, the device transfer device is coupled to the substrate 710 and the semiconductor light emitting device chip 720 by the encapsulant 740. ) And the wall 730 may be electrically adsorbed or vacuum adsorbed.
본 개시에 따른 반도체 발광소자의 제조방법의 순서는 당업자가 용이하게 변경할 수 있는 범위에서는 본 개시의 범위에 포함될 수 있다.The order of the manufacturing method of the semiconductor light emitting device according to the present disclosure may be included in the scope of the present disclosure as long as the skilled person can easily change.
도 27은 본 개시에 따른 반도체 발광소자의 일 예를 보여주는 도면이다.27 is a diagram illustrating an example of a semiconductor light emitting device according to the present disclosure.
도 27(a)는 사시도이며, 도 27(b)는 AA'에 따른 단면도이다.(A) is a perspective view, and FIG. 27 (b) is sectional drawing along AA '.
반도체 발광소자(200)는 몸체(210), 반도체 발광소자 칩(220) 및 봉지재(230)를 포함한다.The semiconductor light emitting device 200 includes a body 210, a semiconductor light emitting device chip 220, and an encapsulant 230.
몸체(210)는 측벽(211) 및 바닥부(212)를 포함하고, 측벽(211) 및 바닥부(212)에 의해 형성된 캐비티(214)를 포함한다. 여기서, 몸체(210)는 예를 들어 수지 계열 또는 세라믹 계열의 절연성 물질을 사용하여 사출 성형을 통해 얻을 수 있다. Body 210 includes sidewall 211 and bottom 212, and includes a cavity 214 defined by sidewall 211 and bottom 212. Here, the body 210 may be obtained through injection molding using, for example, an insulating material based on resin or ceramic.
측벽(211)은 외측면(217)과 내측면(218)을 포함한다. 측벽(211)의 높이(H)는 바닥부(212)의 길이(L)보다 작을 수 있다. 예를 들어 측벽(211)의 높이(H)는 0.1mm 이상 내지 0.6mm 이하 일 수 있으며, 바닥부(212)의 길이(L)는 0.5mm 이상일 수 있다. 또한 측벽(211)은 필요에 따라 없을 수도 있다(미도시). Sidewall 211 includes an outer side 217 and an inner side 218. The height H of the side wall 211 may be smaller than the length L of the bottom portion 212. For example, the height H of the side wall 211 may be 0.1 mm or more and 0.6 mm or less, and the length L of the bottom portion 212 may be 0.5 mm or more. The side wall 211 may also be absent as needed (not shown).
바닥부(212)는 홀(213)을 포함한다. 홀(213)의 크기는 반도체 발광소자 칩(220)의 크기와 비슷하거나 반도체 발광소자 칩(220)의 크기의 1.5배가 바람직하다. 또한 홀(213)을 형성하는 바닥부(212)의 내측면(240)은 광 추출 효율의 향상을 위해 경사진 것이 바람직하다.The bottom portion 212 includes a hole 213. The size of the hole 213 is similar to that of the semiconductor light emitting device chip 220 or 1.5 times the size of the semiconductor light emitting device chip 220. In addition, the inner surface 240 of the bottom portion 212 forming the hole 213 is preferably inclined to improve the light extraction efficiency.
반도체 발광소자 칩(220)은 홀(213)에 위치한다. 반도체 발광소자 칩(220)은 래터럴 칩, 수직 칩 및 플립 칩이 가능하다. 다만 본 개시에서 반도체 발광소자 칩(220)의 전극(221)이 몸체(210) 바닥부(212)의 하면(216) 방향으로 노출되어 있는 점에서 플립 칩이 바람직하다.The semiconductor light emitting device chip 220 is located in the hole 213. The semiconductor light emitting device chip 220 may be a lateral chip, a vertical chip, and a flip chip. However, in the present disclosure, the flip chip is preferable in that the electrode 221 of the semiconductor light emitting device chip 220 is exposed toward the bottom surface 216 of the bottom portion 212 of the body 210.
바닥부(212)의 높이(219)는 반도체 발광소자 칩(220)의 높이(222)보다 낮은 것이 바람직하다. 바닥부(212)의 높이(219)가 반도체 발광소자 칩(220)의 높이(222)보다 높은 경우 반도체 발광소자(200)의 광 추출 효율이 떨어질 수 있기 때문이다. 다만 광 추출 효율이 떨어질 수 있지만, 광 경로 등을 고려하여 바닥부(212)의 높이(219)가 반도체 발광소자 칩(220)의 높이보다 높게 할 수도 있다.The height 219 of the bottom portion 212 is preferably lower than the height 222 of the semiconductor light emitting device chip 220. This is because when the height 219 of the bottom 212 is higher than the height 222 of the semiconductor light emitting device chip 220, the light extraction efficiency of the semiconductor light emitting device 200 may decrease. However, although the light extraction efficiency may be reduced, the height 219 of the bottom portion 212 may be higher than the height of the semiconductor light emitting device chip 220 in consideration of an optical path.
바닥부(212)의 높이(219) 및 반도체 발광소자 칩(220)의 높이(222)는 바닥부(212)의 하면(216)을 기준으로 측정할 수 있다. 반도체 발광소자 칩(220)의 높이(222)는 0.05mm 이상 내지 0.5mm 이하 일 수 있다. 바닥부(212)의 높이(219)는 0.08mm 이상 내지 0.4mm 이하 일 수 있다.The height 219 of the bottom part 212 and the height 222 of the semiconductor light emitting device chip 220 may be measured based on the bottom surface 216 of the bottom part 212. The height 222 of the semiconductor light emitting device chip 220 may be 0.05 mm or more and 0.5 mm or less. The height 219 of the bottom 212 may be 0.08 mm or more and 0.4 mm or less.
봉지재(230)는 캐비티(214)에 구비되어 반도체 발광소자 칩(220)을 덮고 있어서, 홀(213)에 위치하고 있는 반도체 발광소자 칩(220)을 몸체(210)에 고정시킬 수 있다. 봉지재(230)는 투광성을 갖고 있으며, 예를 들어 에폭시 수지 및 실리콘 수지 중 하나로 이루어질 수 있다. 필요한 경우 봉지재(230)는 파장 변환재(231)를 포함할 수 있다. 파장 변환재(231)는 반도체 발광소자 칩(220)의 활성층으로부터 생성되는 빛을 다른 파장의 빛으로 변환하는 것이라면 어떠한 것이라도 좋지만(예: 안료, 염료 등), 광 변환 효율을 고려할 때 형광체(예: YAG, (Sr,Ba,Ca)2SiO4:Eu 등)를 사용하는 것이 바람직하다. 또한 파장 변환재(231)는 반도체 발광소자에서 나오는 빛의 색에 따라 정해질 수 있으며, 당업자에게 잘 알려져 있다.The encapsulant 230 is provided in the cavity 214 to cover the semiconductor light emitting device chip 220, so that the semiconductor light emitting device chip 220 positioned in the hole 213 may be fixed to the body 210. The encapsulant 230 is light-transmissive and may be made of one of an epoxy resin and a silicone resin, for example. If necessary, the encapsulant 230 may include a wavelength converting member 231. The wavelength converting material 231 may be any type as long as it converts light generated from the active layer of the semiconductor light emitting device chip 220 into light having a different wavelength (eg, a pigment, a dye, etc.). Example: YAG, (Sr, Ba, Ca) 2 SiO 4 : Eu, etc.) is preferably used. In addition, the wavelength conversion material 231 may be determined according to the color of light emitted from the semiconductor light emitting device, and is well known to those skilled in the art.
도 28은 본 개시에 따른 반도체 발광소자의 다른 일 예를 보여주는 도면이다.28 illustrates another example of the semiconductor light emitting device according to the present disclosure.
반도체 발광소자(300)는 접합부(330)를 포함한다. 접합부(330)를 제외하고는 도 27에 기재된 반도체 발광소자(200)와 동일한 특성을 갖는다.The semiconductor light emitting device 300 includes a junction 330. Except for the junction portion 330, the semiconductor light emitting device 200 has the same characteristics as the semiconductor light emitting device 200 shown in FIG.
접합부(330)는 몸체(310) 바닥부(311)의 하면(312)에 위치한다. 접합부(330)는 는 바닥부(311)의 하면(312) 방향으로 노출된 반도체 발광소자 칩(320)의 전극(321)과 이격되어 위치한다.The junction 330 is located on the bottom 312 of the bottom 311 of the body 310. The junction 330 is spaced apart from the electrode 321 of the semiconductor light emitting device chip 320 exposed in the direction of the bottom 312 of the bottom 311.
이와 같은 접합부(330)로 인하여 반도체 발광소자(300)가 외부 기판(미도시)과 접합될 때, 전극(321)만으로 접합하는 경우보다 접합력이 향상될 수 있다.When the semiconductor light emitting device 300 is bonded to an external substrate (not shown) due to the bonding portion 330, the bonding force may be improved compared to the case where the semiconductor light emitting device 300 is bonded only to the electrode 321.
접합부(330)는 금속일 수 있다. 예를 들어 접합부(330)는 은(Ag), 구리(Cu) 및 금(Au) 중 하나일 수 있다. 또한 접합부(330)는 2개 이상의 금속의 조합일 수 있다. 예를 들어 니켈(Ni)과 구리 조합, 크롬(Cr)과 구리 조합, 티타늄(Ti)과 구리 조합 중 하나일 수 있다. 당업자가 용이하게 변경할 수 있는 범위에서 접합부(330)는 다양한 조합이 가능하다. 도 28(b)는 도 28(a)의 저면도이며, 전극(321)과 접합부(330)의 배치를 확인할 수 있다. 또한 도시하지는 않았지만, 필요한 경우에는 접합부(330)가 반도체 발광소자 칩(320)의 전극(321)과 접하여 위치함으로써, 전극 기능을 수행할 수도 있다.The junction 330 may be metal. For example, the junction 330 may be one of silver (Ag), copper (Cu), and gold (Au). In addition, the junction 330 may be a combination of two or more metals. For example, it may be one of a combination of nickel (Ni) and copper, a combination of chromium (Cr) and copper, and a combination of titanium (Ti) and copper. The junction 330 may be variously combined in a range that can be easily changed by those skilled in the art. FIG. 28B is a bottom view of FIG. 28A, and the arrangement of the electrode 321 and the junction part 330 can be confirmed. Although not shown, if necessary, the junction part 330 may be in contact with the electrode 321 of the semiconductor light emitting device chip 320 to perform an electrode function.
도 29는 본 개시에 따른 반도체 발광소자의 또 다른 일 예를 보여주는 도면이다.29 illustrates another example of the semiconductor light emitting device according to the present disclosure.
반도체 발광소자(400)는 몸체(410)의 바닥부(411)와 반도체 발광소자 칩(420) 사이에 반사물질(430)을 포함한다. 반사물질(430)을 제외하고는 도 28에 기재된 반도체 발광소자(300)와 동일한 특성을 갖는다.The semiconductor light emitting device 400 includes a reflective material 430 between the bottom 411 of the body 410 and the semiconductor light emitting device chip 420. Except for the reflective material 430, the semiconductor light emitting device 300 has the same characteristics as the semiconductor light emitting device 300 of FIG. 28.
반사물질(430)이 반도체 발광소자 칩(420)의 측면에 위치함으로써 반도체 발광소자 칩(420)의 측면에서 나오는 빛을 반사시켜, 반도체 발광소자(400)의 광 추출 효율을 향상시킬 수 있다.Since the reflective material 430 is positioned on the side of the semiconductor light emitting device chip 420, the light emitted from the side of the semiconductor light emitting device chip 420 may be reflected, thereby improving light extraction efficiency of the semiconductor light emitting device 400.
반사물질(430)은 백색 반사 물질이 바람직하다. 예를 들어 백색 실리콘 수지일 수 있다.The reflective material 430 is preferably a white reflective material. For example, it may be a white silicone resin.
또한 도 29(b)와 같이 반사물질(430)과 반도체 발광소자 칩(420) 사이에 공간(431)이 형성되게 반사물질(430)이 위치할 수도 있다.In addition, as illustrated in FIG. 29B, the reflective material 430 may be positioned to form a space 431 between the reflective material 430 and the semiconductor light emitting device chip 420.
도 30은 본 개시에 따른 반도체 발광소자의 또 다른 일 예를 보여주는 도면이다.30 illustrates another example of a semiconductor light emitting device according to the present disclosure.
반도체 발광소자(500)는 몸체(510) 측벽(511)의 내측면(513) 및 바닥부(512)의 상면(514) 중 적어도 하나에 반사층(530)을 포함한다. 반사층(530)을 제외하고는 도 28에 기재된 반도체 발광소자(300)와 동일한 특성을 갖는다.The semiconductor light emitting device 500 includes a reflective layer 530 on at least one of the inner surface 513 of the sidewall 511 of the body 510 and the upper surface 514 of the bottom 512. Except for the reflective layer 530, the semiconductor light emitting device 300 has the same characteristics as the semiconductor light emitting device 300 of FIG. 28.
반사층(530)은 몸체(510) 바닥부(512)의 상면(514) 전체에 형성될 수 있다. 반사층(530)은 예를 들어 알루미늄(Al), 은(Ag), 분포 브래그 리플렉터(DBR: Distributed Bragg Reflector), 고반사 백색 반사물질 등으로 될 수 있다. 특히 도 3과 같은 종래의 반도체 발광소자(100)에는 리드 프레임(110, 120)에 반도체 발광소자 칩(150)이 접합되어야 하기 때문에, 반사효율이 좋은 금속의 반사층이 반도체 발광소자 칩(150)이 접합되는 리드 프레임(110, 120) 상면 전체에 전기적 쇼트 문제로 인하여 형성될 수 없었다. 그러나 본 개시에서는 반도체 발광소자 칩(520)에 접합되는 리드 프레임이 없으며, 또한 바닥부(512)의 상면(514)에 반도체 발광소자 칩(520)이 위치하지 않기 때문에, 반사효율이 높은 금속의 반사층(530)이 바닥부(512)의 상면(514) 전체에 형성될 수 있다. 반사효율이 높은 금속의 반사층(530)을 바닥부(512)의 상면(514) 전체에 형성시킴으로써, 반도체 발광소자(500)의 광 추출 효율을 향상시킬 수 있다. 또한 도시 하지는 않았지만, 반사층(530)은 홀의 측면에 위치할 수도 있다.The reflective layer 530 may be formed on the entire upper surface 514 of the bottom portion 512 of the body 510. The reflective layer 530 may be made of aluminum (Al), silver (Ag), a distributed Bragg reflector (DBR), a highly reflective white reflector, or the like. In particular, since the semiconductor light emitting device chip 150 should be bonded to the lead frames 110 and 120 in the conventional semiconductor light emitting device 100 as shown in FIG. 3, the reflective layer of the metal having good reflection efficiency is the semiconductor light emitting device chip 150. The entire upper surfaces of the lead frames 110 and 120 to be joined could not be formed due to an electrical short problem. However, in the present disclosure, since there is no lead frame bonded to the semiconductor light emitting device chip 520, and the semiconductor light emitting device chip 520 is not positioned on the top surface 514 of the bottom part 512, the metal having high reflection efficiency may be used. The reflective layer 530 may be formed on the entire upper surface 514 of the bottom portion 512. The light extraction efficiency of the semiconductor light emitting device 500 may be improved by forming the metal reflective layer 530 having high reflection efficiency on the entire upper surface 514 of the bottom portion 512. Although not shown, the reflective layer 530 may be located at the side of the hole.
도 31은 본 개시에 따른 반도체 발광소자의 또 다른 일 예를 보여주는 도면이다.31 illustrates another example of the semiconductor light emitting device according to the present disclosure.
반도체 발광소자(600)는 몸체(610)의 바닥부(611)에 복수개의 홀(612)을 포함하며, 각각의 홀(612)에 반도체 발광소자 칩(620)이 위치한다. 복수개의 홀(612) 및 각각의 홀(612)에 반도체 발광소자 칩(620)이 위치하는 것을 제외하고는 도 28에 기재된 반도체 발광소자(300)와 동일한 특성을 갖는다. 도 31에는 복수개의 홀 (612)이 2개로 도시하였으나, 이에 한정하지 않고 2개 이상도 가능하다. 또한 각각의 홀(612)에 위치하는 반도체 발광소자 칩(620)은 서로 다른 색을 발광할 수 있다.The semiconductor light emitting device 600 includes a plurality of holes 612 in the bottom portion 611 of the body 610, and the semiconductor light emitting device chip 620 is positioned in each hole 612. The semiconductor light emitting device 300 has the same characteristics as the semiconductor light emitting device 300 of FIG. 28 except that the semiconductor light emitting device chip 620 is positioned in the plurality of holes 612 and each hole 612. Although a plurality of holes 612 are illustrated in FIG. 31, two or more holes are not limited thereto. In addition, the semiconductor light emitting device chips 620 disposed in the holes 612 may emit different colors.
도 32는 본 개시에 따른 반도체 발광소자의 또 다른 일 예를 보여주는 도면이다.32 is a view showing another example of a semiconductor light emitting device according to the present disclosure.
반도체 발광소자(700)는 몸체(710) 바닥부(712)의 내측면(715) 중 바닥부(712)의 하면(716) 방향의 일부분(717)을 제외한 나머지 바닥부(712)의 내측면(715), 바닥부(712)의 상면(714) 및 측벽(711)의 내측면(713)에 형성된 반사층(730)을 포함한다. 반사층(730)을 제외하고는 도 28에 기재된 반도체 발광소자(300)와 동일한 특성을 갖는다.The semiconductor light emitting device 700 may have an inner surface of the bottom portion 712 except for a portion 717 of the bottom surface 716 of the bottom portion 712 of the bottom portion 712 of the body 710. 715, a reflective layer 730 formed on the upper surface 714 of the bottom 712 and the inner surface 713 of the sidewall 711. Except for the reflective layer 730, the semiconductor light emitting device 300 has the same characteristics as the semiconductor light emitting device 300 described with reference to FIG. 28.
반사효율이 높은 금속의 반사층(730)이 측벽(711)의 내측면(713), 바닥부(712)의 상면(714) 및 바닥부(712)의 내측면(715)의 일부분(171)을 제외한 부분에 형성됨으로써, 반도체 발광소자(700)의 광 추출 효율을 향상시키면서 쇼트 위험성을 방지할 수 있다.A metal reflective layer 730 having a high reflectance efficiency may have an inner surface 713 of the sidewall 711, an upper surface 714 of the bottom 712, and a portion 171 of the inner surface 715 of the bottom 712. By being formed in the excluded portion, it is possible to prevent a short risk while improving the light extraction efficiency of the semiconductor light emitting device 700.
반사층(730)은 예를 들어 알루미늄(Al), 은(Ag), 분포 브래그 리플렉터(DBR: Distributed Bragg Reflector), 고반사 백색 반사물질 등으로 될 수 있다.The reflective layer 730 may be made of aluminum (Al), silver (Ag), a distributed Bragg reflector (DBR), a highly reflective white reflector, or the like.
또한, 도시하지는 않았지만 반사층(730)은 몸체(710)의 상면에도 형성될 수 있다.In addition, although not shown, the reflective layer 730 may be formed on the upper surface of the body 710.
도 33은 본 개시에 따른 반도체 발광소자의 제조방법을 보여주는 도면이고, 도 34는 본 개시에 따른 반사층을 형성하는 제조방법을 보여주는 도면이다.33 illustrates a method of manufacturing a semiconductor light emitting device according to the present disclosure, and FIG. 34 illustrates a method of manufacturing a reflective layer according to the present disclosure.
먼저, 바닥부(812)에 형성된 홀(813)을 포함하는 몸체(810)를 준비한다(S1). 여기서, 몸체(810)는 예를 들어 수지 계열 또는 세라믹 계열의 절연성 물질을 사용하여 사출 성형을 통해 얻을 수 있다.First, a body 810 including a hole 813 formed in the bottom portion 812 is prepared (S1). Here, the body 810 may be obtained through injection molding, for example, using a resin-based or ceramic-based insulating material.
몸체(810)는 임시 고정판인 베이스(1)에 의해 고정 및 지지될 수 있다. 베이스(1)는 일반 접착력 있는 테이프이면 가능하다. 예를 들어 블루 테이프일 수 있다.The body 810 may be fixed and supported by the base 1, which is a temporary fixing plate. The base 1 can be a general adhesive tape. For example, it may be a blue tape.
다음으로, 몸체(810)의 내측면에 반사층(830)을 형성한다(S2).Next, the reflective layer 830 is formed on the inner surface of the body 810 (S2).
구체적으로, 몸체(810)의 내측면에 반사층(830)을 형성하는 제조방법은 도 34를 참조하면, 먼저 몸체(810)의 내측면(831)은 복수의 홈을 갖는다(S21).Specifically, referring to FIG. 34, in the manufacturing method of forming the reflective layer 830 on the inner surface of the body 810, the inner surface 831 of the body 810 has a plurality of grooves (S21).
몸체(810)의 내측면(831)은 금형 또는 기계 방식에 따른 사출 성형으로 제작된 경우, 규칙적인 주기를 갖는 홈 또는 불규칙적인 주기를 갖는 홈을 포함하는 비평탄면(uneven surface)으로 형성될 수 있다.The inner surface 831 of the body 810 may be formed as an uneven surface including a groove having a regular period or a groove having an irregular period when manufactured by injection molding according to a mold or a mechanical method. have.
다음으로, 몸체(810)의 내측면(831)에 절연성 물질을 코팅하여 코팅층(832)을 형성한다(S22).Next, an insulating material is coated on the inner surface 831 of the body 810 to form a coating layer 832 (S22).
코팅층(832)은 홈이 형성된 몸체(810)의 내측면(831)에 액상으로 이루어진 수지 계열의 절연성 물질을 사용하여 형성할 수 있다. 예를 들어, 코팅층(832)은 에폭시 수지, 실리콘 수지 또는 PDMS(polydimethylsiloxane)계 수지로 이루어지며, 스프레이 코팅, 디핑(dipping) 코팅 또는 표면 브러싱(brushing) 코팅 등을 이용하여 형성될 수 있다.The coating layer 832 may be formed using a resin-based insulating material made of a liquid on the inner surface 831 of the body 810 in which the groove is formed. For example, the coating layer 832 may be formed of an epoxy resin, a silicone resin, or a polydimethylsiloxane (PDMS) -based resin, and may be formed using a spray coating, a dipping coating, or a surface brushing coating.
본 예에서, 코팅층(832)은 액상의 수지로 이루어지며, 약 10㎛ 이하의 두께를 갖는 것이 바람직하다. 본 예에서 반사층(830)은 액상 수지를 이용하여 몸체(810)의 내측면(831)에 약 10㎛ 이하의 두께로 수지 코팅층(832)을 형성함으로써, 반사층(830)의 두께가 얇아 몸체(810)와의 접합력을 증가시키면서 제조 비용을 절감할 수 있다.In this example, the coating layer 832 is made of a liquid resin, and preferably has a thickness of about 10 μm or less. In this example, the reflective layer 830 is formed on the inner surface 831 of the body 810 by using a liquid resin to form a resin coating layer 832 with a thickness of about 10 μm or less, so that the thickness of the reflective layer 830 is thin and the body ( The manufacturing cost can be reduced while increasing the bonding force with 810.
몸체(810)의 내측면(831)과 접촉하는 코팅층(832)의 표면은 몸체(810)의 내측면(831)에 형성된 홈에 액상 수지가 채워져 비평탄면으로 형성되고, 후술되는 금속층(833)과 접촉하는 코팅층(832)의 표면은 평탄면(flat surface)으로 형성된다.The surface of the coating layer 832 in contact with the inner surface 831 of the body 810 is formed of a non-flat surface by filling a liquid resin in the groove formed in the inner surface 831 of the body 810, the metal layer 833 described later The surface of the coating layer 832 in contact with is formed as a flat surface.
다음으로, 코팅층(832)의 표면에 금속성 반사물질을 증착하여 금속층(833)을 형성하여 반사층(830)을 형성한다(S23).Next, a metal reflective material is deposited on the surface of the coating layer 832 to form a metal layer 833 to form a reflective layer 830 (S23).
코팅층(832)과 접촉하는 금속층(833)은 전체적으로 평탄면으로 형성된다.The metal layer 833 in contact with the coating layer 832 is formed as a flat surface as a whole.
금속층(833)이 평탄면으로 형성됨으로써, 반도체 발광소자 칩(820)으로부터 나오는 빛을 반사시키는 효율을 크게 증가할 수 있다.Since the metal layer 833 is formed as a flat surface, the efficiency of reflecting light emitted from the semiconductor light emitting device chip 820 may be greatly increased.
금속층(833)의 두께는 코팅층(832)의 두께보다 두껍게 형성되는 것이 바람직하지만, 이에 한정하지 않고 코팅층(832)의 두께와 동일하거나 얇게 형성될 수 있다.Although the thickness of the metal layer 833 is preferably formed to be thicker than the thickness of the coating layer 832, the thickness of the metal layer 833 may be the same as or thinner than the thickness of the coating layer 832.
금속층(833)은 빛을 반사하는 효율이 높아 반사성이 우수하고 전기적인 결합성이 우수한 물질, 예를 들어, 은(Ag), 니켈(Ni), 알루미늄(Al), 로듐(Rh), 납(Pd), 이리듐(Ir), 루테늄(Ru), 마그네슘(Mg), 아연(Zn) 중 적어도 하나를 포함하는 금속 또는 합금으로 형성될 수 있다. 금속층(833)은 비용 및 효율을 고려했을 때 알루미늄(Al)이 바람직하다.The metal layer 833 has a high efficiency of reflecting light and has excellent reflectivity and excellent electrical bonding properties, for example, silver (Ag), nickel (Ni), aluminum (Al), rhodium (Rh), and lead ( Pd), iridium (Ir), ruthenium (Ru), magnesium (Mg), it may be formed of a metal or alloy containing at least one of zinc (Zn). The metal layer 833 is preferably aluminum (Al) in consideration of cost and efficiency.
종래에는 반사층을 형성할 때 광택 도금법을 이용함으로써, 반사층의 두께가 두껍게 형성되었다. 반사층의 두께 증가에 따라 몸체와 반사층 사이에 응력(stress)이 작용하여 몸체로부터 반사층이 벗겨지거나 또는 접합력이 저하가 될 수 있다. 또한 반사층은 비용 및 효율을 고려했을 때 알루미늄(Al)이 바람직하지만, 광택 도금법에 의해 반사층을 형성하는 경우 알루미늄(Al) 도금이 불가능하였다. 따라서, 응력에 의해 반사층의 벗겨짐 또는 접합력이 저하되고, 제조 비용이 증가하는 문제점이 있었다.Conventionally, when forming a reflection layer, the thickness of the reflection layer was formed thick by using the gloss plating method. As the thickness of the reflective layer increases, a stress is applied between the body and the reflective layer, so that the reflective layer may be peeled off from the body or the bonding force may be degraded. In addition, the reflective layer is preferably aluminum (Al) in consideration of cost and efficiency, but aluminum (Al) plating was not possible when forming the reflective layer by a bright plating method. Therefore, the peeling or bonding force of the reflective layer is lowered by the stress, and there is a problem that the manufacturing cost increases.
하지만, 본 예에서와 같이 액상 수지를 이용하여 몸체(810)의 내측면(831)에 약 10㎛ 이하의 두께로 수지 코팅층(832)을 이용하여 반사층(830)을 형성함으로써, 반사층(830)의 두께가 얇아져 몸체(810)와의 접합력을 증가시키면서 제조 비용을 절감할 수 있다.However, as in the present example, the reflective layer 830 is formed by forming the reflective layer 830 using the resin coating layer 832 on the inner surface 831 of the body 810 using a liquid resin with a thickness of about 10 μm or less. The thickness of the thinner can increase the bonding force with the body 810 while reducing the manufacturing cost.
한편, 반사층(830)은 반도체 발광소자 칩(820)을 배치하기 전에 형성됨으로써, 홀(813)의 내측면에까지 반사층(830)이 형성될 수 있다.The reflective layer 830 may be formed before the semiconductor light emitting device chip 820 is disposed, and thus the reflective layer 830 may be formed on the inner side surface of the hole 813.
또한 도시하지 않았지만, 반사층(830)은 몸체(810)의 내측면 중 홀(813)과 인접한 부분에는 형성되지 않아 쇼트 위험성이 더 낮아질 수 있다.In addition, although not shown, the reflective layer 830 may not be formed at a portion of the inner surface of the body 810 adjacent to the hole 813, so that a short risk may be lowered.
다음으로, 홀(813) 각각에 반도체 발광소자 칩(820)을 배치한다(S3). 소자 이송 장치(미도시)를 이용하여 홀(813)에 반도체 발광소자 칩(820)을 배치한다. 여기서, 몸체(810)는 소자 이송 장치가 반도체 발광소자 칩(820)을 놓을 위치나 각도를 보정하기 위한 패턴으로 인식될 수 있으며, 이와 함께 봉지재(840)의 댐으로 기능한다.Next, the semiconductor light emitting device chip 820 is disposed in each of the holes 813 (S3). The semiconductor light emitting device chip 820 is disposed in the hole 813 using an element transfer device (not shown). Here, the body 810 may be recognized as a pattern for correcting the position or angle at which the device transfer device places the semiconductor light emitting device chip 820, and together with the dam, serves as a dam of the encapsulant 840.
다음으로, 반도체 발광소자 칩(820)을 고정시키기 위해 몸체(810)의 내부에 봉지재(840)를 투입한다(S4).Next, in order to fix the semiconductor light emitting device chip 820, an encapsulant 840 is introduced into the body 810 (S4).
다음으로, 베이스(1)를 제거하고, 접합부(850)를 형성한다(S5).Next, the base 1 is removed and the junction part 850 is formed (S5).
다음으로, 반도체 발광소자 칩(820)의 노출된 전극(821)과, 접합부(850)를 외부 기판에 접합한다. 반도체 발광소자 칩(820)의 전극(821) 및 접합부(850)와 외부 기판의 접합은 솔더 물질을 사용한 솔더링에 의해 접합할 수 있다. 반도체 발광소자 칩(820) 사이에 접합부(850)가 위치함으로써, 반도체 발광소자 칩(820)의 전극(821)만으로 접하는 경우보다 접합력이 향상될 수 있다.Next, the exposed electrode 821 of the semiconductor light emitting device chip 820 and the bonding portion 850 are bonded to the external substrate. Bonding of the electrode 821 and the junction portion 850 of the semiconductor light emitting device chip 820 and the external substrate may be performed by soldering using a solder material. Since the junction part 850 is positioned between the semiconductor light emitting device chips 820, the bonding force may be improved as compared with the case where only the electrodes 821 of the semiconductor light emitting device chip 820 are in contact with each other.
또한 접착부(850) 대신에 보강재(미도시)를 형성할 수도 있다. 보강재가 몸체 바닥부의 상면 및 하면 사이에 위치하는 경우 몸체를 만들 때 보강재를 넣을 수 있다. 보강재가 형성됨으로써, 휨이나 휨에 의한 깨짐 문제 등을 보완하면서, 접합력이 향상될 수 있다.In addition, a reinforcing material (not shown) may be formed instead of the adhesive part 850. If the reinforcement is located between the upper and lower surfaces of the body bottom, the reinforcement may be inserted when the body is made. By forming the reinforcing material, the bonding force can be improved while compensating for the problem of bending due to warping or bending.
본 개시에 따른 반도체 발광소자의 제조방법의 순서는 당업자가 용이하게 변경할 수 있는 범위에서는 본 개시의 범위에 포함될 수 있다.The order of the manufacturing method of the semiconductor light emitting device according to the present disclosure may be included in the scope of the present disclosure as long as the skilled person can easily change.
도 35는 본 개시에 따른 반도체 발광소자의 또 다른 일 예를 보여주는 도면이다. 도 35(a)는 사시도이며, 도 35(b)는 BB'에 따른 단면도이다.35 is a view illustrating still another example of a semiconductor light emitting device according to the present disclosure. (A) is a perspective view, and FIG. 35 (b) is sectional drawing along BB '.
반도체 발광소자(700)는 몸체(710)의 바닥부(712)에 장방향으로 형성된 복수개의 홀(713, 714)을 포함하며, 몸체(710)의 측벽(711)에 형성된 바닥부(712)의 제1 홀(713)에 형성된 반도체 발광소자 칩(720)과, 반도체 발광소자 칩(720) 사이에 위치하는 바닥부(712)의 제2 홀(714)에 형성된 보강재(750)와, 보강재(750)가 형성된 제2 홀(714) 내부에 채워지는 반사물질(760)을 포함한다.The semiconductor light emitting device 700 includes a plurality of holes 713 and 714 formed in the bottom direction 712 of the body 710 in the longitudinal direction, and the bottom part 712 formed in the sidewall 711 of the body 710. The semiconductor light emitting device chip 720 formed in the first hole 713, the reinforcing material 750 formed in the second hole 714 of the bottom part 712 positioned between the semiconductor light emitting device chip 720, and the reinforcing material. The reflective material 760 is filled in the second hole 714 in which the 750 is formed.
본 예에서, 바닥부(712)는 장방향(x 방향)과 단방향(y 방향)을 가지며, 장방향은 단방향 대비 5배 이상의 크기를 가질 수 있다. 하지만, 이에 한정되지 않고 바닥부(712)는 단방향보다 장방향으로 길게 형성되는 것이 바람직하다.In this example, the bottom part 712 has a long direction (x direction) and a unidirectional direction (y direction), and the long direction may have a size five times greater than the unidirectional direction. However, the present invention is not limited thereto, and the bottom portion 712 may be formed to be longer in the longitudinal direction than in the unidirectional direction.
반도체 발광소자(700)는 복수개의 홀(713, 714), 제1 홀(713)에 반도체 발광소자 칩(720)이 위치하고, 제2 홀(714)에 보강재(750) 및 반사물질(760)이 위치하는 것을 제외하고는 도 27에 기재된 반도체 발광소자(200)와 동일한 특성을 갖는다. 도 35에는 복수개의 홀(713, 714)이 3개로 도시하였으나, 이에 한정하지 않고 3개 이상도 가능하다.In the semiconductor light emitting device 700, a plurality of holes 713 and 714 and a semiconductor light emitting device chip 720 are positioned in the first hole 713, and the reinforcement 750 and the reflective material 760 are formed in the second hole 714. Except for this position, it has the same characteristics as the semiconductor light emitting device 200 shown in FIG. 35 illustrates a plurality of holes 713 and 714, but three or more holes are not limited thereto.
몸체(710)의 측벽(711)에 형성된 바닥부(712)의 제1 홀(713)에는 반도체 발광소자 칩(720)이 위치한다. 반도체 발광소자 칩(720)은 몸체(710)의 양쪽 측벽(711)에 형성된 바닥부(712)의 제1 홀(713)에 각각 형성된다. 여기서, 측벽(711)은 봉지재(730)의 댐(dam)으로 기능한다. 또한 각각의 제1 홀(713)에 위치하는 반도체 발광소자 칩(720)은 서로 다른 색을 발광할 수 있다.The semiconductor light emitting device chip 720 is positioned in the first hole 713 of the bottom part 712 formed on the sidewall 711 of the body 710. The semiconductor light emitting device chip 720 is formed in each of the first holes 713 of the bottom part 712 formed on both sidewalls 711 of the body 710. Here, the side wall 711 serves as a dam of the encapsulant 730. In addition, the semiconductor light emitting device chips 720 positioned in the first holes 713 may emit different colors.
보강재(750)는 반도체 발광소자 칩(720) 사이에 위치하는 바닥부(712)의 제2 홀(714)에 위치한다. 보강재(750)는 제1 홀(713)이 형성된 바닥부(712)와 중첩되지 않게 배치되는 것이 바람직하다.The reinforcing material 750 is positioned in the second hole 714 of the bottom portion 712 positioned between the semiconductor light emitting device chips 720. The reinforcement 750 is preferably disposed not to overlap the bottom portion 712 where the first hole 713 is formed.
보강재(750)의 하면(751)은 바닥부(712)의 하면(716) 방향으로 노출되어 있다. 몸체(710) 바닥부(712)의 하면(716) 방향으로 노출된 반도체 발광소자 칩(720)의 전극(721)과 떨어져 위치한다. 바람직하게, 반도체 발광소자 칩(720)의 전극(721)은 바닥부(712)으로부터 돌출되어 있다.The lower surface 751 of the reinforcing material 750 is exposed in the direction of the lower surface 716 of the bottom portion 712. The body 710 is positioned away from the electrode 721 of the semiconductor light emitting device chip 720 exposed in the direction of the bottom surface 716 of the bottom portion 712. Preferably, the electrode 721 of the semiconductor light emitting device chip 720 protrudes from the bottom portion 712.
보강재(750)의 높이(752)는 바닥부(712)의 높이(719)보다 낮게 형성될 수 있지만, 이에 한정하지 않고 보강재(750)의 높이(752)는 바닥부(712)의 높이(719)보다 높거나 동일하게 형성될 수 있다.The height 752 of the reinforcement 750 may be formed lower than the height 719 of the bottom 712. However, the height 752 of the reinforcement 750 is not limited thereto. It may be formed higher than or equal to).
보강재(750)의 폭(753)은 제2 홀(714)의 폭(7140) 보다 작게 형성될 수 있지만, 이에 한정하지 않고 보강재(750)의 폭(753)은 반도체 발광소자 칩(720) 사이에 위치하는 제2 홀(714)의 폭(7140)과 동일하게 형성될 수 있다.The width 753 of the reinforcement 750 may be formed smaller than the width 7140 of the second hole 714, but the width 753 of the reinforcement 750 is not limited thereto. It may be formed to be the same as the width 7140 of the second hole 714 located in.
제2 홀(714)의 폭(7140)은 제1 홀(713)의 폭보다 크게 형성되는 것이 바람직하다. 몸체(710)의 휨이나 휨에 의한 깨짐을 방지하기 위해 제2 홀(714)은 제1 홀(713)보다 크게 형성되는 것이 바람직하지만, 이에 한정하지 않고 작거나 동일하게 형성될 수도 있다.The width 7140 of the second hole 714 is preferably larger than the width of the first hole 713. The second hole 714 is preferably formed larger than the first hole 713 in order to prevent the bending of the body 710 due to the bending or the bending. However, the second hole 714 may be smaller or the same.
바닥부(712)의 하면(716) 방향으로 돌출된 보강재(750)의 하면(751)의 길이는 반도체 발광소자 칩(720)의 전극(721)의 길이와 동일하게 위치하는 것이 바람직하다.The length of the bottom surface 751 of the reinforcement 750 protruding toward the bottom surface 716 of the bottom portion 712 is preferably equal to the length of the electrode 721 of the semiconductor light emitting device chip 720.
도 35에 도시된 반도체 발광소자(700)는 장방향으로 형성됨으로써, SMT(Surface Mounter Technology) 장비를 이용하여 반도체 발광소자(700)와 외부 기판을 접합하기 위해 리플로우(Reflow) 공정을 수행하는 경우 열에 의해 반도체 발광소자 칩(720) 사이에 위치하는 바닥부(712)가 휘어져 솔더링이 원활하게 이루어지지 않거나 휨이 발생하여 몸체(710)의 깨짐 문제가 발생하였다. 하지만, 반도체 발광소자 칩(720) 사이에 보강재(750)가 위치함으로써, 몸체(710)의 휨이나 휨에 의한 깨짐 문제 등을 보완할 수 있다. 즉, 반도체 발광소자 칩(720) 사이에 위치하는 바닥부(712) 내에 제2 홀(714)이 위치함으로써, 열에 의한 압력이 종래보다 적어져 휨에 대한 문제가 완화될 수 있다.Since the semiconductor light emitting device 700 illustrated in FIG. 35 is formed in a long direction, a reflow process is performed to bond the semiconductor light emitting device 700 to an external substrate by using surface mounter technology (SMT) equipment. In this case, the bottom portion 712 located between the semiconductor light emitting device chips 720 is bent due to heat, so that soldering is not performed smoothly or warpage occurs, thereby causing a problem of breaking the body 710. However, since the reinforcing material 750 is positioned between the semiconductor light emitting device chips 720, the bending problem of the body 710 may be compensated for. That is, since the second hole 714 is positioned in the bottom portion 712 located between the semiconductor light emitting device chips 720, the pressure due to heat is less than that of the related art, and thus the problem of warpage may be alleviated.
더욱이, 바닥부(712)의 하면(716) 방향으로 반도체 발광소자 칩(720)의 전극(721)의 길이만큼 돌출된 보강재(750)의 하면(751)으로 인하여 반도체 발광소자(700)가 외부 기판과 접합될 때, 반도체 발광소자 칩(720)의 전극(721)만으로 접하는 경우보다 접합력이 향상될 수 있다.In addition, the semiconductor light emitting device 700 is external due to the bottom surface 751 of the reinforcing material 750 protruding by the length of the electrode 721 of the semiconductor light emitting device chip 720 toward the bottom surface 716 of the bottom part 712. When bonded to the substrate, the bonding force may be improved than when only the electrode 721 of the semiconductor light emitting device chip 720 is in contact.
이와 같은 보강재(750)는 접합력이 높은 비도전성 금속으로 이루어질 수 있다. 예를 들어, 보강재(750)는 구리(Cu) 및 금(Au) 중 하나일 수 있다. 또한 보강재(750)는 2개 이상의 금속의 조합일 수 있다. 예를 들어 니켈(Ni)과 구리 조합, 크롬(Cr)과 구리 조합, 티타늄(Ti)과 구리 조합 중 하나일 수 있다. 당업자가 용이하게 변경할 수 있는 범위에서 보강재(750)는 다양한 조합이 가능하다.Such a reinforcing material 750 may be made of a non-conductive metal having a high bonding strength. For example, the reinforcement 750 may be one of copper (Cu) and gold (Au). In addition, the reinforcement 750 may be a combination of two or more metals. For example, it may be one of a combination of nickel (Ni) and copper, a combination of chromium (Cr) and copper, and a combination of titanium (Ti) and copper. The reinforcement 750 may be variously combined within a range easily changed by those skilled in the art.
보강재(750)가 형성된 제2 홀(714) 내부에 채워지는 반사물질(760)은 빛을 반사하는 물질로 형성된다. 예를 들어, 반사율이 높은 고반사 백색 반사 물질 즉, 백색 실리콘으로 형성될 수 있다.The reflective material 760 filled in the second hole 714 in which the reinforcing material 750 is formed is formed of a material that reflects light. For example, it may be formed of a highly reflective white reflective material, ie, white silicon, having a high reflectance.
반사물질(760)이 보강재(750) 상면에 위치함으로써, 파장 변환재(731)에 의해 방사된 빛을 반사시켜 반도체 발광소자(700)의 광 추출 효율을 향상시킬 수 있다.Since the reflective material 760 is disposed on the upper surface of the reinforcing material 750, the light emitted by the wavelength converting material 731 may be reflected to improve light extraction efficiency of the semiconductor light emitting device 700.
도 36은 본 개시에 따른 반도체 발광소자의 또 다른 일 예를 보여주는 도면이다.36 illustrates another example of the semiconductor light emitting device according to the present disclosure.
반도체 발광소자(800)는 반도체 발광소자 칩(820) 사이에 위치하는 바닥부(812)의 제2 홀(814)에 형성된 보강재(850)의 전면 형성된 금속 반사층(880)을 포함한다. 금속 반사층(880)을 제외하고는 도 35에 기재된 반도체 발광소자(700)와 동일한 특성을 갖는다.The semiconductor light emitting device 800 includes a metal reflective layer 880 formed on the front surface of the reinforcing material 850 formed in the second hole 814 of the bottom part 812 located between the semiconductor light emitting device chips 820. Except for the metal reflective layer 880, it has the same characteristics as the semiconductor light emitting device 700 shown in FIG.
금속 반사층(880)이 보강재(850)의 상면에 위치함으로써, 파장 변환재(831)에 의해 방사된 빛을 반사시켜 반도체 발광소자(800)의 광 추출 효율을 향상시킬 수 있다.Since the metal reflective layer 880 is located on the upper surface of the reinforcing material 850, the light emitted by the wavelength converting material 831 may be reflected to improve light extraction efficiency of the semiconductor light emitting device 800.
금속 반사층(880)은 빛을 반사하는 효율이 높은 금속성 물질로 이루어진 것이 바람직하며 예를 들어 금속성 물질이 코팅, 도금 및 증착 등과 같은 방법으로 형성될 수 있다. 금속 반사층(880)을 형성하는 금속성 물질에는 예를 들어 은(Ag), 알루미늄(Al) 등으로 형성될 수 있다.The metal reflective layer 880 is preferably made of a metallic material having high efficiency of reflecting light, and for example, the metallic material may be formed by a method such as coating, plating, and deposition. The metallic material forming the metal reflective layer 880 may be formed of, for example, silver (Ag), aluminum (Al), or the like.
또한, 금속 반사층(870)은 도 36(b)와 같이 보강재(850)의 하면에도 위치할 수 있다.In addition, the metal reflective layer 870 may be located on the bottom surface of the reinforcing material 850 as shown in FIG. 36 (b).
도 37은 본 개시에 따른 반도체 발광소자의 또 다른 일 예를 보여주는 도면이다.37 is a view showing another example of a semiconductor light emitting device according to the present disclosure.
반도체 발광소자(900)는 반도체 발광소자 칩(920) 사이에 위치하는 바닥부(912)가 서로 이격된 복수개의 제2 홀(914)을 포함하며, 각각의 제2 홀(914)에는 보강재(950) 및 반사물질(960)이 위치한다. 서로 이격된 복수개의 제2 홀(914) 및 각각의 제2 홀(914)에 보강재(950) 및 반사물질(960)이 위치하는 것을 제외하고는 도 35에 기재된 반도체 발광소자(700)와 동일한 특성을 갖는다.The semiconductor light emitting device 900 includes a plurality of second holes 914 in which bottom portions 912 positioned between the semiconductor light emitting device chips 920 are spaced apart from each other, and each of the second holes 914 includes a reinforcing material ( 950 and reflective material 960 are located. Same as the semiconductor light emitting device 700 of FIG. 35 except that the reinforcing material 950 and the reflecting material 960 are disposed in the plurality of second holes 914 and the second holes 914 spaced apart from each other. Has characteristics.
도 37에는 복수개의 제2 홀(914)이 3개로 도시하였으나, 이에 한정하지 않고 3개 이상도 가능하다. 여기서, 복수개의 제2 홀(914)의 폭은 서로 상이하거나 동일하게 형성될 수 있다.In FIG. 37, the plurality of second holes 914 is illustrated as three, but three or more holes are not limited thereto. Here, the widths of the plurality of second holes 914 may be formed to be different or the same as each other.
또한 도시하지 않았지만, 필요한 경우에는 복수개의 제2 홀(914)내에 채워지는 반사물질(960) 대신 보강재(950)의 상면 또는 상하면에 금속 반사층이 위치함으로써, 파장 변환재(931)에 의해 방사된 빛을 반사시켜 반도체 발광소자(900)의 광 추출 효율을 향상시킬 수도 있다.Although not shown, a metal reflecting layer is disposed on the upper surface or the upper surface of the reinforcing material 950 instead of the reflecting material 960 filled in the plurality of second holes 914, if necessary, to be radiated by the wavelength converter 931. By reflecting light, the light extraction efficiency of the semiconductor light emitting device 900 may be improved.
도 38은 본 개시에 따른 반도체 발광소자의 또 다른 일 예를 보여주는 도면이다.38 illustrates another example of the semiconductor light emitting device according to the present disclosure.
반도체 발광소자(1000)는 반도체 발광소자 칩(1020)의 측면에서 나오는 빛을 효율적으로 반사하기 위해서 반사율이 높은 반사층(1070, 1071)을 포함한다. 반사층(1070, 1071)을 제외하고는 도 35에 기재된 반도체 발광소자(700)와 동일한 특성을 갖는다.The semiconductor light emitting device 1000 includes reflective layers 1070 and 1071 having high reflectance in order to efficiently reflect light emitted from the side surface of the semiconductor light emitting device chip 1020. Except for the reflective layers 1070 and 1071, they have the same characteristics as the semiconductor light emitting device 700 shown in FIG.
반사층(1070, 1071)은 빛을 반사하는 효율이 높은 금속성 물질로 이루어진 것이 바람직하며 예를 들어 금속성 물질이 코팅, 도금 및 증착 등과 같은 방법으로 형성될 수 있다.The reflective layers 1070 and 1071 are preferably made of a highly efficient metallic material that reflects light, and for example, the metallic material may be formed by coating, plating, and deposition.
반사층(1070, 1071)을 형성하는 금속성 물질에는 예를 들어 은(Ag), 알루미늄(Al) 등이 있지만 비용 및 효율을 고려했을 때 알루미늄(Al)이 바람직하다.Examples of the metallic material forming the reflective layers 1070 and 1071 include silver (Ag) and aluminum (Al), but aluminum (Al) is preferable in consideration of cost and efficiency.
구체적으로 도 38(a)를 살펴보면, 반사층(1070)은 측벽(1017)의 내측면(1018), 바닥부(1012)의 상면(1015) 및 바닥부(1012)의 내측면(1040)의 일면에 형성된다. 여기서, 벽(1017)의 내측면(1018), 바닥부(1012)의 상면(1015) 및 바닥부(1012)의 내측면(1040)은 하나의 라인으로 연결되어 위치한다. 즉, 반사층(1070)은 반도체 발광소자 칩(1020)을 덮는 봉지재(1030)와 접속하는 몸체(1010)의 일면에 형성된다.Specifically, referring to FIG. 38A, the reflective layer 1070 may include an inner surface 1018 of the sidewall 1017, an upper surface 1015 of the bottom 1012, and one surface of an inner surface 1040 of the bottom 1012. Is formed. Here, the inner surface 1018 of the wall 1017, the upper surface 1015 of the bottom portion 1012 and the inner surface 1040 of the bottom portion 1012 are positioned in a line. That is, the reflective layer 1070 is formed on one surface of the body 1010 connecting to the encapsulant 1030 covering the semiconductor light emitting device chip 1020.
반사효율이 높은 금속의 반사층(1070)을 몸체(1010)의 내측면 전체에 형성시킴으로써, 반도체 발광소자(1000)의 광 추출 효율을 향상시킬 수 있다.The light extraction efficiency of the semiconductor light emitting device 1000 may be improved by forming the metal reflective layer 1070 having a high reflection efficiency on the entire inner surface of the body 1010.
도 38(b)를 살펴보면, 반사층(1071)은 바닥부(1012)의 내측면(1040) 중 바닥부(1012)의 하면(1016) 방향의 일부분(1041)을 제외한 나머지 바닥부(1012)의 내측면(1040), 바닥부(1012)의 상면(1015) 및 측벽(1017)의 내측면(1018)에만 형성된다. 이에 따라, 반사층(1071)이 바닥부(1012)의 일부분(1041)을 제외한 부분에 형성됨으로써, 쇼트 위험성을 방지할 수 있다.Referring to FIG. 38B, the reflective layer 1071 may be formed of the bottom portion 1012 of the inner side surface 1040 of the bottom portion 1012 except for the portion 1041 of the bottom portion 1012 of the bottom portion 1012. It is formed only on the inner surface 1040, the upper surface 1015 of the bottom portion 1012 and the inner surface 1018 of the side wall 1017. As a result, the reflective layer 1071 is formed at a portion other than the portion 1041 of the bottom portion 1012, whereby a short risk can be prevented.
또한, 도시 하지는 않았지만 몸체(1010)의 상면에도 반사층이 형성될 수 있다. 예를 들어, 몸체(1010)의 상면에 금속성 물질 또는 DBR 분포 브래그 리플렉터(DBR: Distributed Bragg Reflector)를 도포하여 반사층을 형성할 수 있다.In addition, although not shown, a reflective layer may be formed on the upper surface of the body 1010. For example, a reflective layer may be formed by applying a metallic material or a DBR distributed Bragg reflector (DBR) to the top surface of the body 1010.
도 39는 본 개시에 따른 반도체 발광소자의 또 다른 일 예를 보여주는 도면이다.39 is a view showing another example of a semiconductor light emitting device according to the present disclosure.
반도체 발광소자(1100)는 반도체 발광소자 칩(1120) 사이에 위치하는 몸체(1110) 바닥부(1112)의 제2 홀(1114)에 위치하는 기능성 소자(2000)를 포함한다. 제2 홀(1114)에 형성된 기능성 소자(2000)를 제외하고는 도 35에 기재된 반도체 발광소자(700)와 동일한 특성을 갖는다.The semiconductor light emitting device 1100 includes a functional device 2000 positioned in the second hole 1114 of the bottom portion 1112 of the body 1110 positioned between the semiconductor light emitting device chips 1120. Except for the functional device 2000 formed in the second hole 1114, the semiconductor light emitting device 700 has the same characteristics as the semiconductor light emitting device 700 illustrated in FIG. 35.
기능성 소자(2000)는 예를 들어, ESD(ElectroStatic Discharge) 및/또는 EOS(Electrical Over-Stress)로부터 반도체 발광소자 칩(1120)을 보호하는 보호 소자(protecting element: 예: zener diode)이다.The functional device 2000 is, for example, a protecting element (eg, a zener diode) that protects the semiconductor light emitting device chip 1120 from electrostatic discharge (ESD) and / or electrical over-stress (EOS).
기능성 소자(2000)의 전극(2001)은 발광소자 칩(1120)의 전극(1121)과 동일한 방향, 즉 몸체(1100) 바닥부(1112)의 하면(1116) 방향으로 노출되어 위치한다.The electrode 2001 of the functional device 2000 is exposed and positioned in the same direction as the electrode 1121 of the light emitting device chip 1120, that is, the lower surface 1116 of the bottom portion 1112 of the body 1100.
기능성 소자(2000)가 형성된 제2 홀(1114)은 반사물질(1160)로 채워진다.The second hole 1114 in which the functional device 2000 is formed is filled with the reflective material 1160.
도 40은 본 개시에 따른 반도체 발광소자의 또 다른 일 예를 보여주는 도면이다.40 illustrates another example of the semiconductor light emitting device according to the present disclosure.
반도체 발광소자(1200)는 반도체 발광소자 칩(1220) 사이에 위치하는 바닥부(1212)가 서로 이격된 복수개의 제2 홀(1214)을 포함하며, 반도체 발광소자 칩(1220)과 인접한 바닥부(1212)의 제2 홀(1214)에는 보강재(1250) 및 반사물질(1260)이 위치하고, 보강재(1250) 및 반사물질(1260)이 위치하는 제2 홀(1214) 사이에는 기능성 소자(2100) 및 반사물질(1260)이 위치한다. 서로 이격된 복수개의 제2 홀(1214) 및 각각의 제2 홀(1214)에 보강재(1250) 및 반사물질(1260) 그리고 기능성 소자(2100) 및 반사물질(1260)이 위치하는 것을 제외하고는 도 35에 기재된 반도체 발광소자(700)와 동일한 특성을 갖는다.The semiconductor light emitting device 1200 may include a plurality of second holes 1214 in which bottom parts 1212 positioned between the semiconductor light emitting device chips 1220 are spaced apart from each other, and a bottom part adjacent to the semiconductor light emitting device chips 1220. The reinforcement 1250 and the reflective material 1260 are positioned in the second hole 1214 of the 1212, and the functional element 2100 is disposed between the second hole 1214 where the reinforcement 1250 and the reflective material 1260 are located. And a reflective material 1260 is located. Except that the reinforcement 1250 and the reflective material 1260 and the functional element 2100 and the reflective material 1260 are positioned in the plurality of second holes 1214 and each of the second holes 1214 spaced apart from each other. It has the same characteristics as the semiconductor light emitting element 700 shown in FIG.
서로 이격된 복수개의 제2 홀(1214)은 서로 상이한 폭으로 형성될 수 있지만, 이에 한정되지 않고 동일한 폭으로 형성될 수 있다.The plurality of second holes 1214 spaced apart from each other may be formed to have different widths from each other, but is not limited thereto and may be formed to have the same width.
도 41은 본 개시에 따른 반도체 발광소자의 제조방법의 일 예를 보여주는 도면이고, 도 42는 본 개시에 따른 반도체 발광소자의 다른 제조방법의 일 예를 보여주는 도면이다.41 is a view illustrating an example of a method of manufacturing a semiconductor light emitting device according to the present disclosure, and FIG. 42 is a view illustrating an example of another method of manufacturing a semiconductor light emitting device according to the present disclosure.
먼저, 바닥부(1312)에 장방향으로 형성된 복수개의 홀(1313, 1314)을 포함하는 몸체(900)를 준비한다(S1). 여기서, 몸체(1310)는 사출성형을 통해 얻을 수 있다.First, a body 900 including a plurality of holes 1313 and 1314 formed in the bottom portion 1312 in the longitudinal direction is prepared (S1). Here, the body 1310 may be obtained through injection molding.
몸체(1310)는 임시 고정판인 베이스(1)에 의해 고정 및 지지될 수 있다. 베이스(1)는 일반 접착력 있는 테이프이면 가능하다. 예를 들어 블루 테이프일 수 있다.The body 1310 may be fixed and supported by the base 1, which is a temporary fixing plate. The base 1 can be a general adhesive tape. For example, it may be a blue tape.
제1 홀(1313)은 몸체(1310)의 양쪽 측벽(1311)에 형성된 바닥부(1312)에 위치되고, 제2 홀(1314)는 제1 홀(1313) 사이의 바닥부(1312)에 위치한다.The first hole 1313 is located at the bottom 1312 formed in both sidewalls 1311 of the body 1310, and the second hole 1314 is located at the bottom 1312 between the first holes 1313. do.
제2 홀(1314)의 폭은 제1 홀(1313)의 폭보다 넓게 형성되는 것이 바람직하다. 하지만, 제1 홀(1313) 사이에 위치하는 제2 홀(1314)이 서로 이격되어 복수개로 위치하는 경우 제2 홀(1314)의 폭은 제1 홀(1313)의 폭과 동일하게 또는 작게 형성될 수 있다.It is preferable that the width of the second hole 1314 is wider than the width of the first hole 1313. However, when a plurality of second holes 1314 located between the first holes 1313 are spaced apart from each other, the width of the second holes 1314 is the same as or smaller than the width of the first holes 1313. Can be.
다음으로, 제1 홀(1313) 각각에 반도체 발광소자 칩(1320)을 배치한다(S2). 소자 이송 장치(미도시)를 이용하여 제1 홀(1313)에 반도체 발광소자 칩(1320)을 배치한다. 여기서, 몸체(1310)는 소자 이송 장치가 반도체 발광소자 칩(220)을 놓을 위치나 각도를 보정하기 위한 패턴으로 인식될 수 있으며, 이와 함께 봉지재(1330)의 댐으로 기능한다.Next, the semiconductor light emitting device chip 1320 is disposed in each of the first holes 1313 (S2). The semiconductor light emitting device chip 1320 is disposed in the first hole 1313 using an element transfer device (not shown). Here, the body 1310 may be recognized as a pattern for correcting a position or an angle at which the device transfer device is to place the semiconductor light emitting device chip 220, and functions as a dam of the encapsulant 1330.
다음으로, 제2 홀(1314)에 보강재(1350)를 배치한다(S3).Next, the reinforcing material 1350 is disposed in the second hole 1314 (S3).
다음으로, 보강재(1350)가 배치된 제2 홀(1314) 내부에 반사물질(1360)을 채운다(S4).Next, the reflective material 1360 is filled in the second hole 1314 in which the reinforcing material 1350 is disposed (S4).
다음으로, 반도체 발광소자 칩(1320) 및 보강재(1350)를 고정시키기 위해 몸체(1310) 내부에 봉지재(1330)를 투입한다(S5).Next, in order to fix the semiconductor light emitting device chip 1320 and the reinforcing material 1350, an encapsulant 1330 is introduced into the body 1310 (S5).
한편, 보강재(1350)는 금속 반사층(1380)을 코팅되어 제2 홀(1314)내에 배치될 수 있다(S31).On the other hand, the reinforcing material 1350 may be disposed in the second hole 1314 by coating the metal reflective layer 1380 (S31).
금속 반사층(1380)이 형성된 보강재(1350)가 제2 홀(1314)에 배치되는 경우, 별도의 반사물질(1360) 형성 없이 바로 봉지재(1330)를 투입한다(S51).When the reinforcing member 1350 having the metal reflective layer 1380 is disposed in the second hole 1314, the encapsulant 1330 is directly injected without forming a reflective material 1360 (S51).
다음으로, 베이스(1)를 제거하고, 반도체 발광소자 칩(1320)의 노출된 전극(1321)과, 보강재(1350)의 하면을 외부 기판에 접합한다. 반도체 발광소자 칩(1320)의 전극(1321) 및 보강재(1350)와 외부 기판의 접합은 솔더물질을 사용한 솔더링에 의해 접합할 수 있다. 반도체 발광소자 칩(1320) 사이에 보강재(1350)가 위치함으로써, 몸체(1310)의 휨이나 휨에 의한 깨짐 문제 등을 보완하면서, 반도체 발광소자 칩(1320)의 전극(1321)만으로 접하는 경우보다 접합력이 향상될 수 있다.Next, the base 1 is removed, and the exposed electrode 1321 of the semiconductor light emitting device chip 1320 and the bottom surface of the reinforcing material 1350 are bonded to the external substrate. The electrode 1321 and the reinforcing material 1350 of the semiconductor light emitting device chip 1320 and the external substrate may be bonded by soldering using a solder material. The reinforcing material 1350 is positioned between the semiconductor light emitting device chips 1320, thereby compensating for the problem of bending or bending caused by the bending of the body 1310, and contacting only the electrode 1321 of the semiconductor light emitting device chip 1320. Bonding force can be improved.
본 개시에 따른 반도체 발광소자의 제조방법의 순서는 당업자가 용이하게 변경할 수 있는 범위에서는 본 개시의 범위에 포함될 수 있다.The order of the manufacturing method of the semiconductor light emitting device according to the present disclosure may be included in the scope of the present disclosure as long as the skilled person can easily change.
도 43은 본 개시에 따른 반도체 발광소자의 또 다른 일 예를 보여주는 도면이다. 도 43(a)는 사시도이며, 도 43(b)는 CC'에 따른 단면도이고, 도 43(c)는 도 43(b)에 대한 다른 예의 단면도이고, 도 43(d)는 도 43(b)에 대한 또 다른 예의 단면도이다.43 illustrates another example of the semiconductor light emitting device according to the present disclosure. Fig. 43 (a) is a perspective view, Fig. 43 (b) is a sectional view taken along CC ', Fig. 43 (c) is a sectional view of another example of Fig. 43 (b), and Fig. 43 (d) is Fig. 43 (b). ) Is a cross-sectional view of another example.
반도체 발광소자(1400)는 장방향으로 형성된 복수개의 홀(1413, 1414)을 포함하는 바닥부(1412), 2개의 개방 구간(1401, 1402)를 포함하는 측벽(1411), 바닥부(1412)의 제1 홀(1413)에 형성된 반도체 발광소자 칩(1420)과, 반도체 발광소자 칩(1420) 사이에 위치하는 바닥부(1412)의 제2 홀(1414)에 형성된 보강재(1450)와, 보강재(1450)가 형성된 제2 홀(1414) 내부에 채워지는 반사물질(1460)을 포함한다. 본 예에서, 바닥부(1412)는 장방향(x 방향)과 단방향(y 방향)을 가지며, 장방향은 단방향 대비 5배 이상의 크기를 가질 수 있다.The semiconductor light emitting device 1400 includes a bottom portion 1412 including a plurality of holes 1413 and 1414 formed in a longitudinal direction, a sidewall 1411 including two open sections 1401 and 1402, and a bottom portion 1412. The semiconductor light emitting device chip 1420 formed in the first hole 1413 of the second reinforcement, the reinforcing material 1450 formed in the second hole 1414 of the bottom portion 1412 positioned between the semiconductor light emitting device chip 1420, and the reinforcing material The reflective material 1460 is filled in the second hole 1414 formed with the 1450. In this example, the bottom portion 1412 has a longitudinal direction (x direction) and a unidirectional direction (y direction), and the longitudinal direction may have a size five times greater than the unidirectional direction.
측벽(1411)은 2개의 개방 구간(1401, 1402)을 포함한다. 2개의 개방 구간(1401, 1402)은 장방향 측에서 서로 마주보고 위치하는 것이 바람직하다. Sidewall 1411 includes two open sections 1401, 1402. The two open sections 1401 and 1402 are preferably located facing each other on the long side.
이에 따라, 반도체 발광소자(1400)는 빛을 반도체 발광소자(1400)의 상측 및 개방 구간(1401, 1402)을 통해 발광할 수 있다. 이에 따라, 반도체 발광소자(1400)는 3면 발광이 가능하다.Accordingly, the semiconductor light emitting device 1400 may emit light through the upper and open sections 1401 and 1402 of the semiconductor light emitting device 1400. Accordingly, the semiconductor light emitting device 1400 may emit light on three surfaces.
또한 바닥부(1412)의 높이(1403)는 반도체 발광소자 칩(1420)의 높이(1421)보다 낮다. 바닥부(1412)의 높이(1403)가 반도체 발광소자 칩(1420)의 높이(1421)보다 낮기 때문에 도 43(a)에 표시된 화살표와 같이 3면 발광하는 반도체 발광소자(1400)의 광 추출 효율이 더욱 증가할 수 있다.In addition, the height 1403 of the bottom portion 1412 is lower than the height 1421 of the semiconductor light emitting device chip 1420. Since the height 1403 of the bottom portion 1412 is lower than the height 1421 of the semiconductor light emitting device chip 1420, light extraction efficiency of the semiconductor light emitting device 1400 that emits three surfaces as shown by the arrow shown in FIG. This can be further increased.
반도체 발광소자(1400)는 2개의 개방 구간(1401, 1402)을 포함하고 있지만, 이에 한정하지 않고 1개 또는 2개 이상의 개방 구간을 포함할 수 있다.The semiconductor light emitting device 1400 includes two open sections 1401 and 1402, but is not limited thereto and may include one or two or more open sections.
또한, 도 38(c)를 참조하면 반도체 발광소자(1400)는 개방 구간(1401, 1402)의 측벽(1411)이 완전히 제거되는 것이 아니라 일부가 남아서 반도체 발광소자(1400)의 측면으로 나가는 빛의 각도 또는 빛의 양을 조절할 수 있다.In addition, referring to FIG. 38 (c), the semiconductor light emitting device 1400 is not completely removed from the sidewalls 1411 of the open sections 1401 and 1402, but partially remains to allow light to exit to the side of the semiconductor light emitting device 1400. You can adjust the angle or amount of light.
또한, 도 38(d)를 참조하면 반도체 발광소자(1400)는 절단선(1404)에 따라 측벽(1411)을 제거하여 반도체 발광소자(1400)의 측면으로 빛을 발광할 수 있다.38 (d), the semiconductor light emitting device 1400 may emit light toward the side of the semiconductor light emitting device 1400 by removing the sidewall 1411 along the cutting line 1404.
도 43에서 설명하는 것을 제외하고 반도체 발광소자(1400)는 도 35에 기재된 반도체 발광소자(700)와 실질적으로 동일하다.Except as illustrated in FIG. 43, the semiconductor light emitting device 1400 is substantially the same as the semiconductor light emitting device 700 of FIG. 35.
이하 본 개시의 다양한 실시 형태에 대하여 설명한다.Hereinafter, various embodiments of the present disclosure will be described.
(1) 반도체 발광소자에 있어서, 제1 도전부, 제2 도전부 및 제1 도전부와 제2 도전부 사이에 위치하는 절연부를 포함하는 기판; 기판 위에 위치하며 바닥부를 포함하는 몸체;로서, 바닥부에 홀이 형성된 몸체; 홀에 의해 노출된 기판 위에 배치되며 기판과 전기적으로 연결된 반도체 발광소자 칩;으로서, 전자와 전공의 재결합에 의해 자외선을 생성하는 복수의 반도체층과, 복수의 반도체층에 전기적으로 연결된 전극을 가지는 반도체 발광소자 칩; 그리고, 몸체의 내측면의 적어도 일부분에 형성된 반사층을 포함하는 반도체 발광소자. 여기서, 반도체 발광소자 칩 및 기판은 봉지재, 유리 또는 석영으로 덮일 수 있다.(1) A semiconductor light emitting device comprising: a substrate comprising a first conductive portion, a second conductive portion, and an insulating portion located between the first conductive portion and the second conductive portion; A body disposed on the substrate and including a bottom portion, the body having a hole formed in the bottom portion; A semiconductor light emitting device chip disposed on a substrate exposed by a hole and electrically connected to a substrate, comprising: a semiconductor having a plurality of semiconductor layers generating ultraviolet rays by recombination of electrons and holes, and electrodes electrically connected to the plurality of semiconductor layers Light emitting device chip; And a reflective layer formed on at least a portion of an inner surface of the body. Here, the semiconductor light emitting device chip and the substrate may be covered with an encapsulant, glass or quartz.
(2) 몸체의 하면 개구의 폭은 몸체의 상면 개구의 폭보다 작은 반도체 발광소자.(2) The semiconductor light emitting element having a width smaller than the width of the upper opening of the body.
(3) 몸체의 상면 개구의 폭은 반도체 발광소자 칩의 폭보다 큰 반도체 발광소자.(3) The semiconductor light emitting device has a width of the upper opening of the body larger than that of the semiconductor light emitting device chip.
(4) 몸체는 몸체의 하면과 이어진 제1 면, 제1면과 이어진 제2면, 제2 면과 이어진 제3 면을 포함하고, 몸체의 제2면 개구의 폭은 몸체 하면의 개구의 폭보다 크고, 몸체 상면의 개구의 폭보다 작은 반도체 발광소자.(4) The body includes a first surface connected to the lower surface of the body, a second surface connected to the first surface, and a third surface connected to the second surface, the width of the opening of the second surface of the body is the width of the opening of the lower surface of the body A semiconductor light emitting element that is larger and smaller than the width of the opening in the upper surface of the body.
(5) 반사층은 기판과 접촉하는 몸체의 제1 면의 일부분을 제외한 나머지 제1 면, 제2 및 제3 면에 형성되는 반도체 발광소자.(5) A semiconductor light emitting element, wherein the reflective layer is formed on the first, second and third surfaces other than a part of the first surface of the body in contact with the substrate.
(6) 몸체의 제1 면 및 제3 면은 몸체의 하면으로 기울어진 경사각을 갖는 반도체 발광소자.(6) The first and third surfaces of the body have a tilt angle inclined to the bottom surface of the body.
(7) 몸체의 제1 면이 몸체의 하면과 이루는 경사각은 45° 내지 90° 사이인 반도체 발광소자.(7) The semiconductor light emitting device in which the inclination angle of the first surface of the body and the bottom surface of the body is between 45 ° and 90 °.
(8) 몸체의 제2 면의 높이는 반도체 발광소자의 높이보다 높게 형성되는 반도체 발광소자.(8) The height of the second surface of the body is greater than the height of the semiconductor light emitting device.
(9) 반사층은 벽과 다른 물질로 이루어지는 반도체 발광소자.(9) A semiconductor light emitting element in which the reflecting layer is made of a material different from the wall.
(10) 반사층은 제1 도전부 및 제2 도전부와 서로 다른 물질로 이루어지는 반도체 발광소자.(10) The semiconductor light emitting device of which the reflective layer is formed of a material different from that of the first conductive portion and the second conductive portion.
(11) 반도체 발광소자 칩은 제1 전극 및 제2 전극을 포함하며, 제1 전극이 제1 도전부 위에 위치하고 제2 전극이 제2 도전부 위에 위치하여 전기적으로 연결되는 반도체 발광소자.(11) A semiconductor light emitting device chip comprising a first electrode and a second electrode, wherein the first electrode is positioned on the first conductive portion and the second electrode is positioned on the second conductive portion and electrically connected.
(12) 몸체는 측벽을 포함하며, 측벽 및 바닥부에 의해 형성된 캐비티를 포함하는 반도체 발광소자.(12) A semiconductor light emitting element comprising a body including sidewalls and a cavity formed by the sidewalls and the bottom portion.
(13) 반도체 발광소자에 있어서, 제1 도전부, 제2 도전부 및 제1 도전부와 제2 도전부 사이에 위치하는 절연부를 포함하는 기판; 기판 위에 위치하고, 기판과 전기적으로 연결된 반도체 발광소자 칩;으로서, 전자와 전공의 재결합에 의해 자외선을 생성하는 복수의 반도체층과, 복수의 반도체층에 전기적으로 연결된 전극을 가지는 반도체 발광소자 칩; 기판 위에 위치하고, 반도체 발광소자 칩을 둘러싸고 있는 벽; 으로서, 벽의 하면과 이어지는 제1 면과, 제1 면과 이어지는 제2 면을 포함하는 벽; 벽의 하면과 기판 사이에 개재되는 절연성 접착층; 반도체 발광소자 칩을 덮는 봉지재; 기판과 반도체 발광소자 칩 사이에 개재되며, 전극과 기판을 전기적으로 연결하는 본딩 패드; 그리고, 봉지재와 접촉하는 벽의 내측면에 형성된 반사층을 포함하고, 본딩 패드는 제1 도전부 및 제2 도전부와 서로 다른 물질로 이루어지는 반도체 발광소자. 여기서, 반도체 발광소자 칩 및 기판은 봉지재, 유리 또는 석영으로 덮일 수 있다.(13) A semiconductor light emitting device comprising: a substrate comprising a first conductive portion, a second conductive portion, and an insulating portion located between the first conductive portion and the second conductive portion; A semiconductor light emitting device chip disposed on a substrate and electrically connected to a substrate, comprising: a semiconductor light emitting device chip having a plurality of semiconductor layers generating ultraviolet rays by recombination of electrons and holes, and electrodes electrically connected to the plurality of semiconductor layers; A wall disposed on the substrate and surrounding the semiconductor light emitting device chip; A wall, comprising: a wall comprising a bottom surface and a first face, the first face and a second face; An insulating adhesive layer interposed between the lower surface of the wall and the substrate; An encapsulant covering a semiconductor light emitting device chip; A bonding pad interposed between the substrate and the semiconductor light emitting device chip and electrically connecting the electrode and the substrate; And a reflective layer formed on an inner surface of the wall in contact with the encapsulant, wherein the bonding pad is formed of a material different from that of the first conductive portion and the second conductive portion. Here, the semiconductor light emitting device chip and the substrate may be covered with an encapsulant, glass or quartz.
(14) 본딩 패드는 반사층과 서로 다른 물질로 이루어지는 반도체 발광소자.(14) The bonding pad is a semiconductor light emitting element made of a different material from the reflective layer.
(15) 반사층은 제1 도전부 및 제2 도전부와 동일한 물질로 이루어지는 반도체 발광소자.(15) A semiconductor light emitting element in which the reflective layer is made of the same material as the first conductive portion and the second conductive portion.
(16) 본딩 패드는 각각의 제1 도전부 및 제2 도전부와 발광소자 칩의 전극 사이에 위치하는 반도체 발광소자.(16) A bonding pad is a semiconductor light emitting element located between each of the first conductive portion and the second conductive portion and the electrode of the light emitting element chip.
(17) 반도체 발광소자 칩의 전극은 제1 전극 및 제2 전극을 포함하며, 제1 전극이 제1 도전부 위에 위치하고 제2 전극이 제2 도전부 위에 위치하여 전기적으로 연결되는 반도체 발광소자.17. An electrode of a semiconductor light emitting device chip includes a first electrode and a second electrode, wherein the first electrode is positioned on the first conductive portion and the second electrode is positioned on the second conductive portion to be electrically connected.
(18) 본딩 패드는 발광소자 칩과 접촉하는 상면의 반대면인 기판의 하면에 추가로 위치하는 반도체 발광소자.(18) A bonding pad is a semiconductor light emitting element further located on a lower surface of a substrate, which is the opposite surface of the upper surface in contact with the light emitting element chip.
(19) 벽은 벽의 하면과 이어지는 제1 면과, 제1 면과 이어지는 제2 면을 포함하고, 반사층은 벽의 제1 면에는 형성되지 않고 제2 면에만 형성되는 반도체 발광소자.(19) A semiconductor light emitting element, wherein the wall comprises a first surface which is connected to the lower surface of the wall, and a second surface which is connected to the first surface, and the reflective layer is not formed on the first surface of the wall but is formed only on the second surface.
(20) 벽의 제1 면에 형성된 절연층;을 포함하는 반도체 발광소자.And a insulating layer formed on the first surface of the wall.
(21) 벽의 제1 면 및 제2 면은 벽의 하면으로 기울어진 경사각을 갖는 반도체 발광소자.(21) The semiconductor light emitting element having the inclination angle inclined to the bottom surface of the wall.
(22) 반도체 발광소자에 있어서, 제1 도전부, 제2 도전부 및 제1 도전부와 제2 도전부 사이에 위치하는 절연부를 포함하는 기판; 기판 위에 배치되고 기판과 전기적으로 연결된 반도체 발광소자 칩; 그리고, 기판의 측면에 위치하고, 반도체 발광소자 칩 및 기판을 둘러싸고 있는 벽;으로서, 벽의 하면과 이어진 제1 면 및 제1 면과 이어진 제2 면을 포함하는 벽;을 포함하고, 벽의 하면과 기판의 하면은 동일한 선상에 위치하는 반도체 발광소자. 여기서, 반도체 발광소자 칩 및 기판은 봉지재, 유리 또는 석영으로 덮일 수 있다.(22) A semiconductor light emitting device comprising: a substrate comprising a first conductive portion, a second conductive portion, and an insulating portion located between the first conductive portion and the second conductive portion; A semiconductor light emitting device chip disposed on the substrate and electrically connected to the substrate; And a wall disposed on a side surface of the substrate and surrounding the semiconductor light emitting device chip and the substrate, the wall including a first surface connected to a lower surface of the wall and a second surface connected to the first surface. And a lower surface of the substrate are on the same line. Here, the semiconductor light emitting device chip and the substrate may be covered with an encapsulant, glass or quartz.
(23) 벽의 하면과 제1 면이 이루는 경사각이 둔각인 반도체 발광소자.(23) A semiconductor light emitting element having an obtuse angle between the bottom surface of the wall and the first surface.
(24) 벽의 제2 면이 벽의 하면과 평행한 가상의 면과 이루는 경사각이 예각인 반도체 발광소자.(24) A semiconductor light emitting element having an acute inclination angle formed by a second surface of the wall and an imaginary surface parallel to the lower surface of the wall.
(25) 벽의 제1 면과 제2 면이 만나는 지점의 높이는 기판의 높이보다 낮은 반도체 발광소자.(25) A semiconductor light emitting element, wherein the height of the point where the first and second surfaces of the wall meet is lower than the height of the substrate.
(26) 벽의 제1 면과 제2 면에 형성된 반사층을 포함하는 반도체 발광소자.(26) A semiconductor light emitting element comprising reflective layers formed on first and second surfaces of a wall.
(27) 벽의 제2 면에만 형성된 반사층을 포함하는 반도체 발광소자.(27) A semiconductor light emitting element comprising a reflection layer formed only on the second surface of the wall.
(28) 벽의 제1 면에 형성된 절연층;을 포함하는 반도체 발광소자.And an insulating layer formed on the first surface of the wall.
(29) 벽의 제1 면 및 제2 면은 벽의 하면으로 기울어진 경사각을 갖는 반도체 발광소자.(29) A semiconductor light emitting element having inclination angles inclined toward a lower surface of the wall.
(30) 반도체 발광소자 칩은 제1 전극 및 제2 전극을 포함하며, 제1 전극이 제1 도전부 위에 위치하고 제2 전극이 제2 도전부 위에 위치하여 전기적으로 연결되는 반도체 발광소자.30. A semiconductor light emitting device chip comprising a first electrode and a second electrode, wherein the first electrode is positioned on the first conductive portion and the second electrode is positioned on the second conductive portion and is electrically connected.
(31) 반도체 발광소자 칩은 전자와 전공의 재결합에 의해 자외선을 생성하는 복수의 반도체층과, 복수의 반도체층에 전기적으로 연결된 전극을 갖는 반도체 발광소자.(31) A semiconductor light emitting device chip comprising: a semiconductor light emitting device having a plurality of semiconductor layers which generate ultraviolet rays by recombination of electrons and holes, and electrodes electrically connected to the plurality of semiconductor layers.
(32) 반도체 발광소자에 있어서, 바닥부를 포함하는 몸체;로서, 바닥부에 홀이 형성된 몸체; 홀에 의해 노출된 기판 위에 배치되며 기판과 전기적으로 연결된 반도체 발광소자 칩;으로서, 전자와 전공의 재결합에 의해 자외선을 생성하는 복수의 반도체층과, 복수의 반도체층에 전기적으로 연결된 전극을 가지는 반도체 발광소자 칩; 그리고, 몸체의 내측면의 적어도 일부분에 형성된 반사층을 포함하고, 반사층은: 몸체의 내측면에 절연성 물질을 코팅하여 제1 두께를 갖는 코팅층; 그리고 코팅층과 접촉하며 금속성 반사물질이 증착되어 제2 두께를 갖는 금속층;을 포함하는 반도체 발광소자.32. A semiconductor light emitting device comprising: a body including a bottom portion, the body having a hole formed in the bottom portion; A semiconductor light emitting device chip disposed on a substrate exposed by a hole and electrically connected to a substrate, comprising: a semiconductor having a plurality of semiconductor layers generating ultraviolet rays by recombination of electrons and holes, and electrodes electrically connected to the plurality of semiconductor layers Light emitting device chip; And a reflective layer formed on at least a portion of the inner side of the body, the reflective layer comprising: a coating layer having a first thickness by coating an insulating material on the inner side of the body; And a metal layer in contact with the coating layer and having a second thickness by depositing a metallic reflective material.
(33) 코팅층의 제1 두께는 금속층의 제2 두께보다 두꺼운 반도체 발광소자.(33) A semiconductor light emitting element, wherein the first thickness of the coating layer is thicker than the second thickness of the metal layer.
(34) 코팅층의 제1 두께는 약 10㎛ 이하인 반도체 발광소자.(34) A semiconductor light emitting element having a first thickness of about 10 μm or less.
(35) 도금층과 접촉하는 코팅층의 제1 면은 비평탄면(uneven surface)이고, 금속층과 접촉하는 코팅층의 제2면은 평탄면(flat surface)인 반도체 발광소자.(35) A semiconductor light emitting element in which the first surface of the coating layer in contact with the plating layer is an uneven surface and the second surface of the coating layer in contact with the metal layer is a flat surface.
(36) 코팅층의 제2면과 접촉하는 금속층은 전체적으로 평탄면을 갖는 반도체 발광소자.(36) A semiconductor light emitting device in which the metal layer in contact with the second surface of the coating layer has a flat surface as a whole.
(37) 코팅층은 몸체와 동일한 물질로 이루어지는 반도체 발광소자.(37) A semiconductor light emitting device, wherein the coating layer is made of the same material as the body.
(38) 코팅층은 금속층과 다른 물질로 이루어지는 반도체 발광소자.(38) A semiconductor light emitting element in which the coating layer is formed of a material different from the metal layer.
(39) 몸체는 몸체의 하면과 이어진 제1 면, 제1 면과 이어진 제2면, 제2면과 이어진 제3면을 포함하고, 몸체의 제2면 개구의 폭은 몸체 하면의 개구의 폭보다 크고, 몸체 상면의 개구의 폭보다 작은 반도체 발광소자.(39) The body includes a first surface connected to the lower surface of the body, a second surface connected to the first surface, and a third surface connected to the second surface, wherein the width of the opening of the second surface of the body is the width of the opening of the lower surface of the body. A semiconductor light emitting element that is larger and smaller than the width of the opening in the upper surface of the body.
(40) 몸체의 제1 면과 제3 면은 반도체 발광소자 칩을 수용하는 개구의 내측면으로 기울어진 경사면을 갖는 반도체 발광소자.(40) A semiconductor light emitting element having inclined surfaces inclined toward an inner side of an opening for accommodating a semiconductor light emitting element chip.
(41) 반사층은 몸체의 제1 면 내지 제3 면 중 적어도 하나의 면에 형성되는 반도체 발광소자.(41) A semiconductor light emitting element, wherein the reflective layer is formed on at least one of the first to third surfaces of the body.
(42) 반도체 발광소자에 있어서, 복수개의 홀이 장방향으로 형성된 바닥부를 포함하는 몸체; 몸체의 양쪽 측면에 형성된 바닥부의 홀 각각에 수용되는 반도체 발광소자 칩;으로서, 전자와 정공의 재결합에 의해 빛을 생성하는 활성층을 포함하는 복수의 반도체층과 복수의 반도체층에 전기적으로 연결된 전극을 구비하는 반도체 발광소자 칩; 반도체 발광소자 칩 사이에 위치하는 바닥부의 홀에 형성되는 보강재; 그리고 반도체 발광소자 칩 및 보강재를 고정시키기 위해 몸체 내부에 채워지는 봉지재;를 포함하는 반도체 발광소자.(42) A semiconductor light emitting device comprising: a body including a bottom portion having a plurality of holes formed in a longitudinal direction; A semiconductor light emitting device chip accommodated in each of the bottom hole formed on both sides of the body; A plurality of semiconductor layers including an active layer for generating light by recombination of electrons and holes and electrodes electrically connected to the plurality of semiconductor layers A semiconductor light emitting device chip; A reinforcing member formed in a hole in the bottom portion positioned between the semiconductor light emitting device chips; And an encapsulant filled in the body to fix the semiconductor light emitting device chip and the reinforcing material.
(43) 보강재가 형성된 홀 내부에 채워지는 반사물질;을 포함하는 반도체 발광소자.43. A semiconductor light emitting device comprising a; reflective material filled in a hole in which a reinforcing material is formed.
(44) 보강재와 봉지재 사이에 위치하는 금속 반사층;을 포함하는 반도체 발광소자.(44) a semiconductor light emitting device comprising a; metal reflective layer positioned between the reinforcing material and the encapsulating material.
(45) 보강재의 높이는 바닥부의 높이보다 작은 반도체 발광소자.(45) The height of the reinforcing material is a semiconductor light emitting element smaller than the height of the bottom portion.
(46) 반도체 발광소자 칩이 형성된 홀의 폭은 보강재가 형성된 홀의 폭보다 작은 반도체 발광소자.(46) A semiconductor light emitting element in which the width of the hole in which the semiconductor light emitting chip is formed is smaller than the width of the hole in which the reinforcing material is formed.
(47) 반도체 발광소자 칩 사이에 위치하는 바닥부는 서로 이격된 복수개의 홀을 포함하고, 보강재는 서로 이격된 복수개의 홀 내에 각각 형성되는 반도체 발광소자.(47) A semiconductor light emitting device comprising: bottom portions disposed between semiconductor light emitting devices chips, and a plurality of holes spaced apart from each other, and reinforcing materials are respectively formed in the plurality of holes spaced apart from each other.
(48) 반도체 발광소자 칩 사이에 위치하는 바닥부는 서로 이격된 복수개의 홀을 포함하고, 서로 이격된 복수개의 홀 중 적어도 하나의 홀 내에 형성되는 보호소자인 기능성 소자;를 포함하는 반도체 발광소자.(48) A semiconductor light emitting device comprising: a functional element that is a protective device formed in at least one hole of a plurality of holes spaced apart from each other, the bottom portion located between the semiconductor light emitting device chip.
(49) 보강재는 기능성 소자가 형성되지 않는 나머지 홀에 형성되는 반도체 발광소자.(49) The reinforcing material is a semiconductor light emitting element formed in the remaining hole in which the functional element is not formed.
(50) 보강재의 하면은 바닥부의 하면 방향으로 노출되는 반도체 발광소자.50. A semiconductor light emitting device in which the bottom surface of the reinforcing material is exposed in the bottom direction of the bottom portion.
(51) 보강재의 하면은 바닥부의 하면 방향으로 노출된 반도체 발광소자 칩의 전극과 떨어져 위치하는 반도체 발광소자.(51) A semiconductor light emitting element, wherein the bottom surface of the reinforcing material is located away from the electrodes of the semiconductor light emitting element chip exposed in the bottom direction of the bottom portion.
(52) 반도체 발광소자 칩을 수용하는 바닥부의 내측면은 홀의 상측 개구의 폭이 홀의 하측 개구의 폭보다 크도록 경사진 반도체 발광소자.(52) A semiconductor light emitting element inclined so that the width of the upper opening of the hole is larger than the width of the lower opening of the hole.
(53) 반도체 발광소자 칩을 수용하는 바닥부의 내측면은 반사층;을 포함하는 반도체 발광소자.(53) A semiconductor light emitting device comprising a reflective layer; an inner surface of a bottom portion accommodating a semiconductor light emitting device chip.
(54) 몸체는 측벽;을 포함하고, 측벽은 적어도 1개 이상의 개방 구간을 포함하고, 적어도 1개 이상의 개방 구간은 서로 마주보고 위치하는 반도체 발광소자.(54) a body comprising a sidewall; wherein the sidewall includes at least one or more open sections, and at least one or more open sections are positioned facing each other.
(55) 몸체의 상측 개구의 폭은 반도체 발광소자 칩의 폭보다 큰 반도체 발광소자.(55) A semiconductor light emitting element in which the width of the upper opening of the body is larger than the width of the semiconductor light emitting element chip.
(56) 반도체 발광소자의 제조방법에 있어서, 서로 상이한 폭을 갖는 복수개의 홀이 장방향으로 형성된 바닥부를 구비하는 몸체를 베이스에 배치하는 단계; 장방향으로 양쪽 측면에 형성된 바닥부의 제1 홀 각각에 반도체 발광소자 칩을 배치하는 단계; 반도체 발광소자 칩이 배치되지 않는 바닥부의 제2 홀에 보강재를 배치하는 단계; 그리고 몸체 내부에 봉지재를 투입하는 단계;를 포함하는 반도체 발광소자의 제조방법.(56) A method of manufacturing a semiconductor light emitting device, comprising the steps of: arranging a body having a bottom portion in which a plurality of holes having different widths are formed in a longitudinal direction on a base; Disposing a semiconductor light emitting device chip in each of the first holes of the bottom part formed at both sides in the longitudinal direction; Disposing a reinforcing material in a second hole of a bottom portion where the semiconductor light emitting device chip is not disposed; And inserting an encapsulant into the body.
(57) 제2 홀 내부에 반사물질을 투입하는 단계;를 포함하는 반도체 발광소자의 제조방법.(57) a method of manufacturing a semiconductor light emitting device comprising the step of injecting a reflective material into the second hole.
(58) 보강재를 금속 반사층으로 코팅하는 단계;를 더 포함하는 반도체 발광소자의 제조방법.(58) coating the reinforcing material with a metal reflective layer; manufacturing method of a semiconductor light emitting device further comprising.
본 개시에 따르면 광 추출 효율을 향상시키기 위해 반도체 발광소자 칩과 리드 프레임간의 전기적 접촉력을 유지하면서 반사율을 증가시키는 반도체 발광소자를 얻을 수 있다.According to the present disclosure, it is possible to obtain a semiconductor light emitting device that increases reflectance while maintaining electrical contact force between the semiconductor light emitting device chip and the lead frame in order to improve light extraction efficiency.
본 개시에 따르면 반도체 기울기를 갖는 벽을 반도체 발광소자 칩의 주변에 배치함으로써, 반사율을 증가시키면서 기판과 반도체 발광소자 칩의 전기적 접촉을 유지할 수 있는 반도체 발광소자를 얻을 수 있다.According to the present disclosure, by arranging a wall having a semiconductor slope around the semiconductor light emitting device chip, a semiconductor light emitting device capable of maintaining electrical contact between the substrate and the semiconductor light emitting device chip while increasing the reflectance can be obtained.
본 개시에 따르면 반사층이 평탄면으로 형성됨으로써, 반사율이 증가하여 광 추출 효율이 향상될 수 있다.According to the present disclosure, since the reflective layer is formed as a flat surface, the reflectance may be increased to improve light extraction efficiency.
또한 반사층이 얇게 형성됨으로써, 벗겨지거나 또는 접합력 저하가 억제 내지 방지될 수 있다.In addition, since the reflective layer is formed thin, peeling or a decrease in bonding strength can be suppressed or prevented.
본 개시에 따르면 장방향으로 형성된 반도체 발광소자에 있어서, 반도체 발광소자 칩 사이에 보강재를 형성함으로써, 외부 기판과의 접합력을 유지하면서 반도체 발광소자의 휨 및 휨에 따른 깨짐 현상을 방지할 수 있다.According to the present disclosure, in the semiconductor light emitting device formed in the long direction, by forming a reinforcing material between the semiconductor light emitting device chips, it is possible to prevent the phenomenon caused by the bending and the bending of the semiconductor light emitting device while maintaining the bonding force with the external substrate.

Claims (12)

  1. 반도체 발광소자에 있어서,In a semiconductor light emitting device,
    제1 도전부, 제2 도전부 및 제1 도전부와 제2 도전부 사이에 위치하는 절연부를 포함하는 기판;A substrate including a first conductive portion, a second conductive portion, and an insulating portion positioned between the first conductive portion and the second conductive portion;
    기판 위에 위치하며 바닥부를 포함하는 몸체;로서, 바닥부에 홀이 형성된 몸체;A body disposed on the substrate and including a bottom portion, the body having a hole formed in the bottom portion;
    홀에 의해 노출된 기판 위에 배치되며 기판과 전기적으로 연결된 반도체 발광소자 칩;으로서, 전자와 전공의 재결합에 의해 자외선을 생성하는 복수의 반도체층과, 복수의 반도체층에 전기적으로 연결된 전극을 가지는 반도체 발광소자 칩; 그리고,A semiconductor light emitting device chip disposed on a substrate exposed by a hole and electrically connected to a substrate, comprising: a semiconductor having a plurality of semiconductor layers generating ultraviolet rays by recombination of electrons and holes, and electrodes electrically connected to the plurality of semiconductor layers Light emitting device chip; And,
    몸체의 내측면의 적어도 일부분에 형성된 반사층을 포함하는 반도체 발광소자.A semiconductor light emitting device comprising a reflective layer formed on at least a portion of the inner surface of the body.
  2. 제1항에 있어서,The method of claim 1,
    몸체의 하면 개구의 폭은 몸체의 상면 개구의 폭보다 작은 반도체 발광소자.The width of the lower surface opening of the body is smaller than the width of the upper opening of the body.
  3. 제1항에 있어서,The method of claim 1,
    몸체의 상면 개구의 폭은 반도체 발광소자 칩의 폭보다 큰 반도체 발광소자.A semiconductor light emitting device having a width of an upper surface opening of a body larger than a width of a semiconductor light emitting device chip.
  4. 제1항에 있어서,The method of claim 1,
    몸체는 몸체의 하면과 이어진 제1 면, 제1면과 이어진 제2면, 제2 면과 이어진 제3 면을 포함하고,The body includes a first surface connected to the bottom surface of the body, a second surface connected to the first surface, a third surface connected to the second surface,
    몸체의 제2면 개구의 폭은 몸체 하면의 개구의 폭보다 크고, 몸체 상면의 개구의 폭보다 작은 반도체 발광소자.The width of the opening of the second surface of the body is greater than the width of the opening of the lower surface of the body, the semiconductor light emitting device smaller than the width of the opening of the upper surface of the body.
  5. 제4항에 있어서,The method of claim 4, wherein
    반사층은 기판과 접촉하는 몸체의 제1 면의 일부분을 제외한 나머지 제1 면, 제2 및 제3 면에 형성되는 반도체 발광소자.The reflective layer is formed on the first, second and third surfaces of the body except for a portion of the first surface of the body in contact with the substrate.
  6. 제4항에 있어서,The method of claim 4, wherein
    몸체의 제1 면 및 제3 면은 몸체의 하면으로 기울어진 경사각을 갖는 반도체 발광소자.The first surface and the third surface of the body having a tilt angle inclined to the lower surface of the body.
  7. 제6항에 있어서,The method of claim 6,
    몸체의 제1 면이 몸체의 하면과 이루는 경사각은 45° 내지 90° 사이인 반도체 발광소자.The inclination angle of the first surface of the body and the lower surface of the body is between 45 ° to 90 ° semiconductor light emitting device.
  8. 제4항에 있어서,The method of claim 4, wherein
    몸체의 제2 면의 높이는 반도체 발광소자의 높이보다 높게 형성되는 반도체 발광소자.The height of the second surface of the body is a semiconductor light emitting device formed higher than the height of the semiconductor light emitting device.
  9. 제1항에 있어서,The method of claim 1,
    반사층은 몸체와 다른 물질로 이루어지는 반도체 발광소자.The reflective layer is a semiconductor light emitting device made of a material different from the body.
  10. 제1항에 있어서,The method of claim 1,
    반사층은 제1 도전부 및 제2 도전부와 서로 다른 물질로 이루어지는 반도체 발광소자.The reflective layer is a semiconductor light emitting device made of a different material from the first conductive portion and the second conductive portion.
  11. 제1항에 있어서,The method of claim 1,
    반도체 발광소자 칩은 제1 전극 및 제2 전극을 포함하며,The semiconductor light emitting device chip includes a first electrode and a second electrode,
    제1 전극이 제1 도전부 위에 위치하고 제2 전극이 제2 도전부 위에 위치하여 전기적으로 연결되는 반도체 발광소자.And a first electrode disposed on the first conductive portion and a second electrode positioned on the second conductive portion to be electrically connected.
  12. 제1항에 있어서,The method of claim 1,
    몸체는 측벽을 포함하며, 측벽 및 바닥부에 의해 형성된 캐비티를 포함하는 반도체 발광소자.The body includes a side wall, the semiconductor light emitting device comprising a cavity formed by the side wall and the bottom.
PCT/KR2017/011607 2016-10-21 2017-10-19 Semiconductor light emitting device WO2018074866A2 (en)

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KR10-2016-0137624 2016-10-21
KR10-2016-0137618 2016-10-21
KR1020160137618A KR20180044039A (en) 2016-10-21 2016-10-21 Semiconductor light emitting device
KR1020160137620A KR102017734B1 (en) 2016-10-21 2016-10-21 Semiconductor light emitting device
KR10-2016-0137620 2016-10-21
KR1020160137624A KR20180044470A (en) 2016-10-21 2016-10-21 Semiconductor light emitting device
KR1020160146893A KR101877236B1 (en) 2016-11-04 2016-11-04 Semiconductor light emitting device and method of manufacturing the same
KR10-2016-0146893 2016-11-04
KR10-2016-0148754 2016-11-09
KR1020160148754A KR101863545B1 (en) 2016-11-09 2016-11-09 Semiconductor light emitting device

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TWI720806B (en) * 2020-02-03 2021-03-01 友達光電股份有限公司 Light-emitting diode display

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JP4353043B2 (en) * 2004-09-27 2009-10-28 パナソニック電工株式会社 Semiconductor light emitting device
KR20080041818A (en) * 2006-11-08 2008-05-14 엘지전자 주식회사 Lens and led package having the same
KR20090032775A (en) * 2007-09-28 2009-04-01 삼성전기주식회사 Light emitting diode package
KR101526567B1 (en) * 2008-05-07 2015-06-10 엘지이노텍 주식회사 Lighting emitting diode package
KR101064090B1 (en) * 2009-11-17 2011-09-08 엘지이노텍 주식회사 The light-

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* Cited by examiner, † Cited by third party
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TWI720806B (en) * 2020-02-03 2021-03-01 友達光電股份有限公司 Light-emitting diode display

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