WO2018068263A1 - 图像编码方法、装置以及图像处理设备 - Google Patents

图像编码方法、装置以及图像处理设备 Download PDF

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WO2018068263A1
WO2018068263A1 PCT/CN2016/102001 CN2016102001W WO2018068263A1 WO 2018068263 A1 WO2018068263 A1 WO 2018068263A1 CN 2016102001 W CN2016102001 W CN 2016102001W WO 2018068263 A1 WO2018068263 A1 WO 2018068263A1
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unit
coding unit
coded
current
encoding
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PCT/CN2016/102001
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English (en)
French (fr)
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付轩
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富士通株式会社
付轩
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/102—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or selection affected or controlled by the adaptive coding
    • H04N19/117—Filters, e.g. for pre-processing or post-processing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/169—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding
    • H04N19/17—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object
    • H04N19/176—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object the region being a block, e.g. a macroblock
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/70—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by syntax aspects related to video coding, e.g. related to compression standards

Definitions

  • the present invention relates to the field of graphic image technology, and in particular, to an image encoding method, apparatus, and image processing apparatus.
  • intra coding also referred to as intra prediction coding
  • the reconstructed neighboring pixels are used to predict the current block to be encoded.
  • Sample Adaptive Offset is a new tool introduced in the latest generation of video coding and decoding standard HEVC.
  • Each coding unit (CU, Coding Unit) (for example, LCU, Largest Coding Unit, etc.)
  • T Transform
  • Q quantization
  • IQ inverse quantization
  • I Inverse Transform
  • MODE one of the known modes
  • Program the code stream (also known as the bit stream).
  • SAO can provide gains of up to 2-6%.
  • Embodiments of the present invention provide an image encoding method, apparatus, and image processing apparatus, which further improve SAO
  • the compression efficiency of the scheme saves the bit cost in the bit stream.
  • an image encoding method which performs encoding using a sampling adaptive deviation (SAO) method, the image encoding method comprising:
  • indication information indicating that the current coding unit and the second coded unit are jointly coded is encoded in the bitstream.
  • an image encoding apparatus that performs encoding using a sampling adaptive deviation method, the image encoding apparatus comprising:
  • a first merge determining unit that determines whether the current coding unit is combined with the first coded unit
  • a second merge determining unit if the current coding unit is not combined with the first coded unit, determining whether the current coding unit is the second and the second according to an edge deviation mode of the second coded unit Encoded unit merge code
  • bitstream encoding unit that, in the case of determining that the current coding unit and the second coded unit are jointly coded, coding in the bitstream to indicate that the current coding unit and the second coded unit are combined and coded Instructions.
  • an image processing apparatus wherein the image processing apparatus comprises the image encoding apparatus as described above.
  • a computer readable program wherein when the program is executed in an image encoding device or an image processing device, the program causes the image encoding device or the image processing device to perform the above The image encoding method described.
  • a storage medium storing a computer readable program, wherein the computer readable program causes an image encoding device or an image processing device to perform an image encoding method as described above.
  • An advantageous effect of the embodiment of the present invention is: if the current coding unit is not combined with the left coding unit, determining whether to encode the current coding unit and the upper left coding unit in the bitstream according to the edge deviation mode of the upper left coding unit. Instructions. Thereby, the compression efficiency of the SAO scheme can be further improved, and the bit number overhead in the bit stream can be saved.
  • Figure 1 is a schematic diagram of an EO mode
  • FIG. 2 is a schematic diagram of an image encoding method according to Embodiment 1 of the present invention.
  • FIG. 3 is another schematic diagram of an image encoding method according to Embodiment 1 of the present invention.
  • FIG. 4 is a schematic diagram of an image coding apparatus according to Embodiment 2 of the present invention.
  • FIG. 5 is a schematic diagram of an image processing apparatus according to Embodiment 3 of the present invention.
  • SAO's MODE can be divided into edge deviation (EO, Edge Offset) and band deviation (BO, Band Offset), in which EO can be further divided into 4 degrees: 0 degrees, 45 degrees, 90 degrees, 135 degrees.
  • Figure 1 is a schematic representation of the EO mode The figure shows the case of several gradient directions; as shown in Fig. 1, the cases of 0 degrees, 90 degrees, 135 degrees, and 45 degrees are sequentially shown from left to right.
  • HEVC In the process of encoding, in order to further improve the compression efficiency, HEVC introduced a merge mode (Merge MODE). That is, in the case where the current coding unit (taking the LCU as an example) and the MODE and Offset of the left LCU are the same, the sao_merge_left_flag is programmed in the code stream; in the case where the current LCU and the upper LCU have the same MODE and Offset, the code stream The sao_merge_up_flag is programmed. This saves bit overhead.
  • Merge MODE merge mode
  • Embodiments of the present invention provide an image encoding method that performs encoding using a sampling adaptive offset (SAO) method.
  • FIG. 2 is a schematic diagram of an image encoding method according to an embodiment of the present invention. As shown in FIG. 2, the image encoding method includes:
  • Step 201 Determine whether the current coding unit is combined with the first coded unit
  • Step 202 In a case where the current coding unit is not combined with the first coded unit, the root Determining, according to an edge deviation mode of the second coded unit, whether the current coding unit is combined with the second coded unit;
  • Step 203 In a case where it is determined that the current coding unit and the second coded unit are jointly coded, the indication information indicating that the current coding unit and the second coded unit are jointly coded are programmed in the bitstream.
  • the coding unit may be, for example, an LCU or the like, but the present invention is not limited thereto, and the size of the coding unit may be determined according to actual conditions.
  • the first coded unit may be a left coding unit of the current coding unit, the second coded unit is an upper left coding unit of the current coding unit; and/or, the first coded unit may be an upper coding unit of the current coding unit, and second The coded unit is the upper right coding unit of the current coding unit.
  • determining whether the current coding unit is combined with the first coded unit in step 201 may include: determining whether a mode of the current coding unit is the same as a mode of the first coded unit; and determining a current coding unit. Whether the deviation is the same as the deviation of the first coded unit. In the case where the mode and the deviation are both the same, it may be determined that the current coding unit is combined with the first coded unit; however, the present invention is not limited thereto.
  • step 202 it is determined in step 202 whether the current coding unit is combined with the second coded unit according to the edge deviation mode of the second coded unit, which may include: the EO mode of the second coded unit is 135. In the case of degrees or 45 degrees, it is determined that the current coding unit and the second coded unit are combined and encoded; however, the present invention is not limited thereto.
  • the edge deviation mode of the second coded unit which may include: the EO mode of the second coded unit is 135. In the case of degrees or 45 degrees, it is determined that the current coding unit and the second coded unit are combined and encoded; however, the present invention is not limited thereto.
  • the present invention will be further described by taking the first coded unit as the left coding unit or the upper coding unit, and the second coded unit as the upper left coding unit or the upper right coding unit as an example. It should be noted that the present invention is not limited to the upper left coding unit or the upper right coding unit, and is not limited to 135 degrees or 45 degrees; for example, in the case where the definition of the EO mode is changed, it may be another coded unit, or may be Other EO modes.
  • it may be determined whether the current coding unit is combined with the upper left coding unit according to an edge deviation mode of the upper left coding unit; and further, the current coding may be determined according to an edge deviation mode of the upper right coding unit. Whether the unit is combined with the upper right coding unit.
  • FIG. 3 is another schematic diagram of an image encoding method according to an embodiment of the present invention. As shown in FIG. 3, the image encoding method includes:
  • Step 301 it is determined whether the mode and the deviation of the current coding unit are the same as the mode and the deviation of the left coding unit; in the same case, step 302 is performed, and if not, step 304 may be performed;
  • the specific content about the mode and the deviation may refer to related technologies, and details are not described herein again.
  • Step 302 determining that the current coding unit and the left coding unit are combined and coded
  • step 303 sao_merge_left_flag is programmed in the bitstream.
  • step 304 it is determined whether the EO mode of the upper left coding unit is 135 degrees; if it is 135 degrees, step 305 is performed; otherwise, step 307 is performed.
  • Step 305 determining that the current coding unit and the upper left coding unit are combined and coded
  • step 306 sao_merge_up_left_flag is programmed in the bitstream.
  • Step 307 it is determined whether the mode and the deviation of the current coding unit are the same as the mode and the deviation of the upper coding unit; in the same case, step 308 is performed, and if not, step 310 may be performed.
  • Step 308 determining that the current coding unit and the upper coding unit are combined and coded
  • step 309 sao_merge_up_flag is programmed in the bitstream.
  • step 310 it is determined whether the EO mode of the upper right coding unit is 45 degrees; if it is 45 degrees, step 311 is performed; otherwise, step 313 is performed.
  • Step 311 Determine that the current coding unit and the upper right coding unit are combined and coded.
  • step 312 sao_merge_up_right_flag is programmed in the bitstream.
  • step 313 the mode and deviation of the current coding unit are programmed in the bitstream.
  • some specific determination rules may be set to determine whether to perform merge coding. Because the mode and the deviation need to occupy the number of bits, at some time, although the parameters of the merged code (or merge mode) are not optimal, but the difference from the optimal mode is small, the comprehensive consideration of the merge mode is saved. Code rate, it is still possible to choose the merge mode.
  • a smaller threshold can be set.
  • the merge mode can be selected.
  • the present invention is not limited thereto, and how to implement it may be determined according to actual conditions.
  • FIG. 3 is only illustrative of an embodiment of the invention, but the invention is not limited thereto.
  • the order of execution between the various steps can be appropriately adjusted (for example, step 304 and step 307), and other steps can be added or some of the steps can be reduced.
  • steps 304 and step 307 can be appropriately adjusted, and other steps can be added or some of the steps can be reduced.
  • Those skilled in the art can appropriately modify the above based on the above contents, and are not limited to the description of the above drawings.
  • Table 2 only schematically shows the SAO syntax related to the embodiment of the present invention, but the present invention is not limited thereto.
  • the position of the above-mentioned added portion for example, the coding unit on the left and the upper side may be judged first, and then the coding units on the upper left and the upper right may be judged, etc.
  • the embodiment of the present invention may be appropriately modified according to the above.
  • the above has only described various steps or processes related to the present invention, but the present invention is not limited thereto.
  • the image encoding method may also include other steps or processes, and the specific content of these steps or processes may refer to the prior art.
  • Embodiments of the present invention provide an image encoding apparatus that performs encoding using an SAO method.
  • the embodiment of the present invention corresponds to the image encoding method of Embodiment 1, and the same content is not described again.
  • the image encoding apparatus 400 includes:
  • a first merge determining unit 401 which determines whether the current coding unit is combined with the first coded unit
  • a second merge determining unit 402 if the current coding unit is not combined with the first coded unit, determining whether the current coding unit is different from the first coding unit according to an edge deviation mode of the second coded unit Two coded unit merge code;
  • bitstream encoding section 403 in the case of determining that the current coding unit and the second coded unit are jointly coded, coding in the bitstream to indicate that the current coding unit and the second coded unit are jointly coded Instructions.
  • the first coded unit may be a left coding unit of the current coding unit
  • the second coded unit is an upper left coding unit of the current coding unit
  • the first merge determining unit 401 may be configured to: determine whether a mode of the current coding unit is the same as a mode of the left coding unit; and determine whether a deviation of the current coding unit is the same as a deviation of the left coding unit. .
  • the second merge determining unit 402 may be configured to: when the edge deviation mode of the upper left coding unit is 135 degrees, determine that the current coding unit and the upper left coding unit are combined and coded.
  • the bit stream encoding unit 403 may be further configured to: encode a sao_merge_up_left_flag in the bitstream in a case where it is determined that the current coding unit and the upper left coding unit are combined and coded.
  • the first coded unit may be an upper coding unit of the current coding unit
  • the second coded unit is an upper right coding unit of the current coding unit.
  • the first merge determining unit 401 may be configured to: determine whether a mode of the current coding unit is the same as a mode of the upper coding unit; and determine whether a deviation of the current coding unit is the same as a deviation of the upper coding unit. .
  • the second merge determining unit 402 may be configured to: when the edge deviation mode of the upper right coding unit is 45 degrees, determine that the current coding unit and the upper right coding unit are combined and coded.
  • the bitstream encoding unit 403 is further configured to: determine that the current coding unit is combined with the upper right coding unit In the case of encoding, sao_merge_up_right_flag is programmed in the bitstream.
  • the image encoding device may also include other components or modules, and for the specific content of these components or modules, reference may be made to the prior art.
  • An embodiment of the present invention provides an image processing device, where the image processing device includes an encoding end and/or a decoding end.
  • the encoding end comprises the image encoding device as described in Embodiment 2; the decoder can decode the image or video accordingly.
  • FIG. 5 is a schematic diagram of an image processing apparatus according to an embodiment of the present invention.
  • the image processing apparatus 500 may include a central processing unit (CPU) 100 and a memory 110; the memory 110 is coupled to the central processing unit 100.
  • the memory 110 can store various data; in addition, a program for information processing is stored, and the program is executed under the control of the central processing unit 100.
  • the functionality of image encoding device 400 may be integrated into central processor 100.
  • the central processing unit 100 can be configured to implement the image encoding method as described in Embodiment 1.
  • the image encoding device 400 can be configured separately from the central processing unit 100.
  • the image encoding device 400 can be configured as a chip connected to the central processing unit 100, and the image encoding device can be implemented by the control of the central processing unit 100. The function of the 400.
  • the central processing unit 100 may be configured to perform control of determining whether the current coding unit is combined with the first coded unit; in the case where the current coding unit is not combined with the first coded unit, Determining, according to an edge deviation mode of the second coded unit, whether the current coding unit is combined with the second coded unit; in the case of determining that the current coding unit and the second coded unit are jointly coded, The indication information indicating that the current coding unit and the second coded unit are jointly coded is programmed in the bitstream.
  • the image processing apparatus 500 may further include an input/output (I/O) device 120. And the display 130 and the like; wherein the functions of the above components are similar to those of the prior art, and are not described herein again. It is to be noted that the image processing apparatus 500 does not necessarily have to include all of the components shown in FIG. 5; in addition, the image processing apparatus 500 may further include components not shown in FIG. 5, and reference may be made to the related art.
  • I/O input/output
  • An embodiment of the present invention provides a computer readable program, wherein when the program is executed in an image encoding device or an image processing device, the program causes the image encoding device or the image processing device to perform the method as described in Embodiment 1. Image coding method.
  • An embodiment of the present invention provides a storage medium storing a computer readable program, wherein the computer readable program causes an image encoding device or an image processing device to perform the image encoding method as described in Embodiment 1.
  • the above apparatus and method of the present invention may be implemented by hardware or by hardware in combination with software.
  • the present invention relates to a computer readable program that, when executed by a logic component, enables the logic component to implement the apparatus or components described above, or to cause the logic component to implement the various methods described above Or steps.
  • the present invention also relates to a storage medium for storing the above program, such as a hard disk, a magnetic disk, an optical disk, a DVD, a flash memory, or the like.
  • the method/apparatus described in connection with the embodiments of the invention may be embodied directly in hardware, a software module executed by a processor, or a combination of both.
  • one or more of the functional block diagrams shown in FIG. 4 and/or one or more combinations of functional block diagrams may be
  • the respective software modules corresponding to the flow of the computer program may also correspond to the respective hardware modules.
  • These software modules may correspond to the respective steps shown in FIG. 2, respectively.
  • These hardware modules can be implemented, for example, by curing these software modules using a Field Programmable Gate Array (FPGA).
  • FPGA Field Programmable Gate Array
  • the software module can reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art.
  • a storage medium can be coupled to the processor to enable the processor to read information from, and write information to, the storage medium; or the storage medium can be an integral part of the processor.
  • the processor and the storage medium can be located in an ASIC.
  • the software module can be stored in the memory of the mobile terminal or in a memory card that can be inserted into the mobile terminal.
  • the software module can be stored in the MEGA-SIM card or a large-capacity flash memory device.
  • One or more of the functional blocks described in the figures and/or one or more combinations of functional blocks may be implemented as a general purpose processor, digital signal processor (DSP) for performing the functions described herein.
  • DSP digital signal processor
  • ASIC integrated circuit
  • FPGA field programmable gate array
  • One or more of the functional blocks described with respect to the figures and/or one or more combinations of functional blocks may also be implemented as a combination of computing devices, eg, a combination of a DSP and a microprocessor, multiple microprocessors One or more microprocessors in conjunction with DSP communication or any other such configuration.

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Abstract

一种图像编码方法、装置以及图像处理设备。所述图像编码方法包括：确定当前编码单元是否与第一已编码单元合并编码；在当前编码单元不与第一已编码单元合并编码的情况下，根据第二已编码单元的边缘偏差模式确定当前编码单元是否与第二已编码单元合并编码；在确定当前编码单元与第二已编码单元合并编码的情况下，在比特流中编入指示当前编码单元与第二已编码单元合并编码的指示信息。由此，可以进一步提高SAO方案的压缩效率，并节省比特流中的比特数开销。

Description

图像编码方法、装置以及图像处理设备 技术领域
本发明涉及图形图像技术领域，特别涉及一种图像编码方法、装置以及图像处理设备。
背景技术
在视频编码/解码(也可称为图像编码/解码)标准(例如MPEG 2，H.264/AVC，H.265/HEVC)中，帧内编码(Intra coding，也可称为帧内预测编码)使用重建的相邻像素来预测当前的待编码块。
采样自适应偏差(SAO，Sample Adaptive Offset)是最新一代的视频编解码标准HEVC中引入的新工具，每个编码单元(CU，Coding Unit)(例如为最大编码单元(LCU，Largest Coding Unit)等等)经过变换(T，Transform)、量化(Q，Quantilization)、反量化(IQ，Inverse Quantilization)、反变换(IT，Inverse Transform)等后可以获得重建后的重建图像。编码端使用SAO，可以根据重建图像和原始图像之间的差，选取已知的几种模式(MODE)中的一种，并计算出该MODE下对应的偏差(Offset)，将这些模式和偏差编入码流(也可称为比特流)。
在解码端解码得到相应的MODE和Offset之后，可以根据该MODE对应的方法，在解码重建图像的各个像素上，相应地加上各自对应的Offset，使得重建图像和原始图像之间的差变小。
这样的方法虽然增加了码流中的参数信息，但是提高了之后图像预测的准确度，从而达到减少编码残差的目的。根据HEVC公布的信息，SAO可以提供高达2-6％的增益(gain)。
应该注意，上面对技术背景的介绍只是为了方便对本发明的技术方案进行清楚、完整的说明，并方便本领域技术人员的理解而阐述的。不能仅仅因为这些方案在本发明的背景技术部分进行了阐述而认为上述技术方案为本领域技术人员所公知。
发明内容
本发明实施例提供一种图像编码方法、装置以及图像处理设备，进一步提高SAO 方案的压缩效率，节省比特流中的比特数开销。
根据本发明实施例的第一个方面，提供一种图像编码方法，使用采样自适应偏差(SAO)方式进行编码，所述图像编码方法包括：
确定当前编码单元是否与第一已编码单元合并编码；
在所述当前编码单元不与所述第一已编码单元合并编码的情况下，根据第二已编码单元的边缘偏差模式确定所述当前编码单元是否与所述第二已编码单元合并编码；
在确定所述当前编码单元与所述第二已编码单元合并编码的情况下，在比特流中编入指示所述当前编码单元与所述第二已编码单元合并编码的指示信息。
根据本发明实施例的第二个方面，提供一种图像编码装置，使用采样自适应偏差方式进行编码，所述图像编码装置包括：
第一合并确定部，其确定当前编码单元是否与第一已编码单元合并编码；
第二合并确定部，其在所述当前编码单元不与所述第一已编码单元合并编码的情况下，根据第二已编码单元的边缘偏差模式确定所述当前编码单元是否与所述第二已编码单元合并编码；
比特流编码部，其在确定所述当前编码单元与所述第二已编码单元合并编码的情况下，在比特流中编入指示所述当前编码单元与所述第二已编码单元合并编码的指示信息。
根据本发明实施例的第三个方面，提供一种图像处理设备，其中，所述图像处理设备包括如上所述的图像编码装置。
根据本发明实施例的又一个方面，提供一种计算机可读程序，其中当在图像编码装置或者图像处理设备中执行所述程序时，所述程序使得所述图像编码装置或者图像处理设备执行如上所述的图像编码方法。
根据本发明实施例的又一个方面，提供一种存储有计算机可读程序的存储介质，其中所述计算机可读程序使得图像编码装置或者图像处理设备执行如上所述的图像编码方法。
本发明实施例的有益效果在于：在当前编码单元不与左边编码单元合并编码的情况下，根据左上编码单元的边缘偏差模式确定是否在比特流中编入指示当前编码单元与左上编码单元合并编码的指示信息。由此，可以进一步提高SAO方案的压缩效率，并节省比特流中的比特数开销。
参照后文的说明和附图，详细公开了本发明的特定实施方式，指明了本发明的原理可以被采用的方式。应该理解，本发明的实施方式在范围上并不因而受到限制。在所附权利要求的精神和条款的范围内，本发明的实施方式包括许多改变、修改和等同。
针对一种实施方式描述和/或示出的特征可以以相同或类似的方式在一个或更多个其它实施方式中使用，与其它实施方式中的特征相组合，或替代其它实施方式中的特征。
应该强调，术语“包括/包含”在本文使用时指特征、整件、步骤或组件的存在，但并不排除一个或更多个其它特征、整件、步骤或组件的存在或附加。
附图说明
参照以下的附图可以更好地理解本发明的很多方面。附图中的部件不是成比例绘制的，而只是为了示出本发明的原理。为了便于示出和描述本发明的一些部分，附图中对应部分可能被放大或缩小。
在本发明的一个附图或一种实施方式中描述的元素和特征可以与一个或更多个其它附图或实施方式中示出的元素和特征相结合。此外，在附图中，类似的标号表示几个附图中对应的部件，并可用于指示多于一种实施方式中使用的对应部件。
图1是EO模式的一示意图；
图2是本发明实施例1的图像编码方法的一示意图；
图3是本发明实施例1的图像编码方法的另一示意图；
图4是本发明实施例2的图像编码装置的一示意图；
图5是本发明实施例3的图像处理设备的一示意图。
具体实施方式
参照附图，通过下面的说明书，本发明的前述以及其它特征将变得明显。在说明书和附图中，具体公开了本发明的特定实施方式，其表明了其中可以采用本发明的原则的部分实施方式，应了解的是，本发明不限于所描述的实施方式，相反，本发明包括落入所附权利要求的范围内的全部修改、变型以及等同物。
SAO的MODE可以分为边缘偏差(EO，Edge Offset)和带偏差(BO，Band Offset)，其中EO又可以进一步分成0度、45度、90度、135度4种。图1是EO模式的示意 图，示出了几种梯度方向的情况；如图1所示，从左到右依次示出了0度、90度、135度和45度的情况。
在编码的过程中，为了进一步提高压缩效率，HEVC引入了合并模式(Merge MODE)。即，在当前编码单元(以LCU为例)和左边LCU的MODE和Offset相同的情况下，在码流中编入sao_merge_left_flag；在当前LCU和上边LCU的MODE和Offset相同的情况下，在码流中编入sao_merge_up_flag。这样可以节省bit数开销。
HEVC标准中的具体语法(syntax)如下表1所示：
表1
Figure PCTCN2016102001-appb-000001
以下对本发明实施例进行说明。
实施例1
本发明实施例提供一种图像编码方法，使用采样自适应偏差(SAO)方式进行编码。图2是本发明实施例的图像编码方法的一示意图，如图2所示，所述图像编码方法包括：
步骤201，确定当前编码单元是否与第一已编码单元合并编码；
步骤202，在所述当前编码单元不与所述第一已编码单元合并编码的情况下，根 据第二已编码单元的边缘偏差模式确定所述当前编码单元是否与所述第二已编码单元合并编码；
步骤203，在确定所述当前编码单元与所述第二已编码单元合并编码的情况下，在比特流中编入指示所述当前编码单元与所述第二已编码单元合并编码的指示信息。
在本实施例中，编码单元例如可以是LCU等等，但本发明不限于此，可以根据实际情况确定编码单元的大小。第一已编码单元可以为当前编码单元的左边编码单元，第二已编码单元为当前编码单元的左上编码单元；和/或，第一已编码单元可以为当前编码单元的上边编码单元，第二已编码单元为当前编码单元的右上编码单元。
在本实施例中，步骤201中确定当前编码单元是否与第一已编码单元合并编码，具体可以包括：确定当前编码单元的模式是否与第一已编码单元的模式相同；以及确定当前编码单元的偏差是否与第一已编码单元的偏差相同。在模式和偏差均相同的情况下，可以确定当前编码单元与第一已编码单元合并编码；但本发明不限于此。
在本实施例中，步骤202中根据第二已编码单元的边缘偏差模式确定当前编码单元是否与所述第二已编码单元合并编码，具体可以包括：在第二已编码单元的EO模式为135度或者45度的情况下，确定当前编码单元与所述第二已编码单元合并编码；但本发明不限于此。
以下以第一已编码单元为左边编码单元或上边编码单元，第二已编码单元为左上编码单元或右上编码单元为例，对本发明进行进一步说明。值得注意的是，本发明不限于左上编码单元或右上编码单元，也不限于135度或者45度；例如在EO模式的定义发生改变的情况下，还可以是其他的已编码单元，也可以是其他的EO模式。
在本实施例中，可以根据左上编码单元的边缘偏差模式，确定所述当前编码单元是否与所述左上编码单元合并编码；此外，还可以根据右上编码单元的边缘偏差模式，确定所述当前编码单元是否与所述右上编码单元合并编码。
图3是本发明实施例的图像编码方法的另一示意图，如图3所示，所述图像编码方法包括：
步骤301，确定当前编码单元的模式和偏差是否与左边编码单元的模式和偏差相同；在相同的情况下执行步骤302，在不相同的情况下可以执行步骤304；
在本实施例中，关于模式和偏差的具体内容可以参考相关技术，此处不再赘述。
步骤302，确定当前编码单元与左边编码单元合并编码；
步骤303，在比特流中编入sao_merge_left_flag。
步骤304，确定左上编码单元的EO模式是否为135度；在是135度的情况下执行步骤305，否则执行步骤307。
步骤305，确定当前编码单元与左上编码单元合并编码；
步骤306，在比特流中编入sao_merge_up_left_flag。
步骤307，确定当前编码单元的模式和偏差是否与上边编码单元的模式和偏差相同；在相同的情况下执行步骤308，在不相同的情况下可以执行步骤310。
步骤308，确定当前编码单元与上边编码单元合并编码；
步骤309，在比特流中编入sao_merge_up_flag。
步骤310，确定右上编码单元的EO模式是否为45度；在是45度的情况下执行步骤311，否则执行步骤313。
步骤311，确定当前编码单元与右上编码单元合并编码。
步骤312，在比特流中编入sao_merge_up_right_flag。
步骤313，在比特流中编入当前编码单元的模式和偏差。
在本实施例中，可以设定一些具体的判定规则来确定是否进行合并编码。因为模式和偏差需要占用比特数，所以在某些时候，虽然合并编码(或者称合并模式)的参数不是最优，但是和最优模式的差别很小的情况下，综合考虑合并模式节约下来的码率，仍然有可能选择合并模式。
例如，可以设定一个较小的门限值，当合并模式的cost和最优模式的cost之差小于该门限值时，就可以选择合并模式。但本发明不限于此，具体如何实现可以根据实际情况确定。
值得注意的是，附图3仅示意性地对本发明实施例进行了说明，但本发明不限于此。例如可以适当地调整各个步骤之间的执行顺序(例如步骤304和步骤307)，此外还可以增加其他的一些步骤或者减少其中的某些步骤。本领域的技术人员可以根据上述内容进行适当地变型，而不仅限于上述附图的记载。
在本实施例中，考虑到EO的模式除了0度和90度外，还有45和135度的存在，当图像中物体的边缘沿着45度或者135度方向时，这两种MODE更可能被采用。在这种情况下，如果加入sao_merge_up_left_flag或sao_merge_up_right_flag，更有可能被选中，从而达到节省bit数开销的目的。对应的syntax可以如下表2：
表2
Figure PCTCN2016102001-appb-000002
值得注意的是，表2仅示意性示出了本发明实施例相关的SAO语法，但本发明不限于此。例如，还可以调整上述增加的部分的位置(例如可以先判断左边和上边的编码单元，再判断左上和右上的编码单元，等等)；可以根据上述内容对本发明实施例进行适当的变形。
以上仅对与本发明相关的各步骤或过程进行了说明，但本发明不限于此。图像编码方法还可以包括其他步骤或者过程，关于这些步骤或者过程的具体内容，可以参考现有技术。
由上述实施例可知，在当前编码单元不与左边编码单元合并编码的情况下，根据左上编码单元的边缘偏差模式确定是否在比特流中编入指示当前编码单元与左上编码单元合并编码的指示信息。由此，可以进一步提高SAO方案的压缩效率，并节省比特流中的比特数开销。
实施例2
本发明实施例提供一种图像编码装置，使用SAO方式进行编码。本发明实施例对应于实施例1的图像编码方法，相同的内容不再赘述。
图4是本发明实施例的图像编码装置的一示意图，如图4所示，图像编码装置400包括：
第一合并确定部401，其确定当前编码单元是否与第一已编码单元合并编码；
第二合并确定部402，其在所述当前编码单元不与所述第一已编码单元合并编码的情况下，根据第二已编码单元的边缘偏差模式确定所述当前编码单元是否与所述第二已编码单元合并编码；
比特流编码部403，其在确定所述当前编码单元与所述第二已编码单元合并编码的情况下，在比特流中编入指示所述当前编码单元与所述第二已编码单元合并编码的指示信息。
在一个实施方式中，所述第一已编码单元可以为所述当前编码单元的左边编码单元，所述第二已编码单元为所述当前编码单元的左上编码单元。
例如，第一合并确定部401可以用于：确定所述当前编码单元的模式是否与所述左边编码单元的模式相同；以及确定所述当前编码单元的偏差是否与所述左边编码单元的偏差相同。
第二合并确定部402可以用于：在所述左上编码单元的边缘偏差模式为135度的情况下，确定所述当前编码单元与所述左上编码单元合并编码。
比特流编码部403还可以用于：在确定所述当前编码单元与所述左上编码单元合并编码的情况下，在比特流中编入sao_merge_up_left_flag。
在另一个实施方式中，所述第一已编码单元可以为所述当前编码单元的上边编码单元，所述第二已编码单元为所述当前编码单元的右上编码单元。
例如，第一合并确定部401可以用于：确定所述当前编码单元的模式是否与所述上边编码单元的模式相同；以及确定所述当前编码单元的偏差是否与所述上边编码单元的偏差相同。
第二合并确定部402可以用于：在所述右上编码单元的边缘偏差模式为45度的情况下，确定所述当前编码单元与所述右上编码单元合并编码。
比特流编码部403还可以用于：在确定所述当前编码单元与所述右上编码单元合 并编码的情况下，在比特流中编入sao_merge_up_right_flag。
值得注意的是，以上仅对与本发明相关的各部件进行了说明，但本发明不限于此。图像编码装置还可以包括其他部件或者模块，关于这些部件或者模块的具体内容，可以参考现有技术。
由上述实施例可知，在当前编码单元不与左边编码单元合并编码的情况下，根据左上编码单元的边缘偏差模式确定是否在比特流中编入指示当前编码单元与左上编码单元合并编码的指示信息。由此，可以进一步提高SAO方案的压缩效率，并节省比特流中的比特数开销。
实施例3
本发明实施例提供一种图像处理设备，该图像处理设备包括编码端和/或解码端。其中编码端包括如实施例2所述的图像编码装置；解码器可以相应地对图像或者视频进行解码。
图5是本发明实施例的图像处理设备的一示意图。如图5所示，图像处理设备500可以包括：中央处理器(CPU)100和存储器110；存储器110耦合到中央处理器100。其中该存储器110可存储各种数据；此外还存储信息处理的程序，并且在中央处理器100的控制下执行该程序。
在一个实施方式中，图像编码装置400的功能可以被集成到中央处理器100中。其中，中央处理器100可以被配置为实现如实施例1所述的图像编码方法。
在另一个实施方式中，图像编码装置400可以与中央处理器100分开配置，例如可以将图像编码装置400配置为与中央处理器100连接的芯片，通过中央处理器100的控制来实现图像编码装置400的功能。
例如，中央处理器100可以被配置为进行如下的控制：确定当前编码单元是否与第一已编码单元合并编码；在所述当前编码单元不与所述第一已编码单元合并编码的情况下，根据第二已编码单元的边缘偏差模式确定所述当前编码单元是否与所述第二已编码单元合并编码；在确定所述当前编码单元与所述第二已编码单元合并编码的情况下，在比特流中编入指示所述当前编码单元与所述第二已编码单元合并编码的指示信息。
此外，如图5所示，图像处理设备500还可以包括：输入输出(I/O)设备120 和显示器130等；其中，上述部件的功能与现有技术类似，此处不再赘述。值得注意的是，图像处理设备500也并不是必须要包括图5中所示的所有部件；此外，图像处理设备500还可以包括图5中没有示出的部件，可以参考现有技术。
本发明实施例提供一种计算机可读程序，其中当在图像编码装置或图像处理设备中执行所述程序时，所述程序使得所述图像编码装置或图像处理设备执行如实施例1所述的图像编码方法。
本发明实施例提供一种存储有计算机可读程序的存储介质，其中所述计算机可读程序使得图像编码装置或图像处理设备执行如实施例1所述的图像编码方法。
本发明以上的装置和方法可以由硬件实现，也可以由硬件结合软件实现。本发明涉及这样的计算机可读程序，当该程序被逻辑部件所执行时，能够使该逻辑部件实现上文所述的装置或构成部件，或使该逻辑部件实现上文所述的各种方法或步骤。本发明还涉及用于存储以上程序的存储介质，如硬盘、磁盘、光盘、DVD、flash存储器等。
结合本发明实施例描述的方法/装置可直接体现为硬件、由处理器执行的软件模块或二者组合。例如，图4中所示的功能框图中的一个或多个和/或功能框图的一个或多个组合(例如，第一合并确定部、第二合并确定部、比特流编码部)，既可以对应于计算机程序流程的各个软件模块，亦可以对应于各个硬件模块。这些软件模块，可以分别对应于图2所示的各个步骤。这些硬件模块例如可利用现场可编程门阵列(FPGA)将这些软件模块固化而实现。
软件模块可以位于RAM存储器、闪存、ROM存储器、EPROM存储器、EEPROM存储器、寄存器、硬盘、移动磁盘、CD-ROM或者本领域已知的任何其它形式的存储介质。可以将一种存储介质耦接至处理器，从而使处理器能够从该存储介质读取信息，且可向该存储介质写入信息；或者该存储介质可以是处理器的组成部分。处理器和存储介质可以位于ASIC中。该软件模块可以存储在移动终端的存储器中，也可以存储在可插入移动终端的存储卡中。例如，若设备(如移动终端)采用的是较大容量的MEGA-SIM卡或者大容量的闪存装置，则该软件模块可存储在该MEGA-SIM卡或者大容量的闪存装置中。
针对附图中描述的功能方框中的一个或多个和/或功能方框的一个或多个组合，可以实现为用于执行本申请所描述功能的通用处理器、数字信号处理器(DSP)、专 用集成电路(ASIC)、现场可编程门阵列(FPGA)或者其它可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件或者其任意适当组合。针对附图描述的功能方框中的一个或多个和/或功能方框的一个或多个组合，还可以实现为计算设备的组合，例如，DSP和微处理器的组合、多个微处理器、与DSP通信结合的一个或多个微处理器或者任何其它这种配置。
以上结合具体的实施方式对本发明进行了描述，但本领域技术人员应该清楚，这些描述都是示例性的，并不是对本发明保护范围的限制。本领域技术人员可以根据本发明的精神和原理对本发明做出各种变型和修改，这些变型和修改也在本发明的范围内。

Claims (17)

  1. 一种图像编码方法，使用采样自适应偏差方式进行编码，所述图像编码方法包括：
    确定当前编码单元是否与第一已编码单元合并编码；
    在所述当前编码单元不与所述第一已编码单元合并编码的情况下，根据第二已编码单元的边缘偏差模式确定所述当前编码单元是否与所述第二已编码单元合并编码；
    在确定所述当前编码单元与所述第二已编码单元合并编码的情况下，在比特流中编入指示所述当前编码单元与所述第二已编码单元合并编码的指示信息。
  2. 根据权利要求1所述的图像编码方法，其中，所述第一已编码单元为所述当前编码单元的左边编码单元，所述第二已编码单元为所述当前编码单元的左上编码单元。
  3. 根据权利要求1所述的图像编码方法，其中，所述第一已编码单元为所述当前编码单元的上边编码单元，所述第二已编码单元为所述当前编码单元的右上编码单元。
  4. 根据权利要求2所述的图像编码方法，其中，确定当前编码单元是否与第一已编码单元合并编码，包括：
    确定所述当前编码单元的模式是否与所述左边编码单元的模式相同；以及
    确定所述当前编码单元的偏差是否与所述左边编码单元的偏差相同。
  5. 根据权利要求2所述的图像编码方法，其中，根据第二已编码单元的边缘偏差模式确定所述当前编码单元是否与所述第二已编码单元合并编码，包括：
    在所述左上编码单元的边缘偏差模式为135度的情况下，确定所述当前编码单元与所述左上编码单元合并编码。
  6. 根据权利要求2所述的图像编码方法，其中，指示所述当前编码单元与所述左上编码单元合并编码的指示信息表示为sao_merge_up_left_flag。
  7. 根据权利要求3所述的图像编码方法，其中，确定所述当前编码单元是否与第一已编码单元合并编码，包括：
    确定所述当前编码单元的模式是否与所述上边编码单元的模式相同；以及
    确定所述当前编码单元的偏差是否与所述上边编码单元的偏差相同。
  8. 根据权利要求3所述的图像编码方法，其中，根据第二已编码单元的边缘偏差模式确定所述当前编码单元是否与所述第二已编码单元合并编码，包括：
    在所述右上编码单元的边缘偏差模式为45度的情况下，确定所述当前编码单元与所述右上编码单元合并编码。
  9. 根据权利要求3所述的图像编码方法，其中，指示所述当前编码单元与所述右上编码单元合并编码的指示信息表示为sao_merge_up_right_flag。
  10. 一种图像编码装置，使用采样自适应偏差方式进行编码，所述图像编码装置包括：
    第一合并确定部，其确定当前编码单元是否与第一已编码单元合并编码；
    第二合并确定部，其在所述当前编码单元不与所述第一已编码单元合并编码的情况下，根据第二已编码单元的边缘偏差模式确定所述当前编码单元是否与所述第二已编码单元合并编码；
    比特流编码部，其在确定所述当前编码单元与所述第二已编码单元合并编码的情况下，在比特流中编入指示所述当前编码单元与所述第二已编码单元合并编码的指示信息。
  11. 根据权利要求10所述的图像编码装置，其中，所述第一已编码单元为所述当前编码单元的左边编码单元，所述第二已编码单元为所述当前编码单元的左上编码单元。
  12. 根据权利要求10所述的图像编码装置，其中，所述第一已编码单元为所述当前编码单元的上边编码单元，所述第二已编码单元为所述当前编码单元的右上编码单元。
  13. 根据权利要求11所述的图像编码装置，其中，所述第一合并确定部用于：确定所述当前编码单元的模式是否与所述左边编码单元的模式相同；以及确定所述当前编码单元的偏差是否与所述左边编码单元的偏差相同。
  14. 根据权利要求11所述的图像编码装置，其中，所述第二合并确定部用于：在所述左上编码单元的边缘偏差模式为135度的情况下，确定所述当前编码单元与所述左上编码单元合并编码。
  15. 根据权利要求12所述的图像编码装置，其中，所述第一合并确定部用于：确定所述当前编码单元的模式是否与所述上边编码单元的模式相同；以及确定所述当 前编码单元的偏差是否与所述上边编码单元的偏差相同。
  16. 根据权利要求12所述的图像编码装置，其中，所述第二合并确定部用于：在所述右上编码单元的边缘偏差模式为45度的情况下，确定所述当前编码单元与所述右上编码单元合并编码。
  17. 一种图像处理设备，其中，所述图像处理设备包括如权利要求10所述的图像编码装置。
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