WO2018059350A1 - 一种数据处理方法、装置和系统 - Google Patents

一种数据处理方法、装置和系统 Download PDF

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Publication number
WO2018059350A1
WO2018059350A1 PCT/CN2017/103181 CN2017103181W WO2018059350A1 WO 2018059350 A1 WO2018059350 A1 WO 2018059350A1 CN 2017103181 W CN2017103181 W CN 2017103181W WO 2018059350 A1 WO2018059350 A1 WO 2018059350A1
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Prior art keywords
symbol sequence
symbol
sequence
symbols
fdma
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PCT/CN2017/103181
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English (en)
French (fr)
Inventor
曾歆
王宗杰
胡远洲
Original Assignee
华为技术有限公司
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Priority claimed from CN201611155234.9A external-priority patent/CN107888533B/zh
Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to EP17854800.4A priority Critical patent/EP3496368B1/en
Publication of WO2018059350A1 publication Critical patent/WO2018059350A1/zh
Priority to US16/368,618 priority patent/US11245562B2/en

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2626—Arrangements specific to the transmitter only
    • H04L27/2627—Modulators
    • H04L27/2634—Inverse fast Fourier transform [IFFT] or inverse discrete Fourier transform [IDFT] modulators in combination with other circuits for modulation
    • H04L27/2636—Inverse fast Fourier transform [IFFT] or inverse discrete Fourier transform [IDFT] modulators in combination with other circuits for modulation with FFT or DFT modulators, e.g. standard single-carrier frequency-division multiple access [SC-FDMA] transmitter or DFT spread orthogonal frequency division multiplexing [DFT-SOFDM]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/20—Modulator circuits; Transmitter circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2614—Peak power aspects
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
    • H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
    • H04L27/345—Modifications of the signal space to allow the transmission of additional information
    • H04L27/3461—Modifications of the signal space to allow the transmission of additional information in order to transmit a subchannel
    • H04L27/3483—Modifications of the signal space to allow the transmission of additional information in order to transmit a subchannel using a modulation of the constellation points
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
    • H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
    • H04L27/36—Modulator circuits; Transmitter circuits
    • H04L27/361—Modulation using a single or unspecified number of carriers, e.g. with separate stages of phase and amplitude modulation

Definitions

  • the present application relates to the field of wireless communication technologies, and in particular, to a data transmission method, apparatus, and system in a wireless communication system.
  • Orthogonal Frequency Division Multiplexing OFDM
  • MIMO Multiple-Input Multiple-Output
  • LTE Long Term Evolution
  • WiMAX Worldwide Interoperability for Microwave Access
  • PAPR Peak-to-Average Power Ratio
  • PA Power Amplifier
  • EVM Vector Vector Magnitude
  • the actual transmit power usually needs to be backed up, but the decrease of the transmit power will also cause the demodulation performance of the receiver to decrease.
  • 5G next generation communication system
  • the efficiency and maximum transmission power of the PA are greatly reduced, and the PAPR of the transmitted signal is more severe. Requirements.
  • This paper describes a data processing method, apparatus and system for reducing the transmit signal PAPR of an OFDM system by separating the real imaginary part of the transmitted signal, thereby improving the link quality of the entire transmission system.
  • the present application provides a data processing method, including: a data transmitting device modulating a bit sequence to be transmitted to obtain a first symbol sequence, where the first symbol sequence includes M complex symbols, and M is greater than or equal to 1.
  • a data transmitting device modulating a bit sequence to be transmitted to obtain a first symbol sequence, where the first symbol sequence includes M complex symbols, and M is greater than or equal to 1.
  • An integer separating a real part and an imaginary part of each complex symbol in the first symbol sequence into two symbols to obtain a second symbol sequence, wherein the second symbol sequence includes 2M symbols;
  • the symbols in the two symbol sequences are phase rotated to obtain a third symbol sequence; the third symbol sequence is used to generate at least one Single Carrier Frequency Division Multiple Access (SC-FDMA) symbol; and the at least An SC-FDMA symbol.
  • SC-FDMA Single Carrier Frequency Division Multiple Access
  • the amplitude equalization of the time domain symbols is achieved, and the peak of the symbol to be transmitted is reduced, thereby reducing the PAPR of the transmitted signal.
  • phase rotation By performing phase rotation on the symbol sequence separated by the real imaginary part, orthogonalization of symbols in the symbol sequence can be realized, and interference between symbols can be reduced, thereby improving system performance.
  • the generating the at least one SC-FDMA symbol by using the third symbol sequence comprises: performing a 2M point Discrete Fourier Transform (DFT) on the third symbol sequence, Obtaining a fourth symbol sequence; generating at least one SC-FDMA symbol using the fourth symbol sequence.
  • DFT is performed using all the symbols (2M symbols) of the third symbol sequence, and the information of all the complex symbols after the modulation is completely saved, ensuring the transmission property.
  • the fourth symbol sequence is used to generate at least one SC-FDMA symbol, and the symbols in the fourth symbol sequence may be further processed, for example, windowing and/or expanding the fourth symbol sequence. Operation, and then performing the inverse sequence of the symbol sequence obtained by the inverse fast Fourier Transformation (IFFT) to generate at least one SC-FDMA symbol.
  • IFFT inverse fast Fourier Transformation
  • generating the at least one SC-FDMA symbol by using the fourth symbol sequence specifically: multiplying the fourth symbol sequence by a window function to obtain a fifth symbol sequence including Q symbols, where Q An integer greater than or equal to 1, and 2M ⁇ Q ⁇ M, wherein the fourth symbol sequence is multiplied by a window function, wherein each symbol in the fourth symbol sequence is multiplied by a weight; Performing an Inverse Fast Fourier Transformation (IFFT) on the fifth symbol sequence to generate at least one SC-FDMA symbol.
  • the window function may be a rectangular window, a square root Raised Cosine (SRRC) window function, a Kaiser window function, etc., which is not limited in the application, and the window function may be through a sequence or a matrix.
  • the form implementation includes Q window function elements, and after the fourth symbol sequence is multiplied by the window function, a continuous symbol multiplied by the Q window function elements is taken as the fifth symbol sequence.
  • the data sending device may further perform resource mapping on the fifth symbol sequence, that is, respectively map symbols in the fifth symbol sequence to physical resources corresponding to the at least one SC-FDMA symbol, and then pass The IFFT generates the at least one SC-FDMA symbol.
  • the generating the at least one SC-FDMA symbol by using the fourth symbol sequence comprises: taking any Q consecutive symbols in the fourth symbol sequence and multiplying by a window function to obtain Q symbols. a fifth symbol sequence, where Q is an integer greater than or equal to 1, and 2M ⁇ Q ⁇ M, wherein the fourth symbol sequence is multiplied by a window function for each of the fourth symbol sequences The symbols are multiplied one by one by a weight; and the fifth symbol sequence is subjected to Inverse Fast Fourier Transformation (IFFT) to generate at least one SC-FDMA symbol.
  • IFFT Inverse Fast Fourier Transformation
  • the window function contains Q window function elements, and the type of the window function is not limited.
  • the data sending device may further perform resource mapping on the fifth symbol sequence, that is, respectively map symbols in the fifth symbol sequence to physical resources corresponding to the at least one SC-FDMA symbol, and then pass The IFFT generates the at least one SC-FDMA symbol.
  • the generating, by using the fourth symbol sequence, the at least one SC-FDMA symbol comprises: cyclically expanding the fourth symbol sequence to obtain a fifth symbol sequence including P symbols, where P is an integer greater than or equal to 2, and P ⁇ 2M; multiplying the fifth symbol sequence by a window function to obtain a sixth symbol sequence including Q symbols, where Q is an integer greater than or equal to 1, and P ⁇ Q ⁇ Performing an Inverse Fast Fourier Transformation (IFFT) on the sixth symbol sequence to generate at least one SC-FDMA symbol.
  • the window function may be a rectangular window, a SRRC window function, a Kaiser window function, etc., which is not limited in the application.
  • the window function may be implemented in the form of a sequence or a matrix, and includes Q window function elements. After the fifth symbol sequence is multiplied by the window function, a continuous symbol multiplied by the Q window function elements is taken as the sixth symbol sequence.
  • the data sending device may further perform resource mapping on the sixth symbol sequence, and map symbols in the sixth symbol sequence to physical resources corresponding to the at least one SC-FDMA symbol, and then pass The IFFT generates the at least one SC-FDMA symbol.
  • the cyclic extension of the symbol sequence refers to obtaining an extended symbol sequence whose length is greater than or equal to the original symbol sequence by cyclically repeating the symbol sequence. For example, the symbol sequence after DFT is d DFT , and the symbol is denoted as d DFT .
  • the cyclic extension of the DFT frequency domain symbol sequence can further reduce the PAPR effect by occupying additional frequency domain bandwidth. It can be understood that any Q consecutive symbols can be multiplied by a window function in the fifth symbol sequence to obtain the sixth symbol sequence.
  • the generating, by using the fourth symbol sequence, the at least one SC-FDMA symbol comprises: cyclically expanding the fourth symbol sequence to obtain a fifth symbol sequence including Q symbols, where Q is an integer greater than or equal to 2, and Q ⁇ 2M; multiplying the fifth symbol sequence by a window function to obtain a sixth symbol sequence including Q symbols; performing inverse fast Fourier transform on the sixth symbol sequence (Inverse Fast Fourier Transformation, IFFT), generating at least one SC-FDMA symbol.
  • the window function may be a rectangular window, a SRRC window function, a Kaiser window function, etc., which is not limited in the application.
  • the window function may be implemented in the form of a sequence or a matrix, and includes Q window function elements. .
  • the data sending device may further perform resource mapping on the sixth symbol sequence, and map symbols in the sixth symbol sequence to physical resources corresponding to the at least one SC-FDMA symbol, and then pass The IFFT generates the at least one SC-FDMA symbol.
  • the cyclic extension of the symbol sequence refers to obtaining an extended symbol sequence whose length is greater than or equal to the original symbol sequence by cyclically repeating the symbol sequence.
  • the symbol sequence after DFT is d DFT
  • d DFT the symbol sequence after cyclically expanding d DFT
  • d CE (n) d DFT (mod(n, 2M))
  • n 0,... Q-1
  • 2M is the symbol sequence length after DFT
  • Q is the cyclically extended symbol sequence length Q ⁇ 2M
  • mod(n, 2M) means n to 2M remainder operation.
  • the data transmitting device may also perform precoding before performing resource mapping.
  • the data transmitting device may precode the symbol sequence obtained by multiplying the window function. Obtaining a sequence of symbols transmitted on at least one antenna port, respectively performing physical resource mapping on the symbol sequences on each antenna port and generating at least one SC-FDMA through IFFT.
  • the phase rotation of the symbols in the second sequence of symbols includes: multiplying each symbol in the second sequence of symbols by a phase rotation factor Where j is the imaginary unit and e is the base of the natural logarithm.
  • the phase of the phase rotation factor satisfies:
  • phase rotation based on the above formula supports phase rotation of different sequence lengths, and ensures orthogonality between symbols and orthogonality between real and imaginary parts of symbols when different sequence lengths are used, thereby reducing Inter-symbol interference improves system performance.
  • the values of the n k may be the same or different.
  • the data sending device is a base station, and the data sending device can notify the value of the data receiving device (eg, the user equipment) n k or related information, and can also pre-arrange the value of n k or related information.
  • the present application does not limit this; or, the data sending device is a user equipment, and the data sending device can receive signaling or a message of a data receiving device (eg, a base station), and learn from the signaling or message.
  • the value of k or related information may also pre-arrange the value of n k or related information, which is not limited in this application.
  • the data transmitting device modulates a sequence of bits to be transmitted, including: using ⁇ /4 Rotary Binary Phase Shift Keying (BPSK), Quadrature Phase Shift Keying (Quadrature Phase Shift Keying) , QPSK) and at least one of the Quadrature Amplitude Modulation (QAM) modulation modes are modulated.
  • BPSK Rotary Binary Phase Shift Keying
  • Quadrature Phase Shift Keying Quadrature Phase Shift Keying
  • QAM Quadrature Amplitude Modulation
  • the ⁇ /4 rotation BPSK modulation method refers to performing a ⁇ /4 or - ⁇ /4 rotation on the constellation diagram based on the BPSK modulation method.
  • the effect of time domain symbol amplitude equalization can be achieved in the process of separating the real part of the modulation symbol, thereby reducing the PAPR of the transmitted signal.
  • the modulation described in this application can also adopt other modulation methods, for example, a modulation method based on BPSK, QPSK, or QAM modulation, such as offset quadrature phase shift keying (Offset QPSK, OQPSK), Differential Phase-Shift Keying (DPSK), etc., which are not limited in this application.
  • the data transmitting device modulates a bit sequence to be transmitted, including: modulating a transmission bit using a ⁇ /4 Rotary Binary Phase Shift Keying (BPSK), wherein the ⁇ / 4 Rotating BPSK modulation mode is: + ⁇ /4 rotation or - ⁇ /4 rotation modulation mode for BPSK modulation constellation; and bit sequence to be transmitted in different time units with at least one SC-FDMA symbol as one time unit
  • BPSK Rotary Binary Phase Shift Keying
  • the bit sequence to be transmitted in the different time units mentioned above may also alternately use a modulation scheme of + ⁇ /4 rotation for the BPSK modulation constellation and - ⁇ /4 rotation for the BPSK modulation constellation.
  • Modulation method For example, one SC-FDMA symbol can be one time unit, and the bit sequence in the first SC-FDMA symbol is modulated by a modulation scheme of + ⁇ /4 rotation of the BPSK modulation constellation, the l+1th SC-FDMA The bit sequence in the symbol is modulated using a modulation scheme of - ⁇ /4 rotation for the BPSK modulation constellation, and the bit sequence in the l+2 SC-FDMA symbol is modulated with + ⁇ /4 rotation for the BPSK modulation constellation.
  • the mode is modulated, and so on, where l ⁇ 0, which is the SC-FDMA symbol index.
  • an SC-FDMA symbol with an SC-FDMA symbol as a time unit and an odd-numbered symbol index is modulated by a modulation scheme of + ⁇ /4 rotation of the BPSK modulation constellation, and the symbol index is an even-numbered SC-FDMA.
  • the symbols are modulated using a modulation scheme of - ⁇ /4 rotation for the BPSK modulation constellation.
  • different or different rotation modulation modes are used randomly, so that the number of SC-FDMA symbols modulated by + ⁇ /4 and - ⁇ /4 rotation modes is basically the same in a certain statistical time period. , thereby reducing spectrum leakage and improving spectrum efficiency.
  • a certain statistical time period includes at least two of the above time units.
  • the real and imaginary parts of each complex symbol in the first symbol sequence are separated into two symbols to obtain a second symbol sequence, wherein the symbols in the second symbol sequence are The real and imaginary parts of the symbol in the first symbol sequence are alternately arranged.
  • d offset [Re ⁇ d 0 ⁇ , Im ⁇ d 0 ⁇ , Re ⁇ d 1 ⁇ , Im ⁇ d 1 ⁇ ..., Re ⁇ d M-1 ⁇ , Im ⁇ d M-1 ⁇ ], where Re ⁇ Indicates that the real part operation is taken, and Im ⁇ means that the virtual part operation is taken.
  • the data sending device is a base station, and the data sending device may notify the data receiving device (eg, the user equipment) that the second symbol sequence is generated by the first symbol sequence, or may be pre-agreed to generate the second symbol sequence.
  • the rule is not limited in this application; or the data sending device is a user equipment, and the data sending device can receive signaling and a message of the data receiving device (for example, a base station), and learn from the signaling or the message.
  • the rule for generating the second symbol sequence by the first symbol sequence may also pre-agreed the specific rule for generating the second symbol sequence, which is not limited in this application.
  • the data sending device is a base station, and the data sending device sends information of M, at least one of information of Q and proportional relationship information of M and Q to a data receiving device (eg, user equipment).
  • a data receiving device eg, user equipment.
  • the value of Q and M or the proportional relationship between Q and M can be dynamically adjusted according to system requirements to dynamically adjust PAPR.
  • the data transmitting device is a user equipment, and the data transmitting device receives at least one of information of M, information of Q, and proportional relationship information of M and Q.
  • the information of the M, the information of the Q, and the proportional relationship information of the M and the Q may be numerical information or other information capable of reflecting the value thereof; of course, one or more of the above information may also be Can be agreed in advance.
  • the network side device may send the foregoing information before a data transmission start, when the user equipment accesses, when the resource is allocated, or when the data transmission process is performed, and the foregoing information may be sent according to the requirement, thereby implementing the PAPR dynamics. Adjustment.
  • the present application provides a data processing method, including: receiving, by a data receiving device, at least one single carrier frequency division multiple access (SC-FDMA) symbol; Processing the at least one SC-FDMA symbol to obtain a time domain first symbol sequence, the first symbol sequence comprising 2M symbols, M being an integer greater than or equal to 1; phase derotating the symbols in the first symbol sequence Obtaining a second symbol sequence; combining the real parts of the symbols in the second symbol sequence as a real part and an imaginary part, respectively, to obtain a third symbol sequence, the third symbol sequence comprising M complex symbols; The third symbol sequence is demodulated to obtain a demodulated bit sequence.
  • SC-FDMA single carrier frequency division multiple access
  • the third symbol sequence may be de-layer mapped to obtain a sequence of symbols to be demodulated, and then the demodulated symbol sequence is Demodulation is performed to obtain a demodulated bit sequence.
  • the obtaining the time domain first symbol sequence by processing the at least one SC-FDMA symbol comprises: performing Fast Fourier Transformation (FFT) on the at least one SC-FDMA symbol Obtaining a fourth symbol sequence, wherein the fourth symbol sequence includes Q symbols, Q is an integer greater than or equal to 1; multiplying the fourth symbol sequence by a window function; multiplying the window function by Performing sequence extension or sequence shortening operation on the four symbol sequence to obtain a fifth symbol sequence, wherein the fifth symbol sequence includes 2M symbols, wherein the fourth symbol sequence is multiplied by a window function, Each symbol in the four symbol sequence is multiplied by one weight one by one; and the second symbol sequence is subjected to an Inverse Discrete Fourier Transform (IDFT) of 2M points to obtain the first symbol sequence.
  • FFT Fast Fourier Transformation
  • the window function may be a rectangular window, a square root Raised Cosine (SRRC) window function, a Kaiser window function, etc., which is not limited in the application, and the window function may be through a sequence or a matrix.
  • the fourth symbol sequence after multiplying the window function may be subjected to a sequence expansion operation.
  • 2M-Q symbols may be added to the extended sequence, and the added symbol position and the data transmitting device pair
  • the sign position of zero is the same.
  • the location or rule of the specific supplementary symbol may be notified by signaling or message, or may be pre-agreed.
  • the sequence shortening operation can be performed on the fourth symbol sequence after multiplication by the window function.
  • the cyclically added operation may be performed on the shortened sequence, where the cyclic addition operation refers to a cyclic extension operation corresponding to the originating end, and the symbol extended when the originating loop expansion operation is added to the sequence that is not cyclically extended Symbolically, the number of symbols that are the same as the length of the sequence that is not cyclically extended is finally obtained.
  • performing Fast Fourier Transformation (FFT) on the at least one SC-FDMA symbol to obtain a fourth symbol sequence further comprising: acquiring the fourth symbol from a corresponding physical resource after the FFT The symbol in the sequence.
  • FFT Fast Fourier Transformation
  • the data receiving device obtains the time domain first symbol sequence by processing the at least one SC-FDMA symbol, and may further include a de-precoding process, in combination with the above possible design manner, the data receiving device After the FFT is performed on the at least one SC-FDMA symbol, at least one symbol sequence is obtained on a physical resource corresponding to each antenna port, and the at least one symbol sequence is de-precoded to obtain the fourth symbol sequence.
  • the phase derotating the symbols in the first sequence of symbols comprises: multiplying each symbol in the first sequence of symbols by a phase derotation factor Where j is the imaginary unit and e is the base of the natural logarithm.
  • the phase of the phase rotation factor satisfies:
  • n k are arbitrary integers.
  • the data receiving device is a base station, and the data receiving device may notify the value of the data sending device (eg, the user equipment) n k or related information, and may also pre-determine the value of n k or related information.
  • the data receiving device is a user equipment, and the data receiving device can receive signaling or a message of a data sending device (for example, a base station), and learn from the signaling or the message that the n k is obtained.
  • Values or related information may also pre-arrange the value of n k or related information, which is not limited in this application.
  • the real parts of the symbols in the second sequence of symbols are combined as a real part and an imaginary part, respectively, to obtain a third symbol sequence.
  • the real part of the symbol in the second symbol sequence is sequentially combined into a complex symbol in the third symbol sequence, that is, a sequence formed by the real part of the symbol in the second symbol sequence.
  • the data receiving device is a base station, and the data receiving device may notify the data sending device (for example, the user equipment) that the third symbol sequence is generated by the second symbol sequence, or may pre-arrange the specific third symbol sequence.
  • the rule is not limited in this application; or the data receiving device is a user equipment, and the data receiving device can receive signaling and a message of the data sending device (for example, a base station), and learn from the signaling or the message.
  • the rule for generating the third symbol sequence by the second symbol sequence may also pre-agreed the specific rule for generating the third symbol sequence, which is not limited in this application.
  • the data receiving device is a user equipment, and the data receiving device receives information of the M sent by the data transmitting device (eg, the base station), the information of the Q, and at least the proportional relationship information of the M and the Q.
  • the data transmitting device eg, the base station
  • the Q the information of the Q
  • the proportional relationship information of the M and the Q the proportional relationship information of the M and the Q.
  • the data receiving device is a base station, and the data receiving device sends information of M, at least one of information of Q and proportional relationship information of M and Q to a data transmitting device (eg, user equipment). .
  • the network side device may send the information of the foregoing M, the information of the Q, and the proportional relationship information of the M and the Q, before the start of the data transmission, the access of the user equipment, and the resource allocation.
  • the information can also be sent as needed during data transmission to achieve dynamic adjustment of the PAPR.
  • the present application provides a data transmitting device having a function of realizing the behavior of a data transmitting device in the above method.
  • the functions may be implemented by hardware or by corresponding software implemented by hardware.
  • the hardware or software includes one or more modules corresponding to the functions described above.
  • the data sending device may be a network side device, such as a base station, or a user equipment.
  • the present application provides a data receiving device having a function of realizing the behavior of a data receiving device in the above method.
  • the functions may be implemented by hardware or by corresponding software implemented by hardware.
  • the hardware or software includes one or more modules corresponding to the functions described above.
  • the data receiving device may be a network side device, such as a base station, or a user equipment.
  • the present application provides a data sending device, where a data transmitting device includes a processor and a transmitter.
  • the processor is configured to support a data transmitting device to perform corresponding functions in the above methods, such as generating or processing data and/or information involved in the above methods.
  • the transmitter is configured to support the data sending device to send data, information or instructions involved in the foregoing method to the data receiving device, for example, sending the data to be transmitted to the data receiving device by using an SC-FDMA symbol.
  • the data transmitting device may further include a receiver for receiving information or instructions sent by the data receiving device.
  • the data sending device may be a network side device, and the data transmitting device may further include a communication interface, where the communication interface is used to support the data sending device to communicate with other network side devices, for example, Receiving information or instructions sent by other network side devices, and/or sending information or instructions to other network side devices.
  • the structure of the data transmitting device may further include a memory for coupling with the processor to save necessary program instructions and data of the data transmitting device.
  • the application provides a data receiving device, where the structure of the data receiving device includes a processor and a receiver.
  • the processor is configured to support a data receiving device to perform corresponding functions in the above methods, such as generating or processing data and/or information involved in the above methods.
  • the receiver is configured to support the data receiving device to receive data and/or information involved in the above method.
  • the structure of the data receiving device may further include a transmitter for transmitting the required information or instructions to the data transmitting device.
  • the data receiving device may be a type The network side device, the data receiving device may further include a communication interface, the communication interface is configured to support the data receiving device to communicate with other network side devices, for example, receiving information or instructions sent by other network side devices, and/or sending Information or instructions to other network-side devices.
  • the structure of the data receiving device may further include a memory for coupling with the processor to save necessary program instructions and data of the data receiving device.
  • the present application provides a communication system including the data transmitting device and the data receiving device described in the above aspects.
  • the present application provides a computer storage medium for storing computer software instructions for use in the above data transmitting device, comprising a program designed to perform the above aspects.
  • the present application provides a computer storage medium for storing computer software instructions for use in the above data receiving device, comprising a program designed to perform the above aspects.
  • the present application provides a chip system including a processor for supporting a data transmitting device to implement the functions involved in the above aspects, for example, generating or processing data involved in the above method and/or Or information.
  • the chip system further includes a memory for holding program instructions and data necessary for the data transmitting device.
  • the chip system can be composed of chips, and can also include chips and other discrete devices.
  • the present application provides a chip system including a processor for supporting a data receiving device to implement the functions involved in the above aspects, for example, receiving or processing data involved in the above method and / or information.
  • the chip system further includes a memory for holding program instructions and data necessary for the data receiving device.
  • the chip system can be composed of chips, and can also include chips and other discrete devices.
  • the present application describes a data processing method, apparatus and system, which aim to reduce the Peak-to-Average Power Ratio (Peak-to-Average Power Ratio) of an OFDM system by separating the real imaginary part of the transmitted signal. PAPR), which improves the link quality of the entire transmission system.
  • Peak-to-Average Power Ratio Peak-to-Average Power Ratio
  • FIG. 1 is a schematic diagram of a possible application scenario of the present application
  • FIG. 2 is a schematic flowchart of a data processing method according to an embodiment of the present application.
  • FIG. 3 is a ⁇ /4 rotating BPSK constellation diagram provided by an embodiment of the present application.
  • FIG. 4 is a schematic flowchart diagram of another data processing method according to an embodiment of the present disclosure.
  • FIG. 5 is a schematic flowchart of still another data processing method according to an embodiment of the present application.
  • FIG. 6 is a schematic flowchart diagram of still another data processing method according to an embodiment of the present application.
  • FIG. 7 is a schematic flowchart of a method for processing data at a receiving end according to an embodiment of the present disclosure
  • FIG. 8 is a schematic structural diagram of a data sending device according to an embodiment of the present disclosure.
  • FIG. 9 is a schematic structural diagram of a data receiving device according to an embodiment of the present disclosure.
  • the network architecture and the service scenario described in the embodiments of the present application are for explaining the technical solutions of the embodiments of the present application, and do not constitute a limitation of the technical solutions provided by the embodiments of the present application. Those skilled in the art may know that with the evolution of the network architecture and The technical solutions provided by the embodiments of the present application are equally applicable to similar technical problems.
  • FIG. 1 is a schematic diagram of a possible application scenario of the present application.
  • User Equipment accesses the network side device through the wireless interface for communication, and can also communicate with another user equipment, such as Device to Device (D2D) or Machine to Machine (M2M). ) Communication under the scene.
  • D2D Device to Device
  • M2M Machine to Machine
  • the network side device can communicate with the user equipment, and can also communicate with another network side device, such as communication between the macro base station and the access point.
  • the terms “network” and “system” are often used interchangeably, but those skilled in the art can understand the meaning.
  • the user equipment referred to in the present application may include various handheld devices having wireless communication functions, in-vehicle devices, wearable devices, computing devices, control devices, or other processing devices connected to the wireless modem, and various forms of UE, mobile Mobile station (MS), terminal (Terminal) or terminal equipment (Terminal Equipment).
  • MS mobile Mobile station
  • Terminal Terminal
  • Terminal Equipment Terminal Equipment
  • the network side device involved in the present application includes a base station (BS), a network controller, or a mobile switching center, etc., wherein the device that directly communicates with the user equipment through the wireless channel is usually a base station, and the base station may include various a form of a macro base station, a micro base station, a relay station, an access point, or a remote radio unit (RRU), etc., of course, wireless communication with the user equipment may also be another network side device having a wireless communication function.
  • BS base station
  • RRU remote radio unit
  • the name of a device with a base station function may be different, for example, in an LTE network, called an evolved NodeB (eNB or eNodeB), in the 3rd Generation (3G) In the network, it is called Node B and so on.
  • eNB evolved NodeB
  • 3G 3rd Generation
  • the technical solution provided by the present application may be applied to uplink data transmission and/or downlink data transmission.
  • the data sending device may be a user equipment, and the data receiving device may be a network side device, such as a base station;
  • the data transmitting device may be a network side device, such as a base station, and the data receiving device may be a user device.
  • the Single Carrier Frequency Division Multiple Access (SC-FDMA) symbol described in this application can be extended by Orthogonal Frequency Division Multiplexing (DFT-spread OFDM, DFT-s-).
  • the OFDM method can also be implemented by a DFT-spread OFDM with spectrum shaping (DFT-s-OFDM SS) method with spectrum shaping, or can be generated by other methods.
  • DFT-s-OFDM SS DFT-spread OFDM with spectrum shaping
  • the method implementation of the -FDMA symbol is not limited in this application.
  • the Fast Fourier Transformation (FFT) described in this application is a fast algorithm for implementing Discrete Fourier Transform (DFT).
  • the FFT described in this application can also be replaced with other
  • the algorithm of the Fourier transform can be implemented, which is not limited in this application.
  • Inverse Fast Fourier Transformation (IFFT) is a fast algorithm for implementing Inverse Discrete Fourier Transform (IDFT).
  • IDFT Inverse Discrete Fourier Transform
  • the IFFT described in this application can also be replaced with other can implement Fu.
  • the inverse transform algorithm is not limited in this application.
  • the “data” described in the present application generally refers to service data, but may also include signaling, messages, and the like that the system needs to transmit, for example, reference signals, uplink and downlink control messages, and the like.
  • FIG. 2 is a schematic flowchart diagram of a data processing method according to an embodiment of the present application.
  • the data transmitting device modulates the bit sequence to be transmitted to obtain a first symbol sequence, wherein the first symbol sequence includes M complex symbols, and M is an integer greater than or equal to 1; each complex symbol in the first symbol sequence is The real and imaginary parts are separated into two symbols to obtain a second symbol sequence, wherein the second symbol sequence includes 2M symbols; and the symbols in the second symbol sequence are phase-rotated to obtain a third symbol sequence Generating at least one single carrier frequency division multiple access SC-FDMA symbol using the third symbol sequence; transmitting the at least one SC-FDMA symbol.
  • the data processing device may also obtain a symbol sequence directly according to the bit sequence to be transmitted, wherein the symbols in the symbol sequence are real and imaginary parts of the separated complex symbol sequence.
  • the data transmitting device modulates the bit sequence to be transmitted to obtain a modulated symbol sequence containing M (M ⁇ 1) complex symbols, and then each complex symbol in the complex symbol sequence The real part and the imaginary part are separated, and the obtained real part and imaginary part are discharged in a certain order, a symbol sequence of length 2M is obtained, and the symbols in the symbol sequence of length 2M are phase-rotated to realize the symbol. Orthogonalization between them reduces inter-symbol interference, and all or part of the symbols in the phase-rotated symbol sequence will eventually be transmitted in the form of SC-FDMA symbols.
  • the modulating the bit data to be transmitted may use BPSK, ⁇ /4 Rotary Binary Phase Shift Keying (BPSK), Quadrature Phase Shift Keying (QPSK), and positive At least one of the bits to be transmitted is modulated in a Quadrature Amplitude Modulation (QAM) modulation scheme.
  • BPSK ⁇ /4 Rotary Binary Phase Shift Keying
  • QPSK Quadrature Phase Shift Keying
  • QAM Quadrature Amplitude Modulation
  • the ⁇ /4 rotation BPSK modulation method refers to performing a ⁇ /4 or - ⁇ /4 rotation on the constellation diagram based on the BPSK modulation mode, as shown in FIG. 3, FIG. 3(a) and Fig. 3(b) shows the ⁇ /4 rotating BPSK constellation diagram of the constellation diagram with ⁇ /4 and - ⁇ /4 rotations based on the BPSK modulation method.
  • the modulation described in this application can also adopt other modulation methods, for example, a modulation method based on BPSK, QPSK, or QAM modulation, such as offset quadrature phase shift keying (Offset QPSK, OQPSK), differential phase-shift keying (DPSK), etc., which are not limited in this application.
  • a modulation method based on BPSK, QPSK, or QAM modulation such as offset quadrature phase shift keying (Offset QPSK, OQPSK), differential phase-shift keying (DPSK), etc.
  • the data transmitting device modulates the transmitted bits using a ⁇ /4 rotated BPSK modulation, wherein the ⁇ /4 rotated BPSK modulation includes a modulation scheme of + ⁇ /4 rotation or - ⁇ /4 rotation for the BPSK modulation constellation, As shown in Figure 3.
  • + ⁇ /4 rotation of the BPSK modulation constellation can be achieved by multiplying the BPSK modulation symbol by e j ⁇ /4 , where j is the imaginary unit and e is the base of the natural logarithm;
  • the - ⁇ /4 rotation of the BPSK modulation constellation can be achieved by multiplying the BPSK modulation symbol by e -j ⁇ /4 .
  • the data sending device uses at least one SC-FDMA symbol as one time unit, and the bit sequence to be transmitted in different time units is randomly used to perform a modulation scheme of + ⁇ /4 or - ⁇ /4 rotation on the BPSK modulation constellation.
  • Modulation, the bits to be transmitted in the same time unit use the same rotation mode.
  • two SC-FDMA symbols may be used as one time unit, and each time unit randomly selects a modulation method that performs + ⁇ /4 rotation on the BPSK modulation constellation or a BPSK modulation constellation according to a predetermined rule.
  • the figure performs a modulation scheme of - ⁇ /4 rotation.
  • the above rules for randomly selecting the rotation mode of the constellation can be set according to the needs of the system, which is not limited in this application.
  • the rule for randomly selecting the rotation mode may be determined according to a specific threshold.
  • the random rule may be required to be guaranteed to be satisfied within a statistical time period, for example, in L (L ⁇ 2) time units.
  • the difference between the number of SC-FDMA symbols of the rotation mode and the number of SC-FDMA symbols using another rotation mode does not exceed 10% of the total number of SC-FDMA symbols in L time units, of which 10%
  • adjustments may be made according to system requirements, which are not limited in this application.
  • the number of SC-FDMA symbols included in one time unit may also be set according to system requirements.
  • one slot may be a time unit, and one slot includes at least one SC.
  • -FDMA symbol can also be a Transmission Time Interval (TTI) as a unit of time, a TTI
  • TTI Transmission Time Interval
  • At least one SC-FDMA symbol is included, and the like, which is not limited in this application.
  • the data sending device uses at least one SC-FDMA symbol as a time unit, and the bit sequence to be transmitted in different time units may also alternately use a modulation mode and a pair of + ⁇ /4 rotations on the BPSK modulation constellation.
  • the BPSK modulation constellation performs a modulation mode of - ⁇ /4 rotation, and the bits to be transmitted in the same time unit use the same rotation mode.
  • a modulation method of performing a + ⁇ /4 rotation or a - ⁇ /4 rotation on the BPSK modulation constellation in each time unit may be determined according to a predetermined rule.
  • at least one of the following rules can be used to determine a modulation scheme using + ⁇ /4 rotation or - ⁇ /4 rotation in each time unit l, where l ⁇ 0, which is a time unit index:
  • Modulation using a modulation scheme that performs + ⁇ /4 rotation on the BPSK modulation constellation When Modulation using a modulation scheme that performs + ⁇ /4 rotation on the BPSK modulation constellation. Modulation using a modulation scheme of - ⁇ /4 rotation for the BPSK modulation constellation, wherein Indicates that A is rounded down, and C is any positive integer, which can be determined according to system requirements.
  • the data receiving device is a base station, and the data receiving device may notify the data sending device (for example, the user equipment) of the usage rule of the rotation mode in each time unit, and may also pre-agreed the usage rule of the rotation mode.
  • the application does not limit this; or the data receiving device is a user equipment, and the data receiving device can receive signaling or a message of a data sending device (eg, a base station), and learn each time from the signaling or message.
  • the rules for using the rotation mode in the unit may also pre-agreed the usage rules of the rotation mode, which is not limited in this application.
  • FIG. 4 is a schematic flowchart diagram of another data processing method according to an embodiment of the present disclosure.
  • the data transmitting device obtains the modulated symbol sequence after the bit to be transmitted is modulated.
  • the specific implementation manner of the modulation mode is the same as the embodiment corresponding to FIG. 2, and details are not described herein again.
  • the modulated symbol sequence (first symbol sequence) obtained by modulation includes M (M ⁇ 1) complex symbols, and the data transmitting device separates the M complex symbols in the symbol sequence into real imaginary parts to obtain one 2M A sequence of symbols (a sequence of second symbols).
  • the obtained real part and the imaginary part symbol may be arranged in a predetermined order to obtain the second symbol sequence, but the real part and the imaginary part are required to be arranged at intervals. That is, any two adjacent symbols in the second symbol sequence include a real part of the complex symbol x and an imaginary part of a complex symbol y, and x and y may be the same symbol or different symbols.
  • the real and imaginary symbols obtained by separating the M complex symbol sequences d are alternately arranged in sequence to form a sequence d offset containing 2M symbols, and satisfy:
  • the rule for generating the second symbol sequence by the first symbol sequence may be notified by signaling between the data sending device and the data receiving device, or may be pre-agreed.
  • the data transmitting device is a base station, and the data transmitting device may notify the data receiving device (eg, user equipment) of the first symbol sequence by signaling or other possible messages.
  • the rule for generating the second symbol sequence may also pre-agreed the specific rule for generating the second symbol sequence; in another example, the data sending device is a user equipment, and the data transmitting device may receive the data receiving device (eg, the base station) to send The signaling or other possible messages, and the rules for generating the second symbol sequence from the first symbol sequence are known from the signaling or the message, and the specific rules for generating the second symbol sequence may also be pre-agreed.
  • the data transmitting device After the modulation symbol sequence is separated by the real imaginary part, the data transmitting device phase-rotates the symbols in the second symbol sequence.
  • the phase rotation can be obtained by multiplying each of the second symbol sequences by a phase rotation factor To achieve, where j is the imaginary unit and e is the base of the natural logarithm.
  • the phase of the phase rotation factor satisfies:
  • n k are arbitrary integers
  • Q is the number of valid symbols retained by the second symbol sequence after frequency domain windowing.
  • phase rotation may also be implemented by multiplying the second symbol sequence by a phase rotation matrix
  • the phase rotation matrix is Diag[] means that K is a diagonal element in order a diagonal matrix in which j is an imaginary unit and e is the base of the natural logarithm.
  • the phase of the phase rotation factor satisfies:
  • n k are arbitrary integers
  • Q is the number of valid symbols retained by the second symbol sequence after frequency domain windowing.
  • n k in the above formula may be notified by signaling between the data sending device and the data receiving device, or may be pre-agreed.
  • the data sending device is a base station, and the data sending device may notify the value of the data receiving device (eg, the user equipment) n k or related information, and may also pre-arrange the value of n k or related information.
  • the data transmitting device is a user equipment, and the data transmitting device may receive signaling or a message of a data receiving device (eg, a base station), and obtain a value of n k from the signaling or message or Related information, you can also pre-arrange the value of n k or related information.
  • the data transmitting device phase-rotates the second symbol sequence to obtain a third symbol sequence, and generates at least one SC-FDMA symbol using the symbols in the third symbol sequence.
  • generating the at least one SC-FDMA symbol by using the symbols in the third symbol sequence may include the following steps:
  • the data transmitting device first performs a DFT of 2M points on the third symbol sequence to obtain a fourth symbol sequence, wherein the method of implementing the discrete Fourier transform may multiply the third symbol sequence by a form of a Fourier transform matrix
  • the implementation may also be implemented in other possible ways, which is not limited in this application.
  • the name of the DFT process may also have different definitions. For example, in the LTE system, the DFT process is defined as a transform precoder process, but the DFT transform is also performed in principle, which is not limited in this application. .
  • the data transmitting device multiplies the fourth symbol sequence by a window function to obtain a fifth symbol sequence including Q symbols, where Q is an integer greater than or equal to 1, and 2M ⁇ Q ⁇ M, wherein the pair is
  • the four symbol sequence is multiplied by a window function to multiply each symbol in the fourth symbol sequence by a weight; in some specific examples, the window function may be a rectangular window, square root raised cosine (Square Root)
  • the Raised Cosine (SRRC) window function, the Kaiser window function, and the like are not limited in the present application.
  • the window function may be implemented in the form of a sequence or a matrix, which is not limited in this application, and includes Q window function elements. In a specific example, the window function can take the form of a matrix representation, such as:
  • G diag[0,...,0,G 0 ,G 1 ,...,G Q-1 ,0,...,0],
  • diag[] denotes a matrix in which the diagonal elements are 0,...,0,G 0 ,G 1 ,...,G Q-1 ,0,...,0, and the remaining non-diagonal elements are 0, G matrix
  • the number of 0 elements preceding the G 0 , G 1 , ..., G Q-1 sequence and the following 0 elements can be set according to specific needs. This application is not limited.
  • the fourth symbol sequence is multiplied by a window function to obtain the fifth symbol sequence including the Q symbols
  • a window function For example, arbitrarily extracting Q consecutive symbols from the fourth symbol sequence, and then multiplying the Q consecutive symbols by a window function, where the window function includes Q window function elements, that is, the Q consecutive The symbols are multiplied by the Q window function elements one by one, and Q multiplied result symbols are obtained to form the fifth symbol sequence.
  • Q consecutive symbols may be arbitrarily taken out from the fourth symbol sequence as a fifth symbol sequence.
  • the values of Q and M or the relationship between Q and M can be dynamically adjusted according to system requirements, thereby dynamically adjusting PAPR.
  • the information of Q and M may be notified by signaling or other possible messages between the data sending device and the data receiving device, or may be pre-agreed.
  • the information of the Q and the M may include at least one of information of M, information of Q, and proportional relationship information of Q and M.
  • the data transmitting device is a base station, and the data transmitting device transmits information of M, at least one of information of Q and proportional relationship information of M and Q to a data receiving device (eg, user equipment).
  • the data transmitting device is a user equipment, and the data transmitting device receives at least one of information of M, information of Q, and proportional relationship information of M and Q.
  • the information of the M, the information of the Q, and the proportional relationship information of the M and the Q may be numerical information or other information capable of reflecting the value thereof; of course, one or more of the above information may also be Can be agreed in advance.
  • the LTE system is used as an example, and the base station can notify the user equipment of the ratio relationship information of the devices Q and M by using Downlink Control Information (DCI).
  • DCI Downlink Control Information
  • MCS Modulation and Coding Scheme
  • R BW Bandwitdh Ratio
  • the bandwidth ratio R BW in Table 1 specifies the specific Q/M ratio relationship in different MCS modes (here, "/" means division).
  • the data to be transmitted can be expanded in bandwidth, for example, by 1.5 or 2 times, that is, data is transmitted on 1.5 times or 2 times the number of subcarriers, thereby obtaining a lower PAPR, so that a larger Transmit power to improve edge coverage.
  • the base station can dynamically transmit the MCS index (MCS index) in the DCI, thereby achieving the purpose of bandwidth adjustment.
  • cells may also be separately added in the DCI for transmitting Q/M information, for example, multiple bit representations of multiple bandwidth ratio configurations.
  • the data transmitting device performs an Inverse Fast Fourier Transformation (IFFT) on the fifth symbol sequence to generate at least one SC-FDMA symbol.
  • IFFT Inverse Fast Fourier Transformation
  • the data sending device performs physical resource mapping on the symbols in the fifth symbol sequence, that is, respectively mapping the symbols in the fifth symbol sequence to the physical resources corresponding to the at least one SC-FDMA symbol.
  • CP Cyclic Prefix
  • the data transmitting device transmits the generated at least one SC-FDMA symbol.
  • FIG. 5 is a schematic flowchart diagram of still another data processing method according to an embodiment of the present application.
  • the data transmitting device performs modulation, real imaginary part separation, phase rotation, and DFT operation on the transmission bit sequence to obtain a fourth symbol sequence.
  • modulation real imaginary part separation
  • phase rotation phase rotation
  • DFT operation on the transmission bit sequence to obtain a fourth symbol sequence.
  • the data transmitting device may further cyclically expand the fourth symbol sequence to obtain a fifth symbol sequence including P symbols, where P ⁇ 2M.
  • the cyclic extension of the symbol sequence refers to obtaining an extended symbol sequence whose length is greater than or equal to the original symbol sequence by cyclically repeating the symbol sequence.
  • the symbol sequence after DFT is d DFT
  • the data transmitting device can send the fourth symbol sequence to the cyclic extension module, but does not perform cyclic extension processing, and can directly send the fourth symbol sequence to the cyclic extension without going through the cyclic extension module.
  • the processing unit after the module.
  • the data transmitting device multiplies the fifth symbol sequence by a window function to obtain a sixth symbol sequence including Q symbols, where Q is an integer greater than or equal to 1, and P ⁇ Q ⁇ M.
  • the window function is expressed in a matrix manner
  • the matrix G is a P ⁇ P matrix
  • the diagonal elements include G 0 , G 1 , . . . , G Q-1 , and PQ 0 elements.
  • Other specific implementation manners are the same as the corresponding embodiments in FIG. 4, and details are not described herein again.
  • any Q consecutive symbols are taken from the fifth symbol sequence, and then multiplied by the window function to obtain a sixth symbol sequence.
  • the specific implementation is the same as the embodiment corresponding to FIG. 4, where Let me repeat.
  • the data sending device may further cyclically extend the fourth symbol sequence to directly obtain a fifth symbol sequence including Q symbols, where Q is an integer greater than or equal to 2, and Q ⁇ 2M, where the implementation of the cyclic extension is similar to that described above, except that the extended symbol sequence length is Q. Then, multiplying the fifth symbol sequence by a window function to obtain a sixth symbol sequence including Q symbols.
  • the window function G is a diagonal element sequentially G 0 .
  • G 1 ,..., G Q-1 the remaining elements are 0, Q ⁇ Q matrix
  • G 0 , G 1 , ..., G Q-1 are the Q window function elements.
  • Q consecutive symbols may be arbitrarily taken out from the fifth symbol sequence as a sixth symbol sequence.
  • the fifth symbol sequence contains only Q symbols, then the fifth symbol sequence and the sixth symbol sequence are identical.
  • the data transmitting device performs an Inverse Fast Fourier Transformation (IFFT) on the sixth symbol sequence to generate at least one SC-FDMA symbol.
  • IFFT Inverse Fast Fourier Transformation
  • the data sending device may further perform resource mapping on the sixth symbol sequence, and map symbols in the sixth symbol sequence to physical resources corresponding to the at least one SC-FDMA symbol, and then pass The IFFT, plus CP operation generates the at least one SC-FDMA symbol.
  • the data transmitting device transmits the generated at least one SC-FDMA symbol.
  • the implementation of other steps in the embodiment of FIG. 5 may refer to the specific description of the embodiment of FIG. 4, for example, information of M, information of Q, or notification manner of proportional relationship information of M and Q.
  • information of M information of Q
  • notification manner of proportional relationship information of M and Q for example, reference may be made to the specific description of the embodiment of FIG. 4, and details are not described herein again.
  • FIG. 6 is a schematic flowchart diagram of still another data processing method according to an embodiment of the present application.
  • the data transmitting device may also perform layer mapping and/or precoding operations on the transmission bit sequence.
  • FIG. 6 shows a data processing method for adding layer mapping and precoding operations based on FIG.
  • the data transmitting device modulates at least one bit sequence to be transmitted to obtain at least one modulated symbol sequence, and the at least one modulated symbol sequence is layer mapped to generate symbol sequences of different layers to implement spatial multiplexing and transmission diversity. Or other system needs to implement the function.
  • the specific implementation manner of the layer mapping is not limited in this application. For example, a layer mapping processing manner defined in the 3rd Generation Partnership Project (3GPP) protocol TS 36.211 may be adopted.
  • 3GPP 3rd Generation Partnership Project
  • the data transmitting device separately performs operations such as real imaginary part separation, phase rotation, DFT, cyclic extension, frequency domain windowing, etc. for each symbol sequence of each layer, and the specific implementation manner of each layer symbol sequence can be referred to FIG. 4 or FIG. Corresponding embodiments are not described herein again.
  • the data transmitting device performs precoding operation on the frequency domain windowed at least one symbol sequence, and transforms different layer data into different antenna ports, so as to implement spatial multiplexing, transmission diversity, or functions that other systems need to implement.
  • the specific implementation manner of the precoding is not limited in this application.
  • the precoding processing method defined in the 3GPP protocol TS 36.211 can be adopted.
  • the data transmitting device separately performs physical resource mapping on the precoded at least one symbol sequence, and finally generates SC-FDMA symbols on different antenna ports, and transmits them.
  • physical resource mapping and the SC-FDMA refer to the embodiment corresponding to FIG. 4 or FIG. 5, and details are not described herein again.
  • FIG. 7 is a schematic flowchart of a method for processing data at a receiving end according to an embodiment of the present disclosure.
  • the data receiving device receives at least one SC-FDMA symbol; obtaining a time domain first symbol sequence by processing the at least one SC-FDMA symbol, the first symbol sequence comprising 2M symbols, and M being an integer greater than or equal to one.
  • the data receiving device after receiving the at least one SC-FDMA symbol, performs a de-CP and FFT operation on the at least one SC-FDMA symbol to obtain a frequency domain symbol sequence (referred to as a fourth symbol sequence), where The fourth symbol sequence includes Q symbols, and Q is an integer greater than or equal to 1.
  • performing FFT on the at least one SC-FDMA symbol to obtain a fourth symbol sequence and further, acquiring, after the FFT, symbols in the fourth symbol sequence from corresponding physical resources.
  • the data receiving device may perform channel estimation, equalization, and processing that may be required in other receivers on the fourth symbol sequence.
  • the data receiving device multiplies the fourth symbol sequence by a window function, wherein the pair of the fourth symbol sequence
  • the column is multiplied by a window function to multiply each symbol in the fourth sequence of symbols one by one by a weight.
  • the window function may be a rectangular window, a SRRC window function, a Kaiser window function, etc., which is not limited in this application.
  • the purpose of windowing the fourth symbol sequence by the data receiving device is to implement a receiver. Matching filtering.
  • the window function can be implemented in the form of a sequence or a matrix containing Q window function elements. It can be understood that the operation of multiplying the window function may also be omitted, which is not limited in this application.
  • the data receiving device performs a sequence extension or sequence shortening operation by multiplying the fourth symbol sequence after the window function (or the fourth symbol sequence not multiplied by the window function) to obtain a fifth symbol sequence, the fifth The symbol sequence contains 2M symbols.
  • the fourth symbol sequence after the window function may be subjected to a sequence expansion operation
  • the band may be The spreading sequence is supplemented by 2M-Q symbols, the complemented symbol position being the same as the symbol position where the data transmitting device zeros when multiplying the frequency domain symbol sequence by the window function.
  • the location or rule that specifically supplements the 2M-Q symbols may be notified by signaling or message, or may be pre-agreed.
  • the added 2M-Q symbols may all be zero, or may be other determined symbol values.
  • the sequence shortening operation may be performed on the fourth symbol sequence after multiplication by the window function (or the fourth symbol sequence not multiplied by the window function).
  • the cyclically added operation may be performed on the shortened sequence, where the cyclic addition operation refers to a cyclic extension operation corresponding to the originating end, and the symbol extended when the originating loop expansion operation is added to the sequence that is not cyclically extended Symbolically, the number of symbols that are the same as the length of the sequence that is not cyclically extended is finally obtained.
  • the originator cyclically expands the sequence ⁇ a, b, c ⁇ to obtain the sequence ⁇ a, b, c, a, b, c, a ⁇ and sends it, and the originator receives the corresponding sequence ⁇ a', b'. , c', a'', b'', c'', a''' ⁇ , perform a loop plus back operation to get the sequence ⁇ a'+a''+a''',b'+b'' , c'+c'' ⁇ .
  • the fifth symbol sequence and the fourth symbol sequence after the multiplication by the window function (or the unmultiplied window function) The fourth symbol sequence) is the same.
  • the information of Q and M may be notified by signaling or other possible messages between the data sending device and the data receiving device, or may be pre-agreed.
  • the information of the Q and the M may include at least one of information of M, information of Q, and proportional relationship information of Q and M.
  • the data receiving device is a user equipment, and the data receiving device receives at least one of information of M, information of Q, and proportional relationship information of M and Q transmitted by a data transmitting device (eg, a base station).
  • the data receiving device is a base station, and the data receiving device transmits information of M, at least one of information of Q and proportional relationship information of M and Q to a data transmitting device (eg, user equipment).
  • the information of the M, the information of the Q, and the proportional relationship information of the M and the Q may be numerical information or other information capable of reflecting the value thereof; of course, one or more of the above information may also be Can be agreed in advance.
  • the information of the M, the information of the Q, and the proportional relationship information of the M and the Q may be numerical information or other information capable of reflecting the value thereof; of course, one or more of the above information may also be Can be agreed in advance.
  • the data receiving device performs IDFT of 2M points on the fifth symbol sequence to obtain the first symbol sequence.
  • the data receiving device obtains the time domain first symbol sequence by processing the at least one SC-FDMA symbol, and may further include a de-precoding process.
  • the data receiving device after performing FFT on the at least one SC-FDMA symbol, the data receiving device obtains at least one symbol sequence on a physical resource corresponding to each antenna port, and de-precodes the at least one symbol sequence. Processing, obtaining the fourth symbol sequence.
  • the data receiving device phase derotates the symbols in the first symbol sequence to obtain a second symbol sequence.
  • the data receiving device multiplies each symbol in the first sequence of symbols by a phase derotation factor Where j is the imaginary unit and e is the base of the natural logarithm.
  • the phase of the phase rotation factor satisfies:
  • n k are arbitrary integers.
  • phase derotation can also be implemented by multiplying a phase rotation matrix
  • the phase rotation matrix is Diag[] means that K is a diagonal element in order a diagonal matrix in which j is an imaginary unit and e is the base of the natural logarithm.
  • the phase of the phase rotation factor satisfies:
  • n k are arbitrary integers.
  • n k in the above formula may be notified by signaling between the data sending device and the data receiving device, or may be pre-agreed.
  • the data receiving device is a base station, and the data receiving device may notify the value of the data sending device (eg, the user equipment) n k or related information, and may also pre-arrange the value of n k or related information;
  • the data receiving device is a user equipment, and the data receiving device may receive signaling or a message of a data sending device (eg, a base station), and learn the value of n k or related from the signaling or the message. Information, you can also pre-agreed the value of n k or related information.
  • the data receiving device combines the real parts of the symbols in the second symbol sequence as real and imaginary parts, respectively, to obtain a third symbol sequence, the third symbol sequence including M complex symbols.
  • the manner in which the data receiving device acquires the third symbol sequence from the second symbol sequence depends on the mode of operation when the data transmitting device performs the real imaginary part separation.
  • the real part of the symbol in the second symbol sequence is sequentially combined into a complex symbol in the third symbol sequence, that is, a sequence formed by the real part of the symbol in the second symbol sequence.
  • the rule for generating the third symbol sequence by the second symbol sequence may be notified by signaling between the data sending device and the data receiving device, or may be pre-agreed.
  • the data receiving device is a base station, and the data receiving device may notify the data transmitting device (eg, the user equipment) that the third symbol sequence is generated by the second symbol sequence, or may pre-arrange the third symbol sequence.
  • the data receiving device is a user equipment, and the data receiving device may receive signaling or a message of a data transmitting device (eg, a base station), and learn from the signaling or message by the second
  • the symbol sequence generates a rule of the third symbol sequence, and a specific rule for generating the third symbol sequence may also be pre-agreed.
  • the data receiving device demodulates the third symbol sequence to obtain a demodulated bit sequence.
  • the specific demodulation method is not limited in this application, and may be consistent with the modulation mode of the originating end.
  • the modulation mode of the originating end may refer to the description of the embodiment corresponding to FIG. 2, and details are not described herein again.
  • the third symbol sequence may be layer-mapped to obtain a sequence of symbols to be demodulated, and then demodulated with a demodulated symbol sequence. , a demodulated bit sequence is obtained.
  • the numbering of the symbol sequence in the present application is only for clarity of description and is not intended to be limiting.
  • the same numbered symbol sequences in different embodiments may be the same or different.
  • the sequence of symbols involved in the processing of the data receiving device may be different from the sequence of symbols of the same number involved in the processing of the data transmitting device, such as the first symbol sequence and the data receiving device in the data transmitting device.
  • the first symbol sequence may be different.
  • each network element such as a data transmitting device (network side device or UE), a data receiving device (UE or network side device), etc., in order to implement the above functions, includes a corresponding hardware structure for performing each function and/or Software module.
  • UE data transmitting device
  • UE data receiving device
  • the present application can be implemented in a combination of hardware or hardware and computer software in combination with the elements and algorithm steps of the various examples described in the embodiments disclosed herein. Whether a function is implemented in hardware or computer software to drive hardware depends on the specific application and design constraints of the solution. A person skilled in the art can use different methods to implement the described functions for each particular application, but such implementation should not be considered to be beyond the scope of the present application.
  • FIG. 8 is a schematic diagram showing a possible structure of a data transmitting device involved in the above embodiment.
  • the data sending device may be a network side device, for example, may be a base station or other network side device having a base station function; or may be a user equipment; or other devices having data sending functions. .
  • the structure of the data transmitting device includes a processor and a transmitter.
  • the receiver of the data transmitting device may also include a receiver.
  • the structure of the data transmitting device may further include a communication interface for supporting communication with other network side devices, such as with a core network node. Communication.
  • the structure of the data transmitting device may further include a memory for coupling with the processor to save necessary program instructions and data of the data transmitting device.
  • the structure of the data transmitting device involved in the present application includes a transmitter 801, a receiver 802, a processor 803, and a memory 804.
  • data or information to be transmitted is processed by a transmitter 801 and an uplink signal is generated, which is transmitted via an antenna to the data receiving device described in the above embodiments. .
  • the antenna receives the downlink signal (including the above data and/or control information) transmitted by the data receiving device in the above embodiment, and the receiver 802 processes the signal received from the antenna and provides input samples.
  • the service data and the signaling message are processed, for example, data to be transmitted, SC-FDMA symbol generation, and the like.
  • the transmitter, receiver, and processor perform processing of data and/or signals in accordance with radio access technologies employed by the radio access network (e.g., access technologies of LTE and other evolved systems).
  • the processor 803 is further configured to perform control management on an action of the data sending device, and is used to perform processing performed by the data sending device in the foregoing embodiment, for example, to control the data sending device to process the sent data and/or perform the process. Other processes for applying the described techniques.
  • the processor 803 is further configured to support the data transmitting device to perform the processing involved in the data transmitting device in FIGS. 2-6.
  • the memory 804 is used to store program codes and data for the data transmitting device.
  • Fig. 9 is a simplified schematic diagram showing one possible design structure of the data receiving apparatus involved in the above embodiment.
  • the data receiving device may be a network side device, for example, may be a base station or other network side device having a base station function; or may be a user equipment; or other devices having data receiving functions. .
  • the structure of the data receiving device includes a processor and a receiver.
  • a transmitter may also be included in the structure of the data receiving device.
  • the data receiving device may be a network side device, and the data receiving device may further include a communication interface for supporting the data receiving device to communicate with other network side devices, for example, Receiving information or instructions sent by other network side devices, and/or sending information or instructions to other network side devices.
  • the structure of the data receiving device may further include a memory for coupling with the processor to save necessary program instructions and data of the data receiving device.
  • the structure of the data receiving device according to the present application includes a transmitter/receiver 901, a processor 902, a memory 903, and a communication interface 904.
  • the transmitter/receiver 901 is configured to support the data receiving device and the data transmitting device described in the above embodiments
  • the information is transmitted and received, for example, by transmitting the data and/or control information mentioned above, and receiving the transmission data (such as SC-FDMA symbols) mentioned above.
  • the processor 902 performs various functions for communicating with a data transmitting device.
  • the processor 902 also performs the processing involved in the data receiving device of FIG. 7, such as receiving and processing SC-FDMA symbols.
  • the memory 903 is used to store program codes and data of the data receiving device.
  • the communication interface 904 is configured to support communication between the data receiving device and other network side devices, for example, an X2 interface, an S1 interface, and the like.
  • Figure 9 only shows a simplified design of the data receiving device.
  • the data receiving device may include any number of transmitters, receivers, processors, memories, etc., and all data receiving devices that can implement the present application are within the scope of the present application.
  • the processor for performing the above data transmitting device and data receiving device of the present application may be a central processing unit (CPU), a general purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), and a field programmable gate array ( FPGA) or other programmable logic device, transistor logic device, hardware component, or any combination thereof. It is possible to implement or carry out the various illustrative logical blocks, modules and circuits described in connection with the present disclosure.
  • the processor may also be a combination of computing functions, such as one or more microprocessor combinations, a combination of a DSP and a microprocessor, and the like.
  • the steps of a method or algorithm described in connection with the present disclosure may be implemented in a hardware or may be implemented by a processor executing software instructions.
  • the software instructions may be comprised of corresponding software modules that may be stored in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, removable hard disk, CD-ROM, or any other form of storage well known in the art.
  • An exemplary storage medium is coupled to the processor to enable the processor to read information from, and write information to, the storage medium.
  • the storage medium can also be an integral part of the processor.
  • the processor and the storage medium can be located in an ASIC. Additionally, the ASIC can be located in a data receiving device and/or a data transmitting device.
  • the processor and the storage medium may also be present as discrete components in the data receiving device and/or the data transmitting device.
  • the functions described herein can be implemented in hardware, software, firmware, or any combination thereof.
  • the functions may be stored in a computer readable medium or transmitted as one or more instructions or code on a computer readable medium.
  • Computer readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one location to another.
  • a storage medium may be any available media that can be accessed by a general purpose or special purpose computer.

Abstract

本申请涉及无线通信技术领域，尤其涉及一种数据处理方法、装置和系统。本申请提供了一种数据处理方法，数据发送设备调制待传输比特序列，并将调制获得的复数符号的实部和虚部分离成两个符号，构成符号序列，将所述符号序列中的符号经过相位旋转后，通过单载波频分多址(Single Carrier Frequency Division Multiple Access，SC-FDMA)符号进行发送。本申请旨在通过传输信号的实虚部分离降低正交频分复用(Orthogonal Frequency Division Multiplexing，OFDM)系统的发射信号峰均功率比(Peak-to-Average Power Ratio，PAPR)，从而提升整个传输系统的链路质量。

Description

一种数据处理方法、装置和系统 技术领域
本申请涉及无线通信技术领域，尤其涉及无线通信系统中的数据传输方法、装置和系统。
背景技术
基于正交频分复用(Orthogonal Frequency Division Multiplexing，OFDM)技术在对抗多径干扰、兼容多输入多输出(Multiple-Input Multiple-Output，MIMO)等方面的优势，当前无线通信系统较多的采用了该技术，如长期演进(Long Term Evolution，LTE)、全球微波互联接入(Worldwide Interoperability for Microwave Access，WiMAX)等系统。
但峰均功率比(Peak-to-Average Power Ratio，PAPR)高是OFDM系统的一个重要问题，较高的PAPR会导致发射信号通过功率放大器(Power Amplifier，PA)时产生信号畸变，在发射端产生额外矢量幅度误差(Error Vector Magnitude，EVM)，最终使接收端解调性能下降。为了减少发射信号EVM，实际发射功率通常需要做一定的回退，但发射功率的降低，也会导致接收端解调性能的下降。尤其是在下一代通信系统中，如第五代移动通信(the 5th Generation mobile communication，5G)，随着高频段的应用，PA的效率和最大发射功率大幅下降，对发射信号PAPR提出了更严峻的要求。
因此，需要一种基于OFDM系统的低PAPR的数据处理方法，提升链路质量。
发明内容
本文描述了一种数据处理方法、装置和系统，旨在通过传输信号的实虚部分离降低OFDM系统的发射信号PAPR，从而提升整个传输系统的链路质量。
第一方面，本申请提供一种数据处理方法，包括：数据发送设备调制待传输比特序列，获得第一符号序列，其中，所述第一符号序列包含M个复数符号，M为大于等于1的整数；将所述第一符号序列中的每个复数符号的实部和虚部分离成两个符号，获得第二符号序列，其中，所述第二符号序列包含2M个符号；将所述第二符号序列中的符号进行相位旋转，获得第三符号序列；使用所述第三符号序列生成至少一个单载波频分多址(Single Carrier Frequency Division Multiple Access，SC-FDMA)符号；发送所述至少一个SC-FDMA符号。其中，所述相位旋转实现第二符号序列中的符号正交化。通过将调制符号的虚实部分离，实现了时域符号的幅度均化，降低了待发送符号的峰值，从而降低了发射信号的PAPR。通过对实虚部分离后的符号序列进行相位旋转，可以实现符号序列中符号的正交化，减少符号之间的干扰，从而提升系统性能。
在一个可能的设计中，所述数据发送设备调制所述待传输比特序列后，还可以对经过调制的符号序列进行层映射，获得至少一个符号序列，其中，所述至少一个符号序列中包含所述第一符号序列。
在一个可能的设计中，所述使用所述第三符号序列生成至少一个SC-FDMA符号，包括：对所述第三符号序列进行2M点的离散傅里叶变换(Discrete Fourier Transform，DFT)，获得第四符号序列；使用所述第四符号序列生成至少一个SC-FDMA符号。使用第三符号序列的所有符号(2M个符号)进行DFT，完整保存了调制之后所有复数符号的信息，保证了传输性 能。可选的，使用所述第四符号序列生成至少一个SC-FDMA符号，可以将所述第四符号序列中的符号进行进一步的处理，例如，对第四符号序列进行加窗和/或扩展等操作，然后将处理后获得的符号序列进行快速傅里叶反变换(Inverse Fast Fourier Transformation，IFFT)，生成至少一个SC-FDMA符号。
在一个可能的设计中，使用所述第四符号序列生成至少一个SC-FDMA符号，具体包括：对所述第四符号序列乘以窗函数，获得包含Q个符号的第五符号序列，其中Q为大于等于1的整数，且2M≥Q≥M，其中，所述对所述第四符号序列乘以窗函数，为将所述第四符号序列中的每个符号逐一乘以一个权值；对所述第五符号序列进行快速傅里叶反变换(Inverse Fast Fourier Transformation，IFFT)，生成至少一个SC-FDMA符号。可选的，所述窗函数可以是矩形窗、平方根升余弦(Square Root Raised Cosine，SRRC)窗函数、Kaiser窗函数等，本申请对此不做限定，所述窗函数可以通过序列或矩阵的形式实现，其中包含Q个窗函数元素，所述第四符号序列乘以窗函数后，取与所述Q个窗函数元素相乘的连续符号，作为所述第五符号序列。可选的，所述数据发送设备还可以对所述第五符号序列进行资源映射，即将第五符号序列中的符号分别映射到所述至少一个SC-FDMA符号所对应的物理资源上，再通过IFFT生成所述至少一个SC-FDMA符号。
在又一个可能的设计中，所述使用所述第四符号序列生成至少一个SC-FDMA符号，具体包括：取第四符号序列中的任意Q个连续符号乘以窗函数，获得包含Q个符号的第五符号序列，其中Q为大于等于1的整数，且2M≥Q≥M，其中，所述对所述第四符号序列乘以窗函数，为将所述第四符号序列中的每个符号逐一乘以一个权值；对所述第五符号序列进行快速傅里叶反变换(Inverse Fast Fourier Transformation，IFFT)，生成至少一个SC-FDMA符号。所述窗函数中包含Q个窗函数元素，窗函数的类型不做限制。可选的，所述数据发送设备还可以对所述第五符号序列进行资源映射，即将第五符号序列中的符号分别映射到所述至少一个SC-FDMA符号所对应的物理资源上，再通过IFFT生成所述至少一个SC-FDMA符号。
在另一个可能的设计中，所述使用所述第四符号序列生成至少一个SC-FDMA符号，包括：对所述第四符号序列进行循环扩展，获得包含P个符号的第五符号序列，其中P为大于等于2的整数，且P≥2M；对所述第五符号序列乘以窗函数，获得包含Q个符号的第六符号序列，其中Q为大于等于1的整数，且P≥Q≥M；对所述第六符号序列进行快速傅里叶反变换(Inverse Fast Fourier Transformation，IFFT)，生成至少一个SC-FDMA符号。可选的，所述窗函数可以是矩形窗、SRRC窗函数、Kaiser窗函数等，本申请对此不做限定，所述窗函数可以通过序列或矩阵的形式实现，其中包含Q个窗函数元素，所述第五符号序列乘以窗函数后，取与所述Q个窗函数元素相乘的连续符号，作为所述第六符号序列。可选的，所述数据发送设备还可以对所述第六符号序列进行资源映射，将第六符号序列中的符号分别映射到所述至少一个SC-FDMA符号所对应的物理资源上，再通过IFFT生成所述至少一个SC-FDMA符号。其中，对符号序列进行循环扩展，是指通过循环重复所述符号序列获得长度大于等于原符号序列的扩展符号序列，例如，记经过DFT后的符号序列为dDFT，其中的符号记为dDFT(m),m＝0,…2M-1，则将dDFT进行循环扩展后的符号序列中的符号为dCE(n)＝dDFT(mod(n,2M)),n＝0,…,P-1，其中2M为经过DFT后的符号序列长度，P为循环扩展后的符号序列长度P≥2M，mod(n,2M)意为n对2M取余数操作。对经过DFT的频域符号序列进行循环扩展，可以通过占用额外的频域带宽进一步获得降低PAPR的效果。可以理解的，还可以在第五符号序列中取任意Q个连续的符号乘以窗函数，获得所述第六符号序列。
在再一个可能的设计中，所述使用所述第四符号序列生成至少一个SC-FDMA符号，包括： 对所述第四符号序列进行循环扩展，获得包含Q个符号的第五符号序列，其中Q为大于等于2的整数，且Q≥2M；对所述第五符号序列乘以窗函数，获得包含Q个符号的第六符号序列；对所述第六符号序列进行快速傅里叶反变换(Inverse Fast Fourier Transformation，IFFT)，生成至少一个SC-FDMA符号。可选的，所述窗函数可以是矩形窗、SRRC窗函数、Kaiser窗函数等，本申请对此不做限定，所述窗函数可以通过序列或矩阵的形式实现，其中包含Q个窗函数元素。可选的，所述数据发送设备还可以对所述第六符号序列进行资源映射，将第六符号序列中的符号分别映射到所述至少一个SC-FDMA符号所对应的物理资源上，再通过IFFT生成所述至少一个SC-FDMA符号。其中，对符号序列进行循环扩展，是指通过循环重复所述符号序列获得长度大于等于原符号序列的扩展符号序列，例如，记经过DFT后的符号序列为dDFT，其中的符号记为dDFT(m),m＝0,…2M-1，则将dDFT进行循环扩展后的符号序列中的符号为dCE(n)＝dDFT(mod(n,2M)),n＝0,…,Q-1，其中2M为经过DFT后的符号序列长度，Q为循环扩展后的符号序列长度Q≥2M，mod(n,2M)意为n对2M取余数操作。
在一个可能的设计中，所述数据发送设备还可以在进行资源映射之前进行预编码，结合上述可能的设计方式，数据发送设备可以将与所述窗函数相乘之后得到的符号序列进行预编码，得到至少一个天线端口上传输的符号序列，将每一个天线端口上的符号序列分别进行物理资源映射并经过IFFT生成至少一个SC-FDMA。
在一个可能的设计中，所述将所述第二符号序列中的符号进行相位旋转，包括：为所述第二符号序列中的每个符号乘以一个相位旋转因子
Figure PCTCN2017103181-appb-000001
其中，j为虚数单位，e是自然对数的底，
Figure PCTCN2017103181-appb-000002
为相位旋转因子的相位，满足：
Figure PCTCN2017103181-appb-000003
其中，k＝0,1,2,…,2M-1，nk为任意整数。所述以上述公式为基础的相位旋转，支持不同序列长度的相位旋转，保证了不同序列长度时，符号之间的正交性和符号的实部和虚部之间的正交性，从而减少符号间干扰，提升系统性能。
可选的，在不同的k值时，所述nk的取值可以相同也可以不相同。在一个可能的设计中，数据发送设备为基站，所述数据发送设备可以通知数据接收设备(如，用户设备)nk的取值或者相关信息，也可以预先约定nk的取值或者相关信息，本申请对此不做限制；或者，数据发送设备为用户设备，所述数据发送设备可以接收数据接收设备(如，基站)的信令或消息，并从所述信令或消息中获知nk的取值或者相关信息，也可以预先约定nk的取值或者相关信息，本申请对此不做限制。
在一个可能的设计中，所述数据发送设备调制待传输比特序列，包括：使用π/4旋转二进制相移键控(Binary Phase Shift Keying，BPSK)、正交相移键控(Quadrature Phase Shift Keying，QPSK)以及正交振幅调制(Quadrature Amplitude Modulation，QAM)调制方式中的至少一种对待传输比特进行调制。其中，所述π/4旋转BPSK调制方式是指在BPSK调制方式基础上将其星座图(Constellation Diagram)进行π/4或-π/4旋转。使用π/4旋转BPSK、QPSK、QAM等调制方式，可以在调制符号实虚部分离的过程中实现时域符号幅度均化的效果，从而降低发射信号的PAPR。可以理解的，本申请中所述的调制还可以采用其他的调制方式，例如，基于BPSK、QPSK、或者QAM调制方式进行优化产生的调制方式，如偏移正交相移键控(Offset QPSK，OQPSK)、差分相移键控(Differential Phase-Shift Keying，DPSK)等，本申请对此不做限定。
在一个可能的设计中，所述数据发送设备调制待传输比特序列，包括：使用π/4旋转二进制相移键控(Binary Phase Shift Keying，BPSK)对待传输比特进行调制，其中，所述π/4旋转BPSK调制方式为，对BPSK调制星座图进行+π/4旋转或-π/4旋转的调制方式；且以至少一个SC-FDMA符号为一个时间单位，不同时间单位内的待传输比特序列随机使用对BPSK调制星座图进行+π/4旋转的调制方式或对BPSK调制星座图进行-π/4旋转的调制方式进行调制，同一时间单位内的待传输比特使用相同的旋转方式。在另一个可能的设计中，上述不同时间单位内的待传输比特序列，也可以交替的使用对BPSK调制星座图进行+π/4旋转的调制方式和对BPSK调制星座图进行-π/4旋转的调制方式。例如，可以一个SC-FDMA符号为一个时间单位，第l个SC-FDMA符号中的比特序列使用对BPSK调制星座图进行+π/4旋转的调制方式进行调制，第l+1个SC-FDMA符号中的比特序列使用对BPSK调制星座图进行-π/4旋转的调制方式进行调制，第l+2个SC-FDMA符号中的比特序列使用对BPSK调制星座图进行+π/4旋转的调制方式进行调制，以此类推，其中l≥0，为SC-FDMA符号索引。再例如，仍以一个SC-FDMA符号为一个时间单位，符号索引为奇数的SC-FDMA符号使用对BPSK调制星座图进行+π/4旋转的调制方式进行调制，符号索引为偶数的SC-FDMA符号使用对BPSK调制星座图进行-π/4旋转的调制方式进行调制。在不同的时间单位内，随机或者交替的使用不同的旋转调制方式，可以使得在一定的统计时间段内，使用+π/4和-π/4旋转方式进行调制的SC-FDMA符号数基本相同，进而减少频谱泄露，提升频谱效率。其中，一定的统计时间段内包含至少两个上述时间单位。
在一个可能的设计中，所述将所述第一符号序列中的每个复数符号的实部和虚部分离成两个符号，获得第二符号序列，其中，第二符号序列中的符号为第一符号序列中符号的实部和虚部交替排列构成。可选的，第二符号序列中的符号为第一符号序列中符号的实部和虚部按顺序交替排列构成，记所述第一符号序列为d，d满足：d＝[d0,d1,…,dM-1]；记所述第二符号序列为doffset，doffset满足：
doffset＝[Re{d0},Im{d0},Re{d1},Im{d1}…,Re{dM-1},Im{dM-1}]，其中Re{}表示取实部操作，Im{}表示取虚部操作。
可选的，数据发送设备为基站，所述数据发送设备可以通知数据接收设备(如，用户设备)由第一符号序列生成第二符号序列的规则，也可以预先约定生成第二符号序列的具体规则，本申请对此不做限制；或者，数据发送设备为用户设备，所述数据发送设备可以接收数据接收设备(如，基站)的信令或消息，并从所述信令或消息中获知由第一符号序列生成第二符号序列的规则，也可以预先约定生成第二符号序列的具体规则，本申请对此不做限制。
在一个可能的设计中，所述数据发送设备为基站，所述数据发送设备发送M的信息，Q的信息以及M和Q的比例关系信息中的至少一个给数据接收设备(如，用户设备)。Q和M的取值或者Q和M的比例关系，可以根据系统需求进行动态调整，从而动态的调整PAPR。
在一个可能的设计中，所述数据发送设备为用户设备，所述数据发送设备接收M的信息，Q的信息以及M和Q的比例关系信息中的至少一个。
可以理解的，所述M的信息，Q的信息以及M和Q的比例关系信息，可以是数值信息，也可以是能体现其取值的其他信息；当然，上述信息中的一个或者多个也可以预先约定。可选的，网络侧设备可以在一次数据传输起始之前、用户设备接入时、进行资源分配时等时机发送上述信息，也可以在数据传输过程中根据需要发送上述信息，从而实现PAPR的动态调整。
第二方面，本申请提供了一种数据处理方法，包括：数据接收设备接收至少一个单载波频分多址(Single Carrier Frequency Division Multiple Access，SC-FDMA)符号；通过 处理所述至少一个SC-FDMA符号获得时域第一符号序列，所述第一符号序列包含2M个符号，M为大于等于1的整数；将所述第一符号序列中的符号进行相位解旋转，获得第二符号序列；将所述第二符号序列中符号的实部分别作为实部和虚部进行组合，获得第三符号序列，所述第三符号序列包含M个复数符号；对所述第三符号序列进行解调，获得解调比特序列。
在一个可能的设计中，所述数据接收设备解调所述第三符号序列后，还可以对所述第三符号序列进行解层映射，获得待解调符号序列，再对带解调符号序列进行解调，获得解调比特序列。
在一个可能的设计中，所述通过处理所述至少一个SC-FDMA符号获得时域第一符号序列，包括：对所述至少一个SC-FDMA符号进行快速傅里叶变换(Fast Fourier Transformation，FFT)，获得第四符号序列，其中，所述第四符号序列中包含Q个符号，Q为大于等于1的整数；将所述第四符号序列乘以窗函数；将乘以窗函数后的第四符号序列进行序列延长或者序列缩短操作，获得第五符号序列，所述第五符号序列中包含2M个符号，其中，所述对所述第四符号序列乘以窗函数，为将所述第四符号序列中的每个符号逐一乘以一个权值；对第五符号序列进行2M点的离散傅里叶反变换(Inverse Discrete Fourier Transform，IDFT)，获得所述第一符号序列。可选的，所述窗函数可以是矩形窗、平方根升余弦(Square Root Raised Cosine，SRRC)窗函数、Kaiser窗函数等，本申请对此不做限定，所述窗函数可以通过序列或矩阵的形式实现，其中包含Q个窗函数元素。其中，当Q<2M时，可以对乘以窗函数之后的第四符号序列进行序列扩展操作，具体的，可以对带扩展序列补充2M-Q个符号，所补充的符号位置与数据发送设备对频域符号序列乘以窗函数时置零的符号位置相同。可选的，具体补充符号的位置或者规则可以通过信令或消息通知，也可以预先约定。当Q>2M时，可以对乘以窗函数之后的第四符号序列进行序列缩短操作。具体的，可以对待缩短的序列进行循环加回操作，所述循环加回操作，是指对应发端的循环扩展操作，将发端循环扩展操作时扩展出的符号，加回到未经循环扩展的序列符号上，最终获得与未经循环扩展的序列长度相同的符号个数。可选的，对所述至少一个SC-FDMA符号进行快速傅里叶变换(Fast Fourier Transformation，FFT)，获得第四符号序列，还包括在FFT之后从对应的物理资源上获取所述第四符号序列中的符号。
在一个可能的设计中，所述数据接收设备通过处理所述至少一个SC-FDMA符号获得时域第一符号序列，还可以包括解预编码处理，结合上述可能的设计方式，数据接收设备对所述至少一个SC-FDMA符号进行FFT之后，在每个天线端口所对应的物理资源上获得至少一个符号序列，并将所述至少一个符号序列进行解预编码处理，获得所述第四符号序列。
在一个可能的设计中，所述将所述第一符号序列中的符号进行相位解旋转，包括：为所述第一符号序列中的每个符号乘以一个相位解旋转因子
Figure PCTCN2017103181-appb-000004
其中，j为虚数单位，e是自然对数的底，
Figure PCTCN2017103181-appb-000005
为相位旋转因子的相位，满足：
Figure PCTCN2017103181-appb-000006
其中，k＝0,1,2,…,2M-1，nk为任意整数。
可选的，数据接收设备为基站，所述数据接收设备可以通知数据发送设备(如，用户设备)nk的取值或者相关信息，也可以预先约定nk的取值或者相关信息，本申请对此不做限制；或者，数据接收设备为用户设备，所述数据接收设备可以接收数据发送设备(如，基站)的信令或消息，并从所述信令或消息中获知nk的取值或者相关信息，也可以预先约定nk的取值 或者相关信息，本申请对此不做限制。
在一个可能的设计中，将所述第二符号序列中符号的实部分别作为实部和虚部进行组合，获得第三符号序列。可选的，所述第二符号序列中的符号的实部按顺序依次组合成第三符号序列中的复数符号，即所述第二符号序列中符号的实部构成的序列
Figure PCTCN2017103181-appb-000007
满足：
Figure PCTCN2017103181-appb-000008
记所述第三符号序列为
Figure PCTCN2017103181-appb-000009
则
Figure PCTCN2017103181-appb-000010
满足：
Figure PCTCN2017103181-appb-000011
可选的，数据接收设备为基站，所述数据接收设备可以通知数据发送设备(如，用户设备)由第二符号序列生成第三符号序列的规则，也可以预先约定生成第三符号序列的具体规则，本申请对此不做限制；或者，数据接收设备为用户设备，所述数据接收设备可以接收数据发送设备(如，基站)的信令或消息，并从所述信令或消息中获知由第二符号序列生成第三符号序列的规则，也可以预先约定生成第三符号序列的具体规则，本申请对此不做限制。
在一个可能的设计中，所述数据接收设备为用户设备，所述数据接收设备接收数据发送设备(如，基站)发送的M的信息，Q的信息以及M和Q的比例关系信息中的至少一个。
在一个可能的设计中，所述数据接收设备为基站，所述数据接收设备发送M的信息，Q的信息以及M和Q的比例关系信息中的至少一个给数据发送设备(如，用户设备)。
可选的，网络侧设备可以在一次数据传输起始之前、用户设备接入时、进行资源分配时等时机发送上述M的信息，Q的信息以及M和Q的比例关系信息中的至少一个，也可以在数据传输过程中根据需要发送所述信息，从而实现PAPR的动态调整。
第三方面，本申请提供了一种数据发送设备，该数据发送设备具有实现上述方法实际中数据发送设备行为的功能。所述功能可以通过硬件实现，也可以通过硬件执行相应的软件实现。所述硬件或软件包括一个或多于一个与上述功能相对应的模块。可选的，该数据发送设备可以是一种网络侧设备，如基站，也可以是一种用户设备。
第四方面，本申请提供了一种数据接收设备，该数据接收设备具有实现上述方法实际中数据接收设备行为的功能。所述功能可以通过硬件实现，也可以通过硬件执行相应的软件实现。所述硬件或软件包括一个或多于一个与上述功能相对应的模块。可选的，该数据接收设备可以是一种网络侧设备，如基站，也可以是一种用户设备。
第五方面，本申请提供了一种数据发送设备，数据发送设备的结构中包括处理器和发射器。所述处理器被配置为支持数据发送设备执行上述方法中相应的功能，例如生成或处理上述方法中所涉及的数据和/或信息。所述发射器用于支持数据发送设备向数据接收设备发送上述方法中所涉及的数据、信息或者指令，例如，通过SC-FDMA符号向数据接收设备发送待传输数据。在一个可能的设计中，所述数据发送设备还可以包括接收器，所述接收器用于接收数据接收设备所发送的信息或指令。在一个可能的设计中，所述数据发送设备可以是一种网络侧设备，所述数据发送设备还可以包括通信接口，所述通信接口用于支持数据发送设备与其他网络侧设备进行通信，例如接收其他网络侧设备所发送的信息或指令，和/或发送信息或指令给其他网络侧设备。在一个可能的设计中，所述数据发送设备的结构中还可以包括存储器，所述存储器用于与处理器耦合，保存数据发送设备必要的程序指令和数据。
第六方面，本申请提供了一种数据接收设备，数据接收设备的结构中包括处理器和接收器。所述处理器被配置为支持数据接收设备执行上述方法中相应的功能，例如生成或处理上述方法中所涉及的数据和/或信息。所述接收器用于支持数据接收设备接收上述方法中所涉及的数据和/或信息。在一个可能的设计中，数据接收设备的结构中还可以包括发射器，用于向数据发送设备发送所需的信息或指令。在一个可能的设计中，所述数据接收设备可以是一种 网络侧设备，所述数据接收设备还可以包括通信接口，所述通信接口用于支持数据接收设备与其他网络侧设备进行通信，例如接收其他网络侧设备所发送的信息或指令，和/或发送信息或指令给其他网络侧设备。在一个可能的设计中，所述数据接收设备的结构中还可以包括存储器，所述存储器用于与处理器耦合，保存数据接收设备必要的程序指令和数据。
第七方面，本申请提供了一种通信系统，该系统包括上述方面所述的数据发送设备和数据接收设备。
第八方面，本申请提供了一种计算机存储介质，用于储存为上述数据发送设备所用的计算机软件指令，其包含用于执行上述方面所设计的程序。
第九方面，本申请提供了一种计算机存储介质，用于储存为上述数据接收设备所用的计算机软件指令，其包含用于执行上述方面所设计的程序。
第十方面，本申请提供了一种芯片系统，该芯片系统包括处理器，用于支持数据发送设备实现上述方面中所涉及的功能，例如，例如生成或处理上述方法中所涉及的数据和/或信息。在一种可能的设计中，所述芯片系统还包括存储器，所述存储器，用于保存数据发送设备必要的程序指令和数据。该芯片系统，可以由芯片构成，也可以包含芯片和其他分立器件。
第十一方面，本申请提供了一种芯片系统，该芯片系统包括处理器，用于支持数据接收设备实现上述方面中所涉及的功能，例如，例如接收或处理上述方法中所涉及的数据和/或信息。在一种可能的设计中，所述芯片系统还包括存储器，所述存储器，用于保存数据接收设备必要的程序指令和数据。该芯片系统，可以由芯片构成，也可以包含芯片和其他分立器件。
相较于现有技术，本申请描述了一种数据处理方法、装置和系统，旨在通过传输信号的实虚部分离降低OFDM系统的发射信号峰均功率比(Peak-to-Average Power Ratio，PAPR)，从而提升整个传输系统的链路质量。
附图说明
下面将参照所示附图对本申请实施例进行更详细的描述。
图1为本申请的一种可能的应用场景示意图；
图2为本申请实施例提供的一种数据处理方法的流程示意图；
图3为本申请实施例提供的一种π/4旋转BPSK星座图；
图4为本申请实施例提供的另一种数据处理方法的流程示意图；
图5为本申请实施例提供的又一种数据处理方法的流程示意图；
图6为本申请实施例提供的再一种数据处理方法的流程示意图；
图7为本申请实施例提供的一种接收端数据处理方法的流程示意图；
图8为本申请实施例提供的一种数据发送设备结构示意图；
图9为本申请实施例提供的一种数据接收设备结构示意图。
具体实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行描述。
本申请实施例描述的网络架构以及业务场景是为了说明本申请实施例的技术方案，并不构成对本申请实施例提供的技术方案的限定，本领域普通技术人员可知，随着网络架构的演变和新业务场景的出现，本申请实施例提供的技术方案对于类似的技术问题，同样适用。
本申请描述的技术可以适用于LTE系统以及后续的演进系统如第五代移动通信(the 5th Generation mobile communication，5G)等，或其他采用正交频分复用(Orthogonal Frequency Division Multiplexing，OFDM)接入技术的无线通信系统，尤其适用于需要降低发射信号峰均功率比(Peak-to-Average Power Ratio，PAPR)的通信系统。如图1所示，是本申请的一种可能的应用场景示意图。用户设备(User Equipment，UE)通过无线接口接入网络侧设备进行通信，也可以与另一用户设备进行通信，如设备对设备(Device to Device，D2D)或机器对机器(Machine to Machine，M2M)场景下的通信。网络侧设备可以与用户设备通信，也可以与另一网络侧设备进行通信，如宏基站和接入点之间的通信。本申请中，名词“网络”和“系统”经常交替使用，但本领域的技术人员可以理解其含义。本申请所涉及到的用户设备可以包括各种具有无线通信功能的手持设备、车载设备、可穿戴设备、计算设备、控制设备或连接到无线调制解调器的其它处理设备，以及各种形式的UE、移动台(Mobile station，MS)、终端(Terminal)或终端设备(Terminal Equipment)等。为方便描述，本申请中，上面提到的设备统称为用户设备(UE)。本申请所涉及到的网络侧设备包括基站(Base Station，BS)、网络控制器或移动交换中心等，其中通过无线信道与用户设备进行直接通信的装置通常是基站，所述基站可以包括各种形式的宏基站、微基站、中继站、接入点或射频拉远单元(Remote Radio Unit，RRU)等，当然，与用户设备进行无线通信的也可以是其他具有无线通信功能的网络侧设备，本申请对此不做唯一限定。在不同系统中，具备基站功能的设备的名称可能会有所不同，例如在LTE网络中，称为演进的节点B(evolved NodeB，eNB或eNodeB)，在第三代(the 3rd Generation，3G)网络中，称为节点B(Node B)等。
本申请所提供的技术方案可以应用于上行数据传输和/或下行数据传输，对于上行数据传输，数据发送设备可以是用户设备，数据接收设备可以是网络侧设备，如基站；对于下行数据传输，数据发送设备可以是网络侧设备，如基站，数据接收设备可以是用户设备。
下面对本申请实施例中所涉及到的一些通用概念或者定义做出解释，需要说明的是，本文中的一些英文简称为以LTE系统为例对本申请实施例进行的描述，其可能随着网络的演进发生变化，具体演进可以参考相应标准中的描述。
本申请中所述的单载波频分多址(Single Carrier Frequency Division Multiple Access，SC-FDMA)符号，可以通过离散傅里叶变换扩展正交频分复用(DFT-spread OFDM，DFT-s-OFDM)方法实现，也可以通过带频谱成形的离散傅里叶变换扩展正交频分复用(DFT-spread OFDM with spectrum shaping，DFT-s-OFDM SS)方法实现，也可以通过其他可以生成SC-FDMA符号的方法实现，本申请对此不做限定。
本申请中所述的快速傅里叶变换(Fast Fourier Transformation，FFT)是实现离散傅里叶变换(Discrete Fourier Transform，DFT)的一种快速算法，本申请中所述的FFT也可以替换成其他可以实现傅里叶变换的算法，本申请对此不做限定。快速傅里叶反变换(Inverse Fast Fourier Transformation，IFFT)是实现离散傅里叶反变换(Inverse Discrete Fourier Transform，IDFT)的一种快速算法本申请中所述的IFFT也可以替换成其他可以实现傅里叶反变换的算法，本申请对此不做限定。
本申请中所述的“数据”，通常情况下指业务数据，但也可以包括系统需要传输的信令、消息等内容，例如，参考信号、上下行控制消息等。
本申请中术语“和/或”，仅仅是一种描述关联对象的关联关系，表示可以存在三种关系，例如，A和/或B，可以表示：单独存在A，同时存在A和B，单独存在B这三种情况。另外，本文中字符“/”，一般表示前后关联对象是一种“或”的关系。
下面将结合附图，对本申请实施例所提供的方案进行更为详细的描述。
图2为本申请实施例提供的一种数据处理方法的流程示意图。
数据发送设备调制待传输比特序列，获得第一符号序列，其中，所述第一符号序列包含M个复数符号，M为大于等于1的整数；将所述第一符号序列中的每个复数符号的实部和虚部分离成两个符号，获得第二符号序列，其中，所述第二符号序列包含2M个符号；将所述第二符号序列中的符号进行相位旋转，获得第三符号序列；使用所述第三符号序列生成至少一个单载波频分多址SC-FDMA符号；发送所述至少一个SC-FDMA符号。
可选的，数据处理装置(例如，数据发送设备)也可以直接根据待传输比特序列获得一个符号序列，其中，所述符号序列中的符号为经过分离的复数符号序列的实部和虚部。
在一个示例中，数据发送设备将待发送的比特序列经过调制后，获得调制后的包含M(M≥1)个复数符号的符号序列，然后将所述复数符号序列中的每个复数符号的实部和虚部进行分离，将所获得的实部和虚部按照一定的顺序排放，获得一个长度为2M的符号序列，再将长度为2M的符号序列中的符号进行相位旋转，以便实现符号之间的正交化，减少符号间干扰，经过相位旋转的符号序列中的全部或者部分符号最终会通过SC-FDMA符号的形式进行发送。
可选的，所述调制待传输比特数据，可以使用BPSK、π/4旋转二进制相移键控(Binary Phase Shift Keying，BPSK)、正交相移键控(Quadrature Phase Shift Keying，QPSK)以及正交振幅调制(Quadrature Amplitude Modulation，QAM)调制方式中的至少一种对待传输比特进行调制。其中，所述π/4旋转BPSK调制方式是指在BPSK调制方式基础上将其星座图(Constellation Diagram)进行π/4或-π/4旋转，如图3所示，图3(a)和图3(b)分别给出了在BPSK调制方式基础上将星座图进行π/4和-π/4旋转的π/4旋转BPSK星座图。可以理解的，本申请中所述的调制还可以采用其他的调制方式，例如，基于BPSK、QPSK、或者QAM调制方式进行优化产生的调制方式，如偏移正交相移键控(Offset QPSK，OQPSK)、差分相移键控(Differential phase-shift keying，DPSK)等，本申请对此不做限定。
在一个示例中，数据发送设备使用π/4旋转BPSK对待传输比特进行调制，其中，π/4旋转BPSK调制包括对BPSK调制星座图进行+π/4旋转或-π/4旋转的调制方式，如图3所示。在一个具体的示例中，对BPSK调制星座图进行+π/4旋转，可以通过将BPSK调制符号乘以ejπ/4来实现，其中，j为虚数单位，e是自然对数的底；同理，对BPSK调制星座图进行-π/4旋转，可以通过将BPSK调制符号乘以e-jπ/4来实现。
可选的，数据发送设备以至少一个SC-FDMA符号为一个时间单位，不同时间单位内的待传输比特序列随机使用对BPSK调制星座图进行+π/4或-π/4旋转的调制方式进行调制，同一时间单位内的待传输比特使用相同的旋转方式。在一个具体的示例中，可以两个SC-FDMA符号为一个时间单位，每个时间单位根据预定的规则，随机选择使用对BPSK调制星座图进行+π/4旋转的调制方式或者对BPSK调制星座图进行-π/4旋转的调制方式。上述随机选择星座图旋转方式的规则，可以根据系统需要进行设定，本申请对此不做限定。例如，可以根据某个具体的门限确定随机选择旋转方式的规则，具体的，可以要求该随机规则保证在一段统计时间内，例如在L(L≥2)个时间单位内，需要满足，使用一种旋转方式的SC-FDMA符号个数与使用另一种旋转方式的SC-FDMA符号个数的差值，不超过L个时间单位内总SC-FDMA符号个数的10％，其中，10％为示例性的门限，可以根据系统需求进行调整，本申请不做限定。
可选的，一个时间单位内所包含的SC-FDMA符号的个数，也可以根据系统需求进行设定，例如，还可以一个时隙(slot)为一个时间单位，一个slot中包含至少一个SC-FDMA符号；还可以一个传输时间间隔(Transmission Time Interval，TTI)为一个时间单位，一个TTI 中包含至少一个SC-FDMA符号，等等，本申请不做限定。
可选的，数据发送设备以至少一个SC-FDMA符号为一个时间单位，不同时间单位内的待传输比特序列，也可以交替的使用对BPSK调制星座图进行+π/4旋转的调制方式和对BPSK调制星座图进行-π/4旋转的调制方式，同一时间单位内的待传输比特使用相同的旋转方式。
可选的，可以根据预定的规则确定每个时间单位内使用对BPSK调制星座图进行+π/4旋转还是-π/4旋转的调制方式。在一个具体的示例中，可以使用如下规则中的至少一种来确定每个时间单位l内使用+π/4旋转还是-π/4旋转的调制方式，其中l≥0，为时间单位索引：
1)当l mod 2＝1时，使用对BPSK调制星座图进行+π/4旋转的调制方式进行调制，当l mod 2＝0时，使用对BPSK调制星座图进行-π/4旋转的调制方式进行调制，其中A mod B表示取A除以B的余数。当然，也可以当l mod 2＝0时，使用对BPSK调制星座图进行+π/4旋转的调制方式进行调制，当l mod 2＝1时，使用对BPSK调制星座图进行-π/4旋转的调制方式进行调制，下文中的规则2)和3)也可以进行类似变换使用，不再赘述。
2)当
Figure PCTCN2017103181-appb-000012
时，使用对BPSK调制星座图进行+π/4旋转的调制方式进行调制，当
Figure PCTCN2017103181-appb-000013
时，使用对BPSK调制星座图进行-π/4旋转的调制方式进行调制，其中，其中
Figure PCTCN2017103181-appb-000014
表示对A向下取整，C为任意正整数，可以根据系统需求进行确定。
3)当
Figure PCTCN2017103181-appb-000015
时，使用对BPSK调制星座图进行+π/4旋转的调制方式进行调制，当
Figure PCTCN2017103181-appb-000016
时，使用对BPSK调制星座图进行-π/4旋转的调制方式进行调制，其中，其中
Figure PCTCN2017103181-appb-000017
表示对A向上取整，C为任意正整数，可以根据系统需求进行确定。
可选的，数据接收设备为基站，所述数据接收设备可以通知数据发送设备(如，用户设备)每个时间单位内旋转方式的使用规则，也可以预先约定所述旋转方式的使用规则，本申请对此不做限制；或者，数据接收设备为用户设备，所述数据接收设备可以接收数据发送设备(如，基站)的信令或消息，并从所述信令或消息中获知每个时间单位内旋转方式的使用规则，也可以预先约定所述旋转方式的使用规则，本申请对此不做限制。
图4为本申请实施例提供的另一种数据处理方法的流程示意图。
数据发送设备将待传输比特调制后，得到经过调制的符号序列，所述调制方式的具体实施方式与图2所对应的实施例相同，此处不再赘述。
经过调制获得的调制符号序列(第一符号序列)中包含M(M≥1)个复数符号，数据发送设备将所述符号序列中的M个复数符号进行实虚部分离，获得一个包含2M个符号的序列(第二符号序列)。可选的，第一符号序列经过实虚部分离后，所获得的实部和虚部符号，可以按照预定的顺序进行摆放获得第二符号序列，但需要保证实部和虚部间隔排列，即，第二符号序列中任意两个相邻的符号，都包含一个复数符号x的实部和一个复数符号y的虚部，x和y可以是同一个符号也可以是不同的符号。
在一个示例中，M个复数符号序列d经过分离后获得的实部和虚部符号，按顺序交替排列构成包含2M个符号的序列doffset，且满足：
d＝[d0,d1,…,dM-1]；
doffset＝[Re{d0},Im{d0},Re{d1},Im{d1}…,Re{dM-1},Im{dM-1}]，其中Re{}表示取实部操作，Im{}表示取虚部操作。例如，以d0为例，记d0＝a0+j·b0，其中j为虚数单位，则Re{d0}＝a0，Im{d0}＝b0。
可选的，由第一符号序列生成第二符号序列的规则可以在数据发送设备和数据接收设备之间通过信令通知，也可以预先约定。在一个示例中，数据发送设备为基站，所述数据发送设备可以通过信令或者其他可能的消息通知数据接收设备(如，用户设备)由第一符号序列 生成第二符号序列的规则，也可以预先约定生成第二符号序列的具体规则；在另一个示例中，数据发送设备为用户设备，所述数据发送设备可以接收数据接收设备(如，基站)发送的信令或其他可能的消息，并从所述信令或消息中获知由第一符号序列生成第二符号序列的规则，也可以预先约定生成第二符号序列的具体规则。
调制符号序列经过实虚部分离后，数据发送设备将上述第二符号序列中的符号进行相位旋转。
在一个示例中，相位旋转可以通过为所述第二符号序列中的每个符号乘以一个相位旋转因子
Figure PCTCN2017103181-appb-000018
来实现，其中，j为虚数单位，e是自然对数的底，
Figure PCTCN2017103181-appb-000019
为相位旋转因子的相位，满足：
Figure PCTCN2017103181-appb-000020
其中，k＝0,1,2,…,2M-1，nk为任意整数，Q为所述第二符号序列经过频域加窗后保留的有效符号个数。
在另一个示例中，相位旋转还可以通过将所述第二符号序列乘以一个相位旋转矩阵来实现，例如，记所述相位旋转矩阵为
Figure PCTCN2017103181-appb-000021
diag[]表示K为对角元素依次为
Figure PCTCN2017103181-appb-000022
的对角矩阵，其中，j为虚数单位，e是自然对数的底，
Figure PCTCN2017103181-appb-000023
为相位旋转因子的相位，满足：
Figure PCTCN2017103181-appb-000024
其中，k＝0,1,2,…,2M-1，nk为任意整数，Q为所述第二符号序列经过频域加窗后保留的有效符号个数。
可选的，上述公式中的nk可以在数据发送设备和数据接收设备之间通过信令通知，也可以预先约定。在一个示例中，数据发送设备为基站，所述数据发送设备可以通知数据接收设备(如，用户设备)nk的取值或者相关信息，也可以预先约定nk的取值或者相关信息。在另一个示例中，数据发送设备为用户设备，所述数据发送设备可以接收数据接收设备(如，基站)的信令或消息，并从所述信令或消息中获知nk的取值或者相关信息，也可以预先约定nk的取值或者相关信息。
数据发送设备将第二符号序列经过相位旋转获得第三符号序列，并使用第三符号序列中的符号生成至少一个SC-FDMA符号。
可选的，使用第三符号序列中的符号生成至少一个SC-FDMA符号可以包括如下步骤：
数据发送设备首先对所述第三符号序列进行2M点的DFT，获得第四符号序列，其中，实现离散傅里叶变换的方法，可以给第三符号序列乘以一个傅里叶变换矩阵的形式实现，也可以通过其他可能的方式实现，本申请对此不做限定。对DFT处理过程的名称，也可能有不同的定义，例如，在LTE系统中，将DFT过程定义为变换预编码(Transform precoder)处理，但实质上也是进行DFT变换，本申请对此不做限定。
数据发送设备对所述第四符号序列乘以窗函数，获得包含Q个符号的第五符号序列，其中Q为大于等于1的整数，且2M≥Q≥M，其中，所述对所述第四符号序列乘以窗函数，为将所述第四符号序列中的每个符号逐一乘以一个权值；在一些具体的示例中，所述窗函数可以是矩形窗、平方根升余弦(Square Root Raised Cosine，SRRC)窗函数、Kaiser窗函数等，本申请对此不做限定，所述窗函数可以通过序列或矩阵的形式实现，本申请对此不做限定，其中包含Q个窗函数元素。在一个具体的示例中，窗函数可以采用矩阵表达形式，如：
G＝diag[0,…,0,G0,G1,…,GQ-1,0,…,0]，
其中，diag[]表示G为对角元素依次为0,…,0,G0,G1,…,GQ-1,0,…,0，其余非对角元素为0的矩阵，G矩阵为一个2M×2M矩阵，G0,G1,…,GQ-1为所述Q个窗函数元素，根据窗函数类型的不同设置具体的取值，例如，如果选用矩形窗，则G0＝…＝GQ-1＝1。G0,G1,…,GQ-1序列前面的0元素和后面的0元素的个数可以根据具体需要进行设置，本申请不做限定，以矩形窗为例，可以有G＝diag[1,…1,0,…,0]，其中，包含Q个1和2M-Q个0。将上述第四符号序列与窗函数矩阵G相乘，保留与G0,G1,…,GQ-1对应相乘的Q个连续符号，丢弃边缘值为0的2M-Q个元素，得到包含Q个符号的第五符号序列。
可选的，对第四符号序列乘以窗函数，获得所述包含Q个符号的第五符号序列，还可以有其他的实现方式，本申请对此不做限定。例如，先从第四符号序列中任意取出Q个连续的符号，然后将所述Q个连续的符号乘以窗函数，此时窗函数中包含Q个窗函数元素，即，所述Q个连续符号分别与Q个窗函数元素一一对应相乘，获得Q个相乘结果符号，构成所述第五符号序列。在一个具体的示例中，如果使用矩阵形式实现窗函数，则G＝diag[G0,G1,…,GQ-1]，其中，G为对角元素依次为G0,G1,…,GQ-1，其余元素为0，Q×Q的矩阵，G0,G1,…,GQ-1为所述Q个窗函数元素。
可选的，还可以直接从第四符号序列中任意取出Q个连续符号，作为第五符号序列。
可选的，上述Q和M的取值或者Q和M的比例关系，可以根据系统需求进行动态调整，从而动态的调整PAPR。可选的，当Q＝M时，则传输资源的频谱不经过扩展；当Q>M时，可以通过扩展传输资源的频谱，减低频谱效率的手段进一步的降低PAPR。
可选的，Q和M的信息可以在数据发送设备和数据接收设备之间通过信令或者其他可能的消息通知，也可以预先约定。所述Q和M的信息可以包括，M的信息、Q的信息，Q和M的比例关系信息中的至少一个。在一个示例中，所述数据发送设备为基站，所述数据发送设备发送M的信息，Q的信息以及M和Q的比例关系信息中的至少一个给数据接收设备(如，用户设备)。在另一个示例中，所述数据发送设备为用户设备，所述数据发送设备接收M的信息，Q的信息以及M和Q的比例关系信息中的至少一个。可以理解的，所述M的信息，Q的信息以及M和Q的比例关系信息，可以是数值信息，也可以是能体现其取值的其他信息；当然，上述信息中的一个或者多个也可以预先约定。
在一个具体的示例中，以LTE系统为例，基站可以通过下行控制信息(Downlink Control Information，DCI)来通知用户设备Q和M的比例关系信息。首先，可以通过在调制和编码方式(Modulation and Coding Scheme，MCS)信息中增加不同的带宽比例(Bandwitdh Ratio，记为RBW)信息，来指示M和Q的比例关系。例如，表1中的带宽比例RBW一列，规定了不同MCS方式下具体的Q/M的比值关系(此处，“/”表示除法)，当MCS索引为0，RBW＝2，表示Q的数值为M的两倍，当MCS索引为1，RBW＝1.5，表示Q的数值为M的1.5倍，当MCS索引为2，RBW＝1，表示Q的数值与M相等。通过调整带宽系数，可以将待传输数据进行带宽扩展，如扩展为1.5倍或2倍带宽，即在1.5倍或2倍子载波数上发送数据，获得更低的PAPR，从而可以使用更大的发射功率，提升边缘覆盖性能。基站可以在DCI中动态的发送MCS索引(MCS index)，从而实现带宽调整的目的。
表1 一种可能的M和Q的比例关系指示方式
Figure PCTCN2017103181-appb-000025
Figure PCTCN2017103181-appb-000026
在另一个具体的示例中，也可以在DCI中单独增加信元，用来传输Q/M信息，例如，用多个bit表示多种带宽比例配置。
可选的，还可以使用其他的信令或者信元进行上述信息的通知，本申请不限定具体的设计规则及通知方式。数据发送设备对所述第五符号序列进行快速傅里叶反变换(Inverse Fast Fourier Transformation，IFFT)，生成至少一个SC-FDMA符号。在一个示例中，所述数据发送设备对所述第五符号序列中的符号进行物理资源映射，即将第五符号序列中的符号分别映射到所述至少一个SC-FDMA符号所对应的物理资源上，再通过IFFT、加CP(Cyclic Prefix，循环前缀)操作生成所述至少一个SC-FDMA符号。
数据发送设备，发送上述生成的至少一个SC-FDMA符号。
可以理解的，上述数据处理过程中还可以根据系统需求，增加其他需要的处理步骤，本申请对此不做限定。
图5为本申请实施例提供的又一种数据处理方法的流程示意图。
数据发送设备对待传输比特序列进行调制、实虚部分离、相位旋转、DFT操作，获得第四符号序列，上述过程中具体的实施方式与图4所对应的实施例相同，此处不再赘述。
不同的是，图5所示的实施例中，数据发送设备还可以对所述第四符号序列进行循环扩展，获得包含P个符号的第五符号序列，其中P≥2M。其中，对符号序列进行循环扩展，是指通过循环重复所述符号序列获得长度大于等于原符号序列的扩展符号序列，例如，记经过DFT后的符号序列为dDFT，其中的符号记为dDFT(m),m＝0,…2M-1，则将dDFT进行循环扩展后的符号序列中的符号为dCE(n)＝dDFT(mod(n,2M)),n＝0,…,P-1，其中2M为经过DFT后的符号序列长度，P为循环扩展后的符号序列长度P≥2M，mod(n,2M)意为n对2M取余数操作。可以理解的，当P＝2M时，数据发送设备可以将第四符号序列送入循环扩展模块，但不进行循环扩展处理，也可以不经过循环扩展模块，直接将第四符号序列送入循环扩展模块之后的处理单元。
数据发送设备对所述第五符号序列乘以窗函数，获得包含Q个符号的第六符号序列，其中Q为大于等于1的整数，且P≥Q≥M。图5所对应的实施例中，如果采用矩阵方式表示窗函数，则矩阵G为一个P×P矩阵，其对角元素中包含G0,G1,…,GQ-1以及P-Q个0元素。其他具体的实施方式与图4所对应的实施例相同，此处不再赘述。
可选的，还可以先从第五符号序列中取任意Q个连续的符号，再与窗函数相乘，获得第六符号序列，具体实施方式与图4所对应的实施例相同，此处不再赘述。
在另一个可能的实现方式中，数据发送设备还可以对所述第四符号序列进行循环扩展，直接获得包含Q个符号的第五符号序列，此时Q为大于等于2的整数，且Q≥2M，其中循环扩展的实施方式，与上文所述类似，不同的是扩展后的符号序列长度为Q。然后，对所述第五符号序列乘以窗函数，获得包含Q个符号的第六符号序列，此时，如果采用矩阵方式表示窗函数，则窗函数G为一个对角元素依次为G0,G1,…,GQ-1，其余元素为0，Q×Q的矩阵，G0,G1,…,GQ-1为所述Q个窗函数元素。
可选的，还可以直接从第五符号序列中任意取出Q个连续符号，作为第六符号序列。特别的，当第五符号序列仅包含Q个符号时，则第五符号序列和第六符号序列相同。
之后，数据发送设备对所述第六符号序列进行快速傅里叶反变换(Inverse Fast Fourier Transformation，IFFT)，生成至少一个SC-FDMA符号。可选的，所述数据发送设备还可以对所述第六符号序列进行资源映射，将第六符号序列中的符号分别映射到所述至少一个SC-FDMA符号所对应的物理资源上，再通过IFFT、加CP操作生成所述至少一个SC-FDMA符号。
数据发送设备，发送上述生成的至少一个SC-FDMA符号。
除上述所描述的不同之外，图5实施例中的其他步骤的实施方式可以参考图4实施例的具体描述，例如，M的信息、Q的信息或M和Q的比例关系信息的通知方式等，可以参考图4实施例的具体描述，此处不再赘述。
可以理解的，上述数据处理过程中还可以根据系统需求，增加其他需要的处理步骤，本申请对此不做限定。
图6为本申请实施例提供的再一种数据处理方法的流程示意图。
在图4或者图5实施例的基础上，数据发送设备还可以对待传输比特序列进行层映射和/或预编码操作。作为一个具体的示例，图6给出了以图5为基础，增加层映射和预编码操作的数据处理方法。
数据发送设备将至少一个待传输比特序列进行调制，得到至少一个经过调制的符号序列，所述至少一个经过调制的符号序列经过层映射，生成不同层的符号序列，以便实现空间复用、传输分集或者其他系统需要实现的功能。其中，层映射的具体实现方式，本申请不做限定，例如，可以采用第三代合作伙伴计划(3rd Generation Partnership Project，3GPP)协议TS 36.211中所定义的层映射(layer mapping)处理方式。
数据发送设备对每一层的符号序列单独进行实虚部分离、相位旋转、DFT、循环扩展、频域加窗等操作，每一层符号序列的具体实施方式，可以参见图4或者图5所对应的实施例，此处不再赘述。
数据发送设备对经过频域加窗的至少一个符号序列进行预编码操作，将不同层的数据变换到不同的天线端口上，以便实现空间复用、传输分集或者其他系统需要实现的功能。其中，预编码的具体实现方式，本申请不做限定，例如，可以采用3GPP协议TS 36.211中所定义的预编码(precoding)处理方式。
数据发送设备对经过预编码的至少一个符号序列分别进行物理资源映射，并最终生成不同天线端口上的SC-FDMA符号，并发送。其中，物理资源映射和SC-FDMA的实现方式，参见图4或者图5所对应的实施例，此处不再赘述。
可以理解的，上述数据处理过程中还可以根据系统需求，增加其他需要的处理步骤，本申请对此不做限定。
图7为本申请实施例提供的一种接收端数据处理方法的流程示意图。
数据接收设备接收至少一个SC-FDMA符号；通过处理所述至少一个SC-FDMA符号获得时域第一符号序列，所述第一符号序列包含2M个符号，M为大于等于1的整数。
可选的，数据接收设备在接收到所述至少一个SC-FDMA符号后，对所述至少一个SC-FDMA符号进行去CP和FFT操作获得频域符号序列(记为第四符号序列)，其中，所述第四符号序列中包含Q个符号，Q为大于等于1的整数。可选的，对所述至少一个SC-FDMA符号进行FFT，获得第四符号序列，还包括在FFT之后从对应的物理资源上获取所述第四符号序列中的符号。
可选的，数据接收设备还可以对上述第四符号序列进行信道估计、均衡以及其他接收机中可能需要的处理。
可选的，数据接收设备将所述第四符号序列乘以窗函数，其中，所述对所述第四符号序 列乘以窗函数，为将所述第四符号序列中的每个符号逐一乘以一个权值。可选的，所述窗函数可以是矩形窗、SRRC窗函数、Kaiser窗函数等，本申请对此不做限定，数据接收设备对上述第四符号序列进行加窗的目的是为了实现接收机的匹配滤波。所述窗函数可以通过序列或矩阵的形式实现，其中包含Q个窗函数元素。可以理解的，所述乘以窗函数的操作也可以省略，本申请对此不做限定。
可选的，数据接收设备将乘以窗函数之后的第四符号序列(或者是未乘以窗函数的第四符号序列)进行序列延长或者序列缩短操作，获得第五符号序列，所述第五符号序列中包含2M个符号。
在一个可能的示例中，当Q<2M时，可以对乘以窗函数之后的第四符号序列(或者是未乘以窗函数的第四符号序列)进行序列扩展操作，具体的，可以对带扩展序列补充2M-Q个符号，所补充的符号位置与数据发送设备对频域符号序列乘以窗函数时置零的符号位置相同。可选的，具体补充2M-Q个符号的位置或者规则可以通过信令或消息通知，也可以预先约定。作为一个具体的示例，所补充的2M-Q个符号可以全为零，也可以是其他方式确定的符号取值。
在另一个可能的示例中，当Q>2M时，可以对乘以窗函数之后的第四符号序列(或者是未乘以窗函数的第四符号序列)进行序列缩短操作。具体的，可以对待缩短的序列进行循环加回操作，所述循环加回操作，是指对应发端的循环扩展操作，将发端循环扩展操作时扩展出的符号，加回到未经循环扩展的序列符号上，最终获得与未经循环扩展的序列长度相同的符号个数。例如，发端将序列{a,b,c}进行循环扩展得到了序列{a,b,c,a,b,c,a}并发送，则发端在接收到相应的序列{a’,b‘,c’,a‘’,b‘’,c‘’,a‘’‘}时，进行循环加回操作，得到序列{a’+a‘’+a‘’‘,b‘+b‘’,c’+c‘’}。可以理解的，所述序列缩短操作，也可以其他方式实现，例如直接取包含2M个连续符号的部分序列作为上述第五符号序列，本申请对此不做限定。可以理解的，当Q＝2M时，可以不经过上述序列延长或缩短操作，此时，所述第五符号序列与所述乘以窗函数之后的第四符号序列(或者是未乘以窗函数的第四符号序列)相同。
可选的，Q和M的信息可以在数据发送设备和数据接收设备之间通过信令或者其他可能的消息通知，也可以预先约定。所述Q和M的信息可以包括，M的信息、Q的信息，Q和M的比例关系信息中的至少一个。在一个示例中，所述数据接收设备为用户设备，所述数据接收设备接收数据发送设备(如，基站)发送的M的信息，Q的信息以及M和Q的比例关系信息中的至少一个。在另一个中，所述数据接收设备为基站，所述数据接收设备发送M的信息，Q的信息以及M和Q的比例关系信息中的至少一个给数据发送设备(如，用户设备)。可以理解的，所述M的信息，Q的信息以及M和Q的比例关系信息，可以是数值信息，也可以是能体现其取值的其他信息；当然，上述信息中的一个或者多个也可以预先约定。具体的通知方式，可以参考图4实施例的具体描述，此处不再赘述。
可选的，数据接收设备对第五符号序列进行2M点的IDFT，获得所述第一符号序列。
可选的，所述数据接收设备通过处理所述至少一个SC-FDMA符号获得时域第一符号序列，还可以包括解预编码处理。在一个示例中，数据接收设备对所述至少一个SC-FDMA符号进行FFT之后，在每个天线端口所对应的物理资源上获得至少一个符号序列，并将所述至少一个符号序列进行解预编码处理，获得所述第四符号序列。
数据接收设备将所述第一符号序列中的符号进行相位解旋转，获得第二符号序列。在一个示例中，数据接收设备为所述第一符号序列中的每个符号乘以一个相位解旋转因子
Figure PCTCN2017103181-appb-000027
其中，j为虚数单位，e是自然对数的底，
Figure PCTCN2017103181-appb-000028
为相位旋转因子的相位，满足：
Figure PCTCN2017103181-appb-000029
其中，k＝0,1,2,…,2M-1，nk为任意整数。
在另一个示例中，相位解旋转还可以乘以一个相位旋转矩阵来实现，例如，记所述相位旋转矩阵为
Figure PCTCN2017103181-appb-000030
diag[]表示K为对角元素依次为
Figure PCTCN2017103181-appb-000031
的对角矩阵，其中，j为虚数单位，e是自然对数的底，
Figure PCTCN2017103181-appb-000032
为相位旋转因子的相位，满足：
Figure PCTCN2017103181-appb-000033
其中，k＝0,1,2,…,2M-1，nk为任意整数。
可选的，上述公式中的nk可以在数据发送设备和数据接收设备之间通过信令通知，也可以预先约定。在一个示例中，数据接收设备为基站，所述数据接收设备可以通知数据发送设备(如，用户设备)nk的取值或者相关信息，也可以预先约定nk的取值或者相关信息；在另一个示例中，数据接收设备为用户设备，所述数据接收设备可以接收数据发送设备(如，基站)的信令或消息，并从所述信令或消息中获知nk的取值或者相关信息，也可以预先约定nk的取值或者相关信息。
数据接收设备将所述第二符号序列中符号的实部分别作为实部和虚部进行组合，获得第三符号序列，所述第三符号序列包含M个复数符号。
数据接收设备由第二符号序列获取第三符号序列的方式取决于数据发送设备进行实虚部分离时的操作方式。可选的，所述第二符号序列中的符号的实部按顺序依次组合成第三符号序列中的复数符号，即所述第二符号序列中符号的实部构成的序列
Figure PCTCN2017103181-appb-000034
满足：
Figure PCTCN2017103181-appb-000035
所述第三符号序列
Figure PCTCN2017103181-appb-000036
满足：
Figure PCTCN2017103181-appb-000037
可选的，由第二符号序列生成第三符号序列的规则可以在数据发送设备和数据接收设备之间通过信令通知，也可以预先约定。在一个示例中，数据接收设备为基站，所述数据接收设备可以通知数据发送设备(如，用户设备)由第二符号序列生成第三符号序列的规则，也可以预先约定生成第三符号序列的具体规则；在另一个示例中，数据接收设备为用户设备，所述数据接收设备可以接收数据发送设备(如，基站)的信令或消息，并从所述信令或消息中获知由第二符号序列生成第三符号序列的规则，也可以预先约定生成第三符号序列的具体规则。
数据接收设备对所述第三符号序列进行解调，获得解调比特序列。具体的解调方法本申请不做限定，与发端的调制方式保持一致即可，发端的调制方式可以参考图2所对应的实施例的描述，此处不再赘述。
可选的，所述数据接收设备解调所述第三符号序列后，还可以对所述第三符号序列进行解层映射，获得待解调符号序列，再对带解调符号序列进行解调，获得解调比特序列。
需要说明的是，本申请中对符号序列所做的编号，如“第一”、“第二”等等，仅为了描述清晰，不构成限定。不同实施例中相同编号的符号序列可以相同也可以不同。特别的，数据接收设备处理过程中所涉及的符号序列与数据发送设备处理过程中所涉及的相同编号的符号序列可以是不相同的，例如数据发送设备中的第一符号序列和数据接收设备中的第一符号序列可以不相同。
上述本申请提供的实施例中，分别从各个网元本身、以及从各个网元之间交互的角度对本申请实施例提供的数据传输方法进行了介绍。可以理解的是，各个网元，例如数据发送设备(网络侧设备或UE)、数据接收设备(UE或网络侧设备)等为了实现上述功能，其包含了执行各个功能相应的硬件结构和/或软件模块。本领域技术人员应该很容易意识到，结合本文中所公开的实施例描述的各示例的单元及算法步骤，本申请能够以硬件或硬件和计算机软件的结合形式来实现。某个功能究竟以硬件还是计算机软件驱动硬件的方式来执行，取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能，但是这种实现不应认为超出本申请的范围。
图8示出了上述实施例中所涉及的数据发送设备的一种可能的结构示意图。
可选的，所述数据发送设备可以是一种网络侧设备，例如，可以是基站或者其他具备基站功能的网络侧设备；也可以是一种用户设备；也可以是其他具有数据发送功能的装置。
在一个具体的示例中，数据发送设备的结构中包括处理器和发射器。在一个具体的示例中，数据发送设备的结构中还可以包括接收器。在一个具体的示例中，当数据发送设备为网络侧设备时，数据发送设备的结构中还可以包括通信接口，用于支持与其他网络侧设备之间的通信，如与核心网节点之间的通信。在一个可能的示例中，所述数据发送设备的结构中还可以包括存储器，所述存储器用于与处理器耦合，保存数据发送设备必要的程序指令和数据。在图8所对应的示例中，本申请所涉及的数据发送设备的结构中包括发射器801，接收器802，处理器803，存储器804。
在上行链路上，待发送的数据或信息(例如待传输比特序列)经过发射器801处理并生成上行链路信号，该上行链路信号经由天线发射给上述实施例中所述的数据接收设备。在下行链路上，天线接收上述实施例中数据接收设备发射的下行链路信号(包括上述数据和/或控制信息)，接收器802处理从天线接收的信号并提供输入采样。在处理器803中，对业务数据和信令消息进行处理，例如对待发送的数据进行调制、SC-FDMA符号生成等。所述发射器、接收器以及处理器根据无线接入网采用的无线接入技术(例如，LTE及其他演进系统的接入技术)来进行数据和/或信号的处理。所述处理器803还用于对数据发送设备的动作进行控制管理，用于执行上述实施例中由数据发送设备进行的处理，例如用于控制数据发送设备对发送数据进行处理和/或进行本申请所描述的技术的其他过程。处理器803还用于支持数据发送设备执行图2-图6中涉及数据发送设备的处理过程。存储器804用于存储用于所述数据发送设备的程序代码和数据。
图9示出了上述实施例中所涉及的数据接收设备的一种可能的设计结构的简化示意图。
可选的，所述数据接收设备可以是一种网络侧设备，例如，可以是基站或者其他具备基站功能的网络侧设备；也可以是一种用户设备；也可以是其他具有数据接收功能的装置。
在一个可能的示例中，数据接收设备的结构中包括处理器和接收器。在一个可能的示例中，数据接收设备的结构中还可以包括发射器。在一个可能的示例中，所述数据接收设备可以是一种网络侧设备，所述数据接收设备还可以包括通信接口，所述通信接口用于支持数据接收设备与其他网络侧设备进行通信，例如接收其他网络侧设备所发送的信息或指令，和/或发送信息或指令给其他网络侧设备。在一个可能的示例中，所述数据接收设备的结构中还可以包括存储器，所述存储器用于与处理器耦合，保存数据接收设备必要的程序指令和数据。在图9所对应的示例中，本申请所涉及的数据接收设备的结构中包括发射器/接收器901，处理器902，存储器903和通信接口904。
所述发射器/接收器901用于支持数据接收设备与上述实施例中的所述的数据发送设备 之间收发信息，例如发送上述所涉及到的数据和/或控制信息，接收上述所涉及到的传输数据(如SC-FDMA符号)。所述处理器902执行各种用于与数据发送设备通信的功能。处理器902还执行图7中涉及数据接收设备的处理过程，例如接收并处理SC-FDMA符号。存储器903用于存储数据接收设备的程序代码和数据。通信接口904，用于支持数据接收设备与其他网络侧设备之间的通信，例如，X2接口，S1接口等。
可以理解的是，图9仅仅示出了所述数据接收设备的简化设计。在实际应用中，所述数据接收设备可以包含任意数量的发射器，接收器，处理器，存储器等，而所有可以实现本申请的数据接收设备都在本申请的保护范围之内。
用于执行本申请上述数据发送设备和数据接收设备的处理器可以是中央处理器(CPU)，通用处理器、数字信号处理器(DSP)、专用集成电路(ASIC)，现场可编程门阵列(FPGA)或者其他可编程逻辑器件、晶体管逻辑器件，硬件部件或者其任意组合。其可以实现或执行结合本申请公开内容所描述的各种示例性的逻辑方框，模块和电路。所述处理器也可以是实现计算功能的组合，例如包含一个或多于一个微处理器组合，DSP和微处理器的组合等等。
结合本申请公开内容所描述的方法或者算法的步骤可以硬件的方式来实现，也可以是由处理器执行软件指令的方式来实现。软件指令可以由相应的软件模块组成，软件模块可以被存放于RAM存储器、闪存、ROM存储器、EPROM存储器、EEPROM存储器、寄存器、硬盘、移动硬盘、CD-ROM或者本领域熟知的任何其它形式的存储介质中。一种示例性的存储介质耦合至处理器，从而使处理器能够从该存储介质读取信息，且可向该存储介质写入信息。当然，存储介质也可以是处理器的组成部分。处理器和存储介质可以位于ASIC中。另外，该ASIC可以位于数据接收设备和/或数据发送设备中。当然，处理器和存储介质也可以作为分立组件存在于数据接收设备和/或数据发送设备中。
本领域技术人员应该可以意识到，在上述一个或多个示例中，本申请所描述的功能可以用硬件、软件、固件或它们的任意组合来实现。当使用软件实现时，可以将这些功能存储在计算机可读介质中或者作为计算机可读介质上的一个或多个指令或代码进行传输。计算机可读介质包括计算机存储介质和通信介质，其中通信介质包括便于从一个地方向另一个地方传送计算机程序的任何介质。存储介质可以是通用或专用计算机能够存取的任何可用介质。
以上所述的具体实施方式，对本申请的目的、技术方案和有益效果进行了进一步详细说明，所应理解的是，以上所述仅为本申请的具体实施方式而已，并不用于限定本申请的保护范围，凡在本申请的技术方案的基础之上，所做的任何修改、等同替换、改进等，均应包括在本申请的保护范围之内。

Claims (39)

  1. 一种数据处理方法，其特征在于，包括：
    数据发送设备调制待传输比特序列，获得第一符号序列，其中，所述第一符号序列包含M个复数符号，M为大于等于1的整数；
    将所述第一符号序列中的每个复数符号的实部和虚部分离成两个符号，获得第二符号序列，其中，所述第二符号序列包含2M个符号；
    将所述第二符号序列中的符号进行相位旋转，获得第三符号序列；
    使用所述第三符号序列生成至少一个单载波频分多址(Single Carrier Frequency Division Multiple Access，SC-FDMA)符号；
    发送所述至少一个SC-FDMA符号。
  2. 如权利要求1所述的方法，其特征在于，使用所述第三符号序列生成至少一个SC-FDMA符号，包括：
    对所述第三符号序列进行2M点的离散傅里叶变换(Discrete Fourier Transform，DFT)，获得第四符号序列；
    使用所述第四符号序列生成至少一个SC-FDMA符号。
  3. 如权利要求2所述的方法，其特征在于，使用所述第四符号序列生成至少一个SC-FDMA符号，包括：
    对所述第四符号序列乘以窗函数，获得包含Q个符号的第五符号序列，其中Q为大于等于1的整数，且2M≥Q≥M；
    对所述第五符号序列进行快速傅里叶反变换(Inverse Fast Fourier Transformation，IFFT)，生成至少一个SC-FDMA符号。
  4. 如权利要求2所述的方法，其特征在于，使用所述第四符号序列生成至少一个SC-FDMA符号，包括：
    对所述第四符号序列进行循环扩展，获得包含Q个符号的第五符号序列，其中Q为大于等于2的整数，且Q≥2M；
    对所述第五符号序列乘以窗函数，获得包含Q个符号的第六符号序列；
    对所述第六符号序列进行快速傅里叶反变换(Inverse Fast Fourier Transformation，IFFT)，生成至少一个SC-FDMA符号。
  5. 如权利要求3或4所述的方法，其特征在于，所述将所述第二符号序列中的符号进行相位旋转，包括：为所述第二符号序列中的每个符号乘以一个相位旋转因子
    Figure PCTCN2017103181-appb-100001
    其中，j为虚数单位，e是自然对数的底，
    Figure PCTCN2017103181-appb-100002
    为相位旋转因子的相位，满足：
    Figure PCTCN2017103181-appb-100003
    其中，k＝0，1，2，...，2M-1，nk为任意整数。
  6. 如权利要求1至5任一项所述的方法，其特征在于，所述数据发送设备调制待传输比特序列，包括：使用π/4旋转二进制相移键控(Binary Phase Shift Keying，BPSK)、正交相移键控(Quadrature Phase Shift Keying，QPSK)以及正交振幅调制(Quadrature Amplitude Modulation，QAM)调制方式中的至少一种对待传输比特进行调制。
  7. 如权利要求1至5任一项所述的方法，其特征在于，所述数据发送设备调制待传输比 特序列，包括：
    使用π/4旋转二进制相移键控(Binary Phase Shift Keying，BPSK)对待传输比特进行调制，其中，所述π/4旋转BPSK调制方式为，对BPSK调制星座图进行+π/4旋转或-π/4旋转的调制方式；且
    以至少一个SC-FDMA符号为一个时间单位，不同时间单位内的待传输比特序列交替使用对BPSK调制星座图进行+π/4旋转的调制方式和对BPSK调制星座图进行-π/4旋转的调制方式进行调制，同一时间单位内的待传输比特使用相同的旋转方式。
  8. 如权利要求1至7任一项所述的方法，其特征在于，所述将所述第一符号序列中的每个复数符号的实部和虚部分离成两个符号，获得第二符号序列，其中，记所述第一符号序列为d，所述d满足：
    d＝[d0，d1，…，dM-1]；
    记所述第二符号序列为doffset，所述doffset满足：
    doffset＝[Re{d0}，Im{d0}，Re{d1}，Im{d1}…，Re{dM-1}，Im{dM-1}]，其中Re{}表示取实部操作，Im{}表示取虚部操作。
  9. 如权利要求3或4所述的方法，其特征在于，所述数据发送设备为基站，所述数据发送设备发送M的信息，Q的信息以及M和Q的比例关系信息中的至少一个给数据接收设备。
  10. 如权利要求3或4所述的方法，其特征在于，所述数据发送设备为用户设备，所述数据发送设备接收M的信息，Q的信息以及M和Q的比例关系信息中的至少一个。
  11. 一种数据处理方法，其特征在于，包括：
    数据接收设备接收至少一个单载波频分多址(Single Carrier Frequency Division Multiple Access，SC-FDMA)符号；
    通过处理所述至少一个SC-FDMA符号获得时域第一符号序列，所述第一符号序列包含2M个符号，M为大于等于1的整数；
    将所述第一符号序列中的符号进行相位解旋转，获得第二符号序列；
    将所述第二符号序列中符号的实部分别作为实部和虚部进行组合，获得第三符号序列，所述第三符号序列包含M个复数符号；
    对所述第三符号序列进行解调，获得解调比特序列。
  12. 如权利要求11所述的方法，其特征在于，所述通过处理所述至少一个SC-FDMA符号获得时域第一符号序列，包括：
    对所述至少一个SC-FDMA符号进行快速傅里叶变换(Fast Fourier Transformation，FFT)，获得第四符号序列，其中，所述第四符号序列中包含Q个符号，Q为大于等于1的整数；
    将所述第四符号序列乘以窗函数；
    将乘以窗函数后的第四符号序列进行序列延长或者序列缩短操作，获得第五符号序列，所述第五符号序列中包含2M个符号；
    对第五符号序列进行2M点的离散傅里叶反变换(Inverse Discrete Fourier Transform，IDFT)，获得所述第一符号序列。
  13. 如权利要求12所述的方法，其特征在于，所述将所述第一符号序列中的符号进行相位解旋转，包括：为所述第一符号序列中的每个符号乘以一个相位解旋转因子
    Figure PCTCN2017103181-appb-100004
    其中，j为虚数单位，e是自然对数的底，
    Figure PCTCN2017103181-appb-100005
    为相位旋转因子的相位，满足：
    Figure PCTCN2017103181-appb-100006
    其中，k＝0，1，2，...，2M-1，nk为任意整数。
  14. 如权利要求12所述的方法，其特征在于，所述数据接收设备为用户设备，所述数据接收设备接收基站发送的M的信息，Q的信息以及M和Q的比例关系信息中的至少一个。
  15. 如权利要求12所述的方法，其特征在于，所述数据接收设备为基站，所述数据接收设备发送M的信息，Q的信息以及M和Q的比例关系信息中的至少一个给数据发送设备。
  16. 一种数据发送设备，特征在于，包括：
    处理器，用于调制待传输比特序列，获得第一符号序列，其中，所述第一符号序列包含M个复数符号，M为大于等于1的整数；
    将所述第一符号序列中的每个复数符号的实部和虚部分离成两个符号，获得第二符号序列，其中，所述第二符号序列包含2M个符号；
    将所述第二符号序列中的符号进行相位旋转，获得第三符号序列；
    使用所述第三符号序列生成至少一个单载波频分多址(Single Carrier Frequency Division Multiple Access，SC-FDMA)符号；
    发射器，用于发送所述至少一个SC-FDMA符号。
  17. 如权利要求16所述的数据发送设备，其特征在于，使用所述第三符号序列生成至少一个SC-FDMA符号，所述处理器具体用于：
    对所述第三符号序列进行2M点的离散傅里叶变换(Discrete Fourier Transform，DFT)，获得第四符号序列；
    使用所述第四符号序列生成至少一个SC-FMDA符号。
  18. 如权利要求17所述的数据发送设备，其特征在于，使用所述第四符号序列生成至少一个SC-FDMA符号，所述处理器具体用于：
    对所述第四符号序列乘以窗函数，获得包含Q个符号的第五符号序列，其中Q为大于等于1的整数，且2M≥Q≥M；
    对所述第五符号序列进行快速傅里叶反变换(Inverse Fast Fourier Transformation，IFFT)，生成至少一个SC-FDMA符号。
  19. 如权利要求17所述的数据发送设备，其特征在于，使用所述第四符号序列生成至少一个SC-FDMA符号，所述处理器具体用于：
    对所述第四符号序列进行循环扩展，获得包含Q个符号的第五符号序列，其中Q为大于等于2的整数，且Q≥2M；
    对所述第五符号序列乘以窗函数，获得包含Q个符号的第六符号序列；
    对所述第六符号序列进行快速傅里叶反变换(Inverse Fast Fourier Transformation，IFFT)，生成至少一个SC-FDMA符号。
  20. 如权利要求18或19所述的数据发送设备，其特征在于，所述将所述第二符号序列中的符号进行相位旋转，所述处理器具体用于：为所述第二符号序列中的每个符号乘以一个相位旋转因子
    Figure PCTCN2017103181-appb-100007
    其中，j为虚数单位，e是自然对数的底，
    Figure PCTCN2017103181-appb-100008
    为相位旋转因子的相位，满足：
    Figure PCTCN2017103181-appb-100009
    其中，k＝0，1，2，...，2M-1，nk为任意整数。
  21. 如权利要求16至20任一项所述的数据发送设备，其特征在于，所述调制待传输比特序列，所述处理器具体用于：使用π/4旋转二进制相移键控(Binary Phase Shift Keying，BPSK)、正交相移键控(Quadrature Phase Shift Keying，QPSK)以及正交振幅调制(Quadrature Amplitude Modulation，QAM)调制方式中的至少一种对待传输比特进行调制。
  22. 如权利要求16至20任一项所述的数据发送设备，其特征在于，所述调制待传输比特序列，所述处理器具体用于：
    使用π/4旋转二进制相移键控(Binary Phase Shift Keying，BPSK)对待传输比特进行调制，其中，所述π/4旋转BPSK调制方式为，对BPSK调制星座图进行+π/4旋转或-π/4旋转的调制方式；且
    以至少一个SC-FDMA符号为一个时间单位，不同时间单位内的待传输比特序列交替使用对BPSK调制星座图进行+π/4旋转的调制方式和对BPSK调制星座图进行-π/4旋转的调制方式进行调制，同一时间单位内的待传输比特使用相同的旋转方式。
  23. 如权利要求16至22任一项所述的数据发送设备，其特征在于，所述将所述第一符号序列中的每个复数符号的实部和虚部分离成两个符号，获得第二符号序列，其中，记所述第一符号序列为d，所述d满足：
    d＝[d0，d1，…，dM-1]；
    记所述第二符号序列为doffset，所述doffset满足：
    doffset＝[Re{d0}，Im{d0}，Re{d1}，Im{d1}…，Re{dM-1}，Im{dM-1}]，其中Re{}表示取实部操作，Im{}表示取虚部操作。
  24. 如权利要求18或19所述的数据发送设备，其特征在于，所述数据发送设备为基站，所述发射器还用于：发送M的信息，Q的信息以及M和Q的比例关系信息中的至少一个给数据接收设备。
  25. 如权利要求18或19所述的数据发送设备，其特征在于，所述数据发送设备为用户设备，所述数据发送设备还包括接收器，用于接收M的信息，Q的信息以及M和Q的比例关系信息中的至少一个。
  26. 一种数据接收设备，其特征在于，包括：
    接收器，用于接收至少一个单载波频分多址(Single Carrier Frequency Division Multiple Access，SC-FDMA)符号；
    处理器，用于通过处理所述至少一个SC-FDMA符号获得时域第一符号序列，所述第一符号序列包含2M个符号，M为大于等于1的整数；和
    将所述第一符号序列中的符号进行相位解旋转，获得第二符号序列；和
    将所述第二符号序列中符号的实部分别作为实部和虚部进行组合，获得第三符号序列，所述第三符号序列包含M个复数符号；和
    对所述第三符号序列进行解调，获得解调比特序列。
  27. 如权利要求26所述的数据接收设备，其特征在于，所述通过处理所述至少一个SC-FDMA符号获得时域第一符号序列，所述处理器具体用于：
    对所述至少一个SC-FDMA符号进行快速傅里叶变换(Fast Fourier Transformation，FFT)，获得第四符号序列，其中，所述第四符号序列中包含Q个符号，Q为大于等于1的整数；
    将所述第四符号序列乘以窗函数；
    将乘以窗函数后的第四符号序列进行序列延长或者序列缩短操作，获得第五符号序列， 所述第五符号序列中包含2M个符号；
    对第五符号序列进行2M点的离散傅里叶反变换(Inverse Discrete Fourier Transform，IDFT)，获得所述第一符号序列。
  28. 如权利要求27所述的数据接收设备，其特征在于，所述将所述第一符号序列中的符号进行相位解旋转，所述处理器具体用于：为所述第一符号序列中的每个符号乘以一个相位解旋转因子
    Figure PCTCN2017103181-appb-100010
    其中，j为虚数单位，e是自然对数的底，
    Figure PCTCN2017103181-appb-100011
    为相位旋转因子的相位，满足：
    Figure PCTCN2017103181-appb-100012
    其中，k＝0，1，2，...，2M-1，nk为任意整数。
  29. 如权利要求27所述的数据接收设备，其特征在于，所述数据接收设备为用户设备，所述接收器还用于，接收M的信息，Q的信息以及M和Q的比例关系信息中的至少一个。
  30. 如权利要求27所述的数据接收设备，其特征在于，所述数据接收设备为基站，所述数据接收设备还包括发射器，用于发送M的信息，Q的信息以及M和Q的比例关系信息中的至少一个给数据发送设备。
  31. 一种网络系统，其特征在于，包括如权利要求16-25中任一项所述的数据发送设备和如权利要求26-30任一项所述的数据接收设备。
  32. 一种数据处理装置，特征在于，包括处理器以及与所述处理器耦合的存储器，所述存储器用于存储指令，所述处理器用于执行所述指令进行：
    调制待传输比特序列，获得第一符号序列，其中，所述第一符号序列包含M个复数符号，M为大于等于1的整数；
    将所述第一符号序列中的每个复数符号的实部和虚部分离成两个符号，获得第二符号序列，其中，所述第二符号序列包含2M个符号；
    将所述第二符号序列中的符号进行相位旋转，获得第三符号序列；
    使用所述第三符号序列生成至少一个单载波频分多址(Single Carrier Frequency Division Multiple Access，SC-FDMA)符号。
  33. 如权利要求32所述的数据处理装置，其特征在于，所述使用所述第三符号序列生成至少一个SC-FDMA符号，包括：
    对所述第三符号序列进行2M点的离散傅里叶变换(Discrete Fourier Transform，DFT)，获得第四符号序列；
    使用所述第四符号序列生成所述至少一个SC-FMDA符号。
  34. 如权利要求33所述的数据处理装置，其特征在于，所述使用所述第四符号序列生成所述至少一个SC-FDMA符号，包括：
    对所述第四符号序列乘以窗函数，获得包含Q个符号的第五符号序列，其中Q为大于等于1的整数，且2M≥Q≥M；
    对所述第五符号序列进行快速傅里叶反变换(Inverse Fast Fourier Transformation，IFFT)，生成所述至少一个SC-FDMA符号。
  35. 如权利要求33所述的数据处理装置，其特征在于，所述使用所述第四符号序列生成所述至少一个SC-FDMA符号，包括：
    对所述第四符号序列进行循环扩展，获得包含Q个符号的第五符号序列，其中Q为大于 等于2的整数，且Q≥2M；
    对所述第五符号序列乘以窗函数，获得包含Q个符号的第六符号序列；
    对所述第六符号序列进行快速傅里叶反变换(Inverse Fast Fourier Transformation，IFFT)，生成所述至少一个SC-FDMA符号。
  36. 如权利要求34或35所述的数据处理装置，其特征在于，所述将所述第二符号序列中的符号进行相位旋转，包括：为所述第二符号序列中的每个符号乘以一个相位旋转因子
    Figure PCTCN2017103181-appb-100013
    其中，j为虚数单位，e是自然对数的底，
    Figure PCTCN2017103181-appb-100014
    为相位旋转因子的相位，满足：
    Figure PCTCN2017103181-appb-100015
    其中，k＝0，1，2，...，2M-1，nk为任意整数。
  37. 如权利要求32至36任一项所述的数据处理装置，其特征在于，所述调制待传输比特序列，包括：使用π/4旋转二进制相移键控(Binary Phase Shift Keying，BPSK)、正交相移键控(Quadrature Phase Shift Keying，QPSK)以及正交振幅调制(Quadrature Amplitude Modulation，QAM)调制方式中的至少一种对所述待传输比特进行调制。
  38. 如权利要求32至36任一项所述的数据处理装置，其特征在于，所述调制待传输比特序列，包括：
    使用π/4旋转二进制相移键控(Binary Phase Shift Keying，BPSK)对所述待传输比特进行调制，其中，所述π/4旋转BPSK调制方式为，对BPSK调制星座图进行+π/4旋转或-π/4旋转的调制方式；且
    以至少一个SC-FDMA符号为一个时间单位，不同时间单位内的待传输比特序列交替使用对BPSK调制星座图进行+π/4旋转的调制方式和对BPSK调制星座图进行-π/4旋转的调制方式进行调制，同一时间单位内的待传输比特使用相同的旋转方式。
  39. 如权利要求32至38任一项所述的数据处理装置，其特征在于，所述第一符号序列为d，所述d满足：
    d＝[d0，d1，…，dM-1]；
    所述第二符号序列为doffset，所述doffset满足：
    doffset＝[Re{d0}，Im{d0}，Re{d1}，Im{d1}…，Re{dM-1}，Im{dM-1}]，其中Re{}表示取实部操作，Im{}表示取虚部操作。
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